; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_pwr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PWR_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SCB_Type = type { i32, i32, i32, i32, i32, i32, [12 x i8], i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, [4 x i32], [5 x i32], [1 x i32], i32, i32, i32, i32, i32, [93 x i32], i32, [15 x i32], i32, i32, i32, [1 x i32], i32, [1 x i32], i32, i32, i32, i32, i32, i32, i32, i32, [6 x i32], i32, i32, i32, i32, i32, [1 x i32], i32 }

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__DSB() #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__ISB() #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWR_EnterSTANDBYMode() #1 {
  %1 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 4), align 4, !tbaa !5
  %2 = zext i32 %1 to i64
  %3 = or i64 %2, 5
  %4 = trunc i64 %3 to i32
  store volatile i32 %4, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 4), align 4, !tbaa !5
  %5 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 4), align 4, !tbaa !5
  %6 = zext i32 %5 to i64
  %7 = or i64 %6, 2
  %8 = trunc i64 %7 to i32
  store volatile i32 %8, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 4), align 4, !tbaa !5
  %9 = load volatile i32, ptr getelementptr inbounds (%struct.SCB_Type, ptr inttoptr (i64 3758157056 to ptr), i32 0, i32 4), align 4, !tbaa !10
  %10 = zext i32 %9 to i64
  %11 = or i64 %10, 4
  %12 = trunc i64 %11 to i32
  store volatile i32 %12, ptr getelementptr inbounds (%struct.SCB_Type, ptr inttoptr (i64 3758157056 to ptr), i32 0, i32 4), align 4, !tbaa !10
  call void @__DSB()
  call void @__ISB()
  call void asm sideeffect "wfi", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !12
  ret void
}

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !8, i64 64, !7, i64 72, !7, i64 76, !8, i64 80, !8, i64 96, !8, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !8, i64 140, !7, i64 512, !8, i64 516, !7, i64 576, !7, i64 580, !7, i64 584, !8, i64 588, !7, i64 592, !8, i64 596, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !7, i64 616, !7, i64 620, !7, i64 624, !7, i64 628, !8, i64 632, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !8, i64 676, !7, i64 680}
!12 = !{i64 2153485191}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__DSB() local_unnamed_addr #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__ISB() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWR_EnterSTANDBYMode() local_unnamed_addr #1 {
  %1 = load volatile i32, ptr inttoptr (i64 1476544528 to ptr), align 16, !tbaa !5
  %2 = or i32 %1, 5
  store volatile i32 %2, ptr inttoptr (i64 1476544528 to ptr), align 16, !tbaa !5
  %3 = load volatile i32, ptr inttoptr (i64 1476544528 to ptr), align 16, !tbaa !5
  %4 = or i32 %3, 2
  store volatile i32 %4, ptr inttoptr (i64 1476544528 to ptr), align 16, !tbaa !5
  %5 = load volatile i32, ptr inttoptr (i64 3758157072 to ptr), align 16, !tbaa !10
  %6 = or i32 %5, 4
  store volatile i32 %6, ptr inttoptr (i64 3758157072 to ptr), align 16, !tbaa !10
  tail call void @__DSB()
  tail call void @__ISB()
  tail call void asm sideeffect "wfi", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !12
  ret void
}

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !8, i64 64, !7, i64 72, !7, i64 76, !8, i64 80, !8, i64 96, !8, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !8, i64 140, !7, i64 512, !8, i64 516, !7, i64 576, !7, i64 580, !7, i64 584, !8, i64 588, !7, i64 592, !8, i64 596, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !7, i64 616, !7, i64 620, !7, i64 624, !7, i64 628, !8, i64 632, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !8, i64 676, !7, i64 680}
!12 = !{i64 2153485191}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,TailCallElimPass