; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_rtc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RTC_Init(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 1, ptr %3, align 4, !tbaa !9
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = icmp ne ptr %4, null
  br i1 %5, label %6, label %120

6:                                                ; preds = %1
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %7, i32 0, i32 3
  %9 = load volatile i32, ptr %8, align 8, !tbaa !11
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %11, label %15

11:                                               ; preds = %6
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %12, i32 0, i32 2
  store i32 0, ptr %13, align 4, !tbaa !14
  %14 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_RTC_MspInit(ptr noundef %14)
  br label %15

15:                                               ; preds = %11, %6
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %16, i32 0, i32 3
  store volatile i32 2, ptr %17, align 8, !tbaa !11
  br label %18

18:                                               ; preds = %15
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %19, i32 0, i32 0
  %21 = load ptr, ptr %20, align 8, !tbaa !15
  %22 = getelementptr inbounds %struct.RTC_TypeDef, ptr %21, i32 0, i32 9
  store volatile i32 202, ptr %22, align 4, !tbaa !16
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !15
  %26 = getelementptr inbounds %struct.RTC_TypeDef, ptr %25, i32 0, i32 9
  store volatile i32 83, ptr %26, align 4, !tbaa !16
  br label %27

27:                                               ; preds = %18
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = call i32 @RTC_EnterInitMode(ptr noundef %29)
  store i32 %30, ptr %3, align 4, !tbaa !9
  %31 = load i32, ptr %3, align 4, !tbaa !9
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %106

33:                                               ; preds = %28
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %34, i32 0, i32 0
  %36 = load ptr, ptr %35, align 8, !tbaa !15
  %37 = getelementptr inbounds %struct.RTC_TypeDef, ptr %36, i32 0, i32 2
  %38 = load volatile i32, ptr %37, align 4, !tbaa !18
  %39 = zext i32 %38 to i64
  %40 = and i64 %39, -7340097
  %41 = trunc i64 %40 to i32
  store volatile i32 %41, ptr %37, align 4, !tbaa !18
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %42, i32 0, i32 1
  %44 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %43, i32 0, i32 0
  %45 = load i32, ptr %44, align 8, !tbaa !19
  %46 = load ptr, ptr %2, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %46, i32 0, i32 1
  %48 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %47, i32 0, i32 3
  %49 = load i32, ptr %48, align 4, !tbaa !20
  %50 = or i32 %45, %49
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %51, i32 0, i32 1
  %53 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %52, i32 0, i32 5
  %54 = load i32, ptr %53, align 4, !tbaa !21
  %55 = or i32 %50, %54
  %56 = load ptr, ptr %2, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %56, i32 0, i32 0
  %58 = load ptr, ptr %57, align 8, !tbaa !15
  %59 = getelementptr inbounds %struct.RTC_TypeDef, ptr %58, i32 0, i32 2
  %60 = load volatile i32, ptr %59, align 4, !tbaa !18
  %61 = or i32 %60, %55
  store volatile i32 %61, ptr %59, align 4, !tbaa !18
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %62, i32 0, i32 1
  %64 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %63, i32 0, i32 1
  %65 = load i32, ptr %64, align 4, !tbaa !22
  %66 = shl i32 %65, 16
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %67, i32 0, i32 1
  %69 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %68, i32 0, i32 2
  %70 = load i32, ptr %69, align 8, !tbaa !23
  %71 = shl i32 %70, 0
  %72 = or i32 %66, %71
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %73, i32 0, i32 0
  %75 = load ptr, ptr %74, align 8, !tbaa !15
  %76 = getelementptr inbounds %struct.RTC_TypeDef, ptr %75, i32 0, i32 4
  store volatile i32 %72, ptr %76, align 4, !tbaa !24
  %77 = load ptr, ptr %2, align 8, !tbaa !5
  %78 = call i32 @RTC_ExitInitMode(ptr noundef %77)
  store i32 %78, ptr %3, align 4, !tbaa !9
  %79 = load i32, ptr %3, align 4, !tbaa !9
  %80 = icmp eq i32 %79, 0
  br i1 %80, label %81, label %105

81:                                               ; preds = %33
  %82 = load ptr, ptr %2, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %82, i32 0, i32 0
  %84 = load ptr, ptr %83, align 8, !tbaa !15
  %85 = getelementptr inbounds %struct.RTC_TypeDef, ptr %84, i32 0, i32 19
  %86 = load volatile i32, ptr %85, align 4, !tbaa !25
  %87 = zext i32 %86 to i64
  %88 = and i64 %87, -4
  %89 = trunc i64 %88 to i32
  store volatile i32 %89, ptr %85, align 4, !tbaa !25
  %90 = load ptr, ptr %2, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %90, i32 0, i32 1
  %92 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %91, i32 0, i32 6
  %93 = load i32, ptr %92, align 8, !tbaa !26
  %94 = load ptr, ptr %2, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %94, i32 0, i32 1
  %96 = getelementptr inbounds %struct.RTC_InitTypeDef, ptr %95, i32 0, i32 4
  %97 = load i32, ptr %96, align 8, !tbaa !27
  %98 = or i32 %93, %97
  %99 = load ptr, ptr %2, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %99, i32 0, i32 0
  %101 = load ptr, ptr %100, align 8, !tbaa !15
  %102 = getelementptr inbounds %struct.RTC_TypeDef, ptr %101, i32 0, i32 19
  %103 = load volatile i32, ptr %102, align 4, !tbaa !25
  %104 = or i32 %103, %98
  store volatile i32 %104, ptr %102, align 4, !tbaa !25
  br label %105

105:                                              ; preds = %81, %33
  br label %106

106:                                              ; preds = %105, %28
  br label %107

107:                                              ; preds = %106
  %108 = load ptr, ptr %2, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %108, i32 0, i32 0
  %110 = load ptr, ptr %109, align 8, !tbaa !15
  %111 = getelementptr inbounds %struct.RTC_TypeDef, ptr %110, i32 0, i32 9
  store volatile i32 255, ptr %111, align 4, !tbaa !16
  br label %112

112:                                              ; preds = %107
  br label %113

113:                                              ; preds = %112
  %114 = load i32, ptr %3, align 4, !tbaa !9
  %115 = icmp eq i32 %114, 0
  br i1 %115, label %116, label %119

116:                                              ; preds = %113
  %117 = load ptr, ptr %2, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %117, i32 0, i32 3
  store volatile i32 1, ptr %118, align 8, !tbaa !11
  br label %119

119:                                              ; preds = %116, %113
  br label %120

120:                                              ; preds = %119, %1
  %121 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %121
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTC_MspInit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_EnterInitMode(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_ExitInitMode(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 40}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 36, !10, i64 40}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!14 = !{!12, !10, i64 36}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 36}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204}
!18 = !{!17, !10, i64 8}
!19 = !{!12, !10, i64 8}
!20 = !{!12, !10, i64 20}
!21 = !{!12, !10, i64 28}
!22 = !{!12, !10, i64 12}
!23 = !{!12, !10, i64 16}
!24 = !{!17, !10, i64 16}
!25 = !{!17, !10, i64 76}
!26 = !{!12, !10, i64 32}
!27 = !{!12, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RTC_Init(ptr noundef %0) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %52, label %2

2:                                                ; preds = %1
  %3 = getelementptr inbounds i8, ptr %0, i64 40
  %4 = load volatile i32, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %6, label %8

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 0, ptr %7, align 4, !tbaa !12
  tail call void @HAL_RTC_MspInit(ptr noundef nonnull %0)
  br label %8

8:                                                ; preds = %6, %2
  store volatile i32 2, ptr %3, align 8, !tbaa !5
  %9 = load ptr, ptr %0, align 8, !tbaa !13
  %10 = getelementptr inbounds i8, ptr %9, i64 36
  store volatile i32 202, ptr %10, align 4, !tbaa !14
  store volatile i32 83, ptr %10, align 4, !tbaa !14
  %11 = tail call i32 @RTC_EnterInitMode(ptr noundef nonnull %0)
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %.thread

13:                                               ; preds = %8
  %14 = load ptr, ptr %0, align 8, !tbaa !13
  %15 = getelementptr inbounds i8, ptr %14, i64 8
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = and i32 %16, -7340097
  store volatile i32 %17, ptr %15, align 4, !tbaa !16
  %18 = getelementptr inbounds i8, ptr %0, i64 8
  %19 = load i32, ptr %18, align 8, !tbaa !17
  %20 = getelementptr inbounds i8, ptr %0, i64 20
  %21 = load i32, ptr %20, align 4, !tbaa !18
  %22 = or i32 %21, %19
  %23 = getelementptr inbounds i8, ptr %0, i64 28
  %24 = load i32, ptr %23, align 4, !tbaa !19
  %25 = or i32 %22, %24
  %26 = load volatile i32, ptr %15, align 4, !tbaa !16
  %27 = or i32 %25, %26
  store volatile i32 %27, ptr %15, align 4, !tbaa !16
  %28 = getelementptr inbounds i8, ptr %0, i64 12
  %29 = load i32, ptr %28, align 4, !tbaa !20
  %30 = shl i32 %29, 16
  %31 = getelementptr inbounds i8, ptr %0, i64 16
  %32 = load i32, ptr %31, align 8, !tbaa !21
  %33 = or i32 %30, %32
  %34 = getelementptr inbounds i8, ptr %14, i64 16
  store volatile i32 %33, ptr %34, align 4, !tbaa !22
  %35 = tail call i32 @RTC_ExitInitMode(ptr noundef nonnull %0)
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %39, label %.thread

.thread:                                          ; preds = %13, %8
  %.0.ph = phi i32 [ %11, %8 ], [ %35, %13 ]
  %37 = load ptr, ptr %0, align 8, !tbaa !13
  %38 = getelementptr inbounds i8, ptr %37, i64 36
  store volatile i32 255, ptr %38, align 4, !tbaa !14
  br label %52

39:                                               ; preds = %13
  %40 = load ptr, ptr %0, align 8, !tbaa !13
  %41 = getelementptr inbounds i8, ptr %40, i64 76
  %42 = load volatile i32, ptr %41, align 4, !tbaa !23
  %43 = and i32 %42, -4
  store volatile i32 %43, ptr %41, align 4, !tbaa !23
  %44 = getelementptr inbounds i8, ptr %0, i64 32
  %45 = load i32, ptr %44, align 8, !tbaa !24
  %46 = getelementptr inbounds i8, ptr %0, i64 24
  %47 = load i32, ptr %46, align 8, !tbaa !25
  %48 = or i32 %47, %45
  %49 = load volatile i32, ptr %41, align 4, !tbaa !23
  %50 = or i32 %48, %49
  store volatile i32 %50, ptr %41, align 4, !tbaa !23
  %51 = getelementptr inbounds i8, ptr %40, i64 36
  store volatile i32 255, ptr %51, align 4, !tbaa !14
  store volatile i32 1, ptr %3, align 8, !tbaa !5
  br label %52

52:                                               ; preds = %.thread, %39, %1
  %.1 = phi i32 [ 0, %39 ], [ 1, %1 ], [ %.0.ph, %.thread ]
  ret i32 %.1
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTC_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_EnterInitMode(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_ExitInitMode(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 40}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 36}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 36}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204}
!16 = !{!15, !11, i64 8}
!17 = !{!6, !11, i64 8}
!18 = !{!6, !11, i64 20}
!19 = !{!6, !11, i64 28}
!20 = !{!6, !11, i64 12}
!21 = !{!6, !11, i64 16}
!22 = !{!15, !11, i64 16}
!23 = !{!15, !11, i64 76}
!24 = !{!6, !11, i64 32}
!25 = !{!6, !11, i64 24}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass