; LLVM IR from brpapa/algorithms :: solutions/spoj/MKJUMPS.ll (Z3dfsiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@board = external dso_local global [15 x [15 x i32]], align 16
@maxQtyVisited = external dso_local global i32, align 4
@__const._Z3dfsiii.dr = external hidden unnamed_addr constant [8 x i32], align 16
@__const._Z3dfsiii.dc = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca [8 x i32], align 16
  %8 = alloca [8 x i32], align 16
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @maxQtyVisited, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %13 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %13, ptr @maxQtyVisited, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %15
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [15 x i32], ptr %16, i64 0, i64 %18
  store i32 1, ptr %19, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %7) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %7, ptr align 16 @__const._Z3dfsiii.dr, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 32, ptr %8) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %8, ptr align 16 @__const._Z3dfsiii.dc, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %57, %3
  %21 = load i32, ptr %9, align 4, !tbaa !5
  %22 = icmp slt i32 %21, 8
  br i1 %22, label %24, label %23

23:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %60

24:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [8 x i32], ptr %7, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = add nsw i32 %25, %29
  store i32 %30, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [8 x i32], ptr %8, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %31, %35
  store i32 %36, ptr %11, align 4, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !5
  %38 = icmp sge i32 %37, 0
  br i1 %38, label %39, label %56

39:                                               ; preds = %24
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %41 = icmp sge i32 %40, 0
  br i1 %41, label %42, label %56

42:                                               ; preds = %39
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %44
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [15 x i32], ptr %45, i64 0, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %51, label %56

51:                                               ; preds = %42
  %52 = load i32, ptr %10, align 4, !tbaa !5
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  call void @_Z3dfsiii(i32 noundef %52, i32 noundef %53, i32 noundef %55)
  br label %56

56:                                               ; preds = %51, %42, %39, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %9, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %9, align 4, !tbaa !5
  br label %20, !llvm.loop !9

60:                                               ; preds = %23
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %62
  %64 = load i32, ptr %5, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [15 x i32], ptr %63, i64 0, i64 %65
  store i32 0, ptr %66, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 32, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 32, ptr %7) #4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@board = external dso_local local_unnamed_addr global [15 x [15 x i32]], align 16
@maxQtyVisited = external dso_local global i32, align 4
@__const._Z3dfsiii.dr = external hidden unnamed_addr constant [8 x i32], align 16
@__const._Z3dfsiii.dc = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  store i32 %2, ptr %4, align 4, !tbaa !5
  %5 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @maxQtyVisited, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %6 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %6, ptr @maxQtyVisited, align 4, !tbaa !5
  %7 = sext i32 %0 to i64
  %8 = sext i32 %1 to i64
  %9 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %7, i64 %8
  store i32 1, ptr %9, align 4, !tbaa !5
  %10 = load i32, ptr @__const._Z3dfsiii.dr, align 16, !tbaa !5
  %11 = add nsw i32 %10, %0
  %12 = load i32, ptr @__const._Z3dfsiii.dc, align 16, !tbaa !5
  %13 = add nsw i32 %12, %1
  %14 = icmp sgt i32 %11, -1
  %15 = icmp sgt i32 %13, -1
  %or.cond = select i1 %14, i1 %15, i1 false
  br i1 %or.cond, label %16, label %25

16:                                               ; preds = %3
  %17 = zext nneg i32 %11 to i64
  %18 = zext nneg i32 %13 to i64
  %19 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %17, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %16
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  call void @_Z3dfsiii(i32 noundef %11, i32 noundef %13, i32 noundef %24)
  br label %25

25:                                               ; preds = %22, %16, %3
  %26 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 4), align 4, !tbaa !5
  %27 = add nsw i32 %26, %0
  %28 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 4), align 4, !tbaa !5
  %29 = add nsw i32 %28, %1
  %30 = icmp sgt i32 %27, -1
  %31 = icmp sgt i32 %29, -1
  %or.cond.1 = select i1 %30, i1 %31, i1 false
  br i1 %or.cond.1, label %32, label %41

32:                                               ; preds = %25
  %33 = zext nneg i32 %27 to i64
  %34 = zext nneg i32 %29 to i64
  %35 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %33, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %41

38:                                               ; preds = %32
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  call void @_Z3dfsiii(i32 noundef %27, i32 noundef %29, i32 noundef %40)
  br label %41

41:                                               ; preds = %38, %32, %25
  %42 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 8), align 8, !tbaa !5
  %43 = add nsw i32 %42, %0
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 8), align 8, !tbaa !5
  %45 = add nsw i32 %44, %1
  %46 = icmp sgt i32 %43, -1
  %47 = icmp sgt i32 %45, -1
  %or.cond.2 = select i1 %46, i1 %47, i1 false
  br i1 %or.cond.2, label %48, label %57

48:                                               ; preds = %41
  %49 = zext nneg i32 %43 to i64
  %50 = zext nneg i32 %45 to i64
  %51 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %49, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %57

54:                                               ; preds = %48
  %55 = load i32, ptr %4, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  call void @_Z3dfsiii(i32 noundef %43, i32 noundef %45, i32 noundef %56)
  br label %57

57:                                               ; preds = %54, %48, %41
  %58 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 12), align 4, !tbaa !5
  %59 = add nsw i32 %58, %0
  %60 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 12), align 4, !tbaa !5
  %61 = add nsw i32 %60, %1
  %62 = icmp sgt i32 %59, -1
  %63 = icmp sgt i32 %61, -1
  %or.cond.3 = select i1 %62, i1 %63, i1 false
  br i1 %or.cond.3, label %64, label %73

64:                                               ; preds = %57
  %65 = zext nneg i32 %59 to i64
  %66 = zext nneg i32 %61 to i64
  %67 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %65, i64 %66
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = icmp eq i32 %68, 0
  br i1 %69, label %70, label %73

70:                                               ; preds = %64
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  call void @_Z3dfsiii(i32 noundef %59, i32 noundef %61, i32 noundef %72)
  br label %73

73:                                               ; preds = %70, %64, %57
  %74 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 16), align 16, !tbaa !5
  %75 = add nsw i32 %74, %0
  %76 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 16), align 16, !tbaa !5
  %77 = add nsw i32 %76, %1
  %78 = icmp sgt i32 %75, -1
  %79 = icmp sgt i32 %77, -1
  %or.cond.4 = select i1 %78, i1 %79, i1 false
  br i1 %or.cond.4, label %80, label %89

80:                                               ; preds = %73
  %81 = zext nneg i32 %75 to i64
  %82 = zext nneg i32 %77 to i64
  %83 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %81, i64 %82
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = icmp eq i32 %84, 0
  br i1 %85, label %86, label %89

86:                                               ; preds = %80
  %87 = load i32, ptr %4, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  call void @_Z3dfsiii(i32 noundef %75, i32 noundef %77, i32 noundef %88)
  br label %89

89:                                               ; preds = %86, %80, %73
  %90 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 20), align 4, !tbaa !5
  %91 = add nsw i32 %90, %0
  %92 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 20), align 4, !tbaa !5
  %93 = add nsw i32 %92, %1
  %94 = icmp sgt i32 %91, -1
  %95 = icmp sgt i32 %93, -1
  %or.cond.5 = select i1 %94, i1 %95, i1 false
  br i1 %or.cond.5, label %96, label %105

96:                                               ; preds = %89
  %97 = zext nneg i32 %91 to i64
  %98 = zext nneg i32 %93 to i64
  %99 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %97, i64 %98
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = icmp eq i32 %100, 0
  br i1 %101, label %102, label %105

102:                                              ; preds = %96
  %103 = load i32, ptr %4, align 4, !tbaa !5
  %104 = add nsw i32 %103, 1
  call void @_Z3dfsiii(i32 noundef %91, i32 noundef %93, i32 noundef %104)
  br label %105

105:                                              ; preds = %102, %96, %89
  %106 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 24), align 8, !tbaa !5
  %107 = add nsw i32 %106, %0
  %108 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 24), align 8, !tbaa !5
  %109 = add nsw i32 %108, %1
  %110 = icmp sgt i32 %107, -1
  %111 = icmp sgt i32 %109, -1
  %or.cond.6 = select i1 %110, i1 %111, i1 false
  br i1 %or.cond.6, label %112, label %121

112:                                              ; preds = %105
  %113 = zext nneg i32 %107 to i64
  %114 = zext nneg i32 %109 to i64
  %115 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %113, i64 %114
  %116 = load i32, ptr %115, align 4, !tbaa !5
  %117 = icmp eq i32 %116, 0
  br i1 %117, label %118, label %121

118:                                              ; preds = %112
  %119 = load i32, ptr %4, align 4, !tbaa !5
  %120 = add nsw i32 %119, 1
  call void @_Z3dfsiii(i32 noundef %107, i32 noundef %109, i32 noundef %120)
  br label %121

121:                                              ; preds = %118, %112, %105
  %122 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dr, i64 28), align 4, !tbaa !5
  %123 = add nsw i32 %122, %0
  %124 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsiii.dc, i64 28), align 4, !tbaa !5
  %125 = add nsw i32 %124, %1
  %126 = icmp sgt i32 %123, -1
  %127 = icmp sgt i32 %125, -1
  %or.cond.7 = select i1 %126, i1 %127, i1 false
  br i1 %or.cond.7, label %128, label %137

128:                                              ; preds = %121
  %129 = zext nneg i32 %123 to i64
  %130 = zext nneg i32 %125 to i64
  %131 = getelementptr inbounds [15 x [15 x i32]], ptr @board, i64 0, i64 %129, i64 %130
  %132 = load i32, ptr %131, align 4, !tbaa !5
  %133 = icmp eq i32 %132, 0
  br i1 %133, label %134, label %137

134:                                              ; preds = %128
  %135 = load i32, ptr %4, align 4, !tbaa !5
  %136 = add nsw i32 %135, 1
  call void @_Z3dfsiii(i32 noundef %123, i32 noundef %125, i32 noundef %136)
  br label %137

137:                                              ; preds = %134, %128, %121
  store i32 0, ptr %9, align 4, !tbaa !5
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass