; LLVM IR from Wilson-ZheLin/Introduction-to-Digital-Image-Processing :: 3. Affine Transformation and Smoothing/src/main.ll (Z8RotationP5Image)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Image = type { i32, i32, i32, ptr, [15 x [100 x i8]], i32 }

@.str.10 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z8RotationP5Image(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [9 x i8], align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 9, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = call noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef %22, ptr noundef @.str.10, i32 noundef 1)
  store ptr %23, ptr %6, align 8, !tbaa !5
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.Image, ptr %24, i32 0, i32 3
  %26 = load ptr, ptr %25, align 8, !tbaa !9
  store ptr %26, ptr %3, align 8, !tbaa !5
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.Image, ptr %27, i32 0, i32 3
  %29 = load ptr, ptr %28, align 8, !tbaa !9
  store ptr %29, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !12
  br label %30

30:                                               ; preds = %60, %1
  %31 = load i32, ptr %7, align 4, !tbaa !12
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.Image, ptr %32, i32 0, i32 1
  %34 = load i32, ptr %33, align 4, !tbaa !13
  %35 = icmp slt i32 %31, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %30
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %63

37:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !12
  br label %38

38:                                               ; preds = %56, %37
  %39 = load i32, ptr %9, align 4, !tbaa !12
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.Image, ptr %40, i32 0, i32 0
  %42 = load i32, ptr %41, align 8, !tbaa !14
  %43 = icmp slt i32 %39, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %38
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %59

45:                                               ; preds = %38
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.Image, ptr %47, i32 0, i32 0
  %49 = load i32, ptr %48, align 8, !tbaa !14
  %50 = load i32, ptr %7, align 4, !tbaa !12
  %51 = mul nsw i32 %49, %50
  %52 = load i32, ptr %9, align 4, !tbaa !12
  %53 = add nsw i32 %51, %52
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds i8, ptr %46, i64 %54
  store i8 0, ptr %55, align 1, !tbaa !15
  br label %56

56:                                               ; preds = %45
  %57 = load i32, ptr %9, align 4, !tbaa !12
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %9, align 4, !tbaa !12
  br label %38, !llvm.loop !16

59:                                               ; preds = %44
  br label %60

60:                                               ; preds = %59
  %61 = load i32, ptr %7, align 4, !tbaa !12
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %7, align 4, !tbaa !12
  br label %30, !llvm.loop !18

63:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !12
  br label %64

64:                                               ; preds = %123, %63
  %65 = load i32, ptr %10, align 4, !tbaa !12
  %66 = load ptr, ptr %2, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.Image, ptr %66, i32 0, i32 1
  %68 = load i32, ptr %67, align 4, !tbaa !13
  %69 = icmp slt i32 %65, %68
  br i1 %69, label %71, label %70

70:                                               ; preds = %64
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %126

71:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !12
  br label %72

72:                                               ; preds = %119, %71
  %73 = load i32, ptr %11, align 4, !tbaa !12
  %74 = load ptr, ptr %2, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.Image, ptr %74, i32 0, i32 0
  %76 = load i32, ptr %75, align 8, !tbaa !14
  %77 = icmp slt i32 %73, %76
  br i1 %77, label %79, label %78

78:                                               ; preds = %72
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %122

79:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %80 = load i32, ptr %10, align 4, !tbaa !12
  %81 = sitofp i32 %80 to double
  %82 = load i32, ptr %11, align 4, !tbaa !12
  %83 = sitofp i32 %82 to double
  %84 = fmul double %83, 7.070000e-01
  %85 = call double @llvm.fmuladd.f64(double %81, double 7.070000e-01, double %84)
  %86 = call double @llvm.round.f64(double %85)
  %87 = fptosi double %86 to i32
  store i32 %87, ptr %12, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %88 = load i32, ptr %10, align 4, !tbaa !12
  %89 = sitofp i32 %88 to double
  %90 = load i32, ptr %11, align 4, !tbaa !12
  %91 = sitofp i32 %90 to double
  %92 = fmul double %91, 7.070000e-01
  %93 = fneg double %92
  %94 = call double @llvm.fmuladd.f64(double %89, double 7.070000e-01, double %93)
  %95 = call double @llvm.round.f64(double %94)
  %96 = fptosi double %95 to i32
  store i32 %96, ptr %13, align 4, !tbaa !12
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = load ptr, ptr %2, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.Image, ptr %98, i32 0, i32 0
  %100 = load i32, ptr %99, align 8, !tbaa !14
  %101 = load i32, ptr %10, align 4, !tbaa !12
  %102 = mul nsw i32 %100, %101
  %103 = load i32, ptr %11, align 4, !tbaa !12
  %104 = add nsw i32 %102, %103
  %105 = sext i32 %104 to i64
  %106 = getelementptr inbounds i8, ptr %97, i64 %105
  %107 = load i8, ptr %106, align 1, !tbaa !15
  %108 = load ptr, ptr %4, align 8, !tbaa !5
  %109 = load ptr, ptr %6, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.Image, ptr %109, i32 0, i32 0
  %111 = load i32, ptr %110, align 8, !tbaa !14
  %112 = load i32, ptr %13, align 4, !tbaa !12
  %113 = add nsw i32 %112, 192
  %114 = mul nsw i32 %111, %113
  %115 = load i32, ptr %12, align 4, !tbaa !12
  %116 = add nsw i32 %114, %115
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds i8, ptr %108, i64 %117
  store i8 %107, ptr %118, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %119

119:                                              ; preds = %79
  %120 = load i32, ptr %11, align 4, !tbaa !12
  %121 = add nsw i32 %120, 1
  store i32 %121, ptr %11, align 4, !tbaa !12
  br label %72, !llvm.loop !19

122:                                              ; preds = %78
  br label %123

123:                                              ; preds = %122
  %124 = load i32, ptr %10, align 4, !tbaa !12
  %125 = add nsw i32 %124, 1
  store i32 %125, ptr %10, align 4, !tbaa !12
  br label %64, !llvm.loop !20

126:                                              ; preds = %70
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !12
  br label %127

127:                                              ; preds = %242, %126
  %128 = load i32, ptr %14, align 4, !tbaa !12
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.Image, ptr %129, i32 0, i32 1
  %131 = load i32, ptr %130, align 4, !tbaa !13
  %132 = icmp slt i32 %128, %131
  br i1 %132, label %134, label %133

133:                                              ; preds = %127
  store i32 14, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %245

134:                                              ; preds = %127
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !12
  br label %135

135:                                              ; preds = %238, %134
  %136 = load i32, ptr %15, align 4, !tbaa !12
  %137 = load ptr, ptr %6, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.Image, ptr %137, i32 0, i32 0
  %139 = load i32, ptr %138, align 8, !tbaa !14
  %140 = icmp slt i32 %136, %139
  br i1 %140, label %142, label %141

141:                                              ; preds = %135
  store i32 17, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %241

142:                                              ; preds = %135
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  store i32 -1, ptr %17, align 4, !tbaa !12
  br label %143

143:                                              ; preds = %176, %142
  %144 = load i32, ptr %17, align 4, !tbaa !12
  %145 = icmp sle i32 %144, 1
  br i1 %145, label %147, label %146

146:                                              ; preds = %143
  store i32 20, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %179

147:                                              ; preds = %143
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  store i32 -1, ptr %18, align 4, !tbaa !12
  br label %148

148:                                              ; preds = %172, %147
  %149 = load i32, ptr %18, align 4, !tbaa !12
  %150 = icmp sle i32 %149, 1
  br i1 %150, label %152, label %151

151:                                              ; preds = %148
  store i32 23, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %175

152:                                              ; preds = %148
  %153 = load ptr, ptr %4, align 8, !tbaa !5
  %154 = load ptr, ptr %6, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.Image, ptr %154, i32 0, i32 0
  %156 = load i32, ptr %155, align 8, !tbaa !14
  %157 = load i32, ptr %14, align 4, !tbaa !12
  %158 = load i32, ptr %17, align 4, !tbaa !12
  %159 = add nsw i32 %157, %158
  %160 = mul nsw i32 %156, %159
  %161 = load i32, ptr %15, align 4, !tbaa !12
  %162 = load i32, ptr %18, align 4, !tbaa !12
  %163 = add nsw i32 %161, %162
  %164 = add nsw i32 %160, %163
  %165 = sext i32 %164 to i64
  %166 = getelementptr inbounds i8, ptr %153, i64 %165
  %167 = load i8, ptr %166, align 1, !tbaa !15
  %168 = load i32, ptr %16, align 4, !tbaa !12
  %169 = add nsw i32 %168, 1
  store i32 %169, ptr %16, align 4, !tbaa !12
  %170 = sext i32 %168 to i64
  %171 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %170
  store i8 %167, ptr %171, align 1, !tbaa !15
  br label %172

172:                                              ; preds = %152
  %173 = load i32, ptr %18, align 4, !tbaa !12
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %18, align 4, !tbaa !12
  br label %148, !llvm.loop !21

175:                                              ; preds = %151
  br label %176

176:                                              ; preds = %175
  %177 = load i32, ptr %17, align 4, !tbaa !12
  %178 = add nsw i32 %177, 1
  store i32 %178, ptr %17, align 4, !tbaa !12
  br label %143, !llvm.loop !22

179:                                              ; preds = %146
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  store i32 1, ptr %19, align 4, !tbaa !12
  br label %180

180:                                              ; preds = %222, %179
  %181 = load i32, ptr %19, align 4, !tbaa !12
  %182 = icmp slt i32 %181, 9
  br i1 %182, label %184, label %183

183:                                              ; preds = %180
  store i32 26, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  br label %225

184:                                              ; preds = %180
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %185 = load i32, ptr %19, align 4, !tbaa !12
  %186 = sext i32 %185 to i64
  %187 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %186
  %188 = load i8, ptr %187, align 1, !tbaa !15
  %189 = zext i8 %188 to i32
  store i32 %189, ptr %20, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %190 = load i32, ptr %19, align 4, !tbaa !12
  store i32 %190, ptr %21, align 4, !tbaa !12
  br label %191

191:                                              ; preds = %205, %184
  %192 = load i32, ptr %21, align 4, !tbaa !12
  %193 = icmp sge i32 %192, 1
  br i1 %193, label %194, label %203

194:                                              ; preds = %191
  %195 = load i32, ptr %21, align 4, !tbaa !12
  %196 = sub nsw i32 %195, 1
  %197 = sext i32 %196 to i64
  %198 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %197
  %199 = load i8, ptr %198, align 1, !tbaa !15
  %200 = zext i8 %199 to i32
  %201 = load i32, ptr %20, align 4, !tbaa !12
  %202 = icmp sgt i32 %200, %201
  br label %203

203:                                              ; preds = %194, %191
  %204 = phi i1 [ false, %191 ], [ %202, %194 ]
  br i1 %204, label %205, label %216

205:                                              ; preds = %203
  %206 = load i32, ptr %21, align 4, !tbaa !12
  %207 = sub nsw i32 %206, 1
  %208 = sext i32 %207 to i64
  %209 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %208
  %210 = load i8, ptr %209, align 1, !tbaa !15
  %211 = load i32, ptr %21, align 4, !tbaa !12
  %212 = sext i32 %211 to i64
  %213 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %212
  store i8 %210, ptr %213, align 1, !tbaa !15
  %214 = load i32, ptr %21, align 4, !tbaa !12
  %215 = add nsw i32 %214, -1
  store i32 %215, ptr %21, align 4, !tbaa !12
  br label %191, !llvm.loop !23

216:                                              ; preds = %203
  %217 = load i32, ptr %20, align 4, !tbaa !12
  %218 = trunc i32 %217 to i8
  %219 = load i32, ptr %21, align 4, !tbaa !12
  %220 = sext i32 %219 to i64
  %221 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %220
  store i8 %218, ptr %221, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  br label %222

222:                                              ; preds = %216
  %223 = load i32, ptr %19, align 4, !tbaa !12
  %224 = add nsw i32 %223, 1
  store i32 %224, ptr %19, align 4, !tbaa !12
  br label %180, !llvm.loop !24

225:                                              ; preds = %183
  %226 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 4
  %227 = load i8, ptr %226, align 1, !tbaa !15
  %228 = load ptr, ptr %4, align 8, !tbaa !5
  %229 = load ptr, ptr %6, align 8, !tbaa !5
  %230 = getelementptr inbounds %struct.Image, ptr %229, i32 0, i32 0
  %231 = load i32, ptr %230, align 8, !tbaa !14
  %232 = load i32, ptr %14, align 4, !tbaa !12
  %233 = mul nsw i32 %231, %232
  %234 = load i32, ptr %15, align 4, !tbaa !12
  %235 = add nsw i32 %233, %234
  %236 = sext i32 %235 to i64
  %237 = getelementptr inbounds i8, ptr %228, i64 %236
  store i8 %227, ptr %237, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %238

238:                                              ; preds = %225
  %239 = load i32, ptr %15, align 4, !tbaa !12
  %240 = add nsw i32 %239, 1
  store i32 %240, ptr %15, align 4, !tbaa !12
  br label %135, !llvm.loop !25

241:                                              ; preds = %141
  br label %242

242:                                              ; preds = %241
  %243 = load i32, ptr %14, align 4, !tbaa !12
  %244 = add nsw i32 %243, 1
  store i32 %244, ptr %14, align 4, !tbaa !12
  br label %127, !llvm.loop !26

245:                                              ; preds = %133
  %246 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 9, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret ptr %246
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"_ZTS5Image", !11, i64 0, !11, i64 4, !11, i64 8, !6, i64 16, !7, i64 24, !11, i64 1524}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!10, !11, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = distinct !{!20, !17}
!21 = distinct !{!21, !17}
!22 = distinct !{!22, !17}
!23 = distinct !{!23, !17}
!24 = distinct !{!24, !17}
!25 = distinct !{!25, !17}
!26 = distinct !{!26, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z8RotationP5Image(ptr noundef %0) local_unnamed_addr #1 {
  %.sroa.0 = alloca i8, align 1
  %.sroa.18 = alloca i8, align 1
  %.sroa.42 = alloca i8, align 1
  %.sroa.63 = alloca i8, align 1
  %.sroa.82 = alloca i8, align 1
  %.sroa.98 = alloca i8, align 1
  %.sroa.111 = alloca i8, align 1
  %.sroa.121 = alloca i8, align 1
  %.sroa.128 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.128)
  %2 = tail call noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef %0, ptr noundef nonnull @.str.10, i32 noundef 1)
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %2, i64 16
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %2, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.preheader82.lr.ph, label %.preheader81

.preheader82.lr.ph:                               ; preds = %1
  %10 = load i32, ptr %2, align 8, !tbaa !12
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %.preheader82, label %.preheader81

.preheader82:                                     ; preds = %.preheader82.lr.ph, %._crit_edge
  %12 = phi i32 [ %21, %._crit_edge ], [ %8, %.preheader82.lr.ph ]
  %13 = phi i32 [ %22, %._crit_edge ], [ %10, %.preheader82.lr.ph ]
  %.06484 = phi i32 [ %23, %._crit_edge ], [ 0, %.preheader82.lr.ph ]
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %.lr.ph, label %._crit_edge

.preheader81:                                     ; preds = %._crit_edge, %.preheader82.lr.ph, %1
  %15 = phi i32 [ %8, %1 ], [ %8, %.preheader82.lr.ph ], [ %21, %._crit_edge ]
  %16 = getelementptr inbounds i8, ptr %0, i64 4
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %.preheader80.lr.ph, label %.preheader79

.preheader80.lr.ph:                               ; preds = %.preheader81
  %19 = load i32, ptr %0, align 8, !tbaa !12
  %20 = icmp sgt i32 %19, 0
  br i1 %20, label %.preheader80, label %.preheader79

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %.pre = load i32, ptr %7, align 4, !tbaa !11
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader82
  %21 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %12, %.preheader82 ]
  %22 = phi i32 [ %31, %._crit_edge.loopexit ], [ %13, %.preheader82 ]
  %23 = add nuw nsw i32 %.06484, 1
  %24 = icmp slt i32 %23, %21
  br i1 %24, label %.preheader82, label %.preheader81, !llvm.loop !13

.lr.ph:                                           ; preds = %.preheader82, %.lr.ph
  %25 = phi i32 [ %31, %.lr.ph ], [ %13, %.preheader82 ]
  %.07183 = phi i32 [ %30, %.lr.ph ], [ 0, %.preheader82 ]
  %26 = mul nsw i32 %25, %.06484
  %27 = add nsw i32 %26, %.07183
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds i8, ptr %6, i64 %28
  store i8 0, ptr %29, align 1, !tbaa !16
  %30 = add nuw nsw i32 %.07183, 1
  %31 = load i32, ptr %2, align 8, !tbaa !12
  %32 = icmp slt i32 %30, %31
  br i1 %32, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !17

.preheader80:                                     ; preds = %.preheader80.lr.ph, %._crit_edge87
  %33 = phi i32 [ %41, %._crit_edge87 ], [ %17, %.preheader80.lr.ph ]
  %34 = phi i32 [ %42, %._crit_edge87 ], [ %19, %.preheader80.lr.ph ]
  %.07388 = phi i32 [ %43, %._crit_edge87 ], [ 0, %.preheader80.lr.ph ]
  %35 = icmp sgt i32 %34, 0
  br i1 %35, label %.lr.ph86, label %._crit_edge87

.lr.ph86:                                         ; preds = %.preheader80
  %36 = uitofp nneg i32 %.07388 to double
  br label %45

.preheader79.loopexit:                            ; preds = %._crit_edge87
  %.pre120 = load i32, ptr %7, align 4, !tbaa !11
  br label %.preheader79

.preheader79:                                     ; preds = %.preheader80.lr.ph, %.preheader79.loopexit, %.preheader81
  %37 = phi i32 [ %.pre120, %.preheader79.loopexit ], [ %15, %.preheader81 ], [ %15, %.preheader80.lr.ph ]
  %38 = icmp sgt i32 %37, 0
  br i1 %38, label %.preheader78.lr.ph, label %._crit_edge98

.preheader78.lr.ph:                               ; preds = %.preheader79
  %39 = load i32, ptr %2, align 8, !tbaa !12
  %40 = icmp sgt i32 %39, 0
  br i1 %40, label %.preheader78, label %._crit_edge98

._crit_edge87.loopexit:                           ; preds = %45
  %.pre119 = load i32, ptr %16, align 4, !tbaa !11
  br label %._crit_edge87

._crit_edge87:                                    ; preds = %._crit_edge87.loopexit, %.preheader80
  %41 = phi i32 [ %.pre119, %._crit_edge87.loopexit ], [ %33, %.preheader80 ]
  %42 = phi i32 [ %68, %._crit_edge87.loopexit ], [ %34, %.preheader80 ]
  %43 = add nuw nsw i32 %.07388, 1
  %44 = icmp slt i32 %43, %41
  br i1 %44, label %.preheader80, label %.preheader79.loopexit, !llvm.loop !18

45:                                               ; preds = %.lr.ph86, %45
  %46 = phi i32 [ %34, %.lr.ph86 ], [ %68, %45 ]
  %.07285 = phi i32 [ 0, %.lr.ph86 ], [ %67, %45 ]
  %47 = uitofp nneg i32 %.07285 to double
  %48 = fmul double %47, 7.070000e-01
  %49 = tail call double @llvm.fmuladd.f64(double %36, double 7.070000e-01, double %48)
  %50 = tail call double @llvm.round.f64(double %49)
  %51 = fptosi double %50 to i32
  %52 = fneg double %48
  %53 = tail call double @llvm.fmuladd.f64(double %36, double 7.070000e-01, double %52)
  %54 = tail call double @llvm.round.f64(double %53)
  %55 = fptosi double %54 to i32
  %56 = mul nsw i32 %46, %.07388
  %57 = add nsw i32 %56, %.07285
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i8, ptr %4, i64 %58
  %60 = load i8, ptr %59, align 1, !tbaa !16
  %61 = load i32, ptr %2, align 8, !tbaa !12
  %62 = add nsw i32 %55, 192
  %63 = mul nsw i32 %61, %62
  %64 = add nsw i32 %63, %51
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds i8, ptr %6, i64 %65
  store i8 %60, ptr %66, align 1, !tbaa !16
  %67 = add nuw nsw i32 %.07285, 1
  %68 = load i32, ptr %0, align 8, !tbaa !12
  %69 = icmp slt i32 %67, %68
  br i1 %69, label %45, label %._crit_edge87.loopexit, !llvm.loop !19

.preheader78:                                     ; preds = %.preheader78.lr.ph, %._crit_edge96
  %70 = phi i32 [ %120, %._crit_edge96 ], [ %37, %.preheader78.lr.ph ]
  %71 = phi i32 [ %121, %._crit_edge96 ], [ %39, %.preheader78.lr.ph ]
  %indvars.iv = phi i64 [ %indvars.iv.next.pre-phi, %._crit_edge96 ], [ 0, %.preheader78.lr.ph ]
  %72 = icmp sgt i32 %71, 0
  br i1 %72, label %.preheader77.preheader, label %.preheader78.._crit_edge96_crit_edge

.preheader78.._crit_edge96_crit_edge:             ; preds = %.preheader78
  %.pre122 = add nuw nsw i64 %indvars.iv, 1
  br label %._crit_edge96

.preheader77.preheader:                           ; preds = %.preheader78
  %73 = trunc i64 %indvars.iv to i32
  %74 = add i32 %73, -1
  %75 = trunc i64 %indvars.iv to i32
  %76 = add nuw nsw i64 %indvars.iv, 1
  %77 = trunc i64 %76 to i32
  %78 = trunc nuw nsw i64 %indvars.iv to i32
  br label %.preheader77

._crit_edge98:                                    ; preds = %._crit_edge96, %.preheader78.lr.ph, %.preheader79
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.128)
  ret ptr %2

.preheader77:                                     ; preds = %.preheader77.preheader, %.critedge.7
  %79 = phi i32 [ %200, %.critedge.7 ], [ %71, %.preheader77.preheader ]
  %.06995 = phi i32 [ %199, %.critedge.7 ], [ 0, %.preheader77.preheader ]
  %80 = mul i32 %74, %79
  %81 = add i32 %80, %.06995
  %82 = add i32 %81, -1
  %83 = sext i32 %82 to i64
  %84 = getelementptr inbounds i8, ptr %6, i64 %83
  %85 = load i8, ptr %84, align 1, !tbaa !16
  store i8 %85, ptr %.sroa.0, align 1, !tbaa !16
  %86 = sext i32 %81 to i64
  %87 = getelementptr inbounds i8, ptr %6, i64 %86
  %88 = load i8, ptr %87, align 1, !tbaa !16
  store i8 %88, ptr %.sroa.18, align 1, !tbaa !16
  %89 = add i32 %81, 1
  %90 = sext i32 %89 to i64
  %91 = getelementptr inbounds i8, ptr %6, i64 %90
  %92 = load i8, ptr %91, align 1, !tbaa !16
  store i8 %92, ptr %.sroa.42, align 1, !tbaa !16
  %93 = mul i32 %79, %75
  %94 = add i32 %93, %.06995
  %95 = add i32 %94, -1
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds i8, ptr %6, i64 %96
  %98 = load i8, ptr %97, align 1, !tbaa !16
  store i8 %98, ptr %.sroa.63, align 1, !tbaa !16
  %99 = sext i32 %94 to i64
  %100 = getelementptr inbounds i8, ptr %6, i64 %99
  %101 = load i8, ptr %100, align 1, !tbaa !16
  store i8 %101, ptr %.sroa.82, align 1, !tbaa !16
  %102 = add i32 %94, 1
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds i8, ptr %6, i64 %103
  %105 = load i8, ptr %104, align 1, !tbaa !16
  store i8 %105, ptr %.sroa.98, align 1, !tbaa !16
  %106 = mul i32 %79, %77
  %107 = add i32 %106, %.06995
  %108 = add i32 %107, -1
  %109 = sext i32 %108 to i64
  %110 = getelementptr inbounds i8, ptr %6, i64 %109
  %111 = load i8, ptr %110, align 1, !tbaa !16
  store i8 %111, ptr %.sroa.111, align 1, !tbaa !16
  %112 = sext i32 %107 to i64
  %113 = getelementptr inbounds i8, ptr %6, i64 %112
  %114 = load i8, ptr %113, align 1, !tbaa !16
  store i8 %114, ptr %.sroa.121, align 1, !tbaa !16
  %115 = add i32 %107, 1
  %116 = sext i32 %115 to i64
  %117 = getelementptr inbounds i8, ptr %6, i64 %116
  %118 = load i8, ptr %117, align 1, !tbaa !16
  store i8 %118, ptr %.sroa.128, align 1, !tbaa !16
  %119 = icmp ugt i8 %85, %88
  br i1 %119, label %124, label %.critedge

._crit_edge96.loopexit:                           ; preds = %.critedge.7
  %.pre121 = load i32, ptr %7, align 4, !tbaa !11
  br label %._crit_edge96

._crit_edge96:                                    ; preds = %.preheader78.._crit_edge96_crit_edge, %._crit_edge96.loopexit
  %indvars.iv.next.pre-phi = phi i64 [ %.pre122, %.preheader78.._crit_edge96_crit_edge ], [ %76, %._crit_edge96.loopexit ]
  %120 = phi i32 [ %70, %.preheader78.._crit_edge96_crit_edge ], [ %.pre121, %._crit_edge96.loopexit ]
  %121 = phi i32 [ %71, %.preheader78.._crit_edge96_crit_edge ], [ %200, %._crit_edge96.loopexit ]
  %122 = sext i32 %120 to i64
  %123 = icmp slt i64 %indvars.iv.next.pre-phi, %122
  br i1 %123, label %.preheader78, label %._crit_edge98, !llvm.loop !20

124:                                              ; preds = %.preheader77
  store i8 %85, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge

.critedge:                                        ; preds = %124, %.preheader77
  %.0.lcssa.sroa.phi = phi ptr [ %.sroa.0, %124 ], [ %.sroa.18, %.preheader77 ]
  store i8 %88, ptr %.0.lcssa.sroa.phi, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.180 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %125 = icmp ugt i8 %.sroa.18.0..sroa.18.1.180, %92
  br i1 %125, label %126, label %.critedge.1

126:                                              ; preds = %.critedge
  store i8 %.sroa.18.0..sroa.18.1.180, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.174 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %127 = icmp ugt i8 %.sroa.0.0..sroa.0.0.174, %92
  br i1 %127, label %128, label %.critedge.1

128:                                              ; preds = %126
  store i8 %.sroa.0.0..sroa.0.0.174, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.1

.critedge.1:                                      ; preds = %128, %126, %.critedge
  %.0.lcssa.1.sroa.phi = phi ptr [ %.sroa.42, %.critedge ], [ %.sroa.18, %126 ], [ %.sroa.0, %128 ]
  store i8 %92, ptr %.0.lcssa.1.sroa.phi, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3.190 = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2.185 = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %129 = icmp ugt i8 %.sroa.42.0..sroa.42.2.185, %.sroa.63.0..sroa.63.3.190
  br i1 %129, label %130, label %.critedge.2

130:                                              ; preds = %.critedge.1
  store i8 %.sroa.42.0..sroa.42.2.185, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.179 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %131 = icmp ugt i8 %.sroa.18.0..sroa.18.1.179, %.sroa.63.0..sroa.63.3.190
  br i1 %131, label %132, label %.critedge.2

132:                                              ; preds = %130
  store i8 %.sroa.18.0..sroa.18.1.179, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.173 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %133 = icmp ugt i8 %.sroa.0.0..sroa.0.0.173, %.sroa.63.0..sroa.63.3.190
  br i1 %133, label %134, label %.critedge.2

134:                                              ; preds = %132
  store i8 %.sroa.0.0..sroa.0.0.173, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.2

.critedge.2:                                      ; preds = %134, %132, %130, %.critedge.1
  %.0.lcssa.2.sroa.phi = phi ptr [ %.sroa.63, %.critedge.1 ], [ %.sroa.42, %130 ], [ %.sroa.18, %132 ], [ %.sroa.0, %134 ]
  store i8 %.sroa.63.0..sroa.63.3.190, ptr %.0.lcssa.2.sroa.phi, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3.189 = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %135 = icmp ugt i8 %.sroa.63.0..sroa.63.3.189, %101
  br i1 %135, label %136, label %.critedge.3

136:                                              ; preds = %.critedge.2
  store i8 %.sroa.63.0..sroa.63.3.189, ptr %.sroa.82, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2.184 = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %137 = icmp ugt i8 %.sroa.42.0..sroa.42.2.184, %101
  br i1 %137, label %138, label %.critedge.3

138:                                              ; preds = %136
  store i8 %.sroa.42.0..sroa.42.2.184, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.178 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %139 = icmp ugt i8 %.sroa.18.0..sroa.18.1.178, %101
  br i1 %139, label %140, label %.critedge.3

140:                                              ; preds = %138
  store i8 %.sroa.18.0..sroa.18.1.178, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.172 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %141 = icmp ugt i8 %.sroa.0.0..sroa.0.0.172, %101
  br i1 %141, label %142, label %.critedge.3

142:                                              ; preds = %140
  store i8 %.sroa.0.0..sroa.0.0.172, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.3

.critedge.3:                                      ; preds = %142, %140, %138, %136, %.critedge.2
  %.0.lcssa.3.sroa.phi = phi ptr [ %.sroa.82, %.critedge.2 ], [ %.sroa.63, %136 ], [ %.sroa.42, %138 ], [ %.sroa.18, %140 ], [ %.sroa.0, %142 ]
  store i8 %101, ptr %.0.lcssa.3.sroa.phi, align 1, !tbaa !16
  %.sroa.98.0..sroa.98.5.197 = load i8, ptr %.sroa.98, align 1, !tbaa !16
  %.sroa.82.0..sroa.82.4.191 = load i8, ptr %.sroa.82, align 1, !tbaa !16
  %143 = icmp ugt i8 %.sroa.82.0..sroa.82.4.191, %.sroa.98.0..sroa.98.5.197
  br i1 %143, label %144, label %.critedge.4

144:                                              ; preds = %.critedge.3
  store i8 %.sroa.82.0..sroa.82.4.191, ptr %.sroa.98, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3.188 = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %145 = icmp ugt i8 %.sroa.63.0..sroa.63.3.188, %.sroa.98.0..sroa.98.5.197
  br i1 %145, label %146, label %.critedge.4

146:                                              ; preds = %144
  store i8 %.sroa.63.0..sroa.63.3.188, ptr %.sroa.82, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2.183 = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %147 = icmp ugt i8 %.sroa.42.0..sroa.42.2.183, %.sroa.98.0..sroa.98.5.197
  br i1 %147, label %148, label %.critedge.4

148:                                              ; preds = %146
  store i8 %.sroa.42.0..sroa.42.2.183, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.177 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %149 = icmp ugt i8 %.sroa.18.0..sroa.18.1.177, %.sroa.98.0..sroa.98.5.197
  br i1 %149, label %150, label %.critedge.4

150:                                              ; preds = %148
  store i8 %.sroa.18.0..sroa.18.1.177, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.171 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %151 = icmp ugt i8 %.sroa.0.0..sroa.0.0.171, %.sroa.98.0..sroa.98.5.197
  br i1 %151, label %152, label %.critedge.4

152:                                              ; preds = %150
  store i8 %.sroa.0.0..sroa.0.0.171, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.4

.critedge.4:                                      ; preds = %152, %150, %148, %146, %144, %.critedge.3
  %.0.lcssa.4.sroa.phi = phi ptr [ %.sroa.98, %.critedge.3 ], [ %.sroa.82, %144 ], [ %.sroa.63, %146 ], [ %.sroa.42, %148 ], [ %.sroa.18, %150 ], [ %.sroa.0, %152 ]
  store i8 %.sroa.98.0..sroa.98.5.197, ptr %.0.lcssa.4.sroa.phi, align 1, !tbaa !16
  %.sroa.111.0..sroa.111.6.199 = load i8, ptr %.sroa.111, align 1, !tbaa !16
  %.sroa.98.0..sroa.98.5.196 = load i8, ptr %.sroa.98, align 1, !tbaa !16
  %153 = icmp ugt i8 %.sroa.98.0..sroa.98.5.196, %.sroa.111.0..sroa.111.6.199
  br i1 %153, label %154, label %.critedge.5

154:                                              ; preds = %.critedge.4
  store i8 %.sroa.98.0..sroa.98.5.196, ptr %.sroa.111, align 1, !tbaa !16
  %.sroa.82.0..sroa.82.4.192 = load i8, ptr %.sroa.82, align 1, !tbaa !16
  %155 = icmp ugt i8 %.sroa.82.0..sroa.82.4.192, %.sroa.111.0..sroa.111.6.199
  br i1 %155, label %156, label %.critedge.5

156:                                              ; preds = %154
  store i8 %.sroa.82.0..sroa.82.4.192, ptr %.sroa.98, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3.187 = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %157 = icmp ugt i8 %.sroa.63.0..sroa.63.3.187, %.sroa.111.0..sroa.111.6.199
  br i1 %157, label %158, label %.critedge.5

158:                                              ; preds = %156
  store i8 %.sroa.63.0..sroa.63.3.187, ptr %.sroa.82, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2.182 = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %159 = icmp ugt i8 %.sroa.42.0..sroa.42.2.182, %.sroa.111.0..sroa.111.6.199
  br i1 %159, label %160, label %.critedge.5

160:                                              ; preds = %158
  store i8 %.sroa.42.0..sroa.42.2.182, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.176 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %161 = icmp ugt i8 %.sroa.18.0..sroa.18.1.176, %.sroa.111.0..sroa.111.6.199
  br i1 %161, label %162, label %.critedge.5

162:                                              ; preds = %160
  store i8 %.sroa.18.0..sroa.18.1.176, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.170 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %163 = icmp ugt i8 %.sroa.0.0..sroa.0.0.170, %.sroa.111.0..sroa.111.6.199
  br i1 %163, label %164, label %.critedge.5

164:                                              ; preds = %162
  store i8 %.sroa.0.0..sroa.0.0.170, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.5

.critedge.5:                                      ; preds = %164, %162, %160, %158, %156, %154, %.critedge.4
  %.0.lcssa.5.sroa.phi = phi ptr [ %.sroa.111, %.critedge.4 ], [ %.sroa.98, %154 ], [ %.sroa.82, %156 ], [ %.sroa.63, %158 ], [ %.sroa.42, %160 ], [ %.sroa.18, %162 ], [ %.sroa.0, %164 ]
  store i8 %.sroa.111.0..sroa.111.6.199, ptr %.0.lcssa.5.sroa.phi, align 1, !tbaa !16
  %.sroa.121.0..sroa.121.7.200 = load i8, ptr %.sroa.121, align 1, !tbaa !16
  %.sroa.111.0..sroa.111.6.198 = load i8, ptr %.sroa.111, align 1, !tbaa !16
  %165 = icmp ugt i8 %.sroa.111.0..sroa.111.6.198, %.sroa.121.0..sroa.121.7.200
  br i1 %165, label %166, label %.critedge.6

166:                                              ; preds = %.critedge.5
  store i8 %.sroa.111.0..sroa.111.6.198, ptr %.sroa.121, align 1, !tbaa !16
  %.sroa.98.0..sroa.98.5.195 = load i8, ptr %.sroa.98, align 1, !tbaa !16
  %167 = icmp ugt i8 %.sroa.98.0..sroa.98.5.195, %.sroa.121.0..sroa.121.7.200
  br i1 %167, label %168, label %.critedge.6

168:                                              ; preds = %166
  store i8 %.sroa.98.0..sroa.98.5.195, ptr %.sroa.111, align 1, !tbaa !16
  %.sroa.82.0..sroa.82.4.193 = load i8, ptr %.sroa.82, align 1, !tbaa !16
  %169 = icmp ugt i8 %.sroa.82.0..sroa.82.4.193, %.sroa.121.0..sroa.121.7.200
  br i1 %169, label %170, label %.critedge.6

170:                                              ; preds = %168
  store i8 %.sroa.82.0..sroa.82.4.193, ptr %.sroa.98, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3.186 = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %171 = icmp ugt i8 %.sroa.63.0..sroa.63.3.186, %.sroa.121.0..sroa.121.7.200
  br i1 %171, label %172, label %.critedge.6

172:                                              ; preds = %170
  store i8 %.sroa.63.0..sroa.63.3.186, ptr %.sroa.82, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2.181 = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %173 = icmp ugt i8 %.sroa.42.0..sroa.42.2.181, %.sroa.121.0..sroa.121.7.200
  br i1 %173, label %174, label %.critedge.6

174:                                              ; preds = %172
  store i8 %.sroa.42.0..sroa.42.2.181, ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1.175 = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %175 = icmp ugt i8 %.sroa.18.0..sroa.18.1.175, %.sroa.121.0..sroa.121.7.200
  br i1 %175, label %176, label %.critedge.6

176:                                              ; preds = %174
  store i8 %.sroa.18.0..sroa.18.1.175, ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0.169 = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %177 = icmp ugt i8 %.sroa.0.0..sroa.0.0.169, %.sroa.121.0..sroa.121.7.200
  br i1 %177, label %178, label %.critedge.6

178:                                              ; preds = %176
  store i8 %.sroa.0.0..sroa.0.0.169, ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.6

.critedge.6:                                      ; preds = %178, %176, %174, %172, %170, %168, %166, %.critedge.5
  %.0.lcssa.6.sroa.phi = phi ptr [ %.sroa.121, %.critedge.5 ], [ %.sroa.111, %166 ], [ %.sroa.98, %168 ], [ %.sroa.82, %170 ], [ %.sroa.63, %172 ], [ %.sroa.42, %174 ], [ %.sroa.18, %176 ], [ %.sroa.0, %178 ]
  store i8 %.sroa.121.0..sroa.121.7.200, ptr %.0.lcssa.6.sroa.phi, align 1, !tbaa !16
  %.sroa.121.0..sroa.121.7. = load i8, ptr %.sroa.121, align 1, !tbaa !16
  %179 = icmp ugt i8 %.sroa.121.0..sroa.121.7., %118
  br i1 %179, label %180, label %.critedge.7

180:                                              ; preds = %.critedge.6
  store i8 %.sroa.121.0..sroa.121.7., ptr %.sroa.128, align 1, !tbaa !16
  %.sroa.111.0..sroa.111.6. = load i8, ptr %.sroa.111, align 1, !tbaa !16
  %181 = icmp ugt i8 %.sroa.111.0..sroa.111.6., %118
  br i1 %181, label %182, label %.critedge.7

182:                                              ; preds = %180
  store i8 %.sroa.111.0..sroa.111.6., ptr %.sroa.121, align 1, !tbaa !16
  %.sroa.98.0..sroa.98.5. = load i8, ptr %.sroa.98, align 1, !tbaa !16
  %183 = icmp ugt i8 %.sroa.98.0..sroa.98.5., %118
  br i1 %183, label %184, label %.critedge.7

184:                                              ; preds = %182
  store i8 %.sroa.98.0..sroa.98.5., ptr %.sroa.111, align 1, !tbaa !16
  %.sroa.82.0..sroa.82.4.194 = load i8, ptr %.sroa.82, align 1, !tbaa !16
  %185 = icmp ugt i8 %.sroa.82.0..sroa.82.4.194, %118
  br i1 %185, label %186, label %.critedge.7

186:                                              ; preds = %184
  store i8 %.sroa.82.0..sroa.82.4.194, ptr %.sroa.98, align 1, !tbaa !16
  %.sroa.63.0..sroa.63.3. = load i8, ptr %.sroa.63, align 1, !tbaa !16
  %187 = icmp ugt i8 %.sroa.63.0..sroa.63.3., %118
  br i1 %187, label %188, label %.critedge.7

188:                                              ; preds = %186
  store i8 %.sroa.63.0..sroa.63.3., ptr %.sroa.82, align 1, !tbaa !16
  %.sroa.42.0..sroa.42.2. = load i8, ptr %.sroa.42, align 1, !tbaa !16
  %189 = icmp ugt i8 %.sroa.42.0..sroa.42.2., %118
  br i1 %189, label %190, label %.critedge.7

190:                                              ; preds = %188
  store i8 %.sroa.42.0..sroa.42.2., ptr %.sroa.63, align 1, !tbaa !16
  %.sroa.18.0..sroa.18.1. = load i8, ptr %.sroa.18, align 1, !tbaa !16
  %191 = icmp ugt i8 %.sroa.18.0..sroa.18.1., %118
  br i1 %191, label %192, label %.critedge.7

192:                                              ; preds = %190
  store i8 %.sroa.18.0..sroa.18.1., ptr %.sroa.42, align 1, !tbaa !16
  %.sroa.0.0..sroa.0.0. = load i8, ptr %.sroa.0, align 1, !tbaa !16
  %193 = icmp ugt i8 %.sroa.0.0..sroa.0.0., %118
  br i1 %193, label %194, label %.critedge.7

194:                                              ; preds = %192
  store i8 %.sroa.0.0..sroa.0.0., ptr %.sroa.18, align 1, !tbaa !16
  br label %.critedge.7

.critedge.7:                                      ; preds = %194, %192, %190, %188, %186, %184, %182, %180, %.critedge.6
  %.0.lcssa.7.sroa.phi = phi ptr [ %.sroa.128, %.critedge.6 ], [ %.sroa.121, %180 ], [ %.sroa.111, %182 ], [ %.sroa.98, %184 ], [ %.sroa.82, %186 ], [ %.sroa.63, %188 ], [ %.sroa.42, %190 ], [ %.sroa.18, %192 ], [ %.sroa.0, %194 ]
  store i8 %118, ptr %.0.lcssa.7.sroa.phi, align 1, !tbaa !16
  %.sroa.82.0..sroa.82.4. = load i8, ptr %.sroa.82, align 1, !tbaa !16
  %195 = mul nsw i32 %79, %78
  %196 = add nsw i32 %195, %.06995
  %197 = sext i32 %196 to i64
  %198 = getelementptr inbounds i8, ptr %6, i64 %197
  store i8 %.sroa.82.0..sroa.82.4., ptr %198, align 1, !tbaa !16
  %199 = add nuw nsw i32 %.06995, 1
  %200 = load i32, ptr %2, align 8, !tbaa !12
  %201 = icmp slt i32 %199, %200
  br i1 %201, label %.preheader77, label %._crit_edge96.loopexit, !llvm.loop !21
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS5Image", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !8, i64 24, !7, i64 1524}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = distinct !{!13, !14, !15}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!"llvm.loop.unswitch.partial.disable"}
!16 = !{!8, !8, i64 0}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14, !15}
!19 = distinct !{!19, !14}
!20 = distinct !{!20, !14, !15}
!21 = distinct !{!21, !14}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass