; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_adc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ADC_HandleTypeDef = type { ptr, %struct.ADC_InitTypeDef, ptr, i32, i32, i32, %struct.ADC_InjectionConfigTypeDef }
%struct.ADC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.ADC_OversamplingTypeDef }
%struct.ADC_OversamplingTypeDef = type { i32, i32, i32, i32 }
%struct.ADC_InjectionConfigTypeDef = type { i32, i32 }
%struct.ADC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.ADC_Common_TypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsEnabled(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADC_DeInit(ptr noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %311

9:                                                ; preds = %1
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %10, i32 0, i32 4
  %12 = load volatile i32, ptr %11, align 4, !tbaa !9
  %13 = zext i32 %12 to i64
  %14 = or i64 %13, 2
  %15 = trunc i64 %14 to i32
  store volatile i32 %15, ptr %11, align 4, !tbaa !9
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = call i32 @ADC_ConversionStop(ptr noundef %16, i32 noundef 3)
  store i32 %17, ptr %4, align 4, !tbaa !15
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %18, i32 0, i32 0
  %20 = load ptr, ptr %19, align 8, !tbaa !16
  %21 = getelementptr inbounds %struct.ADC_TypeDef, ptr %20, i32 0, i32 3
  %22 = load volatile i32, ptr %21, align 4, !tbaa !17
  %23 = zext i32 %22 to i64
  %24 = or i64 %23, 2097152
  %25 = trunc i64 %24 to i32
  store volatile i32 %25, ptr %21, align 4, !tbaa !17
  %26 = load i32, ptr %4, align 4, !tbaa !15
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %37

28:                                               ; preds = %9
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = call i32 @ADC_Disable(ptr noundef %29)
  store i32 %30, ptr %4, align 4, !tbaa !15
  %31 = load i32, ptr %4, align 4, !tbaa !15
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %28
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %34, i32 0, i32 4
  store volatile i32 1, ptr %35, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %33, %28
  br label %37

37:                                               ; preds = %36, %9
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !16
  %41 = getelementptr inbounds %struct.ADC_TypeDef, ptr %40, i32 0, i32 1
  %42 = load volatile i32, ptr %41, align 4, !tbaa !19
  %43 = zext i32 %42 to i64
  %44 = and i64 %43, -2048
  %45 = trunc i64 %44 to i32
  store volatile i32 %45, ptr %41, align 4, !tbaa !19
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %46, i32 0, i32 0
  %48 = load ptr, ptr %47, align 8, !tbaa !16
  %49 = getelementptr inbounds %struct.ADC_TypeDef, ptr %48, i32 0, i32 0
  store volatile i32 2047, ptr %49, align 4, !tbaa !20
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !16
  %53 = getelementptr inbounds %struct.ADC_TypeDef, ptr %52, i32 0, i32 2
  %54 = load volatile i32, ptr %53, align 4, !tbaa !21
  %55 = zext i32 %54 to i64
  %56 = and i64 %55, -1342177281
  %57 = trunc i64 %56 to i32
  store volatile i32 %57, ptr %53, align 4, !tbaa !21
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %58, i32 0, i32 0
  %60 = load ptr, ptr %59, align 8, !tbaa !16
  %61 = getelementptr inbounds %struct.ADC_TypeDef, ptr %60, i32 0, i32 2
  %62 = load volatile i32, ptr %61, align 4, !tbaa !21
  %63 = zext i32 %62 to i64
  %64 = or i64 %63, 536870912
  %65 = trunc i64 %64 to i32
  store volatile i32 %65, ptr %61, align 4, !tbaa !21
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %66, i32 0, i32 0
  %68 = load ptr, ptr %67, align 8, !tbaa !16
  %69 = getelementptr inbounds %struct.ADC_TypeDef, ptr %68, i32 0, i32 3
  %70 = load volatile i32, ptr %69, align 4, !tbaa !17
  %71 = zext i32 %70 to i64
  %72 = and i64 %71, -2147450880
  %73 = trunc i64 %72 to i32
  store volatile i32 %73, ptr %69, align 4, !tbaa !17
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %74, i32 0, i32 0
  %76 = load ptr, ptr %75, align 8, !tbaa !16
  %77 = getelementptr inbounds %struct.ADC_TypeDef, ptr %76, i32 0, i32 3
  %78 = load volatile i32, ptr %77, align 4, !tbaa !17
  %79 = zext i32 %78 to i64
  %80 = or i64 %79, 2147483648
  %81 = trunc i64 %80 to i32
  store volatile i32 %81, ptr %77, align 4, !tbaa !17
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %82, i32 0, i32 0
  %84 = load ptr, ptr %83, align 8, !tbaa !16
  %85 = getelementptr inbounds %struct.ADC_TypeDef, ptr %84, i32 0, i32 4
  %86 = load volatile i32, ptr %85, align 4, !tbaa !22
  %87 = zext i32 %86 to i64
  %88 = and i64 %87, -67045348
  %89 = trunc i64 %88 to i32
  store volatile i32 %89, ptr %85, align 4, !tbaa !22
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %90, i32 0, i32 0
  %92 = load ptr, ptr %91, align 8, !tbaa !16
  %93 = getelementptr inbounds %struct.ADC_TypeDef, ptr %92, i32 0, i32 5
  %94 = load volatile i32, ptr %93, align 4, !tbaa !23
  %95 = zext i32 %94 to i64
  %96 = and i64 %95, -1073741824
  %97 = trunc i64 %96 to i32
  store volatile i32 %97, ptr %93, align 4, !tbaa !23
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %98, i32 0, i32 0
  %100 = load ptr, ptr %99, align 8, !tbaa !16
  %101 = getelementptr inbounds %struct.ADC_TypeDef, ptr %100, i32 0, i32 6
  %102 = load volatile i32, ptr %101, align 4, !tbaa !24
  %103 = zext i32 %102 to i64
  %104 = and i64 %103, -134217728
  %105 = trunc i64 %104 to i32
  store volatile i32 %105, ptr %101, align 4, !tbaa !24
  %106 = load ptr, ptr %3, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %106, i32 0, i32 0
  %108 = load ptr, ptr %107, align 8, !tbaa !16
  %109 = getelementptr inbounds %struct.ADC_TypeDef, ptr %108, i32 0, i32 8
  %110 = load volatile i32, ptr %109, align 4, !tbaa !25
  %111 = zext i32 %110 to i64
  %112 = and i64 %111, -67108864
  %113 = trunc i64 %112 to i32
  store volatile i32 %113, ptr %109, align 4, !tbaa !25
  %114 = load ptr, ptr %3, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %114, i32 0, i32 0
  %116 = load ptr, ptr %115, align 8, !tbaa !16
  %117 = getelementptr inbounds %struct.ADC_TypeDef, ptr %116, i32 0, i32 9
  %118 = load volatile i32, ptr %117, align 4, !tbaa !26
  %119 = zext i32 %118 to i64
  %120 = and i64 %119, -67108864
  %121 = trunc i64 %120 to i32
  store volatile i32 %121, ptr %117, align 4, !tbaa !26
  %122 = load ptr, ptr %3, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %122, i32 0, i32 0
  %124 = load ptr, ptr %123, align 8, !tbaa !16
  %125 = getelementptr inbounds %struct.ADC_TypeDef, ptr %124, i32 0, i32 35
  %126 = load volatile i32, ptr %125, align 4, !tbaa !27
  %127 = zext i32 %126 to i64
  %128 = and i64 %127, -67108864
  %129 = trunc i64 %128 to i32
  store volatile i32 %129, ptr %125, align 4, !tbaa !27
  %130 = load ptr, ptr %3, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !16
  %133 = getelementptr inbounds %struct.ADC_TypeDef, ptr %132, i32 0, i32 36
  %134 = load volatile i32, ptr %133, align 4, !tbaa !28
  %135 = zext i32 %134 to i64
  %136 = and i64 %135, -67108864
  %137 = trunc i64 %136 to i32
  store volatile i32 %137, ptr %133, align 4, !tbaa !28
  %138 = load ptr, ptr %3, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %138, i32 0, i32 0
  %140 = load ptr, ptr %139, align 8, !tbaa !16
  %141 = getelementptr inbounds %struct.ADC_TypeDef, ptr %140, i32 0, i32 37
  %142 = load volatile i32, ptr %141, align 4, !tbaa !29
  %143 = zext i32 %142 to i64
  %144 = and i64 %143, -67108864
  %145 = trunc i64 %144 to i32
  store volatile i32 %145, ptr %141, align 4, !tbaa !29
  %146 = load ptr, ptr %3, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %146, i32 0, i32 0
  %148 = load ptr, ptr %147, align 8, !tbaa !16
  %149 = getelementptr inbounds %struct.ADC_TypeDef, ptr %148, i32 0, i32 38
  %150 = load volatile i32, ptr %149, align 4, !tbaa !30
  %151 = zext i32 %150 to i64
  %152 = and i64 %151, -67108864
  %153 = trunc i64 %152 to i32
  store volatile i32 %153, ptr %149, align 4, !tbaa !30
  %154 = load ptr, ptr %3, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %154, i32 0, i32 0
  %156 = load ptr, ptr %155, align 8, !tbaa !16
  %157 = getelementptr inbounds %struct.ADC_TypeDef, ptr %156, i32 0, i32 12
  %158 = load volatile i32, ptr %157, align 4, !tbaa !31
  %159 = zext i32 %158 to i64
  %160 = and i64 %159, -528349136
  %161 = trunc i64 %160 to i32
  store volatile i32 %161, ptr %157, align 4, !tbaa !31
  %162 = load ptr, ptr %3, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %162, i32 0, i32 0
  %164 = load ptr, ptr %163, align 8, !tbaa !16
  %165 = getelementptr inbounds %struct.ADC_TypeDef, ptr %164, i32 0, i32 13
  %166 = load volatile i32, ptr %165, align 4, !tbaa !32
  %167 = zext i32 %166 to i64
  %168 = and i64 %167, -528349152
  %169 = trunc i64 %168 to i32
  store volatile i32 %169, ptr %165, align 4, !tbaa !32
  %170 = load ptr, ptr %3, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %170, i32 0, i32 0
  %172 = load ptr, ptr %171, align 8, !tbaa !16
  %173 = getelementptr inbounds %struct.ADC_TypeDef, ptr %172, i32 0, i32 14
  %174 = load volatile i32, ptr %173, align 4, !tbaa !33
  %175 = zext i32 %174 to i64
  %176 = and i64 %175, -528349152
  %177 = trunc i64 %176 to i32
  store volatile i32 %177, ptr %173, align 4, !tbaa !33
  %178 = load ptr, ptr %3, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %178, i32 0, i32 0
  %180 = load ptr, ptr %179, align 8, !tbaa !16
  %181 = getelementptr inbounds %struct.ADC_TypeDef, ptr %180, i32 0, i32 15
  %182 = load volatile i32, ptr %181, align 4, !tbaa !34
  %183 = zext i32 %182 to i64
  %184 = and i64 %183, -2016
  %185 = trunc i64 %184 to i32
  store volatile i32 %185, ptr %181, align 4, !tbaa !34
  %186 = load ptr, ptr %3, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %186, i32 0, i32 0
  %188 = load ptr, ptr %187, align 8, !tbaa !16
  %189 = getelementptr inbounds %struct.ADC_TypeDef, ptr %188, i32 0, i32 21
  %190 = load volatile i32, ptr %189, align 4, !tbaa !35
  %191 = zext i32 %190 to i64
  %192 = and i64 %191, -4294967296
  %193 = trunc i64 %192 to i32
  store volatile i32 %193, ptr %189, align 4, !tbaa !35
  %194 = load ptr, ptr %3, align 8, !tbaa !5
  %195 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %194, i32 0, i32 0
  %196 = load ptr, ptr %195, align 8, !tbaa !16
  %197 = getelementptr inbounds %struct.ADC_TypeDef, ptr %196, i32 0, i32 22
  %198 = load volatile i32, ptr %197, align 4, !tbaa !36
  %199 = zext i32 %198 to i64
  %200 = and i64 %199, -4294967296
  %201 = trunc i64 %200 to i32
  store volatile i32 %201, ptr %197, align 4, !tbaa !36
  %202 = load ptr, ptr %3, align 8, !tbaa !5
  %203 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %202, i32 0, i32 0
  %204 = load ptr, ptr %203, align 8, !tbaa !16
  %205 = getelementptr inbounds %struct.ADC_TypeDef, ptr %204, i32 0, i32 23
  %206 = load volatile i32, ptr %205, align 4, !tbaa !37
  %207 = zext i32 %206 to i64
  %208 = and i64 %207, -4294967296
  %209 = trunc i64 %208 to i32
  store volatile i32 %209, ptr %205, align 4, !tbaa !37
  %210 = load ptr, ptr %3, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %210, i32 0, i32 0
  %212 = load ptr, ptr %211, align 8, !tbaa !16
  %213 = getelementptr inbounds %struct.ADC_TypeDef, ptr %212, i32 0, i32 24
  %214 = load volatile i32, ptr %213, align 4, !tbaa !38
  %215 = zext i32 %214 to i64
  %216 = and i64 %215, -4294967296
  %217 = trunc i64 %216 to i32
  store volatile i32 %217, ptr %213, align 4, !tbaa !38
  %218 = load ptr, ptr %3, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %218, i32 0, i32 0
  %220 = load ptr, ptr %219, align 8, !tbaa !16
  %221 = getelementptr inbounds %struct.ADC_TypeDef, ptr %220, i32 0, i32 31
  %222 = load volatile i32, ptr %221, align 4, !tbaa !39
  %223 = zext i32 %222 to i64
  %224 = and i64 %223, -1048576
  %225 = trunc i64 %224 to i32
  store volatile i32 %225, ptr %221, align 4, !tbaa !39
  %226 = load ptr, ptr %3, align 8, !tbaa !5
  %227 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %226, i32 0, i32 0
  %228 = load ptr, ptr %227, align 8, !tbaa !16
  %229 = getelementptr inbounds %struct.ADC_TypeDef, ptr %228, i32 0, i32 32
  %230 = load volatile i32, ptr %229, align 4, !tbaa !40
  %231 = zext i32 %230 to i64
  %232 = and i64 %231, -1048576
  %233 = trunc i64 %232 to i32
  store volatile i32 %233, ptr %229, align 4, !tbaa !40
  %234 = load ptr, ptr %3, align 8, !tbaa !5
  %235 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %234, i32 0, i32 0
  %236 = load ptr, ptr %235, align 8, !tbaa !16
  %237 = getelementptr inbounds %struct.ADC_TypeDef, ptr %236, i32 0, i32 39
  %238 = load volatile i32, ptr %237, align 4, !tbaa !41
  %239 = zext i32 %238 to i64
  %240 = and i64 %239, -1048576
  %241 = trunc i64 %240 to i32
  store volatile i32 %241, ptr %237, align 4, !tbaa !41
  %242 = load ptr, ptr %3, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %242, i32 0, i32 0
  %244 = load ptr, ptr %243, align 8, !tbaa !16
  %245 = getelementptr inbounds %struct.ADC_TypeDef, ptr %244, i32 0, i32 40
  %246 = load volatile i32, ptr %245, align 4, !tbaa !42
  %247 = zext i32 %246 to i64
  %248 = and i64 %247, -134154240
  %249 = trunc i64 %248 to i32
  store volatile i32 %249, ptr %245, align 4, !tbaa !42
  %250 = load ptr, ptr %3, align 8, !tbaa !5
  %251 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %250, i32 0, i32 0
  %252 = load ptr, ptr %251, align 8, !tbaa !16
  %253 = icmp eq ptr %252, inttoptr (i64 1073881088 to ptr)
  br i1 %253, label %259, label %254

254:                                              ; preds = %37
  %255 = load ptr, ptr %3, align 8, !tbaa !5
  %256 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %255, i32 0, i32 0
  %257 = load ptr, ptr %256, align 8, !tbaa !16
  %258 = icmp eq ptr %257, inttoptr (i64 1073881344 to ptr)
  br label %259

259:                                              ; preds = %254, %37
  %260 = phi i1 [ true, %37 ], [ %258, %254 ]
  %261 = zext i1 %260 to i64
  %262 = select i1 %260, ptr inttoptr (i64 1073881856 to ptr), ptr inttoptr (i64 1476551424 to ptr)
  %263 = icmp eq ptr %262, inttoptr (i64 1073881856 to ptr)
  br i1 %263, label %264, label %268

264:                                              ; preds = %259
  %265 = call i32 @LL_ADC_IsEnabled(ptr noundef inttoptr (i64 1073881088 to ptr))
  %266 = call i32 @LL_ADC_IsEnabled(ptr noundef inttoptr (i64 1073881344 to ptr))
  %267 = or i32 %265, %266
  br label %270

268:                                              ; preds = %259
  %269 = call i32 @LL_ADC_IsEnabled(ptr noundef inttoptr (i64 1476550656 to ptr))
  br label %270

270:                                              ; preds = %268, %264
  %271 = phi i32 [ %267, %264 ], [ %269, %268 ]
  %272 = zext i32 %271 to i64
  %273 = icmp eq i64 %272, 0
  br i1 %273, label %274, label %294

274:                                              ; preds = %270
  %275 = load ptr, ptr %3, align 8, !tbaa !5
  %276 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %275, i32 0, i32 0
  %277 = load ptr, ptr %276, align 8, !tbaa !16
  %278 = icmp eq ptr %277, inttoptr (i64 1073881088 to ptr)
  br i1 %278, label %284, label %279

279:                                              ; preds = %274
  %280 = load ptr, ptr %3, align 8, !tbaa !5
  %281 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %280, i32 0, i32 0
  %282 = load ptr, ptr %281, align 8, !tbaa !16
  %283 = icmp eq ptr %282, inttoptr (i64 1073881344 to ptr)
  br label %284

284:                                              ; preds = %279, %274
  %285 = phi i1 [ true, %274 ], [ %283, %279 ]
  %286 = zext i1 %285 to i64
  %287 = select i1 %285, ptr inttoptr (i64 1073881856 to ptr), ptr inttoptr (i64 1476551424 to ptr)
  %288 = getelementptr inbounds %struct.ADC_Common_TypeDef, ptr %287, i32 0, i32 2
  %289 = load volatile i32, ptr %288, align 4, !tbaa !43
  %290 = zext i32 %289 to i64
  %291 = and i64 %290, -33541920
  %292 = trunc i64 %291 to i32
  store volatile i32 %292, ptr %288, align 4, !tbaa !43
  %293 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_ADC_MspDeInit(ptr noundef %293)
  br label %294

294:                                              ; preds = %284, %270
  %295 = load ptr, ptr %3, align 8, !tbaa !5
  %296 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %295, i32 0, i32 5
  store volatile i32 0, ptr %296, align 8, !tbaa !45
  %297 = load ptr, ptr %3, align 8, !tbaa !5
  %298 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %297, i32 0, i32 6
  %299 = getelementptr inbounds %struct.ADC_InjectionConfigTypeDef, ptr %298, i32 0, i32 0
  store i32 0, ptr %299, align 4, !tbaa !46
  %300 = load ptr, ptr %3, align 8, !tbaa !5
  %301 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %300, i32 0, i32 6
  %302 = getelementptr inbounds %struct.ADC_InjectionConfigTypeDef, ptr %301, i32 0, i32 1
  store i32 0, ptr %302, align 4, !tbaa !47
  %303 = load ptr, ptr %3, align 8, !tbaa !5
  %304 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %303, i32 0, i32 4
  store volatile i32 0, ptr %304, align 4, !tbaa !9
  br label %305

305:                                              ; preds = %294
  %306 = load ptr, ptr %3, align 8, !tbaa !5
  %307 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %306, i32 0, i32 3
  store i32 0, ptr %307, align 8, !tbaa !48
  br label %308

308:                                              ; preds = %305
  br label %309

309:                                              ; preds = %308
  %310 = load i32, ptr %4, align 4, !tbaa !15
  store i32 %310, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %311

311:                                              ; preds = %309, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %312 = load i32, ptr %2, align 4
  ret i32 %312
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_ConversionStop(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_Disable(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_ADC_MspDeInit(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 100}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 88, !12, i64 96, !12, i64 100, !12, i64 104, !14, i64 108}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !13, i64 60}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!14 = !{!"", !12, i64 0, !12, i64 4}
!15 = !{!12, !12, i64 0}
!16 = !{!10, !6, i64 0}
!17 = !{!18, !12, i64 12}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !7, i64 80, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !7, i64 112, !12, i64 128, !12, i64 132, !12, i64 136, !12, i64 140, !7, i64 144, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172, !12, i64 176, !12, i64 180, !12, i64 184, !12, i64 188, !12, i64 192, !12, i64 196, !12, i64 200}
!19 = !{!18, !12, i64 4}
!20 = !{!18, !12, i64 0}
!21 = !{!18, !12, i64 8}
!22 = !{!18, !12, i64 16}
!23 = !{!18, !12, i64 20}
!24 = !{!18, !12, i64 24}
!25 = !{!18, !12, i64 32}
!26 = !{!18, !12, i64 36}
!27 = !{!18, !12, i64 176}
!28 = !{!18, !12, i64 180}
!29 = !{!18, !12, i64 184}
!30 = !{!18, !12, i64 188}
!31 = !{!18, !12, i64 48}
!32 = !{!18, !12, i64 52}
!33 = !{!18, !12, i64 56}
!34 = !{!18, !12, i64 60}
!35 = !{!18, !12, i64 96}
!36 = !{!18, !12, i64 100}
!37 = !{!18, !12, i64 104}
!38 = !{!18, !12, i64 108}
!39 = !{!18, !12, i64 160}
!40 = !{!18, !12, i64 164}
!41 = !{!18, !12, i64 192}
!42 = !{!18, !12, i64 196}
!43 = !{!44, !12, i64 8}
!44 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!45 = !{!10, !12, i64 104}
!46 = !{!10, !12, i64 108}
!47 = !{!10, !12, i64 112}
!48 = !{!10, !12, i64 96}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsEnabled(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADC_DeInit(ptr noundef %0) local_unnamed_addr #1 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %112, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 100
  %5 = load volatile i32, ptr %4, align 4, !tbaa !5
  %6 = or i32 %5, 2
  store volatile i32 %6, ptr %4, align 4, !tbaa !5
  %7 = tail call i32 @ADC_ConversionStop(ptr noundef nonnull %0, i32 noundef 3)
  %8 = load ptr, ptr %0, align 8, !tbaa !14
  %9 = getelementptr inbounds i8, ptr %8, i64 12
  %10 = load volatile i32, ptr %9, align 4, !tbaa !15
  %11 = or i32 %10, 2097152
  store volatile i32 %11, ptr %9, align 4, !tbaa !15
  %12 = icmp eq i32 %7, 0
  br i1 %12, label %13, label %17

13:                                               ; preds = %3
  %14 = tail call i32 @ADC_Disable(ptr noundef nonnull %0)
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %13
  store volatile i32 1, ptr %4, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %13, %16, %3
  %.0 = phi i32 [ 0, %16 ], [ %14, %13 ], [ %7, %3 ]
  %18 = load ptr, ptr %0, align 8, !tbaa !14
  %19 = getelementptr inbounds i8, ptr %18, i64 4
  %20 = load volatile i32, ptr %19, align 4, !tbaa !17
  %21 = and i32 %20, -2048
  store volatile i32 %21, ptr %19, align 4, !tbaa !17
  store volatile i32 2047, ptr %18, align 4, !tbaa !18
  %22 = getelementptr inbounds i8, ptr %18, i64 8
  %23 = load volatile i32, ptr %22, align 4, !tbaa !19
  %24 = and i32 %23, -1342177281
  store volatile i32 %24, ptr %22, align 4, !tbaa !19
  %25 = load volatile i32, ptr %22, align 4, !tbaa !19
  %26 = or i32 %25, 536870912
  store volatile i32 %26, ptr %22, align 4, !tbaa !19
  %27 = getelementptr inbounds i8, ptr %18, i64 12
  %28 = load volatile i32, ptr %27, align 4, !tbaa !15
  %29 = and i32 %28, -2147450880
  store volatile i32 %29, ptr %27, align 4, !tbaa !15
  %30 = load volatile i32, ptr %27, align 4, !tbaa !15
  %31 = or i32 %30, -2147483648
  store volatile i32 %31, ptr %27, align 4, !tbaa !15
  %32 = getelementptr inbounds i8, ptr %18, i64 16
  %33 = load volatile i32, ptr %32, align 4, !tbaa !20
  %34 = and i32 %33, -67045348
  store volatile i32 %34, ptr %32, align 4, !tbaa !20
  %35 = getelementptr inbounds i8, ptr %18, i64 20
  %36 = load volatile i32, ptr %35, align 4, !tbaa !21
  %37 = and i32 %36, -1073741824
  store volatile i32 %37, ptr %35, align 4, !tbaa !21
  %38 = getelementptr inbounds i8, ptr %18, i64 24
  %39 = load volatile i32, ptr %38, align 4, !tbaa !22
  %40 = and i32 %39, -134217728
  store volatile i32 %40, ptr %38, align 4, !tbaa !22
  %41 = getelementptr inbounds i8, ptr %18, i64 32
  %42 = load volatile i32, ptr %41, align 4, !tbaa !23
  %43 = and i32 %42, -67108864
  store volatile i32 %43, ptr %41, align 4, !tbaa !23
  %44 = getelementptr inbounds i8, ptr %18, i64 36
  %45 = load volatile i32, ptr %44, align 4, !tbaa !24
  %46 = and i32 %45, -67108864
  store volatile i32 %46, ptr %44, align 4, !tbaa !24
  %47 = getelementptr inbounds i8, ptr %18, i64 176
  %48 = load volatile i32, ptr %47, align 4, !tbaa !25
  %49 = and i32 %48, -67108864
  store volatile i32 %49, ptr %47, align 4, !tbaa !25
  %50 = getelementptr inbounds i8, ptr %18, i64 180
  %51 = load volatile i32, ptr %50, align 4, !tbaa !26
  %52 = and i32 %51, -67108864
  store volatile i32 %52, ptr %50, align 4, !tbaa !26
  %53 = getelementptr inbounds i8, ptr %18, i64 184
  %54 = load volatile i32, ptr %53, align 4, !tbaa !27
  %55 = and i32 %54, -67108864
  store volatile i32 %55, ptr %53, align 4, !tbaa !27
  %56 = getelementptr inbounds i8, ptr %18, i64 188
  %57 = load volatile i32, ptr %56, align 4, !tbaa !28
  %58 = and i32 %57, -67108864
  store volatile i32 %58, ptr %56, align 4, !tbaa !28
  %59 = getelementptr inbounds i8, ptr %18, i64 48
  %60 = load volatile i32, ptr %59, align 4, !tbaa !29
  %61 = and i32 %60, -528349136
  store volatile i32 %61, ptr %59, align 4, !tbaa !29
  %62 = getelementptr inbounds i8, ptr %18, i64 52
  %63 = load volatile i32, ptr %62, align 4, !tbaa !30
  %64 = and i32 %63, -528349152
  store volatile i32 %64, ptr %62, align 4, !tbaa !30
  %65 = getelementptr inbounds i8, ptr %18, i64 56
  %66 = load volatile i32, ptr %65, align 4, !tbaa !31
  %67 = and i32 %66, -528349152
  store volatile i32 %67, ptr %65, align 4, !tbaa !31
  %68 = getelementptr inbounds i8, ptr %18, i64 60
  %69 = load volatile i32, ptr %68, align 4, !tbaa !32
  %70 = and i32 %69, -2016
  store volatile i32 %70, ptr %68, align 4, !tbaa !32
  %71 = getelementptr inbounds i8, ptr %18, i64 96
  %72 = load volatile i32, ptr %71, align 4, !tbaa !33
  store volatile i32 0, ptr %71, align 4, !tbaa !33
  %73 = getelementptr inbounds i8, ptr %18, i64 100
  %74 = load volatile i32, ptr %73, align 4, !tbaa !34
  store volatile i32 0, ptr %73, align 4, !tbaa !34
  %75 = getelementptr inbounds i8, ptr %18, i64 104
  %76 = load volatile i32, ptr %75, align 4, !tbaa !35
  store volatile i32 0, ptr %75, align 4, !tbaa !35
  %77 = getelementptr inbounds i8, ptr %18, i64 108
  %78 = load volatile i32, ptr %77, align 4, !tbaa !36
  store volatile i32 0, ptr %77, align 4, !tbaa !36
  %79 = getelementptr inbounds i8, ptr %18, i64 160
  %80 = load volatile i32, ptr %79, align 4, !tbaa !37
  %81 = and i32 %80, -1048576
  store volatile i32 %81, ptr %79, align 4, !tbaa !37
  %82 = getelementptr inbounds i8, ptr %18, i64 164
  %83 = load volatile i32, ptr %82, align 4, !tbaa !38
  %84 = and i32 %83, -1048576
  store volatile i32 %84, ptr %82, align 4, !tbaa !38
  %85 = getelementptr inbounds i8, ptr %18, i64 192
  %86 = load volatile i32, ptr %85, align 4, !tbaa !39
  %87 = and i32 %86, -1048576
  store volatile i32 %87, ptr %85, align 4, !tbaa !39
  %88 = getelementptr inbounds i8, ptr %18, i64 196
  %89 = load volatile i32, ptr %88, align 4, !tbaa !40
  %90 = and i32 %89, -134154240
  store volatile i32 %90, ptr %88, align 4, !tbaa !40
  %magicptr = ptrtoint ptr %18 to i64
  switch i64 %magicptr, label %95 [
    i64 1073881344, label %91
    i64 1073881088, label %91
  ]

91:                                               ; preds = %17, %17
  %92 = tail call i32 @LL_ADC_IsEnabled(ptr noundef nonnull inttoptr (i64 1073881088 to ptr))
  %93 = tail call i32 @LL_ADC_IsEnabled(ptr noundef nonnull inttoptr (i64 1073881344 to ptr))
  %94 = or i32 %93, %92
  br label %97

95:                                               ; preds = %17
  %96 = tail call i32 @LL_ADC_IsEnabled(ptr noundef nonnull inttoptr (i64 1476550656 to ptr))
  br label %97

97:                                               ; preds = %95, %91
  %98 = phi i32 [ %94, %91 ], [ %96, %95 ]
  %99 = icmp eq i32 %98, 0
  br i1 %99, label %100, label %107

100:                                              ; preds = %97
  %101 = load ptr, ptr %0, align 8, !tbaa !14
  %102 = icmp eq ptr %101, inttoptr (i64 1073881088 to ptr)
  %103 = icmp eq ptr %101, inttoptr (i64 1073881344 to ptr)
  %spec.select52 = or i1 %102, %103
  %104 = select i1 %spec.select52, ptr inttoptr (i64 1073881864 to ptr), ptr inttoptr (i64 1476551432 to ptr)
  %105 = load volatile i32, ptr %104, align 8, !tbaa !41
  %106 = and i32 %105, -33541920
  store volatile i32 %106, ptr %104, align 8, !tbaa !41
  tail call void @HAL_ADC_MspDeInit(ptr noundef nonnull %0)
  br label %107

107:                                              ; preds = %100, %97
  %108 = getelementptr inbounds i8, ptr %0, i64 104
  store volatile i32 0, ptr %108, align 8, !tbaa !43
  %109 = getelementptr inbounds i8, ptr %0, i64 108
  store i32 0, ptr %109, align 4, !tbaa !44
  %110 = getelementptr inbounds i8, ptr %0, i64 112
  store i32 0, ptr %110, align 4, !tbaa !45
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  %111 = getelementptr inbounds i8, ptr %0, i64 96
  store i32 0, ptr %111, align 8, !tbaa !46
  br label %112

112:                                              ; preds = %1, %107
  %.046 = phi i32 [ %.0, %107 ], [ 1, %1 ]
  ret i32 %.046
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_ConversionStop(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_Disable(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_ADC_MspDeInit(ptr noundef) local_unnamed_addr #1

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 100}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104, !13, i64 108}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !12, i64 60}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!13 = !{!"", !11, i64 0, !11, i64 4}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 12}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !8, i64 80, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !8, i64 112, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !8, i64 144, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200}
!17 = !{!16, !11, i64 4}
!18 = !{!16, !11, i64 0}
!19 = !{!16, !11, i64 8}
!20 = !{!16, !11, i64 16}
!21 = !{!16, !11, i64 20}
!22 = !{!16, !11, i64 24}
!23 = !{!16, !11, i64 32}
!24 = !{!16, !11, i64 36}
!25 = !{!16, !11, i64 176}
!26 = !{!16, !11, i64 180}
!27 = !{!16, !11, i64 184}
!28 = !{!16, !11, i64 188}
!29 = !{!16, !11, i64 48}
!30 = !{!16, !11, i64 52}
!31 = !{!16, !11, i64 56}
!32 = !{!16, !11, i64 60}
!33 = !{!16, !11, i64 96}
!34 = !{!16, !11, i64 100}
!35 = !{!16, !11, i64 104}
!36 = !{!16, !11, i64 108}
!37 = !{!16, !11, i64 160}
!38 = !{!16, !11, i64 164}
!39 = !{!16, !11, i64 192}
!40 = !{!16, !11, i64 196}
!41 = !{!42, !11, i64 8}
!42 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!43 = !{!6, !11, i64 104}
!44 = !{!6, !11, i64 108}
!45 = !{!6, !11, i64 112}
!46 = !{!6, !11, i64 96}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass