; LLVM IR from mist64/perfect6502 :: cbmbasic (runtime_init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@memory = external global [65536 x i8], align 16
@PC = external dso_local global i16, align 2
@A = external dso_local global i8, align 1
@X = external dso_local global i8, align 1
@Y = external dso_local global i8, align 1
@S = external dso_local global i8, align 1
@P = external dso_local global i8, align 1
@N = external dso_local global i32, align 4
@Z = external dso_local global i32, align 4
@C = external dso_local global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local void @handle_monitor(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = call zeroext i16 @readPC(ptr noundef %3)
  store i16 %4, ptr @PC, align 2, !tbaa !9
  %5 = load i16, ptr @PC, align 2, !tbaa !9
  %6 = zext i16 %5 to i32
  %7 = icmp sge i32 %6, 65424
  br i1 %7, label %8, label %55

8:                                                ; preds = %1
  %9 = load i16, ptr @PC, align 2, !tbaa !9
  %10 = zext i16 %9 to i32
  %11 = sub nsw i32 %10, 65424
  %12 = srem i32 %11, 3
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %55

14:                                               ; preds = %8
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = call zeroext i8 @readA(ptr noundef %15)
  store i8 %16, ptr @A, align 1, !tbaa !11
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = call zeroext i8 @readX(ptr noundef %17)
  store i8 %18, ptr @X, align 1, !tbaa !11
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = call zeroext i8 @readY(ptr noundef %19)
  store i8 %20, ptr @Y, align 1, !tbaa !11
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = call zeroext i8 @readSP(ptr noundef %21)
  store i8 %22, ptr @S, align 1, !tbaa !11
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = call zeroext i8 @readP(ptr noundef %23)
  store i8 %24, ptr @P, align 1, !tbaa !11
  %25 = load i8, ptr @P, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = ashr i32 %26, 7
  store i32 %27, ptr @N, align 4, !tbaa !12
  %28 = load i8, ptr @P, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  %30 = ashr i32 %29, 1
  %31 = and i32 %30, 1
  store i32 %31, ptr @Z, align 4, !tbaa !12
  %32 = load i8, ptr @P, align 1, !tbaa !11
  %33 = zext i8 %32 to i32
  %34 = and i32 %33, 1
  store i32 %34, ptr @C, align 4, !tbaa !12
  %35 = call i32 (...) @kernal_dispatch()
  %36 = load i8, ptr @P, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = and i32 %37, 124
  %39 = trunc i32 %38 to i8
  store i8 %39, ptr @P, align 1, !tbaa !11
  %40 = load i32, ptr @N, align 4, !tbaa !12
  %41 = shl i32 %40, 7
  %42 = load i32, ptr @Z, align 4, !tbaa !12
  %43 = shl i32 %42, 1
  %44 = or i32 %41, %43
  %45 = load i32, ptr @C, align 4, !tbaa !12
  %46 = or i32 %44, %45
  %47 = load i8, ptr @P, align 1, !tbaa !11
  %48 = zext i8 %47 to i32
  %49 = or i32 %48, %46
  %50 = trunc i32 %49 to i8
  store i8 %50, ptr @P, align 1, !tbaa !11
  store i8 -87, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63488), align 16, !tbaa !11
  %51 = load i8, ptr @P, align 1, !tbaa !11
  store i8 %51, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63489), align 1, !tbaa !11
  store i8 72, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63490), align 2, !tbaa !11
  store i8 -87, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63491), align 1, !tbaa !11
  %52 = load i8, ptr @A, align 1, !tbaa !11
  store i8 %52, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63492), align 4, !tbaa !11
  store i8 -94, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63493), align 1, !tbaa !11
  %53 = load i8, ptr @X, align 1, !tbaa !11
  store i8 %53, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63494), align 2, !tbaa !11
  store i8 -96, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63495), align 1, !tbaa !11
  %54 = load i8, ptr @Y, align 1, !tbaa !11
  store i8 %54, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63496), align 8, !tbaa !11
  store i8 40, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63497), align 1, !tbaa !11
  store i8 96, ptr getelementptr inbounds ([65536 x i8], ptr @memory, i64 0, i64 63498), align 2, !tbaa !11
  br label %55

55:                                               ; preds = %14, %8, %1
  ret void
}

declare zeroext i16 @readPC(ptr noundef) #1

declare zeroext i8 @readA(ptr noundef) #1

declare zeroext i8 @readX(ptr noundef) #1

declare zeroext i8 @readY(ptr noundef) #1

declare zeroext i8 @readSP(ptr noundef) #1

declare zeroext i8 @readP(ptr noundef) #1

declare i32 @kernal_dispatch(...) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@memory = external local_unnamed_addr global [65536 x i8], align 16
@PC = external dso_local local_unnamed_addr global i16, align 2
@A = external dso_local local_unnamed_addr global i8, align 1
@X = external dso_local local_unnamed_addr global i8, align 1
@Y = external dso_local local_unnamed_addr global i8, align 1
@S = external dso_local local_unnamed_addr global i8, align 1
@P = external dso_local local_unnamed_addr global i8, align 1
@N = external dso_local local_unnamed_addr global i32, align 4
@Z = external dso_local local_unnamed_addr global i32, align 4
@C = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local void @handle_monitor(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call zeroext i16 @readPC(ptr noundef %0) #2
  store i16 %2, ptr @PC, align 2, !tbaa !5
  %3 = icmp ugt i16 %2, -113
  br i1 %3, label %4, label %36

4:                                                ; preds = %1
  %5 = trunc i16 %2 to i8
  %.lhs.trunc = add nsw i8 %5, 112
  %6 = urem i8 %.lhs.trunc, 3
  %7 = icmp eq i8 %6, 0
  br i1 %7, label %8, label %36

8:                                                ; preds = %4
  %9 = tail call zeroext i8 @readA(ptr noundef %0) #2
  store i8 %9, ptr @A, align 1, !tbaa !9
  %10 = tail call zeroext i8 @readX(ptr noundef %0) #2
  store i8 %10, ptr @X, align 1, !tbaa !9
  %11 = tail call zeroext i8 @readY(ptr noundef %0) #2
  store i8 %11, ptr @Y, align 1, !tbaa !9
  %12 = tail call zeroext i8 @readSP(ptr noundef %0) #2
  store i8 %12, ptr @S, align 1, !tbaa !9
  %13 = tail call zeroext i8 @readP(ptr noundef %0) #2
  store i8 %13, ptr @P, align 1, !tbaa !9
  %14 = lshr i8 %13, 7
  %15 = zext nneg i8 %14 to i32
  store i32 %15, ptr @N, align 4, !tbaa !10
  %16 = lshr i8 %13, 1
  %17 = and i8 %16, 1
  %18 = zext nneg i8 %17 to i32
  store i32 %18, ptr @Z, align 4, !tbaa !10
  %19 = and i8 %13, 1
  %20 = zext nneg i8 %19 to i32
  store i32 %20, ptr @C, align 4, !tbaa !10
  %21 = tail call i32 (...) @kernal_dispatch() #2
  %22 = load i8, ptr @P, align 1, !tbaa !9
  %23 = and i8 %22, 124
  %24 = load i32, ptr @N, align 4, !tbaa !10
  %25 = shl i32 %24, 7
  %26 = load i32, ptr @Z, align 4, !tbaa !10
  %27 = shl i32 %26, 1
  %28 = or i32 %27, %25
  %29 = load i32, ptr @C, align 4, !tbaa !10
  %30 = or i32 %28, %29
  %31 = trunc i32 %30 to i8
  %32 = or i8 %23, %31
  store i8 %32, ptr @P, align 1, !tbaa !9
  store i8 -87, ptr getelementptr inbounds (i8, ptr @memory, i64 63488), align 16, !tbaa !9
  store i8 %32, ptr getelementptr inbounds (i8, ptr @memory, i64 63489), align 1, !tbaa !9
  store i8 72, ptr getelementptr inbounds (i8, ptr @memory, i64 63490), align 2, !tbaa !9
  store i8 -87, ptr getelementptr inbounds (i8, ptr @memory, i64 63491), align 1, !tbaa !9
  %33 = load i8, ptr @A, align 1, !tbaa !9
  store i8 %33, ptr getelementptr inbounds (i8, ptr @memory, i64 63492), align 4, !tbaa !9
  store i8 -94, ptr getelementptr inbounds (i8, ptr @memory, i64 63493), align 1, !tbaa !9
  %34 = load i8, ptr @X, align 1, !tbaa !9
  store i8 %34, ptr getelementptr inbounds (i8, ptr @memory, i64 63494), align 2, !tbaa !9
  store i8 -96, ptr getelementptr inbounds (i8, ptr @memory, i64 63495), align 1, !tbaa !9
  %35 = load i8, ptr @Y, align 1, !tbaa !9
  store i8 %35, ptr getelementptr inbounds (i8, ptr @memory, i64 63496), align 8, !tbaa !9
  store i8 40, ptr getelementptr inbounds (i8, ptr @memory, i64 63497), align 1, !tbaa !9
  store i8 96, ptr getelementptr inbounds (i8, ptr @memory, i64 63498), align 2, !tbaa !9
  br label %36

36:                                               ; preds = %8, %4, %1
  ret void
}

declare zeroext i16 @readPC(ptr noundef) local_unnamed_addr #1

declare zeroext i8 @readA(ptr noundef) local_unnamed_addr #1

declare zeroext i8 @readX(ptr noundef) local_unnamed_addr #1

declare zeroext i8 @readY(ptr noundef) local_unnamed_addr #1

declare zeroext i8 @readSP(ptr noundef) local_unnamed_addr #1

declare zeroext i8 @readP(ptr noundef) local_unnamed_addr #1

declare i32 @kernal_dispatch(...) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass