; LLVM IR from Leet-Us-Code/DSA-A-Z-Practice :: Sid's Levels/Level - 1/BinarySearchTree/LCA.ll (Z3LCAP4Nodeii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.6" = type { %"struct.std::_Vector_base.7" }
%"struct.std::_Vector_base.7" = type { %"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl" }
%"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z3LCAP4Nodeii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #1 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca %"class.std::vector.6", align 8
  %11 = alloca %"class.std::vector.6", align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %16 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %17 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %18 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %19 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr %10) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr %11) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !9
  %22 = invoke noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef %20, i32 noundef %21, ptr noundef nonnull align 8 dereferenceable(24) %10)
          to label %23 unwind label %40

23:                                               ; preds = %3
  %24 = zext i1 %22 to i8
  store i8 %24, ptr %8, align 1, !tbaa !11
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = invoke noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef %25, i32 noundef %26, ptr noundef nonnull align 8 dereferenceable(24) %11)
          to label %28 unwind label %40

28:                                               ; preds = %23
  %29 = zext i1 %27 to i8
  store i8 %29, ptr %9, align 1, !tbaa !11
  %30 = load i8, ptr %8, align 1, !tbaa !11, !range !13, !noundef !14
  %31 = trunc i8 %30 to i1
  %32 = zext i1 %31 to i32
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %39, label %34

34:                                               ; preds = %28
  %35 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %36 = trunc i8 %35 to i1
  %37 = zext i1 %36 to i32
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %44

39:                                               ; preds = %34, %28
  store ptr null, ptr %4, align 8
  store i32 1, ptr %14, align 4
  br label %96

40:                                               ; preds = %53, %44, %23, %3
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %12, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %13, align 4
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  br label %98

44:                                               ; preds = %34
  %45 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %46 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %15, i32 0, i32 0
  store ptr %45, ptr %46, align 8
  %47 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %48 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %16, i32 0, i32 0
  store ptr %47, ptr %48, align 8
  %49 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %15, i32 0, i32 0
  %50 = load ptr, ptr %49, align 8
  %51 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %16, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8
  invoke void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr %50, ptr %52)
          to label %53 unwind label %40

53:                                               ; preds = %44
  %54 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %55 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %17, i32 0, i32 0
  store ptr %54, ptr %55, align 8
  %56 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %57 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %18, i32 0, i32 0
  store ptr %56, ptr %57, align 8
  %58 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %17, i32 0, i32 0
  %59 = load ptr, ptr %58, align 8
  %60 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %18, i32 0, i32 0
  %61 = load ptr, ptr %60, align 8
  invoke void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr %59, ptr %61)
          to label %62 unwind label %40

62:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %63

63:                                               ; preds = %87, %62
  %64 = load i32, ptr %19, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %67 = icmp ult i64 %65, %66
  br i1 %67, label %68, label %73

68:                                               ; preds = %63
  %69 = load i32, ptr %19, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %72 = icmp ult i64 %70, %71
  br label %73

73:                                               ; preds = %68, %63
  %74 = phi i1 [ false, %63 ], [ %72, %68 ]
  br i1 %74, label %75, label %90

75:                                               ; preds = %73
  %76 = load i32, ptr %19, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %77) #4
  %79 = load ptr, ptr %78, align 8, !tbaa !5
  %80 = load i32, ptr %19, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %81) #4
  %83 = load ptr, ptr %82, align 8, !tbaa !5
  %84 = icmp ne ptr %79, %83
  br i1 %84, label %85, label %86

85:                                               ; preds = %75
  br label %90

86:                                               ; preds = %75
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %19, align 4, !tbaa !9
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %19, align 4, !tbaa !9
  br label %63, !llvm.loop !15

90:                                               ; preds = %85, %73
  %91 = load i32, ptr %19, align 4, !tbaa !9
  %92 = sub nsw i32 %91, 1
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %93) #4
  %95 = load ptr, ptr %94, align 8, !tbaa !5
  store ptr %95, ptr %4, align 8
  store i32 1, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %96

96:                                               ; preds = %90, %39
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  %97 = load ptr, ptr %4, align 8
  ret ptr %97

98:                                               ; preds = %40
  %99 = load ptr, ptr %12, align 8
  %100 = load i32, ptr %13, align 4
  %101 = insertvalue { ptr, i32 } poison, ptr %99, 0
  %102 = insertvalue { ptr, i32 } %101, i32 %100, 1
  resume { ptr, i32 } %102
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef, i32 noundef, ptr noundef nonnull align 8 dereferenceable(24)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr, ptr) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.6" = type { %"struct.std::_Vector_base.7" }
%"struct.std::_Vector_base.7" = type { %"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl" }
%"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node *, std::allocator<Node *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z3LCAP4Nodeii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.std::vector.6", align 8
  %5 = alloca %"class.std::vector.6", align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  %6 = invoke noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %4)
          to label %7 unwind label %10

7:                                                ; preds = %3
  %8 = invoke noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef %0, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %5)
          to label %9 unwind label %10

9:                                                ; preds = %7
  %brmerge.demorgan = and i1 %6, %8
  br i1 %brmerge.demorgan, label %12, label %33

10:                                               ; preds = %15, %12, %7, %3
  %11 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  resume { ptr, i32 } %11

12:                                               ; preds = %9
  %13 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  %14 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  invoke void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr %13, ptr %14)
          to label %15 unwind label %10

15:                                               ; preds = %12
  %16 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  %17 = call ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  invoke void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr %16, ptr %17)
          to label %.preheader unwind label %10

.preheader:                                       ; preds = %15
  %18 = call noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  %.not26 = icmp eq i64 %18, 0
  br i1 %.not26, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %26
  %indvars.iv = phi i64 [ %indvars.iv.next, %26 ], [ 0, %.preheader ]
  %19 = call noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  %20 = icmp ugt i64 %19, %indvars.iv
  br i1 %20, label %21, label %.critedge.loopexit

21:                                               ; preds = %.lr.ph
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv) #4
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv) #4
  %25 = load ptr, ptr %24, align 8, !tbaa !5
  %.not = icmp eq ptr %23, %25
  br i1 %.not, label %26, label %.critedge.loopexit

26:                                               ; preds = %21
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %27 = call noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  %28 = icmp ugt i64 %27, %indvars.iv.next
  br i1 %28, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !9

.critedge.loopexit:                               ; preds = %26, %21, %.lr.ph
  %.0.lcssa.ph.in = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv, %21 ], [ %indvars.iv.next, %26 ]
  %29 = shl i64 %.0.lcssa.ph.in, 32
  %sext = add i64 %29, -4294967296
  %30 = ashr exact i64 %sext, 32
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.preheader
  %.0.lcssa = phi i64 [ -1, %.preheader ], [ %30, %.critedge.loopexit ]
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %.0.lcssa) #4
  %32 = load ptr, ptr %31, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %9, %.critedge
  %.017 = phi ptr [ %32, %.critedge ], [ null, %9 ]
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  call void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  ret ptr %.017
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z4findP4NodeiRSt6vectorIS0_SaIS0_EE(ptr noundef, i32 noundef, ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt7reverseIN9__gnu_cxx17__normal_iteratorIPP4NodeSt6vectorIS3_SaIS3_EEEEEvT_S9_(ptr, ptr) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP4NodeSaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP4NodeSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP4NodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4NodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass