; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SD_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca %struct.SDMMC_InitTypeDef, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 20, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %9, i32 0, i32 8
  store volatile i32 3, ptr %10, align 8, !tbaa !11
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %11, i32 0, i32 10
  %13 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %12, i32 0, i32 0
  %14 = load i32, ptr %13, align 8, !tbaa !15
  %15 = icmp ne i32 %14, 3
  br i1 %15, label %16, label %56

16:                                               ; preds = %2
  %17 = load i32, ptr %4, align 4, !tbaa !9
  %18 = zext i32 %17 to i64
  %19 = icmp eq i64 %18, 32768
  br i1 %19, label %20, label %25

20:                                               ; preds = %16
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %21, i32 0, i32 9
  %23 = load volatile i32, ptr %22, align 4, !tbaa !16
  %24 = or i32 %23, 268435456
  store volatile i32 %24, ptr %22, align 4, !tbaa !16
  br label %55

25:                                               ; preds = %16
  %26 = load i32, ptr %4, align 4, !tbaa !9
  %27 = zext i32 %26 to i64
  %28 = icmp eq i64 %27, 16384
  br i1 %28, label %29, label %37

29:                                               ; preds = %25
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = call i32 @SD_WideBus_Enable(ptr noundef %30)
  store i32 %31, ptr %6, align 4, !tbaa !9
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %33, i32 0, i32 9
  %35 = load volatile i32, ptr %34, align 4, !tbaa !16
  %36 = or i32 %35, %32
  store volatile i32 %36, ptr %34, align 4, !tbaa !16
  br label %54

37:                                               ; preds = %25
  %38 = load i32, ptr %4, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %48

40:                                               ; preds = %37
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = call i32 @SD_WideBus_Disable(ptr noundef %41)
  store i32 %42, ptr %6, align 4, !tbaa !9
  %43 = load i32, ptr %6, align 4, !tbaa !9
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %44, i32 0, i32 9
  %46 = load volatile i32, ptr %45, align 4, !tbaa !16
  %47 = or i32 %46, %43
  store volatile i32 %47, ptr %45, align 4, !tbaa !16
  br label %53

48:                                               ; preds = %37
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %49, i32 0, i32 9
  %51 = load volatile i32, ptr %50, align 4, !tbaa !16
  %52 = or i32 %51, 134217728
  store volatile i32 %52, ptr %50, align 4, !tbaa !16
  br label %53

53:                                               ; preds = %48, %40
  br label %54

54:                                               ; preds = %53, %29
  br label %55

55:                                               ; preds = %54, %20
  br label %61

56:                                               ; preds = %2
  %57 = load ptr, ptr %3, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %57, i32 0, i32 9
  %59 = load volatile i32, ptr %58, align 4, !tbaa !16
  %60 = or i32 %59, 268435456
  store volatile i32 %60, ptr %58, align 4, !tbaa !16
  br label %61

61:                                               ; preds = %56, %55
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %62, i32 0, i32 9
  %64 = load volatile i32, ptr %63, align 4, !tbaa !16
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %71

66:                                               ; preds = %61
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %67, i32 0, i32 0
  %69 = load ptr, ptr %68, align 8, !tbaa !17
  %70 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %69, i32 0, i32 14
  store volatile i32 534777855, ptr %70, align 4, !tbaa !18
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %219

71:                                               ; preds = %61
  %72 = call i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef 65536)
  store i32 %72, ptr %7, align 4, !tbaa !9
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = icmp ne i32 %73, 0
  br i1 %74, label %75, label %213

75:                                               ; preds = %71
  %76 = load ptr, ptr %3, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %76, i32 0, i32 1
  %78 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %77, i32 0, i32 0
  %79 = load i32, ptr %78, align 8, !tbaa !20
  %80 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 0
  store i32 %79, ptr %80, align 4, !tbaa !21
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %81, i32 0, i32 1
  %83 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %82, i32 0, i32 1
  %84 = load i32, ptr %83, align 4, !tbaa !22
  %85 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 1
  store i32 %84, ptr %85, align 4, !tbaa !23
  %86 = load i32, ptr %4, align 4, !tbaa !9
  %87 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 2
  store i32 %86, ptr %87, align 4, !tbaa !24
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %88, i32 0, i32 1
  %90 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %89, i32 0, i32 3
  %91 = load i32, ptr %90, align 4, !tbaa !25
  %92 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 3
  store i32 %91, ptr %92, align 4, !tbaa !26
  %93 = load ptr, ptr %3, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %93, i32 0, i32 1
  %95 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %94, i32 0, i32 4
  %96 = load i32, ptr %95, align 8, !tbaa !27
  %97 = load i32, ptr %7, align 4, !tbaa !9
  %98 = udiv i32 %97, 50000000
  %99 = icmp uge i32 %96, %98
  br i1 %99, label %100, label %106

100:                                              ; preds = %75
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %101, i32 0, i32 1
  %103 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %102, i32 0, i32 4
  %104 = load i32, ptr %103, align 8, !tbaa !27
  %105 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %104, ptr %105, align 4, !tbaa !28
  br label %208

106:                                              ; preds = %75
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %107, i32 0, i32 10
  %109 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %108, i32 0, i32 8
  %110 = load i32, ptr %109, align 8, !tbaa !29
  %111 = icmp eq i32 %110, 512
  br i1 %111, label %112, label %118

112:                                              ; preds = %106
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %113, i32 0, i32 1
  %115 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %114, i32 0, i32 4
  %116 = load i32, ptr %115, align 8, !tbaa !27
  %117 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %116, ptr %117, align 4, !tbaa !28
  br label %207

118:                                              ; preds = %106
  %119 = load ptr, ptr %3, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %119, i32 0, i32 10
  %121 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %120, i32 0, i32 8
  %122 = load i32, ptr %121, align 8, !tbaa !29
  %123 = icmp eq i32 %122, 256
  br i1 %123, label %124, label %165

124:                                              ; preds = %118
  %125 = load ptr, ptr %3, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %125, i32 0, i32 1
  %127 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %126, i32 0, i32 4
  %128 = load i32, ptr %127, align 8, !tbaa !27
  %129 = icmp eq i32 %128, 0
  br i1 %129, label %130, label %144

130:                                              ; preds = %124
  %131 = load i32, ptr %7, align 4, !tbaa !9
  %132 = icmp ugt i32 %131, 50000000
  br i1 %132, label %133, label %137

133:                                              ; preds = %130
  %134 = load i32, ptr %7, align 4, !tbaa !9
  %135 = udiv i32 %134, 100000000
  %136 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %135, ptr %136, align 4, !tbaa !28
  br label %143

137:                                              ; preds = %130
  %138 = load ptr, ptr %3, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %138, i32 0, i32 1
  %140 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %139, i32 0, i32 4
  %141 = load i32, ptr %140, align 8, !tbaa !27
  %142 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %141, ptr %142, align 4, !tbaa !28
  br label %143

143:                                              ; preds = %137, %133
  br label %164

144:                                              ; preds = %124
  %145 = load i32, ptr %7, align 4, !tbaa !9
  %146 = load ptr, ptr %3, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %146, i32 0, i32 1
  %148 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %147, i32 0, i32 4
  %149 = load i32, ptr %148, align 8, !tbaa !27
  %150 = mul i32 2, %149
  %151 = udiv i32 %145, %150
  %152 = icmp ugt i32 %151, 50000000
  br i1 %152, label %153, label %157

153:                                              ; preds = %144
  %154 = load i32, ptr %7, align 4, !tbaa !9
  %155 = udiv i32 %154, 100000000
  %156 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %155, ptr %156, align 4, !tbaa !28
  br label %163

157:                                              ; preds = %144
  %158 = load ptr, ptr %3, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %158, i32 0, i32 1
  %160 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %159, i32 0, i32 4
  %161 = load i32, ptr %160, align 8, !tbaa !27
  %162 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %161, ptr %162, align 4, !tbaa !28
  br label %163

163:                                              ; preds = %157, %153
  br label %164

164:                                              ; preds = %163, %143
  br label %206

165:                                              ; preds = %118
  %166 = load ptr, ptr %3, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %166, i32 0, i32 1
  %168 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %167, i32 0, i32 4
  %169 = load i32, ptr %168, align 8, !tbaa !27
  %170 = icmp eq i32 %169, 0
  br i1 %170, label %171, label %185

171:                                              ; preds = %165
  %172 = load i32, ptr %7, align 4, !tbaa !9
  %173 = icmp ugt i32 %172, 25000000
  br i1 %173, label %174, label %178

174:                                              ; preds = %171
  %175 = load i32, ptr %7, align 4, !tbaa !9
  %176 = udiv i32 %175, 50000000
  %177 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %176, ptr %177, align 4, !tbaa !28
  br label %184

178:                                              ; preds = %171
  %179 = load ptr, ptr %3, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %179, i32 0, i32 1
  %181 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %180, i32 0, i32 4
  %182 = load i32, ptr %181, align 8, !tbaa !27
  %183 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %182, ptr %183, align 4, !tbaa !28
  br label %184

184:                                              ; preds = %178, %174
  br label %205

185:                                              ; preds = %165
  %186 = load i32, ptr %7, align 4, !tbaa !9
  %187 = load ptr, ptr %3, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %187, i32 0, i32 1
  %189 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %188, i32 0, i32 4
  %190 = load i32, ptr %189, align 8, !tbaa !27
  %191 = mul i32 2, %190
  %192 = udiv i32 %186, %191
  %193 = icmp ugt i32 %192, 25000000
  br i1 %193, label %194, label %198

194:                                              ; preds = %185
  %195 = load i32, ptr %7, align 4, !tbaa !9
  %196 = udiv i32 %195, 50000000
  %197 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %196, ptr %197, align 4, !tbaa !28
  br label %204

198:                                              ; preds = %185
  %199 = load ptr, ptr %3, align 8, !tbaa !5
  %200 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %199, i32 0, i32 1
  %201 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %200, i32 0, i32 4
  %202 = load i32, ptr %201, align 8, !tbaa !27
  %203 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %5, i32 0, i32 4
  store i32 %202, ptr %203, align 4, !tbaa !28
  br label %204

204:                                              ; preds = %198, %194
  br label %205

205:                                              ; preds = %204, %184
  br label %206

206:                                              ; preds = %205, %164
  br label %207

207:                                              ; preds = %206, %112
  br label %208

208:                                              ; preds = %207, %100
  %209 = load ptr, ptr %3, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %209, i32 0, i32 0
  %211 = load ptr, ptr %210, align 8, !tbaa !17
  %212 = call i32 @SDMMC_Init(ptr noundef %211, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8 %5)
  br label %218

213:                                              ; preds = %71
  %214 = load ptr, ptr %3, align 8, !tbaa !5
  %215 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %214, i32 0, i32 9
  %216 = load volatile i32, ptr %215, align 4, !tbaa !16
  %217 = or i32 %216, 134217728
  store volatile i32 %217, ptr %215, align 4, !tbaa !16
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %218

218:                                              ; preds = %213, %208
  br label %219

219:                                              ; preds = %218, %66
  %220 = load ptr, ptr %3, align 8, !tbaa !5
  %221 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %220, i32 0, i32 0
  %222 = load ptr, ptr %221, align 8, !tbaa !17
  %223 = call i32 @SDMMC_CmdBlockLength(ptr noundef %222, i32 noundef 512)
  store i32 %223, ptr %6, align 4, !tbaa !9
  %224 = load i32, ptr %6, align 4, !tbaa !9
  %225 = icmp ne i32 %224, 0
  br i1 %225, label %226, label %236

226:                                              ; preds = %219
  %227 = load ptr, ptr %3, align 8, !tbaa !5
  %228 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %227, i32 0, i32 0
  %229 = load ptr, ptr %228, align 8, !tbaa !17
  %230 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %229, i32 0, i32 14
  store volatile i32 534777855, ptr %230, align 4, !tbaa !18
  %231 = load i32, ptr %6, align 4, !tbaa !9
  %232 = load ptr, ptr %3, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %232, i32 0, i32 9
  %234 = load volatile i32, ptr %233, align 4, !tbaa !16
  %235 = or i32 %234, %231
  store volatile i32 %235, ptr %233, align 4, !tbaa !16
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %236

236:                                              ; preds = %226, %219
  %237 = load ptr, ptr %3, align 8, !tbaa !5
  %238 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %237, i32 0, i32 8
  store volatile i32 1, ptr %238, align 8, !tbaa !11
  %239 = load i32, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 20, ptr %5) #3
  ret i32 %239
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef) #2

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) #2

declare i32 @SDMMC_CmdBlockLength(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Enable(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Disable(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 108, !7, i64 124}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!12, !10, i64 72}
!16 = !{!12, !10, i64 68}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !10, i64 56}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!20 = !{!12, !10, i64 8}
!21 = !{!13, !10, i64 0}
!22 = !{!12, !10, i64 12}
!23 = !{!13, !10, i64 4}
!24 = !{!13, !10, i64 8}
!25 = !{!12, !10, i64 20}
!26 = !{!13, !10, i64 12}
!27 = !{!12, !10, i64 24}
!28 = !{!13, !10, i64 16}
!29 = !{!12, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_SD_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = alloca %struct.SDMMC_InitTypeDef, align 8
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 3, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 72
  %6 = load i32, ptr %5, align 8, !tbaa !13
  %.not = icmp eq i32 %6, 3
  br i1 %.not, label %13, label %7

7:                                                ; preds = %2
  switch i32 %1, label %12 [
    i32 32768, label %13
    i32 16384, label %8
    i32 0, label %10
  ]

8:                                                ; preds = %7
  %9 = tail call i32 @SD_WideBus_Enable(ptr noundef nonnull %0)
  br label %13

10:                                               ; preds = %7
  %11 = tail call i32 @SD_WideBus_Disable(ptr noundef nonnull %0)
  br label %13

12:                                               ; preds = %7
  br label %13

13:                                               ; preds = %2, %7, %10, %12, %8
  %.sink64 = phi i32 [ %11, %10 ], [ 134217728, %12 ], [ %9, %8 ], [ 268435456, %7 ], [ 268435456, %2 ]
  %14 = getelementptr inbounds i8, ptr %0, i64 68
  %15 = load volatile i32, ptr %14, align 4, !tbaa !14
  %16 = or i32 %15, %.sink64
  store volatile i32 %16, ptr %14, align 4, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %0, i64 68
  %18 = load volatile i32, ptr %17, align 4, !tbaa !14
  %.not58 = icmp eq i32 %18, 0
  br i1 %.not58, label %22, label %19

19:                                               ; preds = %13
  %20 = load ptr, ptr %0, align 8, !tbaa !15
  %21 = getelementptr inbounds i8, ptr %20, i64 56
  store volatile i32 534777855, ptr %21, align 4, !tbaa !16
  br label %79

22:                                               ; preds = %13
  %23 = tail call i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef 65536) #3
  %.not59 = icmp eq i32 %23, 0
  br i1 %.not59, label %76, label %24

24:                                               ; preds = %22
  %25 = getelementptr inbounds i8, ptr %0, i64 8
  %26 = load <2 x i32>, ptr %25, align 8, !tbaa !18
  store <2 x i32> %26, ptr %3, align 8, !tbaa !18
  %27 = getelementptr inbounds i8, ptr %3, i64 8
  store i32 %1, ptr %27, align 8, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %0, i64 20
  %29 = load i32, ptr %28, align 4, !tbaa !20
  %30 = getelementptr inbounds i8, ptr %3, i64 12
  store i32 %29, ptr %30, align 4, !tbaa !21
  %31 = getelementptr inbounds i8, ptr %0, i64 24
  %32 = load i32, ptr %31, align 8, !tbaa !22
  %33 = udiv i32 %23, 50000000
  %.not60 = icmp ult i32 %32, %33
  br i1 %.not60, label %36, label %34

34:                                               ; preds = %24
  %35 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %32, ptr %35, align 8, !tbaa !23
  br label %73

36:                                               ; preds = %24
  %37 = getelementptr inbounds i8, ptr %0, i64 104
  %38 = load i32, ptr %37, align 8, !tbaa !24
  switch i32 %38, label %59 [
    i32 512, label %39
    i32 256, label %41
  ]

39:                                               ; preds = %36
  %40 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %32, ptr %40, align 8, !tbaa !23
  br label %73

41:                                               ; preds = %36
  %42 = icmp eq i32 %32, 0
  br i1 %42, label %43, label %50

43:                                               ; preds = %41
  %44 = icmp ugt i32 %23, 50000000
  br i1 %44, label %45, label %48

45:                                               ; preds = %43
  %46 = udiv i32 %23, 100000000
  %47 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %46, ptr %47, align 8, !tbaa !23
  br label %73

48:                                               ; preds = %43
  %49 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 0, ptr %49, align 8, !tbaa !23
  br label %73

50:                                               ; preds = %41
  %51 = shl nuw nsw i32 %32, 1
  %52 = udiv i32 %23, %51
  %53 = icmp ugt i32 %52, 50000000
  br i1 %53, label %54, label %57

54:                                               ; preds = %50
  %55 = udiv i32 %23, 100000000
  %56 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %55, ptr %56, align 8, !tbaa !23
  br label %73

57:                                               ; preds = %50
  %58 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %32, ptr %58, align 8, !tbaa !23
  br label %73

59:                                               ; preds = %36
  %60 = icmp eq i32 %32, 0
  br i1 %60, label %61, label %66

61:                                               ; preds = %59
  %62 = icmp ugt i32 %23, 25000000
  %63 = getelementptr inbounds i8, ptr %3, i64 16
  br i1 %62, label %64, label %65

64:                                               ; preds = %61
  store i32 %33, ptr %63, align 8, !tbaa !23
  br label %73

65:                                               ; preds = %61
  store i32 0, ptr %63, align 8, !tbaa !23
  br label %73

66:                                               ; preds = %59
  %67 = shl nuw nsw i32 %32, 1
  %68 = udiv i32 %23, %67
  %69 = icmp ugt i32 %68, 25000000
  %70 = getelementptr inbounds i8, ptr %3, i64 16
  br i1 %69, label %71, label %72

71:                                               ; preds = %66
  store i32 %33, ptr %70, align 8, !tbaa !23
  br label %73

72:                                               ; preds = %66
  store i32 %32, ptr %70, align 8, !tbaa !23
  br label %73

73:                                               ; preds = %39, %65, %64, %72, %71, %48, %45, %57, %54, %34
  %74 = load ptr, ptr %0, align 8, !tbaa !15
  %75 = tail call i32 @SDMMC_Init(ptr noundef %74, ptr noundef nonnull byval(%struct.SDMMC_InitTypeDef) align 8 %3) #3
  br label %79

76:                                               ; preds = %22
  %77 = load volatile i32, ptr %17, align 4, !tbaa !14
  %78 = or i32 %77, 134217728
  store volatile i32 %78, ptr %17, align 4, !tbaa !14
  br label %79

79:                                               ; preds = %73, %76, %19
  %.0 = phi i32 [ 1, %19 ], [ 0, %73 ], [ 1, %76 ]
  %80 = load ptr, ptr %0, align 8, !tbaa !15
  %81 = tail call i32 @SDMMC_CmdBlockLength(ptr noundef %80, i32 noundef 512) #3
  %.not61 = icmp eq i32 %81, 0
  br i1 %.not61, label %87, label %82

82:                                               ; preds = %79
  %83 = load ptr, ptr %0, align 8, !tbaa !15
  %84 = getelementptr inbounds i8, ptr %83, i64 56
  store volatile i32 534777855, ptr %84, align 4, !tbaa !16
  %85 = load volatile i32, ptr %17, align 4, !tbaa !14
  %86 = or i32 %85, %81
  store volatile i32 %86, ptr %17, align 4, !tbaa !14
  br label %87

87:                                               ; preds = %82, %79
  %.1 = phi i32 [ 1, %82 ], [ %.0, %79 ]
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %3) #3
  ret i32 %.1
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef) local_unnamed_addr #2

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) local_unnamed_addr #2

declare i32 @SDMMC_CmdBlockLength(ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Enable(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Disable(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 28, !7, i64 32, !11, i64 40, !7, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !12, i64 72, !8, i64 108, !8, i64 124}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!13 = !{!6, !11, i64 72}
!14 = !{!6, !11, i64 68}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 56}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !8, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !8, i64 132, !11, i64 1020}
!18 = !{!11, !11, i64 0}
!19 = !{!10, !11, i64 8}
!20 = !{!6, !11, i64 20}
!21 = !{!10, !11, i64 12}
!22 = !{!6, !11, i64 24}
!23 = !{!10, !11, i64 16}
!24 = !{!6, !11, i64 104}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass