; LLVM IR from ctlst-tech/catpilot :: os/freertos/memmang (heap_5)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.A_BLOCK_LINK = type { ptr, i64 }
%struct.HeapRegion = type { ptr, i64 }

@pxEnd = external hidden global ptr, align 8
@xBlockAllocatedBit = external hidden global i64, align 8
@xFreeBytesRemaining = external hidden global i64, align 8
@xStart = external hidden global %struct.A_BLOCK_LINK, align 8
@xMinimumEverFreeBytesRemaining = external hidden global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @vPortDefineHeapRegions(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store ptr null, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %11 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  %13 = zext i1 %12 to i32
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %17

15:                                               ; preds = %1
  call void @vPortRaiseBASEPRI()
  br label %16

16:                                               ; preds = %16, %15
  br label %16

17:                                               ; preds = %1
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = load i64, ptr %8, align 8, !tbaa !9
  %20 = getelementptr inbounds %struct.HeapRegion, ptr %18, i64 %19
  store ptr %20, ptr %10, align 8, !tbaa !5
  br label %21

21:                                               ; preds = %106, %17
  %22 = load ptr, ptr %10, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.HeapRegion, ptr %22, i32 0, i32 1
  %24 = load i64, ptr %23, align 8, !tbaa !11
  %25 = icmp ugt i64 %24, 0
  br i1 %25, label %26, label %117

26:                                               ; preds = %21
  %27 = load ptr, ptr %10, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.HeapRegion, ptr %27, i32 0, i32 1
  %29 = load i64, ptr %28, align 8, !tbaa !11
  store i64 %29, ptr %6, align 8, !tbaa !9
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.HeapRegion, ptr %30, i32 0, i32 0
  %32 = load ptr, ptr %31, align 8, !tbaa !13
  %33 = ptrtoint ptr %32 to i64
  store i64 %33, ptr %9, align 8, !tbaa !9
  %34 = load i64, ptr %9, align 8, !tbaa !9
  %35 = and i64 %34, 7
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %50

37:                                               ; preds = %26
  %38 = load i64, ptr %9, align 8, !tbaa !9
  %39 = add i64 %38, 7
  store i64 %39, ptr %9, align 8, !tbaa !9
  %40 = load i64, ptr %9, align 8, !tbaa !9
  %41 = and i64 %40, -8
  store i64 %41, ptr %9, align 8, !tbaa !9
  %42 = load i64, ptr %9, align 8, !tbaa !9
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.HeapRegion, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !13
  %46 = ptrtoint ptr %45 to i64
  %47 = sub i64 %42, %46
  %48 = load i64, ptr %6, align 8, !tbaa !9
  %49 = sub i64 %48, %47
  store i64 %49, ptr %6, align 8, !tbaa !9
  br label %50

50:                                               ; preds = %37, %26
  %51 = load i64, ptr %9, align 8, !tbaa !9
  store i64 %51, ptr %5, align 8, !tbaa !9
  %52 = load i64, ptr %8, align 8, !tbaa !9
  %53 = icmp eq i64 %52, 0
  br i1 %53, label %54, label %57

54:                                               ; preds = %50
  %55 = load i64, ptr %5, align 8, !tbaa !9
  %56 = inttoptr i64 %55 to ptr
  store ptr %56, ptr @xStart, align 8, !tbaa !14
  store i64 0, ptr getelementptr inbounds (%struct.A_BLOCK_LINK, ptr @xStart, i32 0, i32 1), align 8, !tbaa !16
  br label %74

57:                                               ; preds = %50
  %58 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %59 = icmp ne ptr %58, null
  %60 = zext i1 %59 to i32
  %61 = icmp eq i32 %60, 0
  br i1 %61, label %62, label %64

62:                                               ; preds = %57
  call void @vPortRaiseBASEPRI()
  br label %63

63:                                               ; preds = %63, %62
  br label %63

64:                                               ; preds = %57
  %65 = load i64, ptr %9, align 8, !tbaa !9
  %66 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %67 = ptrtoint ptr %66 to i64
  %68 = icmp ugt i64 %65, %67
  %69 = zext i1 %68 to i32
  %70 = icmp eq i32 %69, 0
  br i1 %70, label %71, label %73

71:                                               ; preds = %64
  call void @vPortRaiseBASEPRI()
  br label %72

72:                                               ; preds = %72, %71
  br label %72

73:                                               ; preds = %64
  br label %74

74:                                               ; preds = %73, %54
  %75 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  store ptr %75, ptr %4, align 8, !tbaa !5
  %76 = load i64, ptr %5, align 8, !tbaa !9
  %77 = load i64, ptr %6, align 8, !tbaa !9
  %78 = add i64 %76, %77
  store i64 %78, ptr %9, align 8, !tbaa !9
  %79 = load i64, ptr %9, align 8, !tbaa !9
  %80 = sub i64 %79, 16
  store i64 %80, ptr %9, align 8, !tbaa !9
  %81 = load i64, ptr %9, align 8, !tbaa !9
  %82 = and i64 %81, -8
  store i64 %82, ptr %9, align 8, !tbaa !9
  %83 = load i64, ptr %9, align 8, !tbaa !9
  %84 = inttoptr i64 %83 to ptr
  store ptr %84, ptr @pxEnd, align 8, !tbaa !5
  %85 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %85, i32 0, i32 1
  store i64 0, ptr %86, align 8, !tbaa !16
  %87 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %87, i32 0, i32 0
  store ptr null, ptr %88, align 8, !tbaa !14
  %89 = load i64, ptr %5, align 8, !tbaa !9
  %90 = inttoptr i64 %89 to ptr
  store ptr %90, ptr %3, align 8, !tbaa !5
  %91 = load i64, ptr %9, align 8, !tbaa !9
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = ptrtoint ptr %92 to i64
  %94 = sub i64 %91, %93
  %95 = load ptr, ptr %3, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %95, i32 0, i32 1
  store i64 %94, ptr %96, align 8, !tbaa !16
  %97 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %98, i32 0, i32 0
  store ptr %97, ptr %99, align 8, !tbaa !14
  %100 = load ptr, ptr %4, align 8, !tbaa !5
  %101 = icmp ne ptr %100, null
  br i1 %101, label %102, label %106

102:                                              ; preds = %74
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  %104 = load ptr, ptr %4, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %104, i32 0, i32 0
  store ptr %103, ptr %105, align 8, !tbaa !14
  br label %106

106:                                              ; preds = %102, %74
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.A_BLOCK_LINK, ptr %107, i32 0, i32 1
  %109 = load i64, ptr %108, align 8, !tbaa !16
  %110 = load i64, ptr %7, align 8, !tbaa !9
  %111 = add i64 %110, %109
  store i64 %111, ptr %7, align 8, !tbaa !9
  %112 = load i64, ptr %8, align 8, !tbaa !9
  %113 = add nsw i64 %112, 1
  store i64 %113, ptr %8, align 8, !tbaa !9
  %114 = load ptr, ptr %2, align 8, !tbaa !5
  %115 = load i64, ptr %8, align 8, !tbaa !9
  %116 = getelementptr inbounds %struct.HeapRegion, ptr %114, i64 %115
  store ptr %116, ptr %10, align 8, !tbaa !5
  br label %21, !llvm.loop !17

117:                                              ; preds = %21
  %118 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %118, ptr @xMinimumEverFreeBytesRemaining, align 8, !tbaa !9
  %119 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %119, ptr @xFreeBytesRemaining, align 8, !tbaa !9
  %120 = load i64, ptr %7, align 8, !tbaa !9
  %121 = icmp eq i64 %120, 0
  br i1 %121, label %122, label %124

122:                                              ; preds = %117
  call void @vPortRaiseBASEPRI()
  br label %123

123:                                              ; preds = %123, %122
  br label %123

124:                                              ; preds = %117
  store i64 -9223372036854775808, ptr @xBlockAllocatedBit, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"HeapRegion", !6, i64 0, !10, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"A_BLOCK_LINK", !6, i64 0, !10, i64 8}
!16 = !{!15, !10, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.A_BLOCK_LINK = type { ptr, i64 }
%struct.HeapRegion = type { ptr, i64 }

@pxEnd = external hidden local_unnamed_addr global ptr, align 8
@xBlockAllocatedBit = external hidden local_unnamed_addr global i64, align 8
@xFreeBytesRemaining = external hidden local_unnamed_addr global i64, align 8
@xStart = external hidden local_unnamed_addr global %struct.A_BLOCK_LINK, align 8
@xMinimumEverFreeBytesRemaining = external hidden local_unnamed_addr global i64, align 8

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @vPortDefineHeapRegions(ptr nocapture noundef readonly %0) local_unnamed_addr #1 {
  %2 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %.not = icmp eq ptr %2, null
  br i1 %.not, label %.preheader, label %22

.preheader:                                       ; preds = %1
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = load i64, ptr %3, align 8, !tbaa !9
  %.not4148 = icmp eq i64 %4, 0
  br i1 %.not4148, label %._crit_edge.thread, label %5

._crit_edge.thread:                               ; preds = %.preheader
  store i64 0, ptr @xMinimumEverFreeBytesRemaining, align 8, !tbaa !12
  store i64 0, ptr @xFreeBytesRemaining, align 8, !tbaa !12
  br label %49

5:                                                ; preds = %.preheader
  %6 = load ptr, ptr %0, align 8, !tbaa !13
  %7 = ptrtoint ptr %6 to i64
  %8 = and i64 %7, 7
  %.not42.peel = icmp eq i64 %8, 0
  %9 = add i64 %7, 7
  %10 = and i64 %9, -8
  %.neg.peel = sub i64 %7, %10
  %11 = select i1 %.not42.peel, i64 0, i64 %.neg.peel
  %12 = inttoptr i64 %10 to ptr
  store ptr %12, ptr @xStart, align 8, !tbaa !14
  store i64 0, ptr getelementptr inbounds (i8, ptr @xStart, i64 8), align 8, !tbaa !16
  %.038.peel = add i64 %10, %4
  %13 = add i64 %.038.peel, %11
  %14 = and i64 %13, -8
  %15 = add i64 %14, -16
  %16 = inttoptr i64 %15 to ptr
  store ptr %16, ptr @pxEnd, align 8, !tbaa !5
  %17 = sub i64 %15, %10
  %18 = getelementptr inbounds i8, ptr %12, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %16, i8 0, i64 16, i1 false)
  store i64 %17, ptr %18, align 8, !tbaa !16
  %19 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  store ptr %19, ptr %12, align 8, !tbaa !14
  %20 = getelementptr inbounds i8, ptr %0, i64 24
  %21 = load i64, ptr %20, align 8, !tbaa !9
  %.not41.peel = icmp eq i64 %21, 0
  br i1 %.not41.peel, label %._crit_edge, label %.lr.ph.peel.next

22:                                               ; preds = %1
  tail call void @vPortRaiseBASEPRI()
  br label %23

23:                                               ; preds = %23, %22
  br label %23

.lr.ph.peel.next:                                 ; preds = %5, %36
  %24 = phi i64 [ %47, %36 ], [ %21, %5 ]
  %.03650 = phi i64 [ %45, %36 ], [ 1, %5 ]
  %.03749 = phi i64 [ %44, %36 ], [ %17, %5 ]
  %.051 = getelementptr inbounds %struct.HeapRegion, ptr %0, i64 %.03650
  %25 = load ptr, ptr %.051, align 8, !tbaa !13
  %26 = ptrtoint ptr %25 to i64
  %27 = and i64 %26, 7
  %.not42 = icmp eq i64 %27, 0
  %28 = add i64 %26, 7
  %29 = and i64 %28, -8
  %.neg = sub i64 %26, %29
  %30 = select i1 %.not42, i64 0, i64 %.neg
  %31 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  %.not43 = icmp eq ptr %31, null
  br i1 %.not43, label %.loopexit, label %33

.loopexit:                                        ; preds = %.lr.ph.peel.next
  tail call void @vPortRaiseBASEPRI()
  br label %32

32:                                               ; preds = %32, %.loopexit
  br label %32

33:                                               ; preds = %.lr.ph.peel.next
  %34 = ptrtoint ptr %31 to i64
  %.not44 = icmp ugt i64 %29, %34
  br i1 %.not44, label %36, label %.loopexit53

.loopexit53:                                      ; preds = %33
  tail call void @vPortRaiseBASEPRI()
  br label %35

35:                                               ; preds = %35, %.loopexit53
  br label %35

36:                                               ; preds = %33
  %.pre58 = inttoptr i64 %29 to ptr
  %.038 = add i64 %29, %24
  %37 = add i64 %.038, %30
  %38 = and i64 %37, -8
  %39 = add i64 %38, -16
  %40 = inttoptr i64 %39 to ptr
  store ptr %40, ptr @pxEnd, align 8, !tbaa !5
  %41 = sub i64 %39, %29
  %42 = getelementptr inbounds i8, ptr %.pre58, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %40, i8 0, i64 16, i1 false)
  store i64 %41, ptr %42, align 8, !tbaa !16
  %43 = load ptr, ptr @pxEnd, align 8, !tbaa !5
  store ptr %43, ptr %.pre58, align 8, !tbaa !14
  store ptr %.pre58, ptr %31, align 8, !tbaa !14
  %44 = add i64 %41, %.03749
  %45 = add nuw nsw i64 %.03650, 1
  %46 = getelementptr inbounds %struct.HeapRegion, ptr %0, i64 %45, i32 1
  %47 = load i64, ptr %46, align 8, !tbaa !9
  %.not41 = icmp eq i64 %47, 0
  br i1 %.not41, label %._crit_edge, label %.lr.ph.peel.next, !llvm.loop !17

._crit_edge:                                      ; preds = %36, %5
  %.037.lcssa = phi i64 [ %17, %5 ], [ %44, %36 ]
  store i64 %.037.lcssa, ptr @xMinimumEverFreeBytesRemaining, align 8, !tbaa !12
  store i64 %.037.lcssa, ptr @xFreeBytesRemaining, align 8, !tbaa !12
  %48 = icmp eq i64 %.037.lcssa, 0
  br i1 %48, label %49, label %51

49:                                               ; preds = %._crit_edge.thread, %._crit_edge
  tail call void @vPortRaiseBASEPRI()
  br label %50

50:                                               ; preds = %50, %49
  br label %50

51:                                               ; preds = %._crit_edge
  store i64 -9223372036854775808, ptr @xBlockAllocatedBit, align 8, !tbaa !12
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"HeapRegion", !6, i64 0, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"A_BLOCK_LINK", !6, i64 0, !11, i64 8}
!16 = !{!15, !11, i64 8}
!17 = distinct !{!17, !18, !19}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass