; LLVM IR from golems/ach :: src/achd (transport)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.achd_cx = type { %struct.achd_headers, i32, i32, i32, i32, ptr, i32, %struct.ach_channel, ptr }
%struct.achd_headers = type { ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i64, ptr, ptr, i32, i32, ptr }
%struct.ach_channel = type { %union.anon }
%union.anon = type { [16 x i64] }
%struct.achd_conn = type { i32, %struct.timespec, %struct.timespec, %struct.achd_headers, %struct.achd_headers, i32, i32, i32, i64, ptr, ptr, ptr }
%struct.timespec = type { i64, i64 }

@cx = external global %struct.achd_cx, align 8
@ach_verbosity = external global i32, align 4
@.str.6 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [22 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @ach_log(i32 noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @achd_push_tcp(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  br label %7

7:                                                ; preds = %75, %1
  %8 = load i32, ptr getelementptr inbounds (%struct.achd_cx, ptr @cx, i32 0, i32 6), align 8, !tbaa !9
  %9 = icmp ne i32 %8, 0
  %10 = xor i1 %9, true
  br i1 %10, label %11, label %76

11:                                               ; preds = %7
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  call void @get_frame(ptr noundef %12)
  %13 = load i32, ptr getelementptr inbounds (%struct.achd_cx, ptr @cx, i32 0, i32 6), align 8, !tbaa !9
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %11
  br label %76

16:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !15
  br label %17

17:                                               ; preds = %70, %16
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.achd_conn, ptr %18, i32 0, i32 9
  %20 = load ptr, ptr %19, align 8, !tbaa !16
  %21 = call i64 @ach_pipe_get_size(ptr noundef %20)
  %22 = add i64 16, %21
  store i64 %22, ptr %4, align 8, !tbaa !19
  %23 = load i32, ptr @ach_verbosity, align 4, !tbaa !15
  %24 = add nsw i32 5, %23
  %25 = icmp sle i32 7, %24
  br i1 %25, label %26, label %28

26:                                               ; preds = %17
  %27 = load i64, ptr %4, align 8, !tbaa !19
  call void (i32, ptr, ...) @ach_log(i32 noundef 7, ptr noundef @.str.6, i64 noundef %27)
  br label %28

28:                                               ; preds = %26, %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.achd_conn, ptr %29, i32 0, i32 6
  %31 = load i32, ptr %30, align 4, !tbaa !20
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.achd_conn, ptr %32, i32 0, i32 9
  %34 = load ptr, ptr %33, align 8, !tbaa !16
  %35 = load i64, ptr %4, align 8, !tbaa !19
  %36 = call i64 @achd_write(i32 noundef %31, ptr noundef %34, i64 noundef %35)
  store i64 %36, ptr %5, align 8, !tbaa !19
  %37 = load i64, ptr %5, align 8, !tbaa !19
  %38 = icmp slt i64 %37, 0
  br i1 %38, label %43, label %39

39:                                               ; preds = %28
  %40 = load i64, ptr %5, align 8, !tbaa !19
  %41 = load i64, ptr %4, align 8, !tbaa !19
  %42 = icmp ne i64 %40, %41
  br i1 %42, label %43, label %56

43:                                               ; preds = %39, %28
  %44 = load i32, ptr @ach_verbosity, align 4, !tbaa !15
  %45 = add nsw i32 5, %44
  %46 = icmp sle i32 3, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %43
  call void (i32, ptr, ...) @ach_log(i32 noundef 3, ptr noundef @.str.7)
  br label %48

48:                                               ; preds = %47, %43
  %49 = load i32, ptr getelementptr inbounds (%struct.achd_cx, ptr @cx, i32 0, i32 3), align 8, !tbaa !21
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %51, label %54

51:                                               ; preds = %48
  %52 = load ptr, ptr %2, align 8, !tbaa !5
  %53 = call i32 @achd_reconnect(ptr noundef %52)
  br label %55

54:                                               ; preds = %48
  store i32 1, ptr %6, align 4
  br label %58

55:                                               ; preds = %51
  br label %57

56:                                               ; preds = %39
  store i32 1, ptr %3, align 4, !tbaa !15
  br label %57

57:                                               ; preds = %56, %55
  store i32 0, ptr %6, align 4
  br label %58

58:                                               ; preds = %57, %54
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %59 = load i32, ptr %6, align 4
  switch i32 %59, label %73 [
    i32 0, label %60
  ]

60:                                               ; preds = %58
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %3, align 4, !tbaa !15
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %70, label %64

64:                                               ; preds = %61
  %65 = load i32, ptr getelementptr inbounds (%struct.achd_cx, ptr @cx, i32 0, i32 6), align 8, !tbaa !9
  %66 = icmp ne i32 %65, 0
  br i1 %66, label %70, label %67

67:                                               ; preds = %64
  %68 = load i32, ptr getelementptr inbounds (%struct.achd_cx, ptr @cx, i32 0, i32 3), align 8, !tbaa !21
  %69 = icmp ne i32 %68, 0
  br label %70

70:                                               ; preds = %67, %64, %61
  %71 = phi i1 [ false, %64 ], [ false, %61 ], [ %69, %67 ]
  br i1 %71, label %17, label %72, !llvm.loop !22

72:                                               ; preds = %70
  store i32 0, ptr %6, align 4
  br label %73

73:                                               ; preds = %72, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  %74 = load i32, ptr %6, align 4
  switch i32 %74, label %77 [
    i32 0, label %75
    i32 1, label %76
  ]

75:                                               ; preds = %73
  br label %7, !llvm.loop !24

76:                                               ; preds = %73, %15, %7
  ret void

77:                                               ; preds = %73
  unreachable
}

; Function Attrs: nounwind uwtable
declare hidden void @get_frame(ptr noundef) #2

declare i64 @ach_pipe_get_size(ptr noundef) #1

declare i64 @achd_write(i32 noundef, ptr noundef, i64 noundef) #1

declare i32 @achd_reconnect(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 112}
!10 = !{!"achd_cx", !11, i64 0, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !6, i64 104, !12, i64 112, !14, i64 120, !6, i64 248}
!11 = !{!"achd_headers", !6, i64 0, !6, i64 8, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !13, i64 48, !6, i64 56, !6, i64 64, !12, i64 72, !12, i64 76, !6, i64 80}
!12 = !{!"int", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"ach_channel", !7, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!17, !6, i64 240}
!17 = !{!"achd_conn", !12, i64 0, !18, i64 8, !18, i64 24, !11, i64 40, !11, i64 128, !12, i64 216, !12, i64 220, !12, i64 224, !13, i64 232, !6, i64 240, !6, i64 248, !6, i64 256}
!18 = !{!"timespec", !13, i64 0, !13, i64 8}
!19 = !{!13, !13, i64 0}
!20 = !{!17, !12, i64 220}
!21 = !{!10, !12, i64 96}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.achd_cx = type { %struct.achd_headers, i32, i32, i32, i32, ptr, i32, %struct.ach_channel, ptr }
%struct.achd_headers = type { ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i64, ptr, ptr, i32, i32, ptr }
%struct.ach_channel = type { %union.anon }
%union.anon = type { [16 x i64] }

@cx = external local_unnamed_addr global %struct.achd_cx, align 8
@ach_verbosity = external local_unnamed_addr global i32, align 4
@.str.6 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [22 x i8], align 1

declare void @ach_log(i32 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @achd_push_tcp(ptr noundef %0) local_unnamed_addr #1 {
  %.old = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 112), align 8, !tbaa !5
  %.not.old = icmp eq i32 %.old, 0
  br i1 %.not.old, label %.preheader35, label %.critedge.thread

.preheader35:                                     ; preds = %1
  %2 = getelementptr inbounds i8, ptr %0, i64 240
  %3 = getelementptr inbounds i8, ptr %0, i64 220
  tail call void @get_frame(ptr noundef %0)
  %4 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 112), align 8, !tbaa !5
  %.not1842 = icmp eq i32 %4, 0
  br i1 %.not1842, label %.preheader, label %.critedge.thread

.preheader:                                       ; preds = %.preheader35, %.preheader.backedge
  %5 = load ptr, ptr %2, align 8, !tbaa !14
  %6 = tail call i64 @ach_pipe_get_size(ptr noundef %5) #2
  %7 = add i64 %6, 16
  %8 = load i32, ptr @ach_verbosity, align 4, !tbaa !17
  %9 = icmp sgt i32 %8, 1
  br i1 %9, label %10, label %11

10:                                               ; preds = %.preheader
  tail call void (i32, ptr, ...) @ach_log(i32 noundef 7, ptr noundef nonnull @.str.6, i64 noundef %7) #2
  br label %11

11:                                               ; preds = %10, %.preheader
  %12 = load i32, ptr %3, align 4, !tbaa !18
  %13 = load ptr, ptr %2, align 8, !tbaa !14
  %14 = tail call i64 @achd_write(i32 noundef %12, ptr noundef %13, i64 noundef %7) #2
  %15 = icmp slt i64 %14, 0
  %.not19 = icmp ne i64 %14, %7
  %or.cond.not = select i1 %15, i1 true, i1 %.not19
  br i1 %or.cond.not, label %18, label %.thread

.thread:                                          ; preds = %11
  %16 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 112), align 8
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %.backedge, label %.critedge.thread

18:                                               ; preds = %11
  %19 = load i32, ptr @ach_verbosity, align 4, !tbaa !17
  %20 = icmp sgt i32 %19, -3
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  tail call void (i32, ptr, ...) @ach_log(i32 noundef 3, ptr noundef nonnull @.str.7) #2
  br label %22

22:                                               ; preds = %21, %18
  %23 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 96), align 8, !tbaa !19
  %.not20 = icmp eq i32 %23, 0
  br i1 %.not20, label %.critedge.thread, label %24

24:                                               ; preds = %22
  %25 = tail call i32 @achd_reconnect(ptr noundef nonnull %0) #2
  %26 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 112), align 8
  %27 = icmp eq i32 %26, 0
  %28 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 96), align 8
  %29 = icmp ne i32 %28, 0
  %or.cond3 = select i1 %27, i1 %29, i1 false
  br i1 %or.cond3, label %.preheader.backedge, label %.critedge

.preheader.backedge:                              ; preds = %24, %.backedge
  br label %.preheader, !llvm.loop !20

.critedge:                                        ; preds = %24
  br i1 %27, label %.backedge, label %.critedge.thread

.backedge:                                        ; preds = %.critedge, %.thread
  tail call void @get_frame(ptr noundef %0)
  %30 = load i32, ptr getelementptr inbounds (i8, ptr @cx, i64 112), align 8, !tbaa !5
  %.not18 = icmp eq i32 %30, 0
  br i1 %.not18, label %.preheader.backedge, label %.critedge.thread

.critedge.thread:                                 ; preds = %.thread, %.backedge, %.critedge, %22, %.preheader35, %1
  ret void
}

; Function Attrs: nounwind uwtable
declare hidden void @get_frame(ptr noundef) local_unnamed_addr #1

declare i64 @ach_pipe_get_size(ptr noundef) local_unnamed_addr #0

declare i64 @achd_write(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

declare i32 @achd_reconnect(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 112}
!6 = !{!"achd_cx", !7, i64 0, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !8, i64 104, !11, i64 112, !13, i64 120, !8, i64 248}
!7 = !{!"achd_headers", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !12, i64 48, !8, i64 56, !8, i64 64, !11, i64 72, !11, i64 76, !8, i64 80}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"ach_channel", !9, i64 0}
!14 = !{!15, !8, i64 240}
!15 = !{!"achd_conn", !11, i64 0, !16, i64 8, !16, i64 24, !7, i64 40, !7, i64 128, !11, i64 216, !11, i64 220, !11, i64 224, !12, i64 232, !8, i64 240, !8, i64 248, !8, i64 256}
!16 = !{!"timespec", !12, i64 0, !12, i64 8}
!17 = !{!11, !11, i64 0}
!18 = !{!15, !11, i64 220}
!19 = !{!6, !11, i64 96}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass