; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_adc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ADC_HandleTypeDef = type { ptr, %struct.ADC_InitTypeDef, ptr, i32, i32, i32, %struct.ADC_InjectionConfigTypeDef }
%struct.ADC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.ADC_OversamplingTypeDef }
%struct.ADC_OversamplingTypeDef = type { i32, i32, i32, i32 }
%struct.ADC_InjectionConfigTypeDef = type { i32, i32 }
%struct.ADC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADC_PollForEvent(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %10 = call i32 @HAL_GetTick()
  store i32 %10, ptr %8, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %64, %3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  %15 = getelementptr inbounds %struct.ADC_TypeDef, ptr %14, i32 0, i32 0
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = and i32 %16, %17
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = icmp eq i32 %18, %19
  %21 = zext i1 %20 to i32
  %22 = sext i32 %21 to i64
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %24, label %65

24:                                               ; preds = %11
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = icmp ne i32 %25, -1
  br i1 %26, label %27, label %64

27:                                               ; preds = %24
  %28 = call i32 @HAL_GetTick()
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = sub i32 %28, %29
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = icmp ugt i32 %30, %31
  br i1 %32, label %37, label %33

33:                                               ; preds = %27
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = zext i32 %34 to i64
  %36 = icmp eq i64 %35, 0
  br i1 %36, label %37, label %63

37:                                               ; preds = %33, %27
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !11
  %41 = getelementptr inbounds %struct.ADC_TypeDef, ptr %40, i32 0, i32 0
  %42 = load volatile i32, ptr %41, align 4, !tbaa !16
  %43 = load i32, ptr %6, align 4, !tbaa !9
  %44 = and i32 %42, %43
  %45 = load i32, ptr %6, align 4, !tbaa !9
  %46 = icmp eq i32 %44, %45
  %47 = zext i1 %46 to i32
  %48 = sext i32 %47 to i64
  %49 = icmp eq i64 %48, 0
  br i1 %49, label %50, label %62

50:                                               ; preds = %37
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %51, i32 0, i32 4
  %53 = load volatile i32, ptr %52, align 4, !tbaa !18
  %54 = zext i32 %53 to i64
  %55 = or i64 %54, 4
  %56 = trunc i64 %55 to i32
  store volatile i32 %56, ptr %52, align 4, !tbaa !18
  br label %57

57:                                               ; preds = %50
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %58, i32 0, i32 3
  store i32 0, ptr %59, align 8, !tbaa !19
  br label %60

60:                                               ; preds = %57
  br label %61

61:                                               ; preds = %60
  store i32 3, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %151

62:                                               ; preds = %37
  br label %63

63:                                               ; preds = %62, %33
  br label %64

64:                                               ; preds = %63, %24
  br label %11, !llvm.loop !20

65:                                               ; preds = %11
  %66 = load i32, ptr %6, align 4, !tbaa !9
  switch i32 %66, label %126 [
    i32 2, label %67
    i32 128, label %78
    i32 256, label %89
    i32 512, label %100
    i32 1024, label %111
  ]

67:                                               ; preds = %65
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %68, i32 0, i32 4
  %70 = load volatile i32, ptr %69, align 4, !tbaa !18
  %71 = zext i32 %70 to i64
  %72 = or i64 %71, 2048
  %73 = trunc i64 %72 to i32
  store volatile i32 %73, ptr %69, align 4, !tbaa !18
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %74, i32 0, i32 0
  %76 = load ptr, ptr %75, align 8, !tbaa !11
  %77 = getelementptr inbounds %struct.ADC_TypeDef, ptr %76, i32 0, i32 0
  store volatile i32 2, ptr %77, align 4, !tbaa !16
  br label %150

78:                                               ; preds = %65
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %79, i32 0, i32 4
  %81 = load volatile i32, ptr %80, align 4, !tbaa !18
  %82 = zext i32 %81 to i64
  %83 = or i64 %82, 65536
  %84 = trunc i64 %83 to i32
  store volatile i32 %84, ptr %80, align 4, !tbaa !18
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %85, i32 0, i32 0
  %87 = load ptr, ptr %86, align 8, !tbaa !11
  %88 = getelementptr inbounds %struct.ADC_TypeDef, ptr %87, i32 0, i32 0
  store volatile i32 128, ptr %88, align 4, !tbaa !16
  br label %150

89:                                               ; preds = %65
  %90 = load ptr, ptr %5, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %90, i32 0, i32 4
  %92 = load volatile i32, ptr %91, align 4, !tbaa !18
  %93 = zext i32 %92 to i64
  %94 = or i64 %93, 131072
  %95 = trunc i64 %94 to i32
  store volatile i32 %95, ptr %91, align 4, !tbaa !18
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %96, i32 0, i32 0
  %98 = load ptr, ptr %97, align 8, !tbaa !11
  %99 = getelementptr inbounds %struct.ADC_TypeDef, ptr %98, i32 0, i32 0
  store volatile i32 256, ptr %99, align 4, !tbaa !16
  br label %150

100:                                              ; preds = %65
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %101, i32 0, i32 4
  %103 = load volatile i32, ptr %102, align 4, !tbaa !18
  %104 = zext i32 %103 to i64
  %105 = or i64 %104, 262144
  %106 = trunc i64 %105 to i32
  store volatile i32 %106, ptr %102, align 4, !tbaa !18
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %107, i32 0, i32 0
  %109 = load ptr, ptr %108, align 8, !tbaa !11
  %110 = getelementptr inbounds %struct.ADC_TypeDef, ptr %109, i32 0, i32 0
  store volatile i32 512, ptr %110, align 4, !tbaa !16
  br label %150

111:                                              ; preds = %65
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %112, i32 0, i32 4
  %114 = load volatile i32, ptr %113, align 4, !tbaa !18
  %115 = zext i32 %114 to i64
  %116 = or i64 %115, 16384
  %117 = trunc i64 %116 to i32
  store volatile i32 %117, ptr %113, align 4, !tbaa !18
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %118, i32 0, i32 5
  %120 = load volatile i32, ptr %119, align 8, !tbaa !22
  %121 = or i32 %120, 8
  store volatile i32 %121, ptr %119, align 8, !tbaa !22
  %122 = load ptr, ptr %5, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %122, i32 0, i32 0
  %124 = load ptr, ptr %123, align 8, !tbaa !11
  %125 = getelementptr inbounds %struct.ADC_TypeDef, ptr %124, i32 0, i32 0
  store volatile i32 1024, ptr %125, align 4, !tbaa !16
  br label %150

126:                                              ; preds = %65
  %127 = load ptr, ptr %5, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %127, i32 0, i32 1
  %129 = getelementptr inbounds %struct.ADC_InitTypeDef, ptr %128, i32 0, i32 12
  %130 = load i32, ptr %129, align 8, !tbaa !23
  %131 = zext i32 %130 to i64
  %132 = icmp eq i64 %131, 0
  br i1 %132, label %133, label %144

133:                                              ; preds = %126
  %134 = load ptr, ptr %5, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %134, i32 0, i32 4
  %136 = load volatile i32, ptr %135, align 4, !tbaa !18
  %137 = zext i32 %136 to i64
  %138 = or i64 %137, 1024
  %139 = trunc i64 %138 to i32
  store volatile i32 %139, ptr %135, align 4, !tbaa !18
  %140 = load ptr, ptr %5, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %140, i32 0, i32 5
  %142 = load volatile i32, ptr %141, align 8, !tbaa !22
  %143 = or i32 %142, 2
  store volatile i32 %143, ptr %141, align 8, !tbaa !22
  br label %149

144:                                              ; preds = %126
  %145 = load ptr, ptr %5, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %145, i32 0, i32 0
  %147 = load ptr, ptr %146, align 8, !tbaa !11
  %148 = getelementptr inbounds %struct.ADC_TypeDef, ptr %147, i32 0, i32 0
  store volatile i32 16, ptr %148, align 4, !tbaa !16
  br label %149

149:                                              ; preds = %144, %133
  br label %150

150:                                              ; preds = %149, %111, %100, %89, %78, %67
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %151

151:                                              ; preds = %150, %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %152 = load i32, ptr %4, align 4
  ret i32 %152
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 88, !10, i64 96, !10, i64 100, !10, i64 104, !15, i64 108}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !14, i64 60}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!15 = !{!"", !10, i64 0, !10, i64 4}
!16 = !{!17, !10, i64 0}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !7, i64 80, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !7, i64 112, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !7, i64 144, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200}
!18 = !{!12, !10, i64 100}
!19 = !{!12, !10, i64 96}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!12, !10, i64 104}
!23 = !{!12, !10, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_ADC_PollForEvent(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = tail call i32 @HAL_GetTick() #2
  %5 = load ptr, ptr %0, align 8, !tbaa !5
  %6 = load volatile i32, ptr %5, align 4, !tbaa !14
  %7 = and i32 %6, %1
  %.not34 = icmp eq i32 %7, %1
  br i1 %.not34, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  switch i32 %2, label %.lr.ph.split.split [
    i32 -1, label %.lr.ph.split.us
    i32 0, label %.lr.ph.split.split.us
  ]

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
  %8 = load volatile i32, ptr %5, align 4, !tbaa !14
  %9 = and i32 %8, %1
  %.not.us = icmp eq i32 %9, %1
  br i1 %.not.us, label %._crit_edge, label %.lr.ph.split.us, !llvm.loop !16

.lr.ph.split.split.us:                            ; preds = %.lr.ph, %14
  %10 = tail call i32 @HAL_GetTick() #2
  %11 = load ptr, ptr %0, align 8, !tbaa !5
  %12 = load volatile i32, ptr %11, align 4, !tbaa !14
  %13 = and i32 %12, %1
  %.not32.us = icmp eq i32 %13, %1
  br i1 %.not32.us, label %14, label %.split.us

14:                                               ; preds = %.lr.ph.split.split.us
  %15 = load volatile i32, ptr %11, align 4, !tbaa !14
  %16 = and i32 %15, %1
  %.not.us35 = icmp eq i32 %16, %1
  br i1 %.not.us35, label %._crit_edge, label %.lr.ph.split.split.us, !llvm.loop !16

.lr.ph.split.split:                               ; preds = %.lr.ph, %27
  %17 = tail call i32 @HAL_GetTick() #2
  %18 = sub i32 %17, %4
  %19 = icmp ugt i32 %18, %2
  %.pre = load ptr, ptr %0, align 8, !tbaa !5
  br i1 %19, label %20, label %27

20:                                               ; preds = %.lr.ph.split.split
  %21 = load volatile i32, ptr %.pre, align 4, !tbaa !14
  %22 = and i32 %21, %1
  %.not32 = icmp eq i32 %22, %1
  br i1 %.not32, label %27, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split.us, %20
  %23 = getelementptr inbounds i8, ptr %0, i64 100
  %24 = load volatile i32, ptr %23, align 4, !tbaa !18
  %25 = or i32 %24, 4
  store volatile i32 %25, ptr %23, align 4, !tbaa !18
  %26 = getelementptr inbounds i8, ptr %0, i64 96
  store i32 0, ptr %26, align 8, !tbaa !19
  br label %65

27:                                               ; preds = %.lr.ph.split.split, %20
  %28 = load volatile i32, ptr %.pre, align 4, !tbaa !14
  %29 = and i32 %28, %1
  %.not = icmp eq i32 %29, %1
  br i1 %.not, label %._crit_edge, label %.lr.ph.split.split, !llvm.loop !16

._crit_edge:                                      ; preds = %14, %.lr.ph.split.us, %27, %3
  %.lcssa = phi ptr [ %5, %3 ], [ %.pre, %27 ], [ %5, %.lr.ph.split.us ], [ %11, %14 ]
  switch i32 %1, label %53 [
    i32 2, label %30
    i32 128, label %34
    i32 256, label %38
    i32 512, label %42
    i32 1024, label %46
  ]

30:                                               ; preds = %._crit_edge
  %31 = getelementptr inbounds i8, ptr %0, i64 100
  %32 = load volatile i32, ptr %31, align 4, !tbaa !18
  %33 = or i32 %32, 2048
  store volatile i32 %33, ptr %31, align 4, !tbaa !18
  store volatile i32 2, ptr %.lcssa, align 4, !tbaa !14
  br label %65

34:                                               ; preds = %._crit_edge
  %35 = getelementptr inbounds i8, ptr %0, i64 100
  %36 = load volatile i32, ptr %35, align 4, !tbaa !18
  %37 = or i32 %36, 65536
  store volatile i32 %37, ptr %35, align 4, !tbaa !18
  store volatile i32 128, ptr %.lcssa, align 4, !tbaa !14
  br label %65

38:                                               ; preds = %._crit_edge
  %39 = getelementptr inbounds i8, ptr %0, i64 100
  %40 = load volatile i32, ptr %39, align 4, !tbaa !18
  %41 = or i32 %40, 131072
  store volatile i32 %41, ptr %39, align 4, !tbaa !18
  store volatile i32 256, ptr %.lcssa, align 4, !tbaa !14
  br label %65

42:                                               ; preds = %._crit_edge
  %43 = getelementptr inbounds i8, ptr %0, i64 100
  %44 = load volatile i32, ptr %43, align 4, !tbaa !18
  %45 = or i32 %44, 262144
  store volatile i32 %45, ptr %43, align 4, !tbaa !18
  store volatile i32 512, ptr %.lcssa, align 4, !tbaa !14
  br label %65

46:                                               ; preds = %._crit_edge
  %47 = getelementptr inbounds i8, ptr %0, i64 100
  %48 = load volatile i32, ptr %47, align 4, !tbaa !18
  %49 = or i32 %48, 16384
  store volatile i32 %49, ptr %47, align 4, !tbaa !18
  %50 = getelementptr inbounds i8, ptr %0, i64 104
  %51 = load volatile i32, ptr %50, align 8, !tbaa !20
  %52 = or i32 %51, 8
  store volatile i32 %52, ptr %50, align 8, !tbaa !20
  store volatile i32 1024, ptr %.lcssa, align 4, !tbaa !14
  br label %65

53:                                               ; preds = %._crit_edge
  %54 = getelementptr inbounds i8, ptr %0, i64 56
  %55 = load i32, ptr %54, align 8, !tbaa !21
  %56 = icmp eq i32 %55, 0
  br i1 %56, label %57, label %64

57:                                               ; preds = %53
  %58 = getelementptr inbounds i8, ptr %0, i64 100
  %59 = load volatile i32, ptr %58, align 4, !tbaa !18
  %60 = or i32 %59, 1024
  store volatile i32 %60, ptr %58, align 4, !tbaa !18
  %61 = getelementptr inbounds i8, ptr %0, i64 104
  %62 = load volatile i32, ptr %61, align 8, !tbaa !20
  %63 = or i32 %62, 2
  store volatile i32 %63, ptr %61, align 8, !tbaa !20
  br label %65

64:                                               ; preds = %53
  store volatile i32 16, ptr %.lcssa, align 4, !tbaa !14
  br label %65

65:                                               ; preds = %30, %34, %38, %42, %46, %64, %57, %.split.us
  %.0 = phi i32 [ 3, %.split.us ], [ 0, %57 ], [ 0, %64 ], [ 0, %46 ], [ 0, %42 ], [ 0, %38 ], [ 0, %34 ], [ 0, %30 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104, !13, i64 108}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !12, i64 60}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!13 = !{!"", !11, i64 0, !11, i64 4}
!14 = !{!15, !11, i64 0}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !8, i64 80, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !8, i64 112, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !8, i64 144, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!6, !11, i64 100}
!19 = !{!6, !11, i64 96}
!20 = !{!6, !11, i64 104}
!21 = !{!6, !11, i64 56}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass