; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_pwr_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PWREx_AVDTypeDef = type { i32, i32 }
%struct.EXTI_TypeDef = type { i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWREx_ConfigAVD(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 4, !tbaa !9
  %4 = zext i32 %3 to i64
  %5 = and i64 %4, -393217
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.PWREx_AVDTypeDef, ptr %6, i32 0, i32 0
  %8 = load i32, ptr %7, align 4, !tbaa !12
  %9 = zext i32 %8 to i64
  %10 = or i64 %5, %9
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr inttoptr (i64 1476544512 to ptr), align 4, !tbaa !9
  %12 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 22), align 4, !tbaa !14
  %13 = zext i32 %12 to i64
  %14 = and i64 %13, -65537
  %15 = trunc i64 %14 to i32
  store volatile i32 %15, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 22), align 4, !tbaa !14
  %16 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 21), align 4, !tbaa !16
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, -65537
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 21), align 4, !tbaa !16
  %20 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !17
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, -65537
  %23 = trunc i64 %22 to i32
  store volatile i32 %23, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !17
  %24 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !18
  %25 = zext i32 %24 to i64
  %26 = and i64 %25, -65537
  %27 = trunc i64 %26 to i32
  store volatile i32 %27, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !18
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.PWREx_AVDTypeDef, ptr %28, i32 0, i32 1
  %30 = load i32, ptr %29, align 4, !tbaa !19
  %31 = and i32 %30, 65536
  %32 = icmp eq i32 %31, 65536
  br i1 %32, label %33, label %38

33:                                               ; preds = %1
  %34 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 21), align 4, !tbaa !16
  %35 = zext i32 %34 to i64
  %36 = or i64 %35, 65536
  %37 = trunc i64 %36 to i32
  store volatile i32 %37, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 21), align 4, !tbaa !16
  br label %38

38:                                               ; preds = %33, %1
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.PWREx_AVDTypeDef, ptr %39, i32 0, i32 1
  %41 = load i32, ptr %40, align 4, !tbaa !19
  %42 = and i32 %41, 131072
  %43 = icmp eq i32 %42, 131072
  br i1 %43, label %44, label %49

44:                                               ; preds = %38
  %45 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 22), align 4, !tbaa !14
  %46 = zext i32 %45 to i64
  %47 = or i64 %46, 65536
  %48 = trunc i64 %47 to i32
  store volatile i32 %48, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 22), align 4, !tbaa !14
  br label %49

49:                                               ; preds = %44, %38
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.PWREx_AVDTypeDef, ptr %50, i32 0, i32 1
  %52 = load i32, ptr %51, align 4, !tbaa !19
  %53 = and i32 %52, 1
  %54 = icmp eq i32 %53, 1
  br i1 %54, label %55, label %60

55:                                               ; preds = %49
  %56 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !17
  %57 = zext i32 %56 to i64
  %58 = or i64 %57, 65536
  %59 = trunc i64 %58 to i32
  store volatile i32 %59, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !17
  br label %60

60:                                               ; preds = %55, %49
  %61 = load ptr, ptr %2, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.PWREx_AVDTypeDef, ptr %61, i32 0, i32 1
  %63 = load i32, ptr %62, align 4, !tbaa !19
  %64 = and i32 %63, 2
  %65 = icmp eq i32 %64, 2
  br i1 %65, label %66, label %71

66:                                               ; preds = %60
  %67 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !18
  %68 = zext i32 %67 to i64
  %69 = or i64 %68, 65536
  %70 = trunc i64 %69 to i32
  store volatile i32 %70, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !18
  br label %71

71:                                               ; preds = %66, %60
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4}
!14 = !{!15, !11, i64 132}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !7, i64 24, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !7, i64 56, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !7, i64 88, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168}
!16 = !{!15, !11, i64 128}
!17 = !{!15, !11, i64 0}
!18 = !{!15, !11, i64 4}
!19 = !{!13, !11, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @HAL_PWREx_ConfigAVD(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 2048, !tbaa !5
  %3 = and i32 %2, -393217
  %4 = load i32, ptr %0, align 4, !tbaa !10
  %5 = or i32 %3, %4
  store volatile i32 %5, ptr inttoptr (i64 1476544512 to ptr), align 2048, !tbaa !5
  %6 = load volatile i32, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !12
  %7 = and i32 %6, -65537
  store volatile i32 %7, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !12
  %8 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !14
  %9 = and i32 %8, -65537
  store volatile i32 %9, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !14
  %10 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !15
  %11 = and i32 %10, -65537
  store volatile i32 %11, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !15
  %12 = load volatile i32, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !16
  %13 = and i32 %12, -65537
  store volatile i32 %13, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !17
  %16 = and i32 %15, 65536
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %20, label %17

17:                                               ; preds = %1
  %18 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !14
  %19 = or i32 %18, 65536
  store volatile i32 %19, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !14
  br label %20

20:                                               ; preds = %17, %1
  %21 = and i32 %15, 131072
  %.not5 = icmp eq i32 %21, 0
  br i1 %.not5, label %25, label %22

22:                                               ; preds = %20
  %23 = load volatile i32, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !12
  %24 = or i32 %23, 65536
  store volatile i32 %24, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !12
  br label %25

25:                                               ; preds = %22, %20
  %26 = and i32 %15, 1
  %.not6 = icmp eq i32 %26, 0
  br i1 %.not6, label %30, label %27

27:                                               ; preds = %25
  %28 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !15
  %29 = or i32 %28, 65536
  store volatile i32 %29, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !15
  br label %30

30:                                               ; preds = %27, %25
  %31 = and i32 %15, 2
  %.not7 = icmp eq i32 %31, 0
  br i1 %.not7, label %35, label %32

32:                                               ; preds = %30
  %33 = load volatile i32, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !16
  %34 = or i32 %33, 65536
  store volatile i32 %34, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !16
  br label %35

35:                                               ; preds = %32, %30
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"", !7, i64 0, !7, i64 4}
!12 = !{!13, !7, i64 132}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !8, i64 56, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168}
!14 = !{!13, !7, i64 128}
!15 = !{!13, !7, i64 0}
!16 = !{!13, !7, i64 4}
!17 = !{!11, !7, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass