; LLVM IR from AlgoGenesis/C :: Mathematical Algorithms/Divisor Algorithms (Program)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @count_divisors(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 1, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 2, ptr %5, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %34, %1
  %7 = load i32, ptr %5, align 4, !tbaa !5
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = mul nsw i32 %7, %8
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = icmp sle i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %37

13:                                               ; preds = %6
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %19, %13
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = srem i32 %15, %16
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %25

19:                                               ; preds = %14
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = sdiv i32 %21, %20
  store i32 %22, ptr %2, align 4, !tbaa !5
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %4, align 4, !tbaa !5
  br label %14, !llvm.loop !9

25:                                               ; preds = %14
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %25
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = mul nsw i32 %31, %30
  store i32 %32, ptr %3, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %28, %25
  br label %34

34:                                               ; preds = %33
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %5, align 4, !tbaa !5
  br label %6, !llvm.loop !11

37:                                               ; preds = %12
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = icmp sgt i32 %38, 1
  br i1 %39, label %40, label %43

40:                                               ; preds = %37
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = mul nsw i32 %41, 2
  store i32 %42, ptr %3, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %40, %37
  %44 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %44
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local range(i32 1, -2147483648) i32 @count_divisors(i32 noundef %0) local_unnamed_addr #0 {
  %.not23 = icmp slt i32 %0, 4
  br i1 %.not23, label %._crit_edge27, label %.preheader

.preheader:                                       ; preds = %1, %._crit_edge
  %.026 = phi i32 [ %12, %._crit_edge ], [ 2, %1 ]
  %.01625 = phi i32 [ %11, %._crit_edge ], [ 1, %1 ]
  %.01724 = phi i32 [ %.118.lcssa, %._crit_edge ], [ %0, %1 ]
  %2 = srem i32 %.01724, %.026
  %3 = icmp eq i32 %2, 0
  br i1 %3, label %.lr.ph, label %._crit_edge

._crit_edge27:                                    ; preds = %._crit_edge, %1
  %.017.lcssa = phi i32 [ %0, %1 ], [ %.118.lcssa, %._crit_edge ]
  %.016.lcssa = phi i32 [ 1, %1 ], [ %11, %._crit_edge ]
  %4 = icmp sgt i32 %.017.lcssa, 1
  %5 = zext i1 %4 to i32
  %spec.select = shl nuw nsw i32 %.016.lcssa, %5
  ret i32 %spec.select

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.01521 = phi i32 [ %7, %.lr.ph ], [ 0, %.preheader ]
  %.11820 = phi i32 [ %6, %.lr.ph ], [ %.01724, %.preheader ]
  %6 = sdiv i32 %.11820, %.026
  %7 = add nuw nsw i32 %.01521, 1
  %8 = srem i32 %6, %.026
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %.118.lcssa = phi i32 [ %.01724, %.preheader ], [ %6, %.lr.ph ]
  %.015.lcssa = phi i32 [ 0, %.preheader ], [ %7, %.lr.ph ]
  %10 = add nuw nsw i32 %.015.lcssa, 1
  %11 = mul nuw nsw i32 %10, %.01625
  %12 = add nuw nsw i32 %.026, 1
  %13 = mul nuw nsw i32 %12, %12
  %.not = icmp sgt i32 %13, %.118.lcssa
  br i1 %.not, label %._crit_edge27, label %.preheader, !llvm.loop !7
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass