; LLVM IR from alekmaul/pvsneslib :: snes-examples/maps/DynamicMap (map64x64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext, i8 noundef zeroext) #0

declare void @consoleNocashMessage(ptr noundef, ...) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @getSprite64x64(i8 noundef zeroext %0, i8 noundef zeroext %1) #0 {
  %3 = alloca i16, align 2
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  store i8 %0, ptr %4, align 1, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !5
  %6 = load i8, ptr %4, align 1, !tbaa !5
  %7 = zext i8 %6 to i32
  %8 = icmp slt i32 %7, 32
  br i1 %8, label %9, label %17

9:                                                ; preds = %2
  %10 = load i8, ptr %5, align 1, !tbaa !5
  %11 = zext i8 %10 to i32
  %12 = icmp slt i32 %11, 32
  br i1 %12, label %13, label %17

13:                                               ; preds = %9
  %14 = load i8, ptr %4, align 1, !tbaa !5
  %15 = load i8, ptr %5, align 1, !tbaa !5
  %16 = call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %14, i8 noundef zeroext %15)
  store i16 %16, ptr %3, align 2
  br label %73

17:                                               ; preds = %9, %2
  %18 = load i8, ptr %4, align 1, !tbaa !5
  %19 = zext i8 %18 to i32
  %20 = icmp slt i32 %19, 64
  br i1 %20, label %21, label %35

21:                                               ; preds = %17
  %22 = load i8, ptr %5, align 1, !tbaa !5
  %23 = zext i8 %22 to i32
  %24 = icmp slt i32 %23, 32
  br i1 %24, label %25, label %35

25:                                               ; preds = %21
  %26 = load i8, ptr %4, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  %28 = sub nsw i32 %27, 32
  %29 = trunc i32 %28 to i8
  %30 = load i8, ptr %5, align 1, !tbaa !5
  %31 = zext i8 %30 to i32
  %32 = add nsw i32 %31, 32
  %33 = trunc i32 %32 to i8
  %34 = call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %29, i8 noundef zeroext %33)
  store i16 %34, ptr %3, align 2
  br label %73

35:                                               ; preds = %21, %17
  %36 = load i8, ptr %4, align 1, !tbaa !5
  %37 = zext i8 %36 to i32
  %38 = icmp slt i32 %37, 32
  br i1 %38, label %39, label %50

39:                                               ; preds = %35
  %40 = load i8, ptr %5, align 1, !tbaa !5
  %41 = zext i8 %40 to i32
  %42 = icmp slt i32 %41, 64
  br i1 %42, label %43, label %50

43:                                               ; preds = %39
  %44 = load i8, ptr %4, align 1, !tbaa !5
  %45 = load i8, ptr %5, align 1, !tbaa !5
  %46 = zext i8 %45 to i32
  %47 = add nsw i32 %46, 32
  %48 = trunc i32 %47 to i8
  %49 = call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %44, i8 noundef zeroext %48)
  store i16 %49, ptr %3, align 2
  br label %73

50:                                               ; preds = %39, %35
  %51 = load i8, ptr %4, align 1, !tbaa !5
  %52 = zext i8 %51 to i32
  %53 = icmp slt i32 %52, 64
  br i1 %53, label %54, label %68

54:                                               ; preds = %50
  %55 = load i8, ptr %5, align 1, !tbaa !5
  %56 = zext i8 %55 to i32
  %57 = icmp slt i32 %56, 64
  br i1 %57, label %58, label %68

58:                                               ; preds = %54
  %59 = load i8, ptr %4, align 1, !tbaa !5
  %60 = zext i8 %59 to i32
  %61 = sub nsw i32 %60, 32
  %62 = trunc i32 %61 to i8
  %63 = load i8, ptr %5, align 1, !tbaa !5
  %64 = zext i8 %63 to i32
  %65 = add nsw i32 %64, 64
  %66 = trunc i32 %65 to i8
  %67 = call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %62, i8 noundef zeroext %66)
  store i16 %67, ptr %3, align 2
  br label %73

68:                                               ; preds = %54, %50
  %69 = load i8, ptr %4, align 1, !tbaa !5
  %70 = zext i8 %69 to i32
  %71 = load i8, ptr %5, align 1, !tbaa !5
  %72 = zext i8 %71 to i32
  call void (ptr, ...) @consoleNocashMessage(ptr noundef @.str.1, i32 noundef %70, i32 noundef %72)
  store i16 0, ptr %3, align 2
  br label %73

73:                                               ; preds = %68, %58, %43, %25, %13
  %74 = load i16, ptr %3, align 2
  ret i16 %74
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @consoleNocashMessage(ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @getSprite64x64(i8 noundef zeroext %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = zext i8 %0 to i32
  %4 = icmp ult i8 %0, 32
  %5 = zext i8 %1 to i32
  %6 = or i8 %1, %0
  %or.cond = icmp ult i8 %6, 32
  br i1 %or.cond, label %7, label %9

7:                                                ; preds = %2
  %8 = tail call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %0, i8 noundef zeroext %1)
  br label %27

9:                                                ; preds = %2
  %10 = icmp ult i8 %1, 32
  %11 = icmp ult i8 %0, 64
  %or.cond5 = and i1 %11, %10
  br i1 %or.cond5, label %12, label %16

12:                                               ; preds = %9
  %13 = add nsw i8 %0, -32
  %14 = or disjoint i8 %1, 32
  %15 = tail call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %13, i8 noundef zeroext %14)
  br label %27

16:                                               ; preds = %9
  %17 = icmp ult i8 %1, 64
  %or.cond8 = and i1 %4, %17
  br i1 %or.cond8, label %18, label %21

18:                                               ; preds = %16
  %19 = add nuw nsw i8 %1, 32
  %20 = tail call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %0, i8 noundef zeroext %19)
  br label %27

21:                                               ; preds = %16
  %or.cond11 = icmp ult i8 %6, 64
  br i1 %or.cond11, label %22, label %26

22:                                               ; preds = %21
  %23 = add nsw i8 %0, -32
  %24 = or disjoint i8 %1, 64
  %25 = tail call zeroext i16 @getSpriteRaw64x64(i8 noundef zeroext %23, i8 noundef zeroext %24)
  br label %27

26:                                               ; preds = %21
  tail call void (ptr, ...) @consoleNocashMessage(ptr noundef nonnull @.str.1, i32 noundef %3, i32 noundef %5) #2
  br label %27

27:                                               ; preds = %26, %22, %18, %12, %7
  %.0 = phi i16 [ %8, %7 ], [ %15, %12 ], [ %20, %18 ], [ %25, %22 ], [ 0, %26 ]
  ret i16 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass