; LLVM IR from brpapa/algorithms :: notebook/math/optimized-prime-checking.ll (Z8is_primex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset<10000001>::reference" = type { ptr, i64 }

@primes = external dso_local global %"class.std::vector", align 8
@is_composite = external dso_local global { [156251 x i64] }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10000001EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<10000001>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(1250008), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10000001EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm10000001EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z8is_primex(i64 noundef %0) #2 {
  %2 = alloca i1, align 1
  %3 = alloca i64, align 8
  %4 = alloca %"class.std::bitset<10000001>::reference", align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  %7 = load i64, ptr %3, align 8, !tbaa !5
  %8 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) @primes) #3
  %9 = load i32, ptr %8, align 4, !tbaa !9
  %10 = sext i32 %9 to i64
  %11 = icmp sle i64 %7, %10
  br i1 %11, label %12, label %18

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #3
  %13 = load i64, ptr %3, align 8, !tbaa !5
  %14 = trunc i64 %13 to i32
  %15 = sext i32 %14 to i64
  call void @_ZNSt6bitsetILm10000001EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<10000001>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(1250008) @is_composite, i64 noundef %15)
  %16 = call noundef zeroext i1 @_ZNKSt6bitsetILm10000001EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  %17 = xor i1 %16, true
  store i1 %17, ptr %2, align 1
  call void @_ZNSt6bitsetILm10000001EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #3
  br label %50

18:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %44, %18
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %21) #3
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %25) #3
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = mul nsw i32 %23, %27
  %29 = sext i32 %28 to i64
  %30 = load i64, ptr %3, align 8, !tbaa !5
  %31 = icmp sle i64 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %19
  store i32 2, ptr %6, align 4
  br label %47

33:                                               ; preds = %19
  %34 = load i64, ptr %3, align 8, !tbaa !5
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %36) #3
  %38 = load i32, ptr %37, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = srem i64 %34, %39
  %41 = icmp eq i64 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %33
  store i1 false, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %47

43:                                               ; preds = %33
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %5, align 4, !tbaa !9
  br label %19, !llvm.loop !11

47:                                               ; preds = %42, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  %48 = load i32, ptr %6, align 4
  switch i32 %48, label %52 [
    i32 2, label %49
    i32 1, label %50
  ]

49:                                               ; preds = %47
  store i1 true, ptr %2, align 1
  br label %50

50:                                               ; preds = %49, %47, %12
  %51 = load i1, ptr %2, align 1
  ret i1 %51

52:                                               ; preds = %47
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset<10000001>::reference" = type { ptr, i64 }

@primes = external dso_local global %"class.std::vector", align 8
@is_composite = external dso_local global { [156251 x i64] }, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10000001EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<10000001>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(1250008), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10000001EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm10000001EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z8is_primex(i64 noundef %0) local_unnamed_addr #1 {
  %2 = alloca %"class.std::bitset<10000001>::reference", align 8
  %3 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) @primes) #2
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  %.not = icmp slt i64 %5, %0
  br i1 %.not, label %.preheader, label %12

.preheader:                                       ; preds = %1
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef 0) #2
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef 0) #2
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = mul nsw i32 %9, %7
  %11 = sext i32 %10 to i64
  %.not1314 = icmp sgt i64 %11, %0
  br i1 %.not1314, label %.loopexit, label %.lr.ph

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #2
  %sext = shl i64 %0, 32
  %13 = ashr exact i64 %sext, 32
  call void @_ZNSt6bitsetILm10000001EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10000001>::reference") align 8 %2, ptr noundef nonnull align 8 dereferenceable(1250008) @is_composite, i64 noundef %13)
  %14 = call noundef zeroext i1 @_ZNKSt6bitsetILm10000001EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %2) #2
  %15 = xor i1 %14, true
  call void @_ZNSt6bitsetILm10000001EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %2) #2
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #2
  br label %.loopexit

16:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %indvars.iv.next) #2
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %indvars.iv.next) #2
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = mul nsw i32 %20, %18
  %22 = sext i32 %21 to i64
  %.not13 = icmp sgt i64 %22, %0
  br i1 %.not13, label %.loopexit, label %.lr.ph, !llvm.loop !9

.lr.ph:                                           ; preds = %.preheader, %16
  %indvars.iv = phi i64 [ %indvars.iv.next, %16 ], [ 0, %.preheader ]
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %indvars.iv) #2
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = srem i64 %0, %25
  %.not19 = icmp ne i64 %26, 0
  br i1 %.not19, label %16, label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %16, %.preheader, %12
  %.1 = phi i1 [ %15, %12 ], [ true, %.preheader ], [ %.not19, %16 ], [ %.not19, %.lr.ph ]
  ret i1 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass