; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 28. Codechef Problems/CodeChef/CCSTART2/CodeChef_Cooking Machine (Solved)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isPowerx(i64 noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  br label %8

8:                                                ; preds = %74, %0
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = add nsw i64 %9, -1
  store i64 %10, ptr %2, align 8, !tbaa !5
  %11 = icmp ne i64 %9, 0
  br i1 %11, label %12, label %78

12:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %13 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %13, ptr noundef nonnull align 8 dereferenceable(8) %4)
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store i64 0, ptr %5, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %73, %12
  %16 = load i64, ptr %3, align 8, !tbaa !5
  %17 = load i64, ptr %4, align 8, !tbaa !5
  %18 = icmp ne i64 %16, %17
  br i1 %18, label %19, label %74

19:                                               ; preds = %15
  %20 = load i64, ptr %3, align 8, !tbaa !5
  %21 = load i64, ptr %4, align 8, !tbaa !5
  %22 = icmp sgt i64 %20, %21
  br i1 %22, label %23, label %39

23:                                               ; preds = %19
  %24 = load i64, ptr %3, align 8, !tbaa !5
  %25 = srem i64 %24, 2
  %26 = icmp eq i64 %25, 0
  br i1 %26, label %27, label %32

27:                                               ; preds = %23
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = sdiv i64 %28, 2
  store i64 %29, ptr %3, align 8, !tbaa !5
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = add nsw i64 %30, 1
  store i64 %31, ptr %5, align 8, !tbaa !5
  br label %38

32:                                               ; preds = %23
  %33 = load i64, ptr %3, align 8, !tbaa !5
  %34 = sub nsw i64 %33, 1
  %35 = sdiv i64 %34, 2
  store i64 %35, ptr %3, align 8, !tbaa !5
  %36 = load i64, ptr %5, align 8, !tbaa !5
  %37 = add nsw i64 %36, 1
  store i64 %37, ptr %5, align 8, !tbaa !5
  br label %38

38:                                               ; preds = %32, %27
  br label %73

39:                                               ; preds = %19
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %3, align 8, !tbaa !5
  %42 = srem i64 %40, %41
  %43 = icmp eq i64 %42, 0
  br i1 %43, label %44, label %56

44:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %45 = load i64, ptr %4, align 8, !tbaa !5
  %46 = load i64, ptr %3, align 8, !tbaa !5
  %47 = sdiv i64 %45, %46
  store i64 %47, ptr %6, align 8, !tbaa !5
  %48 = load i64, ptr %6, align 8, !tbaa !5
  %49 = call noundef zeroext i1 @_Z7isPowerx(i64 noundef %48)
  br i1 %49, label %50, label %55

50:                                               ; preds = %44
  %51 = load i64, ptr %3, align 8, !tbaa !5
  %52 = mul nsw i64 %51, 2
  store i64 %52, ptr %3, align 8, !tbaa !5
  %53 = load i64, ptr %5, align 8, !tbaa !5
  %54 = add nsw i64 %53, 1
  store i64 %54, ptr %5, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %50, %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %72

56:                                               ; preds = %39
  %57 = load i64, ptr %3, align 8, !tbaa !5
  %58 = srem i64 %57, 2
  %59 = icmp eq i64 %58, 0
  br i1 %59, label %60, label %65

60:                                               ; preds = %56
  %61 = load i64, ptr %3, align 8, !tbaa !5
  %62 = sdiv i64 %61, 2
  store i64 %62, ptr %3, align 8, !tbaa !5
  %63 = load i64, ptr %5, align 8, !tbaa !5
  %64 = add nsw i64 %63, 1
  store i64 %64, ptr %5, align 8, !tbaa !5
  br label %71

65:                                               ; preds = %56
  %66 = load i64, ptr %3, align 8, !tbaa !5
  %67 = sub nsw i64 %66, 1
  %68 = sdiv i64 %67, 2
  store i64 %68, ptr %3, align 8, !tbaa !5
  %69 = load i64, ptr %5, align 8, !tbaa !5
  %70 = add nsw i64 %69, 1
  store i64 %70, ptr %5, align 8, !tbaa !5
  br label %71

71:                                               ; preds = %65, %60
  br label %72

72:                                               ; preds = %71, %55
  br label %73

73:                                               ; preds = %72, %38
  br label %15, !llvm.loop !9

74:                                               ; preds = %15
  %75 = load i64, ptr %5, align 8, !tbaa !5
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %75)
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %76, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  br label %8, !llvm.loop !11

78:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  %79 = load i32, ptr %1, align 4
  ret i32 %79
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isPowerx(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #5
  %4 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %5 = load i64, ptr %1, align 8, !tbaa !5
  %6 = add nsw i64 %5, -1
  store i64 %6, ptr %1, align 8, !tbaa !5
  %.not13 = icmp eq i64 %5, 0
  br i1 %.not13, label %._crit_edge16, label %.lr.ph15

.lr.ph15:                                         ; preds = %0, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = load i64, ptr %3, align 8, !tbaa !5
  %.not1011 = icmp eq i64 %9, %10
  br i1 %.not1011, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph15, %43
  %11 = phi i64 [ %45, %43 ], [ %10, %.lr.ph15 ]
  %12 = phi i64 [ %44, %43 ], [ %9, %.lr.ph15 ]
  %.012 = phi i64 [ %.2, %43 ], [ 0, %.lr.ph15 ]
  %13 = icmp sgt i64 %12, %11
  br i1 %13, label %14, label %24

14:                                               ; preds = %.lr.ph
  %15 = and i64 %12, 1
  %16 = icmp eq i64 %15, 0
  br i1 %16, label %17, label %20

17:                                               ; preds = %14
  %18 = ashr exact i64 %12, 1
  store i64 %18, ptr %2, align 8, !tbaa !5
  %19 = add nsw i64 %.012, 1
  br label %43

20:                                               ; preds = %14
  %21 = add nsw i64 %12, -1
  %22 = ashr exact i64 %21, 1
  store i64 %22, ptr %2, align 8, !tbaa !5
  %23 = add nsw i64 %.012, 1
  br label %43

24:                                               ; preds = %.lr.ph
  %25 = srem i64 %11, %12
  %26 = sdiv i64 %11, %12
  %27 = icmp eq i64 %25, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %24
  %29 = call noundef zeroext i1 @_Z7isPowerx(i64 noundef %26)
  %.pre = load i64, ptr %2, align 8, !tbaa !5
  br i1 %29, label %30, label %43

30:                                               ; preds = %28
  %31 = shl nsw i64 %.pre, 1
  store i64 %31, ptr %2, align 8, !tbaa !5
  %32 = add nsw i64 %.012, 1
  br label %43

33:                                               ; preds = %24
  %34 = and i64 %12, 1
  %35 = icmp eq i64 %34, 0
  br i1 %35, label %36, label %39

36:                                               ; preds = %33
  %37 = ashr exact i64 %12, 1
  store i64 %37, ptr %2, align 8, !tbaa !5
  %38 = add nsw i64 %.012, 1
  br label %43

39:                                               ; preds = %33
  %40 = add nsw i64 %12, -1
  %41 = ashr exact i64 %40, 1
  store i64 %41, ptr %2, align 8, !tbaa !5
  %42 = add nsw i64 %.012, 1
  br label %43

43:                                               ; preds = %28, %30, %39, %36, %17, %20
  %44 = phi i64 [ %18, %17 ], [ %22, %20 ], [ %37, %36 ], [ %41, %39 ], [ %31, %30 ], [ %.pre, %28 ]
  %.2 = phi i64 [ %19, %17 ], [ %23, %20 ], [ %38, %36 ], [ %42, %39 ], [ %32, %30 ], [ %.012, %28 ]
  %45 = load i64, ptr %3, align 8, !tbaa !5
  %.not10 = icmp eq i64 %44, %45
  br i1 %.not10, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %43, %.lr.ph15
  %.0.lcssa = phi i64 [ 0, %.lr.ph15 ], [ %.2, %43 ]
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %.0.lcssa)
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %46, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #5
  %48 = load i64, ptr %1, align 8, !tbaa !5
  %49 = add nsw i64 %48, -1
  store i64 %49, ptr %1, align 8, !tbaa !5
  %.not = icmp eq i64 %48, 0
  br i1 %.not, label %._crit_edge16, label %.lr.ph15, !llvm.loop !11

._crit_edge16:                                    ; preds = %._crit_edge, %0
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass