; LLVM IR from brpapa/algorithms :: solutions/uri (2294)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@level = external dso_local global [101 x i32], align 16
@visited = external dso_local global [101 x i8], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10insertEdgeii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3bfsi(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca [101 x i8], align 16
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 4 dereferenceable(4) @m)
  call void @llvm.lifetime.start.p0(i64 101, ptr %2) #6
  %12 = getelementptr inbounds [101 x i8], ptr %2, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 16 %12, i8 0, i64 101, i1 false)
  call void @llvm.memset.p0.i64(ptr align 16 @visited, i8 0, i64 101, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  %13 = load i32, ptr @n, align 4, !tbaa !5
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = mul nsw i32 %13, %14
  store i32 %15, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %87, %0
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  br label %90

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %83, %21
  %23 = load i32, ptr %9, align 4, !tbaa !5
  %24 = load i32, ptr @m, align 4, !tbaa !5
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %22
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %86

27:                                               ; preds = %22
  %28 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = load i32, ptr @m, align 4, !tbaa !5
  %31 = mul nsw i32 %29, %30
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = add nsw i32 %31, %32
  store i32 %33, ptr %4, align 4, !tbaa !5
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = icmp eq i32 %34, 2
  br i1 %35, label %36, label %40

36:                                               ; preds = %27
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [101 x i8], ptr %2, i64 0, i64 %38
  store i8 1, ptr %39, align 1, !tbaa !9
  br label %83

40:                                               ; preds = %27
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %54

43:                                               ; preds = %40
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = sub nsw i32 %44, 1
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [101 x i8], ptr %2, i64 0, i64 %46
  %48 = load i8, ptr %47, align 1, !tbaa !9, !range !11, !noundef !12
  %49 = trunc i8 %48 to i1
  br i1 %49, label %54, label %50

50:                                               ; preds = %43
  %51 = load i32, ptr %4, align 4, !tbaa !5
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = sub nsw i32 %52, 1
  call void @_Z10insertEdgeii(i32 noundef %51, i32 noundef %53)
  br label %54

54:                                               ; preds = %50, %43, %40
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = icmp ne i32 %55, 0
  br i1 %56, label %57, label %70

57:                                               ; preds = %54
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = load i32, ptr @m, align 4, !tbaa !5
  %60 = sub nsw i32 %58, %59
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [101 x i8], ptr %2, i64 0, i64 %61
  %63 = load i8, ptr %62, align 1, !tbaa !9, !range !11, !noundef !12
  %64 = trunc i8 %63 to i1
  br i1 %64, label %70, label %65

65:                                               ; preds = %57
  %66 = load i32, ptr %4, align 4, !tbaa !5
  %67 = load i32, ptr %4, align 4, !tbaa !5
  %68 = load i32, ptr @m, align 4, !tbaa !5
  %69 = sub nsw i32 %67, %68
  call void @_Z10insertEdgeii(i32 noundef %66, i32 noundef %69)
  br label %70

70:                                               ; preds = %65, %57, %54
  %71 = load i32, ptr %3, align 4, !tbaa !5
  %72 = icmp eq i32 %71, 0
  br i1 %72, label %73, label %76

73:                                               ; preds = %70
  %74 = load i32, ptr %4, align 4, !tbaa !5
  %75 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z10insertEdgeii(i32 noundef %74, i32 noundef %75)
  br label %82

76:                                               ; preds = %70
  %77 = load i32, ptr %3, align 4, !tbaa !5
  %78 = icmp eq i32 %77, 3
  br i1 %78, label %79, label %81

79:                                               ; preds = %76
  %80 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %80, ptr %5, align 4, !tbaa !5
  br label %81

81:                                               ; preds = %79, %76
  br label %82

82:                                               ; preds = %81, %73
  br label %83

83:                                               ; preds = %82, %36
  %84 = load i32, ptr %9, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %9, align 4, !tbaa !5
  br label %22, !llvm.loop !13

86:                                               ; preds = %26
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %7, align 4, !tbaa !5
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %7, align 4, !tbaa !5
  br label %16, !llvm.loop !15

90:                                               ; preds = %20
  %91 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z3bfsi(i32 noundef %91)
  %92 = load i32, ptr %6, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [101 x i32], ptr @level, i64 0, i64 %93
  %95 = load i32, ptr %94, align 4, !tbaa !5
  %96 = sub nsw i32 %95, 1
  %97 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %96)
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %97, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.end.p0(i64 101, ptr %2) #6
  %99 = load i32, ptr %1, align 4
  ret i32 %99
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@level = external dso_local local_unnamed_addr global [101 x i32], align 16
@visited = external dso_local local_unnamed_addr global [101 x i8], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10insertEdgeii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3bfsi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #2 {
.preheader.lr.ph:
  %0 = alloca [101 x i8], align 16
  %1 = alloca i32, align 4
  %2 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %3 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %2, ptr noundef nonnull align 4 dereferenceable(4) @m)
  call void @llvm.lifetime.start.p0(i64 101, ptr nonnull %0) #7
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(101) %0, i8 0, i64 101, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(101) @visited, i8 0, i64 101, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #7
  %4 = load i32, ptr @n, align 4, !tbaa !5
  %5 = load i32, ptr @m, align 4, !tbaa !5
  %6 = mul nuw nsw i32 %5, %4
  %7 = icmp sgt i32 %4, 0
  tail call void @llvm.assume(i1 %7)
  %8 = icmp sgt i32 %5, 0
  tail call void @llvm.assume(i1 %8)
  br label %.preheader

.preheader:                                       ; preds = %.preheader.lr.ph, %._crit_edge
  %9 = phi i32 [ %65, %._crit_edge ], [ %5, %.preheader.lr.ph ]
  %.02128 = phi i32 [ %66, %._crit_edge ], [ 0, %.preheader.lr.ph ]
  %.02227 = phi i32 [ %.1.lcssa, %._crit_edge ], [ undef, %.preheader.lr.ph ]
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %.not24 = icmp eq i32 %.02128, 0
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  br i1 %.not24, label %.lr.ph.split.us.preheader, label %.lr.ph.split.preheader

.lr.ph.split.preheader:                           ; preds = %.lr.ph
  %12 = load i32, ptr @m, align 4, !tbaa !5
  %13 = mul nsw i32 %12, %.02128
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = icmp eq i32 %14, 2
  br i1 %15, label %26, label %._crit_edge38

._crit_edge38:                                    ; preds = %.lr.ph.split.preheader
  %16 = sub nsw i32 %13, %12
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %17
  %19 = load i8, ptr %18, align 1, !tbaa !9, !range !11, !noundef !12
  %20 = trunc nuw i8 %19 to i1
  br i1 %20, label %22, label %21

21:                                               ; preds = %._crit_edge38
  call void @_Z10insertEdgeii(i32 noundef %13, i32 noundef %16)
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %21, %._crit_edge38
  %23 = phi i32 [ %.pre, %21 ], [ %14, %._crit_edge38 ]
  switch i32 %23, label %29 [
    i32 0, label %25
    i32 3, label %24
  ]

24:                                               ; preds = %22
  br label %29

25:                                               ; preds = %22
  call void @_Z10insertEdgeii(i32 noundef %13, i32 noundef %6)
  br label %29

26:                                               ; preds = %.lr.ph.split.preheader
  %27 = sext i32 %13 to i64
  %28 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %27
  store i8 1, ptr %28, align 1, !tbaa !9
  br label %29

29:                                               ; preds = %26, %25, %24, %22
  %.2.peel = phi i32 [ %.02227, %26 ], [ %.02227, %25 ], [ %13, %24 ], [ %.02227, %22 ]
  %30 = load i32, ptr @m, align 4, !tbaa !5
  %31 = icmp sgt i32 %30, 1
  br i1 %31, label %.lr.ph.split, label %._crit_edge

.lr.ph.split.us.preheader:                        ; preds = %.lr.ph
  %32 = load i32, ptr %1, align 4, !tbaa !5
  switch i32 %32, label %36 [
    i32 2, label %35
    i32 0, label %34
    i32 3, label %33
  ]

33:                                               ; preds = %.lr.ph.split.us.preheader
  br label %36

34:                                               ; preds = %.lr.ph.split.us.preheader
  call void @_Z10insertEdgeii(i32 noundef 0, i32 noundef %6)
  br label %36

35:                                               ; preds = %.lr.ph.split.us.preheader
  store i8 1, ptr %0, align 16, !tbaa !9
  br label %36

36:                                               ; preds = %.lr.ph.split.us.preheader, %35, %34, %33
  %.2.us.peel = phi i32 [ %.02227, %35 ], [ %.02227, %34 ], [ 0, %33 ], [ %.02227, %.lr.ph.split.us.preheader ]
  %37 = load i32, ptr @m, align 4, !tbaa !5
  %38 = icmp sgt i32 %37, 1
  br i1 %38, label %.lr.ph.split.us, label %._crit_edge

.lr.ph.split.us:                                  ; preds = %36, %55
  %indvars.iv = phi i64 [ %indvars.iv.next, %55 ], [ 1, %36 ]
  %.125.us = phi i32 [ %.2.us, %55 ], [ %.2.us.peel, %36 ]
  %indvars35 = trunc i64 %indvars.iv to i32
  %39 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %40 = load i32, ptr %1, align 4, !tbaa !5
  %41 = icmp eq i32 %40, 2
  br i1 %41, label %53, label %42

42:                                               ; preds = %.lr.ph.split.us
  %43 = add nsw i64 %indvars.iv, -1
  %44 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %43
  %45 = load i8, ptr %44, align 1, !tbaa !9, !range !11, !noundef !12
  %46 = trunc nuw i8 %45 to i1
  br i1 %46, label %49, label %47

47:                                               ; preds = %42
  %48 = add nsw i32 %indvars35, -1
  call void @_Z10insertEdgeii(i32 noundef %indvars35, i32 noundef %48)
  %.pre43 = load i32, ptr %1, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %47, %42
  %50 = phi i32 [ %.pre43, %47 ], [ %40, %42 ]
  switch i32 %50, label %55 [
    i32 0, label %52
    i32 3, label %51
  ]

51:                                               ; preds = %49
  br label %55

52:                                               ; preds = %49
  call void @_Z10insertEdgeii(i32 noundef %indvars35, i32 noundef %6)
  br label %55

53:                                               ; preds = %.lr.ph.split.us
  %54 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %indvars.iv
  store i8 1, ptr %54, align 1, !tbaa !9
  br label %55

55:                                               ; preds = %53, %52, %51, %49
  %.2.us = phi i32 [ %.125.us, %53 ], [ %.125.us, %52 ], [ %indvars35, %51 ], [ %.125.us, %49 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %56 = load i32, ptr @m, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = icmp slt i64 %indvars.iv.next, %57
  br i1 %58, label %.lr.ph.split.us, label %._crit_edge, !llvm.loop !13

._crit_edge30:                                    ; preds = %._crit_edge
  call void @_Z3bfsi(i32 noundef %.1.lcssa)
  %59 = zext nneg i32 %6 to i64
  %60 = getelementptr inbounds [101 x i32], ptr @level, i64 0, i64 %59
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = add nsw i32 %61, -1
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %62)
  %64 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %63, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #7
  call void @llvm.lifetime.end.p0(i64 101, ptr nonnull %0) #7
  ret i32 0

._crit_edge:                                      ; preds = %97, %55, %29, %36, %.preheader
  %65 = phi i32 [ %9, %.preheader ], [ %37, %36 ], [ %30, %29 ], [ %56, %55 ], [ %99, %97 ]
  %.1.lcssa = phi i32 [ %.02227, %.preheader ], [ %.2.us.peel, %36 ], [ %.2.peel, %29 ], [ %.2.us, %55 ], [ %.2, %97 ]
  %66 = add nuw nsw i32 %.02128, 1
  %67 = load i32, ptr @n, align 4, !tbaa !5
  %68 = icmp slt i32 %66, %67
  br i1 %68, label %.preheader, label %._crit_edge30, !llvm.loop !16

.lr.ph.split:                                     ; preds = %29, %97
  %.026 = phi i32 [ %98, %97 ], [ 1, %29 ]
  %.125 = phi i32 [ %.2, %97 ], [ %.2.peel, %29 ]
  %69 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %70 = load i32, ptr @m, align 4, !tbaa !5
  %71 = mul nsw i32 %70, %.02128
  %72 = add nsw i32 %71, %.026
  %73 = load i32, ptr %1, align 4, !tbaa !5
  %74 = icmp eq i32 %73, 2
  br i1 %74, label %75, label %78

75:                                               ; preds = %.lr.ph.split
  %76 = sext i32 %72 to i64
  %77 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %76
  store i8 1, ptr %77, align 1, !tbaa !9
  br label %97

78:                                               ; preds = %.lr.ph.split
  %79 = add nsw i32 %72, -1
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %80
  %82 = load i8, ptr %81, align 1, !tbaa !9, !range !11, !noundef !12
  %83 = trunc nuw i8 %82 to i1
  br i1 %83, label %85, label %84

84:                                               ; preds = %78
  call void @_Z10insertEdgeii(i32 noundef %72, i32 noundef %79)
  %.pre40 = load i32, ptr @m, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %84, %78
  %86 = phi i32 [ %.pre40, %84 ], [ %70, %78 ]
  %87 = sub nsw i32 %72, %86
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [101 x i8], ptr %0, i64 0, i64 %88
  %90 = load i8, ptr %89, align 1, !tbaa !9, !range !11, !noundef !12
  %91 = trunc nuw i8 %90 to i1
  br i1 %91, label %93, label %92

92:                                               ; preds = %85
  call void @_Z10insertEdgeii(i32 noundef %72, i32 noundef %87)
  br label %93

93:                                               ; preds = %92, %85
  %94 = load i32, ptr %1, align 4, !tbaa !5
  switch i32 %94, label %97 [
    i32 0, label %95
    i32 3, label %96
  ]

95:                                               ; preds = %93
  call void @_Z10insertEdgeii(i32 noundef %72, i32 noundef %6)
  br label %97

96:                                               ; preds = %93
  br label %97

97:                                               ; preds = %93, %95, %96, %75
  %.2 = phi i32 [ %.125, %75 ], [ %.125, %95 ], [ %72, %96 ], [ %.125, %93 ]
  %98 = add nuw nsw i32 %.026, 1
  %99 = load i32, ptr @m, align 4, !tbaa !5
  %100 = icmp slt i32 %98, %99
  br i1 %100, label %.lr.ph.split, label %._crit_edge, !llvm.loop !18
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14, !15}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!"llvm.loop.peeled.count", i32 1}
!16 = distinct !{!16, !14, !17}
!17 = !{!"llvm.loop.unswitch.partial.disable"}
!18 = distinct !{!18, !14, !15}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass