; LLVM IR from ionescu007/minlzma :: minlzlib (rangedec)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @RcIsBitSet(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @RcGetReverseBitTree(ptr noundef %0, i8 noundef zeroext %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i16, align 2
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  store i8 0, ptr %6, align 1, !tbaa !9
  store i16 1, ptr %5, align 2, !tbaa !10
  store i8 0, ptr %8, align 1, !tbaa !9
  br label %9

9:                                                ; preds = %39, %2
  %10 = load i8, ptr %6, align 1, !tbaa !9
  %11 = zext i8 %10 to i32
  %12 = load i8, ptr %4, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = icmp slt i32 %11, %13
  br i1 %14, label %15, label %42

15:                                               ; preds = %9
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = load i16, ptr %5, align 2, !tbaa !10
  %18 = zext i16 %17 to i64
  %19 = getelementptr inbounds i16, ptr %16, i64 %18
  %20 = call zeroext i8 @RcIsBitSet(ptr noundef %19)
  store i8 %20, ptr %7, align 1, !tbaa !9
  %21 = load i16, ptr %5, align 2, !tbaa !10
  %22 = zext i16 %21 to i32
  %23 = shl i32 %22, 1
  %24 = trunc i32 %23 to i16
  %25 = zext i16 %24 to i32
  %26 = load i8, ptr %7, align 1, !tbaa !9
  %27 = zext i8 %26 to i32
  %28 = or i32 %25, %27
  %29 = trunc i32 %28 to i16
  store i16 %29, ptr %5, align 2, !tbaa !10
  %30 = load i8, ptr %7, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = load i8, ptr %6, align 1, !tbaa !9
  %33 = zext i8 %32 to i32
  %34 = shl i32 %31, %33
  %35 = load i8, ptr %8, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = or i32 %36, %34
  %38 = trunc i32 %37 to i8
  store i8 %38, ptr %8, align 1, !tbaa !9
  br label %39

39:                                               ; preds = %15
  %40 = load i8, ptr %6, align 1, !tbaa !9
  %41 = add i8 %40, 1
  store i8 %41, ptr %6, align 1, !tbaa !9
  br label %9, !llvm.loop !12

42:                                               ; preds = %9
  %43 = load i8, ptr %8, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #2
  ret i8 %43
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @RcIsBitSet(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @RcGetReverseBitTree(ptr noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %.not = icmp eq i8 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %wide.trip.count = zext i8 %1 to i32
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i32 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.015 = phi i8 [ 0, %.lr.ph.preheader ], [ %12, %.lr.ph ]
  %.01014 = phi i16 [ 1, %.lr.ph.preheader ], [ %9, %.lr.ph ]
  %3 = zext i16 %.01014 to i64
  %4 = getelementptr inbounds i16, ptr %0, i64 %3
  %5 = tail call zeroext i8 @RcIsBitSet(ptr noundef %4)
  %6 = shl i16 %.01014, 1
  %7 = zext i8 %5 to i32
  %8 = zext i8 %5 to i16
  %9 = or i16 %6, %8
  %10 = shl i32 %7, %indvars.iv
  %11 = trunc i32 %10 to i8
  %12 = or i8 %.015, %11
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %2
  %.0.lcssa = phi i8 [ 0, %2 ], [ %12, %.lr.ph ]
  ret i8 %.0.lcssa
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass