; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_ll_sdmmc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_CmdInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @SDMMC_SendCommand(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @SDMMC_GetCmdResp1(ptr noundef, i8 noundef zeroext, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @SDMMC_CmdStopTransfer(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca %struct.SDMMC_CmdInitTypeDef, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 20, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %5 = getelementptr inbounds %struct.SDMMC_CmdInitTypeDef, ptr %3, i32 0, i32 0
  store i32 0, ptr %5, align 4, !tbaa !9
  %6 = getelementptr inbounds %struct.SDMMC_CmdInitTypeDef, ptr %3, i32 0, i32 1
  store i32 12, ptr %6, align 4, !tbaa !12
  %7 = getelementptr inbounds %struct.SDMMC_CmdInitTypeDef, ptr %3, i32 0, i32 2
  store i32 256, ptr %7, align 4, !tbaa !13
  %8 = getelementptr inbounds %struct.SDMMC_CmdInitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %8, align 4, !tbaa !14
  %9 = getelementptr inbounds %struct.SDMMC_CmdInitTypeDef, ptr %3, i32 0, i32 4
  store i32 4096, ptr %9, align 4, !tbaa !15
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %10, i32 0, i32 3
  %12 = load volatile i32, ptr %11, align 4, !tbaa !16
  %13 = zext i32 %12 to i64
  %14 = or i64 %13, 128
  %15 = trunc i64 %14 to i32
  store volatile i32 %15, ptr %11, align 4, !tbaa !16
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %16, i32 0, i32 3
  %18 = load volatile i32, ptr %17, align 4, !tbaa !16
  %19 = zext i32 %18 to i64
  %20 = and i64 %19, -65
  %21 = trunc i64 %20 to i32
  store volatile i32 %21, ptr %17, align 4, !tbaa !16
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = call i32 @SDMMC_SendCommand(ptr noundef %22, ptr noundef %3)
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = call i32 @SDMMC_GetCmdResp1(ptr noundef %24, i8 noundef zeroext 12, i32 noundef 100000000)
  store i32 %25, ptr %4, align 4, !tbaa !18
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %26, i32 0, i32 3
  %28 = load volatile i32, ptr %27, align 4, !tbaa !16
  %29 = zext i32 %28 to i64
  %30 = and i64 %29, -129
  %31 = trunc i64 %30 to i32
  store volatile i32 %31, ptr %27, align 4, !tbaa !16
  %32 = load i32, ptr %4, align 4, !tbaa !18
  %33 = icmp eq i32 %32, 33554432
  br i1 %33, label %34, label %35

34:                                               ; preds = %1
  store i32 0, ptr %4, align 4, !tbaa !18
  br label %35

35:                                               ; preds = %34, %1
  %36 = load i32, ptr %4, align 4, !tbaa !18
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 20, ptr %3) #2
  ret i32 %36
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 4}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !11, i64 12}
!15 = !{!10, !11, i64 16}
!16 = !{!17, !11, i64 12}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !7, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !7, i64 96, !11, i64 128, !7, i64 132, !11, i64 1020}
!18 = !{!11, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_CmdInitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @SDMMC_SendCommand(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @SDMMC_GetCmdResp1(ptr noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @SDMMC_CmdStopTransfer(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca %struct.SDMMC_CmdInitTypeDef, align 16
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %2) #2
  store <4 x i32> <i32 0, i32 12, i32 256, i32 0>, ptr %2, align 16, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %2, i64 16
  store i32 4096, ptr %3, align 16, !tbaa !9
  %4 = getelementptr inbounds i8, ptr %0, i64 12
  %5 = load volatile i32, ptr %4, align 4, !tbaa !11
  %6 = or i32 %5, 128
  store volatile i32 %6, ptr %4, align 4, !tbaa !11
  %7 = load volatile i32, ptr %4, align 4, !tbaa !11
  %8 = and i32 %7, -65
  store volatile i32 %8, ptr %4, align 4, !tbaa !11
  %9 = call i32 @SDMMC_SendCommand(ptr noundef %0, ptr noundef nonnull %2)
  %10 = call i32 @SDMMC_GetCmdResp1(ptr noundef %0, i8 noundef zeroext 12, i32 noundef 100000000)
  %11 = load volatile i32, ptr %4, align 4, !tbaa !11
  %12 = and i32 %11, -129
  store volatile i32 %12, ptr %4, align 4, !tbaa !11
  %13 = icmp eq i32 %10, 33554432
  %spec.store.select = select i1 %13, i32 0, i32 %10
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %2) #2
  ret i32 %spec.store.select
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!11 = !{!12, !6, i64 12}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !7, i64 68, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !7, i64 96, !6, i64 128, !7, i64 132, !6, i64 1020}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass