; LLVM IR from alekmaul/pvsneslib :: snes-examples/maps/mapbuffer/src/addons (mapbufferextension)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@dtb_state = external global [32 x i8], align 16
@dtb_prop = external global [32 x i16], align 16
@dtb_hp = external global [32 x i8], align 16
@dtb_tilenumber = external global [32 x i8], align 16
@dtb_tileattr = external global [32 x i8], align 16
@dtb_timer = external global [32 x i8], align 16

; Function Attrs: nounwind uwtable
define dso_local void @ManipulateDynamicTile(i8 noundef zeroext %0) #0 {
  %2 = alloca i8, align 1
  store i8 %0, ptr %2, align 1, !tbaa !5
  %3 = load i8, ptr %2, align 1, !tbaa !5
  %4 = zext i8 %3 to i64
  %5 = getelementptr inbounds [32 x i8], ptr @dtb_state, i64 0, i64 %4
  %6 = load i8, ptr %5, align 1, !tbaa !5
  %7 = zext i8 %6 to i32
  %8 = and i32 %7, 1
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  br label %57

11:                                               ; preds = %1
  %12 = load i8, ptr %2, align 1, !tbaa !5
  %13 = zext i8 %12 to i64
  %14 = getelementptr inbounds [32 x i16], ptr @dtb_prop, i64 0, i64 %13
  %15 = load i16, ptr %14, align 2, !tbaa !8
  %16 = zext i16 %15 to i32
  switch i32 %16, label %57 [
    i32 65281, label %17
    i32 65282, label %17
  ]

17:                                               ; preds = %11, %11
  %18 = load i8, ptr %2, align 1, !tbaa !5
  %19 = zext i8 %18 to i64
  %20 = getelementptr inbounds [32 x i8], ptr @dtb_hp, i64 0, i64 %19
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = zext i8 %21 to i32
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %24, label %30

24:                                               ; preds = %17
  %25 = load i8, ptr %2, align 1, !tbaa !5
  %26 = zext i8 %25 to i64
  %27 = getelementptr inbounds [32 x i8], ptr @dtb_hp, i64 0, i64 %26
  %28 = load i8, ptr %27, align 1, !tbaa !5
  %29 = add i8 %28, -1
  store i8 %29, ptr %27, align 1, !tbaa !5
  br label %30

30:                                               ; preds = %24, %17
  %31 = load i8, ptr %2, align 1, !tbaa !5
  %32 = zext i8 %31 to i64
  %33 = getelementptr inbounds [32 x i8], ptr @dtb_hp, i64 0, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !5
  %35 = zext i8 %34 to i32
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %56

37:                                               ; preds = %30
  %38 = load i8, ptr %2, align 1, !tbaa !5
  %39 = load i8, ptr %2, align 1, !tbaa !5
  %40 = zext i8 %39 to i64
  %41 = getelementptr inbounds [32 x i8], ptr @dtb_tilenumber, i64 0, i64 %40
  %42 = load i8, ptr %41, align 1, !tbaa !5
  %43 = zext i8 %42 to i32
  %44 = add nsw i32 %43, 1
  %45 = trunc i32 %44 to i8
  %46 = load i8, ptr %2, align 1, !tbaa !5
  %47 = zext i8 %46 to i64
  %48 = getelementptr inbounds [32 x i8], ptr @dtb_tileattr, i64 0, i64 %47
  %49 = load i8, ptr %48, align 1, !tbaa !5
  call void @mapChangeTileByID(i8 noundef zeroext %38, i8 noundef zeroext %45, i8 noundef zeroext %49)
  %50 = load i8, ptr %2, align 1, !tbaa !5
  %51 = zext i8 %50 to i64
  %52 = getelementptr inbounds [32 x i8], ptr @dtb_timer, i64 0, i64 %51
  store i8 64, ptr %52, align 1, !tbaa !5
  %53 = load i8, ptr %2, align 1, !tbaa !5
  %54 = zext i8 %53 to i64
  %55 = getelementptr inbounds [32 x i8], ptr @dtb_state, i64 0, i64 %54
  store i8 2, ptr %55, align 1, !tbaa !5
  br label %57

56:                                               ; preds = %30
  br label %57

57:                                               ; preds = %56, %37, %11, %10
  ret void
}

declare void @mapChangeTileByID(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@dtb_state = external local_unnamed_addr global [32 x i8], align 16
@dtb_prop = external local_unnamed_addr global [32 x i16], align 16
@dtb_hp = external local_unnamed_addr global [32 x i8], align 16
@dtb_tilenumber = external local_unnamed_addr global [32 x i8], align 16
@dtb_tileattr = external local_unnamed_addr global [32 x i8], align 16
@dtb_timer = external local_unnamed_addr global [32 x i8], align 16

; Function Attrs: nounwind uwtable
define dso_local void @ManipulateDynamicTile(i8 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = zext i8 %0 to i64
  %3 = getelementptr inbounds [32 x i8], ptr @dtb_state, i64 0, i64 %2
  %4 = load i8, ptr %3, align 1, !tbaa !5
  %5 = and i8 %4, 1
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %22, label %7

7:                                                ; preds = %1
  %8 = getelementptr inbounds [32 x i16], ptr @dtb_prop, i64 0, i64 %2
  %9 = load i16, ptr %8, align 2, !tbaa !8
  %.off = add i16 %9, 255
  %switch = icmp ult i16 %.off, 2
  br i1 %switch, label %10, label %22

10:                                               ; preds = %7
  %11 = getelementptr inbounds [32 x i8], ptr @dtb_hp, i64 0, i64 %2
  %12 = load i8, ptr %11, align 1, !tbaa !5
  %.not = icmp eq i8 %12, 0
  br i1 %.not, label %.thread, label %13

13:                                               ; preds = %10
  %14 = add i8 %12, -1
  store i8 %14, ptr %11, align 1, !tbaa !5
  %15 = icmp eq i8 %14, 0
  br i1 %15, label %.thread, label %22

.thread:                                          ; preds = %10, %13
  %16 = getelementptr inbounds [32 x i8], ptr @dtb_tilenumber, i64 0, i64 %2
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %18 = add i8 %17, 1
  %19 = getelementptr inbounds [32 x i8], ptr @dtb_tileattr, i64 0, i64 %2
  %20 = load i8, ptr %19, align 1, !tbaa !5
  tail call void @mapChangeTileByID(i8 noundef zeroext %0, i8 noundef zeroext %18, i8 noundef zeroext %20) #2
  %21 = getelementptr inbounds [32 x i8], ptr @dtb_timer, i64 0, i64 %2
  store i8 64, ptr %21, align 1, !tbaa !5
  store i8 2, ptr %3, align 1, !tbaa !5
  br label %22

22:                                               ; preds = %7, %13, %1, %.thread
  ret void
}

declare void @mapChangeTileByID(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass