; LLVM IR from trainsn/GNN-Surrogate :: mpas_ght/src/GHT.ll (ZN6GHNode8traverseEf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.GHNode = type <{ i32, i32, ptr, %"class.std::vector", ptr, i32, i32, float, i8, [3 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<GHNode *, std::allocator<GHNode *>>::_Vector_impl" }
%"struct.std::_Vector_base<GHNode *, std::allocator<GHNode *>>::_Vector_impl" = type { %"struct.std::_Vector_base<GHNode *, std::allocator<GHNode *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<GHNode *, std::allocator<GHNode *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6GHNode8traverseEf(ptr noundef nonnull align 8 dereferenceable(61) %0, float noundef %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca float, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store float %1, ptr %4, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8
  %7 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 0
  %8 = load i32, ptr %7, align 8, !tbaa !11
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %12, label %10

10:                                               ; preds = %2
  %11 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  store i8 1, ptr %11, align 4, !tbaa !19
  br label %55

12:                                               ; preds = %2
  %13 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  store i8 1, ptr %13, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !20
  br label %14

14:                                               ; preds = %38, %12
  %15 = load i32, ptr %5, align 4, !tbaa !20
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 3
  %18 = call noundef i64 @_ZNKSt6vectorIP6GHNodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  %19 = icmp ult i64 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %41

21:                                               ; preds = %14
  %22 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  %23 = load i8, ptr %22, align 4, !tbaa !19, !range !21, !noundef !22
  %24 = trunc i8 %23 to i1
  %25 = zext i1 %24 to i32
  %26 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 3
  %27 = load i32, ptr %5, align 4, !tbaa !20
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6GHNodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #3
  %30 = load ptr, ptr %29, align 8, !tbaa !5
  %31 = load float, ptr %4, align 4, !tbaa !9
  %32 = call noundef zeroext i1 @_ZN6GHNode8traverseEf(ptr noundef nonnull align 8 dereferenceable(61) %30, float noundef %31)
  %33 = zext i1 %32 to i32
  %34 = and i32 %25, %33
  %35 = icmp ne i32 %34, 0
  %36 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  %37 = zext i1 %35 to i8
  store i8 %37, ptr %36, align 4, !tbaa !19
  br label %38

38:                                               ; preds = %21
  %39 = load i32, ptr %5, align 4, !tbaa !20
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %5, align 4, !tbaa !20
  br label %14, !llvm.loop !23

41:                                               ; preds = %20
  %42 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  %43 = load i8, ptr %42, align 4, !tbaa !19, !range !21, !noundef !22
  %44 = trunc i8 %43 to i1
  %45 = zext i1 %44 to i32
  %46 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 7
  %47 = load float, ptr %46, align 8, !tbaa !25
  %48 = load float, ptr %4, align 4, !tbaa !9
  %49 = fcmp olt float %47, %48
  %50 = zext i1 %49 to i32
  %51 = and i32 %45, %50
  %52 = icmp ne i32 %51, 0
  %53 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  %54 = zext i1 %52 to i8
  store i8 %54, ptr %53, align 4, !tbaa !19
  br label %55

55:                                               ; preds = %41, %10
  %56 = getelementptr inbounds %class.GHNode, ptr %6, i32 0, i32 8
  %57 = load i8, ptr %56, align 4, !tbaa !19, !range !21, !noundef !22
  %58 = trunc i8 %57 to i1
  ret i1 %58
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6GHNodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6GHNodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTS6GHNode", !13, i64 0, !13, i64 4, !6, i64 8, !14, i64 16, !6, i64 40, !13, i64 48, !13, i64 52, !10, i64 56, !18, i64 60}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIP6GHNodeSaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIP6GHNodeSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIP6GHNodeSaIS1_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP6GHNodeSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"bool", !7, i64 0}
!19 = !{!12, !18, i64 60}
!20 = !{!13, !13, i64 0}
!21 = !{i8 0, i8 2}
!22 = !{}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!12, !10, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN6GHNode8traverseEf(ptr noundef nonnull align 8 dereferenceable(61) %0, float noundef %1) local_unnamed_addr #0 align 2 {
  %3 = load i32, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i32 %3, 0
  %4 = getelementptr inbounds i8, ptr %0, i64 60
  store i8 1, ptr %4, align 4, !tbaa !17
  br i1 %.not, label %24, label %5

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  %7 = tail call noundef i64 @_ZNKSt6vectorIP6GHNodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #1
  %.not7 = icmp eq i64 %7, 0
  br i1 %.not7, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %5
  %8 = load i8, ptr %4, align 4, !tbaa !17, !range !18, !noundef !19
  %9 = getelementptr inbounds i8, ptr %0, i64 56
  %10 = load float, ptr %9, align 8, !tbaa !20
  %11 = fcmp olt float %10, %1
  %12 = icmp ne i8 %8, 0
  %13 = and i1 %12, %11
  %14 = zext i1 %13 to i8
  store i8 %14, ptr %4, align 4, !tbaa !17
  br label %24

.lr.ph:                                           ; preds = %5, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %5 ]
  %15 = load i8, ptr %4, align 4, !tbaa !17, !range !18, !noundef !19
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6GHNodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv) #1
  %17 = load ptr, ptr %16, align 8, !tbaa !21
  %18 = tail call noundef zeroext i1 @_ZN6GHNode8traverseEf(ptr noundef nonnull align 8 dereferenceable(61) %17, float noundef %1)
  %19 = icmp ne i8 %15, 0
  %20 = and i1 %19, %18
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %4, align 4, !tbaa !17
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %22 = tail call noundef i64 @_ZNKSt6vectorIP6GHNodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #1
  %23 = icmp ugt i64 %22, %indvars.iv.next
  br i1 %23, label %.lr.ph, label %._crit_edge, !llvm.loop !22

24:                                               ; preds = %2, %._crit_edge
  %25 = phi i1 [ %13, %._crit_edge ], [ true, %2 ]
  ret i1 %25
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6GHNodeSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6GHNodeSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS6GHNode", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !10, i64 40, !7, i64 48, !7, i64 52, !15, i64 56, !16, i64 60}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIP6GHNodeSaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIP6GHNodeSaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIP6GHNodeSaIS1_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIP6GHNodeSaIS1_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!15 = !{!"float", !8, i64 0}
!16 = !{!"bool", !8, i64 0}
!17 = !{!6, !16, i64 60}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!6, !15, i64 56}
!21 = !{!10, !10, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass