; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @TIM_DMACaptureCplt(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %4, i32 0, i32 4
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  store ptr %6, ptr %3, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %8, i32 0, i32 3
  %10 = getelementptr inbounds [7 x ptr], ptr %9, i64 0, i64 1
  %11 = load ptr, ptr %10, align 8, !tbaa !5
  %12 = icmp eq ptr %7, %11
  br i1 %12, label %13, label %29

13:                                               ; preds = %1
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %14, i32 0, i32 2
  store i32 1, ptr %15, align 8, !tbaa !13
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %16, i32 0, i32 1
  %18 = getelementptr inbounds %struct.DMA_InitTypeDef, ptr %17, i32 0, i32 6
  %19 = load i32, ptr %18, align 8, !tbaa !16
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %28

21:                                               ; preds = %13
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %22, i32 0, i32 6
  %24 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 0
  store volatile i32 1, ptr %24, align 8, !tbaa !17
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %25, i32 0, i32 7
  %27 = getelementptr inbounds [4 x i32], ptr %26, i64 0, i64 0
  store volatile i32 1, ptr %27, align 8, !tbaa !17
  br label %28

28:                                               ; preds = %21, %13
  br label %102

29:                                               ; preds = %1
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %31, i32 0, i32 3
  %33 = getelementptr inbounds [7 x ptr], ptr %32, i64 0, i64 2
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  %35 = icmp eq ptr %30, %34
  br i1 %35, label %36, label %52

36:                                               ; preds = %29
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %37, i32 0, i32 2
  store i32 2, ptr %38, align 8, !tbaa !13
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %39, i32 0, i32 1
  %41 = getelementptr inbounds %struct.DMA_InitTypeDef, ptr %40, i32 0, i32 6
  %42 = load i32, ptr %41, align 8, !tbaa !16
  %43 = icmp eq i32 %42, 0
  br i1 %43, label %44, label %51

44:                                               ; preds = %36
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %45, i32 0, i32 6
  %47 = getelementptr inbounds [6 x i32], ptr %46, i64 0, i64 1
  store volatile i32 1, ptr %47, align 4, !tbaa !17
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %48, i32 0, i32 7
  %50 = getelementptr inbounds [4 x i32], ptr %49, i64 0, i64 1
  store volatile i32 1, ptr %50, align 4, !tbaa !17
  br label %51

51:                                               ; preds = %44, %36
  br label %101

52:                                               ; preds = %29
  %53 = load ptr, ptr %2, align 8, !tbaa !5
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %54, i32 0, i32 3
  %56 = getelementptr inbounds [7 x ptr], ptr %55, i64 0, i64 3
  %57 = load ptr, ptr %56, align 8, !tbaa !5
  %58 = icmp eq ptr %53, %57
  br i1 %58, label %59, label %75

59:                                               ; preds = %52
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %60, i32 0, i32 2
  store i32 4, ptr %61, align 8, !tbaa !13
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %62, i32 0, i32 1
  %64 = getelementptr inbounds %struct.DMA_InitTypeDef, ptr %63, i32 0, i32 6
  %65 = load i32, ptr %64, align 8, !tbaa !16
  %66 = icmp eq i32 %65, 0
  br i1 %66, label %67, label %74

67:                                               ; preds = %59
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %68, i32 0, i32 6
  %70 = getelementptr inbounds [6 x i32], ptr %69, i64 0, i64 2
  store volatile i32 1, ptr %70, align 8, !tbaa !17
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %71, i32 0, i32 7
  %73 = getelementptr inbounds [4 x i32], ptr %72, i64 0, i64 2
  store volatile i32 1, ptr %73, align 8, !tbaa !17
  br label %74

74:                                               ; preds = %67, %59
  br label %100

75:                                               ; preds = %52
  %76 = load ptr, ptr %2, align 8, !tbaa !5
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %77, i32 0, i32 3
  %79 = getelementptr inbounds [7 x ptr], ptr %78, i64 0, i64 4
  %80 = load ptr, ptr %79, align 8, !tbaa !5
  %81 = icmp eq ptr %76, %80
  br i1 %81, label %82, label %98

82:                                               ; preds = %75
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %83, i32 0, i32 2
  store i32 8, ptr %84, align 8, !tbaa !13
  %85 = load ptr, ptr %2, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %85, i32 0, i32 1
  %87 = getelementptr inbounds %struct.DMA_InitTypeDef, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 8, !tbaa !16
  %89 = icmp eq i32 %88, 0
  br i1 %89, label %90, label %97

90:                                               ; preds = %82
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %91, i32 0, i32 6
  %93 = getelementptr inbounds [6 x i32], ptr %92, i64 0, i64 3
  store volatile i32 1, ptr %93, align 4, !tbaa !17
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %94, i32 0, i32 7
  %96 = getelementptr inbounds [4 x i32], ptr %95, i64 0, i64 3
  store volatile i32 1, ptr %96, align 4, !tbaa !17
  br label %97

97:                                               ; preds = %90, %82
  br label %99

98:                                               ; preds = %75
  br label %99

99:                                               ; preds = %98, %97
  br label %100

100:                                              ; preds = %99, %74
  br label %101

101:                                              ; preds = %100, %51
  br label %102

102:                                              ; preds = %101, %28
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_TIM_IC_CaptureCallback(ptr noundef %103)
  %104 = load ptr, ptr %3, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %104, i32 0, i32 2
  store i32 0, ptr %105, align 8, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_TIM_IC_CaptureCallback(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 64}
!10 = !{!"__DMA_HandleTypeDef", !6, i64 0, !11, i64 8, !12, i64 56, !12, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !6, i64 160, !6, i64 168, !12, i64 176}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 32}
!14 = !{!"", !6, i64 0, !15, i64 8, !12, i64 32, !7, i64 40, !12, i64 96, !12, i64 100, !7, i64 104, !7, i64 128, !12, i64 144}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!16 = !{!10, !12, i64 32}
!17 = !{!12, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @TIM_DMACaptureCplt(ptr noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 64
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 48
  %5 = load ptr, ptr %4, align 8, !tbaa !12
  %6 = icmp eq ptr %5, %0
  br i1 %6, label %7, label %15

7:                                                ; preds = %1
  %8 = getelementptr inbounds i8, ptr %3, i64 32
  store i32 1, ptr %8, align 8, !tbaa !13
  %9 = getelementptr inbounds i8, ptr %0, i64 32
  %10 = load i32, ptr %9, align 8, !tbaa !16
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %51

12:                                               ; preds = %7
  %13 = getelementptr inbounds i8, ptr %3, i64 104
  store volatile i32 1, ptr %13, align 8, !tbaa !17
  %14 = getelementptr inbounds i8, ptr %3, i64 128
  store volatile i32 1, ptr %14, align 8, !tbaa !17
  br label %51

15:                                               ; preds = %1
  %16 = getelementptr inbounds i8, ptr %3, i64 56
  %17 = load ptr, ptr %16, align 8, !tbaa !12
  %18 = icmp eq ptr %17, %0
  br i1 %18, label %19, label %27

19:                                               ; preds = %15
  %20 = getelementptr inbounds i8, ptr %3, i64 32
  store i32 2, ptr %20, align 8, !tbaa !13
  %21 = getelementptr inbounds i8, ptr %0, i64 32
  %22 = load i32, ptr %21, align 8, !tbaa !16
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %51

24:                                               ; preds = %19
  %25 = getelementptr inbounds i8, ptr %3, i64 108
  store volatile i32 1, ptr %25, align 4, !tbaa !17
  %26 = getelementptr inbounds i8, ptr %3, i64 132
  store volatile i32 1, ptr %26, align 4, !tbaa !17
  br label %51

27:                                               ; preds = %15
  %28 = getelementptr inbounds i8, ptr %3, i64 64
  %29 = load ptr, ptr %28, align 8, !tbaa !12
  %30 = icmp eq ptr %29, %0
  br i1 %30, label %31, label %39

31:                                               ; preds = %27
  %32 = getelementptr inbounds i8, ptr %3, i64 32
  store i32 4, ptr %32, align 8, !tbaa !13
  %33 = getelementptr inbounds i8, ptr %0, i64 32
  %34 = load i32, ptr %33, align 8, !tbaa !16
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %36, label %51

36:                                               ; preds = %31
  %37 = getelementptr inbounds i8, ptr %3, i64 112
  store volatile i32 1, ptr %37, align 8, !tbaa !17
  %38 = getelementptr inbounds i8, ptr %3, i64 136
  store volatile i32 1, ptr %38, align 8, !tbaa !17
  br label %51

39:                                               ; preds = %27
  %40 = getelementptr inbounds i8, ptr %3, i64 72
  %41 = load ptr, ptr %40, align 8, !tbaa !12
  %42 = icmp eq ptr %41, %0
  br i1 %42, label %43, label %51

43:                                               ; preds = %39
  %44 = getelementptr inbounds i8, ptr %3, i64 32
  store i32 8, ptr %44, align 8, !tbaa !13
  %45 = getelementptr inbounds i8, ptr %0, i64 32
  %46 = load i32, ptr %45, align 8, !tbaa !16
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %51

48:                                               ; preds = %43
  %49 = getelementptr inbounds i8, ptr %3, i64 116
  store volatile i32 1, ptr %49, align 4, !tbaa !17
  %50 = getelementptr inbounds i8, ptr %3, i64 140
  store volatile i32 1, ptr %50, align 4, !tbaa !17
  br label %51

51:                                               ; preds = %24, %19, %48, %43, %39, %31, %36, %7, %12
  tail call void @HAL_TIM_IC_CaptureCallback(ptr noundef nonnull %3)
  %52 = getelementptr inbounds i8, ptr %3, i64 32
  store i32 0, ptr %52, align 8, !tbaa !13
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_TIM_IC_CaptureCallback(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 64}
!6 = !{!"__DMA_HandleTypeDef", !7, i64 0, !10, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !11, i64 32}
!14 = !{!"", !7, i64 0, !15, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100, !8, i64 104, !8, i64 128, !11, i64 144}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!16 = !{!6, !11, i64 32}
!17 = !{!11, !11, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass