; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 22. Segment Tree/seg.ll (Z5QueryRSt6vectorIxSaIxEExxxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) #2 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i64 %4, ptr %12, align 8, !tbaa !9
  store i64 %5, ptr %13, align 8, !tbaa !9
  %17 = load i64, ptr %10, align 8, !tbaa !9
  %18 = load i64, ptr %11, align 8, !tbaa !9
  %19 = icmp slt i64 %17, %18
  br i1 %19, label %24, label %20

20:                                               ; preds = %6
  %21 = load i64, ptr %9, align 8, !tbaa !9
  %22 = load i64, ptr %12, align 8, !tbaa !9
  %23 = icmp sgt i64 %21, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %20, %6
  store i64 0, ptr %7, align 8
  br label %64

25:                                               ; preds = %20
  %26 = load i64, ptr %9, align 8, !tbaa !9
  %27 = load i64, ptr %11, align 8, !tbaa !9
  %28 = icmp sge i64 %26, %27
  br i1 %28, label %29, label %38

29:                                               ; preds = %25
  %30 = load i64, ptr %10, align 8, !tbaa !9
  %31 = load i64, ptr %12, align 8, !tbaa !9
  %32 = icmp sle i64 %30, %31
  br i1 %32, label %33, label %38

33:                                               ; preds = %29
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = load i64, ptr %13, align 8, !tbaa !9
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %35) #3
  %37 = load i64, ptr %36, align 8, !tbaa !9
  store i64 %37, ptr %7, align 8
  br label %64

38:                                               ; preds = %29, %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %39 = load i64, ptr %9, align 8, !tbaa !9
  %40 = load i64, ptr %10, align 8, !tbaa !9
  %41 = add nsw i64 %39, %40
  %42 = sdiv i64 %41, 2
  store i64 %42, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %43 = load ptr, ptr %8, align 8, !tbaa !5
  %44 = load i64, ptr %9, align 8, !tbaa !9
  %45 = load i64, ptr %14, align 8, !tbaa !9
  %46 = load i64, ptr %11, align 8, !tbaa !9
  %47 = load i64, ptr %12, align 8, !tbaa !9
  %48 = load i64, ptr %13, align 8, !tbaa !9
  %49 = mul nsw i64 2, %48
  %50 = call noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %44, i64 noundef %45, i64 noundef %46, i64 noundef %47, i64 noundef %49)
  store i64 %50, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = load i64, ptr %14, align 8, !tbaa !9
  %53 = add nsw i64 %52, 1
  %54 = load i64, ptr %10, align 8, !tbaa !9
  %55 = load i64, ptr %11, align 8, !tbaa !9
  %56 = load i64, ptr %12, align 8, !tbaa !9
  %57 = load i64, ptr %13, align 8, !tbaa !9
  %58 = mul nsw i64 2, %57
  %59 = add nsw i64 %58, 1
  %60 = call noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53, i64 noundef %54, i64 noundef %55, i64 noundef %56, i64 noundef %59)
  store i64 %60, ptr %16, align 8, !tbaa !9
  %61 = load i64, ptr %15, align 8, !tbaa !9
  %62 = load i64, ptr %16, align 8, !tbaa !9
  %63 = add nsw i64 %61, %62
  store i64 %63, ptr %7, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  br label %64

64:                                               ; preds = %38, %33, %24
  %65 = load i64, ptr %7, align 8
  ret i64 %65
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) local_unnamed_addr #0 {
  %7 = icmp slt i64 %2, %3
  %8 = icmp sgt i64 %1, %4
  %or.cond40 = or i1 %7, %8
  br i1 %or.cond40, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %.not30 = icmp sgt i64 %2, %4
  br i1 %.not30, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr3643.us = phi i64 [ %14, %tailrecurse.us ], [ %5, %.lr.ph ]
  %.tr3242.us = phi i64 [ %13, %tailrecurse.us ], [ %1, %.lr.ph ]
  %accumulator.tr41.us = phi i64 [ %15, %tailrecurse.us ], [ 0, %.lr.ph ]
  %9 = add nsw i64 %.tr3242.us, %2
  %10 = sdiv i64 %9, 2
  %11 = shl nsw i64 %.tr3643.us, 1
  %12 = tail call noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.tr3242.us, i64 noundef %10, i64 noundef %3, i64 noundef %4, i64 noundef %11)
  %13 = add nsw i64 %10, 1
  %14 = or disjoint i64 %11, 1
  %15 = add nsw i64 %12, %accumulator.tr41.us
  %.not55 = icmp slt i64 %10, %4
  br i1 %.not55, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr3643 = phi i64 [ %23, %tailrecurse ], [ %5, %.lr.ph ]
  %.tr3242 = phi i64 [ %22, %tailrecurse ], [ %1, %.lr.ph ]
  %accumulator.tr41 = phi i64 [ %24, %tailrecurse ], [ 0, %.lr.ph ]
  %.not = icmp slt i64 %.tr3242, %3
  br i1 %.not, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.tr3643) #1
  %17 = load i64, ptr %16, align 8, !tbaa !5
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  %18 = add nsw i64 %.tr3242, %2
  %19 = sdiv i64 %18, 2
  %20 = shl nsw i64 %.tr3643, 1
  %21 = tail call noundef i64 @_Z5QueryRSt6vectorIxSaIxEExxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.tr3242, i64 noundef %19, i64 noundef %3, i64 noundef %4, i64 noundef %20)
  %22 = add nsw i64 %19, 1
  %23 = or disjoint i64 %20, 1
  %24 = add nsw i64 %21, %accumulator.tr41
  %.not54 = icmp slt i64 %19, %4
  br i1 %.not54, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %6, %.split.us
  %accumulator.tr39 = phi i64 [ %accumulator.tr41, %.split.us ], [ 0, %6 ], [ %15, %tailrecurse.us ], [ %24, %tailrecurse ]
  %.0 = phi i64 [ %17, %.split.us ], [ 0, %6 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr39
  ret i64 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass