; LLVM IR from chromia/lichtenberg :: src/simulator.ll (ZN11lichtenberg9Simulator15insulate_squareEiiiib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.lichtenberg::Simulator" = type { %"class.std::shared_ptr", i8, i8, i8, i8, %"class.std::function", %"class.lichtenberg::CellList2D" }
%"class.std::shared_ptr" = type { %"class.std::__shared_ptr" }
%"class.std::__shared_ptr" = type { ptr, %"class.std::__shared_count" }
%"class.std::__shared_count" = type { ptr }
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.lichtenberg::CellList2D" = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72), i32 noundef, i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11lichtenberg9Simulator15insulate_squareEiiiib(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5) #1 align 2 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  %20 = zext i1 %5 to i8
  store i8 %20, ptr %12, align 1, !tbaa !11
  %21 = load ptr, ptr %7, align 8
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = icmp sgt i32 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %26 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %26, ptr %13, align 4, !tbaa !9
  %27 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %27, ptr %8, align 4, !tbaa !9
  %28 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %28, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %29

29:                                               ; preds = %25, %6
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = icmp sgt i32 %30, %31
  br i1 %32, label %33, label %37

33:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %34 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %34, ptr %14, align 4, !tbaa !9
  %35 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %35, ptr %9, align 4, !tbaa !9
  %36 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %36, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %37

37:                                               ; preds = %33, %29
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = icmp slt i32 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %37
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %40, %37
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = icmp slt i32 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %41
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %44, %41
  %46 = load i32, ptr %10, align 4, !tbaa !9
  %47 = getelementptr inbounds %"class.lichtenberg::Simulator", ptr %21, i32 0, i32 6
  %48 = getelementptr inbounds %"class.lichtenberg::CellList2D", ptr %47, i32 0, i32 1
  %49 = load i32, ptr %48, align 8, !tbaa !13
  %50 = icmp sgt i32 %46, %49
  br i1 %50, label %51, label %55

51:                                               ; preds = %45
  %52 = getelementptr inbounds %"class.lichtenberg::Simulator", ptr %21, i32 0, i32 6
  %53 = getelementptr inbounds %"class.lichtenberg::CellList2D", ptr %52, i32 0, i32 1
  %54 = load i32, ptr %53, align 8, !tbaa !13
  store i32 %54, ptr %10, align 4, !tbaa !9
  br label %55

55:                                               ; preds = %51, %45
  %56 = load i32, ptr %11, align 4, !tbaa !9
  %57 = getelementptr inbounds %"class.lichtenberg::Simulator", ptr %21, i32 0, i32 6
  %58 = getelementptr inbounds %"class.lichtenberg::CellList2D", ptr %57, i32 0, i32 2
  %59 = load i32, ptr %58, align 4, !tbaa !21
  %60 = icmp sgt i32 %56, %59
  br i1 %60, label %61, label %65

61:                                               ; preds = %55
  %62 = getelementptr inbounds %"class.lichtenberg::Simulator", ptr %21, i32 0, i32 6
  %63 = getelementptr inbounds %"class.lichtenberg::CellList2D", ptr %62, i32 0, i32 2
  %64 = load i32, ptr %63, align 4, !tbaa !21
  store i32 %64, ptr %11, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %61, %55
  %66 = load i8, ptr %12, align 1, !tbaa !11, !range !22, !noundef !23
  %67 = trunc i8 %66 to i1
  br i1 %67, label %68, label %93

68:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %69 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %69, ptr %15, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %89, %68
  %71 = load i32, ptr %15, align 4, !tbaa !9
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = icmp slt i32 %71, %72
  br i1 %73, label %75, label %74

74:                                               ; preds = %70
  store i32 2, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  br label %92

75:                                               ; preds = %70
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  %76 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %76, ptr %17, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %85, %75
  %78 = load i32, ptr %17, align 4, !tbaa !9
  %79 = load i32, ptr %10, align 4, !tbaa !9
  %80 = icmp slt i32 %78, %79
  br i1 %80, label %82, label %81

81:                                               ; preds = %77
  store i32 5, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  br label %88

82:                                               ; preds = %77
  %83 = load i32, ptr %17, align 4, !tbaa !9
  %84 = load i32, ptr %15, align 4, !tbaa !9
  call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %21, i32 noundef %83, i32 noundef %84)
  br label %85

85:                                               ; preds = %82
  %86 = load i32, ptr %17, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %17, align 4, !tbaa !9
  br label %77, !llvm.loop !24

88:                                               ; preds = %81
  br label %89

89:                                               ; preds = %88
  %90 = load i32, ptr %15, align 4, !tbaa !9
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %15, align 4, !tbaa !9
  br label %70, !llvm.loop !26

92:                                               ; preds = %74
  br label %128

93:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #2
  %94 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %94, ptr %18, align 4, !tbaa !9
  br label %95

95:                                               ; preds = %106, %93
  %96 = load i32, ptr %18, align 4, !tbaa !9
  %97 = load i32, ptr %10, align 4, !tbaa !9
  %98 = icmp slt i32 %96, %97
  br i1 %98, label %100, label %99

99:                                               ; preds = %95
  store i32 8, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #2
  br label %109

100:                                              ; preds = %95
  %101 = load i32, ptr %18, align 4, !tbaa !9
  %102 = load i32, ptr %9, align 4, !tbaa !9
  call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %21, i32 noundef %101, i32 noundef %102)
  %103 = load i32, ptr %18, align 4, !tbaa !9
  %104 = load i32, ptr %11, align 4, !tbaa !9
  %105 = sub nsw i32 %104, 1
  call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %21, i32 noundef %103, i32 noundef %105)
  br label %106

106:                                              ; preds = %100
  %107 = load i32, ptr %18, align 4, !tbaa !9
  %108 = add nsw i32 %107, 1
  store i32 %108, ptr %18, align 4, !tbaa !9
  br label %95, !llvm.loop !27

109:                                              ; preds = %99
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  %110 = load i32, ptr %9, align 4, !tbaa !9
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr %19, align 4, !tbaa !9
  br label %112

112:                                              ; preds = %124, %109
  %113 = load i32, ptr %19, align 4, !tbaa !9
  %114 = load i32, ptr %11, align 4, !tbaa !9
  %115 = sub nsw i32 %114, 1
  %116 = icmp slt i32 %113, %115
  br i1 %116, label %118, label %117

117:                                              ; preds = %112
  store i32 11, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  br label %127

118:                                              ; preds = %112
  %119 = load i32, ptr %8, align 4, !tbaa !9
  %120 = load i32, ptr %19, align 4, !tbaa !9
  call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %21, i32 noundef %119, i32 noundef %120)
  %121 = load i32, ptr %10, align 4, !tbaa !9
  %122 = sub nsw i32 %121, 1
  %123 = load i32, ptr %19, align 4, !tbaa !9
  call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %21, i32 noundef %122, i32 noundef %123)
  br label %124

124:                                              ; preds = %118
  %125 = load i32, ptr %19, align 4, !tbaa !9
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %19, align 4, !tbaa !9
  br label %112, !llvm.loop !28

127:                                              ; preds = %117
  br label %128

128:                                              ; preds = %127, %92
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !10, i64 64}
!14 = !{!"_ZTSN11lichtenberg9SimulatorE", !15, i64 0, !12, i64 16, !12, i64 17, !12, i64 18, !12, i64 19, !18, i64 24, !20, i64 56}
!15 = !{!"_ZTSSt10shared_ptrIN11lichtenberg5model10BreakModelEE", !16, i64 0}
!16 = !{!"_ZTSSt12__shared_ptrIN11lichtenberg5model10BreakModelELN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0, !17, i64 8}
!17 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0}
!18 = !{!"_ZTSSt8functionIFbiiEE", !19, i64 0, !6, i64 24}
!19 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!20 = !{!"_ZTSN11lichtenberg10CellList2DE", !6, i64 0, !10, i64 8, !10, i64 12}
!21 = !{!14, !10, i64 68}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = distinct !{!26, !25}
!27 = distinct !{!27, !25}
!28 = distinct !{!28, !25}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72), i32 noundef, i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11lichtenberg9Simulator15insulate_squareEiiiib(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5) local_unnamed_addr #0 align 2 {
  %spec.select = tail call i32 @llvm.smax.i32(i32 %1, i32 %3)
  %.048 = tail call i32 @llvm.smax.i32(i32 %2, i32 %4)
  %.046 = tail call i32 @llvm.smin.i32(i32 %2, i32 %4)
  %spec.store.select = tail call i32 @llvm.smax.i32(i32 %1, i32 0)
  %spec.store.select1 = tail call i32 @llvm.smax.i32(i32 %.046, i32 0)
  %7 = getelementptr inbounds i8, ptr %0, i64 64
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %.1 = tail call i32 @llvm.smin.i32(i32 %spec.select, i32 %8)
  %9 = getelementptr inbounds i8, ptr %0, i64 68
  %10 = load i32, ptr %9, align 4, !tbaa !18
  %.149 = tail call i32 @llvm.smin.i32(i32 %.048, i32 %10)
  br i1 %5, label %.preheader58, label %.preheader61

.preheader61:                                     ; preds = %6
  %11 = icmp slt i32 %spec.store.select, %.1
  %12 = add nsw i32 %.149, -1
  br i1 %11, label %.lr.ph, label %.preheader59

.preheader58:                                     ; preds = %6
  %13 = icmp slt i32 %spec.store.select1, %.149
  %14 = icmp slt i32 %spec.store.select, %.1
  %or.cond = select i1 %13, i1 %14, i1 false
  br i1 %or.cond, label %.preheader.us, label %.loopexit

.preheader.us:                                    ; preds = %.preheader58, %._crit_edge.us
  %.04468.us = phi i32 [ %17, %._crit_edge.us ], [ %spec.store.select1, %.preheader58 ]
  br label %15

15:                                               ; preds = %.preheader.us, %15
  %.04366.us = phi i32 [ %spec.store.select, %.preheader.us ], [ %16, %15 ]
  tail call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %.04366.us, i32 noundef %.04468.us)
  %16 = add nuw i32 %.04366.us, 1
  %exitcond72.not = icmp eq i32 %16, %.1
  br i1 %exitcond72.not, label %._crit_edge.us, label %15, !llvm.loop !19

._crit_edge.us:                                   ; preds = %15
  %17 = add nuw i32 %.04468.us, 1
  %exitcond73.not = icmp eq i32 %17, %.149
  br i1 %exitcond73.not, label %.loopexit, label %.preheader.us, !llvm.loop !21

.preheader59:                                     ; preds = %.lr.ph, %.preheader61
  %.063 = add nuw nsw i32 %spec.store.select1, 1
  %18 = icmp slt i32 %.063, %12
  br i1 %18, label %.lr.ph65, label %.loopexit

.lr.ph65:                                         ; preds = %.preheader59
  %19 = add nsw i32 %.1, -1
  br label %21

.lr.ph:                                           ; preds = %.preheader61, %.lr.ph
  %.04262 = phi i32 [ %20, %.lr.ph ], [ %spec.store.select, %.preheader61 ]
  tail call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %.04262, i32 noundef %spec.store.select1)
  tail call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %.04262, i32 noundef %12)
  %20 = add nuw i32 %.04262, 1
  %exitcond.not = icmp eq i32 %20, %.1
  br i1 %exitcond.not, label %.preheader59, label %.lr.ph, !llvm.loop !22

21:                                               ; preds = %.lr.ph65, %21
  %.064 = phi i32 [ %.063, %.lr.ph65 ], [ %.0, %21 ]
  tail call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %spec.store.select, i32 noundef %.064)
  tail call void @_ZN11lichtenberg9Simulator13insulate_cellEii(ptr noundef nonnull align 8 dereferenceable(72) %0, i32 noundef %19, i32 noundef %.064)
  %.0 = add i32 %.064, 1
  %exitcond71.not = icmp eq i32 %.0, %12
  br i1 %exitcond71.not, label %.loopexit, label %21, !llvm.loop !23

.loopexit:                                        ; preds = %21, %._crit_edge.us, %.preheader59, %.preheader58
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !17, i64 64}
!6 = !{!"_ZTSN11lichtenberg9SimulatorE", !7, i64 0, !13, i64 16, !13, i64 17, !13, i64 18, !13, i64 19, !14, i64 24, !16, i64 56}
!7 = !{!"_ZTSSt10shared_ptrIN11lichtenberg5model10BreakModelEE", !8, i64 0}
!8 = !{!"_ZTSSt12__shared_ptrIN11lichtenberg5model10BreakModelELN9__gnu_cxx12_Lock_policyE2EE", !9, i64 0, !12, i64 8}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !9, i64 0}
!13 = !{!"bool", !10, i64 0}
!14 = !{!"_ZTSSt8functionIFbiiEE", !15, i64 0, !9, i64 24}
!15 = !{!"_ZTSSt14_Function_base", !10, i64 0, !9, i64 16}
!16 = !{!"_ZTSN11lichtenberg10CellList2DE", !9, i64 0, !17, i64 8, !17, i64 12}
!17 = !{!"int", !10, i64 0}
!18 = !{!6, !17, i64 68}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = distinct !{!22, !20}
!23 = distinct !{!23, !20}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass