; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TIM_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMAError(ptr noundef) #1

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMADelayPulseCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_TIM_DMABurst_MultiWriteStart(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !9
  %16 = load ptr, ptr %8, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %16, i32 0, i32 8
  %18 = load volatile i32, ptr %17, align 8, !tbaa !11
  %19 = icmp eq i32 %18, 2
  br i1 %19, label %20, label %21

20:                                               ; preds = %6
  store i32 2, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

21:                                               ; preds = %6
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %22, i32 0, i32 8
  %24 = load volatile i32, ptr %23, align 8, !tbaa !11
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %37

26:                                               ; preds = %21
  %27 = load ptr, ptr %11, align 8, !tbaa !5
  %28 = icmp eq ptr %27, null
  br i1 %28, label %29, label %33

29:                                               ; preds = %26
  %30 = load i32, ptr %12, align 4, !tbaa !9
  %31 = icmp ugt i32 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

33:                                               ; preds = %29, %26
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %34, i32 0, i32 8
  store volatile i32 2, ptr %35, align 8, !tbaa !11
  br label %36

36:                                               ; preds = %33
  br label %38

37:                                               ; preds = %21
  br label %38

38:                                               ; preds = %37, %36
  br label %39

39:                                               ; preds = %38
  %40 = load i32, ptr %10, align 4, !tbaa !9
  switch i32 %40, label %265 [
    i32 256, label %41
    i32 512, label %73
    i32 1024, label %105
    i32 2048, label %137
    i32 4096, label %169
    i32 8192, label %201
    i32 16384, label %233
  ]

41:                                               ; preds = %39
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %42, i32 0, i32 3
  %44 = getelementptr inbounds [7 x ptr], ptr %43, i64 0, i64 0
  %45 = load ptr, ptr %44, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %45, i32 0, i32 5
  store ptr @TIM_DMAPeriodElapsedCplt, ptr %46, align 8, !tbaa !14
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %47, i32 0, i32 3
  %49 = getelementptr inbounds [7 x ptr], ptr %48, i64 0, i64 0
  %50 = load ptr, ptr %49, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %50, i32 0, i32 6
  store ptr @TIM_DMAPeriodElapsedHalfCplt, ptr %51, align 8, !tbaa !17
  %52 = load ptr, ptr %8, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %52, i32 0, i32 3
  %54 = getelementptr inbounds [7 x ptr], ptr %53, i64 0, i64 0
  %55 = load ptr, ptr %54, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %55, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %56, align 8, !tbaa !18
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %57, i32 0, i32 3
  %59 = getelementptr inbounds [7 x ptr], ptr %58, i64 0, i64 0
  %60 = load ptr, ptr %59, align 8, !tbaa !5
  %61 = load ptr, ptr %11, align 8, !tbaa !5
  %62 = ptrtoint ptr %61 to i32
  %63 = load ptr, ptr %8, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %63, i32 0, i32 0
  %65 = load ptr, ptr %64, align 8, !tbaa !19
  %66 = getelementptr inbounds %struct.TIM_TypeDef, ptr %65, i32 0, i32 19
  %67 = ptrtoint ptr %66 to i32
  %68 = load i32, ptr %13, align 4, !tbaa !9
  %69 = call i32 @HAL_DMA_Start_IT(ptr noundef %60, i32 noundef %62, i32 noundef %67, i32 noundef %68)
  %70 = icmp ne i32 %69, 0
  br i1 %70, label %71, label %72

71:                                               ; preds = %41
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

72:                                               ; preds = %41
  br label %266

73:                                               ; preds = %39
  %74 = load ptr, ptr %8, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %74, i32 0, i32 3
  %76 = getelementptr inbounds [7 x ptr], ptr %75, i64 0, i64 1
  %77 = load ptr, ptr %76, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %77, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %78, align 8, !tbaa !14
  %79 = load ptr, ptr %8, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %79, i32 0, i32 3
  %81 = getelementptr inbounds [7 x ptr], ptr %80, i64 0, i64 1
  %82 = load ptr, ptr %81, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %82, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %83, align 8, !tbaa !17
  %84 = load ptr, ptr %8, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %84, i32 0, i32 3
  %86 = getelementptr inbounds [7 x ptr], ptr %85, i64 0, i64 1
  %87 = load ptr, ptr %86, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %87, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %88, align 8, !tbaa !18
  %89 = load ptr, ptr %8, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %89, i32 0, i32 3
  %91 = getelementptr inbounds [7 x ptr], ptr %90, i64 0, i64 1
  %92 = load ptr, ptr %91, align 8, !tbaa !5
  %93 = load ptr, ptr %11, align 8, !tbaa !5
  %94 = ptrtoint ptr %93 to i32
  %95 = load ptr, ptr %8, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %95, i32 0, i32 0
  %97 = load ptr, ptr %96, align 8, !tbaa !19
  %98 = getelementptr inbounds %struct.TIM_TypeDef, ptr %97, i32 0, i32 19
  %99 = ptrtoint ptr %98 to i32
  %100 = load i32, ptr %13, align 4, !tbaa !9
  %101 = call i32 @HAL_DMA_Start_IT(ptr noundef %92, i32 noundef %94, i32 noundef %99, i32 noundef %100)
  %102 = icmp ne i32 %101, 0
  br i1 %102, label %103, label %104

103:                                              ; preds = %73
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

104:                                              ; preds = %73
  br label %266

105:                                              ; preds = %39
  %106 = load ptr, ptr %8, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %106, i32 0, i32 3
  %108 = getelementptr inbounds [7 x ptr], ptr %107, i64 0, i64 2
  %109 = load ptr, ptr %108, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %109, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %110, align 8, !tbaa !14
  %111 = load ptr, ptr %8, align 8, !tbaa !5
  %112 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %111, i32 0, i32 3
  %113 = getelementptr inbounds [7 x ptr], ptr %112, i64 0, i64 2
  %114 = load ptr, ptr %113, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %114, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %115, align 8, !tbaa !17
  %116 = load ptr, ptr %8, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %116, i32 0, i32 3
  %118 = getelementptr inbounds [7 x ptr], ptr %117, i64 0, i64 2
  %119 = load ptr, ptr %118, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %119, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %120, align 8, !tbaa !18
  %121 = load ptr, ptr %8, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %121, i32 0, i32 3
  %123 = getelementptr inbounds [7 x ptr], ptr %122, i64 0, i64 2
  %124 = load ptr, ptr %123, align 8, !tbaa !5
  %125 = load ptr, ptr %11, align 8, !tbaa !5
  %126 = ptrtoint ptr %125 to i32
  %127 = load ptr, ptr %8, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %127, i32 0, i32 0
  %129 = load ptr, ptr %128, align 8, !tbaa !19
  %130 = getelementptr inbounds %struct.TIM_TypeDef, ptr %129, i32 0, i32 19
  %131 = ptrtoint ptr %130 to i32
  %132 = load i32, ptr %13, align 4, !tbaa !9
  %133 = call i32 @HAL_DMA_Start_IT(ptr noundef %124, i32 noundef %126, i32 noundef %131, i32 noundef %132)
  %134 = icmp ne i32 %133, 0
  br i1 %134, label %135, label %136

135:                                              ; preds = %105
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

136:                                              ; preds = %105
  br label %266

137:                                              ; preds = %39
  %138 = load ptr, ptr %8, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %138, i32 0, i32 3
  %140 = getelementptr inbounds [7 x ptr], ptr %139, i64 0, i64 3
  %141 = load ptr, ptr %140, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %141, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %142, align 8, !tbaa !14
  %143 = load ptr, ptr %8, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %143, i32 0, i32 3
  %145 = getelementptr inbounds [7 x ptr], ptr %144, i64 0, i64 3
  %146 = load ptr, ptr %145, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %146, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %147, align 8, !tbaa !17
  %148 = load ptr, ptr %8, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %148, i32 0, i32 3
  %150 = getelementptr inbounds [7 x ptr], ptr %149, i64 0, i64 3
  %151 = load ptr, ptr %150, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %151, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %152, align 8, !tbaa !18
  %153 = load ptr, ptr %8, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %153, i32 0, i32 3
  %155 = getelementptr inbounds [7 x ptr], ptr %154, i64 0, i64 3
  %156 = load ptr, ptr %155, align 8, !tbaa !5
  %157 = load ptr, ptr %11, align 8, !tbaa !5
  %158 = ptrtoint ptr %157 to i32
  %159 = load ptr, ptr %8, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %159, i32 0, i32 0
  %161 = load ptr, ptr %160, align 8, !tbaa !19
  %162 = getelementptr inbounds %struct.TIM_TypeDef, ptr %161, i32 0, i32 19
  %163 = ptrtoint ptr %162 to i32
  %164 = load i32, ptr %13, align 4, !tbaa !9
  %165 = call i32 @HAL_DMA_Start_IT(ptr noundef %156, i32 noundef %158, i32 noundef %163, i32 noundef %164)
  %166 = icmp ne i32 %165, 0
  br i1 %166, label %167, label %168

167:                                              ; preds = %137
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

168:                                              ; preds = %137
  br label %266

169:                                              ; preds = %39
  %170 = load ptr, ptr %8, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %170, i32 0, i32 3
  %172 = getelementptr inbounds [7 x ptr], ptr %171, i64 0, i64 4
  %173 = load ptr, ptr %172, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %173, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %174, align 8, !tbaa !14
  %175 = load ptr, ptr %8, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %175, i32 0, i32 3
  %177 = getelementptr inbounds [7 x ptr], ptr %176, i64 0, i64 4
  %178 = load ptr, ptr %177, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %178, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %179, align 8, !tbaa !17
  %180 = load ptr, ptr %8, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %180, i32 0, i32 3
  %182 = getelementptr inbounds [7 x ptr], ptr %181, i64 0, i64 4
  %183 = load ptr, ptr %182, align 8, !tbaa !5
  %184 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %183, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %184, align 8, !tbaa !18
  %185 = load ptr, ptr %8, align 8, !tbaa !5
  %186 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %185, i32 0, i32 3
  %187 = getelementptr inbounds [7 x ptr], ptr %186, i64 0, i64 4
  %188 = load ptr, ptr %187, align 8, !tbaa !5
  %189 = load ptr, ptr %11, align 8, !tbaa !5
  %190 = ptrtoint ptr %189 to i32
  %191 = load ptr, ptr %8, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %191, i32 0, i32 0
  %193 = load ptr, ptr %192, align 8, !tbaa !19
  %194 = getelementptr inbounds %struct.TIM_TypeDef, ptr %193, i32 0, i32 19
  %195 = ptrtoint ptr %194 to i32
  %196 = load i32, ptr %13, align 4, !tbaa !9
  %197 = call i32 @HAL_DMA_Start_IT(ptr noundef %188, i32 noundef %190, i32 noundef %195, i32 noundef %196)
  %198 = icmp ne i32 %197, 0
  br i1 %198, label %199, label %200

199:                                              ; preds = %169
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

200:                                              ; preds = %169
  br label %266

201:                                              ; preds = %39
  %202 = load ptr, ptr %8, align 8, !tbaa !5
  %203 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %202, i32 0, i32 3
  %204 = getelementptr inbounds [7 x ptr], ptr %203, i64 0, i64 5
  %205 = load ptr, ptr %204, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %205, i32 0, i32 5
  store ptr @TIMEx_DMACommutationCplt, ptr %206, align 8, !tbaa !14
  %207 = load ptr, ptr %8, align 8, !tbaa !5
  %208 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %207, i32 0, i32 3
  %209 = getelementptr inbounds [7 x ptr], ptr %208, i64 0, i64 5
  %210 = load ptr, ptr %209, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %210, i32 0, i32 6
  store ptr @TIMEx_DMACommutationHalfCplt, ptr %211, align 8, !tbaa !17
  %212 = load ptr, ptr %8, align 8, !tbaa !5
  %213 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %212, i32 0, i32 3
  %214 = getelementptr inbounds [7 x ptr], ptr %213, i64 0, i64 5
  %215 = load ptr, ptr %214, align 8, !tbaa !5
  %216 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %215, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %216, align 8, !tbaa !18
  %217 = load ptr, ptr %8, align 8, !tbaa !5
  %218 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %217, i32 0, i32 3
  %219 = getelementptr inbounds [7 x ptr], ptr %218, i64 0, i64 5
  %220 = load ptr, ptr %219, align 8, !tbaa !5
  %221 = load ptr, ptr %11, align 8, !tbaa !5
  %222 = ptrtoint ptr %221 to i32
  %223 = load ptr, ptr %8, align 8, !tbaa !5
  %224 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %223, i32 0, i32 0
  %225 = load ptr, ptr %224, align 8, !tbaa !19
  %226 = getelementptr inbounds %struct.TIM_TypeDef, ptr %225, i32 0, i32 19
  %227 = ptrtoint ptr %226 to i32
  %228 = load i32, ptr %13, align 4, !tbaa !9
  %229 = call i32 @HAL_DMA_Start_IT(ptr noundef %220, i32 noundef %222, i32 noundef %227, i32 noundef %228)
  %230 = icmp ne i32 %229, 0
  br i1 %230, label %231, label %232

231:                                              ; preds = %201
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

232:                                              ; preds = %201
  br label %266

233:                                              ; preds = %39
  %234 = load ptr, ptr %8, align 8, !tbaa !5
  %235 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %234, i32 0, i32 3
  %236 = getelementptr inbounds [7 x ptr], ptr %235, i64 0, i64 6
  %237 = load ptr, ptr %236, align 8, !tbaa !5
  %238 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %237, i32 0, i32 5
  store ptr @TIM_DMATriggerCplt, ptr %238, align 8, !tbaa !14
  %239 = load ptr, ptr %8, align 8, !tbaa !5
  %240 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %239, i32 0, i32 3
  %241 = getelementptr inbounds [7 x ptr], ptr %240, i64 0, i64 6
  %242 = load ptr, ptr %241, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %242, i32 0, i32 6
  store ptr @TIM_DMATriggerHalfCplt, ptr %243, align 8, !tbaa !17
  %244 = load ptr, ptr %8, align 8, !tbaa !5
  %245 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %244, i32 0, i32 3
  %246 = getelementptr inbounds [7 x ptr], ptr %245, i64 0, i64 6
  %247 = load ptr, ptr %246, align 8, !tbaa !5
  %248 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %247, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %248, align 8, !tbaa !18
  %249 = load ptr, ptr %8, align 8, !tbaa !5
  %250 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %249, i32 0, i32 3
  %251 = getelementptr inbounds [7 x ptr], ptr %250, i64 0, i64 6
  %252 = load ptr, ptr %251, align 8, !tbaa !5
  %253 = load ptr, ptr %11, align 8, !tbaa !5
  %254 = ptrtoint ptr %253 to i32
  %255 = load ptr, ptr %8, align 8, !tbaa !5
  %256 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %255, i32 0, i32 0
  %257 = load ptr, ptr %256, align 8, !tbaa !19
  %258 = getelementptr inbounds %struct.TIM_TypeDef, ptr %257, i32 0, i32 19
  %259 = ptrtoint ptr %258 to i32
  %260 = load i32, ptr %13, align 4, !tbaa !9
  %261 = call i32 @HAL_DMA_Start_IT(ptr noundef %252, i32 noundef %254, i32 noundef %259, i32 noundef %260)
  %262 = icmp ne i32 %261, 0
  br i1 %262, label %263, label %264

263:                                              ; preds = %233
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

264:                                              ; preds = %233
  br label %266

265:                                              ; preds = %39
  store i32 1, ptr %14, align 4, !tbaa !9
  br label %266

266:                                              ; preds = %265, %264, %232, %200, %168, %136, %104, %72
  %267 = load i32, ptr %14, align 4, !tbaa !9
  %268 = icmp eq i32 %267, 0
  br i1 %268, label %269, label %284

269:                                              ; preds = %266
  %270 = load i32, ptr %9, align 4, !tbaa !9
  %271 = load i32, ptr %12, align 4, !tbaa !9
  %272 = or i32 %270, %271
  %273 = load ptr, ptr %8, align 8, !tbaa !5
  %274 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %273, i32 0, i32 0
  %275 = load ptr, ptr %274, align 8, !tbaa !19
  %276 = getelementptr inbounds %struct.TIM_TypeDef, ptr %275, i32 0, i32 18
  store volatile i32 %272, ptr %276, align 4, !tbaa !20
  %277 = load i32, ptr %10, align 4, !tbaa !9
  %278 = load ptr, ptr %8, align 8, !tbaa !5
  %279 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %278, i32 0, i32 0
  %280 = load ptr, ptr %279, align 8, !tbaa !19
  %281 = getelementptr inbounds %struct.TIM_TypeDef, ptr %280, i32 0, i32 3
  %282 = load volatile i32, ptr %281, align 4, !tbaa !22
  %283 = or i32 %282, %277
  store volatile i32 %283, ptr %281, align 4, !tbaa !22
  br label %284

284:                                              ; preds = %269, %266
  %285 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %285, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %286

286:                                              ; preds = %284, %263, %231, %199, %167, %135, %103, %71, %32, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  %287 = load i32, ptr %7, align 4
  ret i32 %287
}

declare void @TIMEx_DMACommutationCplt(ptr noundef) #2

declare void @TIMEx_DMACommutationHalfCplt(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerHalfCplt(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 144}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 32, !7, i64 40, !10, i64 96, !10, i64 100, !7, i64 104, !7, i64 128, !10, i64 144}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!14 = !{!15, !6, i64 72}
!15 = !{!"__DMA_HandleTypeDef", !6, i64 0, !16, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!17 = !{!15, !6, i64 80}
!18 = !{!15, !6, i64 104}
!19 = !{!12, !6, i64 0}
!20 = !{!21, !10, i64 72}
!21 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104}
!22 = !{!21, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMADelayPulseCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_TIM_DMABurst_MultiWriteStart(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = getelementptr inbounds i8, ptr %0, i64 144
  %8 = load volatile i32, ptr %7, align 8, !tbaa !5
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %137, label %10

10:                                               ; preds = %6
  %11 = load volatile i32, ptr %7, align 8, !tbaa !5
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %17

13:                                               ; preds = %10
  %14 = icmp eq ptr %3, null
  %15 = icmp ne i32 %4, 0
  %or.cond = and i1 %14, %15
  br i1 %or.cond, label %137, label %16

16:                                               ; preds = %13
  store volatile i32 2, ptr %7, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %16, %10
  switch i32 %2, label %137 [
    i32 256, label %18
    i32 512, label %34
    i32 1024, label %50
    i32 2048, label %66
    i32 4096, label %82
    i32 8192, label %98
    i32 16384, label %114
  ]

18:                                               ; preds = %17
  %19 = getelementptr inbounds i8, ptr %0, i64 40
  %20 = load ptr, ptr %19, align 8, !tbaa !12
  %21 = getelementptr inbounds i8, ptr %20, i64 72
  store ptr @TIM_DMAPeriodElapsedCplt, ptr %21, align 8, !tbaa !13
  %22 = load ptr, ptr %19, align 8, !tbaa !12
  %23 = getelementptr inbounds i8, ptr %22, i64 80
  store ptr @TIM_DMAPeriodElapsedHalfCplt, ptr %23, align 8, !tbaa !16
  %24 = load ptr, ptr %19, align 8, !tbaa !12
  %25 = getelementptr inbounds i8, ptr %24, i64 104
  store ptr @TIM_DMAError, ptr %25, align 8, !tbaa !17
  %26 = load ptr, ptr %19, align 8, !tbaa !12
  %27 = ptrtoint ptr %3 to i64
  %28 = trunc i64 %27 to i32
  %29 = load ptr, ptr %0, align 8, !tbaa !18
  %30 = getelementptr inbounds i8, ptr %29, i64 76
  %31 = ptrtoint ptr %30 to i64
  %32 = trunc i64 %31 to i32
  %33 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %26, i32 noundef %28, i32 noundef %32, i32 noundef %5) #2
  %.not69 = icmp eq i32 %33, 0
  br i1 %.not69, label %130, label %137

34:                                               ; preds = %17
  %35 = getelementptr inbounds i8, ptr %0, i64 48
  %36 = load ptr, ptr %35, align 8, !tbaa !12
  %37 = getelementptr inbounds i8, ptr %36, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %37, align 8, !tbaa !13
  %38 = load ptr, ptr %35, align 8, !tbaa !12
  %39 = getelementptr inbounds i8, ptr %38, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %39, align 8, !tbaa !16
  %40 = load ptr, ptr %35, align 8, !tbaa !12
  %41 = getelementptr inbounds i8, ptr %40, i64 104
  store ptr @TIM_DMAError, ptr %41, align 8, !tbaa !17
  %42 = load ptr, ptr %35, align 8, !tbaa !12
  %43 = ptrtoint ptr %3 to i64
  %44 = trunc i64 %43 to i32
  %45 = load ptr, ptr %0, align 8, !tbaa !18
  %46 = getelementptr inbounds i8, ptr %45, i64 76
  %47 = ptrtoint ptr %46 to i64
  %48 = trunc i64 %47 to i32
  %49 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %42, i32 noundef %44, i32 noundef %48, i32 noundef %5) #2
  %.not68 = icmp eq i32 %49, 0
  br i1 %.not68, label %130, label %137

50:                                               ; preds = %17
  %51 = getelementptr inbounds i8, ptr %0, i64 56
  %52 = load ptr, ptr %51, align 8, !tbaa !12
  %53 = getelementptr inbounds i8, ptr %52, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %53, align 8, !tbaa !13
  %54 = load ptr, ptr %51, align 8, !tbaa !12
  %55 = getelementptr inbounds i8, ptr %54, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %55, align 8, !tbaa !16
  %56 = load ptr, ptr %51, align 8, !tbaa !12
  %57 = getelementptr inbounds i8, ptr %56, i64 104
  store ptr @TIM_DMAError, ptr %57, align 8, !tbaa !17
  %58 = load ptr, ptr %51, align 8, !tbaa !12
  %59 = ptrtoint ptr %3 to i64
  %60 = trunc i64 %59 to i32
  %61 = load ptr, ptr %0, align 8, !tbaa !18
  %62 = getelementptr inbounds i8, ptr %61, i64 76
  %63 = ptrtoint ptr %62 to i64
  %64 = trunc i64 %63 to i32
  %65 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %58, i32 noundef %60, i32 noundef %64, i32 noundef %5) #2
  %.not67 = icmp eq i32 %65, 0
  br i1 %.not67, label %130, label %137

66:                                               ; preds = %17
  %67 = getelementptr inbounds i8, ptr %0, i64 64
  %68 = load ptr, ptr %67, align 8, !tbaa !12
  %69 = getelementptr inbounds i8, ptr %68, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %69, align 8, !tbaa !13
  %70 = load ptr, ptr %67, align 8, !tbaa !12
  %71 = getelementptr inbounds i8, ptr %70, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %71, align 8, !tbaa !16
  %72 = load ptr, ptr %67, align 8, !tbaa !12
  %73 = getelementptr inbounds i8, ptr %72, i64 104
  store ptr @TIM_DMAError, ptr %73, align 8, !tbaa !17
  %74 = load ptr, ptr %67, align 8, !tbaa !12
  %75 = ptrtoint ptr %3 to i64
  %76 = trunc i64 %75 to i32
  %77 = load ptr, ptr %0, align 8, !tbaa !18
  %78 = getelementptr inbounds i8, ptr %77, i64 76
  %79 = ptrtoint ptr %78 to i64
  %80 = trunc i64 %79 to i32
  %81 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %74, i32 noundef %76, i32 noundef %80, i32 noundef %5) #2
  %.not66 = icmp eq i32 %81, 0
  br i1 %.not66, label %130, label %137

82:                                               ; preds = %17
  %83 = getelementptr inbounds i8, ptr %0, i64 72
  %84 = load ptr, ptr %83, align 8, !tbaa !12
  %85 = getelementptr inbounds i8, ptr %84, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %85, align 8, !tbaa !13
  %86 = load ptr, ptr %83, align 8, !tbaa !12
  %87 = getelementptr inbounds i8, ptr %86, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %87, align 8, !tbaa !16
  %88 = load ptr, ptr %83, align 8, !tbaa !12
  %89 = getelementptr inbounds i8, ptr %88, i64 104
  store ptr @TIM_DMAError, ptr %89, align 8, !tbaa !17
  %90 = load ptr, ptr %83, align 8, !tbaa !12
  %91 = ptrtoint ptr %3 to i64
  %92 = trunc i64 %91 to i32
  %93 = load ptr, ptr %0, align 8, !tbaa !18
  %94 = getelementptr inbounds i8, ptr %93, i64 76
  %95 = ptrtoint ptr %94 to i64
  %96 = trunc i64 %95 to i32
  %97 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %90, i32 noundef %92, i32 noundef %96, i32 noundef %5) #2
  %.not65 = icmp eq i32 %97, 0
  br i1 %.not65, label %130, label %137

98:                                               ; preds = %17
  %99 = getelementptr inbounds i8, ptr %0, i64 80
  %100 = load ptr, ptr %99, align 8, !tbaa !12
  %101 = getelementptr inbounds i8, ptr %100, i64 72
  store ptr @TIMEx_DMACommutationCplt, ptr %101, align 8, !tbaa !13
  %102 = load ptr, ptr %99, align 8, !tbaa !12
  %103 = getelementptr inbounds i8, ptr %102, i64 80
  store ptr @TIMEx_DMACommutationHalfCplt, ptr %103, align 8, !tbaa !16
  %104 = load ptr, ptr %99, align 8, !tbaa !12
  %105 = getelementptr inbounds i8, ptr %104, i64 104
  store ptr @TIM_DMAError, ptr %105, align 8, !tbaa !17
  %106 = load ptr, ptr %99, align 8, !tbaa !12
  %107 = ptrtoint ptr %3 to i64
  %108 = trunc i64 %107 to i32
  %109 = load ptr, ptr %0, align 8, !tbaa !18
  %110 = getelementptr inbounds i8, ptr %109, i64 76
  %111 = ptrtoint ptr %110 to i64
  %112 = trunc i64 %111 to i32
  %113 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %106, i32 noundef %108, i32 noundef %112, i32 noundef %5) #2
  %.not64 = icmp eq i32 %113, 0
  br i1 %.not64, label %130, label %137

114:                                              ; preds = %17
  %115 = getelementptr inbounds i8, ptr %0, i64 88
  %116 = load ptr, ptr %115, align 8, !tbaa !12
  %117 = getelementptr inbounds i8, ptr %116, i64 72
  store ptr @TIM_DMATriggerCplt, ptr %117, align 8, !tbaa !13
  %118 = load ptr, ptr %115, align 8, !tbaa !12
  %119 = getelementptr inbounds i8, ptr %118, i64 80
  store ptr @TIM_DMATriggerHalfCplt, ptr %119, align 8, !tbaa !16
  %120 = load ptr, ptr %115, align 8, !tbaa !12
  %121 = getelementptr inbounds i8, ptr %120, i64 104
  store ptr @TIM_DMAError, ptr %121, align 8, !tbaa !17
  %122 = load ptr, ptr %115, align 8, !tbaa !12
  %123 = ptrtoint ptr %3 to i64
  %124 = trunc i64 %123 to i32
  %125 = load ptr, ptr %0, align 8, !tbaa !18
  %126 = getelementptr inbounds i8, ptr %125, i64 76
  %127 = ptrtoint ptr %126 to i64
  %128 = trunc i64 %127 to i32
  %129 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %122, i32 noundef %124, i32 noundef %128, i32 noundef %5) #2
  %.not = icmp eq i32 %129, 0
  br i1 %.not, label %130, label %137

130:                                              ; preds = %114, %98, %82, %66, %50, %34, %18
  %131 = or i32 %4, %1
  %132 = load ptr, ptr %0, align 8, !tbaa !18
  %133 = getelementptr inbounds i8, ptr %132, i64 72
  store volatile i32 %131, ptr %133, align 4, !tbaa !19
  %134 = getelementptr inbounds i8, ptr %132, i64 12
  %135 = load volatile i32, ptr %134, align 4, !tbaa !21
  %136 = or i32 %135, %2
  store volatile i32 %136, ptr %134, align 4, !tbaa !21
  br label %137

137:                                              ; preds = %17, %130, %114, %98, %82, %66, %50, %34, %18, %13, %6
  %.063 = phi i32 [ 2, %6 ], [ 1, %13 ], [ 1, %18 ], [ 1, %34 ], [ 1, %50 ], [ 1, %66 ], [ 1, %82 ], [ 1, %98 ], [ 1, %114 ], [ 0, %130 ], [ 1, %17 ]
  ret i32 %.063
}

declare void @TIMEx_DMACommutationCplt(ptr noundef) #1

declare void @TIMEx_DMACommutationHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerHalfCplt(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 144}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100, !8, i64 104, !8, i64 128, !11, i64 144}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 72}
!14 = !{!"__DMA_HandleTypeDef", !7, i64 0, !15, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!16 = !{!14, !7, i64 80}
!17 = !{!14, !7, i64 104}
!18 = !{!6, !7, i64 0}
!19 = !{!20, !11, i64 72}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104}
!21 = !{!20, !11, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass