; LLVM IR from brpapa/algorithms :: solutions/uva/11833.ll (Z10insertEdgeiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl" }
%"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Tadj = type { i32, i32 }

@adjList = external dso_local global [250 x %"class.std::vector"], align 16
@R = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z10insertEdgeiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %struct.Tadj, align 4
  %8 = alloca %struct.Tadj, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !5
  call void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8) %7, i32 noundef %9, i32 noundef %10)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %11 = load i32, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !5
  call void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8) %8, i32 noundef %11, i32 noundef %12)
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = load i32, ptr @R, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %16, label %44

16:                                               ; preds = %3
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  %20 = icmp eq i32 %17, %19
  br i1 %20, label %21, label %29

21:                                               ; preds = %16
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr @R, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %27
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %28, ptr noundef nonnull align 4 dereferenceable(8) %8)
  br label %43

29:                                               ; preds = %21, %16
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = sub nsw i32 %31, 1
  %33 = icmp eq i32 %30, %32
  br i1 %33, label %38, label %34

34:                                               ; preds = %29
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = load i32, ptr @R, align 4, !tbaa !5
  %37 = icmp sge i32 %35, %36
  br i1 %37, label %38, label %42

38:                                               ; preds = %34, %29
  %39 = load i32, ptr %5, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %40
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %41, ptr noundef nonnull align 4 dereferenceable(8) %7)
  br label %42

42:                                               ; preds = %38, %34
  br label %43

43:                                               ; preds = %42, %25
  br label %73

44:                                               ; preds = %3
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = load i32, ptr @R, align 4, !tbaa !5
  %47 = icmp sge i32 %45, %46
  br i1 %47, label %48, label %56

48:                                               ; preds = %44
  %49 = load i32, ptr %5, align 4, !tbaa !5
  %50 = load i32, ptr @R, align 4, !tbaa !5
  %51 = icmp slt i32 %49, %50
  br i1 %51, label %52, label %56

52:                                               ; preds = %48
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %54
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %55, ptr noundef nonnull align 4 dereferenceable(8) %8)
  br label %72

56:                                               ; preds = %48, %44
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = load i32, ptr @R, align 4, !tbaa !5
  %59 = icmp sge i32 %57, %58
  br i1 %59, label %60, label %71

60:                                               ; preds = %56
  %61 = load i32, ptr %5, align 4, !tbaa !5
  %62 = load i32, ptr @R, align 4, !tbaa !5
  %63 = icmp sge i32 %61, %62
  br i1 %63, label %64, label %71

64:                                               ; preds = %60
  %65 = load i32, ptr %4, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %66
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %67, ptr noundef nonnull align 4 dereferenceable(8) %8)
  %68 = load i32, ptr %5, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %69
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %70, ptr noundef nonnull align 4 dereferenceable(8) %7)
  br label %71

71:                                               ; preds = %64, %60, %56
  br label %72

72:                                               ; preds = %71, %52
  br label %73

73:                                               ; preds = %72, %43
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef, i32 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl" }
%"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tadj, std::allocator<Tadj>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Tadj = type { i32, i32 }

@adjList = external dso_local global [250 x %"class.std::vector"], align 16
@R = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z10insertEdgeiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca %struct.Tadj, align 4
  %5 = alloca %struct.Tadj, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  call void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8) %4, i32 noundef %0, i32 noundef %2)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  call void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8) %5, i32 noundef %1, i32 noundef %2)
  %6 = load i32, ptr @R, align 4
  %7 = icmp sgt i32 %6, %0
  br i1 %7, label %8, label %15

8:                                                ; preds = %3
  %9 = add nsw i32 %0, 1
  %10 = icmp eq i32 %9, %1
  %11 = icmp sgt i32 %6, %1
  %or.cond = and i1 %10, %11
  br i1 %or.cond, label %.sink.split, label %12

12:                                               ; preds = %8
  %13 = add nsw i32 %0, -1
  %14 = icmp ne i32 %13, %1
  %or.cond27 = and i1 %14, %11
  br i1 %or.cond27, label %21, label %.sink.split

15:                                               ; preds = %3
  %16 = icmp sgt i32 %6, %1
  %17 = sext i32 %0 to i64
  %18 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %17
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %18, ptr noundef nonnull align 4 dereferenceable(8) %5)
  br i1 %16, label %21, label %.sink.split

.sink.split:                                      ; preds = %15, %12, %8
  %.sink = phi i32 [ %0, %8 ], [ %1, %12 ], [ %1, %15 ]
  %.sink29 = phi ptr [ %5, %8 ], [ %4, %12 ], [ %4, %15 ]
  %19 = sext i32 %.sink to i64
  %20 = getelementptr inbounds [250 x %"class.std::vector"], ptr @adjList, i64 0, i64 %19
  call void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %20, ptr noundef nonnull align 4 dereferenceable(8) %.sink29)
  br label %21

21:                                               ; preds = %.sink.split, %15, %12
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4TadjC2Eii(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef, i32 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4TadjSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass