; LLVM IR from trainsn/GNN-Surrogate :: mpas_graph/src/cell.ll (ZN4CellC2Effffb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Cell = type <{ float, float, float, float, float, float, i8, [3 x i8] }>

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4CellC2Effffb(ptr noundef nonnull align 4 dereferenceable(25) %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, i1 noundef zeroext %5) unnamed_addr #0 align 2 {
  %7 = alloca ptr, align 8
  %8 = alloca float, align 4
  %9 = alloca float, align 4
  %10 = alloca float, align 4
  %11 = alloca float, align 4
  %12 = alloca i8, align 1
  store ptr %0, ptr %7, align 8, !tbaa !5
  store float %1, ptr %8, align 4, !tbaa !9
  store float %2, ptr %9, align 4, !tbaa !9
  store float %3, ptr %10, align 4, !tbaa !9
  store float %4, ptr %11, align 4, !tbaa !9
  %13 = zext i1 %5 to i8
  store i8 %13, ptr %12, align 1, !tbaa !11
  %14 = load ptr, ptr %7, align 8
  %15 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 0
  %16 = load float, ptr %8, align 4, !tbaa !9
  store float %16, ptr %15, align 4, !tbaa !13
  %17 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 1
  %18 = load float, ptr %9, align 4, !tbaa !9
  store float %18, ptr %17, align 4, !tbaa !15
  %19 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 2
  %20 = load float, ptr %10, align 4, !tbaa !9
  store float %20, ptr %19, align 4, !tbaa !16
  %21 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 5
  %22 = load float, ptr %11, align 4, !tbaa !9
  store float %22, ptr %21, align 4, !tbaa !17
  %23 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 6
  %24 = load i8, ptr %12, align 1, !tbaa !11, !range !18, !noundef !19
  %25 = trunc i8 %24 to i1
  %26 = zext i1 %25 to i8
  store i8 %26, ptr %23, align 4, !tbaa !20
  %27 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 2
  %28 = load float, ptr %27, align 4, !tbaa !16
  %29 = fpext float %28 to double
  %30 = call double @asin(double noundef %29) #2
  %31 = fptrunc double %30 to float
  %32 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 3
  store float %31, ptr %32, align 4, !tbaa !21
  %33 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 1
  %34 = load float, ptr %33, align 4, !tbaa !15
  %35 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 0
  %36 = load float, ptr %35, align 4, !tbaa !13
  %37 = fdiv float %34, %36
  %38 = fpext float %37 to double
  %39 = call double @atan(double noundef %38) #2
  %40 = fptrunc double %39 to float
  %41 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 4
  store float %40, ptr %41, align 4, !tbaa !22
  %42 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 4
  %43 = load float, ptr %42, align 4, !tbaa !22
  %44 = fcmp olt float %43, 0.000000e+00
  br i1 %44, label %45, label %51

45:                                               ; preds = %6
  %46 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 4
  %47 = load float, ptr %46, align 4, !tbaa !22
  %48 = fpext float %47 to double
  %49 = fadd double %48, 0x400921FB54442D18
  %50 = fptrunc double %49 to float
  store float %50, ptr %46, align 4, !tbaa !22
  br label %51

51:                                               ; preds = %45, %6
  %52 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 1
  %53 = load float, ptr %52, align 4, !tbaa !15
  %54 = fcmp olt float %53, 0.000000e+00
  br i1 %54, label %55, label %61

55:                                               ; preds = %51
  %56 = getelementptr inbounds %class.Cell, ptr %14, i32 0, i32 4
  %57 = load float, ptr %56, align 4, !tbaa !22
  %58 = fpext float %57 to double
  %59 = fadd double %58, 0x400921FB54442D18
  %60 = fptrunc double %59 to float
  store float %60, ptr %56, align 4, !tbaa !22
  br label %61

61:                                               ; preds = %55, %51
  ret void
}

; Function Attrs: nounwind
declare double @asin(double noundef) #1

; Function Attrs: nounwind
declare double @atan(double noundef) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"_ZTS4Cell", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !12, i64 24}
!15 = !{!14, !10, i64 4}
!16 = !{!14, !10, i64 8}
!17 = !{!14, !10, i64 20}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!14, !12, i64 24}
!21 = !{!14, !10, i64 12}
!22 = !{!14, !10, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree nounwind willreturn memory(write, argmem: readwrite) uwtable
define dso_local void @_ZN4CellC2Effffb(ptr nocapture noundef nonnull align 4 dereferenceable(25) %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, i1 noundef zeroext %5) unnamed_addr #0 align 2 {
  %7 = zext i1 %5 to i8
  store float %1, ptr %0, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  store float %2, ptr %8, align 4, !tbaa !11
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  store float %3, ptr %9, align 4, !tbaa !12
  %10 = getelementptr inbounds i8, ptr %0, i64 20
  store float %4, ptr %10, align 4, !tbaa !13
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  store i8 %7, ptr %11, align 4, !tbaa !14
  %12 = fpext float %3 to double
  %13 = tail call double @asin(double noundef %12) #2
  %14 = fptrunc double %13 to float
  %15 = getelementptr inbounds i8, ptr %0, i64 12
  store float %14, ptr %15, align 4, !tbaa !15
  %16 = load float, ptr %8, align 4, !tbaa !11
  %17 = load float, ptr %0, align 4, !tbaa !5
  %18 = fdiv float %16, %17
  %19 = fpext float %18 to double
  %20 = tail call double @atan(double noundef %19) #2
  %21 = fptrunc double %20 to float
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  %23 = fcmp olt float %21, 0.000000e+00
  %24 = fpext float %21 to double
  %25 = fadd double %24, 0x400921FB54442D18
  %26 = fptrunc double %25 to float
  %storemerge = select i1 %23, float %26, float %21
  store float %storemerge, ptr %22, align 4, !tbaa !16
  %27 = load float, ptr %8, align 4, !tbaa !11
  %28 = fcmp olt float %27, 0.000000e+00
  br i1 %28, label %29, label %33

29:                                               ; preds = %6
  %30 = fpext float %storemerge to double
  %31 = fadd double %30, 0x400921FB54442D18
  %32 = fptrunc double %31 to float
  store float %32, ptr %22, align 4, !tbaa !16
  br label %33

33:                                               ; preds = %29, %6
  ret void
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @asin(double noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @atan(double noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nofree nounwind willreturn memory(write, argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4Cell", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !7, i64 20}
!14 = !{!6, !10, i64 24}
!15 = !{!6, !7, i64 12}
!16 = !{!6, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass