; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_adc_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ADC_HandleTypeDef = type { ptr, %struct.ADC_InitTypeDef, ptr, i32, i32, i32, %struct.ADC_InjectionConfigTypeDef }
%struct.ADC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.ADC_OversamplingTypeDef }
%struct.ADC_OversamplingTypeDef = type { i32, i32, i32, i32 }
%struct.ADC_InjectionConfigTypeDef = type { i32, i32 }
%struct.ADC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@SystemCoreClock = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @ADC_Disable(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsEnabled(ptr noundef) #2

declare i32 @ADC_Enable(ptr noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StopConversion(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StartConversion(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADCEx_LinearCalibration_SetValue(ptr noundef %0, ptr noundef %1) #3 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store volatile i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !11
  %13 = getelementptr inbounds %struct.ADC_TypeDef, ptr %12, i32 0, i32 2
  %14 = load volatile i32, ptr %13, align 4, !tbaa !16
  %15 = zext i32 %14 to i64
  %16 = and i64 %15, 536870912
  %17 = icmp eq i64 %16, 536870912
  br i1 %17, label %18, label %27

18:                                               ; preds = %2
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %19, i32 0, i32 0
  %21 = load ptr, ptr %20, align 8, !tbaa !11
  %22 = getelementptr inbounds %struct.ADC_TypeDef, ptr %21, i32 0, i32 2
  %23 = load volatile i32, ptr %22, align 4, !tbaa !16
  %24 = zext i32 %23 to i64
  %25 = and i64 %24, -536870913
  %26 = trunc i64 %25 to i32
  store volatile i32 %26, ptr %22, align 4, !tbaa !16
  br label %27

27:                                               ; preds = %18, %2
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !11
  %31 = getelementptr inbounds %struct.ADC_TypeDef, ptr %30, i32 0, i32 2
  %32 = load volatile i32, ptr %31, align 4, !tbaa !16
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, 268435456
  %35 = icmp eq i64 %34, 0
  br i1 %35, label %36, label %59

36:                                               ; preds = %27
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !11
  %40 = getelementptr inbounds %struct.ADC_TypeDef, ptr %39, i32 0, i32 2
  %41 = load volatile i32, ptr %40, align 4, !tbaa !16
  %42 = zext i32 %41 to i64
  %43 = or i64 %42, 268435456
  %44 = trunc i64 %43 to i32
  store volatile i32 %44, ptr %40, align 4, !tbaa !16
  %45 = load i32, ptr @SystemCoreClock, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  %47 = udiv i64 %46, 200000
  %48 = add i64 %47, 1
  %49 = mul i64 1, %48
  %50 = trunc i64 %49 to i32
  store volatile i32 %50, ptr %7, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %55, %36
  %52 = load volatile i32, ptr %7, align 4, !tbaa !9
  %53 = zext i32 %52 to i64
  %54 = icmp ne i64 %53, 0
  br i1 %54, label %55, label %58

55:                                               ; preds = %51
  %56 = load volatile i32, ptr %7, align 4, !tbaa !9
  %57 = add i32 %56, -1
  store volatile i32 %57, ptr %7, align 4, !tbaa !9
  br label %51, !llvm.loop !18

58:                                               ; preds = %51
  br label %59

59:                                               ; preds = %58, %27
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !11
  %63 = getelementptr inbounds %struct.ADC_TypeDef, ptr %62, i32 0, i32 2
  %64 = load volatile i32, ptr %63, align 4, !tbaa !16
  %65 = zext i32 %64 to i64
  %66 = and i64 %65, 268435456
  %67 = icmp eq i64 %66, 0
  br i1 %67, label %68, label %79

68:                                               ; preds = %59
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %69, i32 0, i32 4
  %71 = load volatile i32, ptr %70, align 4, !tbaa !20
  %72 = zext i32 %71 to i64
  %73 = or i64 %72, 16
  %74 = trunc i64 %73 to i32
  store volatile i32 %74, ptr %70, align 4, !tbaa !20
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %75, i32 0, i32 5
  %77 = load volatile i32, ptr %76, align 8, !tbaa !21
  %78 = or i32 %77, 1
  store volatile i32 %78, ptr %76, align 8, !tbaa !21
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %162

79:                                               ; preds = %59
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %80, i32 0, i32 0
  %82 = load ptr, ptr %81, align 8, !tbaa !11
  %83 = call i32 @LL_ADC_IsEnabled(ptr noundef %82)
  %84 = zext i32 %83 to i64
  %85 = icmp eq i64 %84, 0
  br i1 %85, label %86, label %118

86:                                               ; preds = %79
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = call i32 @ADC_Enable(ptr noundef %87)
  %89 = icmp ne i32 %88, 0
  br i1 %89, label %90, label %91

90:                                               ; preds = %86
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %162

91:                                               ; preds = %86
  store i32 6, ptr %6, align 4, !tbaa !9
  br label %92

92:                                               ; preds = %111, %91
  %93 = load i32, ptr %6, align 4, !tbaa !9
  %94 = zext i32 %93 to i64
  %95 = icmp ugt i64 %94, 0
  br i1 %95, label %96, label %114

96:                                               ; preds = %92
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !11
  %100 = load i32, ptr %6, align 4, !tbaa !9
  %101 = zext i32 %100 to i64
  %102 = sub i64 6, %101
  %103 = lshr i64 134217728, %102
  %104 = trunc i64 %103 to i32
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  %106 = load i32, ptr %6, align 4, !tbaa !9
  %107 = sub i32 %106, 1
  %108 = zext i32 %107 to i64
  %109 = getelementptr inbounds i32, ptr %105, i64 %108
  %110 = load i32, ptr %109, align 4, !tbaa !9
  call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %99, i32 noundef %104, i32 noundef %110)
  br label %111

111:                                              ; preds = %96
  %112 = load i32, ptr %6, align 4, !tbaa !9
  %113 = add i32 %112, -1
  store i32 %113, ptr %6, align 4, !tbaa !9
  br label %92, !llvm.loop !22

114:                                              ; preds = %92
  %115 = load ptr, ptr %4, align 8, !tbaa !5
  %116 = call i32 @ADC_Disable(ptr noundef %115)
  br label %117

117:                                              ; preds = %114
  br label %161

118:                                              ; preds = %79
  %119 = load ptr, ptr %4, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %119, i32 0, i32 0
  %121 = load ptr, ptr %120, align 8, !tbaa !11
  %122 = call i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef %121)
  %123 = zext i32 %122 to i64
  %124 = icmp ne i64 %123, 0
  br i1 %124, label %125, label %129

125:                                              ; preds = %118
  %126 = load ptr, ptr %4, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %126, i32 0, i32 0
  %128 = load ptr, ptr %127, align 8, !tbaa !11
  call void @LL_ADC_REG_StopConversion(ptr noundef %128)
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %129

129:                                              ; preds = %125, %118
  store i32 6, ptr %6, align 4, !tbaa !9
  br label %130

130:                                              ; preds = %149, %129
  %131 = load i32, ptr %6, align 4, !tbaa !9
  %132 = zext i32 %131 to i64
  %133 = icmp ugt i64 %132, 0
  br i1 %133, label %134, label %152

134:                                              ; preds = %130
  %135 = load ptr, ptr %4, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %135, i32 0, i32 0
  %137 = load ptr, ptr %136, align 8, !tbaa !11
  %138 = load i32, ptr %6, align 4, !tbaa !9
  %139 = zext i32 %138 to i64
  %140 = sub i64 6, %139
  %141 = lshr i64 134217728, %140
  %142 = trunc i64 %141 to i32
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = load i32, ptr %6, align 4, !tbaa !9
  %145 = sub i32 %144, 1
  %146 = zext i32 %145 to i64
  %147 = getelementptr inbounds i32, ptr %143, i64 %146
  %148 = load i32, ptr %147, align 4, !tbaa !9
  call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %137, i32 noundef %142, i32 noundef %148)
  br label %149

149:                                              ; preds = %134
  %150 = load i32, ptr %6, align 4, !tbaa !9
  %151 = add i32 %150, -1
  store i32 %151, ptr %6, align 4, !tbaa !9
  br label %130, !llvm.loop !23

152:                                              ; preds = %130
  %153 = load i32, ptr %8, align 4, !tbaa !9
  %154 = zext i32 %153 to i64
  %155 = icmp ne i64 %154, 0
  br i1 %155, label %156, label %160

156:                                              ; preds = %152
  %157 = load ptr, ptr %4, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %157, i32 0, i32 0
  %159 = load ptr, ptr %158, align 8, !tbaa !11
  call void @LL_ADC_REG_StartConversion(ptr noundef %159)
  br label %160

160:                                              ; preds = %156, %152
  br label %161

161:                                              ; preds = %160, %117
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %162

162:                                              ; preds = %161, %90, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %163 = load i32, ptr %3, align 4
  ret i32 %163
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_SetCalibrationLinearFactor(ptr noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 88, !10, i64 96, !10, i64 100, !10, i64 104, !15, i64 108}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !14, i64 60}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!15 = !{!"", !10, i64 0, !10, i64 4}
!16 = !{!17, !10, i64 8}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !7, i64 80, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !7, i64 112, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !7, i64 144, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!12, !10, i64 100}
!21 = !{!12, !10, i64 104}
!22 = distinct !{!22, !19}
!23 = distinct !{!23, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @ADC_Disable(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsEnabled(ptr noundef) local_unnamed_addr #2

declare i32 @ADC_Enable(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StopConversion(ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StartConversion(ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_ADCEx_LinearCalibration_SetValue(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #3 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 0, ptr %3, align 4, !tbaa !5
  %4 = load ptr, ptr %0, align 8, !tbaa !9
  %5 = getelementptr inbounds i8, ptr %4, i64 8
  %6 = load volatile i32, ptr %5, align 4, !tbaa !15
  %7 = and i32 %6, 536870912
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %11, label %8

8:                                                ; preds = %2
  %9 = load volatile i32, ptr %5, align 4, !tbaa !15
  %10 = and i32 %9, -536870913
  store volatile i32 %10, ptr %5, align 4, !tbaa !15
  br label %11

11:                                               ; preds = %8, %2
  %12 = load volatile i32, ptr %5, align 4, !tbaa !15
  %13 = and i32 %12, 268435456
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %.loopexit

15:                                               ; preds = %11
  %16 = load volatile i32, ptr %5, align 4, !tbaa !15
  %17 = or i32 %16, 268435456
  store volatile i32 %17, ptr %5, align 4, !tbaa !15
  %18 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %19 = udiv i32 %18, 200000
  %narrow = add nuw nsw i32 %19, 1
  store volatile i32 %narrow, ptr %3, align 4, !tbaa !5
  %.0..0..0..0.38 = load volatile i32, ptr %3, align 4, !tbaa !5
  %.not3239 = icmp eq i32 %.0..0..0..0.38, 0
  br i1 %.not3239, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %15, %.lr.ph
  %.0..0..0..0.1 = load volatile i32, ptr %3, align 4, !tbaa !5
  %20 = add i32 %.0..0..0..0.1, -1
  store volatile i32 %20, ptr %3, align 4, !tbaa !5
  %.0..0..0..0. = load volatile i32, ptr %3, align 4, !tbaa !5
  %.not32 = icmp eq i32 %.0..0..0..0., 0
  br i1 %.not32, label %.loopexit, label %.lr.ph, !llvm.loop !17

.loopexit:                                        ; preds = %.lr.ph, %15, %11
  %21 = load volatile i32, ptr %5, align 4, !tbaa !15
  %22 = and i32 %21, 268435456
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %31

24:                                               ; preds = %.loopexit
  %25 = getelementptr inbounds i8, ptr %0, i64 100
  %26 = load volatile i32, ptr %25, align 4, !tbaa !19
  %27 = or i32 %26, 16
  store volatile i32 %27, ptr %25, align 4, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %0, i64 104
  %29 = load volatile i32, ptr %28, align 8, !tbaa !20
  %30 = or i32 %29, 1
  store volatile i32 %30, ptr %28, align 8, !tbaa !20
  br label %79

31:                                               ; preds = %.loopexit
  %32 = tail call i32 @LL_ADC_IsEnabled(ptr noundef nonnull %4)
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %54

34:                                               ; preds = %31
  %35 = tail call i32 @ADC_Enable(ptr noundef nonnull %0) #4
  %.not36 = icmp eq i32 %35, 0
  br i1 %.not36, label %.preheader.preheader, label %79

.preheader.preheader:                             ; preds = %34
  %36 = load ptr, ptr %0, align 8, !tbaa !9
  %37 = getelementptr inbounds i8, ptr %1, i64 20
  %38 = load i32, ptr %37, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %36, i32 noundef 134217728, i32 noundef %38)
  %39 = load ptr, ptr %0, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %1, i64 16
  %41 = load i32, ptr %40, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %39, i32 noundef 67108864, i32 noundef %41)
  %42 = load ptr, ptr %0, align 8, !tbaa !9
  %43 = getelementptr inbounds i8, ptr %1, i64 12
  %44 = load i32, ptr %43, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %42, i32 noundef 33554432, i32 noundef %44)
  %45 = load ptr, ptr %0, align 8, !tbaa !9
  %46 = getelementptr inbounds i8, ptr %1, i64 8
  %47 = load i32, ptr %46, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %45, i32 noundef 16777216, i32 noundef %47)
  %48 = load ptr, ptr %0, align 8, !tbaa !9
  %49 = getelementptr inbounds i8, ptr %1, i64 4
  %50 = load i32, ptr %49, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %48, i32 noundef 8388608, i32 noundef %50)
  %51 = load ptr, ptr %0, align 8, !tbaa !9
  %52 = load i32, ptr %1, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %51, i32 noundef 4194304, i32 noundef %52)
  %53 = tail call i32 @ADC_Disable(ptr noundef nonnull %0) #4
  br label %79

54:                                               ; preds = %31
  %55 = load ptr, ptr %0, align 8, !tbaa !9
  %56 = tail call i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef %55)
  %.not33 = icmp eq i32 %56, 0
  br i1 %.not33, label %59, label %57

57:                                               ; preds = %54
  %58 = load ptr, ptr %0, align 8, !tbaa !9
  tail call void @LL_ADC_REG_StopConversion(ptr noundef %58)
  br label %59

59:                                               ; preds = %57, %54
  %60 = load ptr, ptr %0, align 8, !tbaa !9
  %61 = getelementptr inbounds i8, ptr %1, i64 20
  %62 = load i32, ptr %61, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %60, i32 noundef 134217728, i32 noundef %62)
  %63 = load ptr, ptr %0, align 8, !tbaa !9
  %64 = getelementptr inbounds i8, ptr %1, i64 16
  %65 = load i32, ptr %64, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %63, i32 noundef 67108864, i32 noundef %65)
  %66 = load ptr, ptr %0, align 8, !tbaa !9
  %67 = getelementptr inbounds i8, ptr %1, i64 12
  %68 = load i32, ptr %67, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %66, i32 noundef 33554432, i32 noundef %68)
  %69 = load ptr, ptr %0, align 8, !tbaa !9
  %70 = getelementptr inbounds i8, ptr %1, i64 8
  %71 = load i32, ptr %70, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %69, i32 noundef 16777216, i32 noundef %71)
  %72 = load ptr, ptr %0, align 8, !tbaa !9
  %73 = getelementptr inbounds i8, ptr %1, i64 4
  %74 = load i32, ptr %73, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %72, i32 noundef 8388608, i32 noundef %74)
  %75 = load ptr, ptr %0, align 8, !tbaa !9
  %76 = load i32, ptr %1, align 4, !tbaa !5
  tail call void @LL_ADC_SetCalibrationLinearFactor(ptr noundef %75, i32 noundef 4194304, i32 noundef %76)
  br i1 %.not33, label %79, label %77

77:                                               ; preds = %59
  %78 = load ptr, ptr %0, align 8, !tbaa !9
  tail call void @LL_ADC_REG_StartConversion(ptr noundef %78)
  br label %79

79:                                               ; preds = %.preheader.preheader, %77, %59, %34, %24
  %.029 = phi i32 [ 1, %24 ], [ 1, %34 ], [ 0, %59 ], [ 0, %77 ], [ 0, %.preheader.preheader ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  ret i32 %.029
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_SetCalibrationLinearFactor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !12, i64 8, !11, i64 88, !6, i64 96, !6, i64 100, !6, i64 104, !14, i64 108}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !13, i64 60}
!13 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!14 = !{!"", !6, i64 0, !6, i64 4}
!15 = !{!16, !6, i64 8}
!16 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !7, i64 80, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !7, i64 112, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !7, i64 144, !6, i64 160, !6, i64 164, !6, i64 168, !6, i64 172, !6, i64 176, !6, i64 180, !6, i64 184, !6, i64 188, !6, i64 192, !6, i64 196, !6, i64 200}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!10, !6, i64 100}
!20 = !{!10, !6, i64 104}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass