; LLVM IR from Wilson-ZheLin/Introduction-to-Digital-Image-Processing :: 3. Affine Transformation and Smoothing/src/main.ll (Z15MedianImage_3x3P5Image)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Image = type { i32, i32, i32, ptr, [15 x [100 x i8]], i32 }

@.str.10 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z15MedianImage_3x3P5Image(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [9 x i8], align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 9, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = call noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef %16, ptr noundef @.str.10, i32 noundef 0)
  store ptr %17, ptr %6, align 8, !tbaa !5
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.Image, ptr %18, i32 0, i32 3
  %20 = load ptr, ptr %19, align 8, !tbaa !9
  store ptr %20, ptr %3, align 8, !tbaa !5
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.Image, ptr %21, i32 0, i32 3
  %23 = load ptr, ptr %22, align 8, !tbaa !9
  store ptr %23, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !12
  br label %24

24:                                               ; preds = %139, %1
  %25 = load i32, ptr %7, align 4, !tbaa !12
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.Image, ptr %26, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !13
  %29 = icmp slt i32 %25, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %24
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %142

31:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !12
  br label %32

32:                                               ; preds = %135, %31
  %33 = load i32, ptr %9, align 4, !tbaa !12
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.Image, ptr %34, i32 0, i32 0
  %36 = load i32, ptr %35, align 8, !tbaa !14
  %37 = icmp slt i32 %33, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %32
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %138

39:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 -1, ptr %11, align 4, !tbaa !12
  br label %40

40:                                               ; preds = %73, %39
  %41 = load i32, ptr %11, align 4, !tbaa !12
  %42 = icmp sle i32 %41, 1
  br i1 %42, label %44, label %43

43:                                               ; preds = %40
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %76

44:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 -1, ptr %12, align 4, !tbaa !12
  br label %45

45:                                               ; preds = %69, %44
  %46 = load i32, ptr %12, align 4, !tbaa !12
  %47 = icmp sle i32 %46, 1
  br i1 %47, label %49, label %48

48:                                               ; preds = %45
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %72

49:                                               ; preds = %45
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.Image, ptr %51, i32 0, i32 0
  %53 = load i32, ptr %52, align 8, !tbaa !14
  %54 = load i32, ptr %7, align 4, !tbaa !12
  %55 = load i32, ptr %11, align 4, !tbaa !12
  %56 = add nsw i32 %54, %55
  %57 = mul nsw i32 %53, %56
  %58 = load i32, ptr %9, align 4, !tbaa !12
  %59 = load i32, ptr %12, align 4, !tbaa !12
  %60 = add nsw i32 %58, %59
  %61 = add nsw i32 %57, %60
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds i8, ptr %50, i64 %62
  %64 = load i8, ptr %63, align 1, !tbaa !15
  %65 = load i32, ptr %10, align 4, !tbaa !12
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %10, align 4, !tbaa !12
  %67 = sext i32 %65 to i64
  %68 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %67
  store i8 %64, ptr %68, align 1, !tbaa !15
  br label %69

69:                                               ; preds = %49
  %70 = load i32, ptr %12, align 4, !tbaa !12
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %12, align 4, !tbaa !12
  br label %45, !llvm.loop !16

72:                                               ; preds = %48
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %11, align 4, !tbaa !12
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %11, align 4, !tbaa !12
  br label %40, !llvm.loop !18

76:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 1, ptr %13, align 4, !tbaa !12
  br label %77

77:                                               ; preds = %119, %76
  %78 = load i32, ptr %13, align 4, !tbaa !12
  %79 = icmp slt i32 %78, 9
  br i1 %79, label %81, label %80

80:                                               ; preds = %77
  store i32 14, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %122

81:                                               ; preds = %77
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %82 = load i32, ptr %13, align 4, !tbaa !12
  %83 = sext i32 %82 to i64
  %84 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %83
  %85 = load i8, ptr %84, align 1, !tbaa !15
  %86 = zext i8 %85 to i32
  store i32 %86, ptr %14, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %87 = load i32, ptr %13, align 4, !tbaa !12
  store i32 %87, ptr %15, align 4, !tbaa !12
  br label %88

88:                                               ; preds = %102, %81
  %89 = load i32, ptr %15, align 4, !tbaa !12
  %90 = icmp sge i32 %89, 1
  br i1 %90, label %91, label %100

91:                                               ; preds = %88
  %92 = load i32, ptr %15, align 4, !tbaa !12
  %93 = sub nsw i32 %92, 1
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %94
  %96 = load i8, ptr %95, align 1, !tbaa !15
  %97 = zext i8 %96 to i32
  %98 = load i32, ptr %14, align 4, !tbaa !12
  %99 = icmp sgt i32 %97, %98
  br label %100

100:                                              ; preds = %91, %88
  %101 = phi i1 [ false, %88 ], [ %99, %91 ]
  br i1 %101, label %102, label %113

102:                                              ; preds = %100
  %103 = load i32, ptr %15, align 4, !tbaa !12
  %104 = sub nsw i32 %103, 1
  %105 = sext i32 %104 to i64
  %106 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %105
  %107 = load i8, ptr %106, align 1, !tbaa !15
  %108 = load i32, ptr %15, align 4, !tbaa !12
  %109 = sext i32 %108 to i64
  %110 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %109
  store i8 %107, ptr %110, align 1, !tbaa !15
  %111 = load i32, ptr %15, align 4, !tbaa !12
  %112 = add nsw i32 %111, -1
  store i32 %112, ptr %15, align 4, !tbaa !12
  br label %88, !llvm.loop !19

113:                                              ; preds = %100
  %114 = load i32, ptr %14, align 4, !tbaa !12
  %115 = trunc i32 %114 to i8
  %116 = load i32, ptr %15, align 4, !tbaa !12
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %117
  store i8 %115, ptr %118, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %119

119:                                              ; preds = %113
  %120 = load i32, ptr %13, align 4, !tbaa !12
  %121 = add nsw i32 %120, 1
  store i32 %121, ptr %13, align 4, !tbaa !12
  br label %77, !llvm.loop !20

122:                                              ; preds = %80
  %123 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 4
  %124 = load i8, ptr %123, align 1, !tbaa !15
  %125 = load ptr, ptr %4, align 8, !tbaa !5
  %126 = load ptr, ptr %2, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.Image, ptr %126, i32 0, i32 0
  %128 = load i32, ptr %127, align 8, !tbaa !14
  %129 = load i32, ptr %7, align 4, !tbaa !12
  %130 = mul nsw i32 %128, %129
  %131 = load i32, ptr %9, align 4, !tbaa !12
  %132 = add nsw i32 %130, %131
  %133 = sext i32 %132 to i64
  %134 = getelementptr inbounds i8, ptr %125, i64 %133
  store i8 %124, ptr %134, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %135

135:                                              ; preds = %122
  %136 = load i32, ptr %9, align 4, !tbaa !12
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr %9, align 4, !tbaa !12
  br label %32, !llvm.loop !21

138:                                              ; preds = %38
  br label %139

139:                                              ; preds = %138
  %140 = load i32, ptr %7, align 4, !tbaa !12
  %141 = add nsw i32 %140, 1
  store i32 %141, ptr %7, align 4, !tbaa !12
  br label %24, !llvm.loop !22

142:                                              ; preds = %30
  %143 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 9, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret ptr %143
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef, ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"_ZTS5Image", !11, i64 0, !11, i64 4, !11, i64 8, !6, i64 16, !7, i64 24, !11, i64 1524}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!10, !11, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = distinct !{!20, !17}
!21 = distinct !{!21, !17}
!22 = distinct !{!22, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_Z15MedianImage_3x3P5Image(ptr noundef %0) local_unnamed_addr #1 {
  %.sroa.0 = alloca i8, align 1
  %.sroa.18 = alloca i8, align 1
  %.sroa.42 = alloca i8, align 1
  %.sroa.63 = alloca i8, align 1
  %.sroa.82 = alloca i8, align 1
  %.sroa.98 = alloca i8, align 1
  %.sroa.111 = alloca i8, align 1
  %.sroa.121 = alloca i8, align 1
  %.sroa.128 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.128)
  %2 = tail call noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef %0, ptr noundef nonnull @.str.10, i32 noundef 0)
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %2, i64 16
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.preheader44.lr.ph, label %._crit_edge53

.preheader44.lr.ph:                               ; preds = %1
  %10 = load i32, ptr %0, align 8, !tbaa !12
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %.preheader44, label %._crit_edge53

.preheader44:                                     ; preds = %.preheader44.lr.ph, %._crit_edge
  %12 = phi i32 [ %62, %._crit_edge ], [ %8, %.preheader44.lr.ph ]
  %13 = phi i32 [ %63, %._crit_edge ], [ %10, %.preheader44.lr.ph ]
  %indvars.iv = phi i64 [ %indvars.iv.next.pre-phi, %._crit_edge ], [ 0, %.preheader44.lr.ph ]
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %.preheader43.preheader, label %.preheader44.._crit_edge_crit_edge

.preheader44.._crit_edge_crit_edge:               ; preds = %.preheader44
  %.pre72 = add nuw nsw i64 %indvars.iv, 1
  br label %._crit_edge

.preheader43.preheader:                           ; preds = %.preheader44
  %15 = trunc i64 %indvars.iv to i32
  %16 = add i32 %15, -1
  %17 = trunc i64 %indvars.iv to i32
  %18 = add nuw nsw i64 %indvars.iv, 1
  %19 = trunc i64 %18 to i32
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  br label %.preheader43

._crit_edge53:                                    ; preds = %._crit_edge, %.preheader44.lr.ph, %1
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.128)
  ret ptr %2

.preheader43:                                     ; preds = %.preheader43.preheader, %.critedge.7
  %21 = phi i32 [ %142, %.critedge.7 ], [ %13, %.preheader43.preheader ]
  %.04151 = phi i32 [ %141, %.critedge.7 ], [ 0, %.preheader43.preheader ]
  %22 = mul i32 %16, %21
  %23 = add i32 %22, %.04151
  %24 = add i32 %23, -1
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds i8, ptr %4, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !13
  store i8 %27, ptr %.sroa.0, align 1, !tbaa !13
  %28 = sext i32 %23 to i64
  %29 = getelementptr inbounds i8, ptr %4, i64 %28
  %30 = load i8, ptr %29, align 1, !tbaa !13
  store i8 %30, ptr %.sroa.18, align 1, !tbaa !13
  %31 = add i32 %23, 1
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds i8, ptr %4, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !13
  store i8 %34, ptr %.sroa.42, align 1, !tbaa !13
  %35 = mul i32 %21, %17
  %36 = add i32 %35, %.04151
  %37 = add i32 %36, -1
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i8, ptr %4, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !13
  store i8 %40, ptr %.sroa.63, align 1, !tbaa !13
  %41 = sext i32 %36 to i64
  %42 = getelementptr inbounds i8, ptr %4, i64 %41
  %43 = load i8, ptr %42, align 1, !tbaa !13
  store i8 %43, ptr %.sroa.82, align 1, !tbaa !13
  %44 = add i32 %36, 1
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i8, ptr %4, i64 %45
  %47 = load i8, ptr %46, align 1, !tbaa !13
  store i8 %47, ptr %.sroa.98, align 1, !tbaa !13
  %48 = mul i32 %21, %19
  %49 = add i32 %48, %.04151
  %50 = add i32 %49, -1
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i8, ptr %4, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !13
  store i8 %53, ptr %.sroa.111, align 1, !tbaa !13
  %54 = sext i32 %49 to i64
  %55 = getelementptr inbounds i8, ptr %4, i64 %54
  %56 = load i8, ptr %55, align 1, !tbaa !13
  store i8 %56, ptr %.sroa.121, align 1, !tbaa !13
  %57 = add i32 %49, 1
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i8, ptr %4, i64 %58
  %60 = load i8, ptr %59, align 1, !tbaa !13
  store i8 %60, ptr %.sroa.128, align 1, !tbaa !13
  %61 = icmp ugt i8 %27, %30
  br i1 %61, label %66, label %.critedge

._crit_edge.loopexit:                             ; preds = %.critedge.7
  %.pre = load i32, ptr %7, align 4, !tbaa !11
  br label %._crit_edge

._crit_edge:                                      ; preds = %.preheader44.._crit_edge_crit_edge, %._crit_edge.loopexit
  %indvars.iv.next.pre-phi = phi i64 [ %.pre72, %.preheader44.._crit_edge_crit_edge ], [ %18, %._crit_edge.loopexit ]
  %62 = phi i32 [ %12, %.preheader44.._crit_edge_crit_edge ], [ %.pre, %._crit_edge.loopexit ]
  %63 = phi i32 [ %13, %.preheader44.._crit_edge_crit_edge ], [ %142, %._crit_edge.loopexit ]
  %64 = sext i32 %62 to i64
  %65 = icmp slt i64 %indvars.iv.next.pre-phi, %64
  br i1 %65, label %.preheader44, label %._crit_edge53, !llvm.loop !14

66:                                               ; preds = %.preheader43
  store i8 %27, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge

.critedge:                                        ; preds = %66, %.preheader43
  %.0.lcssa.sroa.phi = phi ptr [ %.sroa.0, %66 ], [ %.sroa.18, %.preheader43 ]
  store i8 %30, ptr %.0.lcssa.sroa.phi, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.121 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %67 = icmp ugt i8 %.sroa.18.0..sroa.18.1.121, %34
  br i1 %67, label %68, label %.critedge.1

68:                                               ; preds = %.critedge
  store i8 %.sroa.18.0..sroa.18.1.121, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.115 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %69 = icmp ugt i8 %.sroa.0.0..sroa.0.0.115, %34
  br i1 %69, label %70, label %.critedge.1

70:                                               ; preds = %68
  store i8 %.sroa.0.0..sroa.0.0.115, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.1

.critedge.1:                                      ; preds = %70, %68, %.critedge
  %.0.lcssa.1.sroa.phi = phi ptr [ %.sroa.42, %.critedge ], [ %.sroa.18, %68 ], [ %.sroa.0, %70 ]
  store i8 %34, ptr %.0.lcssa.1.sroa.phi, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.131 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.126 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %71 = icmp ugt i8 %.sroa.42.0..sroa.42.2.126, %.sroa.63.0..sroa.63.3.131
  br i1 %71, label %72, label %.critedge.2

72:                                               ; preds = %.critedge.1
  store i8 %.sroa.42.0..sroa.42.2.126, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.120 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %73 = icmp ugt i8 %.sroa.18.0..sroa.18.1.120, %.sroa.63.0..sroa.63.3.131
  br i1 %73, label %74, label %.critedge.2

74:                                               ; preds = %72
  store i8 %.sroa.18.0..sroa.18.1.120, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.114 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %75 = icmp ugt i8 %.sroa.0.0..sroa.0.0.114, %.sroa.63.0..sroa.63.3.131
  br i1 %75, label %76, label %.critedge.2

76:                                               ; preds = %74
  store i8 %.sroa.0.0..sroa.0.0.114, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.2

.critedge.2:                                      ; preds = %76, %74, %72, %.critedge.1
  %.0.lcssa.2.sroa.phi = phi ptr [ %.sroa.63, %.critedge.1 ], [ %.sroa.42, %72 ], [ %.sroa.18, %74 ], [ %.sroa.0, %76 ]
  store i8 %.sroa.63.0..sroa.63.3.131, ptr %.0.lcssa.2.sroa.phi, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.130 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %77 = icmp ugt i8 %.sroa.63.0..sroa.63.3.130, %43
  br i1 %77, label %78, label %.critedge.3

78:                                               ; preds = %.critedge.2
  store i8 %.sroa.63.0..sroa.63.3.130, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.125 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %79 = icmp ugt i8 %.sroa.42.0..sroa.42.2.125, %43
  br i1 %79, label %80, label %.critedge.3

80:                                               ; preds = %78
  store i8 %.sroa.42.0..sroa.42.2.125, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.119 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %81 = icmp ugt i8 %.sroa.18.0..sroa.18.1.119, %43
  br i1 %81, label %82, label %.critedge.3

82:                                               ; preds = %80
  store i8 %.sroa.18.0..sroa.18.1.119, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.113 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %83 = icmp ugt i8 %.sroa.0.0..sroa.0.0.113, %43
  br i1 %83, label %84, label %.critedge.3

84:                                               ; preds = %82
  store i8 %.sroa.0.0..sroa.0.0.113, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.3

.critedge.3:                                      ; preds = %84, %82, %80, %78, %.critedge.2
  %.0.lcssa.3.sroa.phi = phi ptr [ %.sroa.82, %.critedge.2 ], [ %.sroa.63, %78 ], [ %.sroa.42, %80 ], [ %.sroa.18, %82 ], [ %.sroa.0, %84 ]
  store i8 %43, ptr %.0.lcssa.3.sroa.phi, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.138 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.132 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %85 = icmp ugt i8 %.sroa.82.0..sroa.82.4.132, %.sroa.98.0..sroa.98.5.138
  br i1 %85, label %86, label %.critedge.4

86:                                               ; preds = %.critedge.3
  store i8 %.sroa.82.0..sroa.82.4.132, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.129 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %87 = icmp ugt i8 %.sroa.63.0..sroa.63.3.129, %.sroa.98.0..sroa.98.5.138
  br i1 %87, label %88, label %.critedge.4

88:                                               ; preds = %86
  store i8 %.sroa.63.0..sroa.63.3.129, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.124 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %89 = icmp ugt i8 %.sroa.42.0..sroa.42.2.124, %.sroa.98.0..sroa.98.5.138
  br i1 %89, label %90, label %.critedge.4

90:                                               ; preds = %88
  store i8 %.sroa.42.0..sroa.42.2.124, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.118 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %91 = icmp ugt i8 %.sroa.18.0..sroa.18.1.118, %.sroa.98.0..sroa.98.5.138
  br i1 %91, label %92, label %.critedge.4

92:                                               ; preds = %90
  store i8 %.sroa.18.0..sroa.18.1.118, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.112 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %93 = icmp ugt i8 %.sroa.0.0..sroa.0.0.112, %.sroa.98.0..sroa.98.5.138
  br i1 %93, label %94, label %.critedge.4

94:                                               ; preds = %92
  store i8 %.sroa.0.0..sroa.0.0.112, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.4

.critedge.4:                                      ; preds = %94, %92, %90, %88, %86, %.critedge.3
  %.0.lcssa.4.sroa.phi = phi ptr [ %.sroa.98, %.critedge.3 ], [ %.sroa.82, %86 ], [ %.sroa.63, %88 ], [ %.sroa.42, %90 ], [ %.sroa.18, %92 ], [ %.sroa.0, %94 ]
  store i8 %.sroa.98.0..sroa.98.5.138, ptr %.0.lcssa.4.sroa.phi, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6.140 = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.137 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %95 = icmp ugt i8 %.sroa.98.0..sroa.98.5.137, %.sroa.111.0..sroa.111.6.140
  br i1 %95, label %96, label %.critedge.5

96:                                               ; preds = %.critedge.4
  store i8 %.sroa.98.0..sroa.98.5.137, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.133 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %97 = icmp ugt i8 %.sroa.82.0..sroa.82.4.133, %.sroa.111.0..sroa.111.6.140
  br i1 %97, label %98, label %.critedge.5

98:                                               ; preds = %96
  store i8 %.sroa.82.0..sroa.82.4.133, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.128 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %99 = icmp ugt i8 %.sroa.63.0..sroa.63.3.128, %.sroa.111.0..sroa.111.6.140
  br i1 %99, label %100, label %.critedge.5

100:                                              ; preds = %98
  store i8 %.sroa.63.0..sroa.63.3.128, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.123 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %101 = icmp ugt i8 %.sroa.42.0..sroa.42.2.123, %.sroa.111.0..sroa.111.6.140
  br i1 %101, label %102, label %.critedge.5

102:                                              ; preds = %100
  store i8 %.sroa.42.0..sroa.42.2.123, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.117 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %103 = icmp ugt i8 %.sroa.18.0..sroa.18.1.117, %.sroa.111.0..sroa.111.6.140
  br i1 %103, label %104, label %.critedge.5

104:                                              ; preds = %102
  store i8 %.sroa.18.0..sroa.18.1.117, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.111 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %105 = icmp ugt i8 %.sroa.0.0..sroa.0.0.111, %.sroa.111.0..sroa.111.6.140
  br i1 %105, label %106, label %.critedge.5

106:                                              ; preds = %104
  store i8 %.sroa.0.0..sroa.0.0.111, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.5

.critedge.5:                                      ; preds = %106, %104, %102, %100, %98, %96, %.critedge.4
  %.0.lcssa.5.sroa.phi = phi ptr [ %.sroa.111, %.critedge.4 ], [ %.sroa.98, %96 ], [ %.sroa.82, %98 ], [ %.sroa.63, %100 ], [ %.sroa.42, %102 ], [ %.sroa.18, %104 ], [ %.sroa.0, %106 ]
  store i8 %.sroa.111.0..sroa.111.6.140, ptr %.0.lcssa.5.sroa.phi, align 1, !tbaa !13
  %.sroa.121.0..sroa.121.7.141 = load i8, ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6.139 = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %107 = icmp ugt i8 %.sroa.111.0..sroa.111.6.139, %.sroa.121.0..sroa.121.7.141
  br i1 %107, label %108, label %.critedge.6

108:                                              ; preds = %.critedge.5
  store i8 %.sroa.111.0..sroa.111.6.139, ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.136 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %109 = icmp ugt i8 %.sroa.98.0..sroa.98.5.136, %.sroa.121.0..sroa.121.7.141
  br i1 %109, label %110, label %.critedge.6

110:                                              ; preds = %108
  store i8 %.sroa.98.0..sroa.98.5.136, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.134 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %111 = icmp ugt i8 %.sroa.82.0..sroa.82.4.134, %.sroa.121.0..sroa.121.7.141
  br i1 %111, label %112, label %.critedge.6

112:                                              ; preds = %110
  store i8 %.sroa.82.0..sroa.82.4.134, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.127 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %113 = icmp ugt i8 %.sroa.63.0..sroa.63.3.127, %.sroa.121.0..sroa.121.7.141
  br i1 %113, label %114, label %.critedge.6

114:                                              ; preds = %112
  store i8 %.sroa.63.0..sroa.63.3.127, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.122 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %115 = icmp ugt i8 %.sroa.42.0..sroa.42.2.122, %.sroa.121.0..sroa.121.7.141
  br i1 %115, label %116, label %.critedge.6

116:                                              ; preds = %114
  store i8 %.sroa.42.0..sroa.42.2.122, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.116 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %117 = icmp ugt i8 %.sroa.18.0..sroa.18.1.116, %.sroa.121.0..sroa.121.7.141
  br i1 %117, label %118, label %.critedge.6

118:                                              ; preds = %116
  store i8 %.sroa.18.0..sroa.18.1.116, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.110 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %119 = icmp ugt i8 %.sroa.0.0..sroa.0.0.110, %.sroa.121.0..sroa.121.7.141
  br i1 %119, label %120, label %.critedge.6

120:                                              ; preds = %118
  store i8 %.sroa.0.0..sroa.0.0.110, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.6

.critedge.6:                                      ; preds = %120, %118, %116, %114, %112, %110, %108, %.critedge.5
  %.0.lcssa.6.sroa.phi = phi ptr [ %.sroa.121, %.critedge.5 ], [ %.sroa.111, %108 ], [ %.sroa.98, %110 ], [ %.sroa.82, %112 ], [ %.sroa.63, %114 ], [ %.sroa.42, %116 ], [ %.sroa.18, %118 ], [ %.sroa.0, %120 ]
  store i8 %.sroa.121.0..sroa.121.7.141, ptr %.0.lcssa.6.sroa.phi, align 1, !tbaa !13
  %.sroa.121.0..sroa.121.7. = load i8, ptr %.sroa.121, align 1, !tbaa !13
  %121 = icmp ugt i8 %.sroa.121.0..sroa.121.7., %60
  br i1 %121, label %122, label %.critedge.7

122:                                              ; preds = %.critedge.6
  store i8 %.sroa.121.0..sroa.121.7., ptr %.sroa.128, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6. = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %123 = icmp ugt i8 %.sroa.111.0..sroa.111.6., %60
  br i1 %123, label %124, label %.critedge.7

124:                                              ; preds = %122
  store i8 %.sroa.111.0..sroa.111.6., ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5. = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %125 = icmp ugt i8 %.sroa.98.0..sroa.98.5., %60
  br i1 %125, label %126, label %.critedge.7

126:                                              ; preds = %124
  store i8 %.sroa.98.0..sroa.98.5., ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.135 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %127 = icmp ugt i8 %.sroa.82.0..sroa.82.4.135, %60
  br i1 %127, label %128, label %.critedge.7

128:                                              ; preds = %126
  store i8 %.sroa.82.0..sroa.82.4.135, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3. = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %129 = icmp ugt i8 %.sroa.63.0..sroa.63.3., %60
  br i1 %129, label %130, label %.critedge.7

130:                                              ; preds = %128
  store i8 %.sroa.63.0..sroa.63.3., ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2. = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %131 = icmp ugt i8 %.sroa.42.0..sroa.42.2., %60
  br i1 %131, label %132, label %.critedge.7

132:                                              ; preds = %130
  store i8 %.sroa.42.0..sroa.42.2., ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1. = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %133 = icmp ugt i8 %.sroa.18.0..sroa.18.1., %60
  br i1 %133, label %134, label %.critedge.7

134:                                              ; preds = %132
  store i8 %.sroa.18.0..sroa.18.1., ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0. = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %135 = icmp ugt i8 %.sroa.0.0..sroa.0.0., %60
  br i1 %135, label %136, label %.critedge.7

136:                                              ; preds = %134
  store i8 %.sroa.0.0..sroa.0.0., ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.7

.critedge.7:                                      ; preds = %136, %134, %132, %130, %128, %126, %124, %122, %.critedge.6
  %.0.lcssa.7.sroa.phi = phi ptr [ %.sroa.128, %.critedge.6 ], [ %.sroa.121, %122 ], [ %.sroa.111, %124 ], [ %.sroa.98, %126 ], [ %.sroa.82, %128 ], [ %.sroa.63, %130 ], [ %.sroa.42, %132 ], [ %.sroa.18, %134 ], [ %.sroa.0, %136 ]
  store i8 %60, ptr %.0.lcssa.7.sroa.phi, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4. = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %137 = mul nsw i32 %21, %20
  %138 = add nsw i32 %137, %.04151
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds i8, ptr %6, i64 %139
  store i8 %.sroa.82.0..sroa.82.4., ptr %140, align 1, !tbaa !13
  %141 = add nuw nsw i32 %.04151, 1
  %142 = load i32, ptr %0, align 8, !tbaa !12
  %143 = icmp slt i32 %141, %142
  br i1 %143, label %.preheader43, label %._crit_edge.loopexit, !llvm.loop !17
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePci(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS5Image", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !8, i64 24, !7, i64 1524}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15, !16}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!"llvm.loop.unswitch.partial.disable"}
!17 = distinct !{!17, !15}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass