; LLVM IR from AlgoGenesis/C :: Miscellaneous Algorithms/LRU-page replacement (Program)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @findLRU(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds i32, ptr %8, i64 0
  %10 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %10, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %32, %2
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = load i32, ptr %4, align 4, !tbaa !9
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %35

16:                                               ; preds = %11
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i32, ptr %17, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !9
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %24, label %31

24:                                               ; preds = %16
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds i32, ptr %25, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !9
  store i32 %29, ptr %5, align 4, !tbaa !9
  %30 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %30, ptr %6, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %24, %16
  br label %32

32:                                               ; preds = %31
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %7, align 4, !tbaa !9
  br label %11, !llvm.loop !11

35:                                               ; preds = %15
  %36 = load i32, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local i32 @findLRU(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %4 = load i32, ptr %0, align 4, !tbaa !5
  %wide.trip.count = zext nneg i32 %1 to i64
  %5 = add nsw i64 %wide.trip.count, -1
  %6 = add nsw i64 %wide.trip.count, -2
  %xtraiter = and i64 %5, 3
  %7 = icmp ult i64 %6, 3
  br i1 %7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %5, -4
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %spec.select14.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select14.3, %.lr.ph ]
  %indvars.iv.unr = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %.01016.unr = phi i32 [ 0, %.lr.ph.preheader ], [ %spec.select14.3, %.lr.ph ]
  %.01115.unr = phi i32 [ %4, %.lr.ph.preheader ], [ %spec.select.3, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.01016.epil = phi i32 [ %spec.select14.epil, %.lr.ph.epil ], [ %.01016.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.01115.epil = phi i32 [ %spec.select.epil, %.lr.ph.epil ], [ %.01115.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %8 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.epil
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = icmp slt i32 %9, %.01115.epil
  %spec.select.epil = tail call i32 @llvm.smin.i32(i32 %9, i32 %.01115.epil)
  %11 = trunc nuw nsw i64 %indvars.iv.epil to i32
  %spec.select14.epil = select i1 %10, i32 %11, i32 %.01016.epil
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !9

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %2
  %.010.lcssa = phi i32 [ 0, %2 ], [ %spec.select14.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select14.epil, %.lr.ph.epil ]
  ret i32 %.010.lcssa

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %.01016 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %spec.select14.3, %.lr.ph ]
  %.01115 = phi i32 [ %4, %.lr.ph.preheader.new ], [ %spec.select.3, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %12 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp slt i32 %13, %.01115
  %spec.select = tail call i32 @llvm.smin.i32(i32 %13, i32 %.01115)
  %15 = trunc nuw nsw i64 %indvars.iv to i32
  %spec.select14 = select i1 %14, i32 %15, i32 %.01016
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %16 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp slt i32 %17, %spec.select
  %spec.select.1 = tail call i32 @llvm.smin.i32(i32 %17, i32 %spec.select)
  %19 = trunc nuw nsw i64 %indvars.iv.next to i32
  %spec.select14.1 = select i1 %18, i32 %19, i32 %spec.select14
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %20 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next.1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = icmp slt i32 %21, %spec.select.1
  %spec.select.2 = tail call i32 @llvm.smin.i32(i32 %21, i32 %spec.select.1)
  %23 = trunc nuw nsw i64 %indvars.iv.next.1 to i32
  %spec.select14.2 = select i1 %22, i32 %23, i32 %spec.select14.1
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %24 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next.2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp slt i32 %25, %spec.select.2
  %spec.select.3 = tail call i32 @llvm.smin.i32(i32 %25, i32 %spec.select.2)
  %27 = trunc nuw nsw i64 %indvars.iv.next.2 to i32
  %spec.select14.3 = select i1 %26, i32 %27, i32 %spec.select14.2
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.unroll.disable"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass