; LLVM IR from cpuimage/cpuimagelib :: cpuimage (ycbcr2rgb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @ycbcr2rgb(i8 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #1 {
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store i8 %0, ptr %7, align 1, !tbaa !5
  store i8 %1, ptr %8, align 1, !tbaa !5
  store i8 %2, ptr %9, align 1, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !8
  store ptr %4, ptr %11, align 8, !tbaa !8
  store ptr %5, ptr %12, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %19 = load i8, ptr %7, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = shl i32 %20, 20
  %22 = add nsw i32 %21, 524288
  store i32 %22, ptr %13, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  %23 = load i8, ptr %9, align 1, !tbaa !5
  %24 = zext i8 %23 to i32
  %25 = sub nsw i32 %24, 128
  store i32 %25, ptr %17, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #2
  %26 = load i8, ptr %8, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  %28 = sub nsw i32 %27, 128
  store i32 %28, ptr %18, align 4, !tbaa !10
  %29 = load i32, ptr %13, align 4, !tbaa !10
  %30 = load i32, ptr %17, align 4, !tbaa !10
  %31 = mul nsw i32 %30, 1470208
  %32 = add nsw i32 %29, %31
  store i32 %32, ptr %14, align 4, !tbaa !10
  %33 = load i32, ptr %13, align 4, !tbaa !10
  %34 = load i32, ptr %17, align 4, !tbaa !10
  %35 = mul nsw i32 %34, -748800
  %36 = add nsw i32 %33, %35
  %37 = load i32, ptr %18, align 4, !tbaa !10
  %38 = mul nsw i32 %37, -360960
  %39 = mul i32 %38, -65536
  %40 = add i32 %36, %39
  store i32 %40, ptr %15, align 4, !tbaa !10
  %41 = load i32, ptr %13, align 4, !tbaa !10
  %42 = load i32, ptr %18, align 4, !tbaa !10
  %43 = mul nsw i32 %42, 1858048
  %44 = add nsw i32 %41, %43
  store i32 %44, ptr %16, align 4, !tbaa !10
  %45 = load i32, ptr %14, align 4, !tbaa !10
  %46 = ashr i32 %45, 20
  store i32 %46, ptr %14, align 4, !tbaa !10
  %47 = load i32, ptr %15, align 4, !tbaa !10
  %48 = ashr i32 %47, 20
  store i32 %48, ptr %15, align 4, !tbaa !10
  %49 = load i32, ptr %16, align 4, !tbaa !10
  %50 = ashr i32 %49, 20
  store i32 %50, ptr %16, align 4, !tbaa !10
  %51 = load i32, ptr %14, align 4, !tbaa !10
  %52 = icmp ugt i32 %51, 255
  br i1 %52, label %53, label %59

53:                                               ; preds = %6
  %54 = load i32, ptr %14, align 4, !tbaa !10
  %55 = icmp slt i32 %54, 0
  br i1 %55, label %56, label %57

56:                                               ; preds = %53
  store i32 0, ptr %14, align 4, !tbaa !10
  br label %58

57:                                               ; preds = %53
  store i32 255, ptr %14, align 4, !tbaa !10
  br label %58

58:                                               ; preds = %57, %56
  br label %59

59:                                               ; preds = %58, %6
  %60 = load i32, ptr %15, align 4, !tbaa !10
  %61 = icmp ugt i32 %60, 255
  br i1 %61, label %62, label %68

62:                                               ; preds = %59
  %63 = load i32, ptr %15, align 4, !tbaa !10
  %64 = icmp slt i32 %63, 0
  br i1 %64, label %65, label %66

65:                                               ; preds = %62
  store i32 0, ptr %15, align 4, !tbaa !10
  br label %67

66:                                               ; preds = %62
  store i32 255, ptr %15, align 4, !tbaa !10
  br label %67

67:                                               ; preds = %66, %65
  br label %68

68:                                               ; preds = %67, %59
  %69 = load i32, ptr %16, align 4, !tbaa !10
  %70 = icmp ugt i32 %69, 255
  br i1 %70, label %71, label %77

71:                                               ; preds = %68
  %72 = load i32, ptr %16, align 4, !tbaa !10
  %73 = icmp slt i32 %72, 0
  br i1 %73, label %74, label %75

74:                                               ; preds = %71
  store i32 0, ptr %16, align 4, !tbaa !10
  br label %76

75:                                               ; preds = %71
  store i32 255, ptr %16, align 4, !tbaa !10
  br label %76

76:                                               ; preds = %75, %74
  br label %77

77:                                               ; preds = %76, %68
  %78 = load i32, ptr %14, align 4, !tbaa !10
  %79 = trunc i32 %78 to i8
  %80 = load ptr, ptr %10, align 8, !tbaa !8
  store i8 %79, ptr %80, align 1, !tbaa !5
  %81 = load i32, ptr %15, align 4, !tbaa !10
  %82 = trunc i32 %81 to i8
  %83 = load ptr, ptr %11, align 8, !tbaa !8
  store i8 %82, ptr %83, align 1, !tbaa !5
  %84 = load i32, ptr %16, align 4, !tbaa !10
  %85 = trunc i32 %84 to i8
  %86 = load ptr, ptr %12, align 8, !tbaa !8
  store i8 %85, ptr %86, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @ycbcr2rgb(i8 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5) local_unnamed_addr #0 {
  %7 = zext i8 %0 to i32
  %8 = shl nuw nsw i32 %7, 20
  %9 = or disjoint i32 %8, 524288
  %10 = zext i8 %2 to i32
  %11 = add nsw i32 %10, -128
  %12 = zext i8 %1 to i32
  %13 = mul nsw i32 %11, 1470208
  %14 = add nsw i32 %13, %9
  %15 = mul nsw i32 %11, -748800
  %16 = mul i32 %12, -2113929216
  %17 = add i32 %16, %9
  %18 = add i32 %17, %15
  %19 = mul nuw nsw i32 %12, 1858048
  %20 = add nsw i32 %19, -237830144
  %21 = add nsw i32 %20, %9
  %22 = ashr i32 %14, 20
  %23 = ashr i32 %18, 20
  %24 = ashr i32 %21, 20
  %25 = tail call i32 @llvm.smax.i32(i32 %22, i32 0)
  %26 = tail call i32 @llvm.umin.i32(i32 %25, i32 255)
  %27 = tail call i32 @llvm.smax.i32(i32 %23, i32 0)
  %28 = tail call i32 @llvm.umin.i32(i32 %27, i32 255)
  %29 = tail call i32 @llvm.smax.i32(i32 %24, i32 0)
  %30 = tail call i32 @llvm.umin.i32(i32 %29, i32 255)
  %31 = trunc nuw i32 %26 to i8
  store i8 %31, ptr %3, align 1, !tbaa !5
  %32 = trunc nuw i32 %28 to i8
  store i8 %32, ptr %4, align 1, !tbaa !5
  %33 = trunc nuw i32 %30 to i8
  store i8 %33, ptr %5, align 1, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass