; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_TIM_GetChannelState(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %6 = load i32, ptr %4, align 4, !tbaa !9
  %7 = icmp eq i32 %6, 0
  br i1 %7, label %8, label %13

8:                                                ; preds = %2
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %9, i32 0, i32 6
  %11 = getelementptr inbounds [6 x i32], ptr %10, i64 0, i64 0
  %12 = load volatile i32, ptr %11, align 8, !tbaa !9
  br label %58

13:                                               ; preds = %2
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = icmp eq i32 %14, 4
  br i1 %15, label %16, label %21

16:                                               ; preds = %13
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %17, i32 0, i32 6
  %19 = getelementptr inbounds [6 x i32], ptr %18, i64 0, i64 1
  %20 = load volatile i32, ptr %19, align 4, !tbaa !9
  br label %56

21:                                               ; preds = %13
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 8
  br i1 %23, label %24, label %29

24:                                               ; preds = %21
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %25, i32 0, i32 6
  %27 = getelementptr inbounds [6 x i32], ptr %26, i64 0, i64 2
  %28 = load volatile i32, ptr %27, align 8, !tbaa !9
  br label %54

29:                                               ; preds = %21
  %30 = load i32, ptr %4, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 12
  br i1 %31, label %32, label %37

32:                                               ; preds = %29
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %33, i32 0, i32 6
  %35 = getelementptr inbounds [6 x i32], ptr %34, i64 0, i64 3
  %36 = load volatile i32, ptr %35, align 4, !tbaa !9
  br label %52

37:                                               ; preds = %29
  %38 = load i32, ptr %4, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 16
  br i1 %39, label %40, label %45

40:                                               ; preds = %37
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %41, i32 0, i32 6
  %43 = getelementptr inbounds [6 x i32], ptr %42, i64 0, i64 4
  %44 = load volatile i32, ptr %43, align 8, !tbaa !9
  br label %50

45:                                               ; preds = %37
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %46, i32 0, i32 6
  %48 = getelementptr inbounds [6 x i32], ptr %47, i64 0, i64 5
  %49 = load volatile i32, ptr %48, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %45, %40
  %51 = phi i32 [ %44, %40 ], [ %49, %45 ]
  br label %52

52:                                               ; preds = %50, %32
  %53 = phi i32 [ %36, %32 ], [ %51, %50 ]
  br label %54

54:                                               ; preds = %52, %24
  %55 = phi i32 [ %28, %24 ], [ %53, %52 ]
  br label %56

56:                                               ; preds = %54, %16
  %57 = phi i32 [ %20, %16 ], [ %55, %54 ]
  br label %58

58:                                               ; preds = %56, %8
  %59 = phi i32 [ %12, %8 ], [ %57, %56 ]
  store i32 %59, ptr %5, align 4, !tbaa !9
  %60 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %60
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable
define dso_local i32 @HAL_TIM_GetChannelState(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call i32 @llvm.fshl.i32(i32 %1, i32 %1, i32 30)
  %4 = icmp ult i32 %3, 5
  %switch.idx.cast = zext i32 %3 to i64
  %switch.idx.mult = shl nuw nsw i64 %switch.idx.cast, 2
  %switch.offset = add nuw nsw i64 %switch.idx.mult, 104
  %.sink = select i1 %4, i64 %switch.offset, i64 124
  %5 = getelementptr inbounds i8, ptr %0, i64 %.sink
  %6 = load volatile i32, ptr %5, align 4, !tbaa !5
  ret i32 %6
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshl.i32(i32, i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass