; LLVM IR from brpapa/algorithms :: solutions/uri/2065.ll (Z3minP3regi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.reg = type { i32, i32, i32 }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z3minP3regi(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca %struct.reg, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.reg, ptr %7, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %8, i64 12, i1 false), !tbaa.struct !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %30, %2
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %33

14:                                               ; preds = %9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds %struct.reg, ptr %15, i64 %17
  %19 = getelementptr inbounds %struct.reg, ptr %18, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !12
  %21 = getelementptr inbounds %struct.reg, ptr %5, i32 0, i32 2
  %22 = load i32, ptr %21, align 4, !tbaa !12
  %23 = icmp slt i32 %20, %22
  br i1 %23, label %24, label %29

24:                                               ; preds = %14
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds %struct.reg, ptr %25, i64 %27
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %28, i64 12, i1 false), !tbaa.struct !11
  br label %29

29:                                               ; preds = %24, %14
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %6, align 4, !tbaa !9
  br label %9, !llvm.loop !14

33:                                               ; preds = %13
  %34 = getelementptr inbounds %struct.reg, ptr %5, i32 0, i32 0
  %35 = load i32, ptr %34, align 4, !tbaa !16
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #3
  ret i32 %35
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9}
!12 = !{!13, !10, i64 8}
!13 = !{!"_ZTS3reg", !10, i64 0, !10, i64 4, !10, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!13, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.reg = type { i32, i32, i32 }

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef i32 @_Z3minP3regi(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %.sroa.0.0.copyload = load i32, ptr %0, align 4, !tbaa !5
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %.sroa.57.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 8
  %.sroa.57.0.copyload = load i32, ptr %.sroa.57.0..sroa_idx, align 4, !tbaa !5
  %wide.trip.count = zext nneg i32 %1 to i64
  %4 = add nsw i64 %wide.trip.count, -1
  %xtraiter = and i64 %4, 1
  %5 = icmp eq i32 %1, 2
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %4, -2
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %22, %.lr.ph.preheader
  %.sroa.0.1.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %.sroa.0.1.1, %22 ]
  %indvars.iv.unr = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next.1, %22 ]
  %.sroa.0.015.unr = phi i32 [ %.sroa.0.0.copyload, %.lr.ph.preheader ], [ %.sroa.0.1.1, %22 ]
  %.sroa.57.014.unr = phi i32 [ %.sroa.57.0.copyload, %.lr.ph.preheader ], [ %.sroa.57.1.1, %22 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %6 = getelementptr inbounds %struct.reg, ptr %0, i64 %indvars.iv.unr
  %7 = getelementptr inbounds i8, ptr %6, i64 8
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp slt i32 %8, %.sroa.57.014.unr
  br i1 %9, label %10, label %._crit_edge

10:                                               ; preds = %.lr.ph.epil
  %.sroa.0.0.copyload4.epil = load i32, ptr %6, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %10, %.lr.ph.epil, %2
  %.sroa.0.0.lcssa = phi i32 [ %.sroa.0.0.copyload, %2 ], [ %.sroa.0.1.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %.sroa.0.0.copyload4.epil, %10 ], [ %.sroa.0.015.unr, %.lr.ph.epil ]
  ret i32 %.sroa.0.0.lcssa

.lr.ph:                                           ; preds = %22, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %22 ]
  %.sroa.0.015 = phi i32 [ %.sroa.0.0.copyload, %.lr.ph.preheader.new ], [ %.sroa.0.1.1, %22 ]
  %.sroa.57.014 = phi i32 [ %.sroa.57.0.copyload, %.lr.ph.preheader.new ], [ %.sroa.57.1.1, %22 ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %22 ]
  %11 = getelementptr inbounds %struct.reg, ptr %0, i64 %indvars.iv
  %12 = getelementptr inbounds i8, ptr %11, i64 8
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp slt i32 %13, %.sroa.57.014
  br i1 %14, label %15, label %.lr.ph.1

15:                                               ; preds = %.lr.ph
  %.sroa.0.0.copyload4 = load i32, ptr %11, align 4, !tbaa !5
  br label %.lr.ph.1

.lr.ph.1:                                         ; preds = %.lr.ph, %15
  %.sroa.57.1 = phi i32 [ %13, %15 ], [ %.sroa.57.014, %.lr.ph ]
  %.sroa.0.1 = phi i32 [ %.sroa.0.0.copyload4, %15 ], [ %.sroa.0.015, %.lr.ph ]
  %16 = getelementptr inbounds %struct.reg, ptr %0, i64 %indvars.iv
  %17 = getelementptr inbounds i8, ptr %16, i64 20
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp slt i32 %18, %.sroa.57.1
  br i1 %19, label %20, label %22

20:                                               ; preds = %.lr.ph.1
  %21 = getelementptr inbounds i8, ptr %16, i64 12
  %.sroa.0.0.copyload4.1 = load i32, ptr %21, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %20, %.lr.ph.1
  %.sroa.57.1.1 = phi i32 [ %18, %20 ], [ %.sroa.57.1, %.lr.ph.1 ]
  %.sroa.0.1.1 = phi i32 [ %.sroa.0.0.copyload4.1, %20 ], [ %.sroa.0.1, %.lr.ph.1 ]
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass