; LLVM IR from Leet-Us-Code/DSA-A-Z-Practice :: Sid's Levels/Level - 1/BinaryTree (KLevelsFar)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type <{ ptr, ptr, i32, [4 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  store i1 false, ptr %4, align 1
  br label %47

14:                                               ; preds = %3
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = icmp eq ptr %15, %16
  br i1 %17, label %18, label %20

18:                                               ; preds = %14
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %19, ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i1 true, ptr %4, align 1
  br label %47

20:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.Node, ptr %21, i32 0, i32 0
  %23 = load ptr, ptr %22, align 8, !tbaa !9
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = call noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %23, ptr noundef %24, ptr noundef nonnull align 8 dereferenceable(24) %25)
  %27 = zext i1 %26 to i8
  store i8 %27, ptr %8, align 1, !tbaa !12
  %28 = load i8, ptr %8, align 1, !tbaa !12, !range !14, !noundef !15
  %29 = trunc i8 %28 to i1
  br i1 %29, label %30, label %32

30:                                               ; preds = %20
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %31, ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %46

32:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #2
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.Node, ptr %33, i32 0, i32 1
  %35 = load ptr, ptr %34, align 8, !tbaa !16
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = call noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %35, ptr noundef %36, ptr noundef nonnull align 8 dereferenceable(24) %37)
  %39 = zext i1 %38 to i8
  store i8 %39, ptr %10, align 1, !tbaa !12
  %40 = load i8, ptr %10, align 1, !tbaa !12, !range !14, !noundef !15
  %41 = trunc i8 %40 to i1
  br i1 %41, label %42, label %44

42:                                               ; preds = %32
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %43, ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %45

44:                                               ; preds = %32
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %45

45:                                               ; preds = %44, %42
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #2
  br label %46

46:                                               ; preds = %45, %30
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  br label %47

47:                                               ; preds = %46, %18, %13
  %48 = load i1, ptr %4, align 1
  ret i1 %48
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 8, !11, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = !{!10, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #0 {
  %4 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  %5 = icmp eq ptr %0, null
  br i1 %5, label %15, label %6

6:                                                ; preds = %3
  %7 = icmp eq ptr %0, %1
  br i1 %7, label %.sink.split, label %8

8:                                                ; preds = %6
  %9 = load ptr, ptr %0, align 8, !tbaa !9
  %10 = tail call noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %9, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2)
  br i1 %10, label %.sink.split, label %11

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 8
  %13 = load ptr, ptr %12, align 8, !tbaa !12
  %14 = tail call noundef zeroext i1 @_Z10NodeToRootP4NodeS0_RSt6vectorIS0_SaIS0_EE(ptr noundef %13, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2)
  br i1 %14, label %.sink.split, label %15

.sink.split:                                      ; preds = %11, %8, %6
  call void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br label %15

15:                                               ; preds = %.sink.split, %11, %3
  %.2 = phi i1 [ false, %3 ], [ false, %11 ], [ true, %.sink.split ]
  ret i1 %.2
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 8, !11, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass