; LLVM IR from Leet-Us-Code/DSA-A-Z-Practice :: Sid's Levels/Level - 3/Sorting and Searching/Inversion Count.ll (Z6dividePxxxRx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5mergePxxxx(ptr noundef, i64 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6dividePxxxRx(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  %10 = load i64, ptr %6, align 8, !tbaa !9
  %11 = load i64, ptr %7, align 8, !tbaa !9
  %12 = icmp slt i64 %10, %11
  br i1 %12, label %13, label %35

13:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %14 = load i64, ptr %6, align 8, !tbaa !9
  %15 = load i64, ptr %7, align 8, !tbaa !9
  %16 = add nsw i64 %14, %15
  %17 = sdiv i64 %16, 2
  store i64 %17, ptr %9, align 8, !tbaa !9
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = load i64, ptr %6, align 8, !tbaa !9
  %20 = load i64, ptr %9, align 8, !tbaa !9
  %21 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_Z6dividePxxxRx(ptr noundef %18, i64 noundef %19, i64 noundef %20, ptr noundef nonnull align 8 dereferenceable(8) %21)
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = load i64, ptr %9, align 8, !tbaa !9
  %24 = add nsw i64 %23, 1
  %25 = load i64, ptr %7, align 8, !tbaa !9
  %26 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_Z6dividePxxxRx(ptr noundef %22, i64 noundef %24, i64 noundef %25, ptr noundef nonnull align 8 dereferenceable(8) %26)
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i64, ptr %6, align 8, !tbaa !9
  %29 = load i64, ptr %9, align 8, !tbaa !9
  %30 = load i64, ptr %7, align 8, !tbaa !9
  %31 = call noundef i64 @_Z5mergePxxxx(ptr noundef %27, i64 noundef %28, i64 noundef %29, i64 noundef %30)
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = add nsw i64 %33, %31
  store i64 %34, ptr %32, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  br label %35

35:                                               ; preds = %13, %4
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5mergePxxxx(ptr noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6dividePxxxRx(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %3) local_unnamed_addr #0 {
  %5 = icmp slt i64 %1, %2
  br i1 %5, label %6, label %common.ret17

common.ret17:                                     ; preds = %4, %6
  ret void

6:                                                ; preds = %4
  %7 = add nsw i64 %2, %1
  %8 = sdiv i64 %7, 2
  tail call void @_Z6dividePxxxRx(ptr noundef %0, i64 noundef %1, i64 noundef %8, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %9 = add nsw i64 %8, 1
  tail call void @_Z6dividePxxxRx(ptr noundef %0, i64 noundef %9, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %10 = tail call noundef i64 @_Z5mergePxxxx(ptr noundef %0, i64 noundef %1, i64 noundef %8, i64 noundef %2)
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = add nsw i64 %11, %10
  store i64 %12, ptr %3, align 8, !tbaa !5
  br label %common.ret17
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass