; LLVM IR from Leet-Us-Code/DSA-A-Z-Practice :: Sid's Levels/Level - 1/Backtracking/NQueensNaive.ll (Z10solveBoardPA10_iii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z6isSafePA10_iiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10solveBoardPA10_iii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = load i32, ptr %7, align 4, !tbaa !9
  %12 = icmp sge i32 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  store i1 true, ptr %4, align 1
  br label %55

14:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %49, %14
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  store i32 2, ptr %9, align 4
  br label %52

20:                                               ; preds = %15
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = call noundef zeroext i1 @_Z6isSafePA10_iiii(ptr noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24)
  br i1 %25, label %26, label %48

26:                                               ; preds = %20
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [10 x i32], ptr %27, i64 %29
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [10 x i32], ptr %30, i64 0, i64 %32
  store i32 1, ptr %33, align 4, !tbaa !9
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i32, ptr %6, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = call noundef zeroext i1 @_Z10solveBoardPA10_iii(ptr noundef %34, i32 noundef %36, i32 noundef %37)
  br i1 %38, label %39, label %40

39:                                               ; preds = %26
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %52

40:                                               ; preds = %26
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = load i32, ptr %8, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [10 x i32], ptr %41, i64 %43
  %45 = load i32, ptr %6, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [10 x i32], ptr %44, i64 0, i64 %46
  store i32 0, ptr %47, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %40, %20
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %8, align 4, !tbaa !9
  br label %15, !llvm.loop !11

52:                                               ; preds = %39, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %53 = load i32, ptr %9, align 4
  switch i32 %53, label %57 [
    i32 2, label %54
    i32 1, label %55
  ]

54:                                               ; preds = %52
  store i1 false, ptr %4, align 1
  br label %55

55:                                               ; preds = %54, %52, %13
  %56 = load i1, ptr %4, align 1
  ret i1 %56

57:                                               ; preds = %52
  unreachable
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z6isSafePA10_iiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z10solveBoardPA10_iii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp slt i32 %1, %2
  br i1 %.not, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %3
  %.not2324 = icmp sgt i32 %2, 0
  br i1 %.not2324, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %4 = sext i32 %1 to i64
  %5 = add nsw i32 %1, 1
  %6 = zext nneg i32 %2 to i64
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %7

7:                                                ; preds = %.lr.ph, %14
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %14 ]
  %8 = trunc nuw nsw i64 %indvars.iv to i32
  %9 = tail call noundef zeroext i1 @_Z6isSafePA10_iiii(ptr noundef %0, i32 noundef %8, i32 noundef %1, i32 noundef %2)
  br i1 %9, label %10, label %14

10:                                               ; preds = %7
  %11 = getelementptr inbounds [10 x i32], ptr %0, i64 %indvars.iv, i64 %4
  store i32 1, ptr %11, align 4, !tbaa !5
  %12 = tail call noundef zeroext i1 @_Z10solveBoardPA10_iii(ptr noundef %0, i32 noundef %5, i32 noundef %2)
  br i1 %12, label %.loopexit, label %13

13:                                               ; preds = %10
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %7, %13
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit.loopexit.split.loop.exit, label %7, !llvm.loop !9

.loopexit.loopexit.split.loop.exit:               ; preds = %14
  %.not23.le = icmp ult i64 %indvars.iv.next, %6
  br label %.loopexit

.loopexit:                                        ; preds = %10, %.loopexit.loopexit.split.loop.exit, %.preheader, %3
  %.1 = phi i1 [ true, %3 ], [ false, %.preheader ], [ %.not23.le, %.loopexit.loopexit.split.loop.exit ], [ true, %10 ]
  ret i1 %.1
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass