; LLVM IR from AlgoGenesis/C :: Greedy Algorithms/Gale-Shapley Algorithm (Program)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@preferenceWomen = external dso_local global [100 x [100 x i32]], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @prefers(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %38, %3
  %11 = load i32, ptr %8, align 4, !tbaa !5
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %13 = icmp slt i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %10
  store i32 2, ptr %9, align 4
  br label %41

15:                                               ; preds = %10
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [100 x [100 x i32]], ptr @preferenceWomen, i64 0, i64 %17
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [100 x i32], ptr %18, i64 0, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = icmp eq i32 %22, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %15
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %41

26:                                               ; preds = %15
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [100 x [100 x i32]], ptr @preferenceWomen, i64 0, i64 %28
  %30 = load i32, ptr %8, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [100 x i32], ptr %29, i64 0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = icmp eq i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %26
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %41

37:                                               ; preds = %26
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %8, align 4, !tbaa !5
  br label %10, !llvm.loop !9

41:                                               ; preds = %36, %25, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %42 = load i32, ptr %9, align 4
  switch i32 %42, label %46 [
    i32 2, label %43
    i32 1, label %44
  ]

43:                                               ; preds = %41
  store i1 false, ptr %4, align 1
  br label %44

44:                                               ; preds = %43, %41
  %45 = load i1, ptr %4, align 1
  ret i1 %45

46:                                               ; preds = %41
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@preferenceWomen = external dso_local local_unnamed_addr global [100 x [100 x i32]], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local zeroext i1 @prefers(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = sext i32 %0 to i64
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %.not12 = icmp sgt i32 %5, 0
  br i1 %.not12, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %6 = zext nneg i32 %5 to i64
  %wide.trip.count = zext nneg i32 %5 to i64
  %7 = getelementptr inbounds [100 x [100 x i32]], ptr @preferenceWomen, i64 0, i64 %4, i64 0
  %8 = load i32, ptr %7, align 16, !tbaa !5
  %9 = icmp eq i32 %8, %1
  br i1 %9, label %._crit_edge, label %.lr.ph24

10:                                               ; preds = %.lr.ph24
  %indvars.iv.next = add nuw nsw i64 %indvars.iv22, 1
  %.not = icmp ult i64 %indvars.iv.next, %6
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.loopexit.loopexit, label %.lr.ph, !llvm.loop !9

.lr.ph:                                           ; preds = %10
  %11 = getelementptr inbounds [100 x [100 x i32]], ptr @preferenceWomen, i64 0, i64 %4, i64 %indvars.iv.next
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = icmp eq i32 %12, %1
  br i1 %13, label %._crit_edge.loopexit.loopexit, label %.lr.ph24, !llvm.loop !9

.lr.ph24:                                         ; preds = %.lr.ph.preheader, %.lr.ph
  %14 = phi i32 [ %12, %.lr.ph ], [ %8, %.lr.ph.preheader ]
  %.not1423 = phi i1 [ %.not, %.lr.ph ], [ true, %.lr.ph.preheader ]
  %indvars.iv22 = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %15 = icmp eq i32 %14, %2
  br i1 %15, label %._crit_edge.loopexit.loopexit, label %10

._crit_edge.loopexit.loopexit:                    ; preds = %.lr.ph24, %.lr.ph, %10
  %.not.lcssa.ph.ph = phi i1 [ %.not, %10 ], [ %.not, %.lr.ph ], [ %.not1423, %.lr.ph24 ]
  %.010.ph.ph = phi i1 [ undef, %10 ], [ true, %.lr.ph ], [ false, %.lr.ph24 ]
  %16 = and i1 %.not.lcssa.ph.ph, %.010.ph.ph
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.preheader, %._crit_edge.loopexit.loopexit, %3
  %spec.select = phi i1 [ false, %3 ], [ true, %.lr.ph.preheader ], [ %16, %._crit_edge.loopexit.loopexit ]
  ret i1 %spec.select
}

attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass