; LLVM IR from ctlst-tech/catpilot :: os/freertos/core/src (tasks)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@uxSchedulerSuspended = external hidden global i64, align 8
@xTickCount = external hidden global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @xTaskDelayUntil(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !11
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = icmp eq ptr %9, null
  br i1 %10, label %11, label %13

11:                                               ; preds = %2
  call void @vPortRaiseBASEPRI()
  br label %12

12:                                               ; preds = %12, %11
  br label %12

13:                                               ; preds = %2
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = icmp ugt i32 %14, 0
  %16 = zext i1 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %20

18:                                               ; preds = %13
  call void @vPortRaiseBASEPRI()
  br label %19

19:                                               ; preds = %19, %18
  br label %19

20:                                               ; preds = %13
  %21 = load volatile i64, ptr @uxSchedulerSuspended, align 8, !tbaa !11
  %22 = icmp eq i64 %21, 0
  %23 = zext i1 %22 to i32
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %27

25:                                               ; preds = %20
  call void @vPortRaiseBASEPRI()
  br label %26

26:                                               ; preds = %26, %25
  br label %26

27:                                               ; preds = %20
  call void @vTaskSuspendAll()
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %28 = load volatile i32, ptr @xTickCount, align 4, !tbaa !9
  store i32 %28, ptr %8, align 4, !tbaa !9
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = load i32, ptr %4, align 4, !tbaa !9
  %32 = add i32 %30, %31
  store i32 %32, ptr %5, align 4, !tbaa !9
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = icmp ult i32 %33, %35
  br i1 %36, label %37, label %49

37:                                               ; preds = %27
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = icmp ult i32 %38, %40
  br i1 %41, label %42, label %47

42:                                               ; preds = %37
  %43 = load i32, ptr %5, align 4, !tbaa !9
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = icmp ugt i32 %43, %44
  br i1 %45, label %46, label %47

46:                                               ; preds = %42
  store i64 1, ptr %7, align 8, !tbaa !11
  br label %48

47:                                               ; preds = %42, %37
  br label %48

48:                                               ; preds = %47, %46
  br label %61

49:                                               ; preds = %27
  %50 = load i32, ptr %5, align 4, !tbaa !9
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = icmp ult i32 %50, %52
  br i1 %53, label %58, label %54

54:                                               ; preds = %49
  %55 = load i32, ptr %5, align 4, !tbaa !9
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = icmp ugt i32 %55, %56
  br i1 %57, label %58, label %59

58:                                               ; preds = %54, %49
  store i64 1, ptr %7, align 8, !tbaa !11
  br label %60

59:                                               ; preds = %54
  br label %60

60:                                               ; preds = %59, %58
  br label %61

61:                                               ; preds = %60, %48
  %62 = load i32, ptr %5, align 4, !tbaa !9
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  store i32 %62, ptr %63, align 4, !tbaa !9
  %64 = load i64, ptr %7, align 8, !tbaa !11
  %65 = icmp ne i64 %64, 0
  br i1 %65, label %66, label %70

66:                                               ; preds = %61
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = load i32, ptr %8, align 4, !tbaa !9
  %69 = sub i32 %67, %68
  call void @prvAddCurrentTaskToDelayedList(i32 noundef %69, i64 noundef 0)
  br label %71

70:                                               ; preds = %61
  br label %71

71:                                               ; preds = %70, %66
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %72 = call i64 @xTaskResumeAll()
  store i64 %72, ptr %6, align 8, !tbaa !11
  %73 = load i64, ptr %6, align 8, !tbaa !11
  %74 = icmp eq i64 %73, 0
  br i1 %74, label %75, label %76

75:                                               ; preds = %71
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !9
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !13
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !14
  br label %77

76:                                               ; preds = %71
  br label %77

77:                                               ; preds = %76, %75
  %78 = load i64, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i64 %78
}

; Function Attrs: nounwind uwtable
declare dso_local void @vTaskSuspendAll() #2

; Function Attrs: nounwind uwtable
declare hidden void @prvAddCurrentTaskToDelayedList(i32 noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @xTaskResumeAll() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{i64 2148504150}
!14 = !{i64 2148504220}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@uxSchedulerSuspended = external hidden global i64, align 8
@xTickCount = external hidden global i32, align 4

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 2) i64 @xTaskDelayUntil(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = icmp eq ptr %0, null
  br i1 %3, label %4, label %6

4:                                                ; preds = %2
  tail call void @vPortRaiseBASEPRI()
  br label %5

5:                                                ; preds = %5, %4
  br label %5

6:                                                ; preds = %2
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %7, label %9

7:                                                ; preds = %6
  tail call void @vPortRaiseBASEPRI()
  br label %8

8:                                                ; preds = %8, %7
  br label %8

9:                                                ; preds = %6
  %10 = load volatile i64, ptr @uxSchedulerSuspended, align 8, !tbaa !5
  %.not26 = icmp eq i64 %10, 0
  br i1 %.not26, label %13, label %11

11:                                               ; preds = %9
  tail call void @vPortRaiseBASEPRI()
  br label %12

12:                                               ; preds = %12, %11
  br label %12

13:                                               ; preds = %9
  tail call void @vTaskSuspendAll()
  %14 = load volatile i32, ptr @xTickCount, align 4, !tbaa !9
  %15 = load i32, ptr %0, align 4, !tbaa !9
  %16 = add i32 %15, %1
  %17 = icmp ult i32 %14, %15
  %18 = icmp ult i32 %16, %15
  %19 = icmp ugt i32 %16, %14
  store i32 %16, ptr %0, align 4, !tbaa !9
  br i1 %17, label %20, label %21

20:                                               ; preds = %13
  %or.cond.not.not = and i1 %18, %19
  br i1 %or.cond.not.not, label %22, label %24

21:                                               ; preds = %13
  %or.cond28.not.not = or i1 %18, %19
  br i1 %or.cond28.not.not, label %22, label %24

22:                                               ; preds = %20, %21
  %23 = sub i32 %16, %14
  tail call void @prvAddCurrentTaskToDelayedList(i32 noundef %23, i64 noundef 0)
  br label %24

24:                                               ; preds = %20, %21, %22
  %.033 = phi i64 [ 0, %20 ], [ 0, %21 ], [ 1, %22 ]
  %25 = tail call i64 @xTaskResumeAll()
  %26 = icmp eq i64 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !9
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !11
  tail call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !12
  br label %28

28:                                               ; preds = %24, %27
  ret i64 %.033
}

; Function Attrs: nounwind uwtable
declare dso_local void @vTaskSuspendAll() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @prvAddCurrentTaskToDelayedList(i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @xTaskResumeAll() local_unnamed_addr #1

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 2148504150}
!12 = !{i64 2148504220}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass