; LLVM IR from AlgoGenesis/C :: Divide and Conquer/convex hull (convexhull)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Pair = type { i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @quad(i64 %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca %struct.Pair, align 4
  store i64 %0, ptr %3, align 4
  %4 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 0
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp sge i32 %5, 0
  br i1 %6, label %7, label %12

7:                                                ; preds = %1
  %8 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 1
  %9 = load i32, ptr %8, align 4, !tbaa !10
  %10 = icmp sge i32 %9, 0
  br i1 %10, label %11, label %12

11:                                               ; preds = %7
  store i32 1, ptr %2, align 4
  br label %31

12:                                               ; preds = %7, %1
  %13 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 0
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp sle i32 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %12
  %17 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !10
  %19 = icmp sge i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %16
  store i32 2, ptr %2, align 4
  br label %31

21:                                               ; preds = %16, %12
  %22 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 0
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp sle i32 %23, 0
  br i1 %24, label %25, label %30

25:                                               ; preds = %21
  %26 = getelementptr inbounds %struct.Pair, ptr %3, i32 0, i32 1
  %27 = load i32, ptr %26, align 4, !tbaa !10
  %28 = icmp sle i32 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %25
  store i32 3, ptr %2, align 4
  br label %31

30:                                               ; preds = %25, %21
  store i32 4, ptr %2, align 4
  br label %31

31:                                               ; preds = %30, %29, %20, %11
  %32 = load i32, ptr %2, align 4
  ret i32 %32
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local range(i32 1, 5) i32 @quad(i64 %0) local_unnamed_addr #0 {
  %.sroa.4.0.extract.shift = lshr i64 %0, 32
  %.sroa.4.0.extract.trunc = trunc nuw i64 %.sroa.4.0.extract.shift to i32
  %2 = and i64 %0, -9223372034707292160
  %or.cond = icmp eq i64 %2, 0
  br i1 %or.cond, label %8, label %3

3:                                                ; preds = %1
  %4 = icmp sgt i64 %0, -1
  %.sroa.0.0.extract.trunc = trunc i64 %0 to i32
  %5 = icmp slt i32 %.sroa.0.0.extract.trunc, 1
  %or.cond5 = and i1 %4, %5
  br i1 %or.cond5, label %8, label %6

6:                                                ; preds = %3
  %7 = icmp slt i32 %.sroa.4.0.extract.trunc, 1
  %or.cond8 = select i1 %5, i1 %7, i1 false
  %. = select i1 %or.cond8, i32 3, i32 4
  br label %8

8:                                                ; preds = %6, %3, %1
  %.0 = phi i32 [ 1, %1 ], [ 2, %3 ], [ %., %6 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass