; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_ll_delayblock)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DLYB_TypeDef = type { i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @DelayBlock_Enable(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %12, i32 0, i32 0
  store volatile i32 3, ptr %13, align 4, !tbaa !11
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %79, %1
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp ult i32 %15, 12
  br i1 %16, label %17, label %82

17:                                               ; preds = %14
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = zext i32 %18 to i64
  %20 = shl i64 65536, %19
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %75, %17
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = icmp ult i32 %23, 128
  br i1 %24, label %25, label %78

25:                                               ; preds = %22
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = shl i32 %26, 8
  %28 = or i32 12, %27
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %29, i32 0, i32 1
  store volatile i32 %28, ptr %30, align 4, !tbaa !13
  %31 = call i32 @HAL_GetTick()
  store i32 %31, ptr %10, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %45, %25
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %33, i32 0, i32 1
  %35 = load volatile i32, ptr %34, align 4, !tbaa !13
  %36 = zext i32 %35 to i64
  %37 = and i64 %36, 2147483648
  %38 = icmp eq i64 %37, 0
  br i1 %38, label %39, label %46

39:                                               ; preds = %32
  %40 = call i32 @HAL_GetTick()
  %41 = load i32, ptr %10, align 4, !tbaa !9
  %42 = sub i32 %40, %41
  %43 = icmp uge i32 %42, 255
  br i1 %43, label %44, label %45

44:                                               ; preds = %39
  store i32 3, ptr %2, align 4
  store i32 1, ptr %11, align 4
  br label %95

45:                                               ; preds = %39
  br label %32, !llvm.loop !14

46:                                               ; preds = %32
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %58

49:                                               ; preds = %46
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %50, i32 0, i32 1
  %52 = load volatile i32, ptr %51, align 4, !tbaa !13
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = and i32 %52, %53
  %55 = icmp ne i32 %54, 0
  br i1 %55, label %56, label %57

56:                                               ; preds = %49
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %56, %49
  br label %74

58:                                               ; preds = %46
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %59, i32 0, i32 1
  %61 = load volatile i32, ptr %60, align 4, !tbaa !13
  %62 = load i32, ptr %9, align 4, !tbaa !9
  %63 = and i32 %61, %62
  %64 = icmp eq i32 %63, 0
  br i1 %64, label %65, label %73

65:                                               ; preds = %58
  %66 = load i32, ptr %4, align 4, !tbaa !9
  %67 = icmp eq i32 %66, 0
  br i1 %67, label %68, label %72

68:                                               ; preds = %65
  %69 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %69, ptr %4, align 4, !tbaa !9
  %70 = load i32, ptr %6, align 4, !tbaa !9
  %71 = add i32 %70, 1
  store i32 %71, ptr %5, align 4, !tbaa !9
  br label %72

72:                                               ; preds = %68, %65
  br label %78

73:                                               ; preds = %58
  br label %74

74:                                               ; preds = %73, %57
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %7, align 4, !tbaa !9
  %77 = add i32 %76, 1
  store i32 %77, ptr %7, align 4, !tbaa !9
  br label %22, !llvm.loop !16

78:                                               ; preds = %72, %22
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %6, align 4, !tbaa !9
  %81 = add i32 %80, 1
  store i32 %81, ptr %6, align 4, !tbaa !9
  br label %14, !llvm.loop !17

82:                                               ; preds = %14
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %83, i32 0, i32 0
  store volatile i32 0, ptr %84, align 4, !tbaa !11
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %85, i32 0, i32 0
  store volatile i32 3, ptr %86, align 4, !tbaa !11
  %87 = load i32, ptr %5, align 4, !tbaa !9
  %88 = load i32, ptr %4, align 4, !tbaa !9
  %89 = shl i32 %88, 8
  %90 = or i32 %87, %89
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %91, i32 0, i32 1
  store volatile i32 %90, ptr %92, align 4, !tbaa !13
  %93 = load ptr, ptr %3, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.DLYB_TypeDef, ptr %93, i32 0, i32 0
  store volatile i32 1, ptr %94, align 4, !tbaa !11
  store i32 0, ptr %2, align 4
  store i32 1, ptr %11, align 4
  br label %95

95:                                               ; preds = %82, %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %96 = load i32, ptr %2, align 4
  ret i32 %96
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @HAL_GetTick() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"", !10, i64 0, !10, i64 4}
!13 = !{!12, !10, i64 4}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @DelayBlock_Enable(ptr noundef %0) local_unnamed_addr #0 {
  store volatile i32 3, ptr %0, align 4, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 4
  br label %3

3:                                                ; preds = %1, %.loopexit33
  %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next.pre-phi, %.loopexit33 ]
  %.02442 = phi i32 [ 0, %1 ], [ %.1, %.loopexit33 ]
  %.02940 = phi i32 [ 0, %1 ], [ %.130, %.loopexit33 ]
  %4 = shl nuw nsw i64 65536, %indvars.iv
  %5 = trunc nuw nsw i64 %4 to i32
  br label %6

6:                                                ; preds = %3, %28
  %.02539 = phi i32 [ 0, %3 ], [ %.126, %28 ]
  %.02738 = phi i32 [ 0, %3 ], [ %29, %28 ]
  %7 = shl nuw nsw i32 %.02738, 8
  %8 = or disjoint i32 %7, 12
  store volatile i32 %8, ptr %2, align 4, !tbaa !10
  %9 = tail call i32 @HAL_GetTick() #2
  br label %10

10:                                               ; preds = %13, %6
  %11 = load volatile i32, ptr %2, align 4, !tbaa !10
  %12 = icmp sgt i32 %11, -1
  br i1 %12, label %13, label %17

13:                                               ; preds = %10
  %14 = tail call i32 @HAL_GetTick() #2
  %15 = sub i32 %14, %9
  %16 = icmp ugt i32 %15, 254
  br i1 %16, label %.loopexit, label %10, !llvm.loop !11

17:                                               ; preds = %10
  %18 = icmp eq i32 %.02539, 0
  %19 = load volatile i32, ptr %2, align 4, !tbaa !10
  %20 = and i32 %19, %5
  br i1 %18, label %21, label %22

21:                                               ; preds = %17
  %.not = icmp ne i32 %20, 0
  %spec.select = zext i1 %.not to i32
  br label %28

22:                                               ; preds = %17
  %23 = icmp eq i32 %20, 0
  br i1 %23, label %24, label %28

24:                                               ; preds = %22
  %25 = icmp eq i32 %.02442, 0
  %26 = add nuw nsw i64 %indvars.iv, 1
  %27 = trunc nuw nsw i64 %26 to i32
  %spec.select31 = select i1 %25, i32 %27, i32 %.02940
  %spec.select32 = select i1 %25, i32 %.02738, i32 %.02442
  br label %.loopexit33

28:                                               ; preds = %21, %22
  %.126 = phi i32 [ 1, %22 ], [ %spec.select, %21 ]
  %29 = add nuw nsw i32 %.02738, 1
  %exitcond.not = icmp eq i32 %29, 128
  br i1 %exitcond.not, label %.loopexit33.loopexit, label %6, !llvm.loop !13

.loopexit33.loopexit:                             ; preds = %28
  %.pre = add nuw nsw i64 %indvars.iv, 1
  br label %.loopexit33

.loopexit33:                                      ; preds = %.loopexit33.loopexit, %24
  %indvars.iv.next.pre-phi = phi i64 [ %.pre, %.loopexit33.loopexit ], [ %26, %24 ]
  %.130 = phi i32 [ %.02940, %.loopexit33.loopexit ], [ %spec.select31, %24 ]
  %.1 = phi i32 [ %.02442, %.loopexit33.loopexit ], [ %spec.select32, %24 ]
  %exitcond46.not = icmp eq i64 %indvars.iv.next.pre-phi, 12
  br i1 %exitcond46.not, label %30, label %3, !llvm.loop !14

30:                                               ; preds = %.loopexit33
  store volatile i32 0, ptr %0, align 4, !tbaa !5
  store volatile i32 3, ptr %0, align 4, !tbaa !5
  %31 = shl nuw nsw i32 %.1, 8
  %32 = or i32 %31, %.130
  store volatile i32 %32, ptr %2, align 4, !tbaa !10
  store volatile i32 1, ptr %0, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %13, %30
  %.0 = phi i32 [ 0, %30 ], [ 3, %13 ]
  ret i32 %.0
}

declare i32 @HAL_GetTick() local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass