; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/periph/spi/stm32 (spi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.spi_t = type { %struct.__SPI_HandleTypeDef, ptr, ptr, ptr, %struct.dma_t, %struct.dma_t, i32, i32, %struct.spi_private_t }
%struct.__SPI_HandleTypeDef = type { ptr, %struct.SPI_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.dma_t = type { %struct.__DMA_HandleTypeDef, i32, %struct.dma_private_t }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.dma_private_t = type { i32 }
%struct.spi_private_t = type { i32, ptr, ptr, ptr, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @spi_init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

9:                                                ; preds = %1
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = call i32 @spi_id_init(ptr noundef %10)
  store i32 %11, ptr %4, align 4, !tbaa !9
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %15

13:                                               ; preds = %9
  %14 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %14, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

15:                                               ; preds = %9
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = call i32 @spi_clock_init(ptr noundef %16)
  store i32 %17, ptr %4, align 4, !tbaa !9
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %21

19:                                               ; preds = %15
  %20 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %20, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

21:                                               ; preds = %15
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.spi_t, ptr %22, i32 0, i32 1
  %24 = load ptr, ptr %23, align 8, !tbaa !11
  %25 = call i32 @gpio_init(ptr noundef %24)
  store i32 %25, ptr %4, align 4, !tbaa !9
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %29

27:                                               ; preds = %21
  %28 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %28, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

29:                                               ; preds = %21
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.spi_t, ptr %30, i32 0, i32 2
  %32 = load ptr, ptr %31, align 8, !tbaa !21
  %33 = call i32 @gpio_init(ptr noundef %32)
  store i32 %33, ptr %4, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %37

35:                                               ; preds = %29
  %36 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %36, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

37:                                               ; preds = %29
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.spi_t, ptr %38, i32 0, i32 3
  %40 = load ptr, ptr %39, align 8, !tbaa !22
  %41 = call i32 @gpio_init(ptr noundef %40)
  store i32 %41, ptr %4, align 4, !tbaa !9
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %45

43:                                               ; preds = %37
  %44 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %44, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

45:                                               ; preds = %37
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.spi_t, ptr %46, i32 0, i32 4
  %48 = getelementptr inbounds %struct.dma_t, ptr %47, i32 0, i32 0
  %49 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %48, i32 0, i32 0
  %50 = load ptr, ptr %49, align 8, !tbaa !23
  %51 = icmp ne ptr %50, null
  br i1 %51, label %52, label %100

52:                                               ; preds = %45
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.spi_t, ptr %53, i32 0, i32 5
  %55 = getelementptr inbounds %struct.dma_t, ptr %54, i32 0, i32 0
  %56 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !24
  %58 = icmp ne ptr %57, null
  br i1 %58, label %59, label %100

59:                                               ; preds = %52
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.spi_t, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.spi_t, ptr %62, i32 0, i32 4
  %64 = getelementptr inbounds %struct.dma_t, ptr %63, i32 0, i32 0
  %65 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %64, i32 0, i32 4
  store ptr %61, ptr %65, align 8, !tbaa !25
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.spi_t, ptr %66, i32 0, i32 0
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.spi_t, ptr %68, i32 0, i32 5
  %70 = getelementptr inbounds %struct.dma_t, ptr %69, i32 0, i32 0
  %71 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %70, i32 0, i32 4
  store ptr %67, ptr %71, align 8, !tbaa !26
  %72 = load ptr, ptr %3, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.spi_t, ptr %72, i32 0, i32 4
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = call i32 @dma_init(ptr noundef %73, ptr noundef @spi_dma_tx_handler, ptr noundef %74)
  store i32 %75, ptr %4, align 4, !tbaa !9
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %79

77:                                               ; preds = %59
  %78 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %78, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

79:                                               ; preds = %59
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.spi_t, ptr %80, i32 0, i32 5
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  %83 = call i32 @dma_init(ptr noundef %81, ptr noundef @spi_dma_rx_handler, ptr noundef %82)
  store i32 %83, ptr %4, align 4, !tbaa !9
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %85, label %87

85:                                               ; preds = %79
  %86 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %86, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

87:                                               ; preds = %79
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.spi_t, ptr %88, i32 0, i32 4
  %90 = getelementptr inbounds %struct.dma_t, ptr %89, i32 0, i32 0
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.spi_t, ptr %91, i32 0, i32 0
  %93 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %92, i32 0, i32 11
  store ptr %90, ptr %93, align 8, !tbaa !27
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.spi_t, ptr %94, i32 0, i32 5
  %96 = getelementptr inbounds %struct.dma_t, ptr %95, i32 0, i32 0
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.spi_t, ptr %97, i32 0, i32 0
  %99 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %98, i32 0, i32 12
  store ptr %96, ptr %99, align 8, !tbaa !28
  br label %100

100:                                              ; preds = %87, %52, %45
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.spi_t, ptr %101, i32 0, i32 0
  %103 = call i32 @HAL_SPI_Init(ptr noundef %102)
  store i32 %103, ptr %4, align 4, !tbaa !9
  %104 = icmp ne i32 %103, 0
  br i1 %104, label %105, label %107

105:                                              ; preds = %100
  %106 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %106, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

107:                                              ; preds = %100
  %108 = load ptr, ptr %3, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.spi_t, ptr %108, i32 0, i32 8
  %110 = getelementptr inbounds %struct.spi_private_t, ptr %109, i32 0, i32 0
  %111 = load i32, ptr %110, align 8, !tbaa !29
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.spi_t, ptr %112, i32 0, i32 7
  %114 = load i32, ptr %113, align 4, !tbaa !30
  %115 = load ptr, ptr %3, align 8, !tbaa !5
  %116 = call i32 @irq_init(i32 noundef %111, i32 noundef %114, ptr noundef @spi_it_handler, ptr noundef %115)
  store i32 %116, ptr %4, align 4, !tbaa !9
  %117 = icmp ne i32 %116, 0
  br i1 %117, label %118, label %120

118:                                              ; preds = %107
  %119 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %119, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

120:                                              ; preds = %107
  %121 = load ptr, ptr %3, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.spi_t, ptr %121, i32 0, i32 8
  %123 = getelementptr inbounds %struct.spi_private_t, ptr %122, i32 0, i32 0
  %124 = load i32, ptr %123, align 8, !tbaa !29
  %125 = call i32 @irq_enable(i32 noundef %124)
  store i32 %125, ptr %4, align 4, !tbaa !9
  %126 = icmp ne i32 %125, 0
  br i1 %126, label %127, label %129

127:                                              ; preds = %120
  %128 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %128, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

129:                                              ; preds = %120
  %130 = call ptr @xQueueCreateMutex(i8 noundef zeroext 1)
  %131 = load ptr, ptr %3, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.spi_t, ptr %131, i32 0, i32 8
  %133 = getelementptr inbounds %struct.spi_private_t, ptr %132, i32 0, i32 2
  store ptr %130, ptr %133, align 8, !tbaa !31
  %134 = load ptr, ptr %3, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.spi_t, ptr %134, i32 0, i32 8
  %136 = getelementptr inbounds %struct.spi_private_t, ptr %135, i32 0, i32 2
  %137 = load ptr, ptr %136, align 8, !tbaa !31
  %138 = icmp eq ptr %137, null
  br i1 %138, label %139, label %140

139:                                              ; preds = %129
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

140:                                              ; preds = %129
  %141 = call ptr @xQueueCreateMutex(i8 noundef zeroext 1)
  %142 = load ptr, ptr %3, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.spi_t, ptr %142, i32 0, i32 8
  %144 = getelementptr inbounds %struct.spi_private_t, ptr %143, i32 0, i32 3
  store ptr %141, ptr %144, align 8, !tbaa !32
  %145 = load ptr, ptr %3, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.spi_t, ptr %145, i32 0, i32 8
  %147 = getelementptr inbounds %struct.spi_private_t, ptr %146, i32 0, i32 3
  %148 = load ptr, ptr %147, align 8, !tbaa !32
  %149 = icmp eq ptr %148, null
  br i1 %149, label %150, label %151

150:                                              ; preds = %140
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

151:                                              ; preds = %140
  %152 = call ptr @xQueueGenericCreate(i64 noundef 1, i64 noundef 0, i8 noundef zeroext 3)
  %153 = load ptr, ptr %3, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.spi_t, ptr %153, i32 0, i32 8
  %155 = getelementptr inbounds %struct.spi_private_t, ptr %154, i32 0, i32 1
  store ptr %152, ptr %155, align 8, !tbaa !33
  %156 = load ptr, ptr %3, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.spi_t, ptr %156, i32 0, i32 8
  %158 = getelementptr inbounds %struct.spi_private_t, ptr %157, i32 0, i32 1
  %159 = load ptr, ptr %158, align 8, !tbaa !33
  %160 = icmp eq ptr %159, null
  br i1 %160, label %161, label %162

161:                                              ; preds = %151
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

162:                                              ; preds = %151
  %163 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %163, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %164

164:                                              ; preds = %162, %161, %150, %139, %127, %118, %105, %85, %77, %43, %35, %27, %19, %13, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %165 = load i32, ptr %2, align 4
  ret i32 %165
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @spi_id_init(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @spi_clock_init(ptr noundef) #0

declare i32 @gpio_init(ptr noundef) #2

declare i32 @dma_init(ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @spi_dma_tx_handler(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @spi_dma_rx_handler(ptr noundef) #0

declare i32 @HAL_SPI_Init(ptr noundef) #2

declare i32 @irq_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @spi_it_handler(ptr noundef) #0

declare i32 @irq_enable(i32 noundef) #2

declare ptr @xQueueCreateMutex(i8 noundef zeroext) #2

declare ptr @xQueueGenericCreate(i64 noundef, i64 noundef, i8 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 176}
!12 = !{!"", !13, i64 0, !6, i64 176, !6, i64 184, !6, i64 192, !16, i64 200, !16, i64 392, !10, i64 584, !10, i64 588, !20, i64 592}
!13 = !{!"__SPI_HandleTypeDef", !6, i64 0, !14, i64 8, !6, i64 96, !15, i64 104, !15, i64 106, !6, i64 112, !15, i64 120, !15, i64 122, !10, i64 124, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !10, i64 160, !10, i64 164, !10, i64 168}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84}
!15 = !{!"short", !7, i64 0}
!16 = !{!"", !17, i64 0, !10, i64 184, !19, i64 188}
!17 = !{!"__DMA_HandleTypeDef", !6, i64 0, !18, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!19 = !{!"", !10, i64 0}
!20 = !{!"", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32}
!21 = !{!12, !6, i64 184}
!22 = !{!12, !6, i64 192}
!23 = !{!12, !6, i64 200}
!24 = !{!12, !6, i64 392}
!25 = !{!12, !6, i64 264}
!26 = !{!12, !6, i64 456}
!27 = !{!12, !6, i64 144}
!28 = !{!12, !6, i64 152}
!29 = !{!12, !10, i64 592}
!30 = !{!12, !10, i64 588}
!31 = !{!12, !6, i64 608}
!32 = !{!12, !6, i64 616}
!33 = !{!12, !6, i64 600}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @spi_init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %57, label %3

3:                                                ; preds = %1
  %4 = tail call i32 @spi_id_init(ptr noundef nonnull %0)
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %57

5:                                                ; preds = %3
  %6 = tail call i32 @spi_clock_init(ptr noundef nonnull %0)
  %.not53 = icmp eq i32 %6, 0
  br i1 %.not53, label %7, label %57

7:                                                ; preds = %5
  %8 = getelementptr inbounds i8, ptr %0, i64 176
  %9 = load ptr, ptr %8, align 8, !tbaa !5
  %10 = tail call i32 @gpio_init(ptr noundef %9) #2
  %.not54 = icmp eq i32 %10, 0
  br i1 %.not54, label %11, label %57

11:                                               ; preds = %7
  %12 = getelementptr inbounds i8, ptr %0, i64 184
  %13 = load ptr, ptr %12, align 8, !tbaa !19
  %14 = tail call i32 @gpio_init(ptr noundef %13) #2
  %.not55 = icmp eq i32 %14, 0
  br i1 %.not55, label %15, label %57

15:                                               ; preds = %11
  %16 = getelementptr inbounds i8, ptr %0, i64 192
  %17 = load ptr, ptr %16, align 8, !tbaa !20
  %18 = tail call i32 @gpio_init(ptr noundef %17) #2
  %.not56 = icmp eq i32 %18, 0
  br i1 %.not56, label %19, label %57

19:                                               ; preds = %15
  %20 = getelementptr inbounds i8, ptr %0, i64 200
  %21 = load ptr, ptr %20, align 8, !tbaa !21
  %.not57 = icmp eq ptr %21, null
  br i1 %.not57, label %34, label %22

22:                                               ; preds = %19
  %23 = getelementptr inbounds i8, ptr %0, i64 392
  %24 = load ptr, ptr %23, align 8, !tbaa !22
  %.not58 = icmp eq ptr %24, null
  br i1 %.not58, label %34, label %25

25:                                               ; preds = %22
  %26 = getelementptr inbounds i8, ptr %0, i64 264
  store ptr %0, ptr %26, align 8, !tbaa !23
  %27 = getelementptr inbounds i8, ptr %0, i64 456
  store ptr %0, ptr %27, align 8, !tbaa !24
  %28 = tail call i32 @dma_init(ptr noundef nonnull %20, ptr noundef nonnull @spi_dma_tx_handler, ptr noundef nonnull %0) #2
  %.not59 = icmp eq i32 %28, 0
  br i1 %.not59, label %29, label %57

29:                                               ; preds = %25
  %30 = tail call i32 @dma_init(ptr noundef nonnull %23, ptr noundef nonnull @spi_dma_rx_handler, ptr noundef nonnull %0) #2
  %.not60 = icmp eq i32 %30, 0
  br i1 %.not60, label %31, label %57

31:                                               ; preds = %29
  %32 = getelementptr inbounds i8, ptr %0, i64 144
  store ptr %20, ptr %32, align 8, !tbaa !25
  %33 = getelementptr inbounds i8, ptr %0, i64 152
  store ptr %23, ptr %33, align 8, !tbaa !26
  br label %34

34:                                               ; preds = %31, %22, %19
  %35 = tail call i32 @HAL_SPI_Init(ptr noundef nonnull %0) #2
  %.not61 = icmp eq i32 %35, 0
  br i1 %.not61, label %36, label %57

36:                                               ; preds = %34
  %37 = getelementptr inbounds i8, ptr %0, i64 592
  %38 = load i32, ptr %37, align 8, !tbaa !27
  %39 = getelementptr inbounds i8, ptr %0, i64 588
  %40 = load i32, ptr %39, align 4, !tbaa !28
  %41 = tail call i32 @irq_init(i32 noundef %38, i32 noundef %40, ptr noundef nonnull @spi_it_handler, ptr noundef nonnull %0) #2
  %.not62 = icmp eq i32 %41, 0
  br i1 %.not62, label %42, label %57

42:                                               ; preds = %36
  %43 = load i32, ptr %37, align 8, !tbaa !27
  %44 = tail call i32 @irq_enable(i32 noundef %43) #2
  %.not63 = icmp eq i32 %44, 0
  br i1 %.not63, label %45, label %57

45:                                               ; preds = %42
  %46 = tail call ptr @xQueueCreateMutex(i8 noundef zeroext 1) #2
  %47 = getelementptr inbounds i8, ptr %0, i64 608
  store ptr %46, ptr %47, align 8, !tbaa !29
  %48 = icmp eq ptr %46, null
  br i1 %48, label %57, label %49

49:                                               ; preds = %45
  %50 = tail call ptr @xQueueCreateMutex(i8 noundef zeroext 1) #2
  %51 = getelementptr inbounds i8, ptr %0, i64 616
  store ptr %50, ptr %51, align 8, !tbaa !30
  %52 = icmp eq ptr %50, null
  br i1 %52, label %57, label %53

53:                                               ; preds = %49
  %54 = tail call ptr @xQueueGenericCreate(i64 noundef 1, i64 noundef 0, i8 noundef zeroext 3) #2
  %55 = getelementptr inbounds i8, ptr %0, i64 600
  store ptr %54, ptr %55, align 8, !tbaa !31
  %56 = icmp eq ptr %54, null
  %. = sext i1 %56 to i32
  br label %57

57:                                               ; preds = %53, %49, %45, %42, %36, %34, %29, %25, %15, %11, %7, %5, %3, %1
  %.0 = phi i32 [ -1, %1 ], [ %4, %3 ], [ %6, %5 ], [ %10, %7 ], [ %14, %11 ], [ %18, %15 ], [ %28, %25 ], [ %30, %29 ], [ %35, %34 ], [ %41, %36 ], [ %44, %42 ], [ -1, %45 ], [ -1, %49 ], [ %., %53 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden i32 @spi_id_init(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @spi_clock_init(ptr noundef) local_unnamed_addr #0

declare i32 @gpio_init(ptr noundef) local_unnamed_addr #1

declare i32 @dma_init(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @spi_dma_tx_handler(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @spi_dma_rx_handler(ptr noundef) #0

declare i32 @HAL_SPI_Init(ptr noundef) local_unnamed_addr #1

declare i32 @irq_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @spi_it_handler(ptr noundef) #0

declare i32 @irq_enable(i32 noundef) local_unnamed_addr #1

declare ptr @xQueueCreateMutex(i8 noundef zeroext) local_unnamed_addr #1

declare ptr @xQueueGenericCreate(i64 noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 176}
!6 = !{!"", !7, i64 0, !8, i64 176, !8, i64 184, !8, i64 192, !14, i64 200, !14, i64 392, !12, i64 584, !12, i64 588, !18, i64 592}
!7 = !{!"__SPI_HandleTypeDef", !8, i64 0, !11, i64 8, !8, i64 96, !13, i64 104, !13, i64 106, !8, i64 112, !13, i64 120, !13, i64 122, !12, i64 124, !8, i64 128, !8, i64 136, !8, i64 144, !8, i64 152, !12, i64 160, !12, i64 164, !12, i64 168}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84}
!12 = !{!"int", !9, i64 0}
!13 = !{!"short", !9, i64 0}
!14 = !{!"", !15, i64 0, !12, i64 184, !17, i64 188}
!15 = !{!"__DMA_HandleTypeDef", !8, i64 0, !16, i64 8, !12, i64 56, !12, i64 60, !8, i64 64, !8, i64 72, !8, i64 80, !8, i64 88, !8, i64 96, !8, i64 104, !8, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !8, i64 136, !8, i64 144, !12, i64 152, !8, i64 160, !8, i64 168, !12, i64 176}
!16 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!17 = !{!"", !12, i64 0}
!18 = !{!"", !12, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !12, i64 32}
!19 = !{!6, !8, i64 184}
!20 = !{!6, !8, i64 192}
!21 = !{!6, !8, i64 200}
!22 = !{!6, !8, i64 392}
!23 = !{!6, !8, i64 264}
!24 = !{!6, !8, i64 456}
!25 = !{!6, !8, i64 144}
!26 = !{!6, !8, i64 152}
!27 = !{!6, !12, i64 592}
!28 = !{!6, !12, i64 588}
!29 = !{!6, !8, i64 608}
!30 = !{!6, !8, i64 616}
!31 = !{!6, !8, i64 600}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass