; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 22. Segment Tree/max_segtree_lazy.ll (Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) #3 {
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store i64 %4, ptr %13, align 8, !tbaa !9
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  %19 = load i64, ptr %11, align 8, !tbaa !9
  %20 = load i64, ptr %14, align 8, !tbaa !9
  %21 = icmp sgt i64 %19, %20
  br i1 %21, label %26, label %22

22:                                               ; preds = %7
  %23 = load i64, ptr %12, align 8, !tbaa !9
  %24 = load i64, ptr %13, align 8, !tbaa !9
  %25 = icmp slt i64 %23, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %22, %7
  store i64 -2147483648, ptr %8, align 8
  br label %114

27:                                               ; preds = %22
  %28 = load ptr, ptr %10, align 8, !tbaa !5
  %29 = load i64, ptr %15, align 8, !tbaa !9
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %29) #4
  %31 = load i64, ptr %30, align 8, !tbaa !9
  %32 = icmp ne i64 %31, 0
  br i1 %32, label %33, label %73

33:                                               ; preds = %27
  %34 = load ptr, ptr %10, align 8, !tbaa !5
  %35 = load i64, ptr %15, align 8, !tbaa !9
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %35) #4
  %37 = load i64, ptr %36, align 8, !tbaa !9
  %38 = load ptr, ptr %9, align 8, !tbaa !5
  %39 = load i64, ptr %15, align 8, !tbaa !9
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %39) #4
  %41 = load i64, ptr %40, align 8, !tbaa !9
  %42 = add nsw i64 %41, %37
  store i64 %42, ptr %40, align 8, !tbaa !9
  %43 = load i64, ptr %11, align 8, !tbaa !9
  %44 = load i64, ptr %12, align 8, !tbaa !9
  %45 = icmp ne i64 %43, %44
  br i1 %45, label %46, label %69

46:                                               ; preds = %33
  %47 = load ptr, ptr %10, align 8, !tbaa !5
  %48 = load i64, ptr %15, align 8, !tbaa !9
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %48) #4
  %50 = load i64, ptr %49, align 8, !tbaa !9
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  %52 = load i64, ptr %15, align 8, !tbaa !9
  %53 = mul nsw i64 2, %52
  %54 = add nsw i64 %53, 1
  %55 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %54) #4
  %56 = load i64, ptr %55, align 8, !tbaa !9
  %57 = add nsw i64 %56, %50
  store i64 %57, ptr %55, align 8, !tbaa !9
  %58 = load ptr, ptr %10, align 8, !tbaa !5
  %59 = load i64, ptr %15, align 8, !tbaa !9
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %59) #4
  %61 = load i64, ptr %60, align 8, !tbaa !9
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = load i64, ptr %15, align 8, !tbaa !9
  %64 = mul nsw i64 2, %63
  %65 = add nsw i64 %64, 2
  %66 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %65) #4
  %67 = load i64, ptr %66, align 8, !tbaa !9
  %68 = add nsw i64 %67, %61
  store i64 %68, ptr %66, align 8, !tbaa !9
  br label %69

69:                                               ; preds = %46, %33
  %70 = load ptr, ptr %10, align 8, !tbaa !5
  %71 = load i64, ptr %15, align 8, !tbaa !9
  %72 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %71) #4
  store i64 0, ptr %72, align 8, !tbaa !9
  br label %73

73:                                               ; preds = %69, %27
  %74 = load i64, ptr %11, align 8, !tbaa !9
  %75 = load i64, ptr %13, align 8, !tbaa !9
  %76 = icmp sge i64 %74, %75
  br i1 %76, label %77, label %86

77:                                               ; preds = %73
  %78 = load i64, ptr %12, align 8, !tbaa !9
  %79 = load i64, ptr %14, align 8, !tbaa !9
  %80 = icmp sle i64 %78, %79
  br i1 %80, label %81, label %86

81:                                               ; preds = %77
  %82 = load ptr, ptr %9, align 8, !tbaa !5
  %83 = load i64, ptr %15, align 8, !tbaa !9
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %83) #4
  %85 = load i64, ptr %84, align 8, !tbaa !9
  store i64 %85, ptr %8, align 8
  br label %114

86:                                               ; preds = %77, %73
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %87 = load i64, ptr %11, align 8, !tbaa !9
  %88 = load i64, ptr %12, align 8, !tbaa !9
  %89 = add nsw i64 %87, %88
  %90 = sdiv i64 %89, 2
  store i64 %90, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  %91 = load ptr, ptr %9, align 8, !tbaa !5
  %92 = load ptr, ptr %10, align 8, !tbaa !5
  %93 = load i64, ptr %11, align 8, !tbaa !9
  %94 = load i64, ptr %16, align 8, !tbaa !9
  %95 = load i64, ptr %13, align 8, !tbaa !9
  %96 = load i64, ptr %14, align 8, !tbaa !9
  %97 = load i64, ptr %15, align 8, !tbaa !9
  %98 = mul nsw i64 2, %97
  %99 = add nsw i64 %98, 1
  %100 = call noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %91, ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %93, i64 noundef %94, i64 noundef %95, i64 noundef %96, i64 noundef %99)
  store i64 %100, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %101 = load ptr, ptr %9, align 8, !tbaa !5
  %102 = load ptr, ptr %10, align 8, !tbaa !5
  %103 = load i64, ptr %16, align 8, !tbaa !9
  %104 = add nsw i64 %103, 1
  %105 = load i64, ptr %12, align 8, !tbaa !9
  %106 = load i64, ptr %13, align 8, !tbaa !9
  %107 = load i64, ptr %14, align 8, !tbaa !9
  %108 = load i64, ptr %15, align 8, !tbaa !9
  %109 = mul nsw i64 2, %108
  %110 = add nsw i64 %109, 2
  %111 = call noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %101, ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %104, i64 noundef %105, i64 noundef %106, i64 noundef %107, i64 noundef %110)
  store i64 %111, ptr %18, align 8, !tbaa !9
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18)
  %113 = load i64, ptr %112, align 8, !tbaa !9
  store i64 %113, ptr %8, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  br label %114

114:                                              ; preds = %86, %81, %26
  %115 = load i64, ptr %8, align 8
  ret i64 %115
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) local_unnamed_addr #0 {
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = icmp sgt i64 %2, %5
  %11 = icmp slt i64 %3, %4
  %or.cond = or i1 %11, %10
  br i1 %or.cond, label %common.ret52, label %12

12:                                               ; preds = %7
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %6) #3
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %.not = icmp eq i64 %14, 0
  br i1 %.not, label %37, label %15

15:                                               ; preds = %12
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %6) #3
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #3
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = add nsw i64 %19, %17
  store i64 %20, ptr %18, align 8, !tbaa !5
  %.not48 = icmp eq i64 %2, %3
  br i1 %.not48, label %35, label %21

21:                                               ; preds = %15
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %6) #3
  %23 = load i64, ptr %22, align 8, !tbaa !5
  %24 = shl nsw i64 %6, 1
  %25 = or disjoint i64 %24, 1
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %25) #3
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = add nsw i64 %27, %23
  store i64 %28, ptr %26, align 8, !tbaa !5
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %6) #3
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = add nsw i64 %24, 2
  %32 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %31) #3
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = add nsw i64 %33, %30
  store i64 %34, ptr %32, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %21, %15
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %6) #3
  store i64 0, ptr %36, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %35, %12
  %.not49 = icmp slt i64 %2, %4
  %.not50 = icmp sgt i64 %3, %5
  %or.cond51 = or i1 %.not49, %.not50
  br i1 %or.cond51, label %41, label %38

38:                                               ; preds = %37
  %39 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #3
  %40 = load i64, ptr %39, align 8, !tbaa !5
  br label %common.ret52

common.ret52:                                     ; preds = %7, %38, %41
  %common.ret52.op = phi i64 [ %51, %41 ], [ %40, %38 ], [ -2147483648, %7 ]
  ret i64 %common.ret52.op

41:                                               ; preds = %37
  %42 = add nsw i64 %3, %2
  %43 = sdiv i64 %42, 2
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
  %44 = shl nsw i64 %6, 1
  %45 = or disjoint i64 %44, 1
  %46 = tail call noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %43, i64 noundef %4, i64 noundef %5, i64 noundef %45)
  store i64 %46, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
  %47 = add nsw i64 %43, 1
  %48 = add nsw i64 %44, 2
  %49 = tail call noundef i64 @_Z8getMaxSTRSt6vectorIxSaIxEES2_xxxxx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %47, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %48)
  store i64 %49, ptr %9, align 8, !tbaa !5
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %51 = load i64, ptr %50, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  br label %common.ret52
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass