; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/periph/usart/stm32 (usart)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.usart_t = type { [32 x i8], [32 x i8], %struct.file_operations, %struct.__UART_HandleTypeDef, %struct.dma_t, %struct.dma_t, i32, ptr, ptr, i32, i32, i32, i32, i32, %struct.usart_private_t }
%struct.file_operations = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.__UART_HandleTypeDef = type { ptr, %struct.UART_InitTypeDef, %struct.UART_AdvFeatureInitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i32, i16, i16, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
%struct.UART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.UART_AdvFeatureInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.dma_t = type { %struct.__DMA_HandleTypeDef, i32, %struct.dma_private_t }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.dma_private_t = type { i32 }
%struct.usart_private_t = type { i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, i32, i8, i8, i8, i8, i8 }
%struct.DMA_Stream_TypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @usart_handler(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %6, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.usart_t, ptr %7, i32 0, i32 5
  %9 = getelementptr inbounds %struct.dma_t, ptr %8, i32 0, i32 0
  %10 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %9, i32 0, i32 0
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  store ptr %11, ptr %5, align 8, !tbaa !5
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.usart_t, ptr %12, i32 0, i32 3
  call void @HAL_UART_IRQHandler(ptr noundef %13)
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.usart_t, ptr %14, i32 0, i32 3
  %16 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %15, i32 0, i32 19
  %17 = load volatile i32, ptr %16, align 4, !tbaa !25
  %18 = icmp eq i32 %17, 32
  br i1 %18, label %19, label %61

19:                                               ; preds = %1
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.usart_t, ptr %20, i32 0, i32 14
  %22 = getelementptr inbounds %struct.usart_private_t, ptr %21, i32 0, i32 5
  %23 = load i32, ptr %22, align 8, !tbaa !26
  %24 = icmp eq i32 %23, 1
  br i1 %24, label %25, label %61

25:                                               ; preds = %19
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.usart_t, ptr %26, i32 0, i32 14
  %28 = getelementptr inbounds %struct.usart_private_t, ptr %27, i32 0, i32 17
  %29 = load i8, ptr %28, align 1, !tbaa !27, !range !28, !noundef !29
  %30 = trunc i8 %29 to i1
  br i1 %30, label %31, label %38

31:                                               ; preds = %25
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.DMA_Stream_TypeDef, ptr %32, i32 0, i32 1
  %34 = load volatile i32, ptr %33, align 4, !tbaa !30
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.usart_t, ptr %35, i32 0, i32 14
  %37 = getelementptr inbounds %struct.usart_private_t, ptr %36, i32 0, i32 8
  store i32 %34, ptr %37, align 4, !tbaa !32
  br label %47

38:                                               ; preds = %25
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.usart_t, ptr %39, i32 0, i32 3
  %41 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %40, i32 0, i32 4
  %42 = load i16, ptr %41, align 8, !tbaa !33
  %43 = zext i16 %42 to i32
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.usart_t, ptr %44, i32 0, i32 14
  %46 = getelementptr inbounds %struct.usart_private_t, ptr %45, i32 0, i32 8
  store i32 %43, ptr %46, align 4, !tbaa !32
  br label %47

47:                                               ; preds = %38, %31
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.usart_t, ptr %48, i32 0, i32 14
  %50 = getelementptr inbounds %struct.usart_private_t, ptr %49, i32 0, i32 1
  %51 = load ptr, ptr %50, align 8, !tbaa !34
  %52 = call i64 @xQueueGiveFromISR(ptr noundef %51, ptr noundef %4)
  %53 = load i64, ptr %4, align 8, !tbaa !9
  %54 = icmp eq i64 %53, 1
  br i1 %54, label %55, label %60

55:                                               ; preds = %47
  %56 = load i64, ptr %4, align 8, !tbaa !9
  %57 = icmp ne i64 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %55
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !35
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !36
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !37
  br label %59

59:                                               ; preds = %58, %55
  br label %60

60:                                               ; preds = %59, %47
  br label %61

61:                                               ; preds = %60, %19, %1
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.usart_t, ptr %62, i32 0, i32 3
  %64 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %63, i32 0, i32 20
  %65 = load volatile i32, ptr %64, align 8, !tbaa !38
  %66 = icmp eq i32 %65, 32
  br i1 %66, label %67, label %114

67:                                               ; preds = %61
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.usart_t, ptr %68, i32 0, i32 14
  %70 = getelementptr inbounds %struct.usart_private_t, ptr %69, i32 0, i32 6
  %71 = load i32, ptr %70, align 4, !tbaa !39
  %72 = icmp eq i32 %71, 2
  br i1 %72, label %73, label %114

73:                                               ; preds = %67
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.usart_t, ptr %74, i32 0, i32 6
  %76 = load i32, ptr %75, align 8, !tbaa !40
  %77 = icmp eq i32 %76, 0
  br i1 %77, label %78, label %114

78:                                               ; preds = %73
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.usart_t, ptr %79, i32 0, i32 14
  %81 = getelementptr inbounds %struct.usart_private_t, ptr %80, i32 0, i32 17
  %82 = load i8, ptr %81, align 1, !tbaa !27, !range !28, !noundef !29
  %83 = trunc i8 %82 to i1
  br i1 %83, label %84, label %91

84:                                               ; preds = %78
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.DMA_Stream_TypeDef, ptr %85, i32 0, i32 1
  %87 = load volatile i32, ptr %86, align 4, !tbaa !30
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.usart_t, ptr %88, i32 0, i32 14
  %90 = getelementptr inbounds %struct.usart_private_t, ptr %89, i32 0, i32 7
  store i32 %87, ptr %90, align 8, !tbaa !41
  br label %100

91:                                               ; preds = %78
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.usart_t, ptr %92, i32 0, i32 3
  %94 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %93, i32 0, i32 7
  %95 = load i16, ptr %94, align 8, !tbaa !42
  %96 = zext i16 %95 to i32
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.usart_t, ptr %97, i32 0, i32 14
  %99 = getelementptr inbounds %struct.usart_private_t, ptr %98, i32 0, i32 7
  store i32 %96, ptr %99, align 8, !tbaa !41
  br label %100

100:                                              ; preds = %91, %84
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.usart_t, ptr %101, i32 0, i32 14
  %103 = getelementptr inbounds %struct.usart_private_t, ptr %102, i32 0, i32 2
  %104 = load ptr, ptr %103, align 8, !tbaa !43
  %105 = call i64 @xQueueGiveFromISR(ptr noundef %104, ptr noundef %4)
  %106 = load i64, ptr %4, align 8, !tbaa !9
  %107 = icmp eq i64 %106, 1
  br i1 %107, label %108, label %113

108:                                              ; preds = %100
  %109 = load i64, ptr %4, align 8, !tbaa !9
  %110 = icmp ne i64 %109, 0
  br i1 %110, label %111, label %112

111:                                              ; preds = %108
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !35
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !44
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !45
  br label %112

112:                                              ; preds = %111, %108
  br label %113

113:                                              ; preds = %112, %100
  br label %114

114:                                              ; preds = %113, %73, %67, %61
  %115 = load ptr, ptr %3, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.usart_t, ptr %115, i32 0, i32 3
  %117 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %116, i32 0, i32 0
  %118 = load ptr, ptr %117, align 8, !tbaa !46
  %119 = getelementptr inbounds %struct.USART_TypeDef, ptr %118, i32 0, i32 7
  %120 = load volatile i32, ptr %119, align 4, !tbaa !47
  %121 = zext i32 %120 to i64
  %122 = and i64 %121, 16
  %123 = icmp ne i64 %122, 0
  br i1 %123, label %124, label %213

124:                                              ; preds = %114
  %125 = load ptr, ptr %3, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.usart_t, ptr %125, i32 0, i32 14
  %127 = getelementptr inbounds %struct.usart_private_t, ptr %126, i32 0, i32 6
  %128 = load i32, ptr %127, align 4, !tbaa !39
  %129 = icmp eq i32 %128, 2
  br i1 %129, label %130, label %213

130:                                              ; preds = %124
  %131 = load ptr, ptr %3, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.usart_t, ptr %131, i32 0, i32 6
  %133 = load i32, ptr %132, align 8, !tbaa !40
  %134 = icmp eq i32 %133, 1
  br i1 %134, label %135, label %213

135:                                              ; preds = %130
  %136 = load ptr, ptr %3, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.usart_t, ptr %136, i32 0, i32 3
  %138 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %137, i32 0, i32 0
  %139 = load ptr, ptr %138, align 8, !tbaa !46
  %140 = getelementptr inbounds %struct.USART_TypeDef, ptr %139, i32 0, i32 8
  %141 = load volatile i32, ptr %140, align 4, !tbaa !48
  %142 = zext i32 %141 to i64
  %143 = or i64 %142, 16
  %144 = trunc i64 %143 to i32
  store volatile i32 %144, ptr %140, align 4, !tbaa !48
  %145 = load ptr, ptr %3, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.usart_t, ptr %145, i32 0, i32 14
  %147 = getelementptr inbounds %struct.usart_private_t, ptr %146, i32 0, i32 17
  %148 = load i8, ptr %147, align 1, !tbaa !27, !range !28, !noundef !29
  %149 = trunc i8 %148 to i1
  br i1 %149, label %150, label %163

150:                                              ; preds = %135
  %151 = load ptr, ptr %3, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.usart_t, ptr %151, i32 0, i32 3
  %153 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %152, i32 0, i32 7
  %154 = load i16, ptr %153, align 8, !tbaa !42
  %155 = zext i16 %154 to i32
  %156 = load ptr, ptr %5, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.DMA_Stream_TypeDef, ptr %156, i32 0, i32 1
  %158 = load volatile i32, ptr %157, align 4, !tbaa !30
  %159 = sub i32 %155, %158
  %160 = load ptr, ptr %3, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.usart_t, ptr %160, i32 0, i32 14
  %162 = getelementptr inbounds %struct.usart_private_t, ptr %161, i32 0, i32 7
  store i32 %159, ptr %162, align 8, !tbaa !41
  br label %178

163:                                              ; preds = %135
  %164 = load ptr, ptr %3, align 8, !tbaa !5
  %165 = getelementptr inbounds %struct.usart_t, ptr %164, i32 0, i32 3
  %166 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %165, i32 0, i32 7
  %167 = load i16, ptr %166, align 8, !tbaa !42
  %168 = zext i16 %167 to i32
  %169 = load ptr, ptr %3, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.usart_t, ptr %169, i32 0, i32 3
  %171 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %170, i32 0, i32 8
  %172 = load volatile i16, ptr %171, align 2, !tbaa !49
  %173 = zext i16 %172 to i32
  %174 = sub nsw i32 %168, %173
  %175 = load ptr, ptr %3, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.usart_t, ptr %175, i32 0, i32 14
  %177 = getelementptr inbounds %struct.usart_private_t, ptr %176, i32 0, i32 7
  store i32 %174, ptr %177, align 8, !tbaa !41
  br label %178

178:                                              ; preds = %163, %150
  %179 = load ptr, ptr %3, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.usart_t, ptr %179, i32 0, i32 3
  %181 = call i32 @HAL_UART_AbortReceive(ptr noundef %180)
  %182 = load ptr, ptr %3, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.usart_t, ptr %182, i32 0, i32 3
  %184 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %183, i32 0, i32 0
  %185 = load ptr, ptr %184, align 8, !tbaa !46
  %186 = getelementptr inbounds %struct.USART_TypeDef, ptr %185, i32 0, i32 8
  %187 = load volatile i32, ptr %186, align 4, !tbaa !48
  %188 = zext i32 %187 to i64
  %189 = and i64 %188, -17
  %190 = trunc i64 %189 to i32
  store volatile i32 %190, ptr %186, align 4, !tbaa !48
  %191 = load ptr, ptr %3, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.usart_t, ptr %191, i32 0, i32 3
  %193 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %192, i32 0, i32 0
  %194 = load ptr, ptr %193, align 8, !tbaa !46
  %195 = getelementptr inbounds %struct.USART_TypeDef, ptr %194, i32 0, i32 0
  %196 = load volatile i32, ptr %195, align 4, !tbaa !50
  %197 = zext i32 %196 to i64
  %198 = and i64 %197, -17
  %199 = trunc i64 %198 to i32
  store volatile i32 %199, ptr %195, align 4, !tbaa !50
  %200 = load ptr, ptr %3, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.usart_t, ptr %200, i32 0, i32 14
  %202 = getelementptr inbounds %struct.usart_private_t, ptr %201, i32 0, i32 2
  %203 = load ptr, ptr %202, align 8, !tbaa !43
  %204 = call i64 @xQueueGiveFromISR(ptr noundef %203, ptr noundef %4)
  %205 = load i64, ptr %4, align 8, !tbaa !9
  %206 = icmp eq i64 %205, 1
  br i1 %206, label %207, label %212

207:                                              ; preds = %178
  %208 = load i64, ptr %4, align 8, !tbaa !9
  %209 = icmp ne i64 %208, 0
  br i1 %209, label %210, label %211

210:                                              ; preds = %207
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !35
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !51
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !52
  br label %211

211:                                              ; preds = %210, %207
  br label %212

212:                                              ; preds = %211, %178
  br label %213

213:                                              ; preds = %212, %130, %124, %114
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @HAL_UART_IRQHandler(ptr noundef) #2

declare i64 @xQueueGiveFromISR(ptr noundef, ptr noundef) #2

declare i32 @HAL_UART_AbortReceive(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 528}
!12 = !{!"", !7, i64 0, !7, i64 32, !13, i64 64, !14, i64 152, !19, i64 336, !19, i64 528, !16, i64 720, !6, i64 728, !6, i64 736, !16, i64 744, !16, i64 748, !16, i64 752, !16, i64 756, !16, i64 760, !23, i64 768}
!13 = !{!"file_operations", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80}
!14 = !{!"__UART_HandleTypeDef", !6, i64 0, !15, i64 8, !17, i64 44, !6, i64 88, !18, i64 96, !18, i64 98, !6, i64 104, !18, i64 112, !18, i64 114, !18, i64 116, !16, i64 120, !18, i64 124, !18, i64 126, !16, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !16, i64 168, !16, i64 172, !16, i64 176, !16, i64 180}
!15 = !{!"", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16, !16, i64 20, !16, i64 24, !16, i64 28, !16, i64 32}
!16 = !{!"int", !7, i64 0}
!17 = !{!"", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16, !16, i64 20, !16, i64 24, !16, i64 28, !16, i64 32, !16, i64 36}
!18 = !{!"short", !7, i64 0}
!19 = !{!"", !20, i64 0, !16, i64 184, !22, i64 188}
!20 = !{!"__DMA_HandleTypeDef", !6, i64 0, !21, i64 8, !16, i64 56, !16, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !16, i64 120, !16, i64 124, !16, i64 128, !6, i64 136, !6, i64 144, !16, i64 152, !6, i64 160, !6, i64 168, !16, i64 176}
!21 = !{!"", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16, !16, i64 20, !16, i64 24, !16, i64 28, !16, i64 32, !16, i64 36, !16, i64 40, !16, i64 44}
!22 = !{!"", !16, i64 0}
!23 = !{!"", !16, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !16, i64 40, !16, i64 44, !16, i64 48, !16, i64 52, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !16, i64 88, !24, i64 92, !24, i64 93, !24, i64 94, !24, i64 95, !24, i64 96}
!24 = !{!"_Bool", !7, i64 0}
!25 = !{!12, !16, i64 324}
!26 = !{!12, !16, i64 808}
!27 = !{!12, !24, i64 863}
!28 = !{i8 0, i8 2}
!29 = !{}
!30 = !{!31, !16, i64 4}
!31 = !{!"", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16, !16, i64 20}
!32 = !{!12, !16, i64 820}
!33 = !{!12, !18, i64 248}
!34 = !{!12, !6, i64 776}
!35 = !{!16, !16, i64 0}
!36 = !{i64 2154162261}
!37 = !{i64 2154162331}
!38 = !{!12, !16, i64 328}
!39 = !{!12, !16, i64 812}
!40 = !{!12, !16, i64 720}
!41 = !{!12, !16, i64 816}
!42 = !{!12, !18, i64 264}
!43 = !{!12, !6, i64 784}
!44 = !{i64 2154163156}
!45 = !{i64 2154163226}
!46 = !{!12, !6, i64 152}
!47 = !{!21, !16, i64 28}
!48 = !{!21, !16, i64 32}
!49 = !{!12, !18, i64 266}
!50 = !{!21, !16, i64 0}
!51 = !{i64 2154164443}
!52 = !{i64 2154164513}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @usart_handler(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  store i64 0, ptr %2, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 528
  %4 = load ptr, ptr %3, align 8, !tbaa !9
  %5 = getelementptr inbounds i8, ptr %0, i64 152
  tail call void @HAL_UART_IRQHandler(ptr noundef nonnull %5) #3
  %6 = getelementptr inbounds i8, ptr %0, i64 324
  %7 = load volatile i32, ptr %6, align 4, !tbaa !24
  %8 = icmp eq i32 %7, 32
  br i1 %8, label %9, label %32

9:                                                ; preds = %1
  %10 = getelementptr inbounds i8, ptr %0, i64 808
  %11 = load i32, ptr %10, align 8, !tbaa !25
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %32

13:                                               ; preds = %9
  %14 = getelementptr inbounds i8, ptr %0, i64 863
  %15 = load i8, ptr %14, align 1, !tbaa !26, !range !27, !noundef !28
  %16 = trunc nuw i8 %15 to i1
  br i1 %16, label %17, label %20

17:                                               ; preds = %13
  %18 = getelementptr inbounds i8, ptr %4, i64 4
  %19 = load volatile i32, ptr %18, align 4, !tbaa !29
  br label %24

20:                                               ; preds = %13
  %21 = getelementptr inbounds i8, ptr %0, i64 248
  %22 = load i16, ptr %21, align 8, !tbaa !31
  %23 = zext i16 %22 to i32
  br label %24

24:                                               ; preds = %20, %17
  %.sink = phi i32 [ %19, %17 ], [ %23, %20 ]
  %25 = getelementptr inbounds i8, ptr %0, i64 820
  store i32 %.sink, ptr %25, align 4
  %26 = getelementptr inbounds i8, ptr %0, i64 776
  %27 = load ptr, ptr %26, align 8, !tbaa !32
  %28 = call i64 @xQueueGiveFromISR(ptr noundef %27, ptr noundef nonnull %2) #3
  %29 = load i64, ptr %2, align 8
  %30 = icmp eq i64 %29, 1
  br i1 %30, label %31, label %32

31:                                               ; preds = %24
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !33
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !34
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !35
  br label %32

32:                                               ; preds = %24, %31, %9, %1
  %33 = getelementptr inbounds i8, ptr %0, i64 328
  %34 = load volatile i32, ptr %33, align 8, !tbaa !36
  %35 = icmp eq i32 %34, 32
  br i1 %35, label %36, label %63

36:                                               ; preds = %32
  %37 = getelementptr inbounds i8, ptr %0, i64 812
  %38 = load i32, ptr %37, align 4, !tbaa !37
  %39 = icmp eq i32 %38, 2
  br i1 %39, label %40, label %63

40:                                               ; preds = %36
  %41 = getelementptr inbounds i8, ptr %0, i64 720
  %42 = load i32, ptr %41, align 8, !tbaa !38
  %43 = icmp eq i32 %42, 0
  br i1 %43, label %44, label %63

44:                                               ; preds = %40
  %45 = getelementptr inbounds i8, ptr %0, i64 863
  %46 = load i8, ptr %45, align 1, !tbaa !26, !range !27, !noundef !28
  %47 = trunc nuw i8 %46 to i1
  br i1 %47, label %48, label %51

48:                                               ; preds = %44
  %49 = getelementptr inbounds i8, ptr %4, i64 4
  %50 = load volatile i32, ptr %49, align 4, !tbaa !29
  br label %55

51:                                               ; preds = %44
  %52 = getelementptr inbounds i8, ptr %0, i64 264
  %53 = load i16, ptr %52, align 8, !tbaa !39
  %54 = zext i16 %53 to i32
  br label %55

55:                                               ; preds = %51, %48
  %.sink40 = phi i32 [ %50, %48 ], [ %54, %51 ]
  %56 = getelementptr inbounds i8, ptr %0, i64 816
  store i32 %.sink40, ptr %56, align 8
  %57 = getelementptr inbounds i8, ptr %0, i64 784
  %58 = load ptr, ptr %57, align 8, !tbaa !40
  %59 = call i64 @xQueueGiveFromISR(ptr noundef %58, ptr noundef nonnull %2) #3
  %60 = load i64, ptr %2, align 8
  %61 = icmp eq i64 %60, 1
  br i1 %61, label %62, label %63

62:                                               ; preds = %55
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !33
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !41
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !42
  br label %63

63:                                               ; preds = %55, %62, %40, %36, %32
  %64 = load ptr, ptr %5, align 8, !tbaa !43
  %65 = getelementptr inbounds i8, ptr %64, i64 28
  %66 = load volatile i32, ptr %65, align 4, !tbaa !44
  %67 = and i32 %66, 16
  %.not = icmp eq i32 %67, 0
  br i1 %.not, label %109, label %68

68:                                               ; preds = %63
  %69 = getelementptr inbounds i8, ptr %0, i64 812
  %70 = load i32, ptr %69, align 4, !tbaa !37
  %71 = icmp eq i32 %70, 2
  br i1 %71, label %72, label %109

72:                                               ; preds = %68
  %73 = getelementptr inbounds i8, ptr %0, i64 720
  %74 = load i32, ptr %73, align 8, !tbaa !38
  %75 = icmp eq i32 %74, 1
  br i1 %75, label %76, label %109

76:                                               ; preds = %72
  %77 = getelementptr inbounds i8, ptr %64, i64 32
  %78 = load volatile i32, ptr %77, align 4, !tbaa !45
  %79 = or i32 %78, 16
  store volatile i32 %79, ptr %77, align 4, !tbaa !45
  %80 = getelementptr inbounds i8, ptr %0, i64 863
  %81 = load i8, ptr %80, align 1, !tbaa !26, !range !27, !noundef !28
  %82 = trunc nuw i8 %81 to i1
  %83 = getelementptr inbounds i8, ptr %0, i64 264
  %84 = load i16, ptr %83, align 8, !tbaa !39
  %85 = zext i16 %84 to i32
  br i1 %82, label %86, label %89

86:                                               ; preds = %76
  %87 = getelementptr inbounds i8, ptr %4, i64 4
  %88 = load volatile i32, ptr %87, align 4, !tbaa !29
  br label %93

89:                                               ; preds = %76
  %90 = getelementptr inbounds i8, ptr %0, i64 266
  %91 = load volatile i16, ptr %90, align 2, !tbaa !46
  %92 = zext i16 %91 to i32
  br label %93

93:                                               ; preds = %89, %86
  %.sink42 = phi i32 [ %92, %89 ], [ %88, %86 ]
  %94 = sub i32 %85, %.sink42
  %95 = getelementptr inbounds i8, ptr %0, i64 816
  store i32 %94, ptr %95, align 8
  %96 = call i32 @HAL_UART_AbortReceive(ptr noundef nonnull %5) #3
  %97 = load ptr, ptr %5, align 8, !tbaa !43
  %98 = getelementptr inbounds i8, ptr %97, i64 32
  %99 = load volatile i32, ptr %98, align 4, !tbaa !45
  %100 = and i32 %99, -17
  store volatile i32 %100, ptr %98, align 4, !tbaa !45
  %101 = load volatile i32, ptr %97, align 4, !tbaa !47
  %102 = and i32 %101, -17
  store volatile i32 %102, ptr %97, align 4, !tbaa !47
  %103 = getelementptr inbounds i8, ptr %0, i64 784
  %104 = load ptr, ptr %103, align 8, !tbaa !40
  %105 = call i64 @xQueueGiveFromISR(ptr noundef %104, ptr noundef nonnull %2) #3
  %106 = load i64, ptr %2, align 8
  %107 = icmp eq i64 %106, 1
  br i1 %107, label %108, label %109

108:                                              ; preds = %93
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !33
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !48
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !49
  br label %109

109:                                              ; preds = %93, %108, %72, %68, %63
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @HAL_UART_IRQHandler(ptr noundef) local_unnamed_addr #2

declare i64 @xQueueGiveFromISR(ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @HAL_UART_AbortReceive(ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 528}
!10 = !{!"", !7, i64 0, !7, i64 32, !11, i64 64, !13, i64 152, !18, i64 336, !18, i64 528, !15, i64 720, !12, i64 728, !12, i64 736, !15, i64 744, !15, i64 748, !15, i64 752, !15, i64 756, !15, i64 760, !22, i64 768}
!11 = !{!"file_operations", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"__UART_HandleTypeDef", !12, i64 0, !14, i64 8, !16, i64 44, !12, i64 88, !17, i64 96, !17, i64 98, !12, i64 104, !17, i64 112, !17, i64 114, !17, i64 116, !15, i64 120, !17, i64 124, !17, i64 126, !15, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !12, i64 160, !15, i64 168, !15, i64 172, !15, i64 176, !15, i64 180}
!14 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32}
!15 = !{!"int", !7, i64 0}
!16 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36}
!17 = !{!"short", !7, i64 0}
!18 = !{!"", !19, i64 0, !15, i64 184, !21, i64 188}
!19 = !{!"__DMA_HandleTypeDef", !12, i64 0, !20, i64 8, !15, i64 56, !15, i64 60, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !15, i64 120, !15, i64 124, !15, i64 128, !12, i64 136, !12, i64 144, !15, i64 152, !12, i64 160, !12, i64 168, !15, i64 176}
!20 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44}
!21 = !{!"", !15, i64 0}
!22 = !{!"", !15, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !15, i64 40, !15, i64 44, !15, i64 48, !15, i64 52, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !15, i64 88, !23, i64 92, !23, i64 93, !23, i64 94, !23, i64 95, !23, i64 96}
!23 = !{!"_Bool", !7, i64 0}
!24 = !{!10, !15, i64 324}
!25 = !{!10, !15, i64 808}
!26 = !{!10, !23, i64 863}
!27 = !{i8 0, i8 2}
!28 = !{}
!29 = !{!30, !15, i64 4}
!30 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20}
!31 = !{!10, !17, i64 248}
!32 = !{!10, !12, i64 776}
!33 = !{!15, !15, i64 0}
!34 = !{i64 2154162261}
!35 = !{i64 2154162331}
!36 = !{!10, !15, i64 328}
!37 = !{!10, !15, i64 812}
!38 = !{!10, !15, i64 720}
!39 = !{!10, !17, i64 264}
!40 = !{!10, !12, i64 784}
!41 = !{i64 2154163156}
!42 = !{i64 2154163226}
!43 = !{!10, !12, i64 152}
!44 = !{!20, !15, i64 28}
!45 = !{!20, !15, i64 32}
!46 = !{!10, !17, i64 266}
!47 = !{!20, !15, i64 0}
!48 = !{i64 2154164443}
!49 = !{i64 2154164513}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass