; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_DataInitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_ConfigData(ptr noundef, ptr noundef) #1

declare i32 @SDMMC_CmdReadMultiBlock(ptr noundef, i32 noundef) #1

declare i32 @SDMMC_CmdReadSingleBlock(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SD_ReadBlocks_DMA(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.SDMMC_DataInitTypeDef, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %14 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %14, ptr %12, align 4, !tbaa !9
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = icmp eq ptr null, %15
  br i1 %16, label %17, label %22

17:                                               ; preds = %4
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %18, i32 0, i32 9
  %20 = load volatile i32, ptr %19, align 4, !tbaa !11
  %21 = or i32 %20, 134217728
  store volatile i32 %21, ptr %19, align 4, !tbaa !11
  store i32 1, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %141

22:                                               ; preds = %4
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %23, i32 0, i32 8
  %25 = load volatile i32, ptr %24, align 8, !tbaa !15
  %26 = icmp eq i32 %25, 1
  br i1 %26, label %27, label %140

27:                                               ; preds = %22
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %28, i32 0, i32 9
  store volatile i32 0, ptr %29, align 4, !tbaa !11
  %30 = load i32, ptr %12, align 4, !tbaa !9
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = add i32 %30, %31
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %33, i32 0, i32 10
  %35 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %34, i32 0, i32 6
  %36 = load i32, ptr %35, align 8, !tbaa !16
  %37 = icmp ugt i32 %32, %36
  br i1 %37, label %38, label %43

38:                                               ; preds = %27
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %39, i32 0, i32 9
  %41 = load volatile i32, ptr %40, align 4, !tbaa !11
  %42 = or i32 %41, 33554432
  store volatile i32 %42, ptr %40, align 4, !tbaa !11
  store i32 1, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %141

43:                                               ; preds = %27
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %44, i32 0, i32 8
  store volatile i32 3, ptr %45, align 8, !tbaa !15
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %46, i32 0, i32 0
  %48 = load ptr, ptr %47, align 8, !tbaa !17
  %49 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %48, i32 0, i32 11
  store volatile i32 0, ptr %49, align 4, !tbaa !18
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %51, i32 0, i32 5
  store ptr %50, ptr %52, align 8, !tbaa !20
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = mul i32 512, %53
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %55, i32 0, i32 6
  store i32 %54, ptr %56, align 8, !tbaa !21
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %57, i32 0, i32 10
  %59 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %58, i32 0, i32 0
  %60 = load i32, ptr %59, align 8, !tbaa !22
  %61 = icmp ne i32 %60, 1
  br i1 %61, label %62, label %65

62:                                               ; preds = %43
  %63 = load i32, ptr %12, align 4, !tbaa !9
  %64 = mul i32 %63, 512
  store i32 %64, ptr %12, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %62, %43
  %66 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 0
  store i32 -1, ptr %66, align 4, !tbaa !23
  %67 = load i32, ptr %9, align 4, !tbaa !9
  %68 = mul i32 512, %67
  %69 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 1
  store i32 %68, ptr %69, align 4, !tbaa !25
  %70 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 2
  store i32 144, ptr %70, align 4, !tbaa !26
  %71 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 3
  store i32 2, ptr %71, align 4, !tbaa !27
  %72 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 4
  store i32 0, ptr %72, align 4, !tbaa !28
  %73 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %10, i32 0, i32 5
  store i32 0, ptr %73, align 4, !tbaa !29
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %74, i32 0, i32 0
  %76 = load ptr, ptr %75, align 8, !tbaa !17
  %77 = call i32 @SDMMC_ConfigData(ptr noundef %76, ptr noundef %10)
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %78, i32 0, i32 0
  %80 = load ptr, ptr %79, align 8, !tbaa !17
  %81 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %80, i32 0, i32 3
  %82 = load volatile i32, ptr %81, align 4, !tbaa !30
  %83 = zext i32 %82 to i64
  %84 = or i64 %83, 64
  %85 = trunc i64 %84 to i32
  store volatile i32 %85, ptr %81, align 4, !tbaa !30
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = ptrtoint ptr %86 to i32
  %88 = load ptr, ptr %6, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %88, i32 0, i32 0
  %90 = load ptr, ptr %89, align 8, !tbaa !17
  %91 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %90, i32 0, i32 20
  store volatile i32 %87, ptr %91, align 4, !tbaa !31
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %92, i32 0, i32 0
  %94 = load ptr, ptr %93, align 8, !tbaa !17
  %95 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %94, i32 0, i32 18
  store volatile i32 1, ptr %95, align 4, !tbaa !32
  %96 = load i32, ptr %9, align 4, !tbaa !9
  %97 = icmp ugt i32 %96, 1
  br i1 %97, label %98, label %106

98:                                               ; preds = %65
  %99 = load ptr, ptr %6, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %99, i32 0, i32 7
  store volatile i32 130, ptr %100, align 4, !tbaa !33
  %101 = load ptr, ptr %6, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %101, i32 0, i32 0
  %103 = load ptr, ptr %102, align 8, !tbaa !17
  %104 = load i32, ptr %12, align 4, !tbaa !9
  %105 = call i32 @SDMMC_CmdReadMultiBlock(ptr noundef %103, i32 noundef %104)
  store i32 %105, ptr %11, align 4, !tbaa !9
  br label %114

106:                                              ; preds = %65
  %107 = load ptr, ptr %6, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %107, i32 0, i32 7
  store volatile i32 129, ptr %108, align 4, !tbaa !33
  %109 = load ptr, ptr %6, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %109, i32 0, i32 0
  %111 = load ptr, ptr %110, align 8, !tbaa !17
  %112 = load i32, ptr %12, align 4, !tbaa !9
  %113 = call i32 @SDMMC_CmdReadSingleBlock(ptr noundef %111, i32 noundef %112)
  store i32 %113, ptr %11, align 4, !tbaa !9
  br label %114

114:                                              ; preds = %106, %98
  %115 = load i32, ptr %11, align 4, !tbaa !9
  %116 = icmp ne i32 %115, 0
  br i1 %116, label %117, label %131

117:                                              ; preds = %114
  %118 = load ptr, ptr %6, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !17
  %121 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %120, i32 0, i32 14
  store volatile i32 534777855, ptr %121, align 4, !tbaa !34
  %122 = load i32, ptr %11, align 4, !tbaa !9
  %123 = load ptr, ptr %6, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %123, i32 0, i32 9
  %125 = load volatile i32, ptr %124, align 4, !tbaa !11
  %126 = or i32 %125, %122
  store volatile i32 %126, ptr %124, align 4, !tbaa !11
  %127 = load ptr, ptr %6, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %127, i32 0, i32 8
  store volatile i32 1, ptr %128, align 8, !tbaa !15
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %129, i32 0, i32 7
  store volatile i32 0, ptr %130, align 4, !tbaa !33
  store i32 1, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %141

131:                                              ; preds = %114
  %132 = load ptr, ptr %6, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %132, i32 0, i32 0
  %134 = load ptr, ptr %133, align 8, !tbaa !17
  %135 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %134, i32 0, i32 15
  %136 = load volatile i32, ptr %135, align 4, !tbaa !35
  %137 = zext i32 %136 to i64
  %138 = or i64 %137, 298
  %139 = trunc i64 %138 to i32
  store volatile i32 %139, ptr %135, align 4, !tbaa !35
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %141

140:                                              ; preds = %22
  store i32 2, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %141

141:                                              ; preds = %140, %131, %117, %38, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #3
  %142 = load i32, ptr %5, align 4
  ret i32 %142
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 68}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 108, !7, i64 124}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!12, !10, i64 64}
!16 = !{!12, !10, i64 96}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !10, i64 44}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!20 = !{!12, !6, i64 48}
!21 = !{!12, !10, i64 56}
!22 = !{!12, !10, i64 72}
!23 = !{!24, !10, i64 0}
!24 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!25 = !{!24, !10, i64 4}
!26 = !{!24, !10, i64 8}
!27 = !{!24, !10, i64 12}
!28 = !{!24, !10, i64 16}
!29 = !{!24, !10, i64 20}
!30 = !{!19, !10, i64 12}
!31 = !{!19, !10, i64 88}
!32 = !{!19, !10, i64 80}
!33 = !{!12, !10, i64 60}
!34 = !{!19, !10, i64 56}
!35 = !{!19, !10, i64 60}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_DataInitTypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_ConfigData(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdReadMultiBlock(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdReadSingleBlock(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SD_ReadBlocks_DMA(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 {
  %5 = alloca %struct.SDMMC_DataInitTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
  %6 = icmp eq ptr %1, null
  br i1 %6, label %7, label %11

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 68
  %9 = load volatile i32, ptr %8, align 4, !tbaa !5
  %10 = or i32 %9, 134217728
  store volatile i32 %10, ptr %8, align 4, !tbaa !5
  br label %61

11:                                               ; preds = %4
  %12 = getelementptr inbounds i8, ptr %0, i64 64
  %13 = load volatile i32, ptr %12, align 8, !tbaa !13
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %61

15:                                               ; preds = %11
  %16 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 0, ptr %16, align 4, !tbaa !5
  %17 = add i32 %3, %2
  %18 = getelementptr inbounds i8, ptr %0, i64 96
  %19 = load i32, ptr %18, align 8, !tbaa !14
  %20 = icmp ugt i32 %17, %19
  br i1 %20, label %21, label %24

21:                                               ; preds = %15
  %22 = load volatile i32, ptr %16, align 4, !tbaa !5
  %23 = or i32 %22, 33554432
  store volatile i32 %23, ptr %16, align 4, !tbaa !5
  br label %61

24:                                               ; preds = %15
  %25 = getelementptr inbounds i8, ptr %0, i64 72
  store volatile i32 3, ptr %12, align 8, !tbaa !13
  %26 = load ptr, ptr %0, align 8, !tbaa !15
  %27 = getelementptr inbounds i8, ptr %26, i64 44
  store volatile i32 0, ptr %27, align 4, !tbaa !16
  %28 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %1, ptr %28, align 8, !tbaa !18
  %29 = shl i32 %3, 9
  %30 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %29, ptr %30, align 8, !tbaa !19
  %31 = load i32, ptr %25, align 8, !tbaa !20
  %.not = icmp eq i32 %31, 1
  %32 = shl i32 %2, 9
  %spec.select = select i1 %.not, i32 %2, i32 %32
  store i32 -1, ptr %5, align 4, !tbaa !21
  %33 = getelementptr inbounds i8, ptr %5, i64 4
  store i32 %29, ptr %33, align 4, !tbaa !23
  %34 = getelementptr inbounds i8, ptr %5, i64 8
  store <4 x i32> <i32 144, i32 2, i32 0, i32 0>, ptr %34, align 4, !tbaa !24
  %35 = call i32 @SDMMC_ConfigData(ptr noundef %26, ptr noundef nonnull %5) #3
  %36 = load ptr, ptr %0, align 8, !tbaa !15
  %37 = getelementptr inbounds i8, ptr %36, i64 12
  %38 = load volatile i32, ptr %37, align 4, !tbaa !25
  %39 = or i32 %38, 64
  store volatile i32 %39, ptr %37, align 4, !tbaa !25
  %40 = ptrtoint ptr %1 to i64
  %41 = trunc i64 %40 to i32
  %42 = getelementptr inbounds i8, ptr %36, i64 88
  store volatile i32 %41, ptr %42, align 4, !tbaa !26
  %43 = getelementptr inbounds i8, ptr %36, i64 80
  store volatile i32 1, ptr %43, align 4, !tbaa !27
  %44 = icmp ugt i32 %3, 1
  %45 = getelementptr inbounds i8, ptr %0, i64 60
  br i1 %44, label %46, label %48

46:                                               ; preds = %24
  store volatile i32 130, ptr %45, align 4, !tbaa !28
  %47 = call i32 @SDMMC_CmdReadMultiBlock(ptr noundef nonnull %36, i32 noundef %spec.select) #3
  br label %50

48:                                               ; preds = %24
  store volatile i32 129, ptr %45, align 4, !tbaa !28
  %49 = call i32 @SDMMC_CmdReadSingleBlock(ptr noundef nonnull %36, i32 noundef %spec.select) #3
  br label %50

50:                                               ; preds = %48, %46
  %.037 = phi i32 [ %47, %46 ], [ %49, %48 ]
  %.not40 = icmp eq i32 %.037, 0
  %51 = load ptr, ptr %0, align 8, !tbaa !15
  br i1 %.not40, label %57, label %52

52:                                               ; preds = %50
  %53 = getelementptr inbounds i8, ptr %51, i64 56
  store volatile i32 534777855, ptr %53, align 4, !tbaa !29
  %54 = load volatile i32, ptr %16, align 4, !tbaa !5
  %55 = or i32 %54, %.037
  store volatile i32 %55, ptr %16, align 4, !tbaa !5
  store volatile i32 1, ptr %12, align 8, !tbaa !13
  %56 = getelementptr inbounds i8, ptr %0, i64 60
  store volatile i32 0, ptr %56, align 4, !tbaa !28
  br label %61

57:                                               ; preds = %50
  %58 = getelementptr inbounds i8, ptr %51, i64 60
  %59 = load volatile i32, ptr %58, align 4, !tbaa !30
  %60 = or i32 %59, 298
  store volatile i32 %60, ptr %58, align 4, !tbaa !30
  br label %61

61:                                               ; preds = %11, %57, %52, %21, %7
  %.038 = phi i32 [ 1, %7 ], [ 1, %21 ], [ 1, %52 ], [ 0, %57 ], [ 2, %11 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
  ret i32 %.038
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 68}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 28, !7, i64 32, !11, i64 40, !7, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !12, i64 72, !8, i64 108, !8, i64 124}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!13 = !{!6, !11, i64 64}
!14 = !{!6, !11, i64 96}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 44}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !8, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !8, i64 132, !11, i64 1020}
!18 = !{!6, !7, i64 48}
!19 = !{!6, !11, i64 56}
!20 = !{!6, !11, i64 72}
!21 = !{!22, !11, i64 0}
!22 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!23 = !{!22, !11, i64 4}
!24 = !{!11, !11, i64 0}
!25 = !{!17, !11, i64 12}
!26 = !{!17, !11, i64 88}
!27 = !{!17, !11, i64 80}
!28 = !{!6, !11, i64 60}
!29 = !{!17, !11, i64 56}
!30 = !{!17, !11, i64 60}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass