; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/periph/sdio/stm32 (sdio)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.sdio_t = type { %struct.SD_HandleTypeDef, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, %struct.sdio_private_t }
%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.sdio_private_t = type { i32, %struct.HAL_SD_CardInfoTypeDef, i32, i32, ptr, ptr }
%struct.SCB_Type = type { i32, i32, i32, i32, i32, i32, [12 x i8], i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, [4 x i32], [5 x i32], [1 x i32], i32, i32, i32, i32, i32, [93 x i32], i32, [15 x i32], i32, i32, i32, [1 x i32], i32, [1 x i32], i32, i32, i32, i32, i32, i32, i32, i32, [6 x i32], i32, i32, i32, i32, i32, [1 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i64 @xQueueSemaphoreTake(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @sdio_check_status_with_timeout(ptr noundef, i32 noundef) #2

declare i64 @xQueueGenericSend(ptr noundef, ptr noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @sdio_write_blocks(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  %12 = load i32, ptr %9, align 4, !tbaa !9
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %17, label %14

14:                                               ; preds = %4
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = icmp eq ptr %15, null
  br i1 %16, label %17, label %18

17:                                               ; preds = %14, %4
  store i32 22, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %104

18:                                               ; preds = %14
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.sdio_t, ptr %19, i32 0, i32 10
  %21 = getelementptr inbounds %struct.sdio_private_t, ptr %20, i32 0, i32 5
  %22 = load ptr, ptr %21, align 8, !tbaa !11
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.sdio_t, ptr %23, i32 0, i32 8
  %25 = load i32, ptr %24, align 8, !tbaa !17
  %26 = mul i32 %25, 1000
  %27 = udiv i32 %26, 1000
  %28 = call i64 @xQueueSemaphoreTake(ptr noundef %22, i32 noundef %27)
  %29 = icmp ne i64 %28, 0
  br i1 %29, label %31, label %30

30:                                               ; preds = %18
  store i32 116, ptr %10, align 4, !tbaa !9
  br label %94

31:                                               ; preds = %18
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.sdio_t, ptr %32, i32 0, i32 10
  %34 = getelementptr inbounds %struct.sdio_private_t, ptr %33, i32 0, i32 4
  %35 = load ptr, ptr %34, align 8, !tbaa !18
  %36 = call i64 @xQueueSemaphoreTake(ptr noundef %35, i32 noundef 0)
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.sdio_t, ptr %37, i32 0, i32 10
  %39 = getelementptr inbounds %struct.sdio_private_t, ptr %38, i32 0, i32 2
  store i32 1, ptr %39, align 8, !tbaa !19
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.sdio_t, ptr %41, i32 0, i32 8
  %43 = load i32, ptr %42, align 8, !tbaa !17
  %44 = call i32 @sdio_check_status_with_timeout(ptr noundef %40, i32 noundef %43)
  store i32 %44, ptr %10, align 4, !tbaa !9
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %47, label %48

47:                                               ; preds = %31
  br label %94

48:                                               ; preds = %31
  %49 = load volatile i32, ptr getelementptr inbounds (%struct.SCB_Type, ptr inttoptr (i64 3758157056 to ptr), i32 0, i32 5), align 4, !tbaa !20
  %50 = zext i32 %49 to i64
  %51 = and i64 %50, 65536
  %52 = icmp ne i64 %51, 0
  br i1 %52, label %53, label %57

53:                                               ; preds = %48
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = mul i32 %55, 512
  call void @SCB_CleanDCache_by_Addr(ptr noundef %54, i32 noundef %56)
  br label %57

57:                                               ; preds = %53, %48
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.sdio_t, ptr %58, i32 0, i32 0
  %60 = load ptr, ptr %7, align 8, !tbaa !5
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = load i32, ptr %9, align 4, !tbaa !9
  %63 = call i32 @HAL_SD_WriteBlocks_DMA(ptr noundef %59, ptr noundef %60, i32 noundef %61, i32 noundef %62)
  store i32 %63, ptr %10, align 4, !tbaa !9
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %67

66:                                               ; preds = %57
  br label %94

67:                                               ; preds = %57
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.sdio_t, ptr %68, i32 0, i32 10
  %70 = getelementptr inbounds %struct.sdio_private_t, ptr %69, i32 0, i32 4
  %71 = load ptr, ptr %70, align 8, !tbaa !18
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.sdio_t, ptr %72, i32 0, i32 8
  %74 = load i32, ptr %73, align 8, !tbaa !17
  %75 = mul i32 %74, 1000
  %76 = udiv i32 %75, 1000
  %77 = call i64 @xQueueSemaphoreTake(ptr noundef %71, i32 noundef %76)
  %78 = icmp ne i64 %77, 0
  br i1 %78, label %80, label %79

79:                                               ; preds = %67
  store i32 116, ptr %10, align 4, !tbaa !9
  br label %80

80:                                               ; preds = %79, %67
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.sdio_t, ptr %81, i32 0, i32 0
  %83 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %82, i32 0, i32 9
  %84 = load volatile i32, ptr %83, align 4, !tbaa !22
  %85 = icmp ne i32 %84, 0
  br i1 %85, label %86, label %93

86:                                               ; preds = %80
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.sdio_t, ptr %87, i32 0, i32 0
  %89 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %88, i32 0, i32 9
  %90 = load volatile i32, ptr %89, align 4, !tbaa !22
  %91 = load i32, ptr %10, align 4, !tbaa !9
  %92 = or i32 %91, %90
  store i32 %92, ptr %10, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %86, %80
  br label %94

94:                                               ; preds = %93, %66, %47, %30
  %95 = load ptr, ptr %6, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.sdio_t, ptr %95, i32 0, i32 10
  %97 = getelementptr inbounds %struct.sdio_private_t, ptr %96, i32 0, i32 2
  store i32 0, ptr %97, align 8, !tbaa !19
  %98 = load ptr, ptr %6, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.sdio_t, ptr %98, i32 0, i32 10
  %100 = getelementptr inbounds %struct.sdio_private_t, ptr %99, i32 0, i32 5
  %101 = load ptr, ptr %100, align 8, !tbaa !11
  %102 = call i64 @xQueueGenericSend(ptr noundef %101, ptr noundef null, i32 noundef 0, i64 noundef 0)
  %103 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %103, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %104

104:                                              ; preds = %94, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %105 = load i32, ptr %5, align 4
  ret i32 %105
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @SCB_CleanDCache_by_Addr(ptr noundef, i32 noundef) #3

declare i32 @HAL_SD_WriteBlocks_DMA(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 264}
!12 = !{!"", !13, i64 0, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !10, i64 200, !10, i64 204, !16, i64 208}
!13 = !{!"", !6, i64 0, !14, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !15, i64 72, !7, i64 108, !7, i64 124}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!16 = !{!"", !10, i64 0, !15, i64 4, !10, i64 40, !10, i64 44, !6, i64 48, !6, i64 56}
!17 = !{!12, !10, i64 200}
!18 = !{!12, !6, i64 256}
!19 = !{!12, !10, i64 248}
!20 = !{!21, !10, i64 20}
!21 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !7, i64 64, !10, i64 72, !10, i64 76, !7, i64 80, !7, i64 96, !7, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !7, i64 140, !10, i64 512, !7, i64 516, !10, i64 576, !10, i64 580, !10, i64 584, !7, i64 588, !10, i64 592, !7, i64 596, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !10, i64 616, !10, i64 620, !10, i64 624, !10, i64 628, !7, i64 632, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !7, i64 676, !10, i64 680}
!22 = !{!12, !10, i64 68}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i64 @xQueueSemaphoreTake(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @sdio_check_status_with_timeout(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i64 @xQueueGenericSend(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @sdio_write_blocks(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = icmp eq i32 %3, 0
  %6 = icmp eq ptr %1, null
  %or.cond = or i1 %6, %5
  br i1 %or.cond, label %44, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 264
  %9 = load ptr, ptr %8, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 200
  %11 = load i32, ptr %10, align 8, !tbaa !15
  %12 = mul i32 %11, 1000
  %13 = udiv i32 %12, 1000
  %14 = tail call i64 @xQueueSemaphoreTake(ptr noundef %9, i32 noundef %13) #3
  %.not = icmp eq i64 %14, 0
  br i1 %.not, label %40, label %15

15:                                               ; preds = %7
  %16 = getelementptr inbounds i8, ptr %0, i64 256
  %17 = load ptr, ptr %16, align 8, !tbaa !16
  %18 = tail call i64 @xQueueSemaphoreTake(ptr noundef %17, i32 noundef 0) #3
  %19 = getelementptr inbounds i8, ptr %0, i64 248
  store i32 1, ptr %19, align 8, !tbaa !17
  %20 = load i32, ptr %10, align 8, !tbaa !15
  %21 = tail call i32 @sdio_check_status_with_timeout(ptr noundef nonnull %0, i32 noundef %20)
  %.not31 = icmp eq i32 %21, 0
  br i1 %.not31, label %22, label %40

22:                                               ; preds = %15
  %23 = load volatile i32, ptr inttoptr (i64 3758157076 to ptr), align 4, !tbaa !18
  %24 = and i32 %23, 65536
  %.not32 = icmp eq i32 %24, 0
  br i1 %.not32, label %27, label %25

25:                                               ; preds = %22
  %26 = shl i32 %3, 9
  tail call void @SCB_CleanDCache_by_Addr(ptr noundef nonnull %1, i32 noundef %26)
  br label %27

27:                                               ; preds = %25, %22
  %28 = tail call i32 @HAL_SD_WriteBlocks_DMA(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %3) #3
  %.not33 = icmp eq i32 %28, 0
  br i1 %.not33, label %29, label %40

29:                                               ; preds = %27
  %30 = load ptr, ptr %16, align 8, !tbaa !16
  %31 = load i32, ptr %10, align 8, !tbaa !15
  %32 = mul i32 %31, 1000
  %33 = udiv i32 %32, 1000
  %34 = tail call i64 @xQueueSemaphoreTake(ptr noundef %30, i32 noundef %33) #3
  %.not34 = icmp eq i64 %34, 0
  %spec.select = select i1 %.not34, i32 116, i32 0
  %35 = getelementptr inbounds i8, ptr %0, i64 68
  %36 = load volatile i32, ptr %35, align 4, !tbaa !20
  %.not35 = icmp eq i32 %36, 0
  br i1 %.not35, label %40, label %37

37:                                               ; preds = %29
  %38 = load volatile i32, ptr %35, align 4, !tbaa !20
  %39 = or i32 %38, %spec.select
  br label %40

40:                                               ; preds = %7, %29, %37, %27, %15
  %.1 = phi i32 [ %21, %15 ], [ %28, %27 ], [ %39, %37 ], [ %spec.select, %29 ], [ 116, %7 ]
  %41 = getelementptr inbounds i8, ptr %0, i64 248
  store i32 0, ptr %41, align 8, !tbaa !17
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = tail call i64 @xQueueGenericSend(ptr noundef %42, ptr noundef null, i32 noundef 0, i64 noundef 0) #3
  br label %44

44:                                               ; preds = %4, %40
  %.025 = phi i32 [ %.1, %40 ], [ 22, %4 ]
  ret i32 %.025
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @SCB_CleanDCache_by_Addr(ptr noundef, i32 noundef) local_unnamed_addr #2

declare i32 @HAL_SD_WriteBlocks_DMA(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 264}
!6 = !{!"", !7, i64 0, !8, i64 144, !8, i64 152, !8, i64 160, !8, i64 168, !8, i64 176, !8, i64 184, !8, i64 192, !12, i64 200, !12, i64 204, !14, i64 208}
!7 = !{!"", !8, i64 0, !11, i64 8, !12, i64 28, !8, i64 32, !12, i64 40, !8, i64 48, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !13, i64 72, !9, i64 108, !9, i64 124}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!12 = !{!"int", !9, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32}
!14 = !{!"", !12, i64 0, !13, i64 4, !12, i64 40, !12, i64 44, !8, i64 48, !8, i64 56}
!15 = !{!6, !12, i64 200}
!16 = !{!6, !8, i64 256}
!17 = !{!6, !12, i64 248}
!18 = !{!19, !12, i64 20}
!19 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !9, i64 24, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !9, i64 64, !12, i64 72, !12, i64 76, !9, i64 80, !9, i64 96, !9, i64 116, !12, i64 120, !12, i64 124, !12, i64 128, !12, i64 132, !12, i64 136, !9, i64 140, !12, i64 512, !9, i64 516, !12, i64 576, !12, i64 580, !12, i64 584, !9, i64 588, !12, i64 592, !9, i64 596, !12, i64 600, !12, i64 604, !12, i64 608, !12, i64 612, !12, i64 616, !12, i64 620, !12, i64 624, !12, i64 628, !9, i64 632, !12, i64 656, !12, i64 660, !12, i64 664, !12, i64 668, !12, i64 672, !9, i64 676, !12, i64 680}
!20 = !{!6, !12, i64 68}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass