; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_rcc_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }
%struct.PLL2_ClocksTypeDef = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %9 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 10), align 4, !tbaa !9
  %10 = zext i32 %9 to i64
  %11 = and i64 %10, 3
  %12 = trunc i64 %11 to i32
  store i32 %12, ptr %3, align 4, !tbaa !12
  %13 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 10), align 4, !tbaa !9
  %14 = zext i32 %13 to i64
  %15 = and i64 %14, 258048
  %16 = lshr i64 %15, 12
  %17 = trunc i64 %16 to i32
  store i32 %17, ptr %4, align 4, !tbaa !12
  %18 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 11), align 4, !tbaa !13
  %19 = zext i32 %18 to i64
  %20 = and i64 %19, 16
  %21 = lshr i64 %20, 4
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %5, align 4, !tbaa !12
  %23 = load i32, ptr %5, align 4, !tbaa !12
  %24 = zext i32 %23 to i64
  %25 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 15), align 4, !tbaa !14
  %26 = zext i32 %25 to i64
  %27 = and i64 %26, 65528
  %28 = lshr i64 %27, 3
  %29 = mul i64 %24, %28
  %30 = trunc i64 %29 to i32
  %31 = uitofp i32 %30 to float
  store float %31, ptr %7, align 4, !tbaa !15
  %32 = load i32, ptr %4, align 4, !tbaa !12
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %162

34:                                               ; preds = %1
  %35 = load i32, ptr %3, align 4, !tbaa !12
  switch i32 %35, label %111 [
    i32 0, label %36
    i32 1, label %83
    i32 2, label %97
  ]

36:                                               ; preds = %34
  %37 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !17
  %38 = zext i32 %37 to i64
  %39 = and i64 %38, 32
  %40 = icmp ne i64 %39, 0
  %41 = zext i1 %40 to i64
  %42 = select i1 %40, i32 1, i32 0
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %68

44:                                               ; preds = %36
  %45 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !17
  %46 = zext i32 %45 to i64
  %47 = and i64 %46, 24
  %48 = trunc i64 %47 to i32
  %49 = lshr i32 %48, 3
  %50 = zext i32 %49 to i64
  %51 = lshr i64 64000000, %50
  %52 = trunc i64 %51 to i32
  store i32 %52, ptr %6, align 4, !tbaa !12
  %53 = load i32, ptr %6, align 4, !tbaa !12
  %54 = uitofp i32 %53 to float
  %55 = load i32, ptr %4, align 4, !tbaa !12
  %56 = uitofp i32 %55 to float
  %57 = fdiv float %54, %56
  %58 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %59 = zext i32 %58 to i64
  %60 = and i64 %59, 511
  %61 = trunc i64 %60 to i32
  %62 = uitofp i32 %61 to float
  %63 = load float, ptr %7, align 4, !tbaa !15
  %64 = fdiv float %63, 8.192000e+03
  %65 = fadd float %62, %64
  %66 = fadd float %65, 1.000000e+00
  %67 = fmul float %57, %66
  store float %67, ptr %8, align 4, !tbaa !15
  br label %82

68:                                               ; preds = %36
  %69 = load i32, ptr %4, align 4, !tbaa !12
  %70 = uitofp i32 %69 to float
  %71 = fdiv float 6.400000e+07, %70
  %72 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %73 = zext i32 %72 to i64
  %74 = and i64 %73, 511
  %75 = trunc i64 %74 to i32
  %76 = uitofp i32 %75 to float
  %77 = load float, ptr %7, align 4, !tbaa !15
  %78 = fdiv float %77, 8.192000e+03
  %79 = fadd float %76, %78
  %80 = fadd float %79, 1.000000e+00
  %81 = fmul float %71, %80
  store float %81, ptr %8, align 4, !tbaa !15
  br label %82

82:                                               ; preds = %68, %44
  br label %125

83:                                               ; preds = %34
  %84 = load i32, ptr %4, align 4, !tbaa !12
  %85 = uitofp i32 %84 to float
  %86 = fdiv float 4.000000e+06, %85
  %87 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %88 = zext i32 %87 to i64
  %89 = and i64 %88, 511
  %90 = trunc i64 %89 to i32
  %91 = uitofp i32 %90 to float
  %92 = load float, ptr %7, align 4, !tbaa !15
  %93 = fdiv float %92, 8.192000e+03
  %94 = fadd float %91, %93
  %95 = fadd float %94, 1.000000e+00
  %96 = fmul float %86, %95
  store float %96, ptr %8, align 4, !tbaa !15
  br label %125

97:                                               ; preds = %34
  %98 = load i32, ptr %4, align 4, !tbaa !12
  %99 = uitofp i32 %98 to float
  %100 = fdiv float 2.400000e+07, %99
  %101 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %102 = zext i32 %101 to i64
  %103 = and i64 %102, 511
  %104 = trunc i64 %103 to i32
  %105 = uitofp i32 %104 to float
  %106 = load float, ptr %7, align 4, !tbaa !15
  %107 = fdiv float %106, 8.192000e+03
  %108 = fadd float %105, %107
  %109 = fadd float %108, 1.000000e+00
  %110 = fmul float %100, %109
  store float %110, ptr %8, align 4, !tbaa !15
  br label %125

111:                                              ; preds = %34
  %112 = load i32, ptr %4, align 4, !tbaa !12
  %113 = uitofp i32 %112 to float
  %114 = fdiv float 4.000000e+06, %113
  %115 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %116 = zext i32 %115 to i64
  %117 = and i64 %116, 511
  %118 = trunc i64 %117 to i32
  %119 = uitofp i32 %118 to float
  %120 = load float, ptr %7, align 4, !tbaa !15
  %121 = fdiv float %120, 8.192000e+03
  %122 = fadd float %119, %121
  %123 = fadd float %122, 1.000000e+00
  %124 = fmul float %114, %123
  store float %124, ptr %8, align 4, !tbaa !15
  br label %125

125:                                              ; preds = %111, %97, %83, %82
  %126 = load float, ptr %8, align 4, !tbaa !15
  %127 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %128 = zext i32 %127 to i64
  %129 = and i64 %128, 65024
  %130 = lshr i64 %129, 9
  %131 = trunc i64 %130 to i32
  %132 = uitofp i32 %131 to float
  %133 = fadd float %132, 1.000000e+00
  %134 = fdiv float %126, %133
  %135 = fptoui float %134 to i32
  %136 = load ptr, ptr %2, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %136, i32 0, i32 0
  store i32 %135, ptr %137, align 4, !tbaa !19
  %138 = load float, ptr %8, align 4, !tbaa !15
  %139 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %140 = zext i32 %139 to i64
  %141 = and i64 %140, 8323072
  %142 = lshr i64 %141, 16
  %143 = trunc i64 %142 to i32
  %144 = uitofp i32 %143 to float
  %145 = fadd float %144, 1.000000e+00
  %146 = fdiv float %138, %145
  %147 = fptoui float %146 to i32
  %148 = load ptr, ptr %2, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %148, i32 0, i32 1
  store i32 %147, ptr %149, align 4, !tbaa !21
  %150 = load float, ptr %8, align 4, !tbaa !15
  %151 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 14), align 4, !tbaa !18
  %152 = zext i32 %151 to i64
  %153 = and i64 %152, 2130706432
  %154 = lshr i64 %153, 24
  %155 = trunc i64 %154 to i32
  %156 = uitofp i32 %155 to float
  %157 = fadd float %156, 1.000000e+00
  %158 = fdiv float %150, %157
  %159 = fptoui float %158 to i32
  %160 = load ptr, ptr %2, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %160, i32 0, i32 2
  store i32 %159, ptr %161, align 4, !tbaa !22
  br label %169

162:                                              ; preds = %1
  %163 = load ptr, ptr %2, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %163, i32 0, i32 0
  store i32 0, ptr %164, align 4, !tbaa !19
  %165 = load ptr, ptr %2, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %165, i32 0, i32 1
  store i32 0, ptr %166, align 4, !tbaa !21
  %167 = load ptr, ptr %2, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %167, i32 0, i32 2
  store i32 0, ptr %168, align 4, !tbaa !22
  br label %169

169:                                              ; preds = %162, %125
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 40}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !7, i64 172, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !11, i64 232, !11, i64 236, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !11, i64 284, !7, i64 288}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 44}
!14 = !{!10, !11, i64 60}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !7, i64 0}
!17 = !{!10, !11, i64 0}
!18 = !{!10, !11, i64 56}
!19 = !{!20, !11, i64 0}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!21 = !{!20, !11, i64 4}
!22 = !{!20, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local void @HAL_RCCEx_GetPLL2ClockFreq(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
  %2 = load volatile i32, ptr inttoptr (i64 1476543528 to ptr), align 8, !tbaa !5
  %3 = load volatile i32, ptr inttoptr (i64 1476543528 to ptr), align 8, !tbaa !5
  %4 = lshr i32 %3, 12
  %5 = and i32 %4, 63
  %6 = load volatile i32, ptr inttoptr (i64 1476543532 to ptr), align 4, !tbaa !10
  %7 = load volatile i32, ptr inttoptr (i64 1476543548 to ptr), align 4, !tbaa !11
  %8 = lshr i32 %7, 3
  %9 = and i32 %8, 8191
  %10 = and i32 %6, 16
  %.not = icmp eq i32 %10, 0
  %narrow = select i1 %.not, i32 0, i32 %9
  %11 = uitofp nneg i32 %narrow to float
  %.not23 = icmp eq i32 %5, 0
  br i1 %.not23, label %56, label %12

12:                                               ; preds = %1
  %13 = and i32 %2, 3
  switch i32 %13, label %default.unreachable [
    i32 0, label %14
    i32 1, label %24
    i32 2, label %23
    i32 3, label %24
  ]

14:                                               ; preds = %12
  %15 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !12
  %16 = and i32 %15, 32
  %.not24 = icmp eq i32 %16, 0
  br i1 %.not24, label %24, label %17

17:                                               ; preds = %14
  %18 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !12
  %19 = lshr i32 %18, 3
  %20 = and i32 %19, 3
  %21 = lshr exact i32 64000000, %20
  %22 = uitofp nneg i32 %21 to float
  br label %24

23:                                               ; preds = %12
  br label %24

default.unreachable:                              ; preds = %12
  unreachable

24:                                               ; preds = %12, %12, %14, %17, %23
  %.sink31 = phi float [ %22, %17 ], [ 2.400000e+07, %23 ], [ 6.400000e+07, %14 ], [ 4.000000e+06, %12 ], [ 4.000000e+06, %12 ]
  %25 = uitofp nneg i32 %5 to float
  %26 = fdiv float %.sink31, %25
  %27 = load volatile i32, ptr inttoptr (i64 1476543544 to ptr), align 8, !tbaa !13
  %28 = and i32 %27, 511
  %29 = uitofp nneg i32 %28 to float
  %30 = fmul float %11, 0x3F20000000000000
  %31 = fadd float %30, %29
  %32 = fadd float %31, 1.000000e+00
  %33 = fmul float %26, %32
  %34 = load volatile i32, ptr inttoptr (i64 1476543544 to ptr), align 8, !tbaa !13
  %35 = lshr i32 %34, 9
  %36 = and i32 %35, 127
  %37 = add nuw nsw i32 %36, 1
  %38 = uitofp nneg i32 %37 to float
  %39 = fdiv float %33, %38
  %40 = fptoui float %39 to i32
  store i32 %40, ptr %0, align 4, !tbaa !14
  %41 = load volatile i32, ptr inttoptr (i64 1476543544 to ptr), align 8, !tbaa !13
  %42 = lshr i32 %41, 16
  %43 = and i32 %42, 127
  %44 = add nuw nsw i32 %43, 1
  %45 = uitofp nneg i32 %44 to float
  %46 = fdiv float %33, %45
  %47 = fptoui float %46 to i32
  %48 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %47, ptr %48, align 4, !tbaa !16
  %49 = load volatile i32, ptr inttoptr (i64 1476543544 to ptr), align 8, !tbaa !13
  %50 = lshr i32 %49, 24
  %51 = and i32 %50, 127
  %52 = add nuw nsw i32 %51, 1
  %53 = uitofp nneg i32 %52 to float
  %54 = fdiv float %33, %53
  %55 = fptoui float %54 to i32
  br label %58

56:                                               ; preds = %1
  store i32 0, ptr %0, align 4, !tbaa !14
  %57 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 0, ptr %57, align 4, !tbaa !16
  br label %58

58:                                               ; preds = %56, %24
  %.sink = phi i32 [ 0, %56 ], [ %55, %24 ]
  %59 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %.sink, ptr %59, align 4, !tbaa !17
  ret void
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 40}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 44}
!11 = !{!6, !7, i64 60}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 56}
!14 = !{!15, !7, i64 0}
!15 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!16 = !{!15, !7, i64 4}
!17 = !{!15, !7, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass