; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 04. Arrays/Large_Factorial.ll (Z8multiplyiPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8multiplyiPii(i32 noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %33, %3
  %11 = load i32, ptr %9, align 4, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = icmp slt i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %36

15:                                               ; preds = %10
  %16 = load ptr, ptr %5, align 8, !tbaa !9
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds i32, ptr %16, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = mul nsw i32 %20, %21
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = add nsw i32 %22, %23
  store i32 %24, ptr %8, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = srem i32 %25, 10
  %27 = load ptr, ptr %5, align 8, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %27, i64 %29
  store i32 %26, ptr %30, align 4, !tbaa !5
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = sdiv i32 %31, 10
  store i32 %32, ptr %7, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %15
  %34 = load i32, ptr %9, align 4, !tbaa !5
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %9, align 4, !tbaa !5
  br label %10, !llvm.loop !11

36:                                               ; preds = %14
  br label %37

37:                                               ; preds = %40, %36
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %50

40:                                               ; preds = %37
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = srem i32 %41, 10
  %43 = load ptr, ptr %5, align 8, !tbaa !9
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %44 to i64
  %47 = getelementptr inbounds i32, ptr %43, i64 %46
  store i32 %42, ptr %47, align 4, !tbaa !5
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = sdiv i32 %48, 10
  store i32 %49, ptr %7, align 4, !tbaa !5
  br label %37, !llvm.loop !13

50:                                               ; preds = %37
  %51 = load i32, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %51
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local noundef i32 @_Z8multiplyiPii(i32 noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %2, 0
  br i1 %4, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %.lr.ph

.preheader:                                       ; preds = %.lr.ph
  %.off = add i32 %9, 9
  %.not21 = icmp ult i32 %.off, 19
  br i1 %.not21, label %._crit_edge, label %.lr.ph24.preheader

.lr.ph24.preheader:                               ; preds = %.preheader
  %5 = zext nneg i32 %2 to i64
  br label %.lr.ph24

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.01719 = phi i32 [ 0, %.lr.ph.preheader ], [ %11, %.lr.ph ]
  %6 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = mul nsw i32 %7, %0
  %9 = add nsw i32 %8, %.01719
  %10 = srem i32 %9, 10
  store i32 %10, ptr %6, align 4, !tbaa !5
  %11 = sdiv i32 %9, 10
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader, label %.lr.ph, !llvm.loop !9

.lr.ph24:                                         ; preds = %.lr.ph24.preheader, %.lr.ph24
  %indvars.iv28 = phi i64 [ %5, %.lr.ph24.preheader ], [ %indvars.iv.next29, %.lr.ph24 ]
  %.122 = phi i32 [ %11, %.lr.ph24.preheader ], [ %14, %.lr.ph24 ]
  %12 = srem i32 %.122, 10
  %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
  %13 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv28
  store i32 %12, ptr %13, align 4, !tbaa !5
  %14 = sdiv i32 %.122, 10
  %.122.off = add nsw i32 %.122, 9
  %.not = icmp ult i32 %.122.off, 19
  br i1 %.not, label %._crit_edge.loopexit, label %.lr.ph24, !llvm.loop !11

._crit_edge.loopexit:                             ; preds = %.lr.ph24
  %15 = trunc nsw i64 %indvars.iv.next29 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %3, %._crit_edge.loopexit, %.preheader
  %.016.lcssa = phi i32 [ %2, %.preheader ], [ %15, %._crit_edge.loopexit ], [ %2, %3 ]
  ret i32 %.016.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass