; LLVM IR from alekmaul/pvsneslib :: tools/gfx4snes/src (lz77)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@rson = external dso_local global [4353 x i32], align 16
@dad = external dso_local global [4097 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local void @InitTree() #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 4097, ptr %1, align 4, !tbaa !5
  br label %2

2:                                                ; preds = %9, %0
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp sle i32 %3, 4352
  br i1 %4, label %5, label %12

5:                                                ; preds = %2
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds [4353 x i32], ptr @rson, i64 0, i64 %7
  store i32 4096, ptr %8, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %5
  %10 = load i32, ptr %1, align 4, !tbaa !5
  %11 = add nsw i32 %10, 1
  store i32 %11, ptr %1, align 4, !tbaa !5
  br label %2, !llvm.loop !9

12:                                               ; preds = %2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %20, %12
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = icmp slt i32 %14, 4096
  br i1 %15, label %16, label %23

16:                                               ; preds = %13
  %17 = load i32, ptr %1, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [4097 x i32], ptr @dad, i64 0, i64 %18
  store i32 4096, ptr %19, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %16
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %1, align 4, !tbaa !5
  br label %13, !llvm.loop !11

23:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@rson = external dso_local local_unnamed_addr global [4353 x i32], align 16
@dad = external dso_local local_unnamed_addr global [4097 x i32], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @InitTree() local_unnamed_addr #0 {
vector.ph:
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16388), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16404), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16420), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16436), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16452), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16468), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16484), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16500), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16516), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16532), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16548), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16564), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16580), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16596), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16612), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16628), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16644), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16660), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16676), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16692), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16708), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16724), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16740), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16756), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16772), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16788), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16804), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16820), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16836), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16852), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16868), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16884), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16900), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16916), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16932), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16948), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16964), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16980), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 16996), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17012), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17028), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17044), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17060), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17076), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17092), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17108), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17124), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17140), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17156), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17172), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17188), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17204), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17220), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17236), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17252), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17268), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17284), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17300), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17316), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17332), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17348), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17364), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17380), align 4, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr getelementptr inbounds (i8, ptr @rson, i64 17396), align 4, !tbaa !5
  br label %vector.body17

vector.body17:                                    ; preds = %vector.body17, %vector.ph
  %index18 = phi i64 [ 0, %vector.ph ], [ %index.next19.3, %vector.body17 ]
  %0 = getelementptr inbounds [4097 x i32], ptr @dad, i64 0, i64 %index18
  %1 = getelementptr inbounds i8, ptr %0, i64 16
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %0, align 16, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %1, align 16, !tbaa !5
  %index.next19 = or disjoint i64 %index18, 8
  %2 = getelementptr inbounds [4097 x i32], ptr @dad, i64 0, i64 %index.next19
  %3 = getelementptr inbounds i8, ptr %2, i64 16
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %2, align 16, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %3, align 16, !tbaa !5
  %index.next19.1 = or disjoint i64 %index18, 16
  %4 = getelementptr inbounds [4097 x i32], ptr @dad, i64 0, i64 %index.next19.1
  %5 = getelementptr inbounds i8, ptr %4, i64 16
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %4, align 16, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %5, align 16, !tbaa !5
  %index.next19.2 = or disjoint i64 %index18, 24
  %6 = getelementptr inbounds [4097 x i32], ptr @dad, i64 0, i64 %index.next19.2
  %7 = getelementptr inbounds i8, ptr %6, i64 16
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %6, align 16, !tbaa !5
  store <4 x i32> <i32 4096, i32 4096, i32 4096, i32 4096>, ptr %7, align 16, !tbaa !5
  %index.next19.3 = add nuw nsw i64 %index18, 32
  %8 = icmp eq i64 %index.next19.3, 4096
  br i1 %8, label %middle.block13, label %vector.body17, !llvm.loop !9

middle.block13:                                   ; preds = %vector.body17
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass