; LLVM IR from vladpolisuk/algorithms :: Sorting/Insertion Sort/code.ll (Z15iinsertion_sortPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z15iinsertion_sortPii(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %58, %2
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = load i32, ptr %4, align 4, !tbaa !9
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %61

13:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %14 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %14, ptr %6, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %33, %13
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %18, label %31

18:                                               ; preds = %15
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds i32, ptr %19, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = sub nsw i32 %25, 1
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds i32, ptr %24, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = icmp slt i32 %23, %29
  br label %31

31:                                               ; preds = %18, %15
  %32 = phi i1 [ false, %15 ], [ %30, %18 ]
  br i1 %32, label %33, label %57

33:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = load i32, ptr %6, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds i32, ptr %34, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !9
  store i32 %38, ptr %7, align 4, !tbaa !9
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %6, align 4, !tbaa !9
  %41 = sub nsw i32 %40, 1
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i32, ptr %39, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = load i32, ptr %6, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds i32, ptr %45, i64 %47
  store i32 %44, ptr %48, align 4, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = load i32, ptr %6, align 4, !tbaa !9
  %52 = sub nsw i32 %51, 1
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds i32, ptr %50, i64 %53
  store i32 %49, ptr %54, align 4, !tbaa !9
  %55 = load i32, ptr %6, align 4, !tbaa !9
  %56 = add nsw i32 %55, -1
  store i32 %56, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %15, !llvm.loop !11

57:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %5, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %5, align 4, !tbaa !9
  br label %8, !llvm.loop !13

61:                                               ; preds = %12
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_Z15iinsertion_sortPii(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.preheader.preheader, label %._crit_edge

.preheader.preheader:                             ; preds = %2
  %4 = add nsw i32 %1, -1
  %xtraiter = and i32 %4, 1
  %5 = icmp eq i32 %1, 2
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.preheader.preheader.new

.preheader.preheader.new:                         ; preds = %.preheader.preheader
  %unroll_iter = and i32 %4, -2
  br label %.preheader

.preheader:                                       ; preds = %.critedge.1, %.preheader.preheader.new
  %.022 = phi i32 [ 1, %.preheader.preheader.new ], [ %36, %.critedge.1 ]
  %niter = phi i32 [ 0, %.preheader.preheader.new ], [ %niter.next.1, %.critedge.1 ]
  br label %15

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.critedge.1, %.preheader.preheader
  %.022.unr = phi i32 [ 1, %.preheader.preheader ], [ %36, %.critedge.1 ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.preheader.epil

.preheader.epil:                                  ; preds = %._crit_edge.loopexit.unr-lcssa, %12
  %.01821.epil = phi i32 [ %13, %12 ], [ %.022.unr, %._crit_edge.loopexit.unr-lcssa ]
  %6 = zext nneg i32 %.01821.epil to i64
  %7 = getelementptr inbounds i32, ptr %0, i64 %6
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = getelementptr i8, ptr %7, i64 -4
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp slt i32 %8, %10
  br i1 %11, label %12, label %._crit_edge

12:                                               ; preds = %.preheader.epil
  store i32 %10, ptr %7, align 4, !tbaa !5
  store i32 %8, ptr %9, align 4, !tbaa !5
  %13 = add nsw i32 %.01821.epil, -1
  %14 = icmp sgt i32 %.01821.epil, 1
  br i1 %14, label %.preheader.epil, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %12, %.preheader.epil, %2
  ret void

15:                                               ; preds = %.preheader, %22
  %.01821 = phi i32 [ %.022, %.preheader ], [ %23, %22 ]
  %16 = zext nneg i32 %.01821 to i64
  %17 = getelementptr inbounds i32, ptr %0, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = getelementptr i8, ptr %17, i64 -4
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp slt i32 %18, %20
  br i1 %21, label %22, label %.critedge

22:                                               ; preds = %15
  store i32 %20, ptr %17, align 4, !tbaa !5
  store i32 %18, ptr %19, align 4, !tbaa !5
  %23 = add nsw i32 %.01821, -1
  %24 = icmp sgt i32 %.01821, 1
  br i1 %24, label %15, label %.critedge, !llvm.loop !9

.critedge:                                        ; preds = %22, %15
  %25 = add nuw nsw i32 %.022, 1
  br label %26

26:                                               ; preds = %33, %.critedge
  %.01821.1 = phi i32 [ %25, %.critedge ], [ %34, %33 ]
  %27 = zext nneg i32 %.01821.1 to i64
  %28 = getelementptr inbounds i32, ptr %0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = getelementptr i8, ptr %28, i64 -4
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = icmp slt i32 %29, %31
  br i1 %32, label %33, label %.critedge.1

33:                                               ; preds = %26
  store i32 %31, ptr %28, align 4, !tbaa !5
  store i32 %29, ptr %30, align 4, !tbaa !5
  %34 = add nsw i32 %.01821.1, -1
  %35 = icmp sgt i32 %.01821.1, 1
  br i1 %35, label %26, label %.critedge.1, !llvm.loop !9

.critedge.1:                                      ; preds = %33, %26
  %36 = add nuw nsw i32 %.022, 2
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.preheader, !llvm.loop !11
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass