; LLVM IR from Wilson-ZheLin/Introduction-to-Digital-Image-Processing :: 7. Image Noise and Noise Reduction, Homomorphic Filter, and Band Stop Filter/src/ma_79f6feaa (Z12MedianFilterP5Image)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Image = type { i32, i32, i32, ptr, [15 x [100 x i8]], i32 }

@.str.14 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePc(ptr noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z12SavePNMImageP5ImagePc(ptr noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z12MedianFilterP5Image(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [9 x i8], align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 9, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = call noundef ptr @_Z14CreateNewImageP5ImagePc(ptr noundef %16, ptr noundef @.str.14)
  store ptr %17, ptr %6, align 8, !tbaa !5
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.Image, ptr %18, i32 0, i32 3
  %20 = load ptr, ptr %19, align 8, !tbaa !9
  store ptr %20, ptr %3, align 8, !tbaa !5
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.Image, ptr %21, i32 0, i32 3
  %23 = load ptr, ptr %22, align 8, !tbaa !9
  store ptr %23, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 1, ptr %7, align 4, !tbaa !12
  br label %24

24:                                               ; preds = %141, %1
  %25 = load i32, ptr %7, align 4, !tbaa !12
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.Image, ptr %26, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !13
  %29 = sub nsw i32 %28, 1
  %30 = icmp slt i32 %25, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %24
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %144

32:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 1, ptr %9, align 4, !tbaa !12
  br label %33

33:                                               ; preds = %137, %32
  %34 = load i32, ptr %9, align 4, !tbaa !12
  %35 = load ptr, ptr %2, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.Image, ptr %35, i32 0, i32 0
  %37 = load i32, ptr %36, align 8, !tbaa !14
  %38 = sub nsw i32 %37, 1
  %39 = icmp slt i32 %34, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %33
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %140

41:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 -1, ptr %11, align 4, !tbaa !12
  br label %42

42:                                               ; preds = %75, %41
  %43 = load i32, ptr %11, align 4, !tbaa !12
  %44 = icmp sle i32 %43, 1
  br i1 %44, label %46, label %45

45:                                               ; preds = %42
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %78

46:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 -1, ptr %12, align 4, !tbaa !12
  br label %47

47:                                               ; preds = %71, %46
  %48 = load i32, ptr %12, align 4, !tbaa !12
  %49 = icmp sle i32 %48, 1
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %74

51:                                               ; preds = %47
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = load ptr, ptr %2, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.Image, ptr %53, i32 0, i32 0
  %55 = load i32, ptr %54, align 8, !tbaa !14
  %56 = load i32, ptr %7, align 4, !tbaa !12
  %57 = load i32, ptr %11, align 4, !tbaa !12
  %58 = add nsw i32 %56, %57
  %59 = mul nsw i32 %55, %58
  %60 = load i32, ptr %9, align 4, !tbaa !12
  %61 = load i32, ptr %12, align 4, !tbaa !12
  %62 = add nsw i32 %60, %61
  %63 = add nsw i32 %59, %62
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds i8, ptr %52, i64 %64
  %66 = load i8, ptr %65, align 1, !tbaa !15
  %67 = load i32, ptr %10, align 4, !tbaa !12
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %10, align 4, !tbaa !12
  %69 = sext i32 %67 to i64
  %70 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %69
  store i8 %66, ptr %70, align 1, !tbaa !15
  br label %71

71:                                               ; preds = %51
  %72 = load i32, ptr %12, align 4, !tbaa !12
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %12, align 4, !tbaa !12
  br label %47, !llvm.loop !16

74:                                               ; preds = %50
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %11, align 4, !tbaa !12
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %11, align 4, !tbaa !12
  br label %42, !llvm.loop !18

78:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 1, ptr %13, align 4, !tbaa !12
  br label %79

79:                                               ; preds = %121, %78
  %80 = load i32, ptr %13, align 4, !tbaa !12
  %81 = icmp slt i32 %80, 9
  br i1 %81, label %83, label %82

82:                                               ; preds = %79
  store i32 14, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %124

83:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %84 = load i32, ptr %13, align 4, !tbaa !12
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %85
  %87 = load i8, ptr %86, align 1, !tbaa !15
  %88 = zext i8 %87 to i32
  store i32 %88, ptr %14, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %89 = load i32, ptr %13, align 4, !tbaa !12
  store i32 %89, ptr %15, align 4, !tbaa !12
  br label %90

90:                                               ; preds = %104, %83
  %91 = load i32, ptr %15, align 4, !tbaa !12
  %92 = icmp sge i32 %91, 1
  br i1 %92, label %93, label %102

93:                                               ; preds = %90
  %94 = load i32, ptr %15, align 4, !tbaa !12
  %95 = sub nsw i32 %94, 1
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %96
  %98 = load i8, ptr %97, align 1, !tbaa !15
  %99 = zext i8 %98 to i32
  %100 = load i32, ptr %14, align 4, !tbaa !12
  %101 = icmp sgt i32 %99, %100
  br label %102

102:                                              ; preds = %93, %90
  %103 = phi i1 [ false, %90 ], [ %101, %93 ]
  br i1 %103, label %104, label %115

104:                                              ; preds = %102
  %105 = load i32, ptr %15, align 4, !tbaa !12
  %106 = sub nsw i32 %105, 1
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %107
  %109 = load i8, ptr %108, align 1, !tbaa !15
  %110 = load i32, ptr %15, align 4, !tbaa !12
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %111
  store i8 %109, ptr %112, align 1, !tbaa !15
  %113 = load i32, ptr %15, align 4, !tbaa !12
  %114 = add nsw i32 %113, -1
  store i32 %114, ptr %15, align 4, !tbaa !12
  br label %90, !llvm.loop !19

115:                                              ; preds = %102
  %116 = load i32, ptr %14, align 4, !tbaa !12
  %117 = trunc i32 %116 to i8
  %118 = load i32, ptr %15, align 4, !tbaa !12
  %119 = sext i32 %118 to i64
  %120 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 %119
  store i8 %117, ptr %120, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %121

121:                                              ; preds = %115
  %122 = load i32, ptr %13, align 4, !tbaa !12
  %123 = add nsw i32 %122, 1
  store i32 %123, ptr %13, align 4, !tbaa !12
  br label %79, !llvm.loop !20

124:                                              ; preds = %82
  %125 = getelementptr inbounds [9 x i8], ptr %5, i64 0, i64 4
  %126 = load i8, ptr %125, align 1, !tbaa !15
  %127 = load ptr, ptr %4, align 8, !tbaa !5
  %128 = load ptr, ptr %2, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.Image, ptr %128, i32 0, i32 0
  %130 = load i32, ptr %129, align 8, !tbaa !14
  %131 = load i32, ptr %7, align 4, !tbaa !12
  %132 = mul nsw i32 %130, %131
  %133 = load i32, ptr %9, align 4, !tbaa !12
  %134 = add nsw i32 %132, %133
  %135 = sext i32 %134 to i64
  %136 = getelementptr inbounds i8, ptr %127, i64 %135
  store i8 %126, ptr %136, align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %137

137:                                              ; preds = %124
  %138 = load i32, ptr %9, align 4, !tbaa !12
  %139 = add nsw i32 %138, 1
  store i32 %139, ptr %9, align 4, !tbaa !12
  br label %33, !llvm.loop !21

140:                                              ; preds = %40
  br label %141

141:                                              ; preds = %140
  %142 = load i32, ptr %7, align 4, !tbaa !12
  %143 = add nsw i32 %142, 1
  store i32 %143, ptr %7, align 4, !tbaa !12
  br label %24, !llvm.loop !22

144:                                              ; preds = %31
  %145 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_Z12SavePNMImageP5ImagePc(ptr noundef %145, ptr noundef @.str.17)
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 9, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"_ZTS5Image", !11, i64 0, !11, i64 4, !11, i64 8, !6, i64 16, !7, i64 24, !11, i64 1524}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!10, !11, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = distinct !{!20, !17}
!21 = distinct !{!21, !17}
!22 = distinct !{!22, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.14 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_Z14CreateNewImageP5ImagePc(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z12SavePNMImageP5ImagePc(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z12MedianFilterP5Image(ptr noundef %0) local_unnamed_addr #1 {
  %.sroa.0 = alloca i8, align 1
  %.sroa.18 = alloca i8, align 1
  %.sroa.42 = alloca i8, align 1
  %.sroa.63 = alloca i8, align 1
  %.sroa.82 = alloca i8, align 1
  %.sroa.98 = alloca i8, align 1
  %.sroa.111 = alloca i8, align 1
  %.sroa.121 = alloca i8, align 1
  %.sroa.128 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %.sroa.128)
  %2 = tail call noundef ptr @_Z14CreateNewImageP5ImagePc(ptr noundef %0, ptr noundef nonnull @.str.14)
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %2, i64 16
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = icmp sgt i32 %8, 2
  br i1 %9, label %.preheader44.lr.ph, label %._crit_edge53

.preheader44.lr.ph:                               ; preds = %1
  %10 = load i32, ptr %0, align 8, !tbaa !12
  %11 = icmp sgt i32 %10, 2
  br i1 %11, label %.preheader44, label %._crit_edge53

.preheader44:                                     ; preds = %.preheader44.lr.ph, %._crit_edge
  %12 = phi i32 [ %62, %._crit_edge ], [ %8, %.preheader44.lr.ph ]
  %13 = phi i32 [ %63, %._crit_edge ], [ %10, %.preheader44.lr.ph ]
  %indvars.iv = phi i64 [ %indvars.iv.next.pre-phi, %._crit_edge ], [ 1, %.preheader44.lr.ph ]
  %14 = icmp sgt i32 %13, 2
  br i1 %14, label %.preheader43.preheader, label %.preheader44.._crit_edge_crit_edge

.preheader44.._crit_edge_crit_edge:               ; preds = %.preheader44
  %.pre72 = add nuw nsw i64 %indvars.iv, 1
  br label %._crit_edge

.preheader43.preheader:                           ; preds = %.preheader44
  %15 = trunc i64 %indvars.iv to i32
  %16 = add i32 %15, -1
  %17 = trunc i64 %indvars.iv to i32
  %18 = add nuw nsw i64 %indvars.iv, 1
  %19 = trunc i64 %18 to i32
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  br label %.preheader43

._crit_edge53:                                    ; preds = %._crit_edge, %.preheader44.lr.ph, %1
  tail call void @_Z12SavePNMImageP5ImagePc(ptr noundef %2, ptr noundef nonnull @.str.17)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.0)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.18)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.42)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.63)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.82)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.98)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.111)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.121)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %.sroa.128)
  ret void

.preheader43:                                     ; preds = %.preheader43.preheader, %.critedge.7
  %21 = phi i32 [ %143, %.critedge.7 ], [ %13, %.preheader43.preheader ]
  %.04151 = phi i32 [ %142, %.critedge.7 ], [ 1, %.preheader43.preheader ]
  %22 = mul i32 %16, %21
  %23 = add i32 %22, %.04151
  %24 = add i32 %23, -1
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds i8, ptr %4, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !13
  store i8 %27, ptr %.sroa.0, align 1, !tbaa !13
  %28 = sext i32 %23 to i64
  %29 = getelementptr inbounds i8, ptr %4, i64 %28
  %30 = load i8, ptr %29, align 1, !tbaa !13
  store i8 %30, ptr %.sroa.18, align 1, !tbaa !13
  %31 = add i32 %23, 1
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds i8, ptr %4, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !13
  store i8 %34, ptr %.sroa.42, align 1, !tbaa !13
  %35 = mul i32 %21, %17
  %36 = add i32 %35, %.04151
  %37 = add i32 %36, -1
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i8, ptr %4, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !13
  store i8 %40, ptr %.sroa.63, align 1, !tbaa !13
  %41 = sext i32 %36 to i64
  %42 = getelementptr inbounds i8, ptr %4, i64 %41
  %43 = load i8, ptr %42, align 1, !tbaa !13
  store i8 %43, ptr %.sroa.82, align 1, !tbaa !13
  %44 = add i32 %36, 1
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i8, ptr %4, i64 %45
  %47 = load i8, ptr %46, align 1, !tbaa !13
  store i8 %47, ptr %.sroa.98, align 1, !tbaa !13
  %48 = mul i32 %21, %19
  %49 = add i32 %48, %.04151
  %50 = add i32 %49, -1
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i8, ptr %4, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !13
  store i8 %53, ptr %.sroa.111, align 1, !tbaa !13
  %54 = sext i32 %49 to i64
  %55 = getelementptr inbounds i8, ptr %4, i64 %54
  %56 = load i8, ptr %55, align 1, !tbaa !13
  store i8 %56, ptr %.sroa.121, align 1, !tbaa !13
  %57 = add i32 %49, 1
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i8, ptr %4, i64 %58
  %60 = load i8, ptr %59, align 1, !tbaa !13
  store i8 %60, ptr %.sroa.128, align 1, !tbaa !13
  %61 = icmp ugt i8 %27, %30
  br i1 %61, label %67, label %.critedge

._crit_edge.loopexit:                             ; preds = %.critedge.7
  %.pre = load i32, ptr %7, align 4, !tbaa !11
  br label %._crit_edge

._crit_edge:                                      ; preds = %.preheader44.._crit_edge_crit_edge, %._crit_edge.loopexit
  %indvars.iv.next.pre-phi = phi i64 [ %.pre72, %.preheader44.._crit_edge_crit_edge ], [ %18, %._crit_edge.loopexit ]
  %62 = phi i32 [ %12, %.preheader44.._crit_edge_crit_edge ], [ %.pre, %._crit_edge.loopexit ]
  %63 = phi i32 [ %13, %.preheader44.._crit_edge_crit_edge ], [ %143, %._crit_edge.loopexit ]
  %64 = add nsw i32 %62, -1
  %65 = sext i32 %64 to i64
  %66 = icmp slt i64 %indvars.iv.next.pre-phi, %65
  br i1 %66, label %.preheader44, label %._crit_edge53, !llvm.loop !14

67:                                               ; preds = %.preheader43
  store i8 %27, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge

.critedge:                                        ; preds = %67, %.preheader43
  %.0.lcssa.sroa.phi = phi ptr [ %.sroa.0, %67 ], [ %.sroa.18, %.preheader43 ]
  store i8 %30, ptr %.0.lcssa.sroa.phi, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.121 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %68 = icmp ugt i8 %.sroa.18.0..sroa.18.1.121, %34
  br i1 %68, label %69, label %.critedge.1

69:                                               ; preds = %.critedge
  store i8 %.sroa.18.0..sroa.18.1.121, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.115 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %70 = icmp ugt i8 %.sroa.0.0..sroa.0.0.115, %34
  br i1 %70, label %71, label %.critedge.1

71:                                               ; preds = %69
  store i8 %.sroa.0.0..sroa.0.0.115, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.1

.critedge.1:                                      ; preds = %71, %69, %.critedge
  %.0.lcssa.1.sroa.phi = phi ptr [ %.sroa.42, %.critedge ], [ %.sroa.18, %69 ], [ %.sroa.0, %71 ]
  store i8 %34, ptr %.0.lcssa.1.sroa.phi, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.131 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.126 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %72 = icmp ugt i8 %.sroa.42.0..sroa.42.2.126, %.sroa.63.0..sroa.63.3.131
  br i1 %72, label %73, label %.critedge.2

73:                                               ; preds = %.critedge.1
  store i8 %.sroa.42.0..sroa.42.2.126, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.120 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %74 = icmp ugt i8 %.sroa.18.0..sroa.18.1.120, %.sroa.63.0..sroa.63.3.131
  br i1 %74, label %75, label %.critedge.2

75:                                               ; preds = %73
  store i8 %.sroa.18.0..sroa.18.1.120, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.114 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %76 = icmp ugt i8 %.sroa.0.0..sroa.0.0.114, %.sroa.63.0..sroa.63.3.131
  br i1 %76, label %77, label %.critedge.2

77:                                               ; preds = %75
  store i8 %.sroa.0.0..sroa.0.0.114, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.2

.critedge.2:                                      ; preds = %77, %75, %73, %.critedge.1
  %.0.lcssa.2.sroa.phi = phi ptr [ %.sroa.63, %.critedge.1 ], [ %.sroa.42, %73 ], [ %.sroa.18, %75 ], [ %.sroa.0, %77 ]
  store i8 %.sroa.63.0..sroa.63.3.131, ptr %.0.lcssa.2.sroa.phi, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.130 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %78 = icmp ugt i8 %.sroa.63.0..sroa.63.3.130, %43
  br i1 %78, label %79, label %.critedge.3

79:                                               ; preds = %.critedge.2
  store i8 %.sroa.63.0..sroa.63.3.130, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.125 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %80 = icmp ugt i8 %.sroa.42.0..sroa.42.2.125, %43
  br i1 %80, label %81, label %.critedge.3

81:                                               ; preds = %79
  store i8 %.sroa.42.0..sroa.42.2.125, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.119 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %82 = icmp ugt i8 %.sroa.18.0..sroa.18.1.119, %43
  br i1 %82, label %83, label %.critedge.3

83:                                               ; preds = %81
  store i8 %.sroa.18.0..sroa.18.1.119, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.113 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %84 = icmp ugt i8 %.sroa.0.0..sroa.0.0.113, %43
  br i1 %84, label %85, label %.critedge.3

85:                                               ; preds = %83
  store i8 %.sroa.0.0..sroa.0.0.113, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.3

.critedge.3:                                      ; preds = %85, %83, %81, %79, %.critedge.2
  %.0.lcssa.3.sroa.phi = phi ptr [ %.sroa.82, %.critedge.2 ], [ %.sroa.63, %79 ], [ %.sroa.42, %81 ], [ %.sroa.18, %83 ], [ %.sroa.0, %85 ]
  store i8 %43, ptr %.0.lcssa.3.sroa.phi, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.138 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.132 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %86 = icmp ugt i8 %.sroa.82.0..sroa.82.4.132, %.sroa.98.0..sroa.98.5.138
  br i1 %86, label %87, label %.critedge.4

87:                                               ; preds = %.critedge.3
  store i8 %.sroa.82.0..sroa.82.4.132, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.129 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %88 = icmp ugt i8 %.sroa.63.0..sroa.63.3.129, %.sroa.98.0..sroa.98.5.138
  br i1 %88, label %89, label %.critedge.4

89:                                               ; preds = %87
  store i8 %.sroa.63.0..sroa.63.3.129, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.124 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %90 = icmp ugt i8 %.sroa.42.0..sroa.42.2.124, %.sroa.98.0..sroa.98.5.138
  br i1 %90, label %91, label %.critedge.4

91:                                               ; preds = %89
  store i8 %.sroa.42.0..sroa.42.2.124, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.118 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %92 = icmp ugt i8 %.sroa.18.0..sroa.18.1.118, %.sroa.98.0..sroa.98.5.138
  br i1 %92, label %93, label %.critedge.4

93:                                               ; preds = %91
  store i8 %.sroa.18.0..sroa.18.1.118, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.112 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %94 = icmp ugt i8 %.sroa.0.0..sroa.0.0.112, %.sroa.98.0..sroa.98.5.138
  br i1 %94, label %95, label %.critedge.4

95:                                               ; preds = %93
  store i8 %.sroa.0.0..sroa.0.0.112, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.4

.critedge.4:                                      ; preds = %95, %93, %91, %89, %87, %.critedge.3
  %.0.lcssa.4.sroa.phi = phi ptr [ %.sroa.98, %.critedge.3 ], [ %.sroa.82, %87 ], [ %.sroa.63, %89 ], [ %.sroa.42, %91 ], [ %.sroa.18, %93 ], [ %.sroa.0, %95 ]
  store i8 %.sroa.98.0..sroa.98.5.138, ptr %.0.lcssa.4.sroa.phi, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6.140 = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.137 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %96 = icmp ugt i8 %.sroa.98.0..sroa.98.5.137, %.sroa.111.0..sroa.111.6.140
  br i1 %96, label %97, label %.critedge.5

97:                                               ; preds = %.critedge.4
  store i8 %.sroa.98.0..sroa.98.5.137, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.133 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %98 = icmp ugt i8 %.sroa.82.0..sroa.82.4.133, %.sroa.111.0..sroa.111.6.140
  br i1 %98, label %99, label %.critedge.5

99:                                               ; preds = %97
  store i8 %.sroa.82.0..sroa.82.4.133, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.128 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %100 = icmp ugt i8 %.sroa.63.0..sroa.63.3.128, %.sroa.111.0..sroa.111.6.140
  br i1 %100, label %101, label %.critedge.5

101:                                              ; preds = %99
  store i8 %.sroa.63.0..sroa.63.3.128, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.123 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %102 = icmp ugt i8 %.sroa.42.0..sroa.42.2.123, %.sroa.111.0..sroa.111.6.140
  br i1 %102, label %103, label %.critedge.5

103:                                              ; preds = %101
  store i8 %.sroa.42.0..sroa.42.2.123, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.117 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %104 = icmp ugt i8 %.sroa.18.0..sroa.18.1.117, %.sroa.111.0..sroa.111.6.140
  br i1 %104, label %105, label %.critedge.5

105:                                              ; preds = %103
  store i8 %.sroa.18.0..sroa.18.1.117, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.111 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %106 = icmp ugt i8 %.sroa.0.0..sroa.0.0.111, %.sroa.111.0..sroa.111.6.140
  br i1 %106, label %107, label %.critedge.5

107:                                              ; preds = %105
  store i8 %.sroa.0.0..sroa.0.0.111, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.5

.critedge.5:                                      ; preds = %107, %105, %103, %101, %99, %97, %.critedge.4
  %.0.lcssa.5.sroa.phi = phi ptr [ %.sroa.111, %.critedge.4 ], [ %.sroa.98, %97 ], [ %.sroa.82, %99 ], [ %.sroa.63, %101 ], [ %.sroa.42, %103 ], [ %.sroa.18, %105 ], [ %.sroa.0, %107 ]
  store i8 %.sroa.111.0..sroa.111.6.140, ptr %.0.lcssa.5.sroa.phi, align 1, !tbaa !13
  %.sroa.121.0..sroa.121.7.141 = load i8, ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6.139 = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %108 = icmp ugt i8 %.sroa.111.0..sroa.111.6.139, %.sroa.121.0..sroa.121.7.141
  br i1 %108, label %109, label %.critedge.6

109:                                              ; preds = %.critedge.5
  store i8 %.sroa.111.0..sroa.111.6.139, ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5.136 = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %110 = icmp ugt i8 %.sroa.98.0..sroa.98.5.136, %.sroa.121.0..sroa.121.7.141
  br i1 %110, label %111, label %.critedge.6

111:                                              ; preds = %109
  store i8 %.sroa.98.0..sroa.98.5.136, ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.134 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %112 = icmp ugt i8 %.sroa.82.0..sroa.82.4.134, %.sroa.121.0..sroa.121.7.141
  br i1 %112, label %113, label %.critedge.6

113:                                              ; preds = %111
  store i8 %.sroa.82.0..sroa.82.4.134, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3.127 = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %114 = icmp ugt i8 %.sroa.63.0..sroa.63.3.127, %.sroa.121.0..sroa.121.7.141
  br i1 %114, label %115, label %.critedge.6

115:                                              ; preds = %113
  store i8 %.sroa.63.0..sroa.63.3.127, ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2.122 = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %116 = icmp ugt i8 %.sroa.42.0..sroa.42.2.122, %.sroa.121.0..sroa.121.7.141
  br i1 %116, label %117, label %.critedge.6

117:                                              ; preds = %115
  store i8 %.sroa.42.0..sroa.42.2.122, ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1.116 = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %118 = icmp ugt i8 %.sroa.18.0..sroa.18.1.116, %.sroa.121.0..sroa.121.7.141
  br i1 %118, label %119, label %.critedge.6

119:                                              ; preds = %117
  store i8 %.sroa.18.0..sroa.18.1.116, ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0.110 = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %120 = icmp ugt i8 %.sroa.0.0..sroa.0.0.110, %.sroa.121.0..sroa.121.7.141
  br i1 %120, label %121, label %.critedge.6

121:                                              ; preds = %119
  store i8 %.sroa.0.0..sroa.0.0.110, ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.6

.critedge.6:                                      ; preds = %121, %119, %117, %115, %113, %111, %109, %.critedge.5
  %.0.lcssa.6.sroa.phi = phi ptr [ %.sroa.121, %.critedge.5 ], [ %.sroa.111, %109 ], [ %.sroa.98, %111 ], [ %.sroa.82, %113 ], [ %.sroa.63, %115 ], [ %.sroa.42, %117 ], [ %.sroa.18, %119 ], [ %.sroa.0, %121 ]
  store i8 %.sroa.121.0..sroa.121.7.141, ptr %.0.lcssa.6.sroa.phi, align 1, !tbaa !13
  %.sroa.121.0..sroa.121.7. = load i8, ptr %.sroa.121, align 1, !tbaa !13
  %122 = icmp ugt i8 %.sroa.121.0..sroa.121.7., %60
  br i1 %122, label %123, label %.critedge.7

123:                                              ; preds = %.critedge.6
  store i8 %.sroa.121.0..sroa.121.7., ptr %.sroa.128, align 1, !tbaa !13
  %.sroa.111.0..sroa.111.6. = load i8, ptr %.sroa.111, align 1, !tbaa !13
  %124 = icmp ugt i8 %.sroa.111.0..sroa.111.6., %60
  br i1 %124, label %125, label %.critedge.7

125:                                              ; preds = %123
  store i8 %.sroa.111.0..sroa.111.6., ptr %.sroa.121, align 1, !tbaa !13
  %.sroa.98.0..sroa.98.5. = load i8, ptr %.sroa.98, align 1, !tbaa !13
  %126 = icmp ugt i8 %.sroa.98.0..sroa.98.5., %60
  br i1 %126, label %127, label %.critedge.7

127:                                              ; preds = %125
  store i8 %.sroa.98.0..sroa.98.5., ptr %.sroa.111, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4.135 = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %128 = icmp ugt i8 %.sroa.82.0..sroa.82.4.135, %60
  br i1 %128, label %129, label %.critedge.7

129:                                              ; preds = %127
  store i8 %.sroa.82.0..sroa.82.4.135, ptr %.sroa.98, align 1, !tbaa !13
  %.sroa.63.0..sroa.63.3. = load i8, ptr %.sroa.63, align 1, !tbaa !13
  %130 = icmp ugt i8 %.sroa.63.0..sroa.63.3., %60
  br i1 %130, label %131, label %.critedge.7

131:                                              ; preds = %129
  store i8 %.sroa.63.0..sroa.63.3., ptr %.sroa.82, align 1, !tbaa !13
  %.sroa.42.0..sroa.42.2. = load i8, ptr %.sroa.42, align 1, !tbaa !13
  %132 = icmp ugt i8 %.sroa.42.0..sroa.42.2., %60
  br i1 %132, label %133, label %.critedge.7

133:                                              ; preds = %131
  store i8 %.sroa.42.0..sroa.42.2., ptr %.sroa.63, align 1, !tbaa !13
  %.sroa.18.0..sroa.18.1. = load i8, ptr %.sroa.18, align 1, !tbaa !13
  %134 = icmp ugt i8 %.sroa.18.0..sroa.18.1., %60
  br i1 %134, label %135, label %.critedge.7

135:                                              ; preds = %133
  store i8 %.sroa.18.0..sroa.18.1., ptr %.sroa.42, align 1, !tbaa !13
  %.sroa.0.0..sroa.0.0. = load i8, ptr %.sroa.0, align 1, !tbaa !13
  %136 = icmp ugt i8 %.sroa.0.0..sroa.0.0., %60
  br i1 %136, label %137, label %.critedge.7

137:                                              ; preds = %135
  store i8 %.sroa.0.0..sroa.0.0., ptr %.sroa.18, align 1, !tbaa !13
  br label %.critedge.7

.critedge.7:                                      ; preds = %137, %135, %133, %131, %129, %127, %125, %123, %.critedge.6
  %.0.lcssa.7.sroa.phi = phi ptr [ %.sroa.128, %.critedge.6 ], [ %.sroa.121, %123 ], [ %.sroa.111, %125 ], [ %.sroa.98, %127 ], [ %.sroa.82, %129 ], [ %.sroa.63, %131 ], [ %.sroa.42, %133 ], [ %.sroa.18, %135 ], [ %.sroa.0, %137 ]
  store i8 %60, ptr %.0.lcssa.7.sroa.phi, align 1, !tbaa !13
  %.sroa.82.0..sroa.82.4. = load i8, ptr %.sroa.82, align 1, !tbaa !13
  %138 = mul nsw i32 %21, %20
  %139 = add nsw i32 %138, %.04151
  %140 = sext i32 %139 to i64
  %141 = getelementptr inbounds i8, ptr %6, i64 %140
  store i8 %.sroa.82.0..sroa.82.4., ptr %141, align 1, !tbaa !13
  %142 = add nuw nsw i32 %.04151, 1
  %143 = load i32, ptr %0, align 8, !tbaa !12
  %144 = add nsw i32 %143, -1
  %145 = icmp slt i32 %142, %144
  br i1 %145, label %.preheader43, label %._crit_edge.loopexit, !llvm.loop !17
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS5Image", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !8, i64 24, !7, i64 1524}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15, !16}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!"llvm.loop.unswitch.partial.disable"}
!17 = distinct !{!17, !15}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass