; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/core/stm32/h753/hal/src (stm32h7xx_hal_pwr_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EXTI_TypeDef = type { i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWREx_PVD_AVD_IRQHandler() #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 4, !tbaa !5
  %2 = zext i32 %1 to i64
  %3 = and i64 %2, 16
  %4 = icmp ne i64 %3, 0
  br i1 %4, label %5, label %19

5:                                                ; preds = %0
  %6 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  %7 = zext i32 %6 to i64
  %8 = and i64 %7, 65536
  %9 = icmp eq i64 %8, 65536
  %10 = zext i1 %9 to i64
  %11 = select i1 %9, i64 1, i64 0
  %12 = icmp ne i64 %11, 0
  br i1 %12, label %13, label %18

13:                                               ; preds = %5
  call void @HAL_PWR_PVDCallback()
  %14 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  %15 = zext i32 %14 to i64
  %16 = or i64 %15, 65536
  %17 = trunc i64 %16 to i32
  store volatile i32 %17, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  br label %18

18:                                               ; preds = %13, %5
  br label %19

19:                                               ; preds = %18, %0
  %20 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 4, !tbaa !5
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, 65536
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %38

24:                                               ; preds = %19
  %25 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  %26 = zext i32 %25 to i64
  %27 = and i64 %26, 65536
  %28 = icmp eq i64 %27, 65536
  %29 = zext i1 %28 to i64
  %30 = select i1 %28, i64 1, i64 0
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %37

32:                                               ; preds = %24
  call void @HAL_PWREx_AVDCallback()
  %33 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  %34 = zext i32 %33 to i64
  %35 = or i64 %34, 65536
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 23), align 4, !tbaa !10
  br label %37

37:                                               ; preds = %32, %24
  br label %38

38:                                               ; preds = %37, %19
  ret void
}

declare void @HAL_PWR_PVDCallback() #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_AVDCallback() #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 136}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !8, i64 56, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWREx_PVD_AVD_IRQHandler() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 2048, !tbaa !5
  %2 = and i32 %1, 16
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %9, label %3

3:                                                ; preds = %0
  %4 = load volatile i32, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  %5 = and i32 %4, 65536
  %.not1 = icmp eq i32 %5, 0
  br i1 %.not1, label %9, label %6

6:                                                ; preds = %3
  tail call void @HAL_PWR_PVDCallback() #2
  %7 = load volatile i32, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  %8 = or i32 %7, 65536
  store volatile i32 %8, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  br label %9

9:                                                ; preds = %3, %6, %0
  %10 = load volatile i32, ptr inttoptr (i64 1476544512 to ptr), align 2048, !tbaa !5
  %11 = and i32 %10, 65536
  %.not2 = icmp eq i32 %11, 0
  br i1 %.not2, label %18, label %12

12:                                               ; preds = %9
  %13 = load volatile i32, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  %14 = and i32 %13, 65536
  %.not3 = icmp eq i32 %14, 0
  br i1 %.not3, label %18, label %15

15:                                               ; preds = %12
  tail call void @HAL_PWREx_AVDCallback()
  %16 = load volatile i32, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  %17 = or i32 %16, 65536
  store volatile i32 %17, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !10
  br label %18

18:                                               ; preds = %12, %15, %9
  ret void
}

declare void @HAL_PWR_PVDCallback() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_AVDCallback() local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 136}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !8, i64 56, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,SimplifyCFGPass,TailCallElimPass