; LLVM IR from ctlst-tech/catpilot :: bsp/mcu/periph/tim/stm32 (tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.tim_t = type { %struct.TIM_HandleTypeDef, i32, i32, i32, i32, %struct.tim_private_t }
%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.tim_private_t = type { i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @tim_init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = call i32 @tim_id_init(ptr noundef %6)
  store i32 %7, ptr %4, align 4, !tbaa !9
  %8 = icmp ne i32 %7, 0
  br i1 %8, label %9, label %11

9:                                                ; preds = %1
  %10 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %10, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

11:                                               ; preds = %1
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = call i32 @tim_clock_init(ptr noundef %12)
  store i32 %13, ptr %4, align 4, !tbaa !9
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %17

15:                                               ; preds = %11
  %16 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %16, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

17:                                               ; preds = %11
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.tim_t, ptr %18, i32 0, i32 0
  %20 = call i32 @HAL_TIM_Base_Init(ptr noundef %19)
  store i32 %20, ptr %4, align 4, !tbaa !9
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %24

22:                                               ; preds = %17
  %23 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %23, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

24:                                               ; preds = %17
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.tim_t, ptr %25, i32 0, i32 5
  %27 = getelementptr inbounds %struct.tim_private_t, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 8, !tbaa !11
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.tim_t, ptr %29, i32 0, i32 4
  %31 = load i32, ptr %30, align 4, !tbaa !16
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = call i32 @irq_init(i32 noundef %28, i32 noundef %31, ptr noundef @tim_handler, ptr noundef %32)
  store i32 %33, ptr %4, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %37

35:                                               ; preds = %24
  %36 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %36, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

37:                                               ; preds = %24
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.tim_t, ptr %38, i32 0, i32 5
  %40 = getelementptr inbounds %struct.tim_private_t, ptr %39, i32 0, i32 0
  %41 = load i32, ptr %40, align 8, !tbaa !11
  %42 = call i32 @irq_enable(i32 noundef %41)
  store i32 %42, ptr %4, align 4, !tbaa !9
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %46

44:                                               ; preds = %37
  %45 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %45, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

46:                                               ; preds = %37
  %47 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %47, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %48

48:                                               ; preds = %46, %44, %35, %22, %15, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %49 = load i32, ptr %2, align 4
  ret i32 %49
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @tim_id_init(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @tim_clock_init(ptr noundef) #0

declare i32 @HAL_TIM_Base_Init(ptr noundef) #2

declare i32 @irq_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @tim_handler(ptr noundef) #0

declare i32 @irq_enable(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 168}
!12 = !{!"", !13, i64 0, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !15, i64 168}
!13 = !{!"", !6, i64 0, !14, i64 8, !10, i64 32, !7, i64 40, !10, i64 96, !10, i64 100, !7, i64 104, !7, i64 128, !10, i64 144}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!15 = !{!"", !10, i64 0, !10, i64 4}
!16 = !{!12, !10, i64 164}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @tim_init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call i32 @tim_id_init(ptr noundef %0)
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %3, label %16

3:                                                ; preds = %1
  %4 = tail call i32 @tim_clock_init(ptr noundef %0)
  %.not18 = icmp eq i32 %4, 0
  br i1 %.not18, label %5, label %16

5:                                                ; preds = %3
  %6 = tail call i32 @HAL_TIM_Base_Init(ptr noundef %0) #2
  %.not19 = icmp eq i32 %6, 0
  br i1 %.not19, label %7, label %16

7:                                                ; preds = %5
  %8 = getelementptr inbounds i8, ptr %0, i64 168
  %9 = load i32, ptr %8, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 164
  %11 = load i32, ptr %10, align 4, !tbaa !14
  %12 = tail call i32 @irq_init(i32 noundef %9, i32 noundef %11, ptr noundef nonnull @tim_handler, ptr noundef %0) #2
  %.not20 = icmp eq i32 %12, 0
  br i1 %.not20, label %13, label %16

13:                                               ; preds = %7
  %14 = load i32, ptr %8, align 8, !tbaa !5
  %15 = tail call i32 @irq_enable(i32 noundef %14) #2
  br label %16

16:                                               ; preds = %13, %7, %5, %3, %1
  %.0 = phi i32 [ %2, %1 ], [ %4, %3 ], [ %6, %5 ], [ %12, %7 ], [ %15, %13 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden i32 @tim_id_init(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @tim_clock_init(ptr noundef) local_unnamed_addr #0

declare i32 @HAL_TIM_Base_Init(ptr noundef) local_unnamed_addr #1

declare i32 @irq_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @tim_handler(ptr noundef) #0

declare i32 @irq_enable(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 168}
!6 = !{!"", !7, i64 0, !12, i64 152, !12, i64 156, !12, i64 160, !12, i64 164, !13, i64 168}
!7 = !{!"", !8, i64 0, !11, i64 8, !12, i64 32, !9, i64 40, !12, i64 96, !12, i64 100, !9, i64 104, !9, i64 128, !12, i64 144}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!12 = !{!"int", !9, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4}
!14 = !{!6, !12, i64 164}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass