; LLVM IR from xing1357/SimpleOS :: src (ide)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IDE_CHANNELS = type { i16, i16, i16, i16 }
%struct.IDE_DEVICE = type { i8, i8, i8, i16, i16, i16, i32, i32, [41 x i8] }

@g_ide_channels = external dso_local global [2 x %struct.IDE_CHANNELS], align 16
@g_ide_devices = external dso_local global [5 x %struct.IDE_DEVICE], align 16
@.str.15 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [26 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [29 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [30 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [33 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @ide_read_buffer(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @ide_write_register(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare hidden zeroext i8 @ide_read_register(i8 noundef zeroext, i8 noundef zeroext) #1

declare void @printf(ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
define dso_local void @ide_init(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca [2048 x i8], align 16
  %16 = alloca i8, align 1
  %17 = alloca i8, align 1
  %18 = alloca i8, align 1
  %19 = alloca i32, align 4
  %20 = alloca i8, align 1
  %21 = alloca i8, align 1
  %22 = alloca i8, align 1
  %23 = alloca [2 x ptr], align 8
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  store i32 0, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2048, ptr %15) #4
  call void @llvm.memset.p0.i64(ptr align 16 %15, i8 0, i64 2048, i1 false)
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = trunc i32 %24 to i16
  store i16 %25, ptr @g_ide_channels, align 16, !tbaa !9
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = trunc i32 %26 to i16
  store i16 %27, ptr getelementptr inbounds (%struct.IDE_CHANNELS, ptr @g_ide_channels, i32 0, i32 1), align 2, !tbaa !12
  %28 = load i32, ptr %8, align 4, !tbaa !5
  %29 = trunc i32 %28 to i16
  store i16 %29, ptr getelementptr inbounds ([2 x %struct.IDE_CHANNELS], ptr @g_ide_channels, i64 0, i64 1), align 8, !tbaa !9
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = trunc i32 %30 to i16
  store i16 %31, ptr getelementptr inbounds (%struct.IDE_CHANNELS, ptr getelementptr inbounds ([2 x %struct.IDE_CHANNELS], ptr @g_ide_channels, i64 0, i64 1), i32 0, i32 1), align 2, !tbaa !12
  %32 = load i32, ptr %10, align 4, !tbaa !5
  %33 = trunc i32 %32 to i16
  store i16 %33, ptr getelementptr inbounds (%struct.IDE_CHANNELS, ptr @g_ide_channels, i32 0, i32 2), align 4, !tbaa !13
  %34 = load i32, ptr %10, align 4, !tbaa !5
  %35 = trunc i32 %34 to i16
  store i16 %35, ptr getelementptr inbounds (%struct.IDE_CHANNELS, ptr getelementptr inbounds ([2 x %struct.IDE_CHANNELS], ptr @g_ide_channels, i64 0, i64 1), i32 0, i32 2), align 4, !tbaa !13
  call void @ide_write_register(i8 noundef zeroext 0, i8 noundef zeroext 12, i8 noundef zeroext 2)
  call void @ide_write_register(i8 noundef zeroext 1, i8 noundef zeroext 12, i8 noundef zeroext 2)
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %272, %5
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = icmp slt i32 %37, 2
  br i1 %38, label %39, label %275

39:                                               ; preds = %36
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %268, %39
  %41 = load i32, ptr %12, align 4, !tbaa !5
  %42 = icmp slt i32 %41, 2
  br i1 %42, label %43, label %271

43:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #4
  store i8 0, ptr %16, align 1, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #4
  store i8 0, ptr %17, align 1, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #4
  %44 = load i32, ptr %14, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %45
  %47 = getelementptr inbounds %struct.IDE_DEVICE, ptr %46, i32 0, i32 0
  store i8 0, ptr %47, align 16, !tbaa !15
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = trunc i32 %48 to i8
  %50 = load i32, ptr %12, align 4, !tbaa !5
  %51 = shl i32 %50, 4
  %52 = or i32 160, %51
  %53 = trunc i32 %52 to i8
  call void @ide_write_register(i8 noundef zeroext %49, i8 noundef zeroext 6, i8 noundef zeroext %53)
  %54 = load i32, ptr %11, align 4, !tbaa !5
  %55 = trunc i32 %54 to i8
  call void @ide_write_register(i8 noundef zeroext %55, i8 noundef zeroext 7, i8 noundef zeroext -20)
  %56 = load i32, ptr %11, align 4, !tbaa !5
  %57 = trunc i32 %56 to i8
  %58 = call zeroext i8 @ide_read_register(i8 noundef zeroext %57, i8 noundef zeroext 7)
  %59 = zext i8 %58 to i32
  %60 = icmp eq i32 %59, 0
  br i1 %60, label %61, label %62

61:                                               ; preds = %43
  store i32 7, ptr %19, align 4
  br label %265

62:                                               ; preds = %43
  br label %63

63:                                               ; preds = %84, %62
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %11, align 4, !tbaa !5
  %66 = trunc i32 %65 to i8
  %67 = call zeroext i8 @ide_read_register(i8 noundef zeroext %66, i8 noundef zeroext 7)
  store i8 %67, ptr %18, align 1, !tbaa !14
  %68 = load i8, ptr %18, align 1, !tbaa !14
  %69 = zext i8 %68 to i32
  %70 = and i32 %69, 1
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %73

72:                                               ; preds = %64
  store i8 1, ptr %16, align 1, !tbaa !14
  br label %85

73:                                               ; preds = %64
  %74 = load i8, ptr %18, align 1, !tbaa !14
  %75 = zext i8 %74 to i32
  %76 = and i32 %75, 128
  %77 = icmp ne i32 %76, 0
  br i1 %77, label %84, label %78

78:                                               ; preds = %73
  %79 = load i8, ptr %18, align 1, !tbaa !14
  %80 = zext i8 %79 to i32
  %81 = and i32 %80, 8
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %84

83:                                               ; preds = %78
  br label %85

84:                                               ; preds = %78, %73
  br label %63

85:                                               ; preds = %83, %72
  %86 = load i8, ptr %16, align 1, !tbaa !14
  %87 = zext i8 %86 to i32
  %88 = icmp ne i32 %87, 0
  br i1 %88, label %89, label %121

89:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 1, ptr %20) #4
  %90 = load i32, ptr %11, align 4, !tbaa !5
  %91 = trunc i32 %90 to i8
  %92 = call zeroext i8 @ide_read_register(i8 noundef zeroext %91, i8 noundef zeroext 4)
  store i8 %92, ptr %20, align 1, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 1, ptr %21) #4
  %93 = load i32, ptr %11, align 4, !tbaa !5
  %94 = trunc i32 %93 to i8
  %95 = call zeroext i8 @ide_read_register(i8 noundef zeroext %94, i8 noundef zeroext 5)
  store i8 %95, ptr %21, align 1, !tbaa !14
  %96 = load i8, ptr %20, align 1, !tbaa !14
  %97 = zext i8 %96 to i32
  %98 = icmp eq i32 %97, 20
  br i1 %98, label %99, label %104

99:                                               ; preds = %89
  %100 = load i8, ptr %21, align 1, !tbaa !14
  %101 = zext i8 %100 to i32
  %102 = icmp eq i32 %101, 235
  br i1 %102, label %103, label %104

103:                                              ; preds = %99
  store i8 1, ptr %17, align 1, !tbaa !14
  br label %115

104:                                              ; preds = %99, %89
  %105 = load i8, ptr %20, align 1, !tbaa !14
  %106 = zext i8 %105 to i32
  %107 = icmp eq i32 %106, 105
  br i1 %107, label %108, label %113

108:                                              ; preds = %104
  %109 = load i8, ptr %21, align 1, !tbaa !14
  %110 = zext i8 %109 to i32
  %111 = icmp eq i32 %110, 150
  br i1 %111, label %112, label %113

112:                                              ; preds = %108
  store i8 1, ptr %17, align 1, !tbaa !14
  br label %114

113:                                              ; preds = %108, %104
  store i32 7, ptr %19, align 4
  br label %118

114:                                              ; preds = %112
  br label %115

115:                                              ; preds = %114, %103
  %116 = load i32, ptr %11, align 4, !tbaa !5
  %117 = trunc i32 %116 to i8
  call void @ide_write_register(i8 noundef zeroext %117, i8 noundef zeroext 7, i8 noundef zeroext -95)
  store i32 0, ptr %19, align 4
  br label %118

118:                                              ; preds = %115, %113
  call void @llvm.lifetime.end.p0(i64 1, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %20) #4
  %119 = load i32, ptr %19, align 4
  switch i32 %119, label %265 [
    i32 0, label %120
  ]

120:                                              ; preds = %118
  br label %121

121:                                              ; preds = %120, %85
  %122 = load i32, ptr %11, align 4, !tbaa !5
  %123 = trunc i32 %122 to i8
  %124 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  call void @ide_read_buffer(i8 noundef zeroext %123, i8 noundef zeroext 0, ptr noundef %124, i32 noundef 128)
  %125 = load i32, ptr %14, align 4, !tbaa !5
  %126 = sext i32 %125 to i64
  %127 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %126
  %128 = getelementptr inbounds %struct.IDE_DEVICE, ptr %127, i32 0, i32 0
  store i8 1, ptr %128, align 16, !tbaa !15
  %129 = load i8, ptr %17, align 1, !tbaa !14
  %130 = zext i8 %129 to i16
  %131 = load i32, ptr %14, align 4, !tbaa !5
  %132 = sext i32 %131 to i64
  %133 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %132
  %134 = getelementptr inbounds %struct.IDE_DEVICE, ptr %133, i32 0, i32 3
  store i16 %130, ptr %134, align 4, !tbaa !17
  %135 = load i32, ptr %11, align 4, !tbaa !5
  %136 = trunc i32 %135 to i8
  %137 = load i32, ptr %14, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %138
  %140 = getelementptr inbounds %struct.IDE_DEVICE, ptr %139, i32 0, i32 1
  store i8 %136, ptr %140, align 1, !tbaa !18
  %141 = load i32, ptr %12, align 4, !tbaa !5
  %142 = trunc i32 %141 to i8
  %143 = load i32, ptr %14, align 4, !tbaa !5
  %144 = sext i32 %143 to i64
  %145 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %144
  %146 = getelementptr inbounds %struct.IDE_DEVICE, ptr %145, i32 0, i32 2
  store i8 %142, ptr %146, align 2, !tbaa !19
  %147 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  %148 = getelementptr inbounds i8, ptr %147, i64 0
  %149 = load i16, ptr %148, align 2, !tbaa !20
  %150 = load i32, ptr %14, align 4, !tbaa !5
  %151 = sext i32 %150 to i64
  %152 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %151
  %153 = getelementptr inbounds %struct.IDE_DEVICE, ptr %152, i32 0, i32 4
  store i16 %149, ptr %153, align 2, !tbaa !21
  %154 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  %155 = getelementptr inbounds i8, ptr %154, i64 98
  %156 = load i16, ptr %155, align 2, !tbaa !20
  %157 = load i32, ptr %14, align 4, !tbaa !5
  %158 = sext i32 %157 to i64
  %159 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %158
  %160 = getelementptr inbounds %struct.IDE_DEVICE, ptr %159, i32 0, i32 5
  store i16 %156, ptr %160, align 8, !tbaa !22
  %161 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  %162 = getelementptr inbounds i8, ptr %161, i64 164
  %163 = load i32, ptr %162, align 4, !tbaa !5
  %164 = load i32, ptr %14, align 4, !tbaa !5
  %165 = sext i32 %164 to i64
  %166 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %165
  %167 = getelementptr inbounds %struct.IDE_DEVICE, ptr %166, i32 0, i32 6
  store i32 %163, ptr %167, align 4, !tbaa !23
  %168 = load i32, ptr %14, align 4, !tbaa !5
  %169 = sext i32 %168 to i64
  %170 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %169
  %171 = getelementptr inbounds %struct.IDE_DEVICE, ptr %170, i32 0, i32 6
  %172 = load i32, ptr %171, align 4, !tbaa !23
  %173 = and i32 %172, 67108864
  %174 = icmp ne i32 %173, 0
  br i1 %174, label %175, label %183

175:                                              ; preds = %121
  %176 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  %177 = getelementptr inbounds i8, ptr %176, i64 200
  %178 = load i32, ptr %177, align 4, !tbaa !5
  %179 = load i32, ptr %14, align 4, !tbaa !5
  %180 = sext i32 %179 to i64
  %181 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %180
  %182 = getelementptr inbounds %struct.IDE_DEVICE, ptr %181, i32 0, i32 7
  store i32 %178, ptr %182, align 16, !tbaa !24
  br label %191

183:                                              ; preds = %121
  %184 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 0
  %185 = getelementptr inbounds i8, ptr %184, i64 120
  %186 = load i32, ptr %185, align 4, !tbaa !5
  %187 = load i32, ptr %14, align 4, !tbaa !5
  %188 = sext i32 %187 to i64
  %189 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %188
  %190 = getelementptr inbounds %struct.IDE_DEVICE, ptr %189, i32 0, i32 7
  store i32 %186, ptr %190, align 16, !tbaa !24
  br label %191

191:                                              ; preds = %183, %175
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %192

192:                                              ; preds = %222, %191
  %193 = load i32, ptr %13, align 4, !tbaa !5
  %194 = icmp slt i32 %193, 40
  br i1 %194, label %195, label %225

195:                                              ; preds = %192
  %196 = load i32, ptr %13, align 4, !tbaa !5
  %197 = add nsw i32 54, %196
  %198 = add nsw i32 %197, 1
  %199 = sext i32 %198 to i64
  %200 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 %199
  %201 = load i8, ptr %200, align 1, !tbaa !14
  %202 = load i32, ptr %14, align 4, !tbaa !5
  %203 = sext i32 %202 to i64
  %204 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %203
  %205 = getelementptr inbounds %struct.IDE_DEVICE, ptr %204, i32 0, i32 8
  %206 = load i32, ptr %13, align 4, !tbaa !5
  %207 = sext i32 %206 to i64
  %208 = getelementptr inbounds [41 x i8], ptr %205, i64 0, i64 %207
  store i8 %201, ptr %208, align 1, !tbaa !14
  %209 = load i32, ptr %13, align 4, !tbaa !5
  %210 = add nsw i32 54, %209
  %211 = sext i32 %210 to i64
  %212 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 %211
  %213 = load i8, ptr %212, align 1, !tbaa !14
  %214 = load i32, ptr %14, align 4, !tbaa !5
  %215 = sext i32 %214 to i64
  %216 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %215
  %217 = getelementptr inbounds %struct.IDE_DEVICE, ptr %216, i32 0, i32 8
  %218 = load i32, ptr %13, align 4, !tbaa !5
  %219 = add nsw i32 %218, 1
  %220 = sext i32 %219 to i64
  %221 = getelementptr inbounds [41 x i8], ptr %217, i64 0, i64 %220
  store i8 %213, ptr %221, align 1, !tbaa !14
  br label %222

222:                                              ; preds = %195
  %223 = load i32, ptr %13, align 4, !tbaa !5
  %224 = add nsw i32 %223, 2
  store i32 %224, ptr %13, align 4, !tbaa !5
  br label %192, !llvm.loop !25

225:                                              ; preds = %192
  %226 = load i32, ptr %14, align 4, !tbaa !5
  %227 = sext i32 %226 to i64
  %228 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %227
  %229 = getelementptr inbounds %struct.IDE_DEVICE, ptr %228, i32 0, i32 8
  %230 = getelementptr inbounds [41 x i8], ptr %229, i64 0, i64 40
  store i8 0, ptr %230, align 4, !tbaa !14
  store i32 39, ptr %13, align 4, !tbaa !5
  br label %231

231:                                              ; preds = %259, %225
  %232 = load i32, ptr %13, align 4, !tbaa !5
  %233 = icmp sge i32 %232, 0
  br i1 %233, label %234, label %262

234:                                              ; preds = %231
  call void @llvm.lifetime.start.p0(i64 1, ptr %22) #4
  %235 = load i32, ptr %14, align 4, !tbaa !5
  %236 = sext i32 %235 to i64
  %237 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %236
  %238 = getelementptr inbounds %struct.IDE_DEVICE, ptr %237, i32 0, i32 8
  %239 = load i32, ptr %13, align 4, !tbaa !5
  %240 = sext i32 %239 to i64
  %241 = getelementptr inbounds [41 x i8], ptr %238, i64 0, i64 %240
  %242 = load i8, ptr %241, align 1, !tbaa !14
  store i8 %242, ptr %22, align 1, !tbaa !14
  %243 = load i8, ptr %22, align 1, !tbaa !14
  %244 = sext i8 %243 to i32
  %245 = icmp eq i32 %244, 32
  br i1 %245, label %246, label %254

246:                                              ; preds = %234
  %247 = load i32, ptr %14, align 4, !tbaa !5
  %248 = sext i32 %247 to i64
  %249 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %248
  %250 = getelementptr inbounds %struct.IDE_DEVICE, ptr %249, i32 0, i32 8
  %251 = load i32, ptr %13, align 4, !tbaa !5
  %252 = sext i32 %251 to i64
  %253 = getelementptr inbounds [41 x i8], ptr %250, i64 0, i64 %252
  store i8 0, ptr %253, align 1, !tbaa !14
  br label %255

254:                                              ; preds = %234
  store i32 13, ptr %19, align 4
  br label %256

255:                                              ; preds = %246
  store i32 0, ptr %19, align 4
  br label %256

256:                                              ; preds = %255, %254
  call void @llvm.lifetime.end.p0(i64 1, ptr %22) #4
  %257 = load i32, ptr %19, align 4
  switch i32 %257, label %355 [
    i32 0, label %258
    i32 13, label %262
  ]

258:                                              ; preds = %256
  br label %259

259:                                              ; preds = %258
  %260 = load i32, ptr %13, align 4, !tbaa !5
  %261 = add nsw i32 %260, -1
  store i32 %261, ptr %13, align 4, !tbaa !5
  br label %231, !llvm.loop !27

262:                                              ; preds = %256, %231
  %263 = load i32, ptr %14, align 4, !tbaa !5
  %264 = add nsw i32 %263, 1
  store i32 %264, ptr %14, align 4, !tbaa !5
  store i32 0, ptr %19, align 4
  br label %265

265:                                              ; preds = %262, %118, %61
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #4
  %266 = load i32, ptr %19, align 4
  switch i32 %266, label %355 [
    i32 0, label %267
    i32 7, label %268
  ]

267:                                              ; preds = %265
  br label %268

268:                                              ; preds = %267, %265
  %269 = load i32, ptr %12, align 4, !tbaa !5
  %270 = add nsw i32 %269, 1
  store i32 %270, ptr %12, align 4, !tbaa !5
  br label %40, !llvm.loop !28

271:                                              ; preds = %40
  br label %272

272:                                              ; preds = %271
  %273 = load i32, ptr %11, align 4, !tbaa !5
  %274 = add nsw i32 %273, 1
  store i32 %274, ptr %11, align 4, !tbaa !5
  br label %36, !llvm.loop !29

275:                                              ; preds = %36
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %276

276:                                              ; preds = %351, %275
  %277 = load i32, ptr %11, align 4, !tbaa !5
  %278 = icmp slt i32 %277, 4
  br i1 %278, label %279, label %354

279:                                              ; preds = %276
  %280 = load i32, ptr %11, align 4, !tbaa !5
  %281 = sext i32 %280 to i64
  %282 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %281
  %283 = getelementptr inbounds %struct.IDE_DEVICE, ptr %282, i32 0, i32 0
  %284 = load i8, ptr %283, align 16, !tbaa !15
  %285 = zext i8 %284 to i32
  %286 = icmp eq i32 %285, 1
  br i1 %286, label %287, label %350

287:                                              ; preds = %279
  %288 = load i32, ptr %11, align 4, !tbaa !5
  call void (ptr, ...) @printf(ptr noundef @.str.15, i32 noundef %288)
  %289 = load i32, ptr %11, align 4, !tbaa !5
  %290 = sext i32 %289 to i64
  %291 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %290
  %292 = getelementptr inbounds %struct.IDE_DEVICE, ptr %291, i32 0, i32 8
  %293 = getelementptr inbounds [41 x i8], ptr %292, i64 0, i64 0
  call void (ptr, ...) @printf(ptr noundef @.str.16, ptr noundef %293)
  store ptr @.str.18, ptr %23, align 8, !tbaa !30
  %294 = getelementptr inbounds ptr, ptr %23, i64 1
  store ptr @.str.19, ptr %294, align 8, !tbaa !30
  %295 = load i32, ptr %11, align 4, !tbaa !5
  %296 = sext i32 %295 to i64
  %297 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %296
  %298 = getelementptr inbounds %struct.IDE_DEVICE, ptr %297, i32 0, i32 3
  %299 = load i16, ptr %298, align 4, !tbaa !17
  %300 = zext i16 %299 to i64
  %301 = getelementptr inbounds [2 x ptr], ptr %23, i64 0, i64 %300
  %302 = load ptr, ptr %301, align 8, !tbaa !30
  call void (ptr, ...) @printf(ptr noundef @.str.17, ptr noundef %302)
  %303 = load i32, ptr %11, align 4, !tbaa !5
  %304 = sext i32 %303 to i64
  %305 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %304
  %306 = getelementptr inbounds %struct.IDE_DEVICE, ptr %305, i32 0, i32 2
  %307 = load i8, ptr %306, align 2, !tbaa !19
  %308 = zext i8 %307 to i32
  %309 = load i32, ptr %11, align 4, !tbaa !5
  %310 = sext i32 %309 to i64
  %311 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %310
  %312 = getelementptr inbounds %struct.IDE_DEVICE, ptr %311, i32 0, i32 1
  %313 = load i8, ptr %312, align 1, !tbaa !18
  %314 = zext i8 %313 to i32
  call void (ptr, ...) @printf(ptr noundef @.str.20, i32 noundef %308, i32 noundef %314)
  %315 = load i32, ptr %11, align 4, !tbaa !5
  %316 = sext i32 %315 to i64
  %317 = getelementptr inbounds [2 x %struct.IDE_CHANNELS], ptr @g_ide_channels, i64 0, i64 %316
  %318 = getelementptr inbounds %struct.IDE_CHANNELS, ptr %317, i32 0, i32 0
  %319 = load i16, ptr %318, align 8, !tbaa !9
  %320 = zext i16 %319 to i32
  %321 = load i32, ptr %11, align 4, !tbaa !5
  %322 = sext i32 %321 to i64
  %323 = getelementptr inbounds [2 x %struct.IDE_CHANNELS], ptr @g_ide_channels, i64 0, i64 %322
  %324 = getelementptr inbounds %struct.IDE_CHANNELS, ptr %323, i32 0, i32 1
  %325 = load i16, ptr %324, align 2, !tbaa !12
  %326 = zext i16 %325 to i32
  call void (ptr, ...) @printf(ptr noundef @.str.21, i32 noundef %320, i32 noundef %326)
  %327 = load i32, ptr %11, align 4, !tbaa !5
  %328 = sext i32 %327 to i64
  %329 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %328
  %330 = getelementptr inbounds %struct.IDE_DEVICE, ptr %329, i32 0, i32 7
  %331 = load i32, ptr %330, align 16, !tbaa !24
  %332 = load i32, ptr %11, align 4, !tbaa !5
  %333 = sext i32 %332 to i64
  %334 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %333
  %335 = getelementptr inbounds %struct.IDE_DEVICE, ptr %334, i32 0, i32 7
  %336 = load i32, ptr %335, align 16, !tbaa !24
  %337 = mul i32 %336, 512
  call void (ptr, ...) @printf(ptr noundef @.str.22, i32 noundef %331, i32 noundef %337)
  %338 = load i32, ptr %11, align 4, !tbaa !5
  %339 = sext i32 %338 to i64
  %340 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %339
  %341 = getelementptr inbounds %struct.IDE_DEVICE, ptr %340, i32 0, i32 4
  %342 = load i16, ptr %341, align 2, !tbaa !21
  %343 = zext i16 %342 to i32
  %344 = load i32, ptr %11, align 4, !tbaa !5
  %345 = sext i32 %344 to i64
  %346 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %345
  %347 = getelementptr inbounds %struct.IDE_DEVICE, ptr %346, i32 0, i32 5
  %348 = load i16, ptr %347, align 8, !tbaa !22
  %349 = zext i16 %348 to i32
  call void (ptr, ...) @printf(ptr noundef @.str.23, i32 noundef %343, i32 noundef %349)
  br label %350

350:                                              ; preds = %287, %279
  br label %351

351:                                              ; preds = %350
  %352 = load i32, ptr %11, align 4, !tbaa !5
  %353 = add nsw i32 %352, 1
  store i32 %353, ptr %11, align 4, !tbaa !5
  br label %276, !llvm.loop !32

354:                                              ; preds = %276
  call void @llvm.lifetime.end.p0(i64 2048, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  ret void

355:                                              ; preds = %265, %256
  unreachable
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 2, !11, i64 4, !11, i64 6}
!11 = !{!"short", !7, i64 0}
!12 = !{!10, !11, i64 2}
!13 = !{!10, !11, i64 4}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !11, i64 4, !11, i64 6, !11, i64 8, !6, i64 12, !6, i64 16, !7, i64 20}
!17 = !{!16, !11, i64 4}
!18 = !{!16, !7, i64 1}
!19 = !{!16, !7, i64 2}
!20 = !{!11, !11, i64 0}
!21 = !{!16, !11, i64 6}
!22 = !{!16, !11, i64 8}
!23 = !{!16, !6, i64 12}
!24 = !{!16, !6, i64 16}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = distinct !{!27, !26}
!28 = distinct !{!28, !26}
!29 = distinct !{!29, !26}
!30 = !{!31, !31, i64 0}
!31 = !{!"any pointer", !7, i64 0}
!32 = distinct !{!32, !26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IDE_CHANNELS = type { i16, i16, i16, i16 }
%struct.IDE_DEVICE = type { i8, i8, i8, i16, i16, i16, i32, i32, [41 x i8] }

@g_ide_channels = external dso_local local_unnamed_addr global [2 x %struct.IDE_CHANNELS], align 16
@g_ide_devices = external dso_local global [5 x %struct.IDE_DEVICE], align 16
@.str.15 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [26 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [29 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [30 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [33 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @ide_read_buffer(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @ide_write_register(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden zeroext i8 @ide_read_register(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

declare void @printf(ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @ide_init(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = alloca [2048 x i8], align 16
  %7 = alloca [2 x ptr], align 8
  call void @llvm.lifetime.start.p0(i64 2048, ptr nonnull %6) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(2048) %6, i8 0, i64 2048, i1 false)
  %8 = trunc i32 %0 to i16
  store i16 %8, ptr @g_ide_channels, align 16, !tbaa !5
  %9 = trunc i32 %1 to i16
  store i16 %9, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 2), align 2, !tbaa !10
  %10 = trunc i32 %2 to i16
  store i16 %10, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 8), align 8, !tbaa !5
  %11 = trunc i32 %3 to i16
  store i16 %11, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 10), align 2, !tbaa !10
  %12 = trunc i32 %4 to i16
  store i16 %12, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 4), align 4, !tbaa !11
  store i16 %12, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 12), align 4, !tbaa !11
  tail call void @ide_write_register(i8 noundef zeroext 0, i8 noundef zeroext 12, i8 noundef zeroext 2)
  tail call void @ide_write_register(i8 noundef zeroext 1, i8 noundef zeroext 12, i8 noundef zeroext 2)
  %13 = getelementptr inbounds i8, ptr %6, i64 98
  %14 = getelementptr inbounds i8, ptr %6, i64 164
  %15 = getelementptr inbounds i8, ptr %6, i64 54
  %16 = getelementptr inbounds i8, ptr %6, i64 71
  %17 = getelementptr inbounds i8, ptr %6, i64 70
  %18 = getelementptr inbounds i8, ptr %6, i64 73
  %19 = getelementptr inbounds i8, ptr %6, i64 72
  %20 = getelementptr inbounds i8, ptr %6, i64 75
  %21 = getelementptr inbounds i8, ptr %6, i64 74
  %22 = getelementptr inbounds i8, ptr %6, i64 77
  %23 = getelementptr inbounds i8, ptr %6, i64 76
  %24 = getelementptr inbounds i8, ptr %6, i64 79
  %25 = getelementptr inbounds i8, ptr %6, i64 78
  %26 = getelementptr inbounds i8, ptr %6, i64 81
  %27 = getelementptr inbounds i8, ptr %6, i64 80
  %28 = getelementptr inbounds i8, ptr %6, i64 83
  %29 = getelementptr inbounds i8, ptr %6, i64 82
  %30 = getelementptr inbounds i8, ptr %6, i64 85
  %31 = getelementptr inbounds i8, ptr %6, i64 84
  %32 = getelementptr inbounds i8, ptr %6, i64 87
  %33 = getelementptr inbounds i8, ptr %6, i64 86
  %34 = getelementptr inbounds i8, ptr %6, i64 89
  %35 = getelementptr inbounds i8, ptr %6, i64 88
  %36 = getelementptr inbounds i8, ptr %6, i64 91
  %37 = getelementptr inbounds i8, ptr %6, i64 90
  %38 = getelementptr inbounds i8, ptr %6, i64 93
  %39 = getelementptr inbounds i8, ptr %6, i64 92
  br label %.preheader101

.preheader101:                                    ; preds = %5, %242
  %40 = phi i1 [ true, %5 ], [ false, %242 ]
  %.0108 = phi i8 [ 0, %5 ], [ 1, %242 ]
  %.084107 = phi i32 [ 0, %5 ], [ %.2, %242 ]
  br label %44

.preheader:                                       ; preds = %242
  %41 = getelementptr inbounds i8, ptr %7, i64 8
  %42 = load i8, ptr @g_ide_devices, align 16, !tbaa !12
  %43 = icmp eq i8 %42, 1
  br i1 %43, label %243, label %262

44:                                               ; preds = %.preheader101, %241
  %45 = phi i1 [ true, %.preheader101 ], [ false, %241 ]
  %.079106 = phi i8 [ 0, %.preheader101 ], [ 1, %241 ]
  %.185104 = phi i32 [ %.084107, %.preheader101 ], [ %.2, %241 ]
  %46 = sext i32 %.185104 to i64
  %47 = getelementptr inbounds [5 x %struct.IDE_DEVICE], ptr @g_ide_devices, i64 0, i64 %46
  store i8 0, ptr %47, align 16, !tbaa !12
  %48 = shl nuw nsw i8 %.079106, 4
  %49 = or disjoint i8 %48, -96
  call void @ide_write_register(i8 noundef zeroext %.0108, i8 noundef zeroext 6, i8 noundef zeroext %49)
  call void @ide_write_register(i8 noundef zeroext %.0108, i8 noundef zeroext 7, i8 noundef zeroext -20)
  %50 = call zeroext i8 @ide_read_register(i8 noundef zeroext %.0108, i8 noundef zeroext 7)
  %51 = icmp eq i8 %50, 0
  br i1 %51, label %241, label %.preheader100

.preheader100:                                    ; preds = %44, %55
  %52 = call zeroext i8 @ide_read_register(i8 noundef zeroext %.0108, i8 noundef zeroext 7)
  %53 = zext i8 %52 to i32
  %54 = and i32 %53, 1
  %.not = icmp eq i32 %54, 0
  br i1 %.not, label %55, label %.critedge

55:                                               ; preds = %.preheader100
  %.not90 = icmp slt i8 %52, 0
  %56 = and i32 %53, 8
  %.not91 = icmp eq i32 %56, 0
  %or.cond94 = or i1 %.not90, %.not91
  br i1 %or.cond94, label %.preheader100, label %.loopexit

.critedge:                                        ; preds = %.preheader100
  %57 = call zeroext i8 @ide_read_register(i8 noundef zeroext %.0108, i8 noundef zeroext 4)
  %58 = call zeroext i8 @ide_read_register(i8 noundef zeroext %.0108, i8 noundef zeroext 5)
  %59 = icmp eq i8 %57, 20
  %60 = icmp eq i8 %58, -21
  %or.cond = select i1 %59, i1 %60, i1 false
  br i1 %or.cond, label %.thread, label %61

61:                                               ; preds = %.critedge
  %62 = icmp eq i8 %57, 105
  %63 = icmp eq i8 %58, -106
  %or.cond5 = select i1 %62, i1 %63, i1 false
  br i1 %or.cond5, label %.thread, label %241

.thread:                                          ; preds = %.critedge, %61
  call void @ide_write_register(i8 noundef zeroext %.0108, i8 noundef zeroext 7, i8 noundef zeroext -95)
  br label %.loopexit

.loopexit:                                        ; preds = %55, %.thread
  %.288 = phi i16 [ 1, %.thread ], [ 0, %55 ]
  call void @ide_read_buffer(i8 noundef zeroext %.0108, i8 noundef zeroext 0, ptr noundef nonnull %6, i32 noundef 128)
  store i8 1, ptr %47, align 16, !tbaa !12
  %64 = getelementptr inbounds i8, ptr %47, i64 4
  store i16 %.288, ptr %64, align 4, !tbaa !15
  %65 = getelementptr inbounds i8, ptr %47, i64 1
  store i8 %.0108, ptr %65, align 1, !tbaa !16
  %66 = getelementptr inbounds i8, ptr %47, i64 2
  store i8 %.079106, ptr %66, align 2, !tbaa !17
  %67 = load i16, ptr %6, align 16, !tbaa !18
  %68 = getelementptr inbounds i8, ptr %47, i64 6
  store i16 %67, ptr %68, align 2, !tbaa !19
  %69 = load i16, ptr %13, align 2, !tbaa !18
  %70 = getelementptr inbounds i8, ptr %47, i64 8
  store i16 %69, ptr %70, align 8, !tbaa !20
  %71 = load i32, ptr %14, align 4, !tbaa !21
  %72 = getelementptr inbounds i8, ptr %47, i64 12
  store i32 %71, ptr %72, align 4, !tbaa !22
  %73 = and i32 %71, 67108864
  %.not93 = icmp eq i32 %73, 0
  %..v.sroa.sel.v = select i1 %.not93, i64 120, i64 200
  %..v.sroa.sel = getelementptr inbounds i8, ptr %6, i64 %..v.sroa.sel.v
  %74 = load i32, ptr %..v.sroa.sel, align 8, !tbaa !21
  %75 = getelementptr inbounds i8, ptr %47, i64 16
  store i32 %74, ptr %75, align 16
  %76 = getelementptr inbounds i8, ptr %47, i64 20
  %77 = getelementptr inbounds i8, ptr %47, i64 21
  %78 = getelementptr inbounds i8, ptr %47, i64 22
  %79 = getelementptr inbounds i8, ptr %47, i64 23
  %80 = getelementptr inbounds i8, ptr %47, i64 24
  %81 = getelementptr inbounds i8, ptr %47, i64 25
  %82 = getelementptr inbounds i8, ptr %47, i64 26
  %83 = getelementptr inbounds i8, ptr %47, i64 27
  %84 = getelementptr inbounds i8, ptr %47, i64 28
  %85 = getelementptr inbounds i8, ptr %47, i64 29
  %86 = getelementptr inbounds i8, ptr %47, i64 30
  %87 = getelementptr inbounds i8, ptr %47, i64 31
  %88 = getelementptr inbounds i8, ptr %47, i64 32
  %89 = getelementptr inbounds i8, ptr %47, i64 33
  %90 = getelementptr inbounds i8, ptr %47, i64 34
  %91 = getelementptr inbounds i8, ptr %47, i64 35
  %92 = load <16 x i8>, ptr %15, align 2, !tbaa !23
  %93 = shufflevector <16 x i8> %92, <16 x i8> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
  store <16 x i8> %93, ptr %76, align 4, !tbaa !23
  %94 = load i8, ptr %16, align 1, !tbaa !23
  %95 = getelementptr inbounds i8, ptr %47, i64 36
  store i8 %94, ptr %95, align 4, !tbaa !23
  %96 = load i8, ptr %17, align 2, !tbaa !23
  %97 = getelementptr inbounds i8, ptr %47, i64 37
  store i8 %96, ptr %97, align 1, !tbaa !23
  %98 = load i8, ptr %18, align 1, !tbaa !23
  %99 = getelementptr inbounds i8, ptr %47, i64 38
  store i8 %98, ptr %99, align 2, !tbaa !23
  %100 = load i8, ptr %19, align 8, !tbaa !23
  %101 = getelementptr inbounds i8, ptr %47, i64 39
  store i8 %100, ptr %101, align 1, !tbaa !23
  %102 = load i8, ptr %20, align 1, !tbaa !23
  %103 = getelementptr inbounds i8, ptr %47, i64 40
  store i8 %102, ptr %103, align 8, !tbaa !23
  %104 = load i8, ptr %21, align 2, !tbaa !23
  %105 = getelementptr inbounds i8, ptr %47, i64 41
  store i8 %104, ptr %105, align 1, !tbaa !23
  %106 = load i8, ptr %22, align 1, !tbaa !23
  %107 = getelementptr inbounds i8, ptr %47, i64 42
  store i8 %106, ptr %107, align 2, !tbaa !23
  %108 = load i8, ptr %23, align 4, !tbaa !23
  %109 = getelementptr inbounds i8, ptr %47, i64 43
  store i8 %108, ptr %109, align 1, !tbaa !23
  %110 = load i8, ptr %24, align 1, !tbaa !23
  %111 = getelementptr inbounds i8, ptr %47, i64 44
  store i8 %110, ptr %111, align 4, !tbaa !23
  %112 = load i8, ptr %25, align 2, !tbaa !23
  %113 = getelementptr inbounds i8, ptr %47, i64 45
  store i8 %112, ptr %113, align 1, !tbaa !23
  %114 = load i8, ptr %26, align 1, !tbaa !23
  %115 = getelementptr inbounds i8, ptr %47, i64 46
  store i8 %114, ptr %115, align 2, !tbaa !23
  %116 = load i8, ptr %27, align 16, !tbaa !23
  %117 = getelementptr inbounds i8, ptr %47, i64 47
  store i8 %116, ptr %117, align 1, !tbaa !23
  %118 = load i8, ptr %28, align 1, !tbaa !23
  %119 = getelementptr inbounds i8, ptr %47, i64 48
  store i8 %118, ptr %119, align 16, !tbaa !23
  %120 = load i8, ptr %29, align 2, !tbaa !23
  %121 = getelementptr inbounds i8, ptr %47, i64 49
  store i8 %120, ptr %121, align 1, !tbaa !23
  %122 = load i8, ptr %30, align 1, !tbaa !23
  %123 = getelementptr inbounds i8, ptr %47, i64 50
  store i8 %122, ptr %123, align 2, !tbaa !23
  %124 = load i8, ptr %31, align 4, !tbaa !23
  %125 = getelementptr inbounds i8, ptr %47, i64 51
  store i8 %124, ptr %125, align 1, !tbaa !23
  %126 = load i8, ptr %32, align 1, !tbaa !23
  %127 = getelementptr inbounds i8, ptr %47, i64 52
  store i8 %126, ptr %127, align 4, !tbaa !23
  %128 = load i8, ptr %33, align 2, !tbaa !23
  %129 = getelementptr inbounds i8, ptr %47, i64 53
  store i8 %128, ptr %129, align 1, !tbaa !23
  %130 = load i8, ptr %34, align 1, !tbaa !23
  %131 = getelementptr inbounds i8, ptr %47, i64 54
  store i8 %130, ptr %131, align 2, !tbaa !23
  %132 = load i8, ptr %35, align 8, !tbaa !23
  %133 = getelementptr inbounds i8, ptr %47, i64 55
  store i8 %132, ptr %133, align 1, !tbaa !23
  %134 = load i8, ptr %36, align 1, !tbaa !23
  %135 = getelementptr inbounds i8, ptr %47, i64 56
  store i8 %134, ptr %135, align 8, !tbaa !23
  %136 = load i8, ptr %37, align 2, !tbaa !23
  %137 = getelementptr inbounds i8, ptr %47, i64 57
  store i8 %136, ptr %137, align 1, !tbaa !23
  %138 = load i8, ptr %38, align 1, !tbaa !23
  %139 = getelementptr inbounds i8, ptr %47, i64 58
  store i8 %138, ptr %139, align 2, !tbaa !23
  %140 = load i8, ptr %39, align 4, !tbaa !23
  %141 = getelementptr inbounds i8, ptr %47, i64 59
  store i8 %140, ptr %141, align 1, !tbaa !23
  %142 = getelementptr inbounds i8, ptr %47, i64 60
  store i8 0, ptr %142, align 4, !tbaa !23
  %143 = icmp eq i8 %140, 32
  br i1 %143, label %144, label %239

144:                                              ; preds = %.loopexit
  store i8 0, ptr %141, align 1, !tbaa !23
  %145 = icmp eq i8 %138, 32
  br i1 %145, label %146, label %239

146:                                              ; preds = %144
  store i8 0, ptr %139, align 2, !tbaa !23
  %147 = icmp eq i8 %136, 32
  br i1 %147, label %148, label %239

148:                                              ; preds = %146
  store i8 0, ptr %137, align 1, !tbaa !23
  %149 = icmp eq i8 %134, 32
  br i1 %149, label %150, label %239

150:                                              ; preds = %148
  store i8 0, ptr %135, align 8, !tbaa !23
  %151 = icmp eq i8 %132, 32
  br i1 %151, label %152, label %239

152:                                              ; preds = %150
  store i8 0, ptr %133, align 1, !tbaa !23
  %153 = icmp eq i8 %130, 32
  br i1 %153, label %154, label %239

154:                                              ; preds = %152
  store i8 0, ptr %131, align 2, !tbaa !23
  %155 = icmp eq i8 %128, 32
  br i1 %155, label %156, label %239

156:                                              ; preds = %154
  store i8 0, ptr %129, align 1, !tbaa !23
  %157 = icmp eq i8 %126, 32
  br i1 %157, label %158, label %239

158:                                              ; preds = %156
  store i8 0, ptr %127, align 4, !tbaa !23
  %159 = icmp eq i8 %124, 32
  br i1 %159, label %160, label %239

160:                                              ; preds = %158
  store i8 0, ptr %125, align 1, !tbaa !23
  %161 = icmp eq i8 %122, 32
  br i1 %161, label %162, label %239

162:                                              ; preds = %160
  store i8 0, ptr %123, align 2, !tbaa !23
  %163 = icmp eq i8 %120, 32
  br i1 %163, label %164, label %239

164:                                              ; preds = %162
  store i8 0, ptr %121, align 1, !tbaa !23
  %165 = icmp eq i8 %118, 32
  br i1 %165, label %166, label %239

166:                                              ; preds = %164
  store i8 0, ptr %119, align 16, !tbaa !23
  %167 = icmp eq i8 %116, 32
  br i1 %167, label %168, label %239

168:                                              ; preds = %166
  store i8 0, ptr %117, align 1, !tbaa !23
  %169 = icmp eq i8 %114, 32
  br i1 %169, label %170, label %239

170:                                              ; preds = %168
  store i8 0, ptr %115, align 2, !tbaa !23
  %171 = icmp eq i8 %112, 32
  br i1 %171, label %172, label %239

172:                                              ; preds = %170
  store i8 0, ptr %113, align 1, !tbaa !23
  %173 = icmp eq i8 %110, 32
  br i1 %173, label %174, label %239

174:                                              ; preds = %172
  store i8 0, ptr %111, align 4, !tbaa !23
  %175 = icmp eq i8 %108, 32
  br i1 %175, label %176, label %239

176:                                              ; preds = %174
  store i8 0, ptr %109, align 1, !tbaa !23
  %177 = icmp eq i8 %106, 32
  br i1 %177, label %178, label %239

178:                                              ; preds = %176
  store i8 0, ptr %107, align 2, !tbaa !23
  %179 = icmp eq i8 %104, 32
  br i1 %179, label %180, label %239

180:                                              ; preds = %178
  store i8 0, ptr %105, align 1, !tbaa !23
  %181 = icmp eq i8 %102, 32
  br i1 %181, label %182, label %239

182:                                              ; preds = %180
  store i8 0, ptr %103, align 8, !tbaa !23
  %183 = icmp eq i8 %100, 32
  br i1 %183, label %184, label %239

184:                                              ; preds = %182
  store i8 0, ptr %101, align 1, !tbaa !23
  %185 = icmp eq i8 %98, 32
  br i1 %185, label %186, label %239

186:                                              ; preds = %184
  store i8 0, ptr %99, align 2, !tbaa !23
  %187 = icmp eq i8 %96, 32
  br i1 %187, label %188, label %239

188:                                              ; preds = %186
  store i8 0, ptr %97, align 1, !tbaa !23
  %189 = icmp eq i8 %94, 32
  br i1 %189, label %190, label %239

190:                                              ; preds = %188
  store i8 0, ptr %95, align 4, !tbaa !23
  %191 = load i8, ptr %91, align 1, !tbaa !23
  %192 = icmp eq i8 %191, 32
  br i1 %192, label %193, label %239

193:                                              ; preds = %190
  store i8 0, ptr %91, align 1, !tbaa !23
  %194 = load i8, ptr %90, align 2, !tbaa !23
  %195 = icmp eq i8 %194, 32
  br i1 %195, label %196, label %239

196:                                              ; preds = %193
  store i8 0, ptr %90, align 2, !tbaa !23
  %197 = load i8, ptr %89, align 1, !tbaa !23
  %198 = icmp eq i8 %197, 32
  br i1 %198, label %199, label %239

199:                                              ; preds = %196
  store i8 0, ptr %89, align 1, !tbaa !23
  %200 = load i8, ptr %88, align 16, !tbaa !23
  %201 = icmp eq i8 %200, 32
  br i1 %201, label %202, label %239

202:                                              ; preds = %199
  store i8 0, ptr %88, align 16, !tbaa !23
  %203 = load i8, ptr %87, align 1, !tbaa !23
  %204 = icmp eq i8 %203, 32
  br i1 %204, label %205, label %239

205:                                              ; preds = %202
  store i8 0, ptr %87, align 1, !tbaa !23
  %206 = load i8, ptr %86, align 2, !tbaa !23
  %207 = icmp eq i8 %206, 32
  br i1 %207, label %208, label %239

208:                                              ; preds = %205
  store i8 0, ptr %86, align 2, !tbaa !23
  %209 = load i8, ptr %85, align 1, !tbaa !23
  %210 = icmp eq i8 %209, 32
  br i1 %210, label %211, label %239

211:                                              ; preds = %208
  store i8 0, ptr %85, align 1, !tbaa !23
  %212 = load i8, ptr %84, align 4, !tbaa !23
  %213 = icmp eq i8 %212, 32
  br i1 %213, label %214, label %239

214:                                              ; preds = %211
  store i8 0, ptr %84, align 4, !tbaa !23
  %215 = load i8, ptr %83, align 1, !tbaa !23
  %216 = icmp eq i8 %215, 32
  br i1 %216, label %217, label %239

217:                                              ; preds = %214
  store i8 0, ptr %83, align 1, !tbaa !23
  %218 = load i8, ptr %82, align 2, !tbaa !23
  %219 = icmp eq i8 %218, 32
  br i1 %219, label %220, label %239

220:                                              ; preds = %217
  store i8 0, ptr %82, align 2, !tbaa !23
  %221 = load i8, ptr %81, align 1, !tbaa !23
  %222 = icmp eq i8 %221, 32
  br i1 %222, label %223, label %239

223:                                              ; preds = %220
  store i8 0, ptr %81, align 1, !tbaa !23
  %224 = load i8, ptr %80, align 8, !tbaa !23
  %225 = icmp eq i8 %224, 32
  br i1 %225, label %226, label %239

226:                                              ; preds = %223
  store i8 0, ptr %80, align 8, !tbaa !23
  %227 = load i8, ptr %79, align 1, !tbaa !23
  %228 = icmp eq i8 %227, 32
  br i1 %228, label %229, label %239

229:                                              ; preds = %226
  store i8 0, ptr %79, align 1, !tbaa !23
  %230 = load i8, ptr %78, align 2, !tbaa !23
  %231 = icmp eq i8 %230, 32
  br i1 %231, label %232, label %239

232:                                              ; preds = %229
  store i8 0, ptr %78, align 2, !tbaa !23
  %233 = load i8, ptr %77, align 1, !tbaa !23
  %234 = icmp eq i8 %233, 32
  br i1 %234, label %235, label %239

235:                                              ; preds = %232
  store i8 0, ptr %77, align 1, !tbaa !23
  %236 = load i8, ptr %76, align 4, !tbaa !23
  %237 = icmp eq i8 %236, 32
  br i1 %237, label %238, label %239

238:                                              ; preds = %235
  store i8 0, ptr %76, align 4, !tbaa !23
  br label %239

239:                                              ; preds = %238, %235, %232, %229, %226, %223, %220, %217, %214, %211, %208, %205, %202, %199, %196, %193, %190, %188, %186, %184, %182, %180, %178, %176, %174, %172, %170, %168, %166, %164, %162, %160, %158, %156, %154, %152, %150, %148, %146, %144, %.loopexit
  %240 = add nsw i32 %.185104, 1
  br label %241

241:                                              ; preds = %61, %44, %239
  %.2 = phi i32 [ %240, %239 ], [ %.185104, %44 ], [ %.185104, %61 ]
  br i1 %45, label %44, label %242, !llvm.loop !24

242:                                              ; preds = %241
  br i1 %40, label %.preheader101, label %.preheader, !llvm.loop !26

243:                                              ; preds = %.preheader
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.15, i32 noundef 0) #4
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.16, ptr noundef nonnull getelementptr inbounds (i8, ptr @g_ide_devices, i64 20)) #4
  store ptr @.str.18, ptr %7, align 8, !tbaa !27
  store ptr @.str.19, ptr %41, align 8, !tbaa !27
  %244 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 4), align 4, !tbaa !15
  %245 = zext i16 %244 to i64
  %246 = getelementptr inbounds [2 x ptr], ptr %7, i64 0, i64 %245
  %247 = load ptr, ptr %246, align 8, !tbaa !27
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.17, ptr noundef %247) #4
  %248 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 2), align 2, !tbaa !17
  %249 = zext i8 %248 to i32
  %250 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 1), align 1, !tbaa !16
  %251 = zext i8 %250 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.20, i32 noundef %249, i32 noundef %251) #4
  %252 = load i16, ptr @g_ide_channels, align 16, !tbaa !5
  %253 = zext i16 %252 to i32
  %254 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 2), align 2, !tbaa !10
  %255 = zext i16 %254 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.21, i32 noundef %253, i32 noundef %255) #4
  %256 = load i32, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 16), align 16, !tbaa !29
  %257 = shl i32 %256, 9
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.22, i32 noundef %256, i32 noundef %257) #4
  %258 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 6), align 2, !tbaa !19
  %259 = zext i16 %258 to i32
  %260 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 8), align 8, !tbaa !20
  %261 = zext i16 %260 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.23, i32 noundef %259, i32 noundef %261) #4
  br label %262

262:                                              ; preds = %.preheader, %243
  %263 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 64), align 16, !tbaa !12
  %264 = icmp eq i8 %263, 1
  br i1 %264, label %265, label %284

265:                                              ; preds = %262
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.15, i32 noundef 1) #4
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.16, ptr noundef nonnull getelementptr inbounds (i8, ptr @g_ide_devices, i64 84)) #4
  store ptr @.str.18, ptr %7, align 8, !tbaa !27
  store ptr @.str.19, ptr %41, align 8, !tbaa !27
  %266 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 68), align 4, !tbaa !15
  %267 = zext i16 %266 to i64
  %268 = getelementptr inbounds [2 x ptr], ptr %7, i64 0, i64 %267
  %269 = load ptr, ptr %268, align 8, !tbaa !27
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.17, ptr noundef %269) #4
  %270 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 66), align 2, !tbaa !17
  %271 = zext i8 %270 to i32
  %272 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 65), align 1, !tbaa !16
  %273 = zext i8 %272 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.20, i32 noundef %271, i32 noundef %273) #4
  %274 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 8), align 8, !tbaa !5
  %275 = zext i16 %274 to i32
  %276 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 10), align 2, !tbaa !10
  %277 = zext i16 %276 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.21, i32 noundef %275, i32 noundef %277) #4
  %278 = load i32, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 80), align 16, !tbaa !29
  %279 = shl i32 %278, 9
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.22, i32 noundef %278, i32 noundef %279) #4
  %280 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 70), align 2, !tbaa !19
  %281 = zext i16 %280 to i32
  %282 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 72), align 8, !tbaa !20
  %283 = zext i16 %282 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.23, i32 noundef %281, i32 noundef %283) #4
  br label %284

284:                                              ; preds = %265, %262
  %285 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 128), align 16, !tbaa !12
  %286 = icmp eq i8 %285, 1
  br i1 %286, label %287, label %306

287:                                              ; preds = %284
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.15, i32 noundef 2) #4
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.16, ptr noundef nonnull getelementptr inbounds (i8, ptr @g_ide_devices, i64 148)) #4
  store ptr @.str.18, ptr %7, align 8, !tbaa !27
  store ptr @.str.19, ptr %41, align 8, !tbaa !27
  %288 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 132), align 4, !tbaa !15
  %289 = zext i16 %288 to i64
  %290 = getelementptr inbounds [2 x ptr], ptr %7, i64 0, i64 %289
  %291 = load ptr, ptr %290, align 8, !tbaa !27
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.17, ptr noundef %291) #4
  %292 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 130), align 2, !tbaa !17
  %293 = zext i8 %292 to i32
  %294 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 129), align 1, !tbaa !16
  %295 = zext i8 %294 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.20, i32 noundef %293, i32 noundef %295) #4
  %296 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 16), align 16, !tbaa !5
  %297 = zext i16 %296 to i32
  %298 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 18), align 2, !tbaa !10
  %299 = zext i16 %298 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.21, i32 noundef %297, i32 noundef %299) #4
  %300 = load i32, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 144), align 16, !tbaa !29
  %301 = shl i32 %300, 9
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.22, i32 noundef %300, i32 noundef %301) #4
  %302 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 134), align 2, !tbaa !19
  %303 = zext i16 %302 to i32
  %304 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 136), align 8, !tbaa !20
  %305 = zext i16 %304 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.23, i32 noundef %303, i32 noundef %305) #4
  br label %306

306:                                              ; preds = %287, %284
  %307 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 192), align 16, !tbaa !12
  %308 = icmp eq i8 %307, 1
  br i1 %308, label %309, label %328

309:                                              ; preds = %306
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.15, i32 noundef 3) #4
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.16, ptr noundef nonnull getelementptr inbounds (i8, ptr @g_ide_devices, i64 212)) #4
  store ptr @.str.18, ptr %7, align 8, !tbaa !27
  store ptr @.str.19, ptr %41, align 8, !tbaa !27
  %310 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 196), align 4, !tbaa !15
  %311 = zext i16 %310 to i64
  %312 = getelementptr inbounds [2 x ptr], ptr %7, i64 0, i64 %311
  %313 = load ptr, ptr %312, align 8, !tbaa !27
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.17, ptr noundef %313) #4
  %314 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 194), align 2, !tbaa !17
  %315 = zext i8 %314 to i32
  %316 = load i8, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 193), align 1, !tbaa !16
  %317 = zext i8 %316 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.20, i32 noundef %315, i32 noundef %317) #4
  %318 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 24), align 8, !tbaa !5
  %319 = zext i16 %318 to i32
  %320 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_channels, i64 26), align 2, !tbaa !10
  %321 = zext i16 %320 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.21, i32 noundef %319, i32 noundef %321) #4
  %322 = load i32, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 208), align 16, !tbaa !29
  %323 = shl i32 %322, 9
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.22, i32 noundef %322, i32 noundef %323) #4
  %324 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 198), align 2, !tbaa !19
  %325 = zext i16 %324 to i32
  %326 = load i16, ptr getelementptr inbounds (i8, ptr @g_ide_devices, i64 200), align 8, !tbaa !20
  %327 = zext i16 %326 to i32
  call void (ptr, ...) @printf(ptr noundef nonnull @.str.23, i32 noundef %325, i32 noundef %327) #4
  br label %328

328:                                              ; preds = %309, %306
  call void @llvm.lifetime.end.p0(i64 2048, ptr nonnull %6) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 2, !7, i64 4, !7, i64 6}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 2}
!11 = !{!6, !7, i64 4}
!12 = !{!13, !8, i64 0}
!13 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !7, i64 4, !7, i64 6, !7, i64 8, !14, i64 12, !14, i64 16, !8, i64 20}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !7, i64 4}
!16 = !{!13, !8, i64 1}
!17 = !{!13, !8, i64 2}
!18 = !{!7, !7, i64 0}
!19 = !{!13, !7, i64 6}
!20 = !{!13, !7, i64 8}
!21 = !{!14, !14, i64 0}
!22 = !{!13, !14, i64 12}
!23 = !{!8, !8, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = distinct !{!26, !25}
!27 = !{!28, !28, i64 0}
!28 = !{!"any pointer", !8, i64 0}
!29 = !{!13, !14, i64 16}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass