; LLVM IR from INMOST-DEV/INMOST-FEM :: anifem++/fem/tetdofmap.ll (ZNK3Ani4DofT11UniteDofMap12NumDofsOnTetEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array.2" = type { [6 x i32] }
%"struct.Ani::DofT::UniteDofMap" = type { %"struct.Ani::DofT::BaseDofMap", %"struct.std::array.7", %"struct.std::array.7", %"struct.Ani::DofT::DofSymmetries" }
%"struct.Ani::DofT::BaseDofMap" = type { ptr }
%"struct.std::array.7" = type { [7 x i32] }
%"struct.Ani::DofT::DofSymmetries" = type { %"struct.std::array.6" }
%"struct.std::array.6" = type { [16 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK3Ani4DofT11UniteDofMap12NumDofsOnTetEv(ptr dead_on_unwind noalias writable sret(%"struct.std::array.2") align 4 %0, ptr noundef nonnull align 8 dereferenceable(128) %1) unnamed_addr #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %1, ptr %3, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %26, %2
  %7 = load i32, ptr %4, align 4, !tbaa !9
  %8 = icmp slt i32 %7, 6
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %29

10:                                               ; preds = %6
  %11 = getelementptr inbounds %"struct.Ani::DofT::UniteDofMap", ptr %5, i32 0, i32 2
  %12 = load i32, ptr %4, align 4, !tbaa !9
  %13 = add nsw i32 %12, 1
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %11, i64 noundef %14) #2
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = getelementptr inbounds %"struct.Ani::DofT::UniteDofMap", ptr %5, i32 0, i32 2
  %18 = load i32, ptr %4, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %17, i64 noundef %19) #2
  %21 = load i32, ptr %20, align 4, !tbaa !9
  %22 = sub i32 %16, %21
  %23 = load i32, ptr %4, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef %24) #2
  store i32 %22, ptr %25, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %10
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %4, align 4, !tbaa !9
  br label %6, !llvm.loop !11

29:                                               ; preds = %9
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array.2" = type { [6 x i32] }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK3Ani4DofT11UniteDofMap12NumDofsOnTetEv(ptr dead_on_unwind noalias writable sret(%"struct.std::array.2") align 4 %0, ptr noundef nonnull align 8 dereferenceable(128) %1) unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %1, i64 36
  %4 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 1) #1
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 0) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = sub i32 %5, %7
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 0) #1
  store i32 %8, ptr %9, align 4, !tbaa !5
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 2) #1
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 1) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sub i32 %11, %13
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 1) #1
  store i32 %14, ptr %15, align 4, !tbaa !5
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 3) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 2) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = sub i32 %17, %19
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 2) #1
  store i32 %20, ptr %21, align 4, !tbaa !5
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 4) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 3) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = sub i32 %23, %25
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 3) #1
  store i32 %26, ptr %27, align 4, !tbaa !5
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 5) #1
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 4) #1
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sub i32 %29, %31
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 4) #1
  store i32 %32, ptr %33, align 4, !tbaa !5
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 6) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt5arrayIjLm7EEixEm(ptr noundef nonnull align 4 dereferenceable(28) %3, i64 noundef 5) #1
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sub i32 %35, %37
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIjLm6EEixEm(ptr noundef nonnull align 4 dereferenceable(24) %0, i64 noundef 5) #1
  store i32 %38, ptr %39, align 4, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass