; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Set)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRC_HandleTypeDef = type { ptr, %struct.CRC_InitTypeDef, i32, i32, i32 }
%struct.CRC_InitTypeDef = type { i8, i8, i32, i32, i32, i32, i32 }
%struct.CRC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CRCEx_Polynomial_Set(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 31, ptr %8, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %22, %3
  %10 = load i32, ptr %8, align 4, !tbaa !9
  %11 = add i32 %10, -1
  store i32 %11, ptr %8, align 4, !tbaa !9
  %12 = icmp ugt i32 %10, 0
  br i1 %12, label %13, label %20

13:                                               ; preds = %9
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = and i32 %15, 31
  %17 = shl i32 1, %16
  %18 = and i32 %14, %17
  %19 = icmp eq i32 %18, 0
  br label %20

20:                                               ; preds = %13, %9
  %21 = phi i1 [ false, %9 ], [ %19, %13 ]
  br i1 %21, label %22, label %23

22:                                               ; preds = %20
  br label %9, !llvm.loop !11

23:                                               ; preds = %20
  %24 = load i32, ptr %6, align 4, !tbaa !9
  switch i32 %24, label %40 [
    i32 24, label %25
    i32 16, label %30
    i32 8, label %35
    i32 0, label %41
  ]

25:                                               ; preds = %23
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = icmp uge i32 %26, 7
  br i1 %27, label %28, label %29

28:                                               ; preds = %25
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %28, %25
  br label %41

30:                                               ; preds = %23
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = icmp uge i32 %31, 8
  br i1 %32, label %33, label %34

33:                                               ; preds = %30
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %33, %30
  br label %41

35:                                               ; preds = %23
  %36 = load i32, ptr %8, align 4, !tbaa !9
  %37 = icmp uge i32 %36, 16
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %38, %35
  br label %41

40:                                               ; preds = %23
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %40, %39, %34, %29, %23
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = icmp eq i32 %42, 0
  br i1 %43, label %44, label %65

44:                                               ; preds = %41
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %46, i32 0, i32 0
  %48 = load ptr, ptr %47, align 8, !tbaa !13
  %49 = getelementptr inbounds %struct.CRC_TypeDef, ptr %48, i32 0, i32 5
  store volatile i32 %45, ptr %49, align 4, !tbaa !16
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !13
  %53 = getelementptr inbounds %struct.CRC_TypeDef, ptr %52, i32 0, i32 2
  %54 = load volatile i32, ptr %53, align 4, !tbaa !18
  %55 = zext i32 %54 to i64
  %56 = and i64 %55, -25
  %57 = load i32, ptr %6, align 4, !tbaa !9
  %58 = zext i32 %57 to i64
  %59 = or i64 %56, %58
  %60 = trunc i64 %59 to i32
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !13
  %64 = getelementptr inbounds %struct.CRC_TypeDef, ptr %63, i32 0, i32 2
  store volatile i32 %60, ptr %64, align 4, !tbaa !18
  br label %65

65:                                               ; preds = %44, %41
  %66 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %66
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 0}
!14 = !{!"", !6, i64 0, !15, i64 8, !10, i64 32, !10, i64 36, !10, i64 40}
!15 = !{!"", !7, i64 0, !7, i64 1, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!16 = !{!17, !10, i64 20}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!18 = !{!17, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_CRCEx_Polynomial_Set(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = and i32 %1, 2147418112
  %or.cond50 = icmp eq i32 %4, 0
  br i1 %or.cond50, label %5, label %.critedge, !llvm.loop !5

5:                                                ; preds = %3
  %6 = and i32 %1, 65280
  %or.cond64 = icmp eq i32 %6, 0
  br i1 %or.cond64, label %7, label %.critedge, !llvm.loop !5

7:                                                ; preds = %5
  %8 = and i32 %1, 128
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %.critedge, !llvm.loop !5

10:                                               ; preds = %7
  %11 = and i32 %1, 127
  %or.cond76 = icmp eq i32 %11, 0
  br i1 %or.cond76, label %12, label %.critedge, !llvm.loop !5

12:                                               ; preds = %10
  br label %.critedge

.critedge:                                        ; preds = %12, %10, %7, %5, %3
  %13 = phi i1 [ true, %3 ], [ false, %5 ], [ false, %7 ], [ false, %10 ], [ true, %12 ]
  %14 = phi i1 [ true, %3 ], [ true, %5 ], [ false, %7 ], [ false, %10 ], [ true, %12 ]
  %15 = phi i1 [ true, %3 ], [ true, %5 ], [ true, %7 ], [ false, %10 ], [ true, %12 ]
  %16 = tail call i32 @llvm.fshl.i32(i32 %2, i32 %2, i32 29)
  switch i32 %16, label %.thread22 [
    i32 3, label %17
    i32 2, label %18
    i32 1, label %19
    i32 0, label %.thread
  ]

17:                                               ; preds = %.critedge
  br i1 %15, label %.thread22, label %.thread

18:                                               ; preds = %.critedge
  br i1 %14, label %.thread22, label %.thread

19:                                               ; preds = %.critedge
  br i1 %13, label %.thread22, label %.thread

.thread:                                          ; preds = %.critedge, %18, %17, %19
  %20 = load ptr, ptr %0, align 8, !tbaa !7
  %21 = getelementptr inbounds i8, ptr %20, i64 20
  store volatile i32 %1, ptr %21, align 4, !tbaa !14
  %22 = getelementptr inbounds i8, ptr %20, i64 8
  %23 = load volatile i32, ptr %22, align 4, !tbaa !16
  %24 = and i32 %23, -25
  %25 = or i32 %24, %2
  store volatile i32 %25, ptr %22, align 4, !tbaa !16
  br label %.thread22

.thread22:                                        ; preds = %.critedge, %18, %17, %.thread, %19
  %.01320 = phi i32 [ 0, %.thread ], [ 1, %19 ], [ 1, %17 ], [ 1, %18 ], [ 1, %.critedge ]
  ret i32 %.01320
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshl.i32(i32, i32, i32) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"", !9, i64 0, !12, i64 8, !13, i64 32, !13, i64 36, !13, i64 40}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"", !10, i64 0, !10, i64 1, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20}
!13 = !{!"int", !10, i64 0}
!14 = !{!15, !13, i64 20}
!15 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20}
!16 = !{!15, !13, i64 8}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass