; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CEC_HandleTypeDef = type { ptr, %struct.CEC_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32 }
%struct.CEC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i16, ptr }
%struct.CEC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CEC_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %12, label %6

6:                                                ; preds = %1
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %7, i32 0, i32 1
  %9 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %8, i32 0, i32 9
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = icmp eq ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %6, %1
  store i32 1, ptr %2, align 4
  br label %105

13:                                               ; preds = %6
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %14, i32 0, i32 6
  %16 = load i32, ptr %15, align 8, !tbaa !14
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %22

18:                                               ; preds = %13
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %19, i32 0, i32 5
  store i32 0, ptr %20, align 4, !tbaa !15
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_CEC_MspInit(ptr noundef %21)
  br label %22

22:                                               ; preds = %18, %13
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %23, i32 0, i32 6
  store i32 36, ptr %24, align 8, !tbaa !14
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !16
  %28 = getelementptr inbounds %struct.CEC_TypeDef, ptr %27, i32 0, i32 0
  %29 = load volatile i32, ptr %28, align 4, !tbaa !17
  %30 = zext i32 %29 to i64
  %31 = and i64 %30, -2
  %32 = trunc i64 %31 to i32
  store volatile i32 %32, ptr %28, align 4, !tbaa !17
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %33, i32 0, i32 1
  %35 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %34, i32 0, i32 0
  %36 = load i32, ptr %35, align 8, !tbaa !19
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %37, i32 0, i32 1
  %39 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %38, i32 0, i32 1
  %40 = load i32, ptr %39, align 4, !tbaa !20
  %41 = or i32 %36, %40
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %42, i32 0, i32 1
  %44 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %43, i32 0, i32 2
  %45 = load i32, ptr %44, align 8, !tbaa !21
  %46 = or i32 %41, %45
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %47, i32 0, i32 1
  %49 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %48, i32 0, i32 3
  %50 = load i32, ptr %49, align 4, !tbaa !22
  %51 = or i32 %46, %50
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %52, i32 0, i32 1
  %54 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %53, i32 0, i32 4
  %55 = load i32, ptr %54, align 8, !tbaa !23
  %56 = or i32 %51, %55
  %57 = load ptr, ptr %3, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %57, i32 0, i32 1
  %59 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %58, i32 0, i32 5
  %60 = load i32, ptr %59, align 4, !tbaa !24
  %61 = or i32 %56, %60
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %62, i32 0, i32 1
  %64 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %63, i32 0, i32 6
  %65 = load i32, ptr %64, align 8, !tbaa !25
  %66 = or i32 %61, %65
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %67, i32 0, i32 1
  %69 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %68, i32 0, i32 8
  %70 = load i16, ptr %69, align 8, !tbaa !26
  %71 = zext i16 %70 to i32
  %72 = shl i32 %71, 16
  %73 = or i32 %66, %72
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %74, i32 0, i32 1
  %76 = getelementptr inbounds %struct.CEC_InitTypeDef, ptr %75, i32 0, i32 7
  %77 = load i32, ptr %76, align 4, !tbaa !27
  %78 = or i32 %73, %77
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %79, i32 0, i32 0
  %81 = load ptr, ptr %80, align 8, !tbaa !16
  %82 = getelementptr inbounds %struct.CEC_TypeDef, ptr %81, i32 0, i32 1
  store volatile i32 %78, ptr %82, align 4, !tbaa !28
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %83, i32 0, i32 0
  %85 = load ptr, ptr %84, align 8, !tbaa !16
  %86 = getelementptr inbounds %struct.CEC_TypeDef, ptr %85, i32 0, i32 5
  %87 = load volatile i32, ptr %86, align 4, !tbaa !29
  %88 = zext i32 %87 to i64
  %89 = or i64 %88, 8191
  %90 = trunc i64 %89 to i32
  store volatile i32 %90, ptr %86, align 4, !tbaa !29
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %91, i32 0, i32 0
  %93 = load ptr, ptr %92, align 8, !tbaa !16
  %94 = getelementptr inbounds %struct.CEC_TypeDef, ptr %93, i32 0, i32 0
  %95 = load volatile i32, ptr %94, align 4, !tbaa !17
  %96 = zext i32 %95 to i64
  %97 = or i64 %96, 1
  %98 = trunc i64 %97 to i32
  store volatile i32 %98, ptr %94, align 4, !tbaa !17
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %99, i32 0, i32 8
  store i32 0, ptr %100, align 8, !tbaa !30
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %101, i32 0, i32 6
  store i32 32, ptr %102, align 8, !tbaa !14
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %103, i32 0, i32 7
  store i32 32, ptr %104, align 4, !tbaa !31
  store i32 0, ptr %2, align 4
  br label %105

105:                                              ; preds = %22, %12
  %106 = load i32, ptr %2, align 4
  ret i32 %106
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_CEC_MspInit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 56, !13, i64 64, !13, i64 66, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !13, i64 32, !6, i64 40}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !12, i64 72}
!15 = !{!10, !12, i64 68}
!16 = !{!10, !6, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!19 = !{!10, !12, i64 8}
!20 = !{!10, !12, i64 12}
!21 = !{!10, !12, i64 16}
!22 = !{!10, !12, i64 20}
!23 = !{!10, !12, i64 24}
!24 = !{!10, !12, i64 28}
!25 = !{!10, !12, i64 32}
!26 = !{!10, !13, i64 40}
!27 = !{!10, !12, i64 36}
!28 = !{!18, !12, i64 4}
!29 = !{!18, !12, i64 20}
!30 = !{!10, !12, i64 80}
!31 = !{!10, !12, i64 76}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_CEC_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %32, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %32, label %8

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 72
  %10 = load i32, ptr %9, align 8, !tbaa !13
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %14

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %0, i64 68
  store i32 0, ptr %13, align 4, !tbaa !14
  tail call void @HAL_CEC_MspInit(ptr noundef nonnull %0)
  br label %14

14:                                               ; preds = %12, %8
  %15 = load ptr, ptr %0, align 8, !tbaa !15
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = and i32 %16, -2
  store volatile i32 %17, ptr %15, align 4, !tbaa !16
  %18 = getelementptr inbounds i8, ptr %0, i64 40
  %19 = load i16, ptr %18, align 8, !tbaa !18
  %20 = zext i16 %19 to i32
  %21 = shl nuw i32 %20, 16
  %22 = load <8 x i32>, ptr %4, align 8, !tbaa !19
  %23 = tail call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> %22)
  %op.rdx = or i32 %23, %21
  %24 = getelementptr inbounds i8, ptr %15, i64 4
  store volatile i32 %op.rdx, ptr %24, align 4, !tbaa !20
  %25 = getelementptr inbounds i8, ptr %15, i64 20
  %26 = load volatile i32, ptr %25, align 4, !tbaa !21
  %27 = or i32 %26, 8191
  store volatile i32 %27, ptr %25, align 4, !tbaa !21
  %28 = load volatile i32, ptr %15, align 4, !tbaa !16
  %29 = or i32 %28, 1
  store volatile i32 %29, ptr %15, align 4, !tbaa !16
  %30 = getelementptr inbounds i8, ptr %0, i64 80
  store i32 0, ptr %30, align 8, !tbaa !22
  store i32 32, ptr %9, align 8, !tbaa !13
  %31 = getelementptr inbounds i8, ptr %0, i64 76
  store i32 32, ptr %31, align 4, !tbaa !23
  br label %32

32:                                               ; preds = %1, %3, %14
  %.0 = phi i32 [ 0, %14 ], [ 1, %3 ], [ 1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_CEC_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v8i32(<8 x i32>) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 48}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !12, i64 32, !7, i64 40}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 72}
!14 = !{!6, !11, i64 68}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!18 = !{!6, !12, i64 40}
!19 = !{!11, !11, i64 0}
!20 = !{!17, !11, i64 4}
!21 = !{!17, !11, i64 20}
!22 = !{!6, !11, i64 80}
!23 = !{!6, !11, i64 76}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass