; LLVM IR from b00dle/libpcc :: src/BitVec.ll (ZN6BitVecC2ERKSt6vectorIbSaIbEE8BitCountS5_S5_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.BitVec = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initXE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initYE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initZE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6BitVecC2ERKSt6vectorIbSaIbEE8BitCountS5_S5_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) unnamed_addr #0 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %11 = load ptr, ptr %6, align 8
  %12 = getelementptr inbounds %class.BitVec, ptr %11, i32 0, i32 0
  store ptr null, ptr %12, align 8, !tbaa !11
  %13 = getelementptr inbounds %class.BitVec, ptr %11, i32 0, i32 1
  store ptr null, ptr %13, align 8, !tbaa !13
  %14 = getelementptr inbounds %class.BitVec, ptr %11, i32 0, i32 2
  store ptr null, ptr %14, align 8, !tbaa !14
  %15 = load i32, ptr %8, align 4, !tbaa !9
  call void @_ZN6BitVec5initXE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %15, i64 noundef 0)
  %16 = load i32, ptr %9, align 4, !tbaa !9
  call void @_ZN6BitVec5initYE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %16, i64 noundef 0)
  %17 = load i32, ptr %10, align 4, !tbaa !9
  call void @_ZN6BitVec5initZE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %17, i64 noundef 0)
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZN6BitVec19setFromPackedBitsetERKSt6vectorIbSaIbEE(ptr noundef nonnull align 8 dereferenceable(24) %11, ptr noundef nonnull align 1 %18)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec19setFromPackedBitsetERKSt6vectorIbSaIbEE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS8BitCount", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS6BitVec", !6, i64 0, !6, i64 8, !6, i64 16}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initXE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initYE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec5initZE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6BitVecC2ERKSt6vectorIbSaIbEE8BitCountS5_S5_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) unnamed_addr #0 align 2 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %0, i8 0, i64 24, i1 false)
  tail call void @_ZN6BitVec5initXE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %2, i64 noundef 0)
  tail call void @_ZN6BitVec5initYE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %3, i64 noundef 0)
  tail call void @_ZN6BitVec5initZE8BitCountm(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %4, i64 noundef 0)
  tail call void @_ZN6BitVec19setFromPackedBitsetERKSt6vectorIbSaIbEE(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 %1)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6BitVec19setFromPackedBitsetERKSt6vectorIbSaIbEE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass