; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DeInit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }
%struct.__DMA2D_HandleTypeDef = type { ptr, %struct.DMA2D_InitTypeDef, ptr, ptr, [2 x %struct.DMA2D_LayerCfgTypeDef], i32, i32, i32 }
%struct.DMA2D_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.DMA2D_LayerCfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.DMA2D_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [236 x i32], [256 x i32], [256 x i32] }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_DMA2D_DeInit(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  br label %98

7:                                                ; preds = %1
  %8 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 45), align 4, !tbaa !9
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, 16
  %11 = icmp ne i64 %10, 0
  br i1 %11, label %12, label %60

12:                                               ; preds = %7
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %13, i32 0, i32 0
  %15 = load ptr, ptr %14, align 8, !tbaa !12
  %16 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %15, i32 0, i32 0
  %17 = load volatile i32, ptr %16, align 4, !tbaa !15
  %18 = zext i32 %17 to i64
  %19 = and i64 %18, 1
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %21, label %27

21:                                               ; preds = %12
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = call i32 @HAL_DMA2D_Abort(ptr noundef %22)
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %26

25:                                               ; preds = %21
  store i32 1, ptr %2, align 4
  br label %98

26:                                               ; preds = %21
  br label %59

27:                                               ; preds = %12
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !12
  %31 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %30, i32 0, i32 9
  %32 = load volatile i32, ptr %31, align 4, !tbaa !17
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, 32
  %35 = icmp eq i64 %34, 32
  br i1 %35, label %36, label %42

36:                                               ; preds = %27
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = call i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef %37, i32 noundef 0)
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %36
  store i32 1, ptr %2, align 4
  br label %98

41:                                               ; preds = %36
  br label %58

42:                                               ; preds = %27
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !12
  %46 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %45, i32 0, i32 7
  %47 = load volatile i32, ptr %46, align 4, !tbaa !18
  %48 = zext i32 %47 to i64
  %49 = and i64 %48, 32
  %50 = icmp eq i64 %49, 32
  br i1 %50, label %51, label %57

51:                                               ; preds = %42
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = call i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef %52, i32 noundef 1)
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %51
  store i32 1, ptr %2, align 4
  br label %98

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %56, %42
  br label %58

58:                                               ; preds = %57, %41
  br label %59

59:                                               ; preds = %58, %26
  br label %60

60:                                               ; preds = %59, %7
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !12
  %64 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %63, i32 0, i32 0
  store volatile i32 0, ptr %64, align 4, !tbaa !15
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %65, i32 0, i32 0
  %67 = load ptr, ptr %66, align 8, !tbaa !12
  %68 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %67, i32 0, i32 2
  store volatile i32 63, ptr %68, align 4, !tbaa !19
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %69, i32 0, i32 0
  %71 = load ptr, ptr %70, align 8, !tbaa !12
  %72 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %71, i32 0, i32 4
  store volatile i32 0, ptr %72, align 4, !tbaa !20
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %73, i32 0, i32 0
  %75 = load ptr, ptr %74, align 8, !tbaa !12
  %76 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %75, i32 0, i32 6
  store volatile i32 0, ptr %76, align 4, !tbaa !21
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %77, i32 0, i32 0
  %79 = load ptr, ptr %78, align 8, !tbaa !12
  %80 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %79, i32 0, i32 7
  store volatile i32 0, ptr %80, align 4, !tbaa !18
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %81, i32 0, i32 0
  %83 = load ptr, ptr %82, align 8, !tbaa !12
  %84 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %83, i32 0, i32 9
  store volatile i32 0, ptr %84, align 4, !tbaa !17
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %85, i32 0, i32 0
  %87 = load ptr, ptr %86, align 8, !tbaa !12
  %88 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %87, i32 0, i32 13
  store volatile i32 0, ptr %88, align 4, !tbaa !22
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_DMA2D_MspDeInit(ptr noundef %89)
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %90, i32 0, i32 7
  store volatile i32 0, ptr %91, align 8, !tbaa !23
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %92, i32 0, i32 6
  store volatile i32 0, ptr %93, align 4, !tbaa !24
  br label %94

94:                                               ; preds = %60
  %95 = load ptr, ptr %3, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %95, i32 0, i32 5
  store i32 0, ptr %96, align 8, !tbaa !25
  br label %97

97:                                               ; preds = %94
  store i32 0, ptr %2, align 4
  br label %98

98:                                               ; preds = %97, %55, %40, %25, %6
  %99 = load i32, ptr %2, align 4
  ret i32 %99
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_DMA2D_Abort(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DMA2D_MspDeInit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 212}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !7, i64 172, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !11, i64 232, !11, i64 236, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !11, i64 284, !7, i64 288}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"__DMA2D_HandleTypeDef", !6, i64 0, !14, i64 8, !6, i64 32, !6, i64 40, !7, i64 48, !11, i64 104, !11, i64 108, !11, i64 112}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !7, i64 80, !7, i64 1024, !7, i64 2048}
!17 = !{!16, !11, i64 36}
!18 = !{!16, !11, i64 28}
!19 = !{!16, !11, i64 8}
!20 = !{!16, !11, i64 16}
!21 = !{!16, !11, i64 24}
!22 = !{!16, !11, i64 52}
!23 = !{!13, !11, i64 112}
!24 = !{!13, !11, i64 108}
!25 = !{!13, !11, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_DMA2D_DeInit(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %35, label %3

3:                                                ; preds = %1
  %4 = load volatile i32, ptr inttoptr (i64 1476543700 to ptr), align 4, !tbaa !5
  %5 = and i32 %4, 16
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %24, label %6

6:                                                ; preds = %3
  %7 = load ptr, ptr %0, align 8, !tbaa !10
  %8 = load volatile i32, ptr %7, align 4, !tbaa !14
  %9 = and i32 %8, 1
  %.not19 = icmp eq i32 %9, 0
  br i1 %.not19, label %12, label %10

10:                                               ; preds = %6
  %11 = tail call i32 @HAL_DMA2D_Abort(ptr noundef nonnull %0)
  %.not24 = icmp eq i32 %11, 0
  br i1 %.not24, label %24, label %35

12:                                               ; preds = %6
  %13 = getelementptr inbounds i8, ptr %7, i64 36
  %14 = load volatile i32, ptr %13, align 4, !tbaa !16
  %15 = and i32 %14, 32
  %.not20 = icmp eq i32 %15, 0
  br i1 %.not20, label %18, label %16

16:                                               ; preds = %12
  %17 = tail call i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef nonnull %0, i32 noundef 0)
  %.not23 = icmp eq i32 %17, 0
  br i1 %.not23, label %24, label %35

18:                                               ; preds = %12
  %19 = getelementptr inbounds i8, ptr %7, i64 28
  %20 = load volatile i32, ptr %19, align 4, !tbaa !17
  %21 = and i32 %20, 32
  %.not21 = icmp eq i32 %21, 0
  br i1 %.not21, label %24, label %22

22:                                               ; preds = %18
  %23 = tail call i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef nonnull %0, i32 noundef 1)
  %.not22 = icmp eq i32 %23, 0
  br i1 %.not22, label %24, label %35

24:                                               ; preds = %10, %18, %22, %16, %3
  %25 = load ptr, ptr %0, align 8, !tbaa !10
  store volatile i32 0, ptr %25, align 4, !tbaa !14
  %26 = getelementptr inbounds i8, ptr %25, i64 8
  store volatile i32 63, ptr %26, align 4, !tbaa !18
  %27 = getelementptr inbounds i8, ptr %25, i64 16
  store volatile i32 0, ptr %27, align 4, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %25, i64 24
  store volatile i32 0, ptr %28, align 4, !tbaa !20
  %29 = getelementptr inbounds i8, ptr %25, i64 28
  store volatile i32 0, ptr %29, align 4, !tbaa !17
  %30 = getelementptr inbounds i8, ptr %25, i64 36
  store volatile i32 0, ptr %30, align 4, !tbaa !16
  %31 = getelementptr inbounds i8, ptr %25, i64 52
  store volatile i32 0, ptr %31, align 4, !tbaa !21
  tail call void @HAL_DMA2D_MspDeInit(ptr noundef nonnull %0)
  %32 = getelementptr inbounds i8, ptr %0, i64 112
  store volatile i32 0, ptr %32, align 8, !tbaa !22
  %33 = getelementptr inbounds i8, ptr %0, i64 108
  store volatile i32 0, ptr %33, align 4, !tbaa !23
  %34 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 0, ptr %34, align 8, !tbaa !24
  br label %35

35:                                               ; preds = %22, %16, %10, %1, %24
  %.0 = phi i32 [ 0, %24 ], [ 1, %1 ], [ 1, %10 ], [ 1, %16 ], [ 1, %22 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_DMA2D_Abort(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_DMA2D_CLUTLoading_Abort(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DMA2D_MspDeInit(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 212}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"__DMA2D_HandleTypeDef", !12, i64 0, !13, i64 8, !12, i64 32, !12, i64 40, !8, i64 48, !7, i64 104, !7, i64 108, !7, i64 112}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16}
!14 = !{!15, !7, i64 0}
!15 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !8, i64 80, !8, i64 1024, !8, i64 2048}
!16 = !{!15, !7, i64 36}
!17 = !{!15, !7, i64 28}
!18 = !{!15, !7, i64 8}
!19 = !{!15, !7, i64 16}
!20 = !{!15, !7, i64 24}
!21 = !{!15, !7, i64 52}
!22 = !{!11, !7, i64 112}
!23 = !{!11, !7, i64 108}
!24 = !{!11, !7, i64 104}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass