; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/MAR2021-Long/RWALKS.ll (Z2pwii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z2pwii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %35, %2
  %8 = load i32, ptr %6, align 4, !tbaa !5
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = icmp sle i32 %8, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %38

12:                                               ; preds = %7
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = and i32 %13, %14
  %16 = icmp ne i32 %15, 0
  br i1 %16, label %17, label %26

17:                                               ; preds = %12
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = mul nsw i64 1, %19
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = mul nsw i64 %20, %22
  %24 = srem i64 %23, 1000000007
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %5, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %17, %12
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 1, %28
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = mul nsw i64 %29, %31
  %33 = srem i64 %32, 1000000007
  %34 = trunc i64 %33 to i32
  store i32 %34, ptr %3, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %26
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = shl i32 %36, 1
  store i32 %37, ptr %6, align 4, !tbaa !5
  br label %7, !llvm.loop !9

38:                                               ; preds = %11
  %39 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %39
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 -1000000006, 1000000007) i32 @_Z2pwii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not14 = icmp slt i32 %1, 1
  br i1 %.not14, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %10, %2
  %.010.lcssa = phi i32 [ 1, %2 ], [ %.1, %10 ]
  ret i32 %.010.lcssa

.lr.ph:                                           ; preds = %2, %10
  %.017 = phi i32 [ %14, %10 ], [ 1, %2 ]
  %.01016 = phi i32 [ %.1, %10 ], [ 1, %2 ]
  %.01115 = phi i32 [ %13, %10 ], [ %0, %2 ]
  %3 = and i32 %.017, %1
  %.not13 = icmp eq i32 %3, 0
  br i1 %.not13, label %.lr.ph._crit_edge, label %4

.lr.ph._crit_edge:                                ; preds = %.lr.ph
  %.pre = sext i32 %.01115 to i64
  br label %10

4:                                                ; preds = %.lr.ph
  %5 = sext i32 %.01016 to i64
  %6 = sext i32 %.01115 to i64
  %7 = mul nsw i64 %5, %6
  %8 = srem i64 %7, 1000000007
  %9 = trunc nsw i64 %8 to i32
  br label %10

10:                                               ; preds = %.lr.ph._crit_edge, %4
  %.pre-phi = phi i64 [ %.pre, %.lr.ph._crit_edge ], [ %6, %4 ]
  %.1 = phi i32 [ %.01016, %.lr.ph._crit_edge ], [ %9, %4 ]
  %11 = mul nsw i64 %.pre-phi, %.pre-phi
  %12 = urem i64 %11, 1000000007
  %13 = trunc nuw nsw i64 %12 to i32
  %14 = shl i32 %.017, 1
  %.not = icmp sgt i32 %14, %1
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass