; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (AbortReceive)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IRDA_HandleTypeDef = type { ptr, %struct.IRDA_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, ptr, ptr, i32, i32, i32, i32 }
%struct.IRDA_InitTypeDef = type { i32, i32, i32, i32, i8, i16, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

declare i32 @HAL_DMA_Abort(ptr noundef) #0

declare i32 @HAL_DMA_GetError(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_IRDA_AbortReceive(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %4, i32 0, i32 0
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  %7 = getelementptr inbounds %struct.USART_TypeDef, ptr %6, i32 0, i32 0
  %8 = load volatile i32, ptr %7, align 4, !tbaa !14
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, -289
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr %7, align 4, !tbaa !14
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !9
  %15 = getelementptr inbounds %struct.USART_TypeDef, ptr %14, i32 0, i32 2
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, -2
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr %15, align 4, !tbaa !16
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %20, i32 0, i32 0
  %22 = load ptr, ptr %21, align 8, !tbaa !9
  %23 = getelementptr inbounds %struct.USART_TypeDef, ptr %22, i32 0, i32 2
  %24 = load volatile i32, ptr %23, align 4, !tbaa !16
  %25 = zext i32 %24 to i64
  %26 = and i64 %25, 64
  %27 = icmp eq i64 %26, 64
  br i1 %27, label %28, label %63

28:                                               ; preds = %1
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !9
  %32 = getelementptr inbounds %struct.USART_TypeDef, ptr %31, i32 0, i32 2
  %33 = load volatile i32, ptr %32, align 4, !tbaa !16
  %34 = zext i32 %33 to i64
  %35 = and i64 %34, -65
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr %32, align 4, !tbaa !16
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %37, i32 0, i32 10
  %39 = load ptr, ptr %38, align 8, !tbaa !17
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %62

41:                                               ; preds = %28
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %42, i32 0, i32 10
  %44 = load ptr, ptr %43, align 8, !tbaa !17
  %45 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %44, i32 0, i32 10
  store ptr null, ptr %45, align 8, !tbaa !18
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %46, i32 0, i32 10
  %48 = load ptr, ptr %47, align 8, !tbaa !17
  %49 = call i32 @HAL_DMA_Abort(ptr noundef %48)
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %51, label %61

51:                                               ; preds = %41
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %52, i32 0, i32 10
  %54 = load ptr, ptr %53, align 8, !tbaa !17
  %55 = call i32 @HAL_DMA_GetError(ptr noundef %54)
  %56 = icmp eq i32 %55, 32
  br i1 %56, label %57, label %60

57:                                               ; preds = %51
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %58, i32 0, i32 14
  store volatile i32 16, ptr %59, align 4, !tbaa !20
  store i32 3, ptr %2, align 4
  br label %72

60:                                               ; preds = %51
  br label %61

61:                                               ; preds = %60, %41
  br label %62

62:                                               ; preds = %61, %28
  br label %63

63:                                               ; preds = %62, %1
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %64, i32 0, i32 7
  store volatile i16 0, ptr %65, align 2, !tbaa !21
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %66, i32 0, i32 0
  %68 = load ptr, ptr %67, align 8, !tbaa !9
  %69 = getelementptr inbounds %struct.USART_TypeDef, ptr %68, i32 0, i32 8
  store volatile i32 15, ptr %69, align 4, !tbaa !22
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.IRDA_HandleTypeDef, ptr %70, i32 0, i32 13
  store volatile i32 32, ptr %71, align 8, !tbaa !23
  store i32 0, ptr %2, align 4
  br label %72

72:                                               ; preds = %63, %57
  %73 = load i32, ptr %2, align 4
  ret i32 %73
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 32, !13, i64 40, !13, i64 42, !6, i64 48, !13, i64 56, !13, i64 58, !13, i64 60, !6, i64 64, !6, i64 72, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !7, i64 16, !13, i64 18, !12, i64 20}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!16 = !{!15, !12, i64 8}
!17 = !{!10, !6, i64 72}
!18 = !{!19, !6, i64 112}
!19 = !{!"__DMA_HandleTypeDef", !6, i64 0, !15, i64 8, !12, i64 56, !12, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !6, i64 160, !6, i64 168, !12, i64 176}
!20 = !{!10, !12, i64 92}
!21 = !{!10, !13, i64 58}
!22 = !{!15, !12, i64 32}
!23 = !{!10, !12, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_DMA_Abort(ptr noundef) local_unnamed_addr #0

declare i32 @HAL_DMA_GetError(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_IRDA_AbortReceive(ptr noundef %0) local_unnamed_addr #1 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = load volatile i32, ptr %2, align 4, !tbaa !13
  %4 = and i32 %3, -289
  store volatile i32 %4, ptr %2, align 4, !tbaa !13
  %5 = getelementptr inbounds i8, ptr %2, i64 8
  %6 = load volatile i32, ptr %5, align 4, !tbaa !15
  %7 = and i32 %6, -2
  store volatile i32 %7, ptr %5, align 4, !tbaa !15
  %8 = load volatile i32, ptr %5, align 4, !tbaa !15
  %9 = and i32 %8, 64
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %24, label %10

10:                                               ; preds = %1
  %11 = load volatile i32, ptr %5, align 4, !tbaa !15
  %12 = and i32 %11, -65
  store volatile i32 %12, ptr %5, align 4, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %0, i64 72
  %14 = load ptr, ptr %13, align 8, !tbaa !16
  %.not13 = icmp eq ptr %14, null
  br i1 %.not13, label %24, label %15

15:                                               ; preds = %10
  %16 = getelementptr inbounds i8, ptr %14, i64 112
  store ptr null, ptr %16, align 8, !tbaa !17
  %17 = tail call i32 @HAL_DMA_Abort(ptr noundef nonnull %14) #2
  %.not14 = icmp eq i32 %17, 0
  br i1 %.not14, label %24, label %18

18:                                               ; preds = %15
  %19 = load ptr, ptr %13, align 8, !tbaa !16
  %20 = tail call i32 @HAL_DMA_GetError(ptr noundef %19) #2
  %21 = icmp eq i32 %20, 32
  br i1 %21, label %22, label %24

22:                                               ; preds = %18
  %23 = getelementptr inbounds i8, ptr %0, i64 92
  store volatile i32 16, ptr %23, align 4, !tbaa !19
  br label %29

24:                                               ; preds = %10, %18, %15, %1
  %25 = getelementptr inbounds i8, ptr %0, i64 58
  store volatile i16 0, ptr %25, align 2, !tbaa !20
  %26 = load ptr, ptr %0, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i64 32
  store volatile i32 15, ptr %27, align 4, !tbaa !21
  %28 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 32, ptr %28, align 8, !tbaa !22
  br label %29

29:                                               ; preds = %24, %22
  %.0 = phi i32 [ 3, %22 ], [ 0, %24 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 32, !12, i64 40, !12, i64 42, !7, i64 48, !12, i64 56, !12, i64 58, !12, i64 60, !7, i64 64, !7, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !8, i64 16, !12, i64 18, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!15 = !{!14, !11, i64 8}
!16 = !{!6, !7, i64 72}
!17 = !{!18, !7, i64 112}
!18 = !{!"__DMA_HandleTypeDef", !7, i64 0, !14, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!19 = !{!6, !11, i64 92}
!20 = !{!6, !12, i64 58}
!21 = !{!14, !11, i64 32}
!22 = !{!6, !11, i64 88}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass