; LLVM IR from Smorodov/Multitarget-tracker :: src/Detector/darknet/src (cpu_gemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_nn(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_nt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_tn(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_tt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @cpu_gemm(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12) #0 {
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca float, align 4
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca float, align 4
  %25 = alloca ptr, align 8
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  store i32 %0, ptr %14, align 4, !tbaa !5
  store i32 %1, ptr %15, align 4, !tbaa !5
  store i32 %2, ptr %16, align 4, !tbaa !5
  store i32 %3, ptr %17, align 4, !tbaa !5
  store i32 %4, ptr %18, align 4, !tbaa !5
  store float %5, ptr %19, align 4, !tbaa !9
  store ptr %6, ptr %20, align 8, !tbaa !11
  store i32 %7, ptr %21, align 4, !tbaa !5
  store ptr %8, ptr %22, align 8, !tbaa !11
  store i32 %9, ptr %23, align 4, !tbaa !5
  store float %10, ptr %24, align 4, !tbaa !9
  store ptr %11, ptr %25, align 8, !tbaa !11
  store i32 %12, ptr %26, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #2
  store i32 0, ptr %27, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %54, %13
  %30 = load i32, ptr %27, align 4, !tbaa !5
  %31 = load i32, ptr %16, align 4, !tbaa !5
  %32 = icmp slt i32 %30, %31
  br i1 %32, label %33, label %57

33:                                               ; preds = %29
  store i32 0, ptr %28, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %50, %33
  %35 = load i32, ptr %28, align 4, !tbaa !5
  %36 = load i32, ptr %17, align 4, !tbaa !5
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %38, label %53

38:                                               ; preds = %34
  %39 = load float, ptr %24, align 4, !tbaa !9
  %40 = load ptr, ptr %25, align 8, !tbaa !11
  %41 = load i32, ptr %27, align 4, !tbaa !5
  %42 = load i32, ptr %26, align 4, !tbaa !5
  %43 = mul nsw i32 %41, %42
  %44 = load i32, ptr %28, align 4, !tbaa !5
  %45 = add nsw i32 %43, %44
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds float, ptr %40, i64 %46
  %48 = load float, ptr %47, align 4, !tbaa !9
  %49 = fmul float %48, %39
  store float %49, ptr %47, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %38
  %51 = load i32, ptr %28, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %28, align 4, !tbaa !5
  br label %34, !llvm.loop !13

53:                                               ; preds = %34
  br label %54

54:                                               ; preds = %53
  %55 = load i32, ptr %27, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %27, align 4, !tbaa !5
  br label %29, !llvm.loop !15

57:                                               ; preds = %29
  %58 = load i32, ptr %14, align 4, !tbaa !5
  %59 = icmp ne i32 %58, 0
  br i1 %59, label %77, label %60

60:                                               ; preds = %57
  %61 = load i32, ptr %15, align 4, !tbaa !5
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %77, label %63

63:                                               ; preds = %60
  %64 = load i32, ptr %14, align 4, !tbaa !5
  %65 = load i32, ptr %15, align 4, !tbaa !5
  %66 = load i32, ptr %16, align 4, !tbaa !5
  %67 = load i32, ptr %17, align 4, !tbaa !5
  %68 = load i32, ptr %18, align 4, !tbaa !5
  %69 = load float, ptr %19, align 4, !tbaa !9
  %70 = load ptr, ptr %20, align 8, !tbaa !11
  %71 = load i32, ptr %21, align 4, !tbaa !5
  %72 = load ptr, ptr %22, align 8, !tbaa !11
  %73 = load i32, ptr %23, align 4, !tbaa !5
  %74 = load float, ptr %24, align 4, !tbaa !9
  %75 = load ptr, ptr %25, align 8, !tbaa !11
  %76 = load i32, ptr %26, align 4, !tbaa !5
  call void @cpu_gemm_nn(i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef %67, i32 noundef %68, float noundef %69, ptr noundef %70, i32 noundef %71, ptr noundef %72, i32 noundef %73, float noundef %74, ptr noundef %75, i32 noundef %76)
  br label %133

77:                                               ; preds = %60, %57
  %78 = load i32, ptr %14, align 4, !tbaa !5
  %79 = icmp ne i32 %78, 0
  br i1 %79, label %80, label %97

80:                                               ; preds = %77
  %81 = load i32, ptr %15, align 4, !tbaa !5
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %97, label %83

83:                                               ; preds = %80
  %84 = load i32, ptr %14, align 4, !tbaa !5
  %85 = load i32, ptr %15, align 4, !tbaa !5
  %86 = load i32, ptr %16, align 4, !tbaa !5
  %87 = load i32, ptr %17, align 4, !tbaa !5
  %88 = load i32, ptr %18, align 4, !tbaa !5
  %89 = load float, ptr %19, align 4, !tbaa !9
  %90 = load ptr, ptr %20, align 8, !tbaa !11
  %91 = load i32, ptr %21, align 4, !tbaa !5
  %92 = load ptr, ptr %22, align 8, !tbaa !11
  %93 = load i32, ptr %23, align 4, !tbaa !5
  %94 = load float, ptr %24, align 4, !tbaa !9
  %95 = load ptr, ptr %25, align 8, !tbaa !11
  %96 = load i32, ptr %26, align 4, !tbaa !5
  call void @cpu_gemm_tn(i32 noundef %84, i32 noundef %85, i32 noundef %86, i32 noundef %87, i32 noundef %88, float noundef %89, ptr noundef %90, i32 noundef %91, ptr noundef %92, i32 noundef %93, float noundef %94, ptr noundef %95, i32 noundef %96)
  br label %132

97:                                               ; preds = %80, %77
  %98 = load i32, ptr %14, align 4, !tbaa !5
  %99 = icmp ne i32 %98, 0
  br i1 %99, label %117, label %100

100:                                              ; preds = %97
  %101 = load i32, ptr %15, align 4, !tbaa !5
  %102 = icmp ne i32 %101, 0
  br i1 %102, label %103, label %117

103:                                              ; preds = %100
  %104 = load i32, ptr %14, align 4, !tbaa !5
  %105 = load i32, ptr %15, align 4, !tbaa !5
  %106 = load i32, ptr %16, align 4, !tbaa !5
  %107 = load i32, ptr %17, align 4, !tbaa !5
  %108 = load i32, ptr %18, align 4, !tbaa !5
  %109 = load float, ptr %19, align 4, !tbaa !9
  %110 = load ptr, ptr %20, align 8, !tbaa !11
  %111 = load i32, ptr %21, align 4, !tbaa !5
  %112 = load ptr, ptr %22, align 8, !tbaa !11
  %113 = load i32, ptr %23, align 4, !tbaa !5
  %114 = load float, ptr %24, align 4, !tbaa !9
  %115 = load ptr, ptr %25, align 8, !tbaa !11
  %116 = load i32, ptr %26, align 4, !tbaa !5
  call void @cpu_gemm_nt(i32 noundef %104, i32 noundef %105, i32 noundef %106, i32 noundef %107, i32 noundef %108, float noundef %109, ptr noundef %110, i32 noundef %111, ptr noundef %112, i32 noundef %113, float noundef %114, ptr noundef %115, i32 noundef %116)
  br label %131

117:                                              ; preds = %100, %97
  %118 = load i32, ptr %14, align 4, !tbaa !5
  %119 = load i32, ptr %15, align 4, !tbaa !5
  %120 = load i32, ptr %16, align 4, !tbaa !5
  %121 = load i32, ptr %17, align 4, !tbaa !5
  %122 = load i32, ptr %18, align 4, !tbaa !5
  %123 = load float, ptr %19, align 4, !tbaa !9
  %124 = load ptr, ptr %20, align 8, !tbaa !11
  %125 = load i32, ptr %21, align 4, !tbaa !5
  %126 = load ptr, ptr %22, align 8, !tbaa !11
  %127 = load i32, ptr %23, align 4, !tbaa !5
  %128 = load float, ptr %24, align 4, !tbaa !9
  %129 = load ptr, ptr %25, align 8, !tbaa !11
  %130 = load i32, ptr %26, align 4, !tbaa !5
  call void @cpu_gemm_tt(i32 noundef %118, i32 noundef %119, i32 noundef %120, i32 noundef %121, i32 noundef %122, float noundef %123, ptr noundef %124, i32 noundef %125, ptr noundef %126, i32 noundef %127, float noundef %128, ptr noundef %129, i32 noundef %130)
  br label %131

131:                                              ; preds = %117, %103
  br label %132

132:                                              ; preds = %131, %83
  br label %133

133:                                              ; preds = %132, %63
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #2
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_nn(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_nt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_tn(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @cpu_gemm_tt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, float noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @cpu_gemm(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12) local_unnamed_addr #0 {
  %14 = icmp sgt i32 %2, 0
  %15 = icmp sgt i32 %3, 0
  %or.cond = and i1 %14, %15
  br i1 %or.cond, label %.preheader.us.preheader, label %._crit_edge81

.preheader.us.preheader:                          ; preds = %13
  %16 = sext i32 %12 to i64
  %wide.trip.count87 = zext nneg i32 %2 to i64
  %wide.trip.count = zext nneg i32 %3 to i64
  %min.iters.check = icmp ult i32 %3, 8
  %n.vec = and i64 %wide.trip.count, 2147483640
  %broadcast.splatinsert = insertelement <4 x float> poison, float %10, i64 0
  %broadcast.splat = shufflevector <4 x float> %broadcast.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv84 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next85, %._crit_edge.us ]
  %17 = mul nsw i64 %indvars.iv84, %16
  %invariant.gep = getelementptr float, ptr %11, i64 %17
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader.us ]
  %18 = getelementptr float, ptr %invariant.gep, i64 %index
  %19 = getelementptr i8, ptr %18, i64 16
  %wide.load = load <4 x float>, ptr %18, align 4, !tbaa !5
  %wide.load89 = load <4 x float>, ptr %19, align 4, !tbaa !5
  %20 = fmul <4 x float> %wide.load, %broadcast.splat
  %21 = fmul <4 x float> %wide.load89, %broadcast.splat
  store <4 x float> %20, ptr %18, align 4, !tbaa !5
  store <4 x float> %21, ptr %19, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %22 = icmp eq i64 %index.next, %n.vec
  br i1 %22, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %._crit_edge.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us
  %indvars.iv.ph = phi i64 [ 0, %.preheader.us ], [ %n.vec, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %gep = getelementptr float, ptr %invariant.gep, i64 %indvars.iv
  %23 = load float, ptr %gep, align 4, !tbaa !5
  %24 = fmul float %23, %10
  store float %24, ptr %gep, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.us, label %scalar.ph, !llvm.loop !13

._crit_edge.us:                                   ; preds = %scalar.ph, %middle.block
  %indvars.iv.next85 = add nuw nsw i64 %indvars.iv84, 1
  %exitcond88.not = icmp eq i64 %indvars.iv.next85, %wide.trip.count87
  br i1 %exitcond88.not, label %._crit_edge81, label %.preheader.us, !llvm.loop !14

._crit_edge81:                                    ; preds = %._crit_edge.us, %13
  %25 = icmp ne i32 %1, 0
  %26 = or i32 %1, %0
  %or.cond.not = icmp eq i32 %26, 0
  br i1 %or.cond.not, label %27, label %28

27:                                               ; preds = %._crit_edge81
  tail call void @cpu_gemm_nn(i32 noundef 0, i32 noundef 0, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12)
  br label %34

28:                                               ; preds = %._crit_edge81
  %29 = icmp eq i32 %0, 0
  %or.cond3 = or i1 %29, %25
  br i1 %or.cond3, label %31, label %30

30:                                               ; preds = %28
  tail call void @cpu_gemm_tn(i32 noundef %0, i32 noundef 0, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12)
  br label %34

31:                                               ; preds = %28
  %or.cond5 = and i1 %29, %25
  br i1 %or.cond5, label %32, label %33

32:                                               ; preds = %31
  tail call void @cpu_gemm_nt(i32 noundef 0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12)
  br label %34

33:                                               ; preds = %31
  tail call void @cpu_gemm_tt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12)
  br label %34

34:                                               ; preds = %30, %33, %32, %27
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass