; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SPDIFRX_HandleTypeDef = type { ptr, %struct.SPDIFRX_InitTypeDef, ptr, ptr, i16, i16, i16, i16, ptr, ptr, i32, i32, i32 }
%struct.SPDIFRX_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SPDIFRX_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

@SystemCoreClock = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SPDIFRX_ReceiveDataFlow_DMA(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %11 = load i32, ptr @SystemCoreClock, align 4, !tbaa !11
  %12 = udiv i32 %11, 24
  %13 = udiv i32 %12, 1000
  %14 = mul i32 65535, %13
  store i32 %14, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %15, i32 0, i32 11
  %17 = load volatile i32, ptr %16, align 4, !tbaa !13
  store i32 %17, ptr %9, align 4, !tbaa !11
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = icmp eq ptr %18, null
  br i1 %19, label %24, label %20

20:                                               ; preds = %3
  %21 = load i16, ptr %7, align 2, !tbaa !9
  %22 = zext i16 %21 to i32
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %20, %3
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

25:                                               ; preds = %20
  %26 = load i32, ptr %9, align 4, !tbaa !11
  %27 = icmp eq i32 %26, 1
  br i1 %27, label %31, label %28

28:                                               ; preds = %25
  %29 = load i32, ptr %9, align 4, !tbaa !11
  %30 = icmp eq i32 %29, 4
  br i1 %30, label %31, label %195

31:                                               ; preds = %28, %25
  br label %32

32:                                               ; preds = %31
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %33, i32 0, i32 10
  %35 = load volatile i32, ptr %34, align 8, !tbaa !16
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %37, label %38

37:                                               ; preds = %32
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

38:                                               ; preds = %32
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %39, i32 0, i32 10
  store volatile i32 1, ptr %40, align 8, !tbaa !16
  br label %41

41:                                               ; preds = %38
  br label %42

42:                                               ; preds = %41
  br label %43

43:                                               ; preds = %42
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %45, i32 0, i32 2
  store ptr %44, ptr %46, align 8, !tbaa !17
  %47 = load i16, ptr %7, align 2, !tbaa !9
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %48, i32 0, i32 4
  store volatile i16 %47, ptr %49, align 8, !tbaa !18
  %50 = load i16, ptr %7, align 2, !tbaa !9
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %51, i32 0, i32 5
  store volatile i16 %50, ptr %52, align 2, !tbaa !19
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %53, i32 0, i32 12
  store volatile i32 0, ptr %54, align 8, !tbaa !20
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %55, i32 0, i32 11
  store volatile i32 3, ptr %56, align 4, !tbaa !13
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %57, i32 0, i32 9
  %59 = load ptr, ptr %58, align 8, !tbaa !21
  %60 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %59, i32 0, i32 6
  store ptr @SPDIFRX_DMARxHalfCplt, ptr %60, align 8, !tbaa !22
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %61, i32 0, i32 9
  %63 = load ptr, ptr %62, align 8, !tbaa !21
  %64 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %63, i32 0, i32 5
  store ptr @SPDIFRX_DMARxCplt, ptr %64, align 8, !tbaa !24
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %65, i32 0, i32 9
  %67 = load ptr, ptr %66, align 8, !tbaa !21
  %68 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %67, i32 0, i32 9
  store ptr @SPDIFRX_DMAError, ptr %68, align 8, !tbaa !25
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %69, i32 0, i32 9
  %71 = load ptr, ptr %70, align 8, !tbaa !21
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %72, i32 0, i32 0
  %74 = load ptr, ptr %73, align 8, !tbaa !26
  %75 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %74, i32 0, i32 4
  %76 = ptrtoint ptr %75 to i32
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %77, i32 0, i32 2
  %79 = load ptr, ptr %78, align 8, !tbaa !17
  %80 = ptrtoint ptr %79 to i32
  %81 = load i16, ptr %7, align 2, !tbaa !9
  %82 = zext i16 %81 to i32
  %83 = call i32 @HAL_DMA_Start_IT(ptr noundef %71, i32 noundef %76, i32 noundef %80, i32 noundef %82)
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %85, label %95

85:                                               ; preds = %43
  %86 = load ptr, ptr %5, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %86, i32 0, i32 12
  store volatile i32 8, ptr %87, align 8, !tbaa !20
  %88 = load ptr, ptr %5, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %88, i32 0, i32 11
  store volatile i32 7, ptr %89, align 4, !tbaa !13
  br label %90

90:                                               ; preds = %85
  %91 = load ptr, ptr %5, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %91, i32 0, i32 10
  store volatile i32 0, ptr %92, align 8, !tbaa !16
  br label %93

93:                                               ; preds = %90
  br label %94

94:                                               ; preds = %93
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

95:                                               ; preds = %43
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %96, i32 0, i32 0
  %98 = load ptr, ptr %97, align 8, !tbaa !26
  %99 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %98, i32 0, i32 0
  %100 = load volatile i32, ptr %99, align 4, !tbaa !27
  %101 = zext i32 %100 to i64
  %102 = or i64 %101, 4
  %103 = trunc i64 %102 to i32
  store volatile i32 %103, ptr %99, align 4, !tbaa !27
  %104 = load volatile i32, ptr inttoptr (i64 1073758208 to ptr), align 4, !tbaa !27
  %105 = zext i32 %104 to i64
  %106 = and i64 %105, 3
  %107 = icmp ne i64 %106, 3
  br i1 %107, label %108, label %189

108:                                              ; preds = %95
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %109, i32 0, i32 0
  %111 = load ptr, ptr %110, align 8, !tbaa !26
  %112 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %111, i32 0, i32 0
  %113 = load volatile i32, ptr %112, align 4, !tbaa !27
  %114 = or i32 %113, 1
  store volatile i32 %114, ptr %112, align 4, !tbaa !27
  br label %115

115:                                              ; preds = %171, %108
  %116 = load i32, ptr %8, align 4, !tbaa !11
  %117 = icmp eq i32 %116, 0
  br i1 %117, label %118, label %168

118:                                              ; preds = %115
  %119 = load ptr, ptr %5, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %119, i32 0, i32 0
  %121 = load ptr, ptr %120, align 8, !tbaa !26
  %122 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %121, i32 0, i32 1
  %123 = load volatile i32, ptr %122, align 4, !tbaa !29
  %124 = and i32 %123, 65534
  store volatile i32 %124, ptr %122, align 4, !tbaa !29
  %125 = load ptr, ptr %5, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %125, i32 0, i32 0
  %127 = load ptr, ptr %126, align 8, !tbaa !26
  %128 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %127, i32 0, i32 1
  %129 = load volatile i32, ptr %128, align 4, !tbaa !29
  %130 = and i32 %129, 65533
  store volatile i32 %130, ptr %128, align 4, !tbaa !29
  %131 = load ptr, ptr %5, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %131, i32 0, i32 0
  %133 = load ptr, ptr %132, align 8, !tbaa !26
  %134 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %133, i32 0, i32 1
  %135 = load volatile i32, ptr %134, align 4, !tbaa !29
  %136 = and i32 %135, 65531
  store volatile i32 %136, ptr %134, align 4, !tbaa !29
  %137 = load ptr, ptr %5, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %137, i32 0, i32 0
  %139 = load ptr, ptr %138, align 8, !tbaa !26
  %140 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %139, i32 0, i32 1
  %141 = load volatile i32, ptr %140, align 4, !tbaa !29
  %142 = and i32 %141, 65527
  store volatile i32 %142, ptr %140, align 4, !tbaa !29
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %143, i32 0, i32 0
  %145 = load ptr, ptr %144, align 8, !tbaa !26
  %146 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %145, i32 0, i32 1
  %147 = load volatile i32, ptr %146, align 4, !tbaa !29
  %148 = and i32 %147, 65519
  store volatile i32 %148, ptr %146, align 4, !tbaa !29
  %149 = load ptr, ptr %5, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %149, i32 0, i32 0
  %151 = load ptr, ptr %150, align 8, !tbaa !26
  %152 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %151, i32 0, i32 1
  %153 = load volatile i32, ptr %152, align 4, !tbaa !29
  %154 = and i32 %153, 65503
  store volatile i32 %154, ptr %152, align 4, !tbaa !29
  %155 = load ptr, ptr %5, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %155, i32 0, i32 0
  %157 = load ptr, ptr %156, align 8, !tbaa !26
  %158 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %157, i32 0, i32 1
  %159 = load volatile i32, ptr %158, align 4, !tbaa !29
  %160 = and i32 %159, 65471
  store volatile i32 %160, ptr %158, align 4, !tbaa !29
  %161 = load ptr, ptr %5, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %161, i32 0, i32 11
  store volatile i32 1, ptr %162, align 4, !tbaa !13
  br label %163

163:                                              ; preds = %118
  %164 = load ptr, ptr %5, align 8, !tbaa !5
  %165 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %164, i32 0, i32 10
  store volatile i32 0, ptr %165, align 8, !tbaa !16
  br label %166

166:                                              ; preds = %163
  br label %167

167:                                              ; preds = %166
  store i32 3, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

168:                                              ; preds = %115
  %169 = load i32, ptr %8, align 4, !tbaa !11
  %170 = add i32 %169, -1
  store i32 %170, ptr %8, align 4, !tbaa !11
  br label %171

171:                                              ; preds = %168
  %172 = load ptr, ptr %5, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %172, i32 0, i32 0
  %174 = load ptr, ptr %173, align 8, !tbaa !26
  %175 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %174, i32 0, i32 2
  %176 = load volatile i32, ptr %175, align 4, !tbaa !30
  %177 = and i32 %176, 32
  %178 = icmp eq i32 %177, 32
  %179 = zext i1 %178 to i64
  %180 = select i1 %178, i32 1, i32 0
  %181 = icmp eq i32 %180, 0
  br i1 %181, label %115, label %182, !llvm.loop !31

182:                                              ; preds = %171
  %183 = load ptr, ptr %5, align 8, !tbaa !5
  %184 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %183, i32 0, i32 0
  %185 = load ptr, ptr %184, align 8, !tbaa !26
  %186 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %185, i32 0, i32 0
  %187 = load volatile i32, ptr %186, align 4, !tbaa !27
  %188 = or i32 %187, 3
  store volatile i32 %188, ptr %186, align 4, !tbaa !27
  br label %189

189:                                              ; preds = %182, %95
  br label %190

190:                                              ; preds = %189
  %191 = load ptr, ptr %5, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %191, i32 0, i32 10
  store volatile i32 0, ptr %192, align 8, !tbaa !16
  br label %193

193:                                              ; preds = %190
  br label %194

194:                                              ; preds = %193
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

195:                                              ; preds = %28
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %196

196:                                              ; preds = %195, %194, %167, %94, %37, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %197 = load i32, ptr %4, align 4
  ret i32 %197
}

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMARxHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMARxCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMAError(ptr noundef) #1

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 100}
!14 = !{!"", !6, i64 0, !15, i64 8, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 74, !10, i64 76, !10, i64 78, !6, i64 80, !6, i64 88, !12, i64 96, !12, i64 100, !12, i64 104}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!16 = !{!14, !12, i64 96}
!17 = !{!14, !6, i64 56}
!18 = !{!14, !10, i64 72}
!19 = !{!14, !10, i64 74}
!20 = !{!14, !12, i64 104}
!21 = !{!14, !6, i64 88}
!22 = !{!23, !6, i64 80}
!23 = !{!"__DMA_HandleTypeDef", !6, i64 0, !15, i64 8, !12, i64 56, !12, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !6, i64 160, !6, i64 168, !12, i64 176}
!24 = !{!23, !6, i64 72}
!25 = !{!23, !6, i64 104}
!26 = !{!14, !6, i64 0}
!27 = !{!28, !12, i64 0}
!28 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!29 = !{!28, !12, i64 4}
!30 = !{!28, !12, i64 8}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_SPDIFRX_ReceiveDataFlow_DMA(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %5 = udiv i32 %4, 24000
  %6 = mul i32 %5, 65535
  %7 = getelementptr inbounds i8, ptr %0, i64 100
  %8 = load volatile i32, ptr %7, align 4, !tbaa !9
  %9 = icmp eq ptr %1, null
  %10 = zext i16 %2 to i32
  %11 = icmp eq i16 %2, 0
  %or.cond = or i1 %9, %11
  br i1 %or.cond, label %71, label %12

12:                                               ; preds = %3
  switch i32 %8, label %71 [
    i32 4, label %13
    i32 1, label %13
  ]

13:                                               ; preds = %12, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 96
  %15 = load volatile i32, ptr %14, align 8, !tbaa !14
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %71, label %17

17:                                               ; preds = %13
  store volatile i32 1, ptr %14, align 8, !tbaa !14
  %18 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %1, ptr %18, align 8, !tbaa !15
  %19 = getelementptr inbounds i8, ptr %0, i64 72
  store volatile i16 %2, ptr %19, align 8, !tbaa !16
  %20 = getelementptr inbounds i8, ptr %0, i64 74
  store volatile i16 %2, ptr %20, align 2, !tbaa !17
  %21 = getelementptr inbounds i8, ptr %0, i64 104
  store volatile i32 0, ptr %21, align 8, !tbaa !18
  store volatile i32 3, ptr %7, align 4, !tbaa !9
  %22 = getelementptr inbounds i8, ptr %0, i64 88
  %23 = load ptr, ptr %22, align 8, !tbaa !19
  %24 = getelementptr inbounds i8, ptr %23, i64 80
  store ptr @SPDIFRX_DMARxHalfCplt, ptr %24, align 8, !tbaa !20
  %25 = getelementptr inbounds i8, ptr %23, i64 72
  store ptr @SPDIFRX_DMARxCplt, ptr %25, align 8, !tbaa !22
  %26 = getelementptr inbounds i8, ptr %23, i64 104
  store ptr @SPDIFRX_DMAError, ptr %26, align 8, !tbaa !23
  %27 = load ptr, ptr %0, align 8, !tbaa !24
  %28 = getelementptr inbounds i8, ptr %27, i64 16
  %29 = ptrtoint ptr %28 to i64
  %30 = trunc i64 %29 to i32
  %31 = ptrtoint ptr %1 to i64
  %32 = trunc i64 %31 to i32
  %33 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %23, i32 noundef %30, i32 noundef %32, i32 noundef %10) #2
  %.not = icmp eq i32 %33, 0
  br i1 %.not, label %35, label %34

34:                                               ; preds = %17
  store volatile i32 8, ptr %21, align 8, !tbaa !18
  store volatile i32 7, ptr %7, align 4, !tbaa !9
  br label %.sink.split

35:                                               ; preds = %17
  %36 = load ptr, ptr %0, align 8, !tbaa !24
  %37 = load volatile i32, ptr %36, align 4, !tbaa !25
  %38 = or i32 %37, 4
  store volatile i32 %38, ptr %36, align 4, !tbaa !25
  %39 = load volatile i32, ptr inttoptr (i64 1073758208 to ptr), align 16384, !tbaa !25
  %40 = and i32 %39, 3
  %.not48 = icmp eq i32 %40, 3
  br i1 %.not48, label %.sink.split, label %41

41:                                               ; preds = %35
  %42 = load volatile i32, ptr %36, align 4, !tbaa !25
  %43 = or i32 %42, 1
  store volatile i32 %43, ptr %36, align 4, !tbaa !25
  %44 = getelementptr inbounds i8, ptr %36, i64 8
  br label %45

45:                                               ; preds = %63, %41
  %.045 = phi i32 [ %6, %41 ], [ %64, %63 ]
  %46 = icmp eq i32 %.045, 0
  br i1 %46, label %47, label %63

47:                                               ; preds = %45
  %48 = getelementptr inbounds i8, ptr %36, i64 4
  %49 = load volatile i32, ptr %48, align 4, !tbaa !27
  %50 = and i32 %49, 65534
  store volatile i32 %50, ptr %48, align 4, !tbaa !27
  %51 = load volatile i32, ptr %48, align 4, !tbaa !27
  %52 = and i32 %51, 65533
  store volatile i32 %52, ptr %48, align 4, !tbaa !27
  %53 = load volatile i32, ptr %48, align 4, !tbaa !27
  %54 = and i32 %53, 65531
  store volatile i32 %54, ptr %48, align 4, !tbaa !27
  %55 = load volatile i32, ptr %48, align 4, !tbaa !27
  %56 = and i32 %55, 65527
  store volatile i32 %56, ptr %48, align 4, !tbaa !27
  %57 = load volatile i32, ptr %48, align 4, !tbaa !27
  %58 = and i32 %57, 65519
  store volatile i32 %58, ptr %48, align 4, !tbaa !27
  %59 = load volatile i32, ptr %48, align 4, !tbaa !27
  %60 = and i32 %59, 65503
  store volatile i32 %60, ptr %48, align 4, !tbaa !27
  %61 = load volatile i32, ptr %48, align 4, !tbaa !27
  %62 = and i32 %61, 65471
  store volatile i32 %62, ptr %48, align 4, !tbaa !27
  store volatile i32 1, ptr %7, align 4, !tbaa !9
  br label %.sink.split

63:                                               ; preds = %45
  %64 = add i32 %.045, -1
  %65 = load volatile i32, ptr %44, align 4, !tbaa !28
  %66 = and i32 %65, 32
  %67 = icmp eq i32 %66, 0
  br i1 %67, label %45, label %68, !llvm.loop !29

68:                                               ; preds = %63
  %69 = load volatile i32, ptr %36, align 4, !tbaa !25
  %70 = or i32 %69, 3
  store volatile i32 %70, ptr %36, align 4, !tbaa !25
  br label %.sink.split

.sink.split:                                      ; preds = %68, %35, %34, %47
  %.0.ph = phi i32 [ 3, %47 ], [ 1, %34 ], [ 0, %35 ], [ 0, %68 ]
  store volatile i32 0, ptr %14, align 8, !tbaa !14
  br label %71

71:                                               ; preds = %.sink.split, %12, %13, %3
  %.0 = phi i32 [ 1, %3 ], [ 2, %13 ], [ 2, %12 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMARxHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMARxCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SPDIFRX_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 100}
!10 = !{!"", !11, i64 0, !12, i64 8, !11, i64 56, !11, i64 64, !13, i64 72, !13, i64 74, !13, i64 76, !13, i64 78, !11, i64 80, !11, i64 88, !6, i64 96, !6, i64 100, !6, i64 104}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !6, i64 96}
!15 = !{!10, !11, i64 56}
!16 = !{!10, !13, i64 72}
!17 = !{!10, !13, i64 74}
!18 = !{!10, !6, i64 104}
!19 = !{!10, !11, i64 88}
!20 = !{!21, !11, i64 80}
!21 = !{!"__DMA_HandleTypeDef", !11, i64 0, !12, i64 8, !6, i64 56, !6, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !6, i64 120, !6, i64 124, !6, i64 128, !11, i64 136, !11, i64 144, !6, i64 152, !11, i64 160, !11, i64 168, !6, i64 176}
!22 = !{!21, !11, i64 72}
!23 = !{!21, !11, i64 104}
!24 = !{!10, !11, i64 0}
!25 = !{!26, !6, i64 0}
!26 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!27 = !{!26, !6, i64 4}
!28 = !{!26, !6, i64 8}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,SROAPass,SimplifyCFGPass,TailCallElimPass