; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SD_Erase(ptr noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %12 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %12, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %13 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %13, ptr %10, align 4, !tbaa !9
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %14, i32 0, i32 8
  %16 = load volatile i32, ptr %15, align 8, !tbaa !11
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %159

18:                                               ; preds = %3
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %19, i32 0, i32 9
  store volatile i32 0, ptr %20, align 4, !tbaa !15
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp ult i32 %21, %22
  br i1 %23, label %24, label %29

24:                                               ; preds = %18
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %25, i32 0, i32 9
  %27 = load volatile i32, ptr %26, align 4, !tbaa !15
  %28 = or i32 %27, 134217728
  store volatile i32 %28, ptr %26, align 4, !tbaa !15
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

29:                                               ; preds = %18
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %31, i32 0, i32 10
  %33 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %32, i32 0, i32 6
  %34 = load i32, ptr %33, align 8, !tbaa !16
  %35 = icmp ugt i32 %30, %34
  br i1 %35, label %36, label %41

36:                                               ; preds = %29
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %37, i32 0, i32 9
  %39 = load volatile i32, ptr %38, align 4, !tbaa !15
  %40 = or i32 %39, 33554432
  store volatile i32 %40, ptr %38, align 4, !tbaa !15
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

41:                                               ; preds = %29
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %42, i32 0, i32 8
  store volatile i32 3, ptr %43, align 8, !tbaa !11
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %44, i32 0, i32 10
  %46 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %45, i32 0, i32 2
  %47 = load i32, ptr %46, align 8, !tbaa !17
  %48 = and i32 %47, 32
  %49 = icmp eq i32 %48, 0
  br i1 %49, label %50, label %61

50:                                               ; preds = %41
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %51, i32 0, i32 0
  %53 = load ptr, ptr %52, align 8, !tbaa !18
  %54 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %53, i32 0, i32 14
  store volatile i32 534777855, ptr %54, align 4, !tbaa !19
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %55, i32 0, i32 9
  %57 = load volatile i32, ptr %56, align 4, !tbaa !15
  %58 = or i32 %57, 67108864
  store volatile i32 %58, ptr %56, align 4, !tbaa !15
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %59, i32 0, i32 8
  store volatile i32 1, ptr %60, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

61:                                               ; preds = %41
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %62, i32 0, i32 0
  %64 = load ptr, ptr %63, align 8, !tbaa !18
  %65 = call i32 @SDMMC_GetResponse(ptr noundef %64, i32 noundef 0)
  %66 = and i32 %65, 33554432
  %67 = icmp eq i32 %66, 33554432
  br i1 %67, label %68, label %79

68:                                               ; preds = %61
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %69, i32 0, i32 0
  %71 = load ptr, ptr %70, align 8, !tbaa !18
  %72 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %71, i32 0, i32 14
  store volatile i32 534777855, ptr %72, align 4, !tbaa !19
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %73, i32 0, i32 9
  %75 = load volatile i32, ptr %74, align 4, !tbaa !15
  %76 = or i32 %75, 2048
  store volatile i32 %76, ptr %74, align 4, !tbaa !15
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %77, i32 0, i32 8
  store volatile i32 1, ptr %78, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

79:                                               ; preds = %61
  %80 = load ptr, ptr %5, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %80, i32 0, i32 10
  %82 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %81, i32 0, i32 0
  %83 = load i32, ptr %82, align 8, !tbaa !21
  %84 = icmp ne i32 %83, 1
  br i1 %84, label %85, label %90

85:                                               ; preds = %79
  %86 = load i32, ptr %9, align 4, !tbaa !9
  %87 = mul i32 %86, 512
  store i32 %87, ptr %9, align 4, !tbaa !9
  %88 = load i32, ptr %10, align 4, !tbaa !9
  %89 = mul i32 %88, 512
  store i32 %89, ptr %10, align 4, !tbaa !9
  br label %90

90:                                               ; preds = %85, %79
  %91 = load ptr, ptr %5, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %91, i32 0, i32 10
  %93 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %92, i32 0, i32 0
  %94 = load i32, ptr %93, align 8, !tbaa !21
  %95 = icmp ne i32 %94, 3
  br i1 %95, label %96, label %137

96:                                               ; preds = %90
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !18
  %100 = load i32, ptr %9, align 4, !tbaa !9
  %101 = call i32 @SDMMC_CmdSDEraseStartAdd(ptr noundef %99, i32 noundef %100)
  store i32 %101, ptr %8, align 4, !tbaa !9
  %102 = load i32, ptr %8, align 4, !tbaa !9
  %103 = icmp ne i32 %102, 0
  br i1 %103, label %104, label %116

104:                                              ; preds = %96
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %105, i32 0, i32 0
  %107 = load ptr, ptr %106, align 8, !tbaa !18
  %108 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %107, i32 0, i32 14
  store volatile i32 534777855, ptr %108, align 4, !tbaa !19
  %109 = load i32, ptr %8, align 4, !tbaa !9
  %110 = load ptr, ptr %5, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %110, i32 0, i32 9
  %112 = load volatile i32, ptr %111, align 4, !tbaa !15
  %113 = or i32 %112, %109
  store volatile i32 %113, ptr %111, align 4, !tbaa !15
  %114 = load ptr, ptr %5, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %114, i32 0, i32 8
  store volatile i32 1, ptr %115, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

116:                                              ; preds = %96
  %117 = load ptr, ptr %5, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %117, i32 0, i32 0
  %119 = load ptr, ptr %118, align 8, !tbaa !18
  %120 = load i32, ptr %10, align 4, !tbaa !9
  %121 = call i32 @SDMMC_CmdSDEraseEndAdd(ptr noundef %119, i32 noundef %120)
  store i32 %121, ptr %8, align 4, !tbaa !9
  %122 = load i32, ptr %8, align 4, !tbaa !9
  %123 = icmp ne i32 %122, 0
  br i1 %123, label %124, label %136

124:                                              ; preds = %116
  %125 = load ptr, ptr %5, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %125, i32 0, i32 0
  %127 = load ptr, ptr %126, align 8, !tbaa !18
  %128 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %127, i32 0, i32 14
  store volatile i32 534777855, ptr %128, align 4, !tbaa !19
  %129 = load i32, ptr %8, align 4, !tbaa !9
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %130, i32 0, i32 9
  %132 = load volatile i32, ptr %131, align 4, !tbaa !15
  %133 = or i32 %132, %129
  store volatile i32 %133, ptr %131, align 4, !tbaa !15
  %134 = load ptr, ptr %5, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %134, i32 0, i32 8
  store volatile i32 1, ptr %135, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

136:                                              ; preds = %116
  br label %137

137:                                              ; preds = %136, %90
  %138 = load ptr, ptr %5, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %138, i32 0, i32 0
  %140 = load ptr, ptr %139, align 8, !tbaa !18
  %141 = call i32 @SDMMC_CmdErase(ptr noundef %140)
  store i32 %141, ptr %8, align 4, !tbaa !9
  %142 = load i32, ptr %8, align 4, !tbaa !9
  %143 = icmp ne i32 %142, 0
  br i1 %143, label %144, label %156

144:                                              ; preds = %137
  %145 = load ptr, ptr %5, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %145, i32 0, i32 0
  %147 = load ptr, ptr %146, align 8, !tbaa !18
  %148 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %147, i32 0, i32 14
  store volatile i32 534777855, ptr %148, align 4, !tbaa !19
  %149 = load i32, ptr %8, align 4, !tbaa !9
  %150 = load ptr, ptr %5, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %150, i32 0, i32 9
  %152 = load volatile i32, ptr %151, align 4, !tbaa !15
  %153 = or i32 %152, %149
  store volatile i32 %153, ptr %151, align 4, !tbaa !15
  %154 = load ptr, ptr %5, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %154, i32 0, i32 8
  store volatile i32 1, ptr %155, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

156:                                              ; preds = %137
  %157 = load ptr, ptr %5, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %157, i32 0, i32 8
  store volatile i32 1, ptr %158, align 8, !tbaa !11
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

159:                                              ; preds = %3
  store i32 2, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %160

160:                                              ; preds = %159, %156, %144, %124, %104, %68, %50, %36, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %161 = load i32, ptr %4, align 4
  ret i32 %161
}

declare i32 @SDMMC_GetResponse(ptr noundef, i32 noundef) #2

declare i32 @SDMMC_CmdSDEraseStartAdd(ptr noundef, i32 noundef) #2

declare i32 @SDMMC_CmdSDEraseEndAdd(ptr noundef, i32 noundef) #2

declare i32 @SDMMC_CmdErase(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 108, !7, i64 124}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!12, !10, i64 68}
!16 = !{!12, !10, i64 96}
!17 = !{!12, !10, i64 80}
!18 = !{!12, !6, i64 0}
!19 = !{!20, !10, i64 56}
!20 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!21 = !{!12, !10, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SD_Erase(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 64
  %5 = load volatile i32, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %7, label %67

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 0, ptr %8, align 4, !tbaa !13
  %9 = icmp ult i32 %2, %1
  br i1 %9, label %10, label %13

10:                                               ; preds = %7
  %11 = load volatile i32, ptr %8, align 4, !tbaa !13
  %12 = or i32 %11, 134217728
  store volatile i32 %12, ptr %8, align 4, !tbaa !13
  br label %67

13:                                               ; preds = %7
  %14 = getelementptr inbounds i8, ptr %0, i64 72
  %15 = getelementptr inbounds i8, ptr %0, i64 96
  %16 = load i32, ptr %15, align 8, !tbaa !14
  %17 = icmp ult i32 %16, %2
  br i1 %17, label %18, label %21

18:                                               ; preds = %13
  %19 = load volatile i32, ptr %8, align 4, !tbaa !13
  %20 = or i32 %19, 33554432
  store volatile i32 %20, ptr %8, align 4, !tbaa !13
  br label %67

21:                                               ; preds = %13
  store volatile i32 3, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %0, i64 80
  %23 = load i32, ptr %22, align 8, !tbaa !15
  %24 = and i32 %23, 32
  %25 = icmp eq i32 %24, 0
  %26 = load ptr, ptr %0, align 8, !tbaa !16
  br i1 %25, label %27, label %31

27:                                               ; preds = %21
  %28 = getelementptr inbounds i8, ptr %26, i64 56
  store volatile i32 534777855, ptr %28, align 4, !tbaa !17
  %29 = load volatile i32, ptr %8, align 4, !tbaa !13
  %30 = or i32 %29, 67108864
  store volatile i32 %30, ptr %8, align 4, !tbaa !13
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

31:                                               ; preds = %21
  %32 = tail call i32 @SDMMC_GetResponse(ptr noundef %26, i32 noundef 0) #2
  %33 = and i32 %32, 33554432
  %.not = icmp eq i32 %33, 0
  br i1 %.not, label %39, label %34

34:                                               ; preds = %31
  %35 = load ptr, ptr %0, align 8, !tbaa !16
  %36 = getelementptr inbounds i8, ptr %35, i64 56
  store volatile i32 534777855, ptr %36, align 4, !tbaa !17
  %37 = load volatile i32, ptr %8, align 4, !tbaa !13
  %38 = or i32 %37, 2048
  store volatile i32 %38, ptr %8, align 4, !tbaa !13
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

39:                                               ; preds = %31
  %40 = load i32, ptr %14, align 8, !tbaa !19
  %.not51 = icmp eq i32 %40, 1
  %41 = shl i32 %2, 9
  %.0 = select i1 %.not51, i32 %2, i32 %41
  %.not52 = icmp eq i32 %40, 3
  br i1 %.not52, label %58, label %42

42:                                               ; preds = %39
  %43 = shl i32 %1, 9
  %.044 = select i1 %.not51, i32 %1, i32 %43
  %44 = load ptr, ptr %0, align 8, !tbaa !16
  %45 = tail call i32 @SDMMC_CmdSDEraseStartAdd(ptr noundef %44, i32 noundef %.044) #2
  %.not53 = icmp eq i32 %45, 0
  %46 = load ptr, ptr %0, align 8, !tbaa !16
  br i1 %.not53, label %51, label %47

47:                                               ; preds = %42
  %48 = getelementptr inbounds i8, ptr %46, i64 56
  store volatile i32 534777855, ptr %48, align 4, !tbaa !17
  %49 = load volatile i32, ptr %8, align 4, !tbaa !13
  %50 = or i32 %49, %45
  store volatile i32 %50, ptr %8, align 4, !tbaa !13
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

51:                                               ; preds = %42
  %52 = tail call i32 @SDMMC_CmdSDEraseEndAdd(ptr noundef %46, i32 noundef %.0) #2
  %.not54 = icmp eq i32 %52, 0
  br i1 %.not54, label %58, label %53

53:                                               ; preds = %51
  %54 = load ptr, ptr %0, align 8, !tbaa !16
  %55 = getelementptr inbounds i8, ptr %54, i64 56
  store volatile i32 534777855, ptr %55, align 4, !tbaa !17
  %56 = load volatile i32, ptr %8, align 4, !tbaa !13
  %57 = or i32 %56, %52
  store volatile i32 %57, ptr %8, align 4, !tbaa !13
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

58:                                               ; preds = %51, %39
  %59 = load ptr, ptr %0, align 8, !tbaa !16
  %60 = tail call i32 @SDMMC_CmdErase(ptr noundef %59) #2
  %.not55 = icmp eq i32 %60, 0
  br i1 %.not55, label %66, label %61

61:                                               ; preds = %58
  %62 = load ptr, ptr %0, align 8, !tbaa !16
  %63 = getelementptr inbounds i8, ptr %62, i64 56
  store volatile i32 534777855, ptr %63, align 4, !tbaa !17
  %64 = load volatile i32, ptr %8, align 4, !tbaa !13
  %65 = or i32 %64, %60
  store volatile i32 %65, ptr %8, align 4, !tbaa !13
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

66:                                               ; preds = %58
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %67

67:                                               ; preds = %3, %66, %61, %53, %47, %34, %27, %18, %10
  %.045 = phi i32 [ 1, %10 ], [ 1, %18 ], [ 1, %27 ], [ 1, %34 ], [ 1, %47 ], [ 1, %53 ], [ 1, %61 ], [ 0, %66 ], [ 2, %3 ]
  ret i32 %.045
}

declare i32 @SDMMC_GetResponse(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdSDEraseStartAdd(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdSDEraseEndAdd(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdErase(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 28, !7, i64 32, !11, i64 40, !7, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !12, i64 72, !8, i64 108, !8, i64 124}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!13 = !{!6, !11, i64 68}
!14 = !{!6, !11, i64 96}
!15 = !{!6, !11, i64 80}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !11, i64 56}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !8, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !8, i64 132, !11, i64 1020}
!19 = !{!6, !11, i64 72}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass