; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ (1492)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca [4 x i64], align 16
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 32, ptr %3) #5
  br label %5

5:                                                ; preds = %61, %0
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %7 = load i64, ptr %2, align 8, !tbaa !5
  %8 = icmp ne i64 %7, 0
  br i1 %8, label %9, label %81

9:                                                ; preds = %5
  %10 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 0
  store i64 0, ptr %10, align 16, !tbaa !5
  br label %11

11:                                               ; preds = %19, %9
  %12 = load i64, ptr %2, align 8, !tbaa !5
  %13 = srem i64 %12, 2
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %15, label %22

15:                                               ; preds = %11
  %16 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 0
  %17 = load i64, ptr %16, align 16, !tbaa !5
  %18 = add nsw i64 %17, 1
  store i64 %18, ptr %16, align 16, !tbaa !5
  br label %19

19:                                               ; preds = %15
  %20 = load i64, ptr %2, align 8, !tbaa !5
  %21 = sdiv i64 %20, 2
  store i64 %21, ptr %2, align 8, !tbaa !5
  br label %11, !llvm.loop !9

22:                                               ; preds = %11
  %23 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 1
  store i64 0, ptr %23, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %32, %22
  %25 = load i64, ptr %2, align 8, !tbaa !5
  %26 = srem i64 %25, 3
  %27 = icmp eq i64 %26, 0
  br i1 %27, label %28, label %35

28:                                               ; preds = %24
  %29 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 1
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = add nsw i64 %30, 1
  store i64 %31, ptr %29, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %28
  %33 = load i64, ptr %2, align 8, !tbaa !5
  %34 = sdiv i64 %33, 3
  store i64 %34, ptr %2, align 8, !tbaa !5
  br label %24, !llvm.loop !11

35:                                               ; preds = %24
  %36 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 2
  store i64 0, ptr %36, align 16, !tbaa !5
  br label %37

37:                                               ; preds = %45, %35
  %38 = load i64, ptr %2, align 8, !tbaa !5
  %39 = srem i64 %38, 5
  %40 = icmp eq i64 %39, 0
  br i1 %40, label %41, label %48

41:                                               ; preds = %37
  %42 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 2
  %43 = load i64, ptr %42, align 16, !tbaa !5
  %44 = add nsw i64 %43, 1
  store i64 %44, ptr %42, align 16, !tbaa !5
  br label %45

45:                                               ; preds = %41
  %46 = load i64, ptr %2, align 8, !tbaa !5
  %47 = sdiv i64 %46, 5
  store i64 %47, ptr %2, align 8, !tbaa !5
  br label %37, !llvm.loop !12

48:                                               ; preds = %37
  %49 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 3
  store i64 0, ptr %49, align 8, !tbaa !5
  br label %50

50:                                               ; preds = %58, %48
  %51 = load i64, ptr %2, align 8, !tbaa !5
  %52 = srem i64 %51, 7
  %53 = icmp eq i64 %52, 0
  br i1 %53, label %54, label %61

54:                                               ; preds = %50
  %55 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 3
  %56 = load i64, ptr %55, align 8, !tbaa !5
  %57 = add nsw i64 %56, 1
  store i64 %57, ptr %55, align 8, !tbaa !5
  br label %58

58:                                               ; preds = %54
  %59 = load i64, ptr %2, align 8, !tbaa !5
  %60 = sdiv i64 %59, 7
  store i64 %60, ptr %2, align 8, !tbaa !5
  br label %50, !llvm.loop !13

61:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %62 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 0
  %63 = load i64, ptr %62, align 16, !tbaa !5
  %64 = add nsw i64 %63, 1
  %65 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 1
  %66 = load i64, ptr %65, align 8, !tbaa !5
  %67 = add nsw i64 %66, 1
  %68 = mul nsw i64 %64, %67
  %69 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 2
  %70 = load i64, ptr %69, align 16, !tbaa !5
  %71 = add nsw i64 %70, 1
  %72 = mul nsw i64 %68, %71
  %73 = getelementptr inbounds [4 x i64], ptr %3, i64 0, i64 3
  %74 = load i64, ptr %73, align 8, !tbaa !5
  %75 = add nsw i64 %74, 1
  %76 = mul nsw i64 %72, %75
  %77 = trunc i64 %76 to i32
  store i32 %77, ptr %4, align 4, !tbaa !14
  %78 = load i32, ptr %4, align 4, !tbaa !14
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %78)
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %79, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %5, !llvm.loop !16

81:                                               ; preds = %5
  call void @llvm.lifetime.end.p0(i64 32, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = distinct !{!16, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #5
  %2 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %3 = load i64, ptr %1, align 8, !tbaa !5
  %.not24 = icmp eq i64 %3, 0
  br i1 %.not24, label %._crit_edge25, label %.preheader7

.preheader7:                                      ; preds = %0, %32
  %.promoted = phi i64 [ %43, %32 ], [ %3, %0 ]
  %4 = and i64 %.promoted, 1
  %5 = icmp eq i64 %4, 0
  br i1 %5, label %.lr.ph, label %.preheader6

..preheader6_crit_edge:                           ; preds = %.lr.ph
  store i64 %10, ptr %1, align 8, !tbaa !5
  br label %.preheader6

.preheader6:                                      ; preds = %..preheader6_crit_edge, %.preheader7
  %.promoted9 = phi i64 [ %10, %..preheader6_crit_edge ], [ %.promoted, %.preheader7 ]
  %.sroa.0.0.lcssa = phi i32 [ %9, %..preheader6_crit_edge ], [ 0, %.preheader7 ]
  %6 = srem i64 %.promoted9, 3
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %.lr.ph11, label %.preheader5

.lr.ph:                                           ; preds = %.preheader7, %.lr.ph
  %.sroa.0.08 = phi i32 [ %9, %.lr.ph ], [ 0, %.preheader7 ]
  %8 = phi i64 [ %10, %.lr.ph ], [ %.promoted, %.preheader7 ]
  %9 = add i32 %.sroa.0.08, 1
  %10 = ashr exact i64 %8, 1
  %11 = and i64 %8, 2
  %12 = icmp eq i64 %11, 0
  br i1 %12, label %.lr.ph, label %..preheader6_crit_edge, !llvm.loop !9

..preheader5_crit_edge:                           ; preds = %.lr.ph11
  store i64 %17, ptr %1, align 8, !tbaa !5
  br label %.preheader5

.preheader5:                                      ; preds = %..preheader5_crit_edge, %.preheader6
  %.promoted14 = phi i64 [ %17, %..preheader5_crit_edge ], [ %.promoted9, %.preheader6 ]
  %.sroa.6.0.lcssa = phi i32 [ %16, %..preheader5_crit_edge ], [ 0, %.preheader6 ]
  %13 = srem i64 %.promoted14, 5
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %.lr.ph16, label %.preheader

.lr.ph11:                                         ; preds = %.preheader6, %.lr.ph11
  %.sroa.6.010 = phi i32 [ %16, %.lr.ph11 ], [ 0, %.preheader6 ]
  %15 = phi i64 [ %17, %.lr.ph11 ], [ %.promoted9, %.preheader6 ]
  %16 = add i32 %.sroa.6.010, 1
  %17 = sdiv i64 %15, 3
  %18 = srem i64 %17, 3
  %19 = icmp eq i64 %18, 0
  br i1 %19, label %.lr.ph11, label %..preheader5_crit_edge, !llvm.loop !11

..preheader_crit_edge:                            ; preds = %.lr.ph16
  store i64 %24, ptr %1, align 8, !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %..preheader_crit_edge, %.preheader5
  %.promoted19 = phi i64 [ %24, %..preheader_crit_edge ], [ %.promoted14, %.preheader5 ]
  %.sroa.10.0.lcssa = phi i32 [ %23, %..preheader_crit_edge ], [ 0, %.preheader5 ]
  %20 = srem i64 %.promoted19, 7
  %21 = icmp eq i64 %20, 0
  br i1 %21, label %.lr.ph21, label %32

.lr.ph16:                                         ; preds = %.preheader5, %.lr.ph16
  %.sroa.10.015 = phi i32 [ %23, %.lr.ph16 ], [ 0, %.preheader5 ]
  %22 = phi i64 [ %24, %.lr.ph16 ], [ %.promoted14, %.preheader5 ]
  %23 = add i32 %.sroa.10.015, 1
  %24 = sdiv i64 %22, 5
  %25 = srem i64 %24, 5
  %26 = icmp eq i64 %25, 0
  br i1 %26, label %.lr.ph16, label %..preheader_crit_edge, !llvm.loop !12

.lr.ph21:                                         ; preds = %.preheader, %.lr.ph21
  %.sroa.14.020 = phi i32 [ %28, %.lr.ph21 ], [ 0, %.preheader ]
  %27 = phi i64 [ %29, %.lr.ph21 ], [ %.promoted19, %.preheader ]
  %28 = add i32 %.sroa.14.020, 1
  %29 = sdiv i64 %27, 7
  %30 = srem i64 %29, 7
  %31 = icmp eq i64 %30, 0
  br i1 %31, label %.lr.ph21, label %._crit_edge, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph21
  store i64 %29, ptr %1, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %._crit_edge, %.preheader
  %.sroa.14.0.lcssa = phi i32 [ %28, %._crit_edge ], [ 0, %.preheader ]
  %33 = add i32 %.sroa.0.0.lcssa, 1
  %34 = add i32 %.sroa.6.0.lcssa, 1
  %35 = mul i32 %34, %33
  %36 = add i32 %.sroa.10.0.lcssa, 1
  %37 = mul i32 %35, %36
  %38 = add i32 %.sroa.14.0.lcssa, 1
  %39 = mul i32 %37, %38
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %39)
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %40, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %42 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %43 = load i64, ptr %1, align 8, !tbaa !5
  %.not = icmp eq i64 %43, 0
  br i1 %.not, label %._crit_edge25, label %.preheader7, !llvm.loop !14

._crit_edge25:                                    ; preds = %32, %0
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass