; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/src/dev/sr_595.ll (ZN16ShiftRegister5955WriteEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ShiftRegister595 = type { [3 x %struct.dsy_gpio], [16 x i8], i64 }
%struct.dsy_gpio = type { %struct.dsy_gpio_pin, i32, i32 }
%struct.dsy_gpio_pin = type { i32, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ShiftRegister5955WriteEv(ptr noundef nonnull align 8 dereferenceable(72) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  %5 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 0
  %6 = getelementptr inbounds [3 x %struct.dsy_gpio], ptr %5, i64 0, i64 0
  call void @dsy_gpio_write(ptr noundef %6, i8 noundef zeroext 0)
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 0, ptr %3, align 8, !tbaa !9
  br label %7

7:                                                ; preds = %38, %1
  %8 = load i64, ptr %3, align 8, !tbaa !9
  %9 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 2
  %10 = load i64, ptr %9, align 8, !tbaa !11
  %11 = mul i64 %10, 8
  %12 = icmp ult i64 %8, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  br label %41

14:                                               ; preds = %7
  %15 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 0
  %16 = getelementptr inbounds [3 x %struct.dsy_gpio], ptr %15, i64 0, i64 1
  call void @dsy_gpio_write(ptr noundef %16, i8 noundef zeroext 0)
  %17 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 0
  %18 = getelementptr inbounds [3 x %struct.dsy_gpio], ptr %17, i64 0, i64 2
  %19 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 1
  %20 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 2
  %21 = load i64, ptr %20, align 8, !tbaa !11
  %22 = sub i64 %21, 1
  %23 = load i64, ptr %3, align 8, !tbaa !9
  %24 = udiv i64 %23, 8
  %25 = sub i64 %22, %24
  %26 = getelementptr inbounds [16 x i8], ptr %19, i64 0, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !13
  %28 = zext i8 %27 to i32
  %29 = load i64, ptr %3, align 8, !tbaa !9
  %30 = urem i64 %29, 8
  %31 = sub i64 7, %30
  %32 = trunc i64 %31 to i32
  %33 = shl i32 1, %32
  %34 = and i32 %28, %33
  %35 = trunc i32 %34 to i8
  call void @dsy_gpio_write(ptr noundef %18, i8 noundef zeroext %35)
  %36 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 0
  %37 = getelementptr inbounds [3 x %struct.dsy_gpio], ptr %36, i64 0, i64 1
  call void @dsy_gpio_write(ptr noundef %37, i8 noundef zeroext 1)
  br label %38

38:                                               ; preds = %14
  %39 = load i64, ptr %3, align 8, !tbaa !9
  %40 = add i64 %39, 1
  store i64 %40, ptr %3, align 8, !tbaa !9
  br label %7, !llvm.loop !14

41:                                               ; preds = %13
  %42 = getelementptr inbounds %class.ShiftRegister595, ptr %4, i32 0, i32 0
  %43 = getelementptr inbounds [3 x %struct.dsy_gpio], ptr %42, i64 0, i64 0
  call void @dsy_gpio_write(ptr noundef %43, i8 noundef zeroext 1)
  ret void
}

declare void @dsy_gpio_write(ptr noundef, i8 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"_ZTS16ShiftRegister595", !7, i64 0, !7, i64 48, !10, i64 64}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ShiftRegister5955WriteEv(ptr noundef nonnull align 8 dereferenceable(72) %0) local_unnamed_addr #0 align 2 {
  tail call void @dsy_gpio_write(ptr noundef nonnull %0, i8 noundef zeroext 0)
  %2 = getelementptr inbounds i8, ptr %0, i64 64
  %3 = load i64, ptr %2, align 8, !tbaa !5
  %.mask = and i64 %3, 2305843009213693951
  %.not = icmp eq i64 %.mask, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = getelementptr inbounds i8, ptr %0, i64 32
  %6 = getelementptr inbounds i8, ptr %0, i64 48
  br label %7

._crit_edge:                                      ; preds = %7, %1
  tail call void @dsy_gpio_write(ptr noundef nonnull %0, i8 noundef zeroext 1)
  ret void

7:                                                ; preds = %.lr.ph, %7
  %.04 = phi i64 [ 0, %.lr.ph ], [ %19, %7 ]
  tail call void @dsy_gpio_write(ptr noundef nonnull %4, i8 noundef zeroext 0)
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %9 = lshr i64 %.04, 3
  %10 = xor i64 %9, -1
  %11 = add i64 %8, %10
  %12 = getelementptr inbounds [16 x i8], ptr %6, i64 0, i64 %11
  %13 = load i8, ptr %12, align 1, !tbaa !10
  %14 = trunc i64 %.04 to i8
  %15 = and i8 %14, 7
  %16 = xor i8 %15, 7
  %17 = shl nuw i8 1, %16
  %18 = and i8 %13, %17
  tail call void @dsy_gpio_write(ptr noundef nonnull %5, i8 noundef zeroext %18)
  tail call void @dsy_gpio_write(ptr noundef nonnull %4, i8 noundef zeroext 1)
  %19 = add nuw i64 %.04, 1
  %20 = load i64, ptr %2, align 8, !tbaa !5
  %21 = shl i64 %20, 3
  %22 = icmp ult i64 %19, %21
  br i1 %22, label %7, label %._crit_edge, !llvm.loop !11
}

declare void @dsy_gpio_write(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 64}
!6 = !{!"_ZTS16ShiftRegister595", !7, i64 0, !7, i64 48, !9, i64 64}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"long", !7, i64 0}
!10 = !{!7, !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass