; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SPDIFRX_HandleTypeDef = type { ptr, %struct.SPDIFRX_InitTypeDef, ptr, ptr, i16, i16, i16, i16, ptr, ptr, i32, i32, i32 }
%struct.SPDIFRX_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SPDIFRX_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

@SystemCoreClock = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SPDIFRX_ReceiveDataFlow_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %11 = load i32, ptr @SystemCoreClock, align 4, !tbaa !11
  %12 = udiv i32 %11, 24
  %13 = udiv i32 %12, 1000
  %14 = mul i32 65535, %13
  store i32 %14, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %15, i32 0, i32 11
  %17 = load volatile i32, ptr %16, align 4, !tbaa !13
  store i32 %17, ptr %9, align 4, !tbaa !11
  %18 = load i32, ptr %9, align 4, !tbaa !11
  %19 = icmp eq i32 %18, 1
  br i1 %19, label %23, label %20

20:                                               ; preds = %3
  %21 = load i32, ptr %9, align 4, !tbaa !11
  %22 = icmp eq i32 %21, 4
  br i1 %22, label %23, label %166

23:                                               ; preds = %20, %3
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = icmp eq ptr %24, null
  br i1 %25, label %30, label %26

26:                                               ; preds = %23
  %27 = load i16, ptr %7, align 2, !tbaa !9
  %28 = zext i16 %27 to i32
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %26, %23
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %167

31:                                               ; preds = %26
  br label %32

32:                                               ; preds = %31
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %33, i32 0, i32 10
  %35 = load volatile i32, ptr %34, align 8, !tbaa !16
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %37, label %38

37:                                               ; preds = %32
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %167

38:                                               ; preds = %32
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %39, i32 0, i32 10
  store volatile i32 1, ptr %40, align 8, !tbaa !16
  br label %41

41:                                               ; preds = %38
  br label %42

42:                                               ; preds = %41
  br label %43

43:                                               ; preds = %42
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %45, i32 0, i32 2
  store ptr %44, ptr %46, align 8, !tbaa !17
  %47 = load i16, ptr %7, align 2, !tbaa !9
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %48, i32 0, i32 4
  store volatile i16 %47, ptr %49, align 8, !tbaa !18
  %50 = load i16, ptr %7, align 2, !tbaa !9
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %51, i32 0, i32 5
  store volatile i16 %50, ptr %52, align 2, !tbaa !19
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %53, i32 0, i32 12
  store volatile i32 0, ptr %54, align 8, !tbaa !20
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %55, i32 0, i32 11
  store volatile i32 3, ptr %56, align 4, !tbaa !13
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %57, i32 0, i32 0
  %59 = load ptr, ptr %58, align 8, !tbaa !21
  %60 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %59, i32 0, i32 1
  %61 = load volatile i32, ptr %60, align 4, !tbaa !22
  %62 = or i32 %61, 4
  store volatile i32 %62, ptr %60, align 4, !tbaa !22
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %63, i32 0, i32 0
  %65 = load ptr, ptr %64, align 8, !tbaa !21
  %66 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %65, i32 0, i32 1
  %67 = load volatile i32, ptr %66, align 4, !tbaa !22
  %68 = or i32 %67, 8
  store volatile i32 %68, ptr %66, align 4, !tbaa !22
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %69, i32 0, i32 0
  %71 = load ptr, ptr %70, align 8, !tbaa !21
  %72 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %71, i32 0, i32 1
  %73 = load volatile i32, ptr %72, align 4, !tbaa !22
  %74 = or i32 %73, 1
  store volatile i32 %74, ptr %72, align 4, !tbaa !22
  %75 = load volatile i32, ptr inttoptr (i64 1073758208 to ptr), align 4, !tbaa !24
  %76 = zext i32 %75 to i64
  %77 = and i64 %76, 3
  %78 = icmp ne i64 %77, 3
  br i1 %78, label %79, label %160

79:                                               ; preds = %43
  %80 = load ptr, ptr %5, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %80, i32 0, i32 0
  %82 = load ptr, ptr %81, align 8, !tbaa !21
  %83 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %82, i32 0, i32 0
  %84 = load volatile i32, ptr %83, align 4, !tbaa !24
  %85 = or i32 %84, 1
  store volatile i32 %85, ptr %83, align 4, !tbaa !24
  br label %86

86:                                               ; preds = %142, %79
  %87 = load i32, ptr %8, align 4, !tbaa !11
  %88 = icmp eq i32 %87, 0
  br i1 %88, label %89, label %139

89:                                               ; preds = %86
  %90 = load ptr, ptr %5, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %90, i32 0, i32 0
  %92 = load ptr, ptr %91, align 8, !tbaa !21
  %93 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %92, i32 0, i32 1
  %94 = load volatile i32, ptr %93, align 4, !tbaa !22
  %95 = and i32 %94, 65534
  store volatile i32 %95, ptr %93, align 4, !tbaa !22
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %96, i32 0, i32 0
  %98 = load ptr, ptr %97, align 8, !tbaa !21
  %99 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %98, i32 0, i32 1
  %100 = load volatile i32, ptr %99, align 4, !tbaa !22
  %101 = and i32 %100, 65533
  store volatile i32 %101, ptr %99, align 4, !tbaa !22
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %102, i32 0, i32 0
  %104 = load ptr, ptr %103, align 8, !tbaa !21
  %105 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %104, i32 0, i32 1
  %106 = load volatile i32, ptr %105, align 4, !tbaa !22
  %107 = and i32 %106, 65531
  store volatile i32 %107, ptr %105, align 4, !tbaa !22
  %108 = load ptr, ptr %5, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %108, i32 0, i32 0
  %110 = load ptr, ptr %109, align 8, !tbaa !21
  %111 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %110, i32 0, i32 1
  %112 = load volatile i32, ptr %111, align 4, !tbaa !22
  %113 = and i32 %112, 65527
  store volatile i32 %113, ptr %111, align 4, !tbaa !22
  %114 = load ptr, ptr %5, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %114, i32 0, i32 0
  %116 = load ptr, ptr %115, align 8, !tbaa !21
  %117 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %116, i32 0, i32 1
  %118 = load volatile i32, ptr %117, align 4, !tbaa !22
  %119 = and i32 %118, 65519
  store volatile i32 %119, ptr %117, align 4, !tbaa !22
  %120 = load ptr, ptr %5, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %120, i32 0, i32 0
  %122 = load ptr, ptr %121, align 8, !tbaa !21
  %123 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %122, i32 0, i32 1
  %124 = load volatile i32, ptr %123, align 4, !tbaa !22
  %125 = and i32 %124, 65503
  store volatile i32 %125, ptr %123, align 4, !tbaa !22
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %126, i32 0, i32 0
  %128 = load ptr, ptr %127, align 8, !tbaa !21
  %129 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %128, i32 0, i32 1
  %130 = load volatile i32, ptr %129, align 4, !tbaa !22
  %131 = and i32 %130, 65471
  store volatile i32 %131, ptr %129, align 4, !tbaa !22
  %132 = load ptr, ptr %5, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %132, i32 0, i32 11
  store volatile i32 1, ptr %133, align 4, !tbaa !13
  br label %134

134:                                              ; preds = %89
  %135 = load ptr, ptr %5, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %135, i32 0, i32 10
  store volatile i32 0, ptr %136, align 8, !tbaa !16
  br label %137

137:                                              ; preds = %134
  br label %138

138:                                              ; preds = %137
  store i32 3, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %167

139:                                              ; preds = %86
  %140 = load i32, ptr %8, align 4, !tbaa !11
  %141 = add i32 %140, -1
  store i32 %141, ptr %8, align 4, !tbaa !11
  br label %142

142:                                              ; preds = %139
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %143, i32 0, i32 0
  %145 = load ptr, ptr %144, align 8, !tbaa !21
  %146 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %145, i32 0, i32 2
  %147 = load volatile i32, ptr %146, align 4, !tbaa !25
  %148 = and i32 %147, 32
  %149 = icmp eq i32 %148, 32
  %150 = zext i1 %149 to i64
  %151 = select i1 %149, i32 1, i32 0
  %152 = icmp eq i32 %151, 0
  br i1 %152, label %86, label %153, !llvm.loop !26

153:                                              ; preds = %142
  %154 = load ptr, ptr %5, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %154, i32 0, i32 0
  %156 = load ptr, ptr %155, align 8, !tbaa !21
  %157 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %156, i32 0, i32 0
  %158 = load volatile i32, ptr %157, align 4, !tbaa !24
  %159 = or i32 %158, 3
  store volatile i32 %159, ptr %157, align 4, !tbaa !24
  br label %160

160:                                              ; preds = %153, %43
  br label %161

161:                                              ; preds = %160
  %162 = load ptr, ptr %5, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %162, i32 0, i32 10
  store volatile i32 0, ptr %163, align 8, !tbaa !16
  br label %164

164:                                              ; preds = %161
  br label %165

165:                                              ; preds = %164
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %167

166:                                              ; preds = %20
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %167

167:                                              ; preds = %166, %165, %138, %37, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %168 = load i32, ptr %4, align 4
  ret i32 %168
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 100}
!14 = !{!"", !6, i64 0, !15, i64 8, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 74, !10, i64 76, !10, i64 78, !6, i64 80, !6, i64 88, !12, i64 96, !12, i64 100, !12, i64 104}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!16 = !{!14, !12, i64 96}
!17 = !{!14, !6, i64 56}
!18 = !{!14, !10, i64 72}
!19 = !{!14, !10, i64 74}
!20 = !{!14, !12, i64 104}
!21 = !{!14, !6, i64 0}
!22 = !{!23, !12, i64 4}
!23 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!24 = !{!23, !12, i64 0}
!25 = !{!23, !12, i64 8}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_SPDIFRX_ReceiveDataFlow_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %5 = udiv i32 %4, 24000
  %6 = mul i32 %5, 65535
  %7 = getelementptr inbounds i8, ptr %0, i64 100
  %8 = load volatile i32, ptr %7, align 4, !tbaa !9
  switch i32 %8, label %60 [
    i32 4, label %9
    i32 1, label %9
  ]

9:                                                ; preds = %3, %3
  %10 = icmp eq ptr %1, null
  %11 = icmp eq i16 %2, 0
  %or.cond4 = or i1 %10, %11
  br i1 %or.cond4, label %60, label %12

12:                                               ; preds = %9
  %13 = getelementptr inbounds i8, ptr %0, i64 96
  %14 = load volatile i32, ptr %13, align 8, !tbaa !14
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %60, label %16

16:                                               ; preds = %12
  store volatile i32 1, ptr %13, align 8, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %1, ptr %17, align 8, !tbaa !15
  %18 = getelementptr inbounds i8, ptr %0, i64 72
  store volatile i16 %2, ptr %18, align 8, !tbaa !16
  %19 = getelementptr inbounds i8, ptr %0, i64 74
  store volatile i16 %2, ptr %19, align 2, !tbaa !17
  %20 = getelementptr inbounds i8, ptr %0, i64 104
  store volatile i32 0, ptr %20, align 8, !tbaa !18
  store volatile i32 3, ptr %7, align 4, !tbaa !9
  %21 = load ptr, ptr %0, align 8, !tbaa !19
  %22 = getelementptr inbounds i8, ptr %21, i64 4
  %23 = load volatile i32, ptr %22, align 4, !tbaa !20
  %24 = or i32 %23, 4
  store volatile i32 %24, ptr %22, align 4, !tbaa !20
  %25 = load volatile i32, ptr %22, align 4, !tbaa !20
  %26 = or i32 %25, 8
  store volatile i32 %26, ptr %22, align 4, !tbaa !20
  %27 = load volatile i32, ptr %22, align 4, !tbaa !20
  %28 = or i32 %27, 1
  store volatile i32 %28, ptr %22, align 4, !tbaa !20
  %29 = load volatile i32, ptr inttoptr (i64 1073758208 to ptr), align 16384, !tbaa !22
  %30 = and i32 %29, 3
  %.not = icmp eq i32 %30, 3
  br i1 %.not, label %.sink.split, label %31

31:                                               ; preds = %16
  %32 = load volatile i32, ptr %21, align 4, !tbaa !22
  %33 = or i32 %32, 1
  store volatile i32 %33, ptr %21, align 4, !tbaa !22
  %34 = getelementptr inbounds i8, ptr %21, i64 8
  br label %35

35:                                               ; preds = %52, %31
  %.037 = phi i32 [ %6, %31 ], [ %53, %52 ]
  %36 = icmp eq i32 %.037, 0
  br i1 %36, label %37, label %52

37:                                               ; preds = %35
  %38 = load volatile i32, ptr %22, align 4, !tbaa !20
  %39 = and i32 %38, 65534
  store volatile i32 %39, ptr %22, align 4, !tbaa !20
  %40 = load volatile i32, ptr %22, align 4, !tbaa !20
  %41 = and i32 %40, 65533
  store volatile i32 %41, ptr %22, align 4, !tbaa !20
  %42 = load volatile i32, ptr %22, align 4, !tbaa !20
  %43 = and i32 %42, 65531
  store volatile i32 %43, ptr %22, align 4, !tbaa !20
  %44 = load volatile i32, ptr %22, align 4, !tbaa !20
  %45 = and i32 %44, 65527
  store volatile i32 %45, ptr %22, align 4, !tbaa !20
  %46 = load volatile i32, ptr %22, align 4, !tbaa !20
  %47 = and i32 %46, 65519
  store volatile i32 %47, ptr %22, align 4, !tbaa !20
  %48 = load volatile i32, ptr %22, align 4, !tbaa !20
  %49 = and i32 %48, 65503
  store volatile i32 %49, ptr %22, align 4, !tbaa !20
  %50 = load volatile i32, ptr %22, align 4, !tbaa !20
  %51 = and i32 %50, 65471
  store volatile i32 %51, ptr %22, align 4, !tbaa !20
  store volatile i32 1, ptr %7, align 4, !tbaa !9
  br label %.sink.split

52:                                               ; preds = %35
  %53 = add i32 %.037, -1
  %54 = load volatile i32, ptr %34, align 4, !tbaa !23
  %55 = and i32 %54, 32
  %56 = icmp eq i32 %55, 0
  br i1 %56, label %35, label %57, !llvm.loop !24

57:                                               ; preds = %52
  %58 = load volatile i32, ptr %21, align 4, !tbaa !22
  %59 = or i32 %58, 3
  store volatile i32 %59, ptr %21, align 4, !tbaa !22
  br label %.sink.split

.sink.split:                                      ; preds = %57, %16, %37
  %.0.ph = phi i32 [ 3, %37 ], [ 0, %16 ], [ 0, %57 ]
  store volatile i32 0, ptr %13, align 8, !tbaa !14
  br label %60

60:                                               ; preds = %.sink.split, %3, %12, %9
  %.0 = phi i32 [ 1, %9 ], [ 2, %12 ], [ 2, %3 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 100}
!10 = !{!"", !11, i64 0, !12, i64 8, !11, i64 56, !11, i64 64, !13, i64 72, !13, i64 74, !13, i64 76, !13, i64 78, !11, i64 80, !11, i64 88, !6, i64 96, !6, i64 100, !6, i64 104}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !6, i64 96}
!15 = !{!10, !11, i64 56}
!16 = !{!10, !13, i64 72}
!17 = !{!10, !13, i64 74}
!18 = !{!10, !6, i64 104}
!19 = !{!10, !11, i64 0}
!20 = !{!21, !6, i64 4}
!21 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!22 = !{!21, !6, i64 0}
!23 = !{!21, !6, i64 8}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass