; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/2197（数学+容斥）.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5q_modii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvei(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  store i32 2, ptr %2, align 4
  br label %63

9:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = call noundef i32 @_Z5q_modii(i32 noundef 2, i32 noundef %10)
  store i32 %11, ptr %4, align 4, !tbaa !5
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = sub nsw i32 %12, 2
  store i32 %13, ptr %4, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = srem i32 %14, 2008
  store i32 %15, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 2, ptr %5, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %56, %9
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = mul nsw i32 %17, %18
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %59

23:                                               ; preds = %16
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = srem i32 %24, %25
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %23
  br label %56

29:                                               ; preds = %23
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = mul nsw i32 %30, %31
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = icmp eq i32 %32, %33
  br i1 %34, label %35, label %42

35:                                               ; preds = %29
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = call noundef i32 @_Z5solvei(i32 noundef %36)
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = sub nsw i32 %38, %37
  store i32 %39, ptr %4, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = srem i32 %40, 2008
  store i32 %41, ptr %4, align 4, !tbaa !5
  br label %55

42:                                               ; preds = %29
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = call noundef i32 @_Z5solvei(i32 noundef %43)
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = sub nsw i32 %45, %44
  store i32 %46, ptr %4, align 4, !tbaa !5
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = load i32, ptr %5, align 4, !tbaa !5
  %49 = sdiv i32 %47, %48
  %50 = call noundef i32 @_Z5solvei(i32 noundef %49)
  %51 = load i32, ptr %4, align 4, !tbaa !5
  %52 = sub nsw i32 %51, %50
  store i32 %52, ptr %4, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = srem i32 %53, 2008
  store i32 %54, ptr %4, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %42, %35
  br label %56

56:                                               ; preds = %55, %28
  %57 = load i32, ptr %5, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %5, align 4, !tbaa !5
  br label %16, !llvm.loop !9

59:                                               ; preds = %22
  %60 = load i32, ptr %4, align 4, !tbaa !5
  %61 = add nsw i32 %60, 2008
  %62 = srem i32 %61, 2008
  store i32 %62, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %63

63:                                               ; preds = %59, %8
  %64 = load i32, ptr %2, align 4
  ret i32 %64
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5q_modii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 0, 2008) i32 @_Z5solvei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq i32 %0, 1
  br i1 %2, label %26, label %3

3:                                                ; preds = %1
  %4 = tail call noundef i32 @_Z5q_modii(i32 noundef 2, i32 noundef %0)
  %5 = add nsw i32 %4, -2
  %6 = srem i32 %5, 2008
  %.not31 = icmp slt i32 %0, 4
  br i1 %.not31, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %23, %3
  %.024.lcssa = phi i32 [ %6, %3 ], [ %.1, %23 ]
  %7 = add nsw i32 %.024.lcssa, 2008
  %8 = urem i32 %7, 2008
  br label %26

.lr.ph:                                           ; preds = %3, %23
  %9 = phi i32 [ %25, %23 ], [ 4, %3 ]
  %.033 = phi i32 [ %24, %23 ], [ 2, %3 ]
  %.02432 = phi i32 [ %.1, %23 ], [ %6, %3 ]
  %10 = urem i32 %0, %.033
  %11 = udiv i32 %0, %.033
  %.not28 = icmp eq i32 %10, 0
  br i1 %.not28, label %12, label %23

12:                                               ; preds = %.lr.ph
  %13 = icmp eq i32 %9, %0
  %14 = tail call noundef i32 @_Z5solvei(i32 noundef %.033)
  br i1 %13, label %15, label %18

15:                                               ; preds = %12
  %16 = sub nsw i32 %.02432, %14
  %17 = srem i32 %16, 2008
  br label %23

18:                                               ; preds = %12
  %19 = tail call noundef i32 @_Z5solvei(i32 noundef %11)
  %20 = add nuw nsw i32 %14, %19
  %21 = sub nsw i32 %.02432, %20
  %22 = srem i32 %21, 2008
  br label %23

23:                                               ; preds = %15, %18, %.lr.ph
  %.1 = phi i32 [ %.02432, %.lr.ph ], [ %17, %15 ], [ %22, %18 ]
  %24 = add nuw nsw i32 %.033, 1
  %25 = mul nuw nsw i32 %24, %24
  %.not = icmp sgt i32 %25, %0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

26:                                               ; preds = %1, %._crit_edge
  %.025 = phi i32 [ %8, %._crit_edge ], [ 2, %1 ]
  ret i32 %.025
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass