; LLVM IR from trabucayre/openFPGALoader :: src/lattice.ll (ZN7Lattice7checkIDEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Device = type <{ ptr, ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i8, i8, i8, i8 }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

@.str.647 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.648 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.649 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152), i64 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152), i8 noundef zeroext, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i1 noundef zeroext) #3 align 2

declare void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef, i8 noundef zeroext) #2

declare void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7Lattice7checkIDEv(ptr noundef nonnull align 8 dereferenceable(152) %0) #3 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca [4 x i8], align 1
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  %6 = call i32 (ptr, ...) @printf(ptr noundef @.str.647)
  %7 = call i32 (ptr, ...) @printf(ptr noundef @.str.648)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.memset.p0.i64(ptr align 1 %3, i8 0, i64 4, i1 false)
  %8 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  %9 = call noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152) %5, i8 noundef zeroext -30, ptr noundef %8, i32 noundef 4, ptr noundef null, i32 noundef 0, i1 noundef zeroext false)
  %10 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %11 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193) %11, i32 noundef 1, i8 noundef zeroext 1)
  %12 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %13 = load ptr, ptr %12, align 8, !tbaa !9
  call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %13, i32 noundef 1000)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %14 = call noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152) %5)
  %15 = trunc i64 %14 to i32
  store i32 %15, ptr %4, align 4, !tbaa !16
  %16 = load i32, ptr %4, align 4, !tbaa !16
  %17 = zext i32 %16 to i64
  call void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152) %5, i64 noundef %17)
  %18 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 3
  store i8 97, ptr %18, align 1, !tbaa !18
  %19 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 2
  store i8 43, ptr %19, align 1, !tbaa !18
  %20 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 1
  store i8 -48, ptr %20, align 1, !tbaa !18
  %21 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  store i8 67, ptr %21, align 1, !tbaa !18
  %22 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  %23 = call noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152) %5, i8 noundef zeroext -30, ptr noundef %22, i32 noundef 4, ptr noundef null, i32 noundef 0, i1 noundef zeroext false)
  %24 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %25 = load ptr, ptr %24, align 8, !tbaa !9
  call void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193) %25, i32 noundef 1, i8 noundef zeroext 1)
  %26 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %27 = load ptr, ptr %26, align 8, !tbaa !9
  call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %27, i32 noundef 1000)
  %28 = call noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152) %5)
  %29 = trunc i64 %28 to i32
  store i32 %29, ptr %4, align 4, !tbaa !16
  %30 = load i32, ptr %4, align 4, !tbaa !16
  %31 = zext i32 %30 to i64
  call void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152) %5, i64 noundef %31)
  %32 = load i32, ptr %4, align 4, !tbaa !16
  %33 = call i32 (ptr, ...) @printf(ptr noundef @.str.649, i32 noundef %32)
  %34 = call i32 (ptr, ...) @printf(ptr noundef @.str.647)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i1 true
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS6Device", !6, i64 8, !11, i64 16, !11, i64 48, !14, i64 80, !15, i64 84, !15, i64 85, !15, i64 86}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !13, i64 8, !7, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"_ZTSN6Device9prog_modeE", !7, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.647 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.648 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.649 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152), i8 noundef zeroext, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i1 noundef zeroext) local_unnamed_addr #2 align 2

declare void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef, i8 noundef zeroext) local_unnamed_addr #3

declare void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7Lattice7checkIDEv(ptr noundef nonnull align 8 dereferenceable(152) %0) local_unnamed_addr #2 align 2 {
  %2 = alloca [4 x i8], align 4
  %3 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.647)
  %4 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.648)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  store i32 0, ptr %2, align 4
  %5 = call noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152) %0, i8 noundef zeroext -30, ptr noundef nonnull %2, i32 noundef 4, ptr noundef null, i32 noundef 0, i1 noundef zeroext false)
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193) %7, i32 noundef 1, i8 noundef zeroext 1)
  %8 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %8, i32 noundef 1000)
  %9 = call noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152) %0)
  %10 = and i64 %9, 4294967295
  call void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152) %0, i64 noundef %10)
  store <4 x i8> <i8 67, i8 -48, i8 43, i8 97>, ptr %2, align 4, !tbaa !15
  %11 = call noundef zeroext i1 @_ZN7Lattice5wr_rdEhPhiS0_ib(ptr noundef nonnull align 8 dereferenceable(152) %0, i8 noundef zeroext -30, ptr noundef nonnull %2, i32 noundef 4, ptr noundef null, i32 noundef 0, i1 noundef zeroext false)
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4Jtag9set_stateENS_10tapState_tEh(ptr noundef nonnull align 8 dereferenceable(193) %12, i32 noundef 1, i8 noundef zeroext 1)
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %13, i32 noundef 1000)
  %14 = call noundef i64 @_ZN7Lattice13readStatusRegEv(ptr noundef nonnull align 8 dereferenceable(152) %0)
  %15 = trunc i64 %14 to i32
  %16 = and i64 %14, 4294967295
  call void @_ZN7Lattice14displayReadRegEm(ptr noundef nonnull align 8 dereferenceable(152) %0, i64 noundef %16)
  %17 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.649, i32 noundef %15)
  %18 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.647)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  ret i1 true
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS6Device", !7, i64 8, !10, i64 16, !10, i64 48, !13, i64 80, !14, i64 84, !14, i64 85, !14, i64 86}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !11, i64 0, !12, i64 8, !8, i64 16}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !7, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!"_ZTSN6Device9prog_modeE", !8, i64 0}
!14 = !{!"bool", !8, i64 0}
!15 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,TailCallElimPass