; LLVM IR from imeplusplus/icpc-notebook :: graphs/dinic.ll (Z7recoverv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.edge = type { i32, i32, i32 }

@edgs = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4edgeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7recoverv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %4

4:                                                ; preds = %30, %0
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef i64 @_ZNKSt6vectorI4edgeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @edgs) #2
  %8 = icmp ult i64 %6, %7
  br i1 %8, label %10, label %9

9:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %33

10:                                               ; preds = %4
  %11 = load i32, ptr %1, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %12) #2
  %14 = getelementptr inbounds %struct.edge, ptr %13, i32 0, i32 2
  %15 = load i32, ptr %14, align 4, !tbaa !9
  %16 = icmp sgt i32 %15, 0
  br i1 %16, label %17, label %29

17:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %19) #2
  %21 = getelementptr inbounds %struct.edge, ptr %20, i32 0, i32 0
  %22 = load i32, ptr %21, align 4, !tbaa !11
  store i32 %22, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %23 = load i32, ptr %1, align 4, !tbaa !5
  %24 = xor i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %25) #2
  %27 = getelementptr inbounds %struct.edge, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 4, !tbaa !11
  store i32 %28, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %29

29:                                               ; preds = %17, %10
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %1, align 4, !tbaa !5
  %32 = add nsw i32 %31, 2
  store i32 %32, ptr %1, align 4, !tbaa !5
  br label %4, !llvm.loop !12

33:                                               ; preds = %9
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@edgs = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4edgeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7recoverv() local_unnamed_addr #0 {
  %1 = tail call noundef i64 @_ZNKSt6vectorI4edgeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @edgs) #1
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %10, %0
  ret void

.lr.ph:                                           ; preds = %0, %10
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ 0, %0 ]
  %2 = tail call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %indvars.iv) #1
  %3 = getelementptr inbounds i8, ptr %2, i64 8
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %6, label %10

6:                                                ; preds = %.lr.ph
  %7 = tail call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %indvars.iv) #1
  %8 = or disjoint i64 %indvars.iv, 1
  %9 = tail call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edgs, i64 noundef %8) #1
  br label %10

10:                                               ; preds = %.lr.ph, %6
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
  %11 = tail call noundef i64 @_ZNKSt6vectorI4edgeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @edgs) #1
  %12 = icmp ugt i64 %11, %indvars.iv.next
  br i1 %12, label %.lr.ph, label %._crit_edge, !llvm.loop !10
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS4edge", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass