; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (usb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @USB_WritePacket(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2, i16 noundef zeroext %3, i8 noundef zeroext %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i16, align 2
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i8 %2, ptr %8, align 1, !tbaa !9
  store i16 %3, ptr %9, align 2, !tbaa !10
  store i8 %4, ptr %10, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = ptrtoint ptr %15 to i32
  store i32 %16, ptr %11, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %17, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %18 = load i8, ptr %10, align 1, !tbaa !9
  %19 = zext i8 %18 to i32
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %48

21:                                               ; preds = %5
  %22 = load i16, ptr %9, align 2, !tbaa !10
  %23 = zext i16 %22 to i32
  %24 = add i32 %23, 3
  %25 = udiv i32 %24, 4
  store i32 %25, ptr %13, align 4, !tbaa !12
  store i32 0, ptr %14, align 4, !tbaa !12
  br label %26

26:                                               ; preds = %44, %21
  %27 = load i32, ptr %14, align 4, !tbaa !12
  %28 = load i32, ptr %13, align 4, !tbaa !12
  %29 = icmp ult i32 %27, %28
  br i1 %29, label %30, label %47

30:                                               ; preds = %26
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  %32 = load i32, ptr %31, align 4, !tbaa !12
  %33 = load i32, ptr %11, align 4, !tbaa !12
  %34 = zext i32 %33 to i64
  %35 = add i64 %34, 4096
  %36 = load i8, ptr %8, align 1, !tbaa !9
  %37 = zext i8 %36 to i32
  %38 = zext i32 %37 to i64
  %39 = mul i64 %38, 4096
  %40 = add i64 %35, %39
  %41 = inttoptr i64 %40 to ptr
  store volatile i32 %32, ptr %41, align 4, !tbaa !12
  %42 = load ptr, ptr %12, align 8, !tbaa !5
  %43 = getelementptr inbounds i32, ptr %42, i32 1
  store ptr %43, ptr %12, align 8, !tbaa !5
  br label %44

44:                                               ; preds = %30
  %45 = load i32, ptr %14, align 4, !tbaa !12
  %46 = add i32 %45, 1
  store i32 %46, ptr %14, align 4, !tbaa !12
  br label %26, !llvm.loop !14

47:                                               ; preds = %26
  br label %48

48:                                               ; preds = %47, %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  ret i32 0
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local noundef i32 @USB_WritePacket(ptr noundef %0, ptr nocapture noundef readonly %1, i8 noundef zeroext %2, i16 noundef zeroext %3, i8 noundef zeroext %4) local_unnamed_addr #0 {
  %6 = ptrtoint ptr %0 to i64
  %7 = icmp ne i8 %4, 0
  %.not = icmp eq i16 %3, 0
  %or.cond = or i1 %7, %.not
  br i1 %or.cond, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %8 = zext i16 %3 to i32
  %9 = add nuw nsw i32 %8, 3
  %10 = lshr i32 %9, 2
  %11 = and i64 %6, 4294967295
  %12 = add nuw nsw i64 %11, 4096
  %13 = zext i8 %2 to i64
  %14 = shl nuw nsw i64 %13, 12
  %15 = add nuw nsw i64 %12, %14
  %16 = inttoptr i64 %15 to ptr
  %17 = add nsw i32 %10, -1
  %xtraiter = and i32 %10, 7
  %18 = icmp ult i32 %17, 7
  br i1 %18, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i32 %10, 32760
  br label %19

19:                                               ; preds = %19, %.lr.ph.new
  %.01011 = phi ptr [ %1, %.lr.ph.new ], [ %35, %19 ]
  %niter = phi i32 [ 0, %.lr.ph.new ], [ %niter.next.7, %19 ]
  %20 = load i32, ptr %.01011, align 4, !tbaa !5
  store volatile i32 %20, ptr %16, align 4, !tbaa !5
  %21 = getelementptr inbounds i8, ptr %.01011, i64 4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  store volatile i32 %22, ptr %16, align 4, !tbaa !5
  %23 = getelementptr inbounds i8, ptr %.01011, i64 8
  %24 = load i32, ptr %23, align 4, !tbaa !5
  store volatile i32 %24, ptr %16, align 4, !tbaa !5
  %25 = getelementptr inbounds i8, ptr %.01011, i64 12
  %26 = load i32, ptr %25, align 4, !tbaa !5
  store volatile i32 %26, ptr %16, align 4, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %.01011, i64 16
  %28 = load i32, ptr %27, align 4, !tbaa !5
  store volatile i32 %28, ptr %16, align 4, !tbaa !5
  %29 = getelementptr inbounds i8, ptr %.01011, i64 20
  %30 = load i32, ptr %29, align 4, !tbaa !5
  store volatile i32 %30, ptr %16, align 4, !tbaa !5
  %31 = getelementptr inbounds i8, ptr %.01011, i64 24
  %32 = load i32, ptr %31, align 4, !tbaa !5
  store volatile i32 %32, ptr %16, align 4, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %.01011, i64 28
  %34 = load i32, ptr %33, align 4, !tbaa !5
  store volatile i32 %34, ptr %16, align 4, !tbaa !5
  %35 = getelementptr inbounds i8, ptr %.01011, i64 32
  %niter.next.7 = add i32 %niter, 8
  %niter.ncmp.7 = icmp eq i32 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %.loopexit.loopexit.unr-lcssa, label %19, !llvm.loop !9

.loopexit.loopexit.unr-lcssa:                     ; preds = %19, %.lr.ph
  %.01011.unr = phi ptr [ %1, %.lr.ph ], [ %35, %19 ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.epil.preheader

.epil.preheader:                                  ; preds = %.loopexit.loopexit.unr-lcssa, %.epil.preheader
  %.01011.epil = phi ptr [ %37, %.epil.preheader ], [ %.01011.unr, %.loopexit.loopexit.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.epil.preheader ], [ 0, %.loopexit.loopexit.unr-lcssa ]
  %36 = load i32, ptr %.01011.epil, align 4, !tbaa !5
  store volatile i32 %36, ptr %16, align 4, !tbaa !5
  %37 = getelementptr inbounds i8, ptr %.01011.epil, i64 4
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.loopexit, label %.epil.preheader, !llvm.loop !11

.loopexit:                                        ; preds = %.loopexit.loopexit.unr-lcssa, %.epil.preheader, %5
  ret i32 0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass