; LLVM IR from b00dle/libpcc :: src/BitVecArray.ll (ZN11BitVecArray4initE8BitCountS0_S0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.BitVecArray = type <{ %"class.std::vector", i32, i32, i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Vec<unsigned long>, std::allocator<Vec<unsigned long>>>::_Vector_impl" }
%"struct.std::_Vector_base<Vec<unsigned long>, std::allocator<Vec<unsigned long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Vec<unsigned long>, std::allocator<Vec<unsigned long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Vec<unsigned long>, std::allocator<Vec<unsigned long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11BitVecArray4initE8BitCountS0_S0_(ptr noundef nonnull align 8 dereferenceable(36) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %9 = load ptr, ptr %5, align 8
  call void @_ZN11BitVecArray5clearEv(ptr noundef nonnull align 8 dereferenceable(36) %9)
  %10 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 1
  %11 = load i32, ptr %10, align 8, !tbaa !11
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = icmp eq i32 %11, %12
  br i1 %13, label %14, label %25

14:                                               ; preds = %4
  %15 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 2
  %16 = load i32, ptr %15, align 4, !tbaa !17
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %25

19:                                               ; preds = %14
  %20 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 3
  %21 = load i32, ptr %20, align 8, !tbaa !18
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = icmp eq i32 %21, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %19
  br label %32

25:                                               ; preds = %19, %14, %4
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 1
  store i32 %26, ptr %27, align 8, !tbaa !11
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 2
  store i32 %28, ptr %29, align 4, !tbaa !17
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = getelementptr inbounds %class.BitVecArray, ptr %9, i32 0, i32 3
  store i32 %30, ptr %31, align 8, !tbaa !18
  br label %32

32:                                               ; preds = %25, %24
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN11BitVecArray5clearEv(ptr noundef nonnull align 8 dereferenceable(36)) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS8BitCount", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"_ZTS11BitVecArray", !13, i64 0, !10, i64 24, !10, i64 28, !10, i64 32}
!13 = !{!"_ZTSSt6vectorI3VecImESaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI3VecImESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI3VecImESaIS1_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI3VecImESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!12, !10, i64 28}
!18 = !{!12, !10, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN11BitVecArray4initE8BitCountS0_S0_(ptr noundef nonnull align 8 dereferenceable(36) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 align 2 {
  tail call void @_ZN11BitVecArray5clearEv(ptr noundef nonnull align 8 dereferenceable(36) %0)
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, %1
  %8 = getelementptr inbounds i8, ptr %0, i64 28
  %9 = load i32, ptr %8, align 4
  %10 = icmp eq i32 %9, %2
  %or.cond = select i1 %7, i1 %10, i1 false
  %11 = getelementptr inbounds i8, ptr %0, i64 32
  %12 = load i32, ptr %11, align 8
  %13 = icmp eq i32 %12, %3
  %or.cond10 = select i1 %or.cond, i1 %13, i1 false
  br i1 %or.cond10, label %15, label %14

14:                                               ; preds = %4
  store i32 %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !15
  store i32 %3, ptr %11, align 8, !tbaa !16
  br label %15

15:                                               ; preds = %4, %14
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN11BitVecArray5clearEv(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 24}
!6 = !{!"_ZTS11BitVecArray", !7, i64 0, !14, i64 24, !14, i64 28, !14, i64 32}
!7 = !{!"_ZTSSt6vectorI3VecImESaIS1_EE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseI3VecImESaIS1_EE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseI3VecImESaIS1_EE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI3VecImESaIS1_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTS8BitCount", !12, i64 0}
!15 = !{!6, !14, i64 28}
!16 = !{!6, !14, i64 32}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass