; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__USART_HandleTypeDef = type { ptr, %struct.USART_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i16, i16, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.USART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_USART_Transmit_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %8, i32 0, i32 18
  %10 = load volatile i32, ptr %9, align 4, !tbaa !11
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %111

12:                                               ; preds = %3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %19, label %15

15:                                               ; preds = %12
  %16 = load i16, ptr %7, align 2, !tbaa !9
  %17 = zext i16 %16 to i32
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %15, %12
  store i32 1, ptr %4, align 4
  br label %112

20:                                               ; preds = %15
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %22, i32 0, i32 17
  %24 = load i32, ptr %23, align 8, !tbaa !15
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 2, ptr %4, align 4
  br label %112

27:                                               ; preds = %21
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %28, i32 0, i32 17
  store i32 1, ptr %29, align 8, !tbaa !15
  br label %30

30:                                               ; preds = %27
  br label %31

31:                                               ; preds = %30
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %33, i32 0, i32 2
  store ptr %32, ptr %34, align 8, !tbaa !16
  %35 = load i16, ptr %7, align 2, !tbaa !9
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %36, i32 0, i32 3
  store i16 %35, ptr %37, align 8, !tbaa !17
  %38 = load i16, ptr %7, align 2, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %39, i32 0, i32 4
  store volatile i16 %38, ptr %40, align 2, !tbaa !18
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %41, i32 0, i32 14
  store ptr null, ptr %42, align 8, !tbaa !19
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %43, i32 0, i32 19
  store volatile i32 0, ptr %44, align 8, !tbaa !20
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %45, i32 0, i32 18
  store volatile i32 18, ptr %46, align 4, !tbaa !11
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %47, i32 0, i32 12
  %49 = load i32, ptr %48, align 8, !tbaa !21
  %50 = zext i32 %49 to i64
  %51 = icmp eq i64 %50, 536870912
  br i1 %51, label %52, label %81

52:                                               ; preds = %31
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %53, i32 0, i32 1
  %55 = getelementptr inbounds %struct.USART_InitTypeDef, ptr %54, i32 0, i32 1
  %56 = load i32, ptr %55, align 4, !tbaa !22
  %57 = icmp eq i32 %56, 4096
  br i1 %57, label %58, label %67

58:                                               ; preds = %52
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %59, i32 0, i32 1
  %61 = getelementptr inbounds %struct.USART_InitTypeDef, ptr %60, i32 0, i32 3
  %62 = load i32, ptr %61, align 4, !tbaa !23
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %64, label %67

64:                                               ; preds = %58
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %65, i32 0, i32 14
  store ptr @USART_TxISR_16BIT_FIFOEN, ptr %66, align 8, !tbaa !19
  br label %70

67:                                               ; preds = %58, %52
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %68, i32 0, i32 14
  store ptr @USART_TxISR_8BIT_FIFOEN, ptr %69, align 8, !tbaa !19
  br label %70

70:                                               ; preds = %67, %64
  br label %71

71:                                               ; preds = %70
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %72, i32 0, i32 17
  store i32 0, ptr %73, align 8, !tbaa !15
  br label %74

74:                                               ; preds = %71
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %75, i32 0, i32 0
  %77 = load ptr, ptr %76, align 8, !tbaa !24
  %78 = getelementptr inbounds %struct.USART_TypeDef, ptr %77, i32 0, i32 2
  %79 = load volatile i32, ptr %78, align 4, !tbaa !25
  %80 = or i32 %79, 8388608
  store volatile i32 %80, ptr %78, align 4, !tbaa !25
  br label %110

81:                                               ; preds = %31
  %82 = load ptr, ptr %5, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %82, i32 0, i32 1
  %84 = getelementptr inbounds %struct.USART_InitTypeDef, ptr %83, i32 0, i32 1
  %85 = load i32, ptr %84, align 4, !tbaa !22
  %86 = icmp eq i32 %85, 4096
  br i1 %86, label %87, label %96

87:                                               ; preds = %81
  %88 = load ptr, ptr %5, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %88, i32 0, i32 1
  %90 = getelementptr inbounds %struct.USART_InitTypeDef, ptr %89, i32 0, i32 3
  %91 = load i32, ptr %90, align 4, !tbaa !23
  %92 = icmp eq i32 %91, 0
  br i1 %92, label %93, label %96

93:                                               ; preds = %87
  %94 = load ptr, ptr %5, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %94, i32 0, i32 14
  store ptr @USART_TxISR_16BIT, ptr %95, align 8, !tbaa !19
  br label %99

96:                                               ; preds = %87, %81
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %97, i32 0, i32 14
  store ptr @USART_TxISR_8BIT, ptr %98, align 8, !tbaa !19
  br label %99

99:                                               ; preds = %96, %93
  br label %100

100:                                              ; preds = %99
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %101, i32 0, i32 17
  store i32 0, ptr %102, align 8, !tbaa !15
  br label %103

103:                                              ; preds = %100
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %104, i32 0, i32 0
  %106 = load ptr, ptr %105, align 8, !tbaa !24
  %107 = getelementptr inbounds %struct.USART_TypeDef, ptr %106, i32 0, i32 0
  %108 = load volatile i32, ptr %107, align 4, !tbaa !27
  %109 = or i32 %108, 128
  store volatile i32 %109, ptr %107, align 4, !tbaa !27
  br label %110

110:                                              ; preds = %103, %74
  store i32 0, ptr %4, align 4
  br label %112

111:                                              ; preds = %3
  store i32 2, ptr %4, align 4
  br label %112

112:                                              ; preds = %111, %110, %26, %19
  %113 = load i32, ptr %4, align 4
  ret i32 %113
}

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_16BIT_FIFOEN(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_8BIT_FIFOEN(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_16BIT(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_8BIT(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 132}
!12 = !{!"__USART_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 48, !10, i64 56, !10, i64 58, !6, i64 64, !10, i64 72, !10, i64 74, !10, i64 76, !10, i64 78, !10, i64 80, !14, i64 84, !14, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !14, i64 128, !14, i64 132, !14, i64 136}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !14, i64 128}
!16 = !{!12, !6, i64 48}
!17 = !{!12, !10, i64 56}
!18 = !{!12, !10, i64 58}
!19 = !{!12, !6, i64 104}
!20 = !{!12, !14, i64 136}
!21 = !{!12, !14, i64 88}
!22 = !{!12, !14, i64 12}
!23 = !{!12, !14, i64 20}
!24 = !{!12, !6, i64 0}
!25 = !{!26, !14, i64 8}
!26 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44}
!27 = !{!26, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_USART_Transmit_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 132
  %5 = load volatile i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %7, label %45

7:                                                ; preds = %3
  %8 = icmp eq ptr %1, null
  %9 = icmp eq i16 %2, 0
  %or.cond = or i1 %8, %9
  br i1 %or.cond, label %45, label %10

10:                                               ; preds = %7
  %11 = getelementptr inbounds i8, ptr %0, i64 128
  %12 = load i32, ptr %11, align 8, !tbaa !13
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %45, label %14

14:                                               ; preds = %10
  %15 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %1, ptr %15, align 8, !tbaa !14
  %16 = getelementptr inbounds i8, ptr %0, i64 56
  store i16 %2, ptr %16, align 8, !tbaa !15
  %17 = getelementptr inbounds i8, ptr %0, i64 58
  store volatile i16 %2, ptr %17, align 2, !tbaa !16
  %18 = getelementptr inbounds i8, ptr %0, i64 104
  %19 = getelementptr inbounds i8, ptr %0, i64 136
  store volatile i32 0, ptr %19, align 8, !tbaa !17
  store volatile i32 18, ptr %4, align 4, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %0, i64 88
  %21 = load i32, ptr %20, align 8, !tbaa !18
  %22 = icmp eq i32 %21, 536870912
  %23 = getelementptr inbounds i8, ptr %0, i64 12
  %24 = load i32, ptr %23, align 4, !tbaa !19
  %25 = icmp eq i32 %24, 4096
  br i1 %22, label %26, label %35

26:                                               ; preds = %14
  br i1 %25, label %27, label %31

27:                                               ; preds = %26
  %28 = getelementptr inbounds i8, ptr %0, i64 20
  %29 = load i32, ptr %28, align 4, !tbaa !20
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %32, label %31

31:                                               ; preds = %27, %26
  br label %32

32:                                               ; preds = %27, %31
  %storemerge30 = phi ptr [ @USART_TxISR_8BIT_FIFOEN, %31 ], [ @USART_TxISR_16BIT_FIFOEN, %27 ]
  store ptr %storemerge30, ptr %18, align 8, !tbaa !21
  store i32 0, ptr %11, align 8, !tbaa !13
  %33 = load ptr, ptr %0, align 8, !tbaa !22
  %34 = getelementptr inbounds i8, ptr %33, i64 8
  br label %.sink.split

35:                                               ; preds = %14
  br i1 %25, label %36, label %40

36:                                               ; preds = %35
  %37 = getelementptr inbounds i8, ptr %0, i64 20
  %38 = load i32, ptr %37, align 4, !tbaa !20
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %41, label %40

40:                                               ; preds = %36, %35
  br label %41

41:                                               ; preds = %36, %40
  %storemerge = phi ptr [ @USART_TxISR_8BIT, %40 ], [ @USART_TxISR_16BIT, %36 ]
  store ptr %storemerge, ptr %18, align 8, !tbaa !21
  store i32 0, ptr %11, align 8, !tbaa !13
  %42 = load ptr, ptr %0, align 8, !tbaa !22
  br label %.sink.split

.sink.split:                                      ; preds = %41, %32
  %.sink = phi ptr [ %34, %32 ], [ %42, %41 ]
  %.sink33 = phi i32 [ 8388608, %32 ], [ 128, %41 ]
  %43 = load volatile i32, ptr %.sink, align 4, !tbaa !23
  %44 = or i32 %43, %.sink33
  store volatile i32 %44, ptr %.sink, align 4, !tbaa !23
  br label %45

45:                                               ; preds = %.sink.split, %3, %10, %7
  %.0 = phi i32 [ 1, %7 ], [ 2, %10 ], [ 2, %3 ], [ 0, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_16BIT_FIFOEN(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_8BIT_FIFOEN(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_16BIT(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @USART_TxISR_8BIT(ptr noundef) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 132}
!6 = !{!"__USART_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 48, !12, i64 56, !12, i64 58, !7, i64 64, !12, i64 72, !12, i64 74, !12, i64 76, !12, i64 78, !12, i64 80, !11, i64 84, !11, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !11, i64 128, !11, i64 132, !11, i64 136}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 128}
!14 = !{!6, !7, i64 48}
!15 = !{!6, !12, i64 56}
!16 = !{!6, !12, i64 58}
!17 = !{!6, !11, i64 136}
!18 = !{!6, !11, i64 88}
!19 = !{!6, !11, i64 12}
!20 = !{!6, !11, i64 20}
!21 = !{!6, !7, i64 104}
!22 = !{!6, !7, i64 0}
!23 = !{!11, !11, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass