; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@TimerIdxToTimerId = external hidden global [6 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_SimpleBaseStart_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %14, i32 0, i32 4
  %16 = load volatile i32, ptr %15, align 8, !tbaa !11
  %17 = icmp eq i32 %16, 2
  br i1 %17, label %18, label %19

18:                                               ; preds = %5
  store i32 2, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

19:                                               ; preds = %5
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %20, i32 0, i32 4
  %22 = load volatile i32, ptr %21, align 8, !tbaa !11
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %38

24:                                               ; preds = %19
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %33, label %27

27:                                               ; preds = %24
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %33, label %30

30:                                               ; preds = %27
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %30, %27, %24
  store i32 1, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

34:                                               ; preds = %30
  %35 = load ptr, ptr %7, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %35, i32 0, i32 4
  store volatile i32 2, ptr %36, align 8, !tbaa !11
  br label %37

37:                                               ; preds = %34
  br label %38

38:                                               ; preds = %37, %19
  br label %39

39:                                               ; preds = %38
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %40, i32 0, i32 3
  %42 = load i32, ptr %41, align 4, !tbaa !14
  %43 = icmp eq i32 %42, 1
  br i1 %43, label %44, label %45

44:                                               ; preds = %39
  store i32 2, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

45:                                               ; preds = %39
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %46, i32 0, i32 3
  store i32 1, ptr %47, align 4, !tbaa !14
  br label %48

48:                                               ; preds = %45
  br label %49

49:                                               ; preds = %48
  br label %50

50:                                               ; preds = %49
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = load i32, ptr %8, align 4, !tbaa !9
  %53 = call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef %51, i32 noundef %52)
  store ptr %53, ptr %12, align 8, !tbaa !5
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  %55 = icmp eq ptr %54, null
  br i1 %55, label %56, label %64

56:                                               ; preds = %50
  %57 = load ptr, ptr %7, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %57, i32 0, i32 4
  store volatile i32 7, ptr %58, align 8, !tbaa !11
  br label %59

59:                                               ; preds = %56
  %60 = load ptr, ptr %7, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %60, i32 0, i32 3
  store i32 0, ptr %61, align 4, !tbaa !14
  br label %62

62:                                               ; preds = %59
  br label %63

63:                                               ; preds = %62
  store i32 1, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

64:                                               ; preds = %50
  %65 = load i32, ptr %8, align 4, !tbaa !9
  %66 = icmp eq i32 %65, 5
  br i1 %66, label %67, label %70

67:                                               ; preds = %64
  %68 = load ptr, ptr %12, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %68, i32 0, i32 5
  store ptr @HRTIM_DMAMasterCplt, ptr %69, align 8, !tbaa !15
  br label %73

70:                                               ; preds = %64
  %71 = load ptr, ptr %12, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %71, i32 0, i32 5
  store ptr @HRTIM_DMATimerxCplt, ptr %72, align 8, !tbaa !15
  br label %73

73:                                               ; preds = %70, %67
  %74 = load ptr, ptr %12, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %74, i32 0, i32 9
  store ptr @HRTIM_DMAError, ptr %75, align 8, !tbaa !18
  %76 = load ptr, ptr %12, align 8, !tbaa !5
  %77 = load i32, ptr %9, align 4, !tbaa !9
  %78 = load i32, ptr %10, align 4, !tbaa !9
  %79 = load i32, ptr %11, align 4, !tbaa !9
  %80 = call i32 @HAL_DMA_Start_IT(ptr noundef %76, i32 noundef %77, i32 noundef %78, i32 noundef %79)
  %81 = icmp ne i32 %80, 0
  br i1 %81, label %82, label %90

82:                                               ; preds = %73
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %83, i32 0, i32 4
  store volatile i32 7, ptr %84, align 8, !tbaa !11
  br label %85

85:                                               ; preds = %82
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %86, i32 0, i32 3
  store i32 0, ptr %87, align 4, !tbaa !14
  br label %88

88:                                               ; preds = %85
  br label %89

89:                                               ; preds = %88
  store i32 1, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

90:                                               ; preds = %73
  %91 = load i32, ptr %8, align 4, !tbaa !9
  %92 = icmp eq i32 %91, 5
  br i1 %92, label %93, label %103

93:                                               ; preds = %90
  %94 = load ptr, ptr %7, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %94, i32 0, i32 0
  %96 = load ptr, ptr %95, align 8, !tbaa !19
  %97 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %96, i32 0, i32 0
  %98 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %97, i32 0, i32 3
  %99 = load volatile i32, ptr %98, align 4, !tbaa !20
  %100 = zext i32 %99 to i64
  %101 = or i64 %100, 1048576
  %102 = trunc i64 %101 to i32
  store volatile i32 %102, ptr %98, align 4, !tbaa !20
  br label %116

103:                                              ; preds = %90
  %104 = load ptr, ptr %7, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %104, i32 0, i32 0
  %106 = load ptr, ptr %105, align 8, !tbaa !19
  %107 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %106, i32 0, i32 1
  %108 = load i32, ptr %8, align 4, !tbaa !9
  %109 = zext i32 %108 to i64
  %110 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %107, i64 0, i64 %109
  %111 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %110, i32 0, i32 3
  %112 = load volatile i32, ptr %111, align 4, !tbaa !24
  %113 = zext i32 %112 to i64
  %114 = or i64 %113, 1048576
  %115 = trunc i64 %114 to i32
  store volatile i32 %115, ptr %111, align 4, !tbaa !24
  br label %116

116:                                              ; preds = %103, %93
  %117 = load i32, ptr %8, align 4, !tbaa !9
  %118 = zext i32 %117 to i64
  %119 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !9
  %121 = load ptr, ptr %7, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %121, i32 0, i32 0
  %123 = load ptr, ptr %122, align 8, !tbaa !19
  %124 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %123, i32 0, i32 0
  %125 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %124, i32 0, i32 0
  %126 = load volatile i32, ptr %125, align 4, !tbaa !26
  %127 = or i32 %126, %120
  store volatile i32 %127, ptr %125, align 4, !tbaa !26
  %128 = load ptr, ptr %7, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %128, i32 0, i32 4
  store volatile i32 1, ptr %129, align 8, !tbaa !11
  br label %130

130:                                              ; preds = %116
  %131 = load ptr, ptr %7, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %131, i32 0, i32 3
  store i32 0, ptr %132, align 4, !tbaa !14
  br label %133

133:                                              ; preds = %130
  br label %134

134:                                              ; preds = %133
  store i32 0, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %135

135:                                              ; preds = %134, %89, %63, %44, %33, %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  %136 = load i32, ptr %6, align 4
  ret i32 %136
}

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAMasterCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMATimerxCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAError(ptr noundef) #1

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 200}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 196}
!15 = !{!16, !6, i64 72}
!16 = !{!"__DMA_HandleTypeDef", !6, i64 0, !17, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!18 = !{!16, !6, i64 104}
!19 = !{!12, !6, i64 0}
!20 = !{!21, !10, i64 12}
!21 = !{!"", !22, i64 0, !7, i64 128, !7, i64 768, !23, i64 896}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!23 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!24 = !{!25, !10, i64 12}
!25 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !7, i64 108}
!26 = !{!21, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }

@TimerIdxToTimerId = external hidden local_unnamed_addr global [6 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_SimpleBaseStart_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = getelementptr inbounds i8, ptr %0, i64 200
  %7 = load volatile i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, 2
  br i1 %8, label %46, label %9

9:                                                ; preds = %5
  %10 = load volatile i32, ptr %6, align 8, !tbaa !5
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %17

12:                                               ; preds = %9
  %13 = icmp eq i32 %2, 0
  %14 = icmp eq i32 %3, 0
  %or.cond = or i1 %13, %14
  %15 = icmp eq i32 %4, 0
  %or.cond3 = or i1 %or.cond, %15
  br i1 %or.cond3, label %46, label %16

16:                                               ; preds = %12
  store volatile i32 2, ptr %6, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %9, %16
  %18 = getelementptr inbounds i8, ptr %0, i64 196
  %19 = load i32, ptr %18, align 4, !tbaa !12
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %46, label %21

21:                                               ; preds = %17
  store i32 1, ptr %18, align 4, !tbaa !12
  %22 = tail call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef nonnull %0, i32 noundef %1)
  %23 = icmp eq ptr %22, null
  br i1 %23, label %.sink.split, label %24

24:                                               ; preds = %21
  %25 = icmp eq i32 %1, 5
  %26 = getelementptr inbounds i8, ptr %22, i64 72
  %27 = getelementptr inbounds i8, ptr %22, i64 104
  br i1 %25, label %28, label %.thread

28:                                               ; preds = %24
  store ptr @HRTIM_DMAMasterCplt, ptr %26, align 8, !tbaa !13
  store ptr @HRTIM_DMAError, ptr %27, align 8, !tbaa !16
  %29 = tail call i32 @HAL_DMA_Start_IT(ptr noundef nonnull %22, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2
  %.not = icmp eq i32 %29, 0
  br i1 %.not, label %31, label %.sink.split

.thread:                                          ; preds = %24
  store ptr @HRTIM_DMATimerxCplt, ptr %26, align 8, !tbaa !13
  store ptr @HRTIM_DMAError, ptr %27, align 8, !tbaa !16
  %30 = tail call i32 @HAL_DMA_Start_IT(ptr noundef nonnull %22, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2
  %.not36 = icmp eq i32 %30, 0
  br i1 %.not36, label %.thread37, label %.sink.split

31:                                               ; preds = %28
  %32 = load ptr, ptr %0, align 8, !tbaa !17
  %33 = getelementptr inbounds i8, ptr %32, i64 12
  br label %38

.thread37:                                        ; preds = %.thread
  %34 = load ptr, ptr %0, align 8, !tbaa !17
  %35 = getelementptr inbounds i8, ptr %34, i64 128
  %36 = zext i32 %1 to i64
  %37 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %35, i64 0, i64 %36, i32 3
  br label %38

38:                                               ; preds = %.thread37, %31
  %.sink = phi ptr [ %37, %.thread37 ], [ %33, %31 ]
  %39 = phi ptr [ %34, %.thread37 ], [ %32, %31 ]
  %.pre-phi = phi i64 [ %36, %.thread37 ], [ 5, %31 ]
  %40 = load volatile i32, ptr %.sink, align 4, !tbaa !18
  %41 = or i32 %40, 1048576
  store volatile i32 %41, ptr %.sink, align 4, !tbaa !18
  %42 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %.pre-phi
  %43 = load i32, ptr %42, align 4, !tbaa !18
  %44 = load volatile i32, ptr %39, align 4, !tbaa !19
  %45 = or i32 %44, %43
  store volatile i32 %45, ptr %39, align 4, !tbaa !19
  br label %.sink.split

.sink.split:                                      ; preds = %28, %.thread, %21, %38
  %.sink40 = phi i32 [ 1, %38 ], [ 7, %21 ], [ 7, %.thread ], [ 7, %28 ]
  %.0.ph = phi i32 [ 0, %38 ], [ 1, %21 ], [ 1, %.thread ], [ 1, %28 ]
  store volatile i32 %.sink40, ptr %6, align 8, !tbaa !5
  store i32 0, ptr %18, align 4, !tbaa !12
  br label %46

46:                                               ; preds = %.sink.split, %17, %12, %5
  %.0 = phi i32 [ 2, %5 ], [ 1, %12 ], [ 2, %17 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAMasterCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMATimerxCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 200}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 196}
!13 = !{!14, !7, i64 72}
!14 = !{!"__DMA_HandleTypeDef", !7, i64 0, !15, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!16 = !{!14, !7, i64 104}
!17 = !{!6, !7, i64 0}
!18 = !{!11, !11, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"", !21, i64 0, !8, i64 128, !8, i64 768, !22, i64 896}
!21 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!22 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass