; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/edge-impulse-sdk/CMSIS/NN/Source/FullyConnectedFunctions (s8)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_fully_connected_s8(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i16 noundef zeroext %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %10, ptr noundef %11, i32 noundef %12, i32 noundef %13, ptr noundef %14) #0 {
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i16, align 2
  %19 = alloca i16, align 2
  %20 = alloca i16, align 2
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca ptr, align 8
  %27 = alloca ptr, align 8
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca ptr, align 8
  %31 = alloca i32, align 4
  store ptr %0, ptr %16, align 8, !tbaa !5
  store ptr %1, ptr %17, align 8, !tbaa !5
  store i16 %2, ptr %18, align 2, !tbaa !9
  store i16 %3, ptr %19, align 2, !tbaa !9
  store i16 %4, ptr %20, align 2, !tbaa !9
  store i32 %5, ptr %21, align 4, !tbaa !11
  store i32 %6, ptr %22, align 4, !tbaa !11
  store i32 %7, ptr %23, align 4, !tbaa !11
  store i32 %8, ptr %24, align 4, !tbaa !11
  store i32 %9, ptr %25, align 4, !tbaa !11
  store ptr %10, ptr %26, align 8, !tbaa !5
  store ptr %11, ptr %27, align 8, !tbaa !5
  store i32 %12, ptr %28, align 4, !tbaa !11
  store i32 %13, ptr %29, align 4, !tbaa !11
  store ptr %14, ptr %30, align 8, !tbaa !5
  %32 = load ptr, ptr %30, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #3
  %33 = load i16, ptr %20, align 2, !tbaa !9
  %34 = zext i16 %33 to i32
  store i32 %34, ptr %31, align 4, !tbaa !11
  br label %35

35:                                               ; preds = %38, %15
  %36 = load i32, ptr %31, align 4, !tbaa !11
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %67

38:                                               ; preds = %35
  %39 = load ptr, ptr %16, align 8, !tbaa !5
  %40 = load ptr, ptr %17, align 8, !tbaa !5
  %41 = load ptr, ptr %26, align 8, !tbaa !5
  %42 = load ptr, ptr %27, align 8, !tbaa !5
  %43 = load i32, ptr %21, align 4, !tbaa !11
  %44 = load i32, ptr %22, align 4, !tbaa !11
  %45 = load i32, ptr %25, align 4, !tbaa !11
  %46 = load i32, ptr %23, align 4, !tbaa !11
  %47 = load i32, ptr %24, align 4, !tbaa !11
  %48 = load i16, ptr %18, align 2, !tbaa !9
  %49 = zext i16 %48 to i32
  %50 = load i16, ptr %19, align 2, !tbaa !9
  %51 = zext i16 %50 to i32
  %52 = load i32, ptr %28, align 4, !tbaa !11
  %53 = load i32, ptr %29, align 4, !tbaa !11
  %54 = call i32 @arm_nn_vec_mat_mult_t_s8(ptr noundef %39, ptr noundef %40, ptr noundef %41, ptr noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef %47, i32 noundef %49, i32 noundef %51, i32 noundef %52, i32 noundef %53)
  %55 = load i16, ptr %18, align 2, !tbaa !9
  %56 = zext i16 %55 to i32
  %57 = load ptr, ptr %16, align 8, !tbaa !5
  %58 = sext i32 %56 to i64
  %59 = getelementptr inbounds i8, ptr %57, i64 %58
  store ptr %59, ptr %16, align 8, !tbaa !5
  %60 = load i16, ptr %19, align 2, !tbaa !9
  %61 = zext i16 %60 to i32
  %62 = load ptr, ptr %27, align 8, !tbaa !5
  %63 = sext i32 %61 to i64
  %64 = getelementptr inbounds i8, ptr %62, i64 %63
  store ptr %64, ptr %27, align 8, !tbaa !5
  %65 = load i32, ptr %31, align 4, !tbaa !11
  %66 = add nsw i32 %65, -1
  store i32 %66, ptr %31, align 4, !tbaa !11
  br label %35, !llvm.loop !13

67:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #3
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @arm_nn_vec_mat_mult_t_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @arm_fully_connected_s8(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i16 noundef zeroext %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %10, ptr noundef %11, i32 noundef %12, i32 noundef %13, ptr nocapture noundef readnone %14) local_unnamed_addr #0 {
  %.not22 = icmp eq i16 %4, 0
  br i1 %.not22, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %15
  %16 = zext i16 %4 to i32
  %17 = zext i16 %2 to i32
  %18 = zext i16 %3 to i32
  %19 = zext i16 %2 to i64
  %20 = zext i16 %3 to i64
  br label %21

21:                                               ; preds = %.lr.ph, %21
  %.025 = phi i32 [ %16, %.lr.ph ], [ %25, %21 ]
  %.02024 = phi ptr [ %0, %.lr.ph ], [ %23, %21 ]
  %.02123 = phi ptr [ %11, %.lr.ph ], [ %24, %21 ]
  %22 = tail call i32 @arm_nn_vec_mat_mult_t_s8(ptr noundef %.02024, ptr noundef %1, ptr noundef %10, ptr noundef %.02123, i32 noundef %5, i32 noundef %6, i32 noundef %9, i32 noundef %7, i32 noundef %8, i32 noundef %17, i32 noundef %18, i32 noundef %12, i32 noundef %13) #2
  %23 = getelementptr inbounds i8, ptr %.02024, i64 %19
  %24 = getelementptr inbounds i8, ptr %.02123, i64 %20
  %25 = add nsw i32 %.025, -1
  %.not = icmp eq i32 %25, 0
  br i1 %.not, label %._crit_edge, label %21, !llvm.loop !5

._crit_edge:                                      ; preds = %21, %15
  ret i32 0
}

declare i32 @arm_nn_vec_mat_mult_t_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass