; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (CRSGetSynchronizationInfo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRS_TypeDef = type { i32, i32, i32, i32 }
%struct.RCC_CRSSynchroInfoTypeDef = type { i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RCCEx_CRSGetSynchronizationInfo(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 1), align 4, !tbaa !9
  %4 = zext i32 %3 to i64
  %5 = and i64 %4, 65535
  %6 = trunc i64 %5 to i32
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.RCC_CRSSynchroInfoTypeDef, ptr %7, i32 0, i32 0
  store i32 %6, ptr %8, align 4, !tbaa !12
  %9 = load volatile i32, ptr inttoptr (i64 1073775616 to ptr), align 4, !tbaa !12
  %10 = zext i32 %9 to i64
  %11 = and i64 %10, 16128
  %12 = lshr i64 %11, 8
  %13 = trunc i64 %12 to i32
  %14 = load ptr, ptr %2, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.RCC_CRSSynchroInfoTypeDef, ptr %14, i32 0, i32 1
  store i32 %13, ptr %15, align 4, !tbaa !9
  %16 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !13
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, 4294901760
  %19 = lshr i64 %18, 16
  %20 = trunc i64 %19 to i32
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.RCC_CRSSynchroInfoTypeDef, ptr %21, i32 0, i32 2
  store i32 %20, ptr %22, align 4, !tbaa !13
  %23 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !13
  %24 = zext i32 %23 to i64
  %25 = and i64 %24, 32768
  %26 = trunc i64 %25 to i32
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.RCC_CRSSynchroInfoTypeDef, ptr %27, i32 0, i32 3
  store i32 %26, ptr %28, align 4, !tbaa !14
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !11, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local void @HAL_RCCEx_CRSGetSynchronizationInfo(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
  %2 = load volatile i32, ptr inttoptr (i64 1073775620 to ptr), align 4, !tbaa !5
  %3 = and i32 %2, 65535
  store i32 %3, ptr %0, align 4, !tbaa !10
  %4 = load volatile i32, ptr inttoptr (i64 1073775616 to ptr), align 1024, !tbaa !10
  %5 = lshr i32 %4, 8
  %6 = and i32 %5, 63
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %6, ptr %7, align 4, !tbaa !5
  %8 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !11
  %9 = lshr i32 %8, 16
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %9, ptr %10, align 4, !tbaa !11
  %11 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !11
  %12 = and i32 %11, 32768
  %13 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 %12, ptr %13, align 4, !tbaa !12
  ret void
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass