; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (GetPeriphCLKFreq)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PLL1_ClocksTypeDef = type { i32, i32, i32 }
%struct.PLL2_ClocksTypeDef = type { i32, i32, i32 }
%struct.PLL3_ClocksTypeDef = type { i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca %struct.PLL1_ClocksTypeDef, align 4
  %4 = alloca %struct.PLL2_ClocksTypeDef, align 4
  %5 = alloca %struct.PLL3_ClocksTypeDef, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 12, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 12, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 256
  br i1 %11, label %12, label %52

12:                                               ; preds = %1
  %13 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 20), align 4, !tbaa !9
  %14 = zext i32 %13 to i64
  %15 = and i64 %14, 7
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  switch i32 %17, label %50 [
    i32 0, label %18
    i32 1, label %21
    i32 2, label %24
    i32 4, label %27
    i32 3, label %49
  ]

18:                                               ; preds = %12
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef %3)
  %19 = getelementptr inbounds %struct.PLL1_ClocksTypeDef, ptr %3, i32 0, i32 1
  %20 = load i32, ptr %19, align 4, !tbaa !11
  store i32 %20, ptr %6, align 4, !tbaa !5
  br label %51

21:                                               ; preds = %12
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %22 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %23 = load i32, ptr %22, align 4, !tbaa !13
  store i32 %23, ptr %6, align 4, !tbaa !5
  br label %51

24:                                               ; preds = %12
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %25 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 0
  %26 = load i32, ptr %25, align 4, !tbaa !13
  store i32 %26, ptr %6, align 4, !tbaa !5
  br label %51

27:                                               ; preds = %12
  %28 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %29 = zext i32 %28 to i64
  %30 = and i64 %29, 805306368
  %31 = trunc i64 %30 to i32
  store i32 %31, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %27
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %48

35:                                               ; preds = %27
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = zext i32 %36 to i64
  %38 = icmp eq i64 %37, 268435456
  br i1 %38, label %39, label %40

39:                                               ; preds = %35
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %47

40:                                               ; preds = %35
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = zext i32 %41 to i64
  %43 = icmp eq i64 %42, 536870912
  br i1 %43, label %44, label %45

44:                                               ; preds = %40
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %46

45:                                               ; preds = %40
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %45, %44
  br label %47

47:                                               ; preds = %46, %39
  br label %48

48:                                               ; preds = %47, %34
  br label %51

49:                                               ; preds = %12
  store i32 12288000, ptr %6, align 4, !tbaa !5
  br label %51

50:                                               ; preds = %12
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %51

51:                                               ; preds = %50, %49, %48, %24, %21, %18
  br label %269

52:                                               ; preds = %1
  %53 = load i32, ptr %2, align 4, !tbaa !5
  %54 = icmp eq i32 %53, 512
  br i1 %54, label %55, label %95

55:                                               ; preds = %52
  %56 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 20), align 4, !tbaa !9
  %57 = zext i32 %56 to i64
  %58 = and i64 %57, 448
  %59 = trunc i64 %58 to i32
  store i32 %59, ptr %7, align 4, !tbaa !5
  %60 = load i32, ptr %7, align 4, !tbaa !5
  switch i32 %60, label %93 [
    i32 0, label %61
    i32 64, label %64
    i32 128, label %67
    i32 256, label %70
    i32 192, label %92
  ]

61:                                               ; preds = %55
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef %3)
  %62 = getelementptr inbounds %struct.PLL1_ClocksTypeDef, ptr %3, i32 0, i32 1
  %63 = load i32, ptr %62, align 4, !tbaa !11
  store i32 %63, ptr %6, align 4, !tbaa !5
  br label %94

64:                                               ; preds = %55
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %65 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %66 = load i32, ptr %65, align 4, !tbaa !13
  store i32 %66, ptr %6, align 4, !tbaa !5
  br label %94

67:                                               ; preds = %55
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %68 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 0
  %69 = load i32, ptr %68, align 4, !tbaa !13
  store i32 %69, ptr %6, align 4, !tbaa !5
  br label %94

70:                                               ; preds = %55
  %71 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %72 = zext i32 %71 to i64
  %73 = and i64 %72, 805306368
  %74 = trunc i64 %73 to i32
  store i32 %74, ptr %8, align 4, !tbaa !5
  %75 = load i32, ptr %8, align 4, !tbaa !5
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %78

77:                                               ; preds = %70
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %91

78:                                               ; preds = %70
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = zext i32 %79 to i64
  %81 = icmp eq i64 %80, 268435456
  br i1 %81, label %82, label %83

82:                                               ; preds = %78
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %90

83:                                               ; preds = %78
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = zext i32 %84 to i64
  %86 = icmp eq i64 %85, 536870912
  br i1 %86, label %87, label %88

87:                                               ; preds = %83
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %89

88:                                               ; preds = %83
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %89

89:                                               ; preds = %88, %87
  br label %90

90:                                               ; preds = %89, %82
  br label %91

91:                                               ; preds = %90, %77
  br label %94

92:                                               ; preds = %55
  store i32 12288000, ptr %6, align 4, !tbaa !5
  br label %94

93:                                               ; preds = %55
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %94

94:                                               ; preds = %93, %92, %91, %67, %64, %61
  br label %268

95:                                               ; preds = %52
  %96 = load i32, ptr %2, align 4, !tbaa !5
  %97 = icmp eq i32 %96, 1024
  br i1 %97, label %98, label %138

98:                                               ; preds = %95
  %99 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 22), align 4, !tbaa !15
  %100 = zext i32 %99 to i64
  %101 = and i64 %100, 14680064
  %102 = trunc i64 %101 to i32
  store i32 %102, ptr %7, align 4, !tbaa !5
  %103 = load i32, ptr %7, align 4, !tbaa !5
  switch i32 %103, label %136 [
    i32 0, label %104
    i32 2097152, label %107
    i32 4194304, label %110
    i32 8388608, label %113
    i32 6291456, label %135
  ]

104:                                              ; preds = %98
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef %3)
  %105 = getelementptr inbounds %struct.PLL1_ClocksTypeDef, ptr %3, i32 0, i32 1
  %106 = load i32, ptr %105, align 4, !tbaa !11
  store i32 %106, ptr %6, align 4, !tbaa !5
  br label %137

107:                                              ; preds = %98
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %108 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %109 = load i32, ptr %108, align 4, !tbaa !13
  store i32 %109, ptr %6, align 4, !tbaa !5
  br label %137

110:                                              ; preds = %98
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %111 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 0
  %112 = load i32, ptr %111, align 4, !tbaa !13
  store i32 %112, ptr %6, align 4, !tbaa !5
  br label %137

113:                                              ; preds = %98
  %114 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %115 = zext i32 %114 to i64
  %116 = and i64 %115, 805306368
  %117 = trunc i64 %116 to i32
  store i32 %117, ptr %8, align 4, !tbaa !5
  %118 = load i32, ptr %8, align 4, !tbaa !5
  %119 = icmp eq i32 %118, 0
  br i1 %119, label %120, label %121

120:                                              ; preds = %113
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %134

121:                                              ; preds = %113
  %122 = load i32, ptr %8, align 4, !tbaa !5
  %123 = zext i32 %122 to i64
  %124 = icmp eq i64 %123, 268435456
  br i1 %124, label %125, label %126

125:                                              ; preds = %121
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %133

126:                                              ; preds = %121
  %127 = load i32, ptr %8, align 4, !tbaa !5
  %128 = zext i32 %127 to i64
  %129 = icmp eq i64 %128, 536870912
  br i1 %129, label %130, label %131

130:                                              ; preds = %126
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %132

131:                                              ; preds = %126
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %132

132:                                              ; preds = %131, %130
  br label %133

133:                                              ; preds = %132, %125
  br label %134

134:                                              ; preds = %133, %120
  br label %137

135:                                              ; preds = %98
  store i32 12288000, ptr %6, align 4, !tbaa !5
  br label %137

136:                                              ; preds = %98
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %137

137:                                              ; preds = %136, %135, %134, %110, %107, %104
  br label %267

138:                                              ; preds = %95
  %139 = load i32, ptr %2, align 4, !tbaa !5
  %140 = icmp eq i32 %139, 2048
  br i1 %140, label %141, label %181

141:                                              ; preds = %138
  %142 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 22), align 4, !tbaa !15
  %143 = zext i32 %142 to i64
  %144 = and i64 %143, 117440512
  %145 = trunc i64 %144 to i32
  store i32 %145, ptr %7, align 4, !tbaa !5
  %146 = load i32, ptr %7, align 4, !tbaa !5
  switch i32 %146, label %179 [
    i32 0, label %147
    i32 16777216, label %150
    i32 33554432, label %153
    i32 67108864, label %156
    i32 50331648, label %178
  ]

147:                                              ; preds = %141
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef %3)
  %148 = getelementptr inbounds %struct.PLL1_ClocksTypeDef, ptr %3, i32 0, i32 1
  %149 = load i32, ptr %148, align 4, !tbaa !11
  store i32 %149, ptr %6, align 4, !tbaa !5
  br label %180

150:                                              ; preds = %141
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %151 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %152 = load i32, ptr %151, align 4, !tbaa !13
  store i32 %152, ptr %6, align 4, !tbaa !5
  br label %180

153:                                              ; preds = %141
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %154 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 0
  %155 = load i32, ptr %154, align 4, !tbaa !13
  store i32 %155, ptr %6, align 4, !tbaa !5
  br label %180

156:                                              ; preds = %141
  %157 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %158 = zext i32 %157 to i64
  %159 = and i64 %158, 805306368
  %160 = trunc i64 %159 to i32
  store i32 %160, ptr %8, align 4, !tbaa !5
  %161 = load i32, ptr %8, align 4, !tbaa !5
  %162 = icmp eq i32 %161, 0
  br i1 %162, label %163, label %164

163:                                              ; preds = %156
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %177

164:                                              ; preds = %156
  %165 = load i32, ptr %8, align 4, !tbaa !5
  %166 = zext i32 %165 to i64
  %167 = icmp eq i64 %166, 268435456
  br i1 %167, label %168, label %169

168:                                              ; preds = %164
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %176

169:                                              ; preds = %164
  %170 = load i32, ptr %8, align 4, !tbaa !5
  %171 = zext i32 %170 to i64
  %172 = icmp eq i64 %171, 536870912
  br i1 %172, label %173, label %174

173:                                              ; preds = %169
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %175

174:                                              ; preds = %169
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %175

175:                                              ; preds = %174, %173
  br label %176

176:                                              ; preds = %175, %168
  br label %177

177:                                              ; preds = %176, %163
  br label %180

178:                                              ; preds = %141
  store i32 12288000, ptr %6, align 4, !tbaa !5
  br label %180

179:                                              ; preds = %141
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %180

180:                                              ; preds = %179, %178, %177, %153, %150, %147
  br label %266

181:                                              ; preds = %138
  %182 = load i32, ptr %2, align 4, !tbaa !5
  %183 = icmp eq i32 %182, 4096
  br i1 %183, label %184, label %224

184:                                              ; preds = %181
  %185 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 20), align 4, !tbaa !9
  %186 = zext i32 %185 to i64
  %187 = and i64 %186, 28672
  %188 = trunc i64 %187 to i32
  store i32 %188, ptr %9, align 4, !tbaa !5
  %189 = load i32, ptr %9, align 4, !tbaa !5
  switch i32 %189, label %222 [
    i32 0, label %190
    i32 4096, label %193
    i32 8192, label %196
    i32 16384, label %199
    i32 12288, label %221
  ]

190:                                              ; preds = %184
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef %3)
  %191 = getelementptr inbounds %struct.PLL1_ClocksTypeDef, ptr %3, i32 0, i32 1
  %192 = load i32, ptr %191, align 4, !tbaa !11
  store i32 %192, ptr %6, align 4, !tbaa !5
  br label %223

193:                                              ; preds = %184
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %194 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %195 = load i32, ptr %194, align 4, !tbaa !13
  store i32 %195, ptr %6, align 4, !tbaa !5
  br label %223

196:                                              ; preds = %184
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %197 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 0
  %198 = load i32, ptr %197, align 4, !tbaa !13
  store i32 %198, ptr %6, align 4, !tbaa !5
  br label %223

199:                                              ; preds = %184
  %200 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %201 = zext i32 %200 to i64
  %202 = and i64 %201, 805306368
  %203 = trunc i64 %202 to i32
  store i32 %203, ptr %8, align 4, !tbaa !5
  %204 = load i32, ptr %8, align 4, !tbaa !5
  %205 = icmp eq i32 %204, 0
  br i1 %205, label %206, label %207

206:                                              ; preds = %199
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %220

207:                                              ; preds = %199
  %208 = load i32, ptr %8, align 4, !tbaa !5
  %209 = zext i32 %208 to i64
  %210 = icmp eq i64 %209, 268435456
  br i1 %210, label %211, label %212

211:                                              ; preds = %207
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %219

212:                                              ; preds = %207
  %213 = load i32, ptr %8, align 4, !tbaa !5
  %214 = zext i32 %213 to i64
  %215 = icmp eq i64 %214, 536870912
  br i1 %215, label %216, label %217

216:                                              ; preds = %212
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %218

217:                                              ; preds = %212
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %218

218:                                              ; preds = %217, %216
  br label %219

219:                                              ; preds = %218, %211
  br label %220

220:                                              ; preds = %219, %206
  br label %223

221:                                              ; preds = %184
  store i32 12288000, ptr %6, align 4, !tbaa !5
  br label %223

222:                                              ; preds = %184
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %223

223:                                              ; preds = %222, %221, %220, %196, %193, %190
  br label %265

224:                                              ; preds = %181
  %225 = load i32, ptr %2, align 4, !tbaa !5
  %226 = icmp eq i32 %225, 524288
  br i1 %226, label %227, label %263

227:                                              ; preds = %224
  %228 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 22), align 4, !tbaa !15
  %229 = zext i32 %228 to i64
  %230 = and i64 %229, 196608
  %231 = trunc i64 %230 to i32
  store i32 %231, ptr %9, align 4, !tbaa !5
  %232 = load i32, ptr %9, align 4, !tbaa !5
  switch i32 %232, label %261 [
    i32 0, label %233
    i32 65536, label %236
    i32 131072, label %239
  ]

233:                                              ; preds = %227
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef %4)
  %234 = getelementptr inbounds %struct.PLL2_ClocksTypeDef, ptr %4, i32 0, i32 0
  %235 = load i32, ptr %234, align 4, !tbaa !13
  store i32 %235, ptr %6, align 4, !tbaa !5
  br label %262

236:                                              ; preds = %227
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef %5)
  %237 = getelementptr inbounds %struct.PLL3_ClocksTypeDef, ptr %5, i32 0, i32 2
  %238 = load i32, ptr %237, align 4, !tbaa !16
  store i32 %238, ptr %6, align 4, !tbaa !5
  br label %262

239:                                              ; preds = %227
  %240 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 19), align 4, !tbaa !14
  %241 = zext i32 %240 to i64
  %242 = and i64 %241, 805306368
  %243 = trunc i64 %242 to i32
  store i32 %243, ptr %8, align 4, !tbaa !5
  %244 = load i32, ptr %8, align 4, !tbaa !5
  %245 = icmp eq i32 %244, 0
  br i1 %245, label %246, label %247

246:                                              ; preds = %239
  store i32 64000000, ptr %6, align 4, !tbaa !5
  br label %260

247:                                              ; preds = %239
  %248 = load i32, ptr %8, align 4, !tbaa !5
  %249 = zext i32 %248 to i64
  %250 = icmp eq i64 %249, 268435456
  br i1 %250, label %251, label %252

251:                                              ; preds = %247
  store i32 4000000, ptr %6, align 4, !tbaa !5
  br label %259

252:                                              ; preds = %247
  %253 = load i32, ptr %8, align 4, !tbaa !5
  %254 = zext i32 %253 to i64
  %255 = icmp eq i64 %254, 536870912
  br i1 %255, label %256, label %257

256:                                              ; preds = %252
  store i32 16000000, ptr %6, align 4, !tbaa !5
  br label %258

257:                                              ; preds = %252
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %258

258:                                              ; preds = %257, %256
  br label %259

259:                                              ; preds = %258, %251
  br label %260

260:                                              ; preds = %259, %246
  br label %262

261:                                              ; preds = %227
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %262

262:                                              ; preds = %261, %260, %236, %233
  br label %264

263:                                              ; preds = %224
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %264

264:                                              ; preds = %263, %262
  br label %265

265:                                              ; preds = %264, %223
  br label %266

266:                                              ; preds = %265, %180
  br label %267

267:                                              ; preds = %266, %137
  br label %268

268:                                              ; preds = %267, %94
  br label %269

269:                                              ; preds = %268, %51
  %270 = load i32, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr %3) #2
  ret i32 %270
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 80}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !7, i64 172, !6, i64 208, !6, i64 212, !6, i64 216, !6, i64 220, !6, i64 224, !6, i64 228, !6, i64 232, !6, i64 236, !6, i64 240, !6, i64 244, !6, i64 248, !6, i64 252, !6, i64 256, !6, i64 260, !6, i64 264, !6, i64 268, !6, i64 272, !6, i64 276, !6, i64 280, !6, i64 284, !7, i64 288}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!10, !6, i64 76}
!15 = !{!10, !6, i64 88}
!16 = !{!12, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PLL1_ClocksTypeDef = type { i32, i32, i32 }
%struct.PLL2_ClocksTypeDef = type { i32, i32, i32 }
%struct.PLL3_ClocksTypeDef = type { i32, i32, i32 }

@switch.table.HAL_RCCEx_GetPeriphCLKFreq.5 = private unnamed_addr constant [4 x i32] [i32 64000000, i32 4000000, i32 16000000, i32 0], align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RCCEx_GetPeriphCLKFreq(i32 noundef %0) local_unnamed_addr #1 {
  %2 = alloca %struct.PLL1_ClocksTypeDef, align 4
  %3 = alloca %struct.PLL2_ClocksTypeDef, align 4
  %4 = alloca %struct.PLL3_ClocksTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #2
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #2
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #2
  switch i32 %0, label %97 [
    i32 256, label %5
    i32 512, label %20
    i32 1024, label %36
    i32 2048, label %52
    i32 4096, label %68
    i32 524288, label %84
  ]

5:                                                ; preds = %1
  %6 = load volatile i32, ptr inttoptr (i64 1476543568 to ptr), align 16, !tbaa !5
  %7 = and i32 %6, 7
  switch i32 %7, label %19 [
    i32 0, label %8
    i32 1, label %11
    i32 2, label %13
    i32 4, label %switch.lookup
    i32 3, label %97
  ]

8:                                                ; preds = %5
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef nonnull %2)
  %9 = getelementptr inbounds i8, ptr %2, i64 4
  %10 = load i32, ptr %9, align 4, !tbaa !10
  br label %97

11:                                               ; preds = %5
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %12 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

13:                                               ; preds = %5
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %14 = load i32, ptr %4, align 4, !tbaa !12
  br label %97

switch.lookup:                                    ; preds = %5
  %15 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %16 = lshr i32 %15, 28
  %17 = and i32 %16, 3
  %18 = zext nneg i32 %17 to i64
  %switch.gep = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %18
  %switch.load = load i32, ptr %switch.gep, align 4
  br label %97

default.unreachable:                              ; preds = %84
  unreachable

19:                                               ; preds = %5
  br label %97

20:                                               ; preds = %1
  %21 = load volatile i32, ptr inttoptr (i64 1476543568 to ptr), align 16, !tbaa !5
  %22 = lshr i32 %21, 6
  %23 = and i32 %22, 7
  switch i32 %23, label %35 [
    i32 0, label %24
    i32 1, label %27
    i32 2, label %29
    i32 4, label %switch.lookup50
    i32 3, label %97
  ]

24:                                               ; preds = %20
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef nonnull %2)
  %25 = getelementptr inbounds i8, ptr %2, i64 4
  %26 = load i32, ptr %25, align 4, !tbaa !10
  br label %97

27:                                               ; preds = %20
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %28 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

29:                                               ; preds = %20
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %30 = load i32, ptr %4, align 4, !tbaa !12
  br label %97

switch.lookup50:                                  ; preds = %20
  %31 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %32 = lshr i32 %31, 28
  %33 = and i32 %32, 3
  %34 = zext nneg i32 %33 to i64
  %switch.gep51 = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %34
  %switch.load52 = load i32, ptr %switch.gep51, align 4
  br label %97

35:                                               ; preds = %20
  br label %97

36:                                               ; preds = %1
  %37 = load volatile i32, ptr inttoptr (i64 1476543576 to ptr), align 8, !tbaa !14
  %38 = lshr i32 %37, 21
  %39 = and i32 %38, 7
  switch i32 %39, label %51 [
    i32 0, label %40
    i32 1, label %43
    i32 2, label %45
    i32 4, label %switch.lookup53
    i32 3, label %97
  ]

40:                                               ; preds = %36
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef nonnull %2)
  %41 = getelementptr inbounds i8, ptr %2, i64 4
  %42 = load i32, ptr %41, align 4, !tbaa !10
  br label %97

43:                                               ; preds = %36
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %44 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

45:                                               ; preds = %36
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %46 = load i32, ptr %4, align 4, !tbaa !12
  br label %97

switch.lookup53:                                  ; preds = %36
  %47 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %48 = lshr i32 %47, 28
  %49 = and i32 %48, 3
  %50 = zext nneg i32 %49 to i64
  %switch.gep54 = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %50
  %switch.load55 = load i32, ptr %switch.gep54, align 4
  br label %97

51:                                               ; preds = %36
  br label %97

52:                                               ; preds = %1
  %53 = load volatile i32, ptr inttoptr (i64 1476543576 to ptr), align 8, !tbaa !14
  %54 = lshr i32 %53, 24
  %55 = and i32 %54, 7
  switch i32 %55, label %67 [
    i32 0, label %56
    i32 1, label %59
    i32 2, label %61
    i32 4, label %switch.lookup56
    i32 3, label %97
  ]

56:                                               ; preds = %52
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef nonnull %2)
  %57 = getelementptr inbounds i8, ptr %2, i64 4
  %58 = load i32, ptr %57, align 4, !tbaa !10
  br label %97

59:                                               ; preds = %52
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %60 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

61:                                               ; preds = %52
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %62 = load i32, ptr %4, align 4, !tbaa !12
  br label %97

switch.lookup56:                                  ; preds = %52
  %63 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %64 = lshr i32 %63, 28
  %65 = and i32 %64, 3
  %66 = zext nneg i32 %65 to i64
  %switch.gep57 = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %66
  %switch.load58 = load i32, ptr %switch.gep57, align 4
  br label %97

67:                                               ; preds = %52
  br label %97

68:                                               ; preds = %1
  %69 = load volatile i32, ptr inttoptr (i64 1476543568 to ptr), align 16, !tbaa !5
  %70 = lshr i32 %69, 12
  %71 = and i32 %70, 7
  switch i32 %71, label %83 [
    i32 0, label %72
    i32 1, label %75
    i32 2, label %77
    i32 4, label %switch.lookup59
    i32 3, label %97
  ]

72:                                               ; preds = %68
  call void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef nonnull %2)
  %73 = getelementptr inbounds i8, ptr %2, i64 4
  %74 = load i32, ptr %73, align 4, !tbaa !10
  br label %97

75:                                               ; preds = %68
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %76 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

77:                                               ; preds = %68
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %78 = load i32, ptr %4, align 4, !tbaa !12
  br label %97

switch.lookup59:                                  ; preds = %68
  %79 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %80 = lshr i32 %79, 28
  %81 = and i32 %80, 3
  %82 = zext nneg i32 %81 to i64
  %switch.gep60 = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %82
  %switch.load61 = load i32, ptr %switch.gep60, align 4
  br label %97

83:                                               ; preds = %68
  br label %97

84:                                               ; preds = %1
  %85 = load volatile i32, ptr inttoptr (i64 1476543576 to ptr), align 8, !tbaa !14
  %86 = lshr i32 %85, 16
  %87 = and i32 %86, 3
  switch i32 %87, label %default.unreachable [
    i32 0, label %88
    i32 1, label %90
    i32 2, label %switch.lookup62
    i32 3, label %97
  ]

88:                                               ; preds = %84
  call void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef nonnull %3)
  %89 = load i32, ptr %3, align 4, !tbaa !12
  br label %97

90:                                               ; preds = %84
  call void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef nonnull %4)
  %91 = getelementptr inbounds i8, ptr %4, i64 8
  %92 = load i32, ptr %91, align 4, !tbaa !15
  br label %97

switch.lookup62:                                  ; preds = %84
  %93 = load volatile i32, ptr inttoptr (i64 1476543564 to ptr), align 4, !tbaa !13
  %94 = lshr i32 %93, 28
  %95 = and i32 %94, 3
  %96 = zext nneg i32 %95 to i64
  %switch.gep63 = getelementptr inbounds [4 x i32], ptr @switch.table.HAL_RCCEx_GetPeriphCLKFreq.5, i64 0, i64 %96
  %switch.load64 = load i32, ptr %switch.gep63, align 4
  br label %97

97:                                               ; preds = %switch.lookup62, %switch.lookup59, %switch.lookup56, %switch.lookup53, %switch.lookup50, %switch.lookup, %1, %84, %68, %52, %36, %20, %5, %35, %29, %27, %24, %67, %61, %59, %56, %90, %88, %72, %75, %77, %83, %40, %43, %45, %51, %8, %11, %13, %19
  %.0 = phi i32 [ 0, %19 ], [ %14, %13 ], [ %12, %11 ], [ %10, %8 ], [ 0, %35 ], [ %30, %29 ], [ %28, %27 ], [ %26, %24 ], [ 0, %51 ], [ %46, %45 ], [ %44, %43 ], [ %42, %40 ], [ 0, %67 ], [ %62, %61 ], [ %60, %59 ], [ %58, %56 ], [ 0, %83 ], [ %78, %77 ], [ %76, %75 ], [ %74, %72 ], [ %92, %90 ], [ %89, %88 ], [ 12288000, %5 ], [ 12288000, %20 ], [ 12288000, %36 ], [ 12288000, %52 ], [ 12288000, %68 ], [ 0, %84 ], [ 0, %1 ], [ %switch.load, %switch.lookup ], [ %switch.load52, %switch.lookup50 ], [ %switch.load55, %switch.lookup53 ], [ %switch.load58, %switch.lookup56 ], [ %switch.load61, %switch.lookup59 ], [ %switch.load64, %switch.lookup62 ]
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #2
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL1ClockFreq(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL2ClockFreq(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RCCEx_GetPLL3ClockFreq(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 80}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!11, !7, i64 0}
!13 = !{!6, !7, i64 76}
!14 = !{!6, !7, i64 88}
!15 = !{!11, !7, i64 8}


; Effective O3 passes: ConstantMergePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SCCPPass,SROAPass,SimplifyCFGPass