; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/src/dev/sr_595.ll (ZN16ShiftRegister5953SetEhb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ShiftRegister595 = type { [3 x %struct.dsy_gpio], [16 x i8], i64 }
%struct.dsy_gpio = type { %struct.dsy_gpio_pin, i32, i32 }
%struct.dsy_gpio_pin = type { i32, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN16ShiftRegister5953SetEhb(ptr noundef nonnull align 8 dereferenceable(72) %0, i8 noundef zeroext %1, i1 noundef zeroext %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %9 = zext i1 %2 to i8
  store i8 %9, ptr %6, align 1, !tbaa !10
  %10 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %11 = load i8, ptr %5, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = sdiv i32 %12, 8
  %14 = trunc i32 %13 to i8
  store i8 %14, ptr %7, align 1, !tbaa !9
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = srem i32 %16, 8
  %18 = trunc i32 %17 to i8
  store i8 %18, ptr %8, align 1, !tbaa !9
  %19 = load i8, ptr %6, align 1, !tbaa !10, !range !12, !noundef !13
  %20 = trunc i8 %19 to i1
  br i1 %20, label %21, label %33

21:                                               ; preds = %3
  %22 = load i8, ptr %8, align 1, !tbaa !9
  %23 = zext i8 %22 to i32
  %24 = shl i32 1, %23
  %25 = getelementptr inbounds %class.ShiftRegister595, ptr %10, i32 0, i32 1
  %26 = load i8, ptr %7, align 1, !tbaa !9
  %27 = zext i8 %26 to i64
  %28 = getelementptr inbounds [16 x i8], ptr %25, i64 0, i64 %27
  %29 = load i8, ptr %28, align 1, !tbaa !9
  %30 = zext i8 %29 to i32
  %31 = or i32 %30, %24
  %32 = trunc i32 %31 to i8
  store i8 %32, ptr %28, align 1, !tbaa !9
  br label %46

33:                                               ; preds = %3
  %34 = load i8, ptr %8, align 1, !tbaa !9
  %35 = zext i8 %34 to i32
  %36 = shl i32 1, %35
  %37 = xor i32 %36, -1
  %38 = getelementptr inbounds %class.ShiftRegister595, ptr %10, i32 0, i32 1
  %39 = load i8, ptr %7, align 1, !tbaa !9
  %40 = zext i8 %39 to i64
  %41 = getelementptr inbounds [16 x i8], ptr %38, i64 0, i64 %40
  %42 = load i8, ptr %41, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  %44 = and i32 %43, %37
  %45 = trunc i32 %44 to i8
  store i8 %45, ptr %41, align 1, !tbaa !9
  br label %46

46:                                               ; preds = %33, %21
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_ZN16ShiftRegister5953SetEhb(ptr nocapture noundef nonnull align 8 dereferenceable(72) %0, i8 noundef zeroext %1, i1 noundef zeroext %2) local_unnamed_addr #0 align 2 {
  %4 = lshr i8 %1, 3
  %5 = and i8 %1, 7
  %6 = shl nuw i8 1, %5
  br i1 %2, label %7, label %13

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 48
  %9 = zext nneg i8 %4 to i64
  %10 = getelementptr inbounds [16 x i8], ptr %8, i64 0, i64 %9
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %12 = or i8 %11, %6
  store i8 %12, ptr %10, align 1, !tbaa !5
  br label %20

13:                                               ; preds = %3
  %14 = xor i8 %6, -1
  %15 = getelementptr inbounds i8, ptr %0, i64 48
  %16 = zext nneg i8 %4 to i64
  %17 = getelementptr inbounds [16 x i8], ptr %15, i64 0, i64 %16
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %19 = and i8 %18, %14
  store i8 %19, ptr %17, align 1, !tbaa !5
  br label %20

20:                                               ; preds = %13, %7
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass