; LLVM IR from simbody/simbody :: SimTKcommon/Random/src/SFMT.ll (ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SimTK_SFMT::SFMTData" = type { [156 x %struct.W128_T], ptr, ptr, i32, i32, [4 x i32] }
%struct.W128_T = type { [4 x i32] }

@.str.1 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [81 x i8], align 1
@__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE = external hidden unnamed_addr constant [44 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZN10SimTK_SFMTL12gen_rand_allERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536) %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %4, i32 0, i32 4
  %6 = load i32, ptr %5, align 4, !tbaa !9
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  br label %11

9:                                                ; preds = %1
  call void @__assert_fail(ptr noundef @.str.1, ptr noundef @.str.2, i32 noundef 467, ptr noundef @__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE) #5
  unreachable

10:                                               ; No predecessors!
  br label %11

11:                                               ; preds = %10, %8
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %12, i32 0, i32 3
  %14 = load i32, ptr %13, align 8, !tbaa !12
  %15 = srem i32 %14, 2
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %11
  br label %20

18:                                               ; preds = %11
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.2, i32 noundef 468, ptr noundef @__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE) #5
  unreachable

19:                                               ; No predecessors!
  br label %20

20:                                               ; preds = %19, %17
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %21, i32 0, i32 3
  %23 = load i32, ptr %22, align 8, !tbaa !12
  %24 = icmp sge i32 %23, 624
  br i1 %24, label %25, label %29

25:                                               ; preds = %20
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  call void @_ZN10SimTK_SFMTL12gen_rand_allERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536) %26)
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %27, i32 0, i32 3
  store i32 0, ptr %28, align 8, !tbaa !12
  br label %29

29:                                               ; preds = %25, %20
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %30, i32 0, i32 2
  %32 = load ptr, ptr %31, align 8, !tbaa !13
  %33 = load ptr, ptr %2, align 8, !tbaa !5
  %34 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %33, i32 0, i32 3
  %35 = load i32, ptr %34, align 8, !tbaa !12
  %36 = sdiv i32 %35, 2
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds i64, ptr %32, i64 %37
  %39 = load i64, ptr %38, align 8, !tbaa !14
  store i64 %39, ptr %3, align 8, !tbaa !14
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.SimTK_SFMT::SFMTData", ptr %40, i32 0, i32 3
  %42 = load i32, ptr %41, align 8, !tbaa !12
  %43 = add nsw i32 %42, 2
  store i32 %43, ptr %41, align 8, !tbaa !12
  %44 = load i64, ptr %3, align 8, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret i64 %44
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 2516}
!10 = !{!"_ZTSN10SimTK_SFMT8SFMTDataE", !7, i64 0, !6, i64 2496, !6, i64 2504, !11, i64 2512, !11, i64 2516, !7, i64 2520}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 2512}
!13 = !{!10, !6, i64 2504}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [81 x i8], align 1
@__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE = external hidden unnamed_addr constant [44 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZN10SimTK_SFMTL12gen_rand_allERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536) %0) local_unnamed_addr #2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 2516
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %4, label %5

4:                                                ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, i32 noundef 467, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE) #3
  unreachable

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 2512
  %7 = load i32, ptr %6, align 8, !tbaa !11
  %8 = and i32 %7, 1
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %11, label %10

10:                                               ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.2, i32 noundef 468, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10SimTK_SFMT10gen_rand64ERNS_8SFMTDataE) #3
  unreachable

11:                                               ; preds = %5
  %12 = icmp sgt i32 %7, 623
  br i1 %12, label %13, label %14

13:                                               ; preds = %11
  tail call void @_ZN10SimTK_SFMTL12gen_rand_allERNS_8SFMTDataE(ptr noundef nonnull align 8 dereferenceable(2536) %0)
  br label %14

14:                                               ; preds = %13, %11
  %15 = phi i32 [ 0, %13 ], [ %7, %11 ]
  %16 = getelementptr inbounds i8, ptr %0, i64 2504
  %17 = load ptr, ptr %16, align 8, !tbaa !12
  %18 = ashr exact i32 %15, 1
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i64, ptr %17, i64 %19
  %21 = load i64, ptr %20, align 8, !tbaa !13
  %22 = add nsw i32 %15, 2
  store i32 %22, ptr %6, align 8, !tbaa !11
  ret i64 %21
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 2516}
!6 = !{!"_ZTSN10SimTK_SFMT8SFMTDataE", !7, i64 0, !9, i64 2496, !9, i64 2504, !10, i64 2512, !10, i64 2516, !7, i64 2520}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!6, !10, i64 2512}
!12 = !{!6, !9, i64 2504}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass