; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DeInit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CEC_HandleTypeDef = type { ptr, %struct.CEC_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32 }
%struct.CEC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i16, ptr }
%struct.CEC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CEC_DeInit(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  br label %45

7:                                                ; preds = %1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %8, i32 0, i32 6
  store i32 36, ptr %9, align 8, !tbaa !9
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_CEC_MspDeInit(ptr noundef %10)
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %11, i32 0, i32 0
  %13 = load ptr, ptr %12, align 8, !tbaa !14
  %14 = getelementptr inbounds %struct.CEC_TypeDef, ptr %13, i32 0, i32 0
  %15 = load volatile i32, ptr %14, align 4, !tbaa !15
  %16 = zext i32 %15 to i64
  %17 = and i64 %16, -2
  %18 = trunc i64 %17 to i32
  store volatile i32 %18, ptr %14, align 4, !tbaa !15
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %19, i32 0, i32 0
  %21 = load ptr, ptr %20, align 8, !tbaa !14
  %22 = getelementptr inbounds %struct.CEC_TypeDef, ptr %21, i32 0, i32 4
  %23 = load volatile i32, ptr %22, align 4, !tbaa !17
  %24 = zext i32 %23 to i64
  %25 = or i64 %24, 8191
  %26 = trunc i64 %25 to i32
  store volatile i32 %26, ptr %22, align 4, !tbaa !17
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !14
  %30 = getelementptr inbounds %struct.CEC_TypeDef, ptr %29, i32 0, i32 5
  %31 = load volatile i32, ptr %30, align 4, !tbaa !18
  %32 = zext i32 %31 to i64
  %33 = and i64 %32, -8192
  %34 = trunc i64 %33 to i32
  store volatile i32 %34, ptr %30, align 4, !tbaa !18
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %35, i32 0, i32 8
  store i32 0, ptr %36, align 8, !tbaa !19
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %37, i32 0, i32 6
  store i32 0, ptr %38, align 8, !tbaa !9
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %39, i32 0, i32 7
  store i32 0, ptr %40, align 4, !tbaa !20
  br label %41

41:                                               ; preds = %7
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %42, i32 0, i32 5
  store i32 0, ptr %43, align 4, !tbaa !21
  br label %44

44:                                               ; preds = %41
  store i32 0, ptr %2, align 4
  br label %45

45:                                               ; preds = %44, %6
  %46 = load i32, ptr %2, align 4
  ret i32 %46
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_CEC_MspDeInit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 72}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 56, !13, i64 64, !13, i64 66, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !13, i64 32, !6, i64 40}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !6, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!17 = !{!16, !12, i64 16}
!18 = !{!16, !12, i64 20}
!19 = !{!10, !12, i64 80}
!20 = !{!10, !12, i64 76}
!21 = !{!10, !12, i64 68}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_CEC_DeInit(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %15, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 36, ptr %4, align 8, !tbaa !5
  tail call void @HAL_CEC_MspDeInit(ptr noundef nonnull %0)
  %5 = load ptr, ptr %0, align 8, !tbaa !13
  %6 = load volatile i32, ptr %5, align 4, !tbaa !14
  %7 = and i32 %6, -2
  store volatile i32 %7, ptr %5, align 4, !tbaa !14
  %8 = getelementptr inbounds i8, ptr %5, i64 16
  %9 = load volatile i32, ptr %8, align 4, !tbaa !16
  %10 = or i32 %9, 8191
  store volatile i32 %10, ptr %8, align 4, !tbaa !16
  %11 = getelementptr inbounds i8, ptr %5, i64 20
  %12 = load volatile i32, ptr %11, align 4, !tbaa !17
  %13 = and i32 %12, -8192
  store volatile i32 %13, ptr %11, align 4, !tbaa !17
  %14 = getelementptr inbounds i8, ptr %0, i64 68
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %14, i8 0, i64 16, i1 false)
  br label %15

15:                                               ; preds = %1, %3
  %.0 = phi i32 [ 0, %3 ], [ 1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_CEC_MspDeInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 72}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !12, i64 32, !7, i64 40}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!16 = !{!15, !11, i64 16}
!17 = !{!15, !11, i64 20}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass