; LLVM IR from simbody/simbody :: SimTKcommon/src/ParallelWorkQueue.ll (ZN5SimTK21ParallelWorkQueueImplD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unique_lock" = type <{ ptr, i8, [7 x i8] }>
%"class.SimTK::ParallelWorkQueueImpl" = type { %"class.SimTK::PIMPLImplementation.base", i32, i32, i8, %"class.std::queue", %"class.std::mutex", %"class.std::condition_variable", %"class.std::condition_variable", %"class.SimTK::Array_" }
%"class.SimTK::PIMPLImplementation.base" = type <{ ptr, i32 }>
%"class.std::queue" = type { %"class.std::deque" }
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<SimTK::ParallelWorkQueue::Task *, std::allocator<SimTK::ParallelWorkQueue::Task *>>::_Deque_impl" }
%"struct.std::_Deque_base<SimTK::ParallelWorkQueue::Task *, std::allocator<SimTK::ParallelWorkQueue::Task *>>::_Deque_impl" = type { %"struct.std::_Deque_base<SimTK::ParallelWorkQueue::Task *, std::allocator<SimTK::ParallelWorkQueue::Task *>>::_Deque_impl_data" }
%"struct.std::_Deque_base<SimTK::ParallelWorkQueue::Task *, std::allocator<SimTK::ParallelWorkQueue::Task *>>::_Deque_impl_data" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::condition_variable" = type { %"class.std::__condvar" }
%"class.std::__condvar" = type { %union.pthread_cond_t }
%union.pthread_cond_t = type { %struct.__pthread_cond_s }
%struct.__pthread_cond_s = type { %union.__atomic_wide_counter, %union.__atomic_wide_counter, [2 x i32], [2 x i32], i32, i32, [2 x i32] }
%union.__atomic_wide_counter = type { i64 }
%"class.SimTK::Array_" = type { %"class.SimTK::ArrayView_" }
%"class.SimTK::ArrayView_" = type { %"class.SimTK::ArrayViewConst_" }
%"class.SimTK::ArrayViewConst_" = type { ptr, i32, i32 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN5SimTK6Array_ISt6threadjEixEj(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5SimTK6Array_ISt6threadjED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: nounwind
declare void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #4 align 2

; Function Attrs: nounwind
declare void @_ZN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEED2Ev(ptr noundef nonnull align 8 dereferenceable(12)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5SimTK21ParallelWorkQueueImplD2Ev(ptr noundef nonnull align 8 dereferenceable(256) %0) unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.std::unique_lock", align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #9
  %6 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 5
  invoke void @_ZNSt11unique_lockISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(9) %3, ptr noundef nonnull align 8 dereferenceable(40) %6)
          to label %7 unwind label %32

7:                                                ; preds = %1
  %8 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 3
  store i8 1, ptr %8, align 4, !tbaa !9
  %9 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 6
  call void @_ZNSt18condition_variable10notify_allEv(ptr noundef nonnull align 8 dereferenceable(48) %9) #9
  invoke void @_ZNSt11unique_lockISt5mutexE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9) %3)
          to label %10 unwind label %32

10:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #9
  store i32 0, ptr %4, align 4, !tbaa !28
  br label %11

11:                                               ; preds = %24, %10
  %12 = load i32, ptr %4, align 4, !tbaa !28
  %13 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 8
  %14 = invoke noundef i32 @_ZNK5SimTK6Array_ISt6threadjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %13)
          to label %15 unwind label %32

15:                                               ; preds = %11
  %16 = icmp slt i32 %12, %14
  br i1 %16, label %18, label %17

17:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #9
  br label %27

18:                                               ; preds = %15
  %19 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 8
  %20 = load i32, ptr %4, align 4, !tbaa !28
  %21 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN5SimTK6Array_ISt6threadjEixEj(ptr noundef nonnull align 8 dereferenceable(16) %19, i32 noundef %20)
          to label %22 unwind label %32

22:                                               ; preds = %18
  invoke void @_ZNSt6thread4joinEv(ptr noundef nonnull align 8 dereferenceable(8) %21)
          to label %23 unwind label %32

23:                                               ; preds = %22
  br label %24

24:                                               ; preds = %23
  %25 = load i32, ptr %4, align 4, !tbaa !28
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %4, align 4, !tbaa !28
  br label %11, !llvm.loop !29

27:                                               ; preds = %17
  call void @_ZNSt11unique_lockISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %3) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #9
  %28 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 8
  call void @_ZN5SimTK6Array_ISt6threadjED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %28) #9
  %29 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 7
  call void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48) %29) #9
  %30 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 6
  call void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48) %30) #9
  %31 = getelementptr inbounds %"class.SimTK::ParallelWorkQueueImpl", ptr %5, i32 0, i32 4
  call void @_ZNSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %31) #9
  call void @_ZN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEED2Ev(ptr noundef nonnull align 8 dereferenceable(12) %5) #9
  ret void

32:                                               ; preds = %22, %18, %11, %7, %1
  %33 = landingpad { ptr, i32 }
          catch ptr null
  %34 = extractvalue { ptr, i32 } %33, 0
  call void @__clang_call_terminate(ptr %34) #10
  unreachable
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #5 align 2

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) #6

; Function Attrs: nounwind
declare void @_ZNSt18condition_variable10notify_allEv(ptr noundef nonnull align 8 dereferenceable(48)) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9)) #5 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK6Array_ISt6threadjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #7 align 2

declare void @_ZNSt6thread4joinEv(ptr noundef nonnull align 8 dereferenceable(8)) #8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(9)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 20}
!10 = !{!"_ZTSN5SimTK21ParallelWorkQueueImplE", !11, i64 0, !12, i64 12, !12, i64 16, !13, i64 20, !14, i64 24, !21, i64 104, !23, i64 144, !23, i64 192, !25, i64 240}
!11 = !{!"_ZTSN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEEE", !6, i64 0, !12, i64 8}
!12 = !{!"int", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"_ZTSSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEE", !15, i64 0}
!15 = !{!"_ZTSSt5dequeIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE", !17, i64 0}
!17 = !{!"_ZTSNSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE11_Deque_implE", !18, i64 0}
!18 = !{!"_ZTSNSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE16_Deque_impl_dataE", !6, i64 0, !19, i64 8, !20, i64 16, !20, i64 48}
!19 = !{!"long", !7, i64 0}
!20 = !{!"_ZTSSt15_Deque_iteratorIPN5SimTK17ParallelWorkQueue4TaskERS3_PS3_E", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!21 = !{!"_ZTSSt5mutex", !22, i64 0}
!22 = !{!"_ZTSSt12__mutex_base", !7, i64 0}
!23 = !{!"_ZTSSt18condition_variable", !24, i64 0}
!24 = !{!"_ZTSSt9__condvar", !7, i64 0}
!25 = !{!"_ZTSN5SimTK6Array_ISt6threadjEE", !26, i64 0}
!26 = !{!"_ZTSN5SimTK10ArrayView_ISt6threadjEE", !27, i64 0}
!27 = !{!"_ZTSN5SimTK15ArrayViewConst_ISt6threadjEE", !6, i64 0, !12, i64 8, !12, i64 12}
!28 = !{!12, !12, i64 0}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unique_lock" = type <{ ptr, i8, [7 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN5SimTK6Array_ISt6threadjEixEj(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5SimTK6Array_ISt6threadjED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: nounwind
declare void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #4 align 2

; Function Attrs: nounwind
declare void @_ZN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEED2Ev(ptr noundef nonnull align 8 dereferenceable(12)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5SimTK21ParallelWorkQueueImplD2Ev(ptr noundef nonnull align 8 dereferenceable(256) %0) unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.std::unique_lock", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #9
  %3 = getelementptr inbounds i8, ptr %0, i64 104
  invoke void @_ZNSt11unique_lockISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(9) %2, ptr noundef nonnull align 8 dereferenceable(40) %3)
          to label %4 unwind label %.loopexit.split-lp

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 20
  store i8 1, ptr %5, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 144
  call void @_ZNSt18condition_variable10notify_allEv(ptr noundef nonnull align 8 dereferenceable(48) %6) #9
  invoke void @_ZNSt11unique_lockISt5mutexE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9) %2)
          to label %.preheader unwind label %.loopexit.split-lp

.preheader:                                       ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 240
  %8 = call noundef i32 @_ZNK5SimTK6Array_ISt6threadjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %7)
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %14, %.preheader
  call void @_ZNSt11unique_lockISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %2) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #9
  call void @_ZN5SimTK6Array_ISt6threadjED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #9
  %10 = getelementptr inbounds i8, ptr %0, i64 192
  call void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48) %10) #9
  call void @_ZNSt18condition_variableD1Ev(ptr noundef nonnull align 8 dereferenceable(48) %6) #9
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  call void @_ZNSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %11) #9
  call void @_ZN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEED2Ev(ptr noundef nonnull align 8 dereferenceable(12) %0) #9
  ret void

.lr.ph:                                           ; preds = %.preheader, %14
  %.04 = phi i32 [ %15, %14 ], [ 0, %.preheader ]
  %12 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN5SimTK6Array_ISt6threadjEixEj(ptr noundef nonnull align 8 dereferenceable(16) %7, i32 noundef %.04)
          to label %13 unwind label %.loopexit

13:                                               ; preds = %.lr.ph
  invoke void @_ZNSt6thread4joinEv(ptr noundef nonnull align 8 dereferenceable(8) %12)
          to label %14 unwind label %.loopexit

14:                                               ; preds = %13
  %15 = add nuw nsw i32 %.04, 1
  %16 = call noundef i32 @_ZNK5SimTK6Array_ISt6threadjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %7)
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %.lr.ph, label %._crit_edge, !llvm.loop !27

.loopexit:                                        ; preds = %.lr.ph, %13
  %lpad.loopexit = landingpad { ptr, i32 }
          catch ptr null
  br label %18

.loopexit.split-lp:                               ; preds = %1, %4
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          catch ptr null
  br label %18

18:                                               ; preds = %.loopexit.split-lp, %.loopexit
  %lpad.phi = phi { ptr, i32 } [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  %19 = extractvalue { ptr, i32 } %lpad.phi, 0
  call void @__clang_call_terminate(ptr %19) #10
  unreachable
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #5 align 2

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) local_unnamed_addr #6

; Function Attrs: nounwind
declare void @_ZNSt18condition_variable10notify_allEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9)) local_unnamed_addr #5 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK6Array_ISt6threadjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #7 align 2

declare void @_ZNSt6thread4joinEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt11unique_lockISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(9)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 20}
!6 = !{!"_ZTSN5SimTK21ParallelWorkQueueImplE", !7, i64 0, !11, i64 12, !11, i64 16, !12, i64 20, !13, i64 24, !20, i64 104, !22, i64 144, !22, i64 192, !24, i64 240}
!7 = !{!"_ZTSN5SimTK19PIMPLImplementationINS_17ParallelWorkQueueENS_21ParallelWorkQueueImplEEE", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"bool", !9, i64 0}
!13 = !{!"_ZTSSt5queueIPN5SimTK17ParallelWorkQueue4TaskESt5dequeIS3_SaIS3_EEE", !14, i64 0}
!14 = !{!"_ZTSSt5dequeIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE", !15, i64 0}
!15 = !{!"_ZTSSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSNSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE11_Deque_implE", !17, i64 0}
!17 = !{!"_ZTSNSt11_Deque_baseIPN5SimTK17ParallelWorkQueue4TaskESaIS3_EE16_Deque_impl_dataE", !8, i64 0, !18, i64 8, !19, i64 16, !19, i64 48}
!18 = !{!"long", !9, i64 0}
!19 = !{!"_ZTSSt15_Deque_iteratorIPN5SimTK17ParallelWorkQueue4TaskERS3_PS3_E", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24}
!20 = !{!"_ZTSSt5mutex", !21, i64 0}
!21 = !{!"_ZTSSt12__mutex_base", !9, i64 0}
!22 = !{!"_ZTSSt18condition_variable", !23, i64 0}
!23 = !{!"_ZTSSt9__condvar", !9, i64 0}
!24 = !{!"_ZTSN5SimTK6Array_ISt6threadjEE", !25, i64 0}
!25 = !{!"_ZTSN5SimTK10ArrayView_ISt6threadjEE", !26, i64 0}
!26 = !{!"_ZTSN5SimTK15ArrayViewConst_ISt6threadjEE", !8, i64 0, !11, i64 8, !11, i64 12}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass