; LLVM IR from Smorodov/Multitarget-tracker :: src/Detector/darknet/src (cpu_gemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @cpu_gemm_tt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, float noundef %10, ptr noundef %11, i32 noundef %12) #2 {
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca float, align 4
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca float, align 4
  %25 = alloca ptr, align 8
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  store i32 %0, ptr %14, align 4, !tbaa !5
  store i32 %1, ptr %15, align 4, !tbaa !5
  store i32 %2, ptr %16, align 4, !tbaa !5
  store i32 %3, ptr %17, align 4, !tbaa !5
  store i32 %4, ptr %18, align 4, !tbaa !5
  store float %5, ptr %19, align 4, !tbaa !9
  store ptr %6, ptr %20, align 8, !tbaa !11
  store i32 %7, ptr %21, align 4, !tbaa !5
  store ptr %8, ptr %22, align 8, !tbaa !11
  store i32 %9, ptr %23, align 4, !tbaa !5
  store float %10, ptr %24, align 4, !tbaa !9
  store ptr %11, ptr %25, align 8, !tbaa !11
  store i32 %12, ptr %26, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #3
  store i32 0, ptr %27, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %83, %13
  %31 = load i32, ptr %27, align 4, !tbaa !5
  %32 = load i32, ptr %16, align 4, !tbaa !5
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %34, label %86

34:                                               ; preds = %30
  store i32 0, ptr %28, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %79, %34
  %36 = load i32, ptr %28, align 4, !tbaa !5
  %37 = load i32, ptr %17, align 4, !tbaa !5
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %82

39:                                               ; preds = %35
  store i32 0, ptr %29, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %75, %39
  %41 = load i32, ptr %29, align 4, !tbaa !5
  %42 = load i32, ptr %18, align 4, !tbaa !5
  %43 = icmp slt i32 %41, %42
  br i1 %43, label %44, label %78

44:                                               ; preds = %40
  %45 = load float, ptr %19, align 4, !tbaa !9
  %46 = load ptr, ptr %20, align 8, !tbaa !11
  %47 = load i32, ptr %27, align 4, !tbaa !5
  %48 = load i32, ptr %29, align 4, !tbaa !5
  %49 = load i32, ptr %21, align 4, !tbaa !5
  %50 = mul nsw i32 %48, %49
  %51 = add nsw i32 %47, %50
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds float, ptr %46, i64 %52
  %54 = load float, ptr %53, align 4, !tbaa !9
  %55 = fmul float %45, %54
  %56 = load ptr, ptr %22, align 8, !tbaa !11
  %57 = load i32, ptr %29, align 4, !tbaa !5
  %58 = load i32, ptr %28, align 4, !tbaa !5
  %59 = load i32, ptr %23, align 4, !tbaa !5
  %60 = mul nsw i32 %58, %59
  %61 = add nsw i32 %57, %60
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds float, ptr %56, i64 %62
  %64 = load float, ptr %63, align 4, !tbaa !9
  %65 = load ptr, ptr %25, align 8, !tbaa !11
  %66 = load i32, ptr %27, align 4, !tbaa !5
  %67 = load i32, ptr %26, align 4, !tbaa !5
  %68 = mul nsw i32 %66, %67
  %69 = load i32, ptr %28, align 4, !tbaa !5
  %70 = add nsw i32 %68, %69
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds float, ptr %65, i64 %71
  %73 = load float, ptr %72, align 4, !tbaa !9
  %74 = call float @llvm.fmuladd.f32(float %55, float %64, float %73)
  store float %74, ptr %72, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %44
  %76 = load i32, ptr %29, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %29, align 4, !tbaa !5
  br label %40, !llvm.loop !13

78:                                               ; preds = %40
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %28, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %28, align 4, !tbaa !5
  br label %35, !llvm.loop !15

82:                                               ; preds = %35
  br label %83

83:                                               ; preds = %82
  %84 = load i32, ptr %27, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %27, align 4, !tbaa !5
  br label %30, !llvm.loop !16

86:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @cpu_gemm_tt(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, float noundef %5, ptr nocapture noundef readonly %6, i32 noundef %7, ptr nocapture noundef readonly %8, i32 noundef %9, float noundef %10, ptr nocapture noundef %11, i32 noundef %12) local_unnamed_addr #1 {
  %14 = icmp sgt i32 %2, 0
  %15 = icmp sgt i32 %3, 0
  %or.cond = and i1 %14, %15
  %16 = icmp sgt i32 %4, 0
  %or.cond50 = and i1 %or.cond, %16
  br i1 %or.cond50, label %.preheader23.us.us.preheader, label %._crit_edge

.preheader23.us.us.preheader:                     ; preds = %13
  %17 = sext i32 %7 to i64
  %18 = sext i32 %9 to i64
  %19 = sext i32 %12 to i64
  %wide.trip.count44 = zext nneg i32 %2 to i64
  %wide.trip.count39 = zext nneg i32 %3 to i64
  %wide.trip.count = zext nneg i32 %4 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %20 = icmp eq i32 %4, 1
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader23.us.us

.preheader23.us.us:                               ; preds = %.preheader23.us.us.preheader, %._crit_edge26.split.us.us.us
  %indvars.iv41 = phi i64 [ 0, %.preheader23.us.us.preheader ], [ %indvars.iv.next42, %._crit_edge26.split.us.us.us ]
  %21 = mul nsw i64 %indvars.iv41, %19
  %invariant.gep48 = getelementptr float, ptr %11, i64 %21
  %invariant.gep = getelementptr float, ptr %6, i64 %indvars.iv41
  br label %.preheader.us.us.us

.preheader.us.us.us:                              ; preds = %._crit_edge.us.us.us, %.preheader23.us.us
  %indvars.iv36 = phi i64 [ %indvars.iv.next37, %._crit_edge.us.us.us ], [ 0, %.preheader23.us.us ]
  %22 = mul nsw i64 %indvars.iv36, %18
  %gep49 = getelementptr float, ptr %invariant.gep48, i64 %indvars.iv36
  %.promoted.us.us.us = load float, ptr %gep49, align 4, !tbaa !5
  %invariant.gep46 = getelementptr float, ptr %8, i64 %22
  br i1 %20, label %._crit_edge.us.us.us.unr-lcssa, label %.preheader.us.us.us.new

.preheader.us.us.us.new:                          ; preds = %.preheader.us.us.us, %.preheader.us.us.us.new
  %indvars.iv = phi i64 [ %indvars.iv.next.1, %.preheader.us.us.us.new ], [ 0, %.preheader.us.us.us ]
  %23 = phi float [ %33, %.preheader.us.us.us.new ], [ %.promoted.us.us.us, %.preheader.us.us.us ]
  %niter = phi i64 [ %niter.next.1, %.preheader.us.us.us.new ], [ 0, %.preheader.us.us.us ]
  %24 = mul nsw i64 %indvars.iv, %17
  %gep = getelementptr float, ptr %invariant.gep, i64 %24
  %25 = load float, ptr %gep, align 4, !tbaa !5
  %26 = fmul float %25, %5
  %gep47 = getelementptr float, ptr %invariant.gep46, i64 %indvars.iv
  %27 = load float, ptr %gep47, align 4, !tbaa !5
  %28 = tail call float @llvm.fmuladd.f32(float %26, float %27, float %23)
  store float %28, ptr %gep49, align 4, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %29 = mul nsw i64 %indvars.iv.next, %17
  %gep.1 = getelementptr float, ptr %invariant.gep, i64 %29
  %30 = load float, ptr %gep.1, align 4, !tbaa !5
  %31 = fmul float %30, %5
  %gep47.1 = getelementptr float, ptr %invariant.gep46, i64 %indvars.iv.next
  %32 = load float, ptr %gep47.1, align 4, !tbaa !5
  %33 = tail call float @llvm.fmuladd.f32(float %31, float %32, float %28)
  store float %33, ptr %gep49, align 4, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.us.us.us.unr-lcssa, label %.preheader.us.us.us.new, !llvm.loop !9

._crit_edge.us.us.us.unr-lcssa:                   ; preds = %.preheader.us.us.us.new, %.preheader.us.us.us
  %indvars.iv.unr = phi i64 [ 0, %.preheader.us.us.us ], [ %indvars.iv.next.1, %.preheader.us.us.us.new ]
  %.unr = phi float [ %.promoted.us.us.us, %.preheader.us.us.us ], [ %33, %.preheader.us.us.us.new ]
  br i1 %lcmp.mod.not, label %._crit_edge.us.us.us, label %._crit_edge.us.us.us.epilog-lcssa

._crit_edge.us.us.us.epilog-lcssa:                ; preds = %._crit_edge.us.us.us.unr-lcssa
  %34 = mul nsw i64 %indvars.iv.unr, %17
  %gep.epil = getelementptr float, ptr %invariant.gep, i64 %34
  %35 = load float, ptr %gep.epil, align 4, !tbaa !5
  %36 = fmul float %35, %5
  %gep47.epil = getelementptr float, ptr %invariant.gep46, i64 %indvars.iv.unr
  %37 = load float, ptr %gep47.epil, align 4, !tbaa !5
  %38 = tail call float @llvm.fmuladd.f32(float %36, float %37, float %.unr)
  store float %38, ptr %gep49, align 4, !tbaa !5
  br label %._crit_edge.us.us.us

._crit_edge.us.us.us:                             ; preds = %._crit_edge.us.us.us.unr-lcssa, %._crit_edge.us.us.us.epilog-lcssa
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %exitcond40.not = icmp eq i64 %indvars.iv.next37, %wide.trip.count39
  br i1 %exitcond40.not, label %._crit_edge26.split.us.us.us, label %.preheader.us.us.us, !llvm.loop !11

._crit_edge26.split.us.us.us:                     ; preds = %._crit_edge.us.us.us
  %indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
  %exitcond45.not = icmp eq i64 %indvars.iv.next42, %wide.trip.count44
  br i1 %exitcond45.not, label %._crit_edge, label %.preheader23.us.us, !llvm.loop !12

._crit_edge:                                      ; preds = %._crit_edge26.split.us.us.us, %13
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass