; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@TimerIdxToTimerId = external hidden global [6 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) #1

declare i32 @HAL_DMA_Abort(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @HRTIM_GetDMAFromOCMode(ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_SimpleOCStop_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  br label %10

10:                                               ; preds = %3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %11, i32 0, i32 3
  %13 = load i32, ptr %12, align 4, !tbaa !11
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %10
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %235

16:                                               ; preds = %10
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %17, i32 0, i32 3
  store i32 1, ptr %18, align 4, !tbaa !11
  br label %19

19:                                               ; preds = %16
  br label %20

20:                                               ; preds = %19
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %22, i32 0, i32 4
  store volatile i32 2, ptr %23, align 8, !tbaa !14
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !15
  %28 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %27, i32 0, i32 3
  %29 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %28, i32 0, i32 6
  %30 = load volatile i32, ptr %29, align 4, !tbaa !16
  %31 = or i32 %30, %24
  store volatile i32 %31, ptr %29, align 4, !tbaa !16
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef %32, i32 noundef %33)
  %35 = call i32 @HAL_DMA_Abort(ptr noundef %34)
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %45

37:                                               ; preds = %21
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %38, i32 0, i32 4
  store volatile i32 7, ptr %39, align 8, !tbaa !14
  br label %40

40:                                               ; preds = %37
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %41, i32 0, i32 3
  store i32 0, ptr %42, align 4, !tbaa !11
  br label %43

43:                                               ; preds = %40
  br label %44

44:                                               ; preds = %43
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %235

45:                                               ; preds = %21
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = load i32, ptr %6, align 4, !tbaa !9
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = call i32 @HRTIM_GetDMAFromOCMode(ptr noundef %46, i32 noundef %47, i32 noundef %48)
  store i32 %49, ptr %8, align 4, !tbaa !9
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = xor i32 %50, -1
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %52, i32 0, i32 0
  %54 = load ptr, ptr %53, align 8, !tbaa !15
  %55 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %54, i32 0, i32 1
  %56 = load i32, ptr %6, align 4, !tbaa !9
  %57 = zext i32 %56 to i64
  %58 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %55, i64 0, i64 %57
  %59 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %58, i32 0, i32 3
  %60 = load volatile i32, ptr %59, align 4, !tbaa !20
  %61 = and i32 %60, %51
  store volatile i32 %61, ptr %59, align 4, !tbaa !20
  br label %62

62:                                               ; preds = %45
  %63 = load i32, ptr %6, align 4, !tbaa !9
  %64 = zext i32 %63 to i64
  %65 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %64
  %66 = load i32, ptr %65, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  %68 = and i64 %67, 65536
  %69 = icmp eq i64 %68, 65536
  br i1 %69, label %70, label %80

70:                                               ; preds = %62
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !15
  %74 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %74, i32 0, i32 0
  %76 = load volatile i32, ptr %75, align 4, !tbaa !22
  %77 = zext i32 %76 to i64
  %78 = and i64 %77, -65537
  %79 = trunc i64 %78 to i32
  store volatile i32 %79, ptr %75, align 4, !tbaa !22
  br label %80

80:                                               ; preds = %70, %62
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = zext i32 %81 to i64
  %83 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %82
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = zext i32 %84 to i64
  %86 = and i64 %85, 131072
  %87 = icmp eq i64 %86, 131072
  br i1 %87, label %88, label %109

88:                                               ; preds = %80
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %89, i32 0, i32 0
  %91 = load ptr, ptr %90, align 8, !tbaa !15
  %92 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %91, i32 0, i32 3
  %93 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %92, i32 0, i32 5
  %94 = load volatile i32, ptr %93, align 4, !tbaa !23
  %95 = zext i32 %94 to i64
  %96 = and i64 %95, 3
  %97 = icmp eq i64 %96, 0
  br i1 %97, label %98, label %108

98:                                               ; preds = %88
  %99 = load ptr, ptr %5, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %99, i32 0, i32 0
  %101 = load ptr, ptr %100, align 8, !tbaa !15
  %102 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %101, i32 0, i32 0
  %103 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %102, i32 0, i32 0
  %104 = load volatile i32, ptr %103, align 4, !tbaa !22
  %105 = zext i32 %104 to i64
  %106 = and i64 %105, -131073
  %107 = trunc i64 %106 to i32
  store volatile i32 %107, ptr %103, align 4, !tbaa !22
  br label %108

108:                                              ; preds = %98, %88
  br label %109

109:                                              ; preds = %108, %80
  %110 = load i32, ptr %6, align 4, !tbaa !9
  %111 = zext i32 %110 to i64
  %112 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %111
  %113 = load i32, ptr %112, align 4, !tbaa !9
  %114 = zext i32 %113 to i64
  %115 = and i64 %114, 262144
  %116 = icmp eq i64 %115, 262144
  br i1 %116, label %117, label %138

117:                                              ; preds = %109
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !15
  %121 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %120, i32 0, i32 3
  %122 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %121, i32 0, i32 5
  %123 = load volatile i32, ptr %122, align 4, !tbaa !23
  %124 = zext i32 %123 to i64
  %125 = and i64 %124, 12
  %126 = icmp eq i64 %125, 0
  br i1 %126, label %127, label %137

127:                                              ; preds = %117
  %128 = load ptr, ptr %5, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %128, i32 0, i32 0
  %130 = load ptr, ptr %129, align 8, !tbaa !15
  %131 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %130, i32 0, i32 0
  %132 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %131, i32 0, i32 0
  %133 = load volatile i32, ptr %132, align 4, !tbaa !22
  %134 = zext i32 %133 to i64
  %135 = and i64 %134, -262145
  %136 = trunc i64 %135 to i32
  store volatile i32 %136, ptr %132, align 4, !tbaa !22
  br label %137

137:                                              ; preds = %127, %117
  br label %138

138:                                              ; preds = %137, %109
  %139 = load i32, ptr %6, align 4, !tbaa !9
  %140 = zext i32 %139 to i64
  %141 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %140
  %142 = load i32, ptr %141, align 4, !tbaa !9
  %143 = zext i32 %142 to i64
  %144 = and i64 %143, 524288
  %145 = icmp eq i64 %144, 524288
  br i1 %145, label %146, label %167

146:                                              ; preds = %138
  %147 = load ptr, ptr %5, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %147, i32 0, i32 0
  %149 = load ptr, ptr %148, align 8, !tbaa !15
  %150 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %149, i32 0, i32 3
  %151 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %150, i32 0, i32 5
  %152 = load volatile i32, ptr %151, align 4, !tbaa !23
  %153 = zext i32 %152 to i64
  %154 = and i64 %153, 48
  %155 = icmp eq i64 %154, 0
  br i1 %155, label %156, label %166

156:                                              ; preds = %146
  %157 = load ptr, ptr %5, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %157, i32 0, i32 0
  %159 = load ptr, ptr %158, align 8, !tbaa !15
  %160 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %159, i32 0, i32 0
  %161 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %160, i32 0, i32 0
  %162 = load volatile i32, ptr %161, align 4, !tbaa !22
  %163 = zext i32 %162 to i64
  %164 = and i64 %163, -524289
  %165 = trunc i64 %164 to i32
  store volatile i32 %165, ptr %161, align 4, !tbaa !22
  br label %166

166:                                              ; preds = %156, %146
  br label %167

167:                                              ; preds = %166, %138
  %168 = load i32, ptr %6, align 4, !tbaa !9
  %169 = zext i32 %168 to i64
  %170 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %169
  %171 = load i32, ptr %170, align 4, !tbaa !9
  %172 = zext i32 %171 to i64
  %173 = and i64 %172, 1048576
  %174 = icmp eq i64 %173, 1048576
  br i1 %174, label %175, label %196

175:                                              ; preds = %167
  %176 = load ptr, ptr %5, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %176, i32 0, i32 0
  %178 = load ptr, ptr %177, align 8, !tbaa !15
  %179 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %178, i32 0, i32 3
  %180 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %179, i32 0, i32 5
  %181 = load volatile i32, ptr %180, align 4, !tbaa !23
  %182 = zext i32 %181 to i64
  %183 = and i64 %182, 192
  %184 = icmp eq i64 %183, 0
  br i1 %184, label %185, label %195

185:                                              ; preds = %175
  %186 = load ptr, ptr %5, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %186, i32 0, i32 0
  %188 = load ptr, ptr %187, align 8, !tbaa !15
  %189 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %188, i32 0, i32 0
  %190 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %189, i32 0, i32 0
  %191 = load volatile i32, ptr %190, align 4, !tbaa !22
  %192 = zext i32 %191 to i64
  %193 = and i64 %192, -1048577
  %194 = trunc i64 %193 to i32
  store volatile i32 %194, ptr %190, align 4, !tbaa !22
  br label %195

195:                                              ; preds = %185, %175
  br label %196

196:                                              ; preds = %195, %167
  %197 = load i32, ptr %6, align 4, !tbaa !9
  %198 = zext i32 %197 to i64
  %199 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %198
  %200 = load i32, ptr %199, align 4, !tbaa !9
  %201 = zext i32 %200 to i64
  %202 = and i64 %201, 2097152
  %203 = icmp eq i64 %202, 2097152
  br i1 %203, label %204, label %225

204:                                              ; preds = %196
  %205 = load ptr, ptr %5, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %205, i32 0, i32 0
  %207 = load ptr, ptr %206, align 8, !tbaa !15
  %208 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %207, i32 0, i32 3
  %209 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %208, i32 0, i32 5
  %210 = load volatile i32, ptr %209, align 4, !tbaa !23
  %211 = zext i32 %210 to i64
  %212 = and i64 %211, 768
  %213 = icmp eq i64 %212, 0
  br i1 %213, label %214, label %224

214:                                              ; preds = %204
  %215 = load ptr, ptr %5, align 8, !tbaa !5
  %216 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %215, i32 0, i32 0
  %217 = load ptr, ptr %216, align 8, !tbaa !15
  %218 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %217, i32 0, i32 0
  %219 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %218, i32 0, i32 0
  %220 = load volatile i32, ptr %219, align 4, !tbaa !22
  %221 = zext i32 %220 to i64
  %222 = and i64 %221, -2097153
  %223 = trunc i64 %222 to i32
  store volatile i32 %223, ptr %219, align 4, !tbaa !22
  br label %224

224:                                              ; preds = %214, %204
  br label %225

225:                                              ; preds = %224, %196
  br label %226

226:                                              ; preds = %225
  br label %227

227:                                              ; preds = %226
  %228 = load ptr, ptr %5, align 8, !tbaa !5
  %229 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %228, i32 0, i32 4
  store volatile i32 1, ptr %229, align 8, !tbaa !14
  br label %230

230:                                              ; preds = %227
  %231 = load ptr, ptr %5, align 8, !tbaa !5
  %232 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %231, i32 0, i32 3
  store i32 0, ptr %232, align 4, !tbaa !11
  br label %233

233:                                              ; preds = %230
  br label %234

234:                                              ; preds = %233
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %235

235:                                              ; preds = %234, %44, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %236 = load i32, ptr %4, align 4
  ret i32 %236
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 196}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 200}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 920}
!17 = !{!"", !18, i64 0, !7, i64 128, !7, i64 768, !19, i64 896}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!20 = !{!21, !10, i64 12}
!21 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !7, i64 108}
!22 = !{!17, !10, i64 0}
!23 = !{!17, !10, i64 916}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }

@TimerIdxToTimerId = external hidden local_unnamed_addr global [6 x i32], align 16

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @HAL_DMA_Abort(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @HRTIM_GetDMAFromOCMode(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_SimpleOCStop_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 196
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %85, label %7

7:                                                ; preds = %3
  store i32 1, ptr %4, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 200
  store volatile i32 2, ptr %8, align 8, !tbaa !12
  %9 = load ptr, ptr %0, align 8, !tbaa !13
  %10 = getelementptr inbounds i8, ptr %9, i64 920
  %11 = load volatile i32, ptr %10, align 4, !tbaa !14
  %12 = or i32 %11, %2
  store volatile i32 %12, ptr %10, align 4, !tbaa !14
  %13 = tail call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef nonnull %0, i32 noundef %1)
  %14 = tail call i32 @HAL_DMA_Abort(ptr noundef %13) #2
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %15, label %.sink.split

15:                                               ; preds = %7
  %16 = tail call i32 @HRTIM_GetDMAFromOCMode(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2)
  %17 = xor i32 %16, -1
  %18 = load ptr, ptr %0, align 8, !tbaa !13
  %19 = getelementptr inbounds i8, ptr %18, i64 128
  %20 = zext i32 %1 to i64
  %21 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %19, i64 0, i64 %20, i32 3
  %22 = load volatile i32, ptr %21, align 4, !tbaa !18
  %23 = and i32 %22, %17
  store volatile i32 %23, ptr %21, align 4, !tbaa !18
  %24 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %20
  %25 = load i32, ptr %24, align 4, !tbaa !20
  %26 = and i32 %25, 65536
  %.not34 = icmp eq i32 %26, 0
  br i1 %.not34, label %30, label %27

27:                                               ; preds = %15
  %28 = load volatile i32, ptr %18, align 4, !tbaa !21
  %29 = and i32 %28, -65537
  store volatile i32 %29, ptr %18, align 4, !tbaa !21
  %.pre = load i32, ptr %24, align 4, !tbaa !20
  br label %30

30:                                               ; preds = %27, %15
  %31 = phi i32 [ %.pre, %27 ], [ %25, %15 ]
  %32 = and i32 %31, 131072
  %.not35 = icmp eq i32 %32, 0
  br i1 %.not35, label %41, label %33

33:                                               ; preds = %30
  %34 = getelementptr inbounds i8, ptr %18, i64 916
  %35 = load volatile i32, ptr %34, align 4, !tbaa !22
  %36 = and i32 %35, 3
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %41

38:                                               ; preds = %33
  %39 = load volatile i32, ptr %18, align 4, !tbaa !21
  %40 = and i32 %39, -131073
  store volatile i32 %40, ptr %18, align 4, !tbaa !21
  %.pre40 = load i32, ptr %24, align 4, !tbaa !20
  br label %41

41:                                               ; preds = %33, %38, %30
  %42 = phi i32 [ %31, %33 ], [ %.pre40, %38 ], [ %31, %30 ]
  %43 = and i32 %42, 262144
  %.not36 = icmp eq i32 %43, 0
  br i1 %.not36, label %52, label %44

44:                                               ; preds = %41
  %45 = getelementptr inbounds i8, ptr %18, i64 916
  %46 = load volatile i32, ptr %45, align 4, !tbaa !22
  %47 = and i32 %46, 12
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %52

49:                                               ; preds = %44
  %50 = load volatile i32, ptr %18, align 4, !tbaa !21
  %51 = and i32 %50, -262145
  store volatile i32 %51, ptr %18, align 4, !tbaa !21
  %.pre41 = load i32, ptr %24, align 4, !tbaa !20
  br label %52

52:                                               ; preds = %44, %49, %41
  %53 = phi i32 [ %42, %44 ], [ %.pre41, %49 ], [ %42, %41 ]
  %54 = and i32 %53, 524288
  %.not37 = icmp eq i32 %54, 0
  br i1 %.not37, label %63, label %55

55:                                               ; preds = %52
  %56 = getelementptr inbounds i8, ptr %18, i64 916
  %57 = load volatile i32, ptr %56, align 4, !tbaa !22
  %58 = and i32 %57, 48
  %59 = icmp eq i32 %58, 0
  br i1 %59, label %60, label %63

60:                                               ; preds = %55
  %61 = load volatile i32, ptr %18, align 4, !tbaa !21
  %62 = and i32 %61, -524289
  store volatile i32 %62, ptr %18, align 4, !tbaa !21
  %.pre42 = load i32, ptr %24, align 4, !tbaa !20
  br label %63

63:                                               ; preds = %55, %60, %52
  %64 = phi i32 [ %53, %55 ], [ %.pre42, %60 ], [ %53, %52 ]
  %65 = and i32 %64, 1048576
  %.not38 = icmp eq i32 %65, 0
  br i1 %.not38, label %74, label %66

66:                                               ; preds = %63
  %67 = getelementptr inbounds i8, ptr %18, i64 916
  %68 = load volatile i32, ptr %67, align 4, !tbaa !22
  %69 = and i32 %68, 192
  %70 = icmp eq i32 %69, 0
  br i1 %70, label %71, label %74

71:                                               ; preds = %66
  %72 = load volatile i32, ptr %18, align 4, !tbaa !21
  %73 = and i32 %72, -1048577
  store volatile i32 %73, ptr %18, align 4, !tbaa !21
  %.pre43 = load i32, ptr %24, align 4, !tbaa !20
  br label %74

74:                                               ; preds = %66, %71, %63
  %75 = phi i32 [ %64, %66 ], [ %.pre43, %71 ], [ %64, %63 ]
  %76 = and i32 %75, 2097152
  %.not39 = icmp eq i32 %76, 0
  br i1 %.not39, label %.sink.split, label %77

77:                                               ; preds = %74
  %78 = getelementptr inbounds i8, ptr %18, i64 916
  %79 = load volatile i32, ptr %78, align 4, !tbaa !22
  %80 = and i32 %79, 768
  %81 = icmp eq i32 %80, 0
  br i1 %81, label %82, label %.sink.split

82:                                               ; preds = %77
  %83 = load volatile i32, ptr %18, align 4, !tbaa !21
  %84 = and i32 %83, -2097153
  store volatile i32 %84, ptr %18, align 4, !tbaa !21
  br label %.sink.split

.sink.split:                                      ; preds = %74, %82, %77, %7
  %.sink = phi i32 [ 7, %7 ], [ 1, %77 ], [ 1, %82 ], [ 1, %74 ]
  %.0.ph = phi i32 [ 1, %7 ], [ 0, %77 ], [ 0, %82 ], [ 0, %74 ]
  store volatile i32 %.sink, ptr %8, align 8, !tbaa !12
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %.sink.split, %3
  %.0 = phi i32 [ 2, %3 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 196}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 200}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 920}
!15 = !{!"", !16, i64 0, !8, i64 128, !8, i64 768, !17, i64 896}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!18 = !{!19, !11, i64 12}
!19 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !8, i64 108}
!20 = !{!11, !11, i64 0}
!21 = !{!15, !11, i64 0}
!22 = !{!15, !11, i64 916}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass