; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DeInit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RNG_HandleTypeDef = type { ptr, %struct.RNG_InitTypeDef, i32, i32, i32, i32 }
%struct.RNG_InitTypeDef = type { i32 }
%struct.RNG_TypeDef = type { i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RNG_DeInit(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  br label %41

7:                                                ; preds = %1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %8, i32 0, i32 0
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = getelementptr inbounds %struct.RNG_TypeDef, ptr %10, i32 0, i32 0
  %12 = load volatile i32, ptr %11, align 4, !tbaa !13
  %13 = zext i32 %12 to i64
  %14 = and i64 %13, -33
  %15 = trunc i64 %14 to i32
  store volatile i32 %15, ptr %11, align 4, !tbaa !13
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %16, i32 0, i32 0
  %18 = load ptr, ptr %17, align 8, !tbaa !9
  %19 = getelementptr inbounds %struct.RNG_TypeDef, ptr %18, i32 0, i32 0
  %20 = load volatile i32, ptr %19, align 4, !tbaa !13
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, -13
  %23 = trunc i64 %22 to i32
  store volatile i32 %23, ptr %19, align 4, !tbaa !13
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %24, i32 0, i32 0
  %26 = load ptr, ptr %25, align 8, !tbaa !9
  %27 = getelementptr inbounds %struct.RNG_TypeDef, ptr %26, i32 0, i32 1
  %28 = load volatile i32, ptr %27, align 4, !tbaa !15
  %29 = zext i32 %28 to i64
  %30 = and i64 %29, -97
  %31 = trunc i64 %30 to i32
  store volatile i32 %31, ptr %27, align 4, !tbaa !15
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_RNG_MspDeInit(ptr noundef %32)
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %33, i32 0, i32 3
  store volatile i32 0, ptr %34, align 8, !tbaa !16
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %35, i32 0, i32 4
  store volatile i32 0, ptr %36, align 4, !tbaa !17
  br label %37

37:                                               ; preds = %7
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.RNG_HandleTypeDef, ptr %38, i32 0, i32 2
  store i32 0, ptr %39, align 4, !tbaa !18
  br label %40

40:                                               ; preds = %37
  store i32 0, ptr %2, align 4
  br label %41

41:                                               ; preds = %40, %6
  %42 = load i32, ptr %2, align 4
  ret i32 %42
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RNG_MspDeInit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24}
!11 = !{!"", !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!15 = !{!14, !12, i64 4}
!16 = !{!10, !12, i64 16}
!17 = !{!10, !12, i64 20}
!18 = !{!10, !12, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_RNG_DeInit(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %15, label %3

3:                                                ; preds = %1
  %4 = load ptr, ptr %0, align 8, !tbaa !5
  %5 = load volatile i32, ptr %4, align 4, !tbaa !12
  %6 = and i32 %5, -33
  store volatile i32 %6, ptr %4, align 4, !tbaa !12
  %7 = load volatile i32, ptr %4, align 4, !tbaa !12
  %8 = and i32 %7, -13
  store volatile i32 %8, ptr %4, align 4, !tbaa !12
  %9 = getelementptr inbounds i8, ptr %4, i64 4
  %10 = load volatile i32, ptr %9, align 4, !tbaa !14
  %11 = and i32 %10, -97
  store volatile i32 %11, ptr %9, align 4, !tbaa !14
  tail call void @HAL_RNG_MspDeInit(ptr noundef nonnull %0)
  %12 = getelementptr inbounds i8, ptr %0, i64 16
  store volatile i32 0, ptr %12, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %0, i64 20
  store volatile i32 0, ptr %13, align 4, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 0, ptr %14, align 4, !tbaa !17
  br label %15

15:                                               ; preds = %1, %3
  %.0 = phi i32 [ 0, %3 ], [ 1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RNG_MspDeInit(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!14 = !{!13, !11, i64 4}
!15 = !{!6, !11, i64 16}
!16 = !{!6, !11, i64 20}
!17 = !{!6, !11, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass