; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/QCBOR/src (qcbor_encode)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._QCBOREncodeContext = type { %struct.useful_out_buf, i8, %struct.__QCBORTrackNesting }
%struct.useful_out_buf = type { %struct.q_useful_buf, i64, i16, i8 }
%struct.q_useful_buf = type { ptr, i64 }
%struct.__QCBORTrackNesting = type { [16 x %struct.anon], ptr }
%struct.anon = type { i32, i16, i8 }

; Function Attrs: nounwind uwtable
define dso_local void @QCBOREncode_AddUInt64(ptr noundef %0, i64 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct._QCBOREncodeContext, ptr %5, i32 0, i32 1
  %7 = load i8, ptr %6, align 8, !tbaa !11
  %8 = zext i8 %7 to i32
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %19

10:                                               ; preds = %2
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = load i64, ptr %4, align 8, !tbaa !9
  call void @AppendEncodedTypeAndNumber(ptr noundef %11, i8 noundef zeroext 0, i64 noundef %12)
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct._QCBOREncodeContext, ptr %13, i32 0, i32 2
  %15 = call i32 @Nesting_Increment(ptr noundef %14)
  %16 = trunc i32 %15 to i8
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct._QCBOREncodeContext, ptr %17, i32 0, i32 1
  store i8 %16, ptr %18, align 8, !tbaa !11
  br label %19

19:                                               ; preds = %10, %2
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @AppendEncodedTypeAndNumber(ptr noundef, i8 noundef zeroext, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Nesting_Increment(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !7, i64 32}
!12 = !{!"_QCBOREncodeContext", !13, i64 0, !7, i64 32, !16, i64 40}
!13 = !{!"useful_out_buf", !14, i64 0, !10, i64 16, !15, i64 24, !7, i64 26}
!14 = !{!"q_useful_buf", !6, i64 0, !10, i64 8}
!15 = !{!"short", !7, i64 0}
!16 = !{!"__QCBORTrackNesting", !7, i64 0, !6, i64 128}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @QCBOREncode_AddUInt64(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 32
  %4 = load i8, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i8 %4, 0
  br i1 %5, label %6, label %10

6:                                                ; preds = %2
  tail call void @AppendEncodedTypeAndNumber(ptr noundef nonnull %0, i8 noundef zeroext 0, i64 noundef %1)
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = tail call i32 @Nesting_Increment(ptr noundef nonnull %7)
  %9 = trunc i32 %8 to i8
  store i8 %9, ptr %3, align 8, !tbaa !5
  br label %10

10:                                               ; preds = %6, %2
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @AppendEncodedTypeAndNumber(ptr noundef, i8 noundef zeroext, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Nesting_Increment(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"_QCBOREncodeContext", !7, i64 0, !10, i64 32, !14, i64 40}
!7 = !{!"useful_out_buf", !8, i64 0, !12, i64 16, !13, i64 24, !10, i64 26}
!8 = !{!"q_useful_buf", !9, i64 0, !12, i64 8}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"short", !10, i64 0}
!14 = !{!"__QCBORTrackNesting", !10, i64 0, !9, i64 128}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass