; LLVM IR from RichtersFinger/ChainSimulation :: Simulation.ll (ZN10Simulation9initChainEidddd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Simulation = type { %class.Chain, %"class.std::vector.0", double, double }
%class.Chain = type { double, double, double, double, double, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl" }
%"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl" = type { %"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Wall *, std::allocator<Wall *>>::_Vector_impl" }
%"struct.std::_Vector_base<Wall *, std::allocator<Wall *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Wall *, std::allocator<Wall *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Wall *, std::allocator<Wall *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ChainElement = type { double, double, double, double, double, double, double, double, i8, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10Simulation9initChainEidddd(ptr noundef nonnull align 8 dereferenceable(104) %0, i32 noundef %1, double noundef %2, double noundef %3, double noundef %4, double noundef %5) #0 align 2 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca double, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store double %2, ptr %9, align 8, !tbaa !11
  store double %3, ptr %10, align 8, !tbaa !11
  store double %4, ptr %11, align 8, !tbaa !11
  store double %5, ptr %12, align 8, !tbaa !11
  %14 = load ptr, ptr %7, align 8
  %15 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %16 = load i32, ptr %8, align 4, !tbaa !9
  call void @_ZN5Chain15makeSimpleChainEi(ptr noundef nonnull align 8 dereferenceable(64) %15, i32 noundef %16)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %35, %6
  %18 = load i32, ptr %13, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %21 = getelementptr inbounds %class.Chain, ptr %20, i32 0, i32 5
  %22 = call noundef i64 @_ZNKSt6vectorIP12ChainElementSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #5
  %23 = icmp ult i64 %19, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %38

25:                                               ; preds = %17
  %26 = load double, ptr %9, align 8, !tbaa !11
  %27 = fmul double 5.000000e-01, %26
  %28 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %29 = getelementptr inbounds %class.Chain, ptr %28, i32 0, i32 5
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #5
  %33 = load ptr, ptr %32, align 8, !tbaa !5
  %34 = getelementptr inbounds %class.ChainElement, ptr %33, i32 0, i32 6
  store double %27, ptr %34, align 8, !tbaa !13
  br label %35

35:                                               ; preds = %25
  %36 = load i32, ptr %13, align 4, !tbaa !9
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %13, align 4, !tbaa !9
  br label %17, !llvm.loop !16

38:                                               ; preds = %24
  %39 = load double, ptr %10, align 8, !tbaa !11
  %40 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %41 = getelementptr inbounds %class.Chain, ptr %40, i32 0, i32 0
  store double %39, ptr %41, align 8, !tbaa !18
  %42 = load double, ptr %11, align 8, !tbaa !11
  %43 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %44 = getelementptr inbounds %class.Chain, ptr %43, i32 0, i32 2
  store double %42, ptr %44, align 8, !tbaa !29
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = sitofp i32 %45 to double
  %47 = fdiv double %46, 3.000000e+03
  %48 = fmul double %47, 5.000000e-04
  %49 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %50 = getelementptr inbounds %class.Chain, ptr %49, i32 0, i32 0
  %51 = load double, ptr %50, align 8, !tbaa !18
  %52 = call double @sqrt(double noundef %51) #5
  %53 = fmul double %48, %52
  %54 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %55 = getelementptr inbounds %class.Chain, ptr %54, i32 0, i32 1
  store double %53, ptr %55, align 8, !tbaa !30
  %56 = load double, ptr %12, align 8, !tbaa !11
  %57 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %58 = getelementptr inbounds %class.Chain, ptr %57, i32 0, i32 3
  store double %56, ptr %58, align 8, !tbaa !31
  %59 = load i32, ptr %8, align 4, !tbaa !9
  %60 = sitofp i32 %59 to double
  %61 = fdiv double %60, 3.000000e+03
  %62 = fmul double %61, 5.000000e-03
  %63 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %64 = getelementptr inbounds %class.Chain, ptr %63, i32 0, i32 3
  %65 = load double, ptr %64, align 8, !tbaa !31
  %66 = call double @sqrt(double noundef %65) #5
  %67 = fmul double %62, %66
  %68 = getelementptr inbounds %class.Simulation, ptr %14, i32 0, i32 0
  %69 = getelementptr inbounds %class.Chain, ptr %68, i32 0, i32 4
  store double %67, ptr %69, align 8, !tbaa !32
  ret void
}

declare void @_ZN5Chain15makeSimpleChainEi(ptr noundef nonnull align 8 dereferenceable(64), i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP12ChainElementSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind
declare double @sqrt(double noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !12, i64 48}
!14 = !{!"_ZTS12ChainElement", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !15, i64 64, !6, i64 72, !6, i64 80}
!15 = !{!"bool", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!19, !12, i64 0}
!19 = !{!"_ZTS10Simulation", !20, i64 0, !25, i64 64, !12, i64 88, !12, i64 96}
!20 = !{!"_ZTS5Chain", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !21, i64 40}
!21 = !{!"_ZTSSt6vectorIP12ChainElementSaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIP12ChainElementSaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIP12ChainElementSaIS1_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIP12ChainElementSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSSt6vectorIP4WallSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP4WallSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP4WallSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP4WallSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!19, !12, i64 16}
!30 = !{!19, !12, i64 8}
!31 = !{!19, !12, i64 24}
!32 = !{!19, !12, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10Simulation9initChainEidddd(ptr noundef nonnull align 8 dereferenceable(104) %0, i32 noundef %1, double noundef %2, double noundef %3, double noundef %4, double noundef %5) local_unnamed_addr #0 align 2 {
  tail call void @_ZN5Chain15makeSimpleChainEi(ptr noundef nonnull align 8 dereferenceable(64) %0, i32 noundef %1)
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = tail call noundef i64 @_ZNKSt6vectorIP12ChainElementSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %9 = fmul double %2, 5.000000e-01
  br label %22

._crit_edge:                                      ; preds = %22, %6
  store double %3, ptr %0, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  store double %4, ptr %10, align 8, !tbaa !20
  %11 = sitofp i32 %1 to double
  %12 = fdiv double %11, 3.000000e+03
  %13 = fmul double %12, 5.000000e-04
  %14 = tail call double @sqrt(double noundef %3) #4
  %15 = fmul double %13, %14
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  store double %15, ptr %16, align 8, !tbaa !21
  %17 = getelementptr inbounds i8, ptr %0, i64 24
  store double %5, ptr %17, align 8, !tbaa !22
  %18 = fmul double %12, 5.000000e-03
  %19 = tail call double @sqrt(double noundef %5) #4
  %20 = fmul double %18, %19
  %21 = getelementptr inbounds i8, ptr %0, i64 32
  store double %20, ptr %21, align 8, !tbaa !23
  ret void

22:                                               ; preds = %.lr.ph, %22
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %22 ]
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv) #4
  %24 = load ptr, ptr %23, align 8, !tbaa !24
  %25 = getelementptr inbounds i8, ptr %24, i64 48
  store double %9, ptr %25, align 8, !tbaa !25
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %26 = tail call noundef i64 @_ZNKSt6vectorIP12ChainElementSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  %27 = icmp ugt i64 %26, %indvars.iv.next
  br i1 %27, label %22, label %._crit_edge, !llvm.loop !28
}

declare void @_ZN5Chain15makeSimpleChainEi(ptr noundef nonnull align 8 dereferenceable(64), i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP12ChainElementSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sqrt(double noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"_ZTS10Simulation", !7, i64 0, !16, i64 64, !8, i64 88, !8, i64 96}
!7 = !{!"_ZTS5Chain", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !11, i64 40}
!8 = !{!"double", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIP12ChainElementSaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIP12ChainElementSaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIP12ChainElementSaIS1_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIP12ChainElementSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!"_ZTSSt6vectorIP4WallSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP4WallSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP4WallSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP4WallSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!20 = !{!6, !8, i64 16}
!21 = !{!6, !8, i64 8}
!22 = !{!6, !8, i64 24}
!23 = !{!6, !8, i64 32}
!24 = !{!15, !15, i64 0}
!25 = !{!26, !8, i64 48}
!26 = !{!"_ZTS12ChainElement", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !27, i64 64, !15, i64 72, !15, i64 80}
!27 = !{!"bool", !9, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass