; LLVM IR from KonajuGames/libsquish :: alpha.ll (ZN6squish17CompressAlphaDxt3EPKfiPv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6squish17CompressAlphaDxt3EPKfiPv(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca float, align 4
  %10 = alloca float, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %15, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %69, %3
  %17 = load i32, ptr %8, align 4, !tbaa !9
  %18 = icmp slt i32 %17, 8
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %72

20:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = mul nsw i32 8, %22
  %24 = add nsw i32 %23, 3
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds float, ptr %21, i64 %25
  %27 = load float, ptr %26, align 4, !tbaa !11
  %28 = fmul float %27, 1.500000e+01
  store float %28, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = mul nsw i32 8, %30
  %32 = add nsw i32 %31, 7
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds float, ptr %29, i64 %33
  %35 = load float, ptr %34, align 4, !tbaa !11
  %36 = fmul float %35, 1.500000e+01
  store float %36, ptr %10, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %37 = load float, ptr %9, align 4, !tbaa !11
  %38 = call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %37, i32 noundef 15)
  store i32 %38, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %39 = load float, ptr %10, align 4, !tbaa !11
  %40 = call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %39, i32 noundef 15)
  store i32 %40, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = mul nsw i32 2, %41
  %43 = shl i32 1, %42
  store i32 %43, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = mul nsw i32 2, %44
  %46 = add nsw i32 %45, 1
  %47 = shl i32 1, %46
  store i32 %47, ptr %14, align 4, !tbaa !9
  %48 = load i32, ptr %5, align 4, !tbaa !9
  %49 = load i32, ptr %13, align 4, !tbaa !9
  %50 = and i32 %48, %49
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %52, label %53

52:                                               ; preds = %20
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %52, %20
  %54 = load i32, ptr %5, align 4, !tbaa !9
  %55 = load i32, ptr %14, align 4, !tbaa !9
  %56 = and i32 %54, %55
  %57 = icmp eq i32 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %53
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %58, %53
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = shl i32 %61, 4
  %63 = or i32 %60, %62
  %64 = trunc i32 %63 to i8
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  %66 = load i32, ptr %8, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds i8, ptr %65, i64 %67
  store i8 %64, ptr %68, align 1, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %69

69:                                               ; preds = %59
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %8, align 4, !tbaa !9
  br label %16, !llvm.loop !14

72:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN6squish17CompressAlphaDxt3EPKfiPv(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 12
  %5 = load float, ptr %4, align 4, !tbaa !5
  %6 = fmul float %5, 1.500000e+01
  %7 = getelementptr inbounds i8, ptr %0, i64 28
  %8 = load float, ptr %7, align 4, !tbaa !5
  %9 = fmul float %8, 1.500000e+01
  %10 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %6, i32 noundef 15)
  %11 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %9, i32 noundef 15)
  %12 = insertelement <16 x i32> poison, i32 %1, i64 0
  %13 = shufflevector <16 x i32> %12, <16 x i32> poison, <16 x i32> zeroinitializer
  %14 = and <16 x i32> %13, <i32 32768, i32 16384, i32 8192, i32 4096, i32 2048, i32 1024, i32 512, i32 256, i32 128, i32 64, i32 32, i32 16, i32 8, i32 4, i32 2, i32 1>
  %15 = shl i32 %11, 4
  %16 = getelementptr inbounds i8, ptr %0, i64 44
  %17 = getelementptr inbounds i8, ptr %0, i64 60
  %18 = getelementptr inbounds i8, ptr %2, i64 1
  %19 = getelementptr inbounds i8, ptr %0, i64 76
  %20 = getelementptr inbounds i8, ptr %0, i64 92
  %21 = getelementptr inbounds i8, ptr %2, i64 2
  %22 = getelementptr inbounds i8, ptr %0, i64 108
  %23 = getelementptr inbounds i8, ptr %0, i64 124
  %24 = getelementptr inbounds i8, ptr %2, i64 3
  %25 = getelementptr inbounds i8, ptr %0, i64 140
  %26 = getelementptr inbounds i8, ptr %0, i64 156
  %27 = getelementptr inbounds i8, ptr %2, i64 4
  %28 = getelementptr inbounds i8, ptr %0, i64 172
  %29 = getelementptr inbounds i8, ptr %0, i64 188
  %30 = getelementptr inbounds i8, ptr %2, i64 5
  %31 = getelementptr inbounds i8, ptr %0, i64 204
  %32 = getelementptr inbounds i8, ptr %0, i64 220
  %33 = getelementptr inbounds i8, ptr %2, i64 6
  %34 = getelementptr inbounds i8, ptr %0, i64 236
  %35 = getelementptr inbounds i8, ptr %0, i64 252
  %36 = icmp eq <16 x i32> %14, zeroinitializer
  %37 = extractelement <16 x i1> %36, i64 15
  %spec.select = select i1 %37, i32 0, i32 %10
  %38 = extractelement <16 x i1> %36, i64 14
  %39 = select i1 %38, i32 0, i32 %15
  %40 = or i32 %39, %spec.select
  %41 = trunc i32 %40 to i8
  store i8 %41, ptr %2, align 1, !tbaa !9
  %42 = load float, ptr %16, align 4, !tbaa !5
  %43 = fmul float %42, 1.500000e+01
  %44 = load float, ptr %17, align 4, !tbaa !5
  %45 = fmul float %44, 1.500000e+01
  %46 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %43, i32 noundef 15)
  %47 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %45, i32 noundef 15)
  %48 = extractelement <16 x i1> %36, i64 13
  %spec.select.1 = select i1 %48, i32 0, i32 %46
  %49 = shl i32 %47, 4
  %50 = extractelement <16 x i1> %36, i64 12
  %51 = select i1 %50, i32 0, i32 %49
  %52 = or i32 %51, %spec.select.1
  %53 = trunc i32 %52 to i8
  store i8 %53, ptr %18, align 1, !tbaa !9
  %54 = load float, ptr %19, align 4, !tbaa !5
  %55 = fmul float %54, 1.500000e+01
  %56 = load float, ptr %20, align 4, !tbaa !5
  %57 = fmul float %56, 1.500000e+01
  %58 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %55, i32 noundef 15)
  %59 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %57, i32 noundef 15)
  %60 = extractelement <16 x i1> %36, i64 11
  %spec.select.2 = select i1 %60, i32 0, i32 %58
  %61 = shl i32 %59, 4
  %62 = extractelement <16 x i1> %36, i64 10
  %63 = select i1 %62, i32 0, i32 %61
  %64 = or i32 %63, %spec.select.2
  %65 = trunc i32 %64 to i8
  store i8 %65, ptr %21, align 1, !tbaa !9
  %66 = load float, ptr %22, align 4, !tbaa !5
  %67 = fmul float %66, 1.500000e+01
  %68 = load float, ptr %23, align 4, !tbaa !5
  %69 = fmul float %68, 1.500000e+01
  %70 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %67, i32 noundef 15)
  %71 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %69, i32 noundef 15)
  %72 = extractelement <16 x i1> %36, i64 9
  %spec.select.3 = select i1 %72, i32 0, i32 %70
  %73 = shl i32 %71, 4
  %74 = extractelement <16 x i1> %36, i64 8
  %75 = select i1 %74, i32 0, i32 %73
  %76 = or i32 %75, %spec.select.3
  %77 = trunc i32 %76 to i8
  store i8 %77, ptr %24, align 1, !tbaa !9
  %78 = load float, ptr %25, align 4, !tbaa !5
  %79 = fmul float %78, 1.500000e+01
  %80 = load float, ptr %26, align 4, !tbaa !5
  %81 = fmul float %80, 1.500000e+01
  %82 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %79, i32 noundef 15)
  %83 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %81, i32 noundef 15)
  %84 = extractelement <16 x i1> %36, i64 7
  %spec.select.4 = select i1 %84, i32 0, i32 %82
  %85 = shl i32 %83, 4
  %86 = extractelement <16 x i1> %36, i64 6
  %87 = select i1 %86, i32 0, i32 %85
  %88 = or i32 %87, %spec.select.4
  %89 = trunc i32 %88 to i8
  store i8 %89, ptr %27, align 1, !tbaa !9
  %90 = load float, ptr %28, align 4, !tbaa !5
  %91 = fmul float %90, 1.500000e+01
  %92 = load float, ptr %29, align 4, !tbaa !5
  %93 = fmul float %92, 1.500000e+01
  %94 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %91, i32 noundef 15)
  %95 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %93, i32 noundef 15)
  %96 = extractelement <16 x i1> %36, i64 5
  %spec.select.5 = select i1 %96, i32 0, i32 %94
  %97 = shl i32 %95, 4
  %98 = extractelement <16 x i1> %36, i64 4
  %99 = select i1 %98, i32 0, i32 %97
  %100 = or i32 %99, %spec.select.5
  %101 = trunc i32 %100 to i8
  store i8 %101, ptr %30, align 1, !tbaa !9
  %102 = load float, ptr %31, align 4, !tbaa !5
  %103 = fmul float %102, 1.500000e+01
  %104 = load float, ptr %32, align 4, !tbaa !5
  %105 = fmul float %104, 1.500000e+01
  %106 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %103, i32 noundef 15)
  %107 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %105, i32 noundef 15)
  %108 = extractelement <16 x i1> %36, i64 3
  %spec.select.6 = select i1 %108, i32 0, i32 %106
  %109 = shl i32 %107, 4
  %110 = extractelement <16 x i1> %36, i64 2
  %111 = select i1 %110, i32 0, i32 %109
  %112 = or i32 %111, %spec.select.6
  %113 = trunc i32 %112 to i8
  store i8 %113, ptr %33, align 1, !tbaa !9
  %114 = load float, ptr %34, align 4, !tbaa !5
  %115 = fmul float %114, 1.500000e+01
  %116 = load float, ptr %35, align 4, !tbaa !5
  %117 = fmul float %116, 1.500000e+01
  %118 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %115, i32 noundef 15)
  %119 = tail call noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef %117, i32 noundef 15)
  %120 = extractelement <16 x i1> %36, i64 1
  %spec.select.7 = select i1 %120, i32 0, i32 %118
  %121 = shl i32 %119, 4
  %122 = extractelement <16 x i1> %36, i64 0
  %123 = select i1 %122, i32 0, i32 %121
  %124 = or i32 %123, %spec.select.7
  %125 = trunc i32 %124 to i8
  %126 = getelementptr inbounds i8, ptr %2, i64 7
  store i8 %125, ptr %126, align 1, !tbaa !9
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef i32 @_ZN6squishL10FloatToIntEfi(float noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass