; LLVM IR from imkcat/CatCrypto :: Sources/ModuleMaps/MD6 (md6_mode)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.md6_state = type { i32, i32, [128 x i8], [129 x i8], i32, i64, i64, i32, [8 x i64], i32, i32, i32, i32, [29 x [64 x i64]], [29 x i32], [29 x i64] }

; Function Attrs: nounwind uwtable
declare dso_local void @md6_detect_byte_order() #0

; Function Attrs: nounwind uwtable
declare dso_local void @md6_reverse_little_endian(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @md6_full_init(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store ptr %2, ptr %10, align 8, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = icmp eq ptr %14, null
  br i1 %15, label %16, label %17

16:                                               ; preds = %6
  store i32 3, ptr %7, align 4
  br label %101

17:                                               ; preds = %6
  %18 = load ptr, ptr %10, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %27

20:                                               ; preds = %17
  %21 = load i32, ptr %11, align 4, !tbaa !9
  %22 = icmp slt i32 %21, 0
  br i1 %22, label %26, label %23

23:                                               ; preds = %20
  %24 = load i32, ptr %11, align 4, !tbaa !9
  %25 = icmp sgt i32 %24, 64
  br i1 %25, label %26, label %27

26:                                               ; preds = %23, %20
  store i32 4, ptr %7, align 4
  br label %101

27:                                               ; preds = %23, %17
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 1
  br i1 %29, label %36, label %30

30:                                               ; preds = %27
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = icmp sgt i32 %31, 512
  br i1 %32, label %36, label %33

33:                                               ; preds = %30
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = icmp sgt i32 %34, 512
  br i1 %35, label %36, label %37

36:                                               ; preds = %33, %30, %27
  store i32 2, ptr %7, align 4
  br label %101

37:                                               ; preds = %33
  call void @md6_detect_byte_order()
  %38 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.memset.p0.i64(ptr align 8 %38, i8 0, i64 15576, i1 false)
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.md6_state, ptr %40, i32 0, i32 0
  store i32 %39, ptr %41, align 8, !tbaa !11
  %42 = load ptr, ptr %10, align 8, !tbaa !5
  %43 = icmp ne ptr %42, null
  br i1 %43, label %44, label %60

44:                                               ; preds = %37
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = icmp sgt i32 %45, 0
  br i1 %46, label %47, label %60

47:                                               ; preds = %44
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.md6_state, ptr %48, i32 0, i32 8
  %50 = getelementptr inbounds [8 x i64], ptr %49, i64 0, i64 0
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %50, ptr align 1 %51, i64 %53, i1 false)
  %54 = load i32, ptr %11, align 4, !tbaa !9
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.md6_state, ptr %55, i32 0, i32 9
  store i32 %54, ptr %56, align 8, !tbaa !14
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.md6_state, ptr %57, i32 0, i32 8
  %59 = getelementptr inbounds [8 x i64], ptr %58, i64 0, i64 0
  call void @md6_reverse_little_endian(ptr noundef %59, i32 noundef 8)
  br label %63

60:                                               ; preds = %44, %37
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.md6_state, ptr %61, i32 0, i32 9
  store i32 0, ptr %62, align 8, !tbaa !14
  br label %63

63:                                               ; preds = %60, %47
  %64 = load i32, ptr %12, align 4, !tbaa !9
  %65 = icmp slt i32 %64, 0
  %66 = zext i1 %65 to i32
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = icmp sgt i32 %67, 255
  %69 = zext i1 %68 to i32
  %70 = or i32 %66, %69
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %73

72:                                               ; preds = %63
  store i32 16, ptr %7, align 4
  br label %101

73:                                               ; preds = %63
  %74 = load i32, ptr %12, align 4, !tbaa !9
  %75 = load ptr, ptr %8, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.md6_state, ptr %75, i32 0, i32 10
  store i32 %74, ptr %76, align 4, !tbaa !15
  %77 = load i32, ptr %13, align 4, !tbaa !9
  %78 = icmp slt i32 %77, 0
  %79 = zext i1 %78 to i32
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = icmp sgt i32 %80, 255
  %82 = zext i1 %81 to i32
  %83 = or i32 %79, %82
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %85, label %86

85:                                               ; preds = %73
  store i32 17, ptr %7, align 4
  br label %101

86:                                               ; preds = %73
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = load ptr, ptr %8, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.md6_state, ptr %88, i32 0, i32 11
  store i32 %87, ptr %89, align 8, !tbaa !16
  %90 = load ptr, ptr %8, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.md6_state, ptr %90, i32 0, i32 4
  store i32 1, ptr %91, align 4, !tbaa !17
  %92 = load ptr, ptr %8, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.md6_state, ptr %92, i32 0, i32 12
  store i32 1, ptr %93, align 4, !tbaa !18
  %94 = load i32, ptr %12, align 4, !tbaa !9
  %95 = icmp eq i32 %94, 0
  br i1 %95, label %96, label %100

96:                                               ; preds = %86
  %97 = load ptr, ptr %8, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.md6_state, ptr %97, i32 0, i32 14
  %99 = getelementptr inbounds [29 x i32], ptr %98, i64 0, i64 1
  store i32 1024, ptr %99, align 4, !tbaa !9
  br label %100

100:                                              ; preds = %96, %86
  store i32 0, ptr %7, align 4
  br label %101

101:                                              ; preds = %100, %85, %72, %36, %26, %16
  %102 = load i32, ptr %7, align 4
  ret i32 %102
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"", !10, i64 0, !10, i64 4, !7, i64 8, !7, i64 136, !10, i64 268, !13, i64 272, !13, i64 280, !10, i64 288, !7, i64 296, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !7, i64 376, !7, i64 15224, !7, i64 15344}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !10, i64 360}
!15 = !{!12, !10, i64 364}
!16 = !{!12, !10, i64 368}
!17 = !{!12, !10, i64 268}
!18 = !{!12, !10, i64 372}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @md6_detect_byte_order() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @md6_reverse_little_endian(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 18) i32 @md6_full_init(ptr noundef %0, i32 noundef %1, ptr noundef readonly %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp eq ptr %0, null
  br i1 %7, label %30, label %8

8:                                                ; preds = %6
  %9 = icmp ne ptr %2, null
  %or.cond = icmp ugt i32 %3, 64
  %or.cond42 = and i1 %9, %or.cond
  br i1 %or.cond42, label %30, label %10

10:                                               ; preds = %8
  %11 = add i32 %1, -513
  %or.cond5 = icmp ult i32 %11, -512
  br i1 %or.cond5, label %30, label %12

12:                                               ; preds = %10
  tail call void @md6_detect_byte_order()
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(15576) %0, i8 0, i64 15576, i1 false)
  store i32 %1, ptr %0, align 8, !tbaa !5
  %13 = icmp sgt i32 %3, 0
  %or.cond7 = and i1 %9, %13
  br i1 %or.cond7, label %14, label %18

14:                                               ; preds = %12
  %15 = getelementptr inbounds i8, ptr %0, i64 296
  %16 = zext nneg i32 %3 to i64
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %15, ptr nonnull align 1 %2, i64 %16, i1 false)
  %17 = getelementptr inbounds i8, ptr %0, i64 360
  store i32 %3, ptr %17, align 8, !tbaa !11
  tail call void @md6_reverse_little_endian(ptr noundef nonnull %15, i32 noundef 8)
  br label %18

18:                                               ; preds = %12, %14
  %19 = icmp ugt i32 %4, 255
  br i1 %19, label %30, label %20

20:                                               ; preds = %18
  %21 = getelementptr inbounds i8, ptr %0, i64 364
  store i32 %4, ptr %21, align 4, !tbaa !12
  %22 = icmp ugt i32 %5, 255
  br i1 %22, label %30, label %23

23:                                               ; preds = %20
  %24 = getelementptr inbounds i8, ptr %0, i64 368
  store i32 %5, ptr %24, align 8, !tbaa !13
  %25 = getelementptr inbounds i8, ptr %0, i64 268
  store i32 1, ptr %25, align 4, !tbaa !14
  %26 = getelementptr inbounds i8, ptr %0, i64 372
  store i32 1, ptr %26, align 4, !tbaa !15
  %27 = icmp eq i32 %4, 0
  br i1 %27, label %28, label %30

28:                                               ; preds = %23
  %29 = getelementptr inbounds i8, ptr %0, i64 15228
  store i32 1024, ptr %29, align 4, !tbaa !16
  br label %30

30:                                               ; preds = %23, %28, %20, %18, %10, %8, %6
  %.0 = phi i32 [ 3, %6 ], [ 4, %8 ], [ 2, %10 ], [ 16, %18 ], [ 17, %20 ], [ 0, %28 ], [ 0, %23 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !8, i64 8, !8, i64 136, !7, i64 268, !10, i64 272, !10, i64 280, !7, i64 288, !8, i64 296, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !8, i64 376, !8, i64 15224, !8, i64 15344}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 360}
!12 = !{!6, !7, i64 364}
!13 = !{!6, !7, i64 368}
!14 = !{!6, !7, i64 268}
!15 = !{!6, !7, i64 372}
!16 = !{!7, !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass