; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (CRSWaitSynchronization)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRS_TypeDef = type { i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RCCEx_CRSWaitSynchronization(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %5 = call i32 @HAL_GetTick()
  store i32 %5, ptr %4, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %85, %1
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = icmp ne i32 %7, -1
  br i1 %8, label %9, label %20

9:                                                ; preds = %6
  %10 = call i32 @HAL_GetTick()
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = sub i32 %10, %11
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = icmp ugt i32 %12, %13
  br i1 %14, label %18, label %15

15:                                               ; preds = %9
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %15, %9
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %18, %15
  br label %20

20:                                               ; preds = %19, %6
  %21 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %22 = zext i32 %21 to i64
  %23 = and i64 %22, 1
  %24 = icmp eq i64 %23, 1
  br i1 %24, label %25, label %31

25:                                               ; preds = %20
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = or i32 %26, 2
  store i32 %27, ptr %3, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %25
  store volatile i32 1, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %29

29:                                               ; preds = %28
  br label %30

30:                                               ; preds = %29
  br label %31

31:                                               ; preds = %30, %20
  %32 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, 2
  %35 = icmp eq i64 %34, 2
  br i1 %35, label %36, label %42

36:                                               ; preds = %31
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = or i32 %37, 4
  store i32 %38, ptr %3, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %36
  store volatile i32 2, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %40

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40
  br label %42

42:                                               ; preds = %41, %31
  %43 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = and i64 %44, 1024
  %46 = icmp eq i64 %45, 1024
  br i1 %46, label %47, label %53

47:                                               ; preds = %42
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = or i32 %48, 32
  store i32 %49, ptr %3, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %47
  store volatile i32 4, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %51

51:                                               ; preds = %50
  br label %52

52:                                               ; preds = %51
  br label %53

53:                                               ; preds = %52, %42
  %54 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %55 = zext i32 %54 to i64
  %56 = and i64 %55, 256
  %57 = icmp eq i64 %56, 256
  br i1 %57, label %58, label %64

58:                                               ; preds = %53
  %59 = load i32, ptr %3, align 4, !tbaa !5
  %60 = or i32 %59, 8
  store i32 %60, ptr %3, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %58
  store volatile i32 4, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %62

62:                                               ; preds = %61
  br label %63

63:                                               ; preds = %62
  br label %64

64:                                               ; preds = %63, %53
  %65 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %66 = zext i32 %65 to i64
  %67 = and i64 %66, 512
  %68 = icmp eq i64 %67, 512
  br i1 %68, label %69, label %75

69:                                               ; preds = %64
  %70 = load i32, ptr %3, align 4, !tbaa !5
  %71 = or i32 %70, 16
  store i32 %71, ptr %3, align 4, !tbaa !5
  br label %72

72:                                               ; preds = %69
  store volatile i32 4, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %73

73:                                               ; preds = %72
  br label %74

74:                                               ; preds = %73
  br label %75

75:                                               ; preds = %74, %64
  %76 = load volatile i32, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %77 = zext i32 %76 to i64
  %78 = and i64 %77, 8
  %79 = icmp eq i64 %78, 8
  br i1 %79, label %80, label %84

80:                                               ; preds = %75
  br label %81

81:                                               ; preds = %80
  store volatile i32 8, ptr getelementptr inbounds (%struct.CRS_TypeDef, ptr inttoptr (i64 1073775616 to ptr), i32 0, i32 3), align 4, !tbaa !11
  br label %82

82:                                               ; preds = %81
  br label %83

83:                                               ; preds = %82
  br label %84

84:                                               ; preds = %83, %75
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %3, align 4, !tbaa !5
  %87 = icmp eq i32 0, %86
  br i1 %87, label %6, label %88, !llvm.loop !12

88:                                               ; preds = %85
  %89 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %89
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 12}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 1, 0) i32 @HAL_RCCEx_CRSWaitSynchronization(i32 noundef %0) local_unnamed_addr #1 {
  %2 = tail call i32 @HAL_GetTick() #2
  %.not = icmp eq i32 %0, -1
  %3 = icmp eq i32 %0, 0
  br i1 %.not, label %.split.us, label %.split

.split.us:                                        ; preds = %1, %31
  %4 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %5 = and i32 %4, 1
  %.not13.us = icmp eq i32 %5, 0
  br i1 %.not13.us, label %7, label %6

6:                                                ; preds = %.split.us
  store volatile i32 1, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %7

7:                                                ; preds = %6, %.split.us
  %.2.us = phi i32 [ 2, %6 ], [ 0, %.split.us ]
  %8 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %9 = and i32 %8, 2
  %.not14.us = icmp eq i32 %9, 0
  br i1 %.not14.us, label %12, label %10

10:                                               ; preds = %7
  %11 = or disjoint i32 %.2.us, 4
  store volatile i32 2, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %12

12:                                               ; preds = %10, %7
  %.3.us = phi i32 [ %11, %10 ], [ %.2.us, %7 ]
  %13 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %14 = and i32 %13, 1024
  %.not15.us = icmp eq i32 %14, 0
  br i1 %.not15.us, label %17, label %15

15:                                               ; preds = %12
  %16 = or i32 %.3.us, 32
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %17

17:                                               ; preds = %15, %12
  %.4.us = phi i32 [ %16, %15 ], [ %.3.us, %12 ]
  %18 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %19 = and i32 %18, 256
  %.not16.us = icmp eq i32 %19, 0
  br i1 %.not16.us, label %22, label %20

20:                                               ; preds = %17
  %21 = or i32 %.4.us, 8
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %22

22:                                               ; preds = %20, %17
  %.5.us = phi i32 [ %21, %20 ], [ %.4.us, %17 ]
  %23 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %24 = and i32 %23, 512
  %.not17.us = icmp eq i32 %24, 0
  br i1 %.not17.us, label %27, label %25

25:                                               ; preds = %22
  %26 = or i32 %.5.us, 16
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %27

27:                                               ; preds = %25, %22
  %.6.us = phi i32 [ %26, %25 ], [ %.5.us, %22 ]
  %28 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %29 = and i32 %28, 8
  %.not18.us = icmp eq i32 %29, 0
  br i1 %.not18.us, label %31, label %30

30:                                               ; preds = %27
  store volatile i32 8, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %31

31:                                               ; preds = %30, %27
  %32 = icmp eq i32 %.6.us, 0
  br i1 %32, label %.split.us, label %.split20.us, !llvm.loop !11

.split:                                           ; preds = %1, %64
  %33 = tail call i32 @HAL_GetTick() #2
  %34 = sub i32 %33, %2
  %35 = icmp ugt i32 %34, %0
  %or.cond = or i1 %3, %35
  %spec.select = zext i1 %or.cond to i32
  %36 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %37 = and i32 %36, 1
  %.not13 = icmp eq i32 %37, 0
  br i1 %.not13, label %40, label %38

38:                                               ; preds = %.split
  %39 = or disjoint i32 %spec.select, 2
  store volatile i32 1, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %40

40:                                               ; preds = %38, %.split
  %.2 = phi i32 [ %39, %38 ], [ %spec.select, %.split ]
  %41 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %42 = and i32 %41, 2
  %.not14 = icmp eq i32 %42, 0
  br i1 %.not14, label %45, label %43

43:                                               ; preds = %40
  %44 = or i32 %.2, 4
  store volatile i32 2, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %45

45:                                               ; preds = %43, %40
  %.3 = phi i32 [ %44, %43 ], [ %.2, %40 ]
  %46 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %47 = and i32 %46, 1024
  %.not15 = icmp eq i32 %47, 0
  br i1 %.not15, label %50, label %48

48:                                               ; preds = %45
  %49 = or i32 %.3, 32
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %50

50:                                               ; preds = %48, %45
  %.4 = phi i32 [ %49, %48 ], [ %.3, %45 ]
  %51 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %52 = and i32 %51, 256
  %.not16 = icmp eq i32 %52, 0
  br i1 %.not16, label %55, label %53

53:                                               ; preds = %50
  %54 = or i32 %.4, 8
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %55

55:                                               ; preds = %53, %50
  %.5 = phi i32 [ %54, %53 ], [ %.4, %50 ]
  %56 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %57 = and i32 %56, 512
  %.not17 = icmp eq i32 %57, 0
  br i1 %.not17, label %60, label %58

58:                                               ; preds = %55
  %59 = or i32 %.5, 16
  store volatile i32 4, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %60

60:                                               ; preds = %58, %55
  %.6 = phi i32 [ %59, %58 ], [ %.5, %55 ]
  %61 = load volatile i32, ptr inttoptr (i64 1073775624 to ptr), align 8, !tbaa !5
  %62 = and i32 %61, 8
  %.not18 = icmp eq i32 %62, 0
  br i1 %.not18, label %64, label %63

63:                                               ; preds = %60
  store volatile i32 8, ptr inttoptr (i64 1073775628 to ptr), align 4, !tbaa !10
  br label %64

64:                                               ; preds = %60, %63
  %65 = icmp eq i32 %.6, 0
  br i1 %65, label %.split, label %.split20.us, !llvm.loop !11

.split20.us:                                      ; preds = %64, %31
  %.us-phi = phi i32 [ %.6.us, %31 ], [ %.6, %64 ]
  ret i32 %.us-phi
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 12}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass