; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/4820（线段树）.ll (Z7seg_addiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32, i32, i64, i8 }

@seg = external dso_local global [1000002 x %struct.Segment], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_addiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = call noundef i32 @_Z7seg_idxii(i32 noundef %16, i32 noundef %17)
  store i32 %18, ptr %11, align 4, !tbaa !5
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %63

22:                                               ; preds = %5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = load i32, ptr %9, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %63

26:                                               ; preds = %22
  %27 = load i32, ptr %11, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %28
  %30 = getelementptr inbounds %struct.Segment, ptr %29, i32 0, i32 3
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = load i32, ptr %10, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = mul nsw i64 %32, %34
  %36 = load i32, ptr %11, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %37
  %39 = getelementptr inbounds %struct.Segment, ptr %38, i32 0, i32 4
  %40 = load i64, ptr %39, align 16, !tbaa !13
  %41 = add nsw i64 %40, %35
  store i64 %41, ptr %39, align 16, !tbaa !13
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %44
  %46 = getelementptr inbounds %struct.Segment, ptr %45, i32 0, i32 0
  %47 = load i32, ptr %46, align 16, !tbaa !14
  %48 = add nsw i32 %47, %42
  store i32 %48, ptr %46, align 16, !tbaa !14
  %49 = load i32, ptr %10, align 4, !tbaa !5
  %50 = load i32, ptr %11, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %51
  %53 = getelementptr inbounds %struct.Segment, ptr %52, i32 0, i32 1
  %54 = load i32, ptr %53, align 4, !tbaa !15
  %55 = add nsw i32 %54, %49
  store i32 %55, ptr %53, align 4, !tbaa !15
  %56 = load i32, ptr %10, align 4, !tbaa !5
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %58
  %60 = getelementptr inbounds %struct.Segment, ptr %59, i32 0, i32 2
  %61 = load i32, ptr %60, align 8, !tbaa !16
  %62 = add nsw i32 %61, %56
  store i32 %62, ptr %60, align 8, !tbaa !16
  store i32 1, ptr %12, align 4
  br label %102

63:                                               ; preds = %22, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %64 = load i32, ptr %6, align 4, !tbaa !5
  %65 = load i32, ptr %7, align 4, !tbaa !5
  %66 = add nsw i32 %64, %65
  %67 = ashr i32 %66, 1
  store i32 %67, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %68 = load i32, ptr %6, align 4, !tbaa !5
  %69 = load i32, ptr %13, align 4, !tbaa !5
  %70 = call noundef i32 @_Z7seg_idxii(i32 noundef %68, i32 noundef %69)
  store i32 %70, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %71 = load i32, ptr %13, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  %73 = load i32, ptr %7, align 4, !tbaa !5
  %74 = call noundef i32 @_Z7seg_idxii(i32 noundef %72, i32 noundef %73)
  store i32 %74, ptr %15, align 4, !tbaa !5
  %75 = load i32, ptr %11, align 4, !tbaa !5
  %76 = load i32, ptr %14, align 4, !tbaa !5
  %77 = load i32, ptr %15, align 4, !tbaa !5
  call void @_Z8seg_downiii(i32 noundef %75, i32 noundef %76, i32 noundef %77)
  %78 = load i32, ptr %8, align 4, !tbaa !5
  %79 = load i32, ptr %13, align 4, !tbaa !5
  %80 = icmp sle i32 %78, %79
  br i1 %80, label %81, label %87

81:                                               ; preds = %63
  %82 = load i32, ptr %6, align 4, !tbaa !5
  %83 = load i32, ptr %13, align 4, !tbaa !5
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = load i32, ptr %9, align 4, !tbaa !5
  %86 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z7seg_addiiiii(i32 noundef %82, i32 noundef %83, i32 noundef %84, i32 noundef %85, i32 noundef %86)
  br label %87

87:                                               ; preds = %81, %63
  %88 = load i32, ptr %13, align 4, !tbaa !5
  %89 = load i32, ptr %9, align 4, !tbaa !5
  %90 = icmp slt i32 %88, %89
  br i1 %90, label %91, label %98

91:                                               ; preds = %87
  %92 = load i32, ptr %13, align 4, !tbaa !5
  %93 = add nsw i32 %92, 1
  %94 = load i32, ptr %7, align 4, !tbaa !5
  %95 = load i32, ptr %8, align 4, !tbaa !5
  %96 = load i32, ptr %9, align 4, !tbaa !5
  %97 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z7seg_addiiiii(i32 noundef %93, i32 noundef %94, i32 noundef %95, i32 noundef %96, i32 noundef %97)
  br label %98

98:                                               ; preds = %91, %87
  %99 = load i32, ptr %11, align 4, !tbaa !5
  %100 = load i32, ptr %14, align 4, !tbaa !5
  %101 = load i32, ptr %15, align 4, !tbaa !5
  call void @_Z6seg_upiii(i32 noundef %99, i32 noundef %100, i32 noundef %101)
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  store i32 0, ptr %12, align 4
  br label %102

102:                                              ; preds = %98, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  %103 = load i32, ptr %12, align 4
  switch i32 %103, label %105 [
    i32 0, label %104
    i32 1, label %104
  ]

104:                                              ; preds = %102, %102
  ret void

105:                                              ; preds = %102
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8seg_downiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z6seg_upiii(i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"_ZTS7Segment", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !12, i64 24}
!11 = !{!"long long", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!10, !11, i64 16}
!14 = !{!10, !6, i64 0}
!15 = !{!10, !6, i64 4}
!16 = !{!10, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32, i32, i64, i8 }

@seg = external dso_local local_unnamed_addr global [1000002 x %struct.Segment], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_addiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %.not = icmp sgt i32 %2, %0
  %.not43 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not43
  br i1 %or.cond, label %25, label %7

7:                                                ; preds = %5
  %8 = sext i32 %6 to i64
  %9 = getelementptr inbounds [1000002 x %struct.Segment], ptr @seg, i64 0, i64 %8
  %10 = getelementptr inbounds i8, ptr %9, i64 12
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = sext i32 %4 to i64
  %14 = mul nsw i64 %12, %13
  %15 = getelementptr inbounds i8, ptr %9, i64 16
  %16 = load i64, ptr %15, align 16, !tbaa !12
  %17 = add nsw i64 %14, %16
  store i64 %17, ptr %15, align 16, !tbaa !12
  %18 = load <2 x i32>, ptr %9, align 16, !tbaa !13
  %19 = insertelement <2 x i32> poison, i32 %4, i64 0
  %20 = shufflevector <2 x i32> %19, <2 x i32> poison, <2 x i32> zeroinitializer
  %21 = add nsw <2 x i32> %18, %20
  store <2 x i32> %21, ptr %9, align 16, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %9, i64 8
  %23 = load i32, ptr %22, align 8, !tbaa !14
  %24 = add nsw i32 %23, %4
  store i32 %24, ptr %22, align 8, !tbaa !14
  br label %36

25:                                               ; preds = %5
  %26 = add nsw i32 %1, %0
  %27 = ashr i32 %26, 1
  %28 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %27)
  %29 = add nsw i32 %27, 1
  %30 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %29, i32 noundef %1)
  tail call void @_Z8seg_downiii(i32 noundef %6, i32 noundef %28, i32 noundef %30)
  %.not44 = icmp slt i32 %27, %2
  br i1 %.not44, label %32, label %31

31:                                               ; preds = %25
  tail call void @_Z7seg_addiiiii(i32 noundef %0, i32 noundef %27, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %32

32:                                               ; preds = %31, %25
  %33 = icmp slt i32 %27, %3
  br i1 %33, label %34, label %35

34:                                               ; preds = %32
  tail call void @_Z7seg_addiiiii(i32 noundef %29, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %35

35:                                               ; preds = %34, %32
  tail call void @_Z6seg_upiii(i32 noundef %6, i32 noundef %28, i32 noundef %30)
  br label %36

36:                                               ; preds = %35, %7
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8seg_downiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z6seg_upiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"_ZTS7Segment", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!"bool", !8, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass