; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/edge-impulse-sdk/tensorflow/lite/kernels/internal (quantization_util)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef, ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN6tflite20IntegerDoubleCompareEdd(double noundef %0, double noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  store double %0, ptr %4, align 8, !tbaa !5
  store double %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %11 = load double, ptr %4, align 8, !tbaa !5
  %12 = call noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef %11, ptr noundef %6)
  store i64 %12, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %13 = load double, ptr %5, align 8, !tbaa !5
  %14 = call noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef %13, ptr noundef %8)
  store i64 %14, ptr %9, align 8, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !11
  %16 = call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #2
  %17 = icmp eq i32 %15, %16
  br i1 %17, label %22, label %18

18:                                               ; preds = %2
  %19 = load i32, ptr %8, align 4, !tbaa !11
  %20 = call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #2
  %21 = icmp eq i32 %19, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %18, %2
  store i32 1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

23:                                               ; preds = %18
  %24 = load i64, ptr %7, align 8, !tbaa !9
  %25 = icmp eq i64 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %23
  %27 = load i64, ptr %9, align 8, !tbaa !9
  %28 = icmp slt i64 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %26
  store i32 1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

30:                                               ; preds = %26, %23
  %31 = load i64, ptr %7, align 8, !tbaa !9
  %32 = icmp slt i64 %31, 0
  br i1 %32, label %33, label %37

33:                                               ; preds = %30
  %34 = load i64, ptr %9, align 8, !tbaa !9
  %35 = icmp eq i64 %34, 0
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

37:                                               ; preds = %33, %30
  %38 = load i32, ptr %6, align 4, !tbaa !11
  %39 = load i32, ptr %8, align 4, !tbaa !11
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %41, label %42

41:                                               ; preds = %37
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

42:                                               ; preds = %37
  %43 = load i32, ptr %6, align 4, !tbaa !11
  %44 = load i32, ptr %8, align 4, !tbaa !11
  %45 = icmp sgt i32 %43, %44
  br i1 %45, label %46, label %47

46:                                               ; preds = %42
  store i32 1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

47:                                               ; preds = %42
  %48 = load i64, ptr %7, align 8, !tbaa !9
  %49 = load i64, ptr %9, align 8, !tbaa !9
  %50 = icmp slt i64 %48, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %47
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

52:                                               ; preds = %47
  %53 = load i64, ptr %7, align 8, !tbaa !9
  %54 = load i64, ptr %9, align 8, !tbaa !9
  %55 = icmp sgt i64 %53, %54
  br i1 %55, label %56, label %57

56:                                               ; preds = %52
  store i32 1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

57:                                               ; preds = %52
  store i32 0, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %58

58:                                               ; preds = %57, %56, %51, %46, %41, %36, %29, %22
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %59 = load i32, ptr %3, align 4
  ret i32 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 -1, 2) i32 @_ZN6tflite20IntegerDoubleCompareEdd(double noundef %0, double noundef %1) local_unnamed_addr #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #2
  %5 = call noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef %0, ptr noundef nonnull %3)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #2
  %6 = call noundef i64 @_ZN6tflite12IntegerFrExpEdPi(double noundef %1, ptr noundef nonnull %4)
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #2
  %9 = icmp eq i32 %7, %8
  br i1 %9, label %30, label %10

10:                                               ; preds = %2
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #2
  %13 = icmp eq i32 %11, %12
  br i1 %13, label %30, label %14

14:                                               ; preds = %10
  %15 = icmp eq i64 %5, 0
  %16 = icmp slt i64 %6, 0
  %or.cond = and i1 %15, %16
  br i1 %or.cond, label %30, label %17

17:                                               ; preds = %14
  %18 = icmp slt i64 %5, 0
  %19 = icmp eq i64 %6, 0
  %or.cond3 = and i1 %18, %19
  br i1 %or.cond3, label %30, label %20

20:                                               ; preds = %17
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %30, label %24

24:                                               ; preds = %20
  %25 = icmp sgt i32 %21, %22
  br i1 %25, label %30, label %26

26:                                               ; preds = %24
  %27 = icmp slt i64 %5, %6
  br i1 %27, label %30, label %28

28:                                               ; preds = %26
  %29 = icmp sgt i64 %5, %6
  %. = zext i1 %29 to i32
  br label %30

30:                                               ; preds = %28, %26, %24, %20, %17, %14, %2, %10
  %.0 = phi i32 [ 1, %10 ], [ 1, %2 ], [ 1, %14 ], [ -1, %17 ], [ -1, %20 ], [ 1, %24 ], [ -1, %26 ], [ %., %28 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #2
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass