; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/TemporalRN.ll (ZN10TemporalRND2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TemporalRN = type <{ %class.ReduceNetwork, i32, [4 x i8], %"class.std::vector", %"class.std::vector", ptr, ptr, i32, %class.Config, [4 x i8] }>
%class.ReduceNetwork = type { %class.Unit }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Config = type { i32, %class.DSNetworkConfig, %class.DSwitchConfig, %class.MSNetworkConfig, %class.MSwitchConfig, %class.ASNetworkConfig, %class.ASwitchConfig, %class.LookUpTableConfig, %class.SDMemoryConfig }
%class.DSNetworkConfig = type { i32 }
%class.DSwitchConfig = type { i32, i32, i32, i32 }
%class.MSNetworkConfig = type { i32, i32, i32, i32 }
%class.MSwitchConfig = type { i32, i32, i32, i32, i32, i32 }
%class.ASNetworkConfig = type { i32, i32 }
%class.ASwitchConfig = type { i32, i32, i32, i32, i32, i32 }
%class.LookUpTableConfig = type { i32, i32 }
%class.SDMemoryConfig = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@_ZTV10TemporalRN = external dso_local unnamed_addr constant { [14 x ptr] }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10TemporalRND2Ev(ptr noundef nonnull align 8 dereferenceable(284) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  store ptr getelementptr inbounds inrange(-16, 96) ({ [14 x ptr] }, ptr @_ZTV10TemporalRN, i32 0, i32 0, i32 2), ptr %4, align 8, !tbaa !9
  %5 = getelementptr inbounds %class.TemporalRN, ptr %4, i32 0, i32 6
  %6 = load ptr, ptr %5, align 8, !tbaa !11
  %7 = icmp eq ptr %6, null
  br i1 %7, label %9, label %8

8:                                                ; preds = %1
  call void @_ZN18AccumulationBufferD1Ev(ptr noundef nonnull align 8 dereferenceable(200) %6) #5
  call void @_ZdlPvm(ptr noundef %6, i64 noundef 200) #6
  br label %9

9:                                                ; preds = %8, %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !36
  br label %10

10:                                               ; preds = %26, %9
  %11 = load i32, ptr %3, align 4, !tbaa !36
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds %class.TemporalRN, ptr %4, i32 0, i32 3
  %14 = call noundef i64 @_ZNKSt6vectorIP10ConnectionSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13) #5
  %15 = icmp ult i64 %12, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %29

17:                                               ; preds = %10
  %18 = getelementptr inbounds %class.TemporalRN, ptr %4, i32 0, i32 3
  %19 = load i32, ptr %3, align 4, !tbaa !36
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP10ConnectionSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %20) #5
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %25, label %24

24:                                               ; preds = %17
  call void @_ZN10ConnectionD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %22) #5
  call void @_ZdlPvm(ptr noundef %22, i64 noundef 64) #6
  br label %25

25:                                               ; preds = %24, %17
  br label %26

26:                                               ; preds = %25
  %27 = load i32, ptr %3, align 4, !tbaa !36
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %3, align 4, !tbaa !36
  br label %10, !llvm.loop !37

29:                                               ; preds = %16
  %30 = getelementptr inbounds %class.TemporalRN, ptr %4, i32 0, i32 4
  call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %30) #5
  %31 = getelementptr inbounds %class.TemporalRN, ptr %4, i32 0, i32 3
  call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %31) #5
  call void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %4) #5
  ret void
}

; Function Attrs: nounwind
declare void @_ZN18AccumulationBufferD1Ev(ptr noundef nonnull align 8 dereferenceable(200)) unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP10ConnectionSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP10ConnectionSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10ConnectionD2Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 112}
!12 = !{!"_ZTS10TemporalRN", !13, i64 0, !15, i64 48, !19, i64 56, !19, i64 80, !6, i64 104, !6, i64 112, !15, i64 120, !23, i64 124}
!13 = !{!"_ZTS13ReduceNetwork", !14, i64 0}
!14 = !{!"_ZTS4Unit", !15, i64 8, !16, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !17, i64 0, !18, i64 8, !7, i64 16}
!17 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!18 = !{!"long", !7, i64 0}
!19 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTS6Config", !15, i64 0, !24, i64 4, !25, i64 8, !26, i64 24, !28, i64 40, !29, i64 64, !31, i64 72, !32, i64 96, !33, i64 104}
!24 = !{!"_ZTS15DSNetworkConfig", !15, i64 0}
!25 = !{!"_ZTS13DSwitchConfig", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12}
!26 = !{!"_ZTS15MSNetworkConfig", !27, i64 0, !15, i64 4, !15, i64 8, !15, i64 12}
!27 = !{!"_ZTS19MultiplierNetwork_t", !7, i64 0}
!28 = !{!"_ZTS13MSwitchConfig", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20}
!29 = !{!"_ZTS15ASNetworkConfig", !30, i64 0, !15, i64 4}
!30 = !{!"_ZTS15ReduceNetwork_t", !7, i64 0}
!31 = !{!"_ZTS13ASwitchConfig", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20}
!32 = !{!"_ZTS17LookUpTableConfig", !15, i64 0, !15, i64 4}
!33 = !{!"_ZTS14SDMemoryConfig", !34, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !35, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !15, i64 48, !15, i64 52}
!34 = !{!"_ZTS18MemoryController_t", !7, i64 0}
!35 = !{!"_ZTS17MemoryHierarchy_t", !7, i64 0}
!36 = !{!15, !15, i64 0}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV10TemporalRN = external dso_local unnamed_addr constant { [14 x ptr] }, align 8

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10TemporalRND2Ev(ptr noundef nonnull align 8 dereferenceable(284) %0) unnamed_addr #1 align 2 {
  store ptr getelementptr inbounds inrange(-16, 96) (i8, ptr @_ZTV10TemporalRN, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 112
  %3 = load ptr, ptr %2, align 8, !tbaa !8
  %4 = icmp eq ptr %3, null
  br i1 %4, label %6, label %5

5:                                                ; preds = %1
  tail call void @_ZN18AccumulationBufferD1Ev(ptr noundef nonnull align 8 dereferenceable(200) %3) #4
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 200) #5
  br label %6

6:                                                ; preds = %5, %1
  %7 = getelementptr inbounds i8, ptr %0, i64 56
  %8 = tail call noundef i64 @_ZNKSt6vectorIP10ConnectionSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %14, %6
  %9 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #4
  tail call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  tail call void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %0) #4
  ret void

.lr.ph:                                           ; preds = %6, %14
  %indvars.iv = phi i64 [ %indvars.iv.next, %14 ], [ 0, %6 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP10ConnectionSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv) #4
  %11 = load ptr, ptr %10, align 8, !tbaa !35
  %12 = icmp eq ptr %11, null
  br i1 %12, label %14, label %13

13:                                               ; preds = %.lr.ph
  tail call void @_ZN10ConnectionD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %11) #4
  tail call void @_ZdlPvm(ptr noundef nonnull %11, i64 noundef 64) #5
  br label %14

14:                                               ; preds = %.lr.ph, %13
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = tail call noundef i64 @_ZNKSt6vectorIP10ConnectionSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  %16 = icmp ugt i64 %15, %indvars.iv.next
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !36
}

; Function Attrs: nounwind
declare void @_ZN18AccumulationBufferD1Ev(ptr noundef nonnull align 8 dereferenceable(200)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP10ConnectionSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP10ConnectionSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10ConnectionD2Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #2 align 2

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !16, i64 112}
!9 = !{!"_ZTS10TemporalRN", !10, i64 0, !12, i64 48, !18, i64 56, !18, i64 80, !16, i64 104, !16, i64 112, !12, i64 120, !22, i64 124}
!10 = !{!"_ZTS13ReduceNetwork", !11, i64 0}
!11 = !{!"_ZTS4Unit", !12, i64 8, !14, i64 16}
!12 = !{!"int", !13, i64 0}
!13 = !{!"omnipotent char", !7, i64 0}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !17, i64 8, !13, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !16, i64 0}
!16 = !{!"any pointer", !13, i64 0}
!17 = !{!"long", !13, i64 0}
!18 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!22 = !{!"_ZTS6Config", !12, i64 0, !23, i64 4, !24, i64 8, !25, i64 24, !27, i64 40, !28, i64 64, !30, i64 72, !31, i64 96, !32, i64 104}
!23 = !{!"_ZTS15DSNetworkConfig", !12, i64 0}
!24 = !{!"_ZTS13DSwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!25 = !{!"_ZTS15MSNetworkConfig", !26, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!26 = !{!"_ZTS19MultiplierNetwork_t", !13, i64 0}
!27 = !{!"_ZTS13MSwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!28 = !{!"_ZTS15ASNetworkConfig", !29, i64 0, !12, i64 4}
!29 = !{!"_ZTS15ReduceNetwork_t", !13, i64 0}
!30 = !{!"_ZTS13ASwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!31 = !{!"_ZTS17LookUpTableConfig", !12, i64 0, !12, i64 4}
!32 = !{!"_ZTS14SDMemoryConfig", !33, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !34, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52}
!33 = !{!"_ZTS18MemoryController_t", !13, i64 0}
!34 = !{!"_ZTS17MemoryHierarchy_t", !13, i64 0}
!35 = !{!16, !16, i64 0}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass