; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__I2S_HandleTypeDef = type { ptr, %struct.I2S_InitTypeDef, ptr, i16, i16, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.I2S_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SPI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, [3 x i32], i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_I2S_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  %8 = load ptr, ptr %6, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %14, label %10

10:                                               ; preds = %3
  %11 = load i16, ptr %7, align 2, !tbaa !9
  %12 = zext i16 %11 to i64
  %13 = icmp eq i64 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %10, %3
  store i32 1, ptr %4, align 4
  br label %130

15:                                               ; preds = %10
  br label %16

16:                                               ; preds = %15
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %17, i32 0, i32 12
  %19 = load volatile i32, ptr %18, align 8, !tbaa !11
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 2, ptr %4, align 4
  br label %130

22:                                               ; preds = %16
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %23, i32 0, i32 12
  store volatile i32 1, ptr %24, align 8, !tbaa !11
  br label %25

25:                                               ; preds = %22
  br label %26

26:                                               ; preds = %25
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %27, i32 0, i32 13
  %29 = load volatile i32, ptr %28, align 4, !tbaa !15
  %30 = icmp ne i32 %29, 1
  br i1 %30, label %31, label %36

31:                                               ; preds = %26
  br label %32

32:                                               ; preds = %31
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %33, i32 0, i32 12
  store volatile i32 0, ptr %34, align 8, !tbaa !11
  br label %35

35:                                               ; preds = %32
  store i32 2, ptr %4, align 4
  br label %130

36:                                               ; preds = %26
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %37, i32 0, i32 13
  store volatile i32 4, ptr %38, align 4, !tbaa !15
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %39, i32 0, i32 14
  store volatile i32 0, ptr %40, align 8, !tbaa !16
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %42, i32 0, i32 5
  store ptr %41, ptr %43, align 8, !tbaa !17
  %44 = load i16, ptr %7, align 2, !tbaa !9
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %45, i32 0, i32 6
  store volatile i16 %44, ptr %46, align 8, !tbaa !18
  %47 = load i16, ptr %7, align 2, !tbaa !9
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %48, i32 0, i32 7
  store volatile i16 %47, ptr %49, align 2, !tbaa !19
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %50, i32 0, i32 2
  store ptr null, ptr %51, align 8, !tbaa !20
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %52, i32 0, i32 3
  store volatile i16 0, ptr %53, align 8, !tbaa !21
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %54, i32 0, i32 4
  store volatile i16 0, ptr %55, align 2, !tbaa !22
  %56 = load ptr, ptr %5, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %56, i32 0, i32 1
  %58 = getelementptr inbounds %struct.I2S_InitTypeDef, ptr %57, i32 0, i32 2
  %59 = load i32, ptr %58, align 8, !tbaa !23
  %60 = zext i32 %59 to i64
  %61 = icmp eq i64 %60, 256
  br i1 %61, label %69, label %62

62:                                               ; preds = %36
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %63, i32 0, i32 1
  %65 = getelementptr inbounds %struct.I2S_InitTypeDef, ptr %64, i32 0, i32 2
  %66 = load i32, ptr %65, align 8, !tbaa !23
  %67 = zext i32 %66 to i64
  %68 = icmp eq i64 %67, 512
  br i1 %68, label %69, label %72

69:                                               ; preds = %62, %36
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %70, i32 0, i32 8
  store ptr @I2S_Receive_32Bit_IT, ptr %71, align 8, !tbaa !24
  br label %75

72:                                               ; preds = %62
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %73, i32 0, i32 8
  store ptr @I2S_Receive_16Bit_IT, ptr %74, align 8, !tbaa !24
  br label %75

75:                                               ; preds = %72, %69
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %76, i32 0, i32 0
  %78 = load ptr, ptr %77, align 8, !tbaa !25
  %79 = getelementptr inbounds %struct.SPI_TypeDef, ptr %78, i32 0, i32 0
  %80 = load volatile i32, ptr %79, align 4, !tbaa !26
  %81 = zext i32 %80 to i64
  %82 = and i64 %81, 1
  %83 = icmp ne i64 %82, 1
  br i1 %83, label %84, label %93

84:                                               ; preds = %75
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %85, i32 0, i32 0
  %87 = load ptr, ptr %86, align 8, !tbaa !25
  %88 = getelementptr inbounds %struct.SPI_TypeDef, ptr %87, i32 0, i32 0
  %89 = load volatile i32, ptr %88, align 4, !tbaa !26
  %90 = zext i32 %89 to i64
  %91 = or i64 %90, 1
  %92 = trunc i64 %91 to i32
  store volatile i32 %92, ptr %88, align 4, !tbaa !26
  br label %93

93:                                               ; preds = %84, %75
  %94 = load ptr, ptr %5, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %94, i32 0, i32 0
  %96 = load ptr, ptr %95, align 8, !tbaa !25
  %97 = getelementptr inbounds %struct.SPI_TypeDef, ptr %96, i32 0, i32 4
  %98 = load volatile i32, ptr %97, align 4, !tbaa !28
  %99 = zext i32 %98 to i64
  %100 = or i64 %99, 65
  %101 = trunc i64 %100 to i32
  store volatile i32 %101, ptr %97, align 4, !tbaa !28
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %102, i32 0, i32 1
  %104 = getelementptr inbounds %struct.I2S_InitTypeDef, ptr %103, i32 0, i32 0
  %105 = load i32, ptr %104, align 8, !tbaa !29
  %106 = zext i32 %105 to i64
  %107 = icmp eq i64 %106, 2
  br i1 %107, label %108, label %117

108:                                              ; preds = %93
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %109, i32 0, i32 0
  %111 = load ptr, ptr %110, align 8, !tbaa !25
  %112 = getelementptr inbounds %struct.SPI_TypeDef, ptr %111, i32 0, i32 4
  %113 = load volatile i32, ptr %112, align 4, !tbaa !28
  %114 = zext i32 %113 to i64
  %115 = or i64 %114, 256
  %116 = trunc i64 %115 to i32
  store volatile i32 %116, ptr %112, align 4, !tbaa !28
  br label %117

117:                                              ; preds = %108, %93
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !25
  %121 = getelementptr inbounds %struct.SPI_TypeDef, ptr %120, i32 0, i32 0
  %122 = load volatile i32, ptr %121, align 4, !tbaa !26
  %123 = zext i32 %122 to i64
  %124 = or i64 %123, 512
  %125 = trunc i64 %124 to i32
  store volatile i32 %125, ptr %121, align 4, !tbaa !26
  br label %126

126:                                              ; preds = %117
  %127 = load ptr, ptr %5, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.__I2S_HandleTypeDef, ptr %127, i32 0, i32 12
  store volatile i32 0, ptr %128, align 8, !tbaa !11
  br label %129

129:                                              ; preds = %126
  store i32 0, ptr %4, align 4
  br label %130

130:                                              ; preds = %129, %35, %21, %14
  %131 = load i32, ptr %4, align 4
  ret i32 %131
}

; Function Attrs: nounwind uwtable
declare hidden void @I2S_Receive_32Bit_IT(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @I2S_Receive_16Bit_IT(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 112}
!12 = !{!"__I2S_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 48, !10, i64 56, !10, i64 58, !6, i64 64, !10, i64 72, !10, i64 74, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !14, i64 112, !14, i64 116, !14, i64 120}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !14, i64 116}
!16 = !{!12, !14, i64 120}
!17 = !{!12, !6, i64 64}
!18 = !{!12, !10, i64 72}
!19 = !{!12, !10, i64 74}
!20 = !{!12, !6, i64 48}
!21 = !{!12, !10, i64 56}
!22 = !{!12, !10, i64 58}
!23 = !{!12, !14, i64 16}
!24 = !{!12, !6, i64 80}
!25 = !{!12, !6, i64 0}
!26 = !{!27, !14, i64 0}
!27 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !7, i64 36, !14, i64 48, !7, i64 52, !14, i64 64, !14, i64 68, !14, i64 72, !14, i64 76, !14, i64 80}
!28 = !{!27, !14, i64 16}
!29 = !{!12, !14, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_I2S_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = icmp eq ptr %1, null
  %5 = icmp eq i16 %2, 0
  %or.cond = or i1 %4, %5
  br i1 %or.cond, label %45, label %6

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 112
  %8 = load volatile i32, ptr %7, align 8, !tbaa !5
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %45, label %10

10:                                               ; preds = %6
  store volatile i32 1, ptr %7, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 116
  %12 = load volatile i32, ptr %11, align 4, !tbaa !13
  %.not = icmp eq i32 %12, 1
  br i1 %.not, label %13, label %.sink.split

13:                                               ; preds = %10
  store volatile i32 4, ptr %11, align 4, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %0, i64 120
  store volatile i32 0, ptr %14, align 8, !tbaa !14
  %15 = getelementptr inbounds i8, ptr %0, i64 64
  store ptr %1, ptr %15, align 8, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %0, i64 72
  store volatile i16 %2, ptr %16, align 8, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 74
  store volatile i16 %2, ptr %17, align 2, !tbaa !17
  %18 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr null, ptr %18, align 8, !tbaa !18
  %19 = getelementptr inbounds i8, ptr %0, i64 56
  store volatile i16 0, ptr %19, align 8, !tbaa !19
  %20 = getelementptr inbounds i8, ptr %0, i64 58
  store volatile i16 0, ptr %20, align 2, !tbaa !20
  %21 = getelementptr inbounds i8, ptr %0, i64 8
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  %23 = load i32, ptr %22, align 8, !tbaa !21
  %24 = add i32 %23, -256
  %switch.and = and i32 %24, -257
  %switch.selectcmp = icmp eq i32 %switch.and, 0
  %25 = select i1 %switch.selectcmp, ptr @I2S_Receive_32Bit_IT, ptr @I2S_Receive_16Bit_IT
  %26 = getelementptr inbounds i8, ptr %0, i64 80
  store ptr %25, ptr %26, align 8, !tbaa !22
  %27 = load ptr, ptr %0, align 8, !tbaa !23
  %28 = load volatile i32, ptr %27, align 4, !tbaa !24
  %29 = and i32 %28, 1
  %.not32.not = icmp eq i32 %29, 0
  br i1 %.not32.not, label %30, label %33

30:                                               ; preds = %13
  %31 = load volatile i32, ptr %27, align 4, !tbaa !24
  %32 = or i32 %31, 1
  store volatile i32 %32, ptr %27, align 4, !tbaa !24
  br label %33

33:                                               ; preds = %30, %13
  %34 = getelementptr inbounds i8, ptr %27, i64 16
  %35 = load volatile i32, ptr %34, align 4, !tbaa !26
  %36 = or i32 %35, 65
  store volatile i32 %36, ptr %34, align 4, !tbaa !26
  %37 = load i32, ptr %21, align 8, !tbaa !27
  %38 = icmp eq i32 %37, 2
  br i1 %38, label %39, label %42

39:                                               ; preds = %33
  %40 = load volatile i32, ptr %34, align 4, !tbaa !26
  %41 = or i32 %40, 256
  store volatile i32 %41, ptr %34, align 4, !tbaa !26
  br label %42

42:                                               ; preds = %39, %33
  %43 = load volatile i32, ptr %27, align 4, !tbaa !24
  %44 = or i32 %43, 512
  store volatile i32 %44, ptr %27, align 4, !tbaa !24
  br label %.sink.split

.sink.split:                                      ; preds = %10, %42
  %.0.ph = phi i32 [ 0, %42 ], [ 2, %10 ]
  store volatile i32 0, ptr %7, align 8, !tbaa !5
  br label %45

45:                                               ; preds = %.sink.split, %6, %3
  %.0 = phi i32 [ 1, %3 ], [ 2, %6 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @I2S_Receive_32Bit_IT(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @I2S_Receive_16Bit_IT(ptr noundef) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 112}
!6 = !{!"__I2S_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 48, !12, i64 56, !12, i64 58, !7, i64 64, !12, i64 72, !12, i64 74, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !11, i64 112, !11, i64 116, !11, i64 120}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 116}
!14 = !{!6, !11, i64 120}
!15 = !{!6, !7, i64 64}
!16 = !{!6, !12, i64 72}
!17 = !{!6, !12, i64 74}
!18 = !{!6, !7, i64 48}
!19 = !{!6, !12, i64 56}
!20 = !{!6, !12, i64 58}
!21 = !{!6, !11, i64 16}
!22 = !{!6, !7, i64 80}
!23 = !{!6, !7, i64 0}
!24 = !{!25, !11, i64 0}
!25 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !8, i64 36, !11, i64 48, !8, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!26 = !{!25, !11, i64 16}
!27 = !{!6, !11, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass