; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__UART_HandleTypeDef = type { ptr, %struct.UART_InitTypeDef, %struct.UART_AdvFeatureInitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i32, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
%struct.UART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.UART_AdvFeatureInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_UART_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %8, i32 0, i32 19
  %10 = load volatile i32, ptr %9, align 8, !tbaa !11
  %11 = icmp eq i32 %10, 32
  br i1 %11, label %12, label %207

12:                                               ; preds = %3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %19, label %15

15:                                               ; preds = %12
  %16 = load i16, ptr %7, align 2, !tbaa !9
  %17 = zext i16 %16 to i32
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %15, %12
  store i32 1, ptr %4, align 4
  br label %208

20:                                               ; preds = %15
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %22, i32 0, i32 17
  %24 = load i32, ptr %23, align 8, !tbaa !16
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 2, ptr %4, align 4
  br label %208

27:                                               ; preds = %21
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %28, i32 0, i32 17
  store i32 1, ptr %29, align 8, !tbaa !16
  br label %30

30:                                               ; preds = %27
  br label %31

31:                                               ; preds = %30
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %33, i32 0, i32 6
  store ptr %32, ptr %34, align 8, !tbaa !17
  %35 = load i16, ptr %7, align 2, !tbaa !9
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %36, i32 0, i32 7
  store i16 %35, ptr %37, align 8, !tbaa !18
  %38 = load i16, ptr %7, align 2, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %39, i32 0, i32 8
  store volatile i16 %38, ptr %40, align 2, !tbaa !19
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %41, i32 0, i32 13
  store ptr null, ptr %42, align 8, !tbaa !20
  br label %43

43:                                               ; preds = %31
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %44, i32 0, i32 1
  %46 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %46, align 4, !tbaa !21
  %48 = zext i32 %47 to i64
  %49 = icmp eq i64 %48, 4096
  br i1 %49, label %50, label %63

50:                                               ; preds = %43
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %51, i32 0, i32 1
  %53 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %52, i32 0, i32 3
  %54 = load i32, ptr %53, align 4, !tbaa !22
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %59

56:                                               ; preds = %50
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %57, i32 0, i32 9
  store i16 511, ptr %58, align 4, !tbaa !23
  br label %62

59:                                               ; preds = %50
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %60, i32 0, i32 9
  store i16 255, ptr %61, align 4, !tbaa !23
  br label %62

62:                                               ; preds = %59, %56
  br label %107

63:                                               ; preds = %43
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %64, i32 0, i32 1
  %66 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %65, i32 0, i32 1
  %67 = load i32, ptr %66, align 4, !tbaa !21
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %82

69:                                               ; preds = %63
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %70, i32 0, i32 1
  %72 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %71, i32 0, i32 3
  %73 = load i32, ptr %72, align 4, !tbaa !22
  %74 = icmp eq i32 %73, 0
  br i1 %74, label %75, label %78

75:                                               ; preds = %69
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %76, i32 0, i32 9
  store i16 255, ptr %77, align 4, !tbaa !23
  br label %81

78:                                               ; preds = %69
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %79, i32 0, i32 9
  store i16 127, ptr %80, align 4, !tbaa !23
  br label %81

81:                                               ; preds = %78, %75
  br label %106

82:                                               ; preds = %63
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %83, i32 0, i32 1
  %85 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %84, i32 0, i32 1
  %86 = load i32, ptr %85, align 4, !tbaa !21
  %87 = zext i32 %86 to i64
  %88 = icmp eq i64 %87, 268435456
  br i1 %88, label %89, label %102

89:                                               ; preds = %82
  %90 = load ptr, ptr %5, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %90, i32 0, i32 1
  %92 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %91, i32 0, i32 3
  %93 = load i32, ptr %92, align 4, !tbaa !22
  %94 = icmp eq i32 %93, 0
  br i1 %94, label %95, label %98

95:                                               ; preds = %89
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %96, i32 0, i32 9
  store i16 127, ptr %97, align 4, !tbaa !23
  br label %101

98:                                               ; preds = %89
  %99 = load ptr, ptr %5, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %99, i32 0, i32 9
  store i16 63, ptr %100, align 4, !tbaa !23
  br label %101

101:                                              ; preds = %98, %95
  br label %105

102:                                              ; preds = %82
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %103, i32 0, i32 9
  store i16 0, ptr %104, align 4, !tbaa !23
  br label %105

105:                                              ; preds = %102, %101
  br label %106

106:                                              ; preds = %105, %81
  br label %107

107:                                              ; preds = %106, %62
  br label %108

108:                                              ; preds = %107
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %109, i32 0, i32 20
  store volatile i32 0, ptr %110, align 4, !tbaa !24
  %111 = load ptr, ptr %5, align 8, !tbaa !5
  %112 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %111, i32 0, i32 19
  store volatile i32 34, ptr %112, align 8, !tbaa !11
  %113 = load ptr, ptr %5, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %113, i32 0, i32 0
  %115 = load ptr, ptr %114, align 8, !tbaa !25
  %116 = getelementptr inbounds %struct.USART_TypeDef, ptr %115, i32 0, i32 2
  %117 = load volatile i32, ptr %116, align 4, !tbaa !26
  %118 = zext i32 %117 to i64
  %119 = or i64 %118, 1
  %120 = trunc i64 %119 to i32
  store volatile i32 %120, ptr %116, align 4, !tbaa !26
  %121 = load ptr, ptr %5, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %121, i32 0, i32 10
  %123 = load i32, ptr %122, align 8, !tbaa !28
  %124 = zext i32 %123 to i64
  %125 = icmp eq i64 %124, 536870912
  br i1 %125, label %126, label %174

126:                                              ; preds = %108
  %127 = load i16, ptr %7, align 2, !tbaa !9
  %128 = zext i16 %127 to i32
  %129 = load ptr, ptr %5, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %129, i32 0, i32 11
  %131 = load i16, ptr %130, align 4, !tbaa !29
  %132 = zext i16 %131 to i32
  %133 = icmp sge i32 %128, %132
  br i1 %133, label %134, label %174

134:                                              ; preds = %126
  %135 = load ptr, ptr %5, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %135, i32 0, i32 1
  %137 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %136, i32 0, i32 1
  %138 = load i32, ptr %137, align 4, !tbaa !21
  %139 = zext i32 %138 to i64
  %140 = icmp eq i64 %139, 4096
  br i1 %140, label %141, label %150

141:                                              ; preds = %134
  %142 = load ptr, ptr %5, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %142, i32 0, i32 1
  %144 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %143, i32 0, i32 3
  %145 = load i32, ptr %144, align 4, !tbaa !22
  %146 = icmp eq i32 %145, 0
  br i1 %146, label %147, label %150

147:                                              ; preds = %141
  %148 = load ptr, ptr %5, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %148, i32 0, i32 13
  store ptr @UART_RxISR_16BIT_FIFOEN, ptr %149, align 8, !tbaa !20
  br label %153

150:                                              ; preds = %141, %134
  %151 = load ptr, ptr %5, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %151, i32 0, i32 13
  store ptr @UART_RxISR_8BIT_FIFOEN, ptr %152, align 8, !tbaa !20
  br label %153

153:                                              ; preds = %150, %147
  br label %154

154:                                              ; preds = %153
  %155 = load ptr, ptr %5, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %155, i32 0, i32 17
  store i32 0, ptr %156, align 8, !tbaa !16
  br label %157

157:                                              ; preds = %154
  %158 = load ptr, ptr %5, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %158, i32 0, i32 0
  %160 = load ptr, ptr %159, align 8, !tbaa !25
  %161 = getelementptr inbounds %struct.USART_TypeDef, ptr %160, i32 0, i32 0
  %162 = load volatile i32, ptr %161, align 4, !tbaa !30
  %163 = zext i32 %162 to i64
  %164 = or i64 %163, 256
  %165 = trunc i64 %164 to i32
  store volatile i32 %165, ptr %161, align 4, !tbaa !30
  %166 = load ptr, ptr %5, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %166, i32 0, i32 0
  %168 = load ptr, ptr %167, align 8, !tbaa !25
  %169 = getelementptr inbounds %struct.USART_TypeDef, ptr %168, i32 0, i32 2
  %170 = load volatile i32, ptr %169, align 4, !tbaa !26
  %171 = zext i32 %170 to i64
  %172 = or i64 %171, 268435456
  %173 = trunc i64 %172 to i32
  store volatile i32 %173, ptr %169, align 4, !tbaa !26
  br label %206

174:                                              ; preds = %126, %108
  %175 = load ptr, ptr %5, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %175, i32 0, i32 1
  %177 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %176, i32 0, i32 1
  %178 = load i32, ptr %177, align 4, !tbaa !21
  %179 = zext i32 %178 to i64
  %180 = icmp eq i64 %179, 4096
  br i1 %180, label %181, label %190

181:                                              ; preds = %174
  %182 = load ptr, ptr %5, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %182, i32 0, i32 1
  %184 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %183, i32 0, i32 3
  %185 = load i32, ptr %184, align 4, !tbaa !22
  %186 = icmp eq i32 %185, 0
  br i1 %186, label %187, label %190

187:                                              ; preds = %181
  %188 = load ptr, ptr %5, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %188, i32 0, i32 13
  store ptr @UART_RxISR_16BIT, ptr %189, align 8, !tbaa !20
  br label %193

190:                                              ; preds = %181, %174
  %191 = load ptr, ptr %5, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %191, i32 0, i32 13
  store ptr @UART_RxISR_8BIT, ptr %192, align 8, !tbaa !20
  br label %193

193:                                              ; preds = %190, %187
  br label %194

194:                                              ; preds = %193
  %195 = load ptr, ptr %5, align 8, !tbaa !5
  %196 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %195, i32 0, i32 17
  store i32 0, ptr %196, align 8, !tbaa !16
  br label %197

197:                                              ; preds = %194
  %198 = load ptr, ptr %5, align 8, !tbaa !5
  %199 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %198, i32 0, i32 0
  %200 = load ptr, ptr %199, align 8, !tbaa !25
  %201 = getelementptr inbounds %struct.USART_TypeDef, ptr %200, i32 0, i32 0
  %202 = load volatile i32, ptr %201, align 4, !tbaa !30
  %203 = zext i32 %202 to i64
  %204 = or i64 %203, 288
  %205 = trunc i64 %204 to i32
  store volatile i32 %205, ptr %201, align 4, !tbaa !30
  br label %206

206:                                              ; preds = %197, %157
  store i32 0, ptr %4, align 4
  br label %208

207:                                              ; preds = %3
  store i32 2, ptr %4, align 4
  br label %208

208:                                              ; preds = %207, %206, %26, %19
  %209 = load i32, ptr %4, align 4
  ret i32 %209
}

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_16BIT_FIFOEN(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_8BIT_FIFOEN(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_16BIT(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_8BIT(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 168}
!12 = !{!"__UART_HandleTypeDef", !6, i64 0, !13, i64 8, !15, i64 44, !6, i64 88, !10, i64 96, !10, i64 98, !6, i64 104, !10, i64 112, !10, i64 114, !10, i64 116, !14, i64 120, !10, i64 124, !10, i64 126, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !14, i64 160, !14, i64 164, !14, i64 168, !14, i64 172}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32}
!14 = !{!"int", !7, i64 0}
!15 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36}
!16 = !{!12, !14, i64 160}
!17 = !{!12, !6, i64 104}
!18 = !{!12, !10, i64 112}
!19 = !{!12, !10, i64 114}
!20 = !{!12, !6, i64 128}
!21 = !{!12, !14, i64 12}
!22 = !{!12, !14, i64 20}
!23 = !{!12, !10, i64 116}
!24 = !{!12, !14, i64 172}
!25 = !{!12, !6, i64 0}
!26 = !{!27, !14, i64 8}
!27 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44}
!28 = !{!12, !14, i64 120}
!29 = !{!12, !10, i64 124}
!30 = !{!27, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_UART_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 168
  %5 = load volatile i32, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i32 %5, 32
  br i1 %6, label %7, label %76

7:                                                ; preds = %3
  %8 = icmp eq ptr %1, null
  %9 = icmp eq i16 %2, 0
  %or.cond = or i1 %8, %9
  br i1 %or.cond, label %76, label %10

10:                                               ; preds = %7
  %11 = getelementptr inbounds i8, ptr %0, i64 160
  %12 = load i32, ptr %11, align 8, !tbaa !14
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %76, label %14

14:                                               ; preds = %10
  %15 = getelementptr inbounds i8, ptr %0, i64 104
  store ptr %1, ptr %15, align 8, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %0, i64 112
  store i16 %2, ptr %16, align 8, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 114
  store volatile i16 %2, ptr %17, align 2, !tbaa !17
  %18 = getelementptr inbounds i8, ptr %0, i64 128
  %19 = getelementptr inbounds i8, ptr %0, i64 12
  %20 = load i32, ptr %19, align 4, !tbaa !18
  switch i32 %20, label %42 [
    i32 4096, label %21
    i32 0, label %28
    i32 268435456, label %35
  ]

21:                                               ; preds = %14
  %22 = getelementptr inbounds i8, ptr %0, i64 20
  %23 = load i32, ptr %22, align 4, !tbaa !19
  %24 = icmp eq i32 %23, 0
  %25 = getelementptr inbounds i8, ptr %0, i64 116
  br i1 %24, label %26, label %27

26:                                               ; preds = %21
  store i16 511, ptr %25, align 4, !tbaa !20
  br label %44

27:                                               ; preds = %21
  store i16 255, ptr %25, align 4, !tbaa !20
  br label %44

28:                                               ; preds = %14
  %29 = getelementptr inbounds i8, ptr %0, i64 20
  %30 = load i32, ptr %29, align 4, !tbaa !19
  %31 = icmp eq i32 %30, 0
  %32 = getelementptr inbounds i8, ptr %0, i64 116
  br i1 %31, label %33, label %34

33:                                               ; preds = %28
  store i16 255, ptr %32, align 4, !tbaa !20
  br label %44

34:                                               ; preds = %28
  store i16 127, ptr %32, align 4, !tbaa !20
  br label %44

35:                                               ; preds = %14
  %36 = getelementptr inbounds i8, ptr %0, i64 20
  %37 = load i32, ptr %36, align 4, !tbaa !19
  %38 = icmp eq i32 %37, 0
  %39 = getelementptr inbounds i8, ptr %0, i64 116
  br i1 %38, label %40, label %41

40:                                               ; preds = %35
  store i16 127, ptr %39, align 4, !tbaa !20
  br label %44

41:                                               ; preds = %35
  store i16 63, ptr %39, align 4, !tbaa !20
  br label %44

42:                                               ; preds = %14
  %43 = getelementptr inbounds i8, ptr %0, i64 116
  store i16 0, ptr %43, align 4, !tbaa !20
  br label %44

44:                                               ; preds = %27, %26, %42, %41, %40, %33, %34
  %45 = getelementptr inbounds i8, ptr %0, i64 172
  store volatile i32 0, ptr %45, align 4, !tbaa !21
  store volatile i32 34, ptr %4, align 8, !tbaa !5
  %46 = load ptr, ptr %0, align 8, !tbaa !22
  %47 = getelementptr inbounds i8, ptr %46, i64 8
  %48 = load volatile i32, ptr %47, align 4, !tbaa !23
  %49 = or i32 %48, 1
  store volatile i32 %49, ptr %47, align 4, !tbaa !23
  %50 = getelementptr inbounds i8, ptr %0, i64 120
  %51 = load i32, ptr %50, align 8, !tbaa !25
  %52 = icmp eq i32 %51, 536870912
  br i1 %52, label %53, label %66

53:                                               ; preds = %44
  %54 = getelementptr inbounds i8, ptr %0, i64 124
  %55 = load i16, ptr %54, align 4, !tbaa !26
  %.not = icmp ugt i16 %55, %2
  br i1 %.not, label %66, label %56

56:                                               ; preds = %53
  %57 = icmp eq i32 %20, 4096
  br i1 %57, label %58, label %62

58:                                               ; preds = %56
  %59 = getelementptr inbounds i8, ptr %0, i64 20
  %60 = load i32, ptr %59, align 4, !tbaa !19
  %61 = icmp eq i32 %60, 0
  br i1 %61, label %63, label %62

62:                                               ; preds = %58, %56
  br label %63

63:                                               ; preds = %58, %62
  %storemerge49 = phi ptr [ @UART_RxISR_8BIT_FIFOEN, %62 ], [ @UART_RxISR_16BIT_FIFOEN, %58 ]
  store ptr %storemerge49, ptr %18, align 8, !tbaa !27
  store i32 0, ptr %11, align 8, !tbaa !14
  %64 = load volatile i32, ptr %46, align 4, !tbaa !28
  %65 = or i32 %64, 256
  store volatile i32 %65, ptr %46, align 4, !tbaa !28
  br label %.sink.split

66:                                               ; preds = %53, %44
  %67 = icmp eq i32 %20, 4096
  br i1 %67, label %68, label %72

68:                                               ; preds = %66
  %69 = getelementptr inbounds i8, ptr %0, i64 20
  %70 = load i32, ptr %69, align 4, !tbaa !19
  %71 = icmp eq i32 %70, 0
  br i1 %71, label %73, label %72

72:                                               ; preds = %68, %66
  br label %73

73:                                               ; preds = %68, %72
  %storemerge = phi ptr [ @UART_RxISR_8BIT, %72 ], [ @UART_RxISR_16BIT, %68 ]
  store ptr %storemerge, ptr %18, align 8, !tbaa !27
  store i32 0, ptr %11, align 8, !tbaa !14
  br label %.sink.split

.sink.split:                                      ; preds = %73, %63
  %.sink = phi ptr [ %47, %63 ], [ %46, %73 ]
  %.sink52 = phi i32 [ 268435456, %63 ], [ 288, %73 ]
  %74 = load volatile i32, ptr %.sink, align 4, !tbaa !29
  %75 = or i32 %74, %.sink52
  store volatile i32 %75, ptr %.sink, align 4, !tbaa !29
  br label %76

76:                                               ; preds = %.sink.split, %3, %10, %7
  %.0 = phi i32 [ 1, %7 ], [ 2, %10 ], [ 2, %3 ], [ 0, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_16BIT_FIFOEN(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_8BIT_FIFOEN(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_16BIT(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @UART_RxISR_8BIT(ptr noundef) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 168}
!6 = !{!"__UART_HandleTypeDef", !7, i64 0, !10, i64 8, !12, i64 44, !7, i64 88, !13, i64 96, !13, i64 98, !7, i64 104, !13, i64 112, !13, i64 114, !13, i64 116, !11, i64 120, !13, i64 124, !13, i64 126, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!"short", !8, i64 0}
!14 = !{!6, !11, i64 160}
!15 = !{!6, !7, i64 104}
!16 = !{!6, !13, i64 112}
!17 = !{!6, !13, i64 114}
!18 = !{!6, !11, i64 12}
!19 = !{!6, !11, i64 20}
!20 = !{!6, !13, i64 116}
!21 = !{!6, !11, i64 172}
!22 = !{!6, !7, i64 0}
!23 = !{!24, !11, i64 8}
!24 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!25 = !{!6, !11, i64 120}
!26 = !{!6, !13, i64 124}
!27 = !{!6, !7, i64 128}
!28 = !{!24, !11, i64 0}
!29 = !{!11, !11, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass