; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QSPI_HandleTypeDef = type { ptr, %struct.QSPI_InitTypeDef, ptr, i32, i32, ptr, i32, i32, ptr, i32, i32, i32, i32 }
%struct.QSPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.QUADSPI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__MDMA_HandleTypeDef = type { ptr, %struct.MDMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32 }
%struct.MDMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.MDMA_Channel_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMAError(ptr noundef) #1

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_QSPI_Receive_DMA(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %9, i32 0, i32 0
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  %12 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %11, i32 0, i32 6
  %13 = load volatile i32, ptr %12, align 4, !tbaa !14
  store i32 %13, ptr %7, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %2
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %15, i32 0, i32 9
  %17 = load volatile i32, ptr %16, align 8, !tbaa !16
  %18 = icmp eq i32 %17, 1
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  store i32 2, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %238

20:                                               ; preds = %14
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %21, i32 0, i32 9
  store volatile i32 1, ptr %22, align 8, !tbaa !16
  br label %23

23:                                               ; preds = %20
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %26, i32 0, i32 10
  %28 = load volatile i32, ptr %27, align 4, !tbaa !17
  %29 = icmp eq i32 %28, 1
  br i1 %29, label %30, label %230

30:                                               ; preds = %25
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %31, i32 0, i32 11
  store volatile i32 0, ptr %32, align 8, !tbaa !18
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = icmp ne ptr %33, null
  br i1 %34, label %35, label %223

35:                                               ; preds = %30
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %36, i32 0, i32 10
  store volatile i32 34, ptr %37, align 4, !tbaa !17
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !11
  %41 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %40, i32 0, i32 3
  store volatile i32 3, ptr %41, align 4, !tbaa !19
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %43, align 8, !tbaa !11
  %45 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %44, i32 0, i32 4
  %46 = load volatile i32, ptr %45, align 4, !tbaa !20
  %47 = add i32 %46, 1
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %48, i32 0, i32 7
  store volatile i32 %47, ptr %49, align 4, !tbaa !21
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !11
  %53 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %52, i32 0, i32 4
  %54 = load volatile i32, ptr %53, align 4, !tbaa !20
  %55 = add i32 %54, 1
  %56 = load ptr, ptr %4, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %56, i32 0, i32 6
  store volatile i32 %55, ptr %57, align 8, !tbaa !22
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %59, i32 0, i32 5
  store ptr %58, ptr %60, align 8, !tbaa !23
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %61, i32 0, i32 8
  %63 = load ptr, ptr %62, align 8, !tbaa !24
  %64 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %63, i32 0, i32 5
  store ptr @QSPI_DMARxCplt, ptr %64, align 8, !tbaa !25
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %65, i32 0, i32 8
  %67 = load ptr, ptr %66, align 8, !tbaa !24
  %68 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %67, i32 0, i32 9
  store ptr @QSPI_DMAError, ptr %68, align 8, !tbaa !28
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %69, i32 0, i32 8
  %71 = load ptr, ptr %70, align 8, !tbaa !24
  %72 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %71, i32 0, i32 10
  store ptr null, ptr %72, align 8, !tbaa !29
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %73, i32 0, i32 0
  %75 = load ptr, ptr %74, align 8, !tbaa !11
  %76 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %75, i32 0, i32 5
  %77 = load volatile i32, ptr %76, align 4, !tbaa !30
  %78 = zext i32 %77 to i64
  %79 = and i64 %78, -201326593
  %80 = or i64 %79, 67108864
  %81 = trunc i64 %80 to i32
  %82 = load ptr, ptr %4, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %82, i32 0, i32 0
  %84 = load ptr, ptr %83, align 8, !tbaa !11
  %85 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %84, i32 0, i32 5
  store volatile i32 %81, ptr %85, align 4, !tbaa !30
  %86 = load i32, ptr %7, align 4, !tbaa !9
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %87, i32 0, i32 0
  %89 = load ptr, ptr %88, align 8, !tbaa !11
  %90 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %89, i32 0, i32 6
  store volatile i32 %86, ptr %90, align 4, !tbaa !14
  %91 = load ptr, ptr %4, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %91, i32 0, i32 8
  %93 = load ptr, ptr %92, align 8, !tbaa !24
  %94 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %93, i32 0, i32 0
  %95 = load ptr, ptr %94, align 8, !tbaa !31
  %96 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %95, i32 0, i32 4
  %97 = load volatile i32, ptr %96, align 4, !tbaa !32
  %98 = zext i32 %97 to i64
  %99 = and i64 %98, -772
  %100 = or i64 %99, 0
  %101 = trunc i64 %100 to i32
  %102 = load ptr, ptr %4, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %102, i32 0, i32 8
  %104 = load ptr, ptr %103, align 8, !tbaa !24
  %105 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %104, i32 0, i32 0
  %106 = load ptr, ptr %105, align 8, !tbaa !31
  %107 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %106, i32 0, i32 4
  store volatile i32 %101, ptr %107, align 4, !tbaa !32
  %108 = load ptr, ptr %4, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %108, i32 0, i32 8
  %110 = load ptr, ptr %109, align 8, !tbaa !24
  %111 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %110, i32 0, i32 1
  %112 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %111, i32 0, i32 7
  %113 = load i32, ptr %112, align 4, !tbaa !33
  %114 = icmp eq i32 %113, 0
  br i1 %114, label %115, label %133

115:                                              ; preds = %35
  %116 = load ptr, ptr %4, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %116, i32 0, i32 8
  %118 = load ptr, ptr %117, align 8, !tbaa !24
  %119 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !31
  %121 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %120, i32 0, i32 4
  %122 = load volatile i32, ptr %121, align 4, !tbaa !32
  %123 = zext i32 %122 to i64
  %124 = and i64 %123, -3085
  %125 = or i64 %124, 8
  %126 = trunc i64 %125 to i32
  %127 = load ptr, ptr %4, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %127, i32 0, i32 8
  %129 = load ptr, ptr %128, align 8, !tbaa !24
  %130 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %129, i32 0, i32 0
  %131 = load ptr, ptr %130, align 8, !tbaa !31
  %132 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %131, i32 0, i32 4
  store volatile i32 %126, ptr %132, align 4, !tbaa !32
  br label %192

133:                                              ; preds = %35
  %134 = load ptr, ptr %4, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %134, i32 0, i32 8
  %136 = load ptr, ptr %135, align 8, !tbaa !24
  %137 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %136, i32 0, i32 1
  %138 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %137, i32 0, i32 7
  %139 = load i32, ptr %138, align 4, !tbaa !33
  %140 = icmp eq i32 %139, 64
  br i1 %140, label %141, label %159

141:                                              ; preds = %133
  %142 = load ptr, ptr %4, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %142, i32 0, i32 8
  %144 = load ptr, ptr %143, align 8, !tbaa !24
  %145 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %144, i32 0, i32 0
  %146 = load ptr, ptr %145, align 8, !tbaa !31
  %147 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %146, i32 0, i32 4
  %148 = load volatile i32, ptr %147, align 4, !tbaa !32
  %149 = zext i32 %148 to i64
  %150 = and i64 %149, -3085
  %151 = or i64 %150, 1032
  %152 = trunc i64 %151 to i32
  %153 = load ptr, ptr %4, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %153, i32 0, i32 8
  %155 = load ptr, ptr %154, align 8, !tbaa !24
  %156 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %155, i32 0, i32 0
  %157 = load ptr, ptr %156, align 8, !tbaa !31
  %158 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %157, i32 0, i32 4
  store volatile i32 %152, ptr %158, align 4, !tbaa !32
  br label %191

159:                                              ; preds = %133
  %160 = load ptr, ptr %4, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %160, i32 0, i32 8
  %162 = load ptr, ptr %161, align 8, !tbaa !24
  %163 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %162, i32 0, i32 1
  %164 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %163, i32 0, i32 7
  %165 = load i32, ptr %164, align 4, !tbaa !33
  %166 = icmp eq i32 %165, 128
  br i1 %166, label %167, label %185

167:                                              ; preds = %159
  %168 = load ptr, ptr %4, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %168, i32 0, i32 8
  %170 = load ptr, ptr %169, align 8, !tbaa !24
  %171 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %170, i32 0, i32 0
  %172 = load ptr, ptr %171, align 8, !tbaa !31
  %173 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %172, i32 0, i32 4
  %174 = load volatile i32, ptr %173, align 4, !tbaa !32
  %175 = zext i32 %174 to i64
  %176 = and i64 %175, -3085
  %177 = or i64 %176, 2056
  %178 = trunc i64 %177 to i32
  %179 = load ptr, ptr %4, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %179, i32 0, i32 8
  %181 = load ptr, ptr %180, align 8, !tbaa !24
  %182 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %181, i32 0, i32 0
  %183 = load ptr, ptr %182, align 8, !tbaa !31
  %184 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %183, i32 0, i32 4
  store volatile i32 %178, ptr %184, align 4, !tbaa !32
  br label %190

185:                                              ; preds = %159
  %186 = load ptr, ptr %4, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %186, i32 0, i32 11
  %188 = load volatile i32, ptr %187, align 8, !tbaa !18
  %189 = or i32 %188, 4
  store volatile i32 %189, ptr %187, align 8, !tbaa !18
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %190

190:                                              ; preds = %185, %167
  br label %191

191:                                              ; preds = %190, %141
  br label %192

192:                                              ; preds = %191, %115
  %193 = load ptr, ptr %4, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %193, i32 0, i32 8
  %195 = load ptr, ptr %194, align 8, !tbaa !24
  %196 = load ptr, ptr %4, align 8, !tbaa !5
  %197 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %196, i32 0, i32 0
  %198 = load ptr, ptr %197, align 8, !tbaa !11
  %199 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %198, i32 0, i32 8
  %200 = ptrtoint ptr %199 to i32
  %201 = load ptr, ptr %5, align 8, !tbaa !5
  %202 = ptrtoint ptr %201 to i32
  %203 = load ptr, ptr %4, align 8, !tbaa !5
  %204 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %203, i32 0, i32 6
  %205 = load volatile i32, ptr %204, align 8, !tbaa !22
  %206 = call i32 @HAL_MDMA_Start_IT(ptr noundef %195, i32 noundef %200, i32 noundef %202, i32 noundef %205, i32 noundef 1)
  %207 = icmp eq i32 %206, 0
  br i1 %207, label %208, label %222

208:                                              ; preds = %192
  br label %209

209:                                              ; preds = %208
  %210 = load ptr, ptr %4, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %210, i32 0, i32 9
  store volatile i32 0, ptr %211, align 8, !tbaa !16
  br label %212

212:                                              ; preds = %209
  br label %213

213:                                              ; preds = %212
  %214 = load ptr, ptr %4, align 8, !tbaa !5
  %215 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %214, i32 0, i32 0
  %216 = load ptr, ptr %215, align 8, !tbaa !11
  %217 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %216, i32 0, i32 0
  %218 = load volatile i32, ptr %217, align 4, !tbaa !34
  %219 = zext i32 %218 to i64
  %220 = or i64 %219, 65536
  %221 = trunc i64 %220 to i32
  store volatile i32 %221, ptr %217, align 4, !tbaa !34
  br label %222

222:                                              ; preds = %213, %192
  br label %229

223:                                              ; preds = %30
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %224

224:                                              ; preds = %223
  %225 = load ptr, ptr %4, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %225, i32 0, i32 9
  store volatile i32 0, ptr %226, align 8, !tbaa !16
  br label %227

227:                                              ; preds = %224
  br label %228

228:                                              ; preds = %227
  br label %229

229:                                              ; preds = %228, %222
  br label %236

230:                                              ; preds = %25
  store i32 2, ptr %6, align 4, !tbaa !9
  br label %231

231:                                              ; preds = %230
  %232 = load ptr, ptr %4, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %232, i32 0, i32 9
  store volatile i32 0, ptr %233, align 8, !tbaa !16
  br label %234

234:                                              ; preds = %231
  br label %235

235:                                              ; preds = %234
  br label %236

236:                                              ; preds = %235, %229
  %237 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %237, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %238

238:                                              ; preds = %236, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %239 = load i32, ptr %3, align 4
  ret i32 %239
}

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMARxCplt(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 40, !10, i64 48, !10, i64 52, !6, i64 56, !10, i64 64, !10, i64 68, !6, i64 72, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!15, !10, i64 24}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48}
!16 = !{!12, !10, i64 80}
!17 = !{!12, !10, i64 84}
!18 = !{!12, !10, i64 88}
!19 = !{!15, !10, i64 12}
!20 = !{!15, !10, i64 16}
!21 = !{!12, !10, i64 68}
!22 = !{!12, !10, i64 64}
!23 = !{!12, !6, i64 56}
!24 = !{!12, !6, i64 72}
!25 = !{!26, !6, i64 80}
!26 = !{!"__MDMA_HandleTypeDef", !6, i64 0, !27, i64 8, !10, i64 64, !10, i64 68, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !10, i64 144, !10, i64 148}
!27 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52}
!28 = !{!26, !6, i64 112}
!29 = !{!26, !6, i64 120}
!30 = !{!15, !10, i64 20}
!31 = !{!26, !6, i64 0}
!32 = !{!27, !10, i64 16}
!33 = !{!26, !10, i64 36}
!34 = !{!15, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMAError(ptr noundef) #0

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_QSPI_Receive_DMA(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 24
  %5 = load volatile i32, ptr %4, align 4, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %0, i64 80
  %7 = load volatile i32, ptr %6, align 8, !tbaa !14
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %70, label %9

9:                                                ; preds = %2
  store volatile i32 1, ptr %6, align 8, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 84
  %11 = load volatile i32, ptr %10, align 4, !tbaa !15
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %69

13:                                               ; preds = %9
  %14 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 0, ptr %14, align 8, !tbaa !16
  %.not = icmp eq ptr %1, null
  br i1 %.not, label %68, label %15

15:                                               ; preds = %13
  store volatile i32 34, ptr %10, align 4, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %3, i64 12
  store volatile i32 3, ptr %16, align 4, !tbaa !17
  %17 = getelementptr inbounds i8, ptr %3, i64 16
  %18 = load volatile i32, ptr %17, align 4, !tbaa !18
  %19 = add i32 %18, 1
  %20 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 %19, ptr %20, align 4, !tbaa !19
  %21 = load volatile i32, ptr %17, align 4, !tbaa !18
  %22 = add i32 %21, 1
  %23 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 %22, ptr %23, align 8, !tbaa !20
  %24 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %1, ptr %24, align 8, !tbaa !21
  %25 = getelementptr inbounds i8, ptr %0, i64 72
  %26 = load ptr, ptr %25, align 8, !tbaa !22
  %27 = getelementptr inbounds i8, ptr %26, i64 80
  store ptr @QSPI_DMARxCplt, ptr %27, align 8, !tbaa !23
  %28 = getelementptr inbounds i8, ptr %26, i64 112
  store ptr @QSPI_DMAError, ptr %28, align 8, !tbaa !26
  %29 = getelementptr inbounds i8, ptr %26, i64 120
  store ptr null, ptr %29, align 8, !tbaa !27
  %30 = getelementptr inbounds i8, ptr %3, i64 20
  %31 = load volatile i32, ptr %30, align 4, !tbaa !28
  %32 = and i32 %31, -201326593
  %33 = or disjoint i32 %32, 67108864
  store volatile i32 %33, ptr %30, align 4, !tbaa !28
  store volatile i32 %5, ptr %4, align 4, !tbaa !12
  %34 = load ptr, ptr %26, align 8, !tbaa !29
  %35 = getelementptr inbounds i8, ptr %34, i64 16
  %36 = load volatile i32, ptr %35, align 4, !tbaa !30
  %37 = and i32 %36, -772
  store volatile i32 %37, ptr %35, align 4, !tbaa !30
  %38 = getelementptr inbounds i8, ptr %26, i64 36
  %39 = load i32, ptr %38, align 4, !tbaa !31
  switch i32 %39, label %52 [
    i32 0, label %40
    i32 64, label %44
    i32 128, label %48
  ]

40:                                               ; preds = %15
  %41 = load volatile i32, ptr %35, align 4, !tbaa !30
  %42 = and i32 %41, -3085
  %43 = or disjoint i32 %42, 8
  store volatile i32 %43, ptr %35, align 4, !tbaa !30
  br label %55

44:                                               ; preds = %15
  %45 = load volatile i32, ptr %35, align 4, !tbaa !30
  %46 = and i32 %45, -3085
  %47 = or disjoint i32 %46, 1032
  store volatile i32 %47, ptr %35, align 4, !tbaa !30
  br label %55

48:                                               ; preds = %15
  %49 = load volatile i32, ptr %35, align 4, !tbaa !30
  %50 = and i32 %49, -3085
  %51 = or disjoint i32 %50, 2056
  store volatile i32 %51, ptr %35, align 4, !tbaa !30
  br label %55

52:                                               ; preds = %15
  %53 = load volatile i32, ptr %14, align 8, !tbaa !16
  %54 = or i32 %53, 4
  store volatile i32 %54, ptr %14, align 8, !tbaa !16
  br label %55

55:                                               ; preds = %44, %52, %48, %40
  %.042 = phi i32 [ 0, %40 ], [ 0, %44 ], [ 0, %48 ], [ 1, %52 ]
  %56 = getelementptr inbounds i8, ptr %3, i64 32
  %57 = ptrtoint ptr %56 to i64
  %58 = trunc i64 %57 to i32
  %59 = ptrtoint ptr %1 to i64
  %60 = trunc i64 %59 to i32
  %61 = load volatile i32, ptr %23, align 8, !tbaa !20
  %62 = tail call i32 @HAL_MDMA_Start_IT(ptr noundef nonnull %26, i32 noundef %58, i32 noundef %60, i32 noundef %61, i32 noundef 1) #2
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %64, label %70

64:                                               ; preds = %55
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  %65 = load ptr, ptr %0, align 8, !tbaa !5
  %66 = load volatile i32, ptr %65, align 4, !tbaa !32
  %67 = or i32 %66, 65536
  store volatile i32 %67, ptr %65, align 4, !tbaa !32
  br label %70

68:                                               ; preds = %13
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  br label %70

69:                                               ; preds = %9
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  br label %70

70:                                               ; preds = %69, %55, %64, %68, %2
  %.0 = phi i32 [ 2, %2 ], [ %.042, %64 ], [ %.042, %55 ], [ 1, %68 ], [ 2, %69 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMARxCplt(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 40, !11, i64 48, !11, i64 52, !7, i64 56, !11, i64 64, !11, i64 68, !7, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 24}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48}
!14 = !{!6, !11, i64 80}
!15 = !{!6, !11, i64 84}
!16 = !{!6, !11, i64 88}
!17 = !{!13, !11, i64 12}
!18 = !{!13, !11, i64 16}
!19 = !{!6, !11, i64 68}
!20 = !{!6, !11, i64 64}
!21 = !{!6, !7, i64 56}
!22 = !{!6, !7, i64 72}
!23 = !{!24, !7, i64 80}
!24 = !{!"__MDMA_HandleTypeDef", !7, i64 0, !25, i64 8, !11, i64 64, !11, i64 68, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !11, i64 144, !11, i64 148}
!25 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52}
!26 = !{!24, !7, i64 112}
!27 = !{!24, !7, i64 120}
!28 = !{!13, !11, i64 20}
!29 = !{!24, !7, i64 0}
!30 = !{!25, !11, i64 16}
!31 = !{!24, !11, i64 36}
!32 = !{!13, !11, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass