; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ProgramLineEvent)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__DMA2D_HandleTypeDef = type { ptr, %struct.DMA2D_InitTypeDef, ptr, ptr, [2 x %struct.DMA2D_LayerCfgTypeDef], i32, i32, i32 }
%struct.DMA2D_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.DMA2D_LayerCfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.DMA2D_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [236 x i32], [256 x i32], [256 x i32] }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_DMA2D_ProgramLineEvent(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %6 = load i32, ptr %5, align 4, !tbaa !9
  %7 = zext i32 %6 to i64
  %8 = icmp ugt i64 %7, 65535
  br i1 %8, label %9, label %10

9:                                                ; preds = %2
  store i32 1, ptr %3, align 4
  br label %43

10:                                               ; preds = %2
  br label %11

11:                                               ; preds = %10
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %12, i32 0, i32 5
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 2, ptr %3, align 4
  br label %43

17:                                               ; preds = %11
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %18, i32 0, i32 5
  store i32 1, ptr %19, align 8, !tbaa !11
  br label %20

20:                                               ; preds = %17
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %22, i32 0, i32 6
  store volatile i32 2, ptr %23, align 4, !tbaa !14
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !15
  %28 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %27, i32 0, i32 18
  store volatile i32 %24, ptr %28, align 4, !tbaa !16
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !15
  %32 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %31, i32 0, i32 0
  %33 = load volatile i32, ptr %32, align 4, !tbaa !18
  %34 = zext i32 %33 to i64
  %35 = or i64 %34, 1024
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr %32, align 4, !tbaa !18
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %37, i32 0, i32 6
  store volatile i32 1, ptr %38, align 4, !tbaa !14
  br label %39

39:                                               ; preds = %21
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %40, i32 0, i32 5
  store i32 0, ptr %41, align 8, !tbaa !11
  br label %42

42:                                               ; preds = %39
  store i32 0, ptr %3, align 4
  br label %43

43:                                               ; preds = %42, %16, %9
  %44 = load i32, ptr %3, align 4
  ret i32 %44
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 104}
!12 = !{!"__DMA2D_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 32, !6, i64 40, !7, i64 48, !10, i64 104, !10, i64 108, !10, i64 112}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 108}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 72}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !7, i64 80, !7, i64 1024, !7, i64 2048}
!18 = !{!17, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_DMA2D_ProgramLineEvent(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp ugt i32 %1, 65535
  br i1 %3, label %14, label %4

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 104
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %14, label %8

8:                                                ; preds = %4
  %9 = getelementptr inbounds i8, ptr %0, i64 108
  store volatile i32 2, ptr %9, align 4, !tbaa !12
  %10 = load ptr, ptr %0, align 8, !tbaa !13
  %11 = getelementptr inbounds i8, ptr %10, i64 72
  store volatile i32 %1, ptr %11, align 4, !tbaa !14
  %12 = load volatile i32, ptr %10, align 4, !tbaa !16
  %13 = or i32 %12, 1024
  store volatile i32 %13, ptr %10, align 4, !tbaa !16
  store volatile i32 1, ptr %9, align 4, !tbaa !12
  store i32 0, ptr %5, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %4, %2, %8
  %.0 = phi i32 [ 0, %8 ], [ 1, %2 ], [ 2, %4 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 104}
!6 = !{!"__DMA2D_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 32, !7, i64 40, !8, i64 48, !11, i64 104, !11, i64 108, !11, i64 112}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 108}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 72}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !8, i64 80, !8, i64 1024, !8, i64 2048}
!16 = !{!15, !11, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass