; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/edge-impulse-sdk/CMSIS/NN/Source/FullyConnectedFunctions (q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_fully_connected_q15(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i16 noundef zeroext %4, i16 noundef zeroext %5, ptr noundef %6, ptr noundef %7, ptr noundef %8) #0 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store i16 %2, ptr %12, align 2, !tbaa !9
  store i16 %3, ptr %13, align 2, !tbaa !9
  store i16 %4, ptr %14, align 2, !tbaa !9
  store i16 %5, ptr %15, align 2, !tbaa !9
  store ptr %6, ptr %16, align 8, !tbaa !5
  store ptr %7, ptr %17, align 8, !tbaa !5
  store ptr %8, ptr %18, align 8, !tbaa !5
  %22 = load ptr, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  store i32 0, ptr %19, align 4, !tbaa !11
  br label %23

23:                                               ; preds = %83, %9
  %24 = load i32, ptr %19, align 4, !tbaa !11
  %25 = load i16, ptr %13, align 2, !tbaa !9
  %26 = zext i16 %25 to i32
  %27 = icmp slt i32 %24, %26
  br i1 %27, label %28, label %86

28:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %29 = load ptr, ptr %16, align 8, !tbaa !5
  %30 = load i32, ptr %19, align 4, !tbaa !11
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds i16, ptr %29, i64 %31
  %33 = load i16, ptr %32, align 2, !tbaa !9
  %34 = sext i16 %33 to i32
  %35 = load i16, ptr %14, align 2, !tbaa !9
  %36 = zext i16 %35 to i32
  %37 = shl i32 %34, %36
  %38 = load i16, ptr %15, align 2, !tbaa !9
  %39 = zext i16 %38 to i32
  %40 = shl i32 1, %39
  %41 = lshr i32 %40, 1
  %42 = add i32 %37, %41
  store i32 %42, ptr %21, align 4, !tbaa !11
  store i32 0, ptr %20, align 4, !tbaa !11
  br label %43

43:                                               ; preds = %69, %28
  %44 = load i32, ptr %20, align 4, !tbaa !11
  %45 = load i16, ptr %12, align 2, !tbaa !9
  %46 = zext i16 %45 to i32
  %47 = icmp slt i32 %44, %46
  br i1 %47, label %48, label %72

48:                                               ; preds = %43
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = load i32, ptr %20, align 4, !tbaa !11
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i16, ptr %49, i64 %51
  %53 = load i16, ptr %52, align 2, !tbaa !9
  %54 = sext i16 %53 to i32
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = load i32, ptr %19, align 4, !tbaa !11
  %57 = load i16, ptr %12, align 2, !tbaa !9
  %58 = zext i16 %57 to i32
  %59 = mul nsw i32 %56, %58
  %60 = load i32, ptr %20, align 4, !tbaa !11
  %61 = add nsw i32 %59, %60
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds i16, ptr %55, i64 %62
  %64 = load i16, ptr %63, align 2, !tbaa !9
  %65 = sext i16 %64 to i32
  %66 = mul nsw i32 %54, %65
  %67 = load i32, ptr %21, align 4, !tbaa !11
  %68 = add nsw i32 %67, %66
  store i32 %68, ptr %21, align 4, !tbaa !11
  br label %69

69:                                               ; preds = %48
  %70 = load i32, ptr %20, align 4, !tbaa !11
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %20, align 4, !tbaa !11
  br label %43, !llvm.loop !13

72:                                               ; preds = %43
  %73 = load i32, ptr %21, align 4, !tbaa !11
  %74 = load i16, ptr %15, align 2, !tbaa !9
  %75 = zext i16 %74 to i32
  %76 = ashr i32 %73, %75
  %77 = call i32 @__SSAT(i32 noundef %76, i32 noundef 16)
  %78 = trunc i32 %77 to i16
  %79 = load ptr, ptr %17, align 8, !tbaa !5
  %80 = load i32, ptr %19, align 4, !tbaa !11
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds i16, ptr %79, i64 %81
  store i16 %78, ptr %82, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  br label %83

83:                                               ; preds = %72
  %84 = load i32, ptr %19, align 4, !tbaa !11
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %19, align 4, !tbaa !11
  br label %23, !llvm.loop !15

86:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @arm_fully_connected_q15(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i16 noundef zeroext %4, i16 noundef zeroext %5, ptr nocapture noundef readonly %6, ptr nocapture noundef writeonly %7, ptr nocapture noundef readnone %8) local_unnamed_addr #0 {
  %.not = icmp eq i16 %3, 0
  br i1 %.not, label %._crit_edge29, label %.lr.ph28

.lr.ph28:                                         ; preds = %9
  %10 = zext nneg i16 %4 to i32
  %11 = zext i16 %5 to i32
  %12 = shl nuw i32 1, %11
  %13 = lshr i32 %12, 1
  %.not30 = icmp eq i16 %2, 0
  br i1 %.not30, label %.lr.ph28.split.preheader, label %.lr.ph.us.preheader

.lr.ph.us.preheader:                              ; preds = %.lr.ph28
  %14 = zext i16 %2 to i64
  %wide.trip.count36 = zext i16 %3 to i64
  %min.iters.check = icmp ult i16 %2, 8
  %n.vec = and i64 %14, 65528
  %cmp.n = icmp eq i64 %n.vec, %14
  br label %.lr.ph.us

.lr.ph28.split.preheader:                         ; preds = %.lr.ph28
  %wide.trip.count41 = zext i16 %3 to i64
  br label %.lr.ph28.split

.lr.ph.us:                                        ; preds = %.lr.ph.us.preheader, %._crit_edge.us
  %indvars.iv33 = phi i64 [ 0, %.lr.ph.us.preheader ], [ %indvars.iv.next34, %._crit_edge.us ]
  %15 = getelementptr inbounds i16, ptr %6, i64 %indvars.iv33
  %16 = load i16, ptr %15, align 2, !tbaa !5
  %17 = sext i16 %16 to i32
  %18 = shl i32 %17, %10
  %19 = add i32 %18, %13
  %20 = mul nuw nsw i64 %indvars.iv33, %14
  %invariant.gep = getelementptr inbounds i16, ptr %1, i64 %20
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.us
  %21 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %19, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %21, %vector.ph ], [ %32, %vector.body ]
  %vec.phi45 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %33, %vector.body ]
  %22 = getelementptr inbounds i16, ptr %0, i64 %index
  %23 = getelementptr inbounds i8, ptr %22, i64 8
  %wide.load = load <4 x i16>, ptr %22, align 2, !tbaa !5
  %wide.load46 = load <4 x i16>, ptr %23, align 2, !tbaa !5
  %24 = sext <4 x i16> %wide.load to <4 x i32>
  %25 = sext <4 x i16> %wide.load46 to <4 x i32>
  %26 = getelementptr inbounds i16, ptr %invariant.gep, i64 %index
  %27 = getelementptr inbounds i8, ptr %26, i64 8
  %wide.load47 = load <4 x i16>, ptr %26, align 2, !tbaa !5
  %wide.load48 = load <4 x i16>, ptr %27, align 2, !tbaa !5
  %28 = sext <4 x i16> %wide.load47 to <4 x i32>
  %29 = sext <4 x i16> %wide.load48 to <4 x i32>
  %30 = mul nsw <4 x i32> %28, %24
  %31 = mul nsw <4 x i32> %29, %25
  %32 = add <4 x i32> %30, %vec.phi
  %33 = add <4 x i32> %31, %vec.phi45
  %index.next = add nuw i64 %index, 8
  %34 = icmp eq i64 %index.next, %n.vec
  br i1 %34, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %33, %32
  %35 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.lr.ph.us
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.us ], [ %n.vec, %middle.block ]
  %.025.us.ph = phi i32 [ %19, %.lr.ph.us ], [ %35, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %.025.us = phi i32 [ %42, %scalar.ph ], [ %.025.us.ph, %scalar.ph.preheader ]
  %36 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv
  %37 = load i16, ptr %36, align 2, !tbaa !5
  %38 = sext i16 %37 to i32
  %gep = getelementptr inbounds i16, ptr %invariant.gep, i64 %indvars.iv
  %39 = load i16, ptr %gep, align 2, !tbaa !5
  %40 = sext i16 %39 to i32
  %41 = mul nsw i32 %40, %38
  %42 = add nsw i32 %41, %.025.us
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %14
  br i1 %exitcond.not, label %._crit_edge.us, label %scalar.ph, !llvm.loop !13

._crit_edge.us:                                   ; preds = %scalar.ph, %middle.block
  %.lcssa = phi i32 [ %35, %middle.block ], [ %42, %scalar.ph ]
  %43 = ashr i32 %.lcssa, %11
  %44 = tail call i32 @__SSAT(i32 noundef %43, i32 noundef 16)
  %45 = trunc i32 %44 to i16
  %46 = getelementptr inbounds i16, ptr %7, i64 %indvars.iv33
  store i16 %45, ptr %46, align 2, !tbaa !5
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %exitcond37.not = icmp eq i64 %indvars.iv.next34, %wide.trip.count36
  br i1 %exitcond37.not, label %._crit_edge29, label %.lr.ph.us, !llvm.loop !14

.lr.ph28.split:                                   ; preds = %.lr.ph28.split.preheader, %.lr.ph28.split
  %indvars.iv38 = phi i64 [ 0, %.lr.ph28.split.preheader ], [ %indvars.iv.next39, %.lr.ph28.split ]
  %47 = getelementptr inbounds i16, ptr %6, i64 %indvars.iv38
  %48 = load i16, ptr %47, align 2, !tbaa !5
  %49 = sext i16 %48 to i32
  %50 = shl i32 %49, %10
  %51 = add i32 %50, %13
  %52 = ashr i32 %51, %11
  %53 = tail call i32 @__SSAT(i32 noundef %52, i32 noundef 16)
  %54 = trunc i32 %53 to i16
  %55 = getelementptr inbounds i16, ptr %7, i64 %indvars.iv38
  store i16 %54, ptr %55, align 2, !tbaa !5
  %indvars.iv.next39 = add nuw nsw i64 %indvars.iv38, 1
  %exitcond42.not = icmp eq i64 %indvars.iv.next39, %wide.trip.count41
  br i1 %exitcond42.not, label %._crit_edge29, label %.lr.ph28.split, !llvm.loop !14

._crit_edge29:                                    ; preds = %._crit_edge.us, %.lr.ph28.split, %9
  ret i32 0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass