; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/src/hid/gatein.ll (ZN5daisy6GateIn4TrigEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.daisy::GateIn" = type <{ %struct.dsy_gpio, i8, i8, i8, i8 }>
%struct.dsy_gpio = type { %struct.dsy_gpio_pin, i32, i32 }
%struct.dsy_gpio_pin = type { i32, i8 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN5daisy6GateIn4TrigEv(ptr noundef nonnull align 4 dereferenceable(19) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 2
  %5 = load i8, ptr %4, align 1, !tbaa !9
  %6 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 1
  store i8 %5, ptr %6, align 4, !tbaa !17
  %7 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 3
  %8 = load i8, ptr %7, align 2, !tbaa !18, !range !19, !noundef !20
  %9 = trunc i8 %8 to i1
  br i1 %9, label %10, label %16

10:                                               ; preds = %1
  %11 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 0
  %12 = call zeroext i8 @dsy_gpio_read(ptr noundef %11)
  %13 = icmp ne i8 %12, 0
  %14 = xor i1 %13, true
  %15 = zext i1 %14 to i32
  br label %20

16:                                               ; preds = %1
  %17 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 0
  %18 = call zeroext i8 @dsy_gpio_read(ptr noundef %17)
  %19 = zext i8 %18 to i32
  br label %20

20:                                               ; preds = %16, %10
  %21 = phi i32 [ %15, %10 ], [ %19, %16 ]
  %22 = trunc i32 %21 to i8
  %23 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 2
  store i8 %22, ptr %23, align 1, !tbaa !9
  %24 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 2
  %25 = load i8, ptr %24, align 1, !tbaa !9
  %26 = icmp ne i8 %25, 0
  br i1 %26, label %27, label %32

27:                                               ; preds = %20
  %28 = getelementptr inbounds %"class.daisy::GateIn", ptr %3, i32 0, i32 1
  %29 = load i8, ptr %28, align 4, !tbaa !17
  %30 = icmp ne i8 %29, 0
  %31 = xor i1 %30, true
  br label %32

32:                                               ; preds = %27, %20
  %33 = phi i1 [ false, %20 ], [ %31, %27 ]
  ret i1 %33
}

declare zeroext i8 @dsy_gpio_read(ptr noundef) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !7, i64 17}
!10 = !{!"_ZTSN5daisy6GateInE", !11, i64 0, !7, i64 16, !7, i64 17, !16, i64 18}
!11 = !{!"_ZTS8dsy_gpio", !12, i64 0, !14, i64 8, !15, i64 12}
!12 = !{!"_ZTS12dsy_gpio_pin", !13, i64 0, !7, i64 4}
!13 = !{!"_ZTS13dsy_gpio_port", !7, i64 0}
!14 = !{!"_ZTS13dsy_gpio_mode", !7, i64 0}
!15 = !{!"_ZTS13dsy_gpio_pull", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!10, !7, i64 16}
!18 = !{!10, !16, i64 18}
!19 = !{i8 0, i8 2}
!20 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN5daisy6GateIn4TrigEv(ptr noundef nonnull align 4 dereferenceable(19) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 17
  %3 = load i8, ptr %2, align 1, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  store i8 %3, ptr %4, align 4, !tbaa !15
  %5 = getelementptr inbounds i8, ptr %0, i64 18
  %6 = load i8, ptr %5, align 2, !tbaa !16, !range !17, !noundef !18
  %7 = trunc nuw i8 %6 to i1
  %8 = tail call zeroext i8 @dsy_gpio_read(ptr noundef nonnull %0)
  %.not = icmp eq i8 %8, 0
  %9 = zext i1 %.not to i8
  %10 = select i1 %7, i8 %9, i8 %8
  store i8 %10, ptr %2, align 1, !tbaa !5
  %.not1 = icmp ne i8 %10, 0
  %11 = load i8, ptr %4, align 4
  %.not2 = icmp eq i8 %11, 0
  %12 = select i1 %.not1, i1 %.not2, i1 false
  ret i1 %12
}

declare zeroext i8 @dsy_gpio_read(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 17}
!6 = !{!"_ZTSN5daisy6GateInE", !7, i64 0, !10, i64 16, !10, i64 17, !14, i64 18}
!7 = !{!"_ZTS8dsy_gpio", !8, i64 0, !12, i64 8, !13, i64 12}
!8 = !{!"_ZTS12dsy_gpio_pin", !9, i64 0, !10, i64 4}
!9 = !{!"_ZTS13dsy_gpio_port", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS13dsy_gpio_mode", !10, i64 0}
!13 = !{!"_ZTS13dsy_gpio_pull", !10, i64 0}
!14 = !{!"bool", !10, i64 0}
!15 = !{!6, !10, i64 16}
!16 = !{!6, !14, i64 18}
!17 = !{i8 0, i8 2}
!18 = !{}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass