; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LPTIM_HandleTypeDef = type { ptr, %struct.LPTIM_InitTypeDef, i32, i32, i32 }
%struct.LPTIM_InitTypeDef = type { %struct.LPTIM_ClockConfigTypeDef, %struct.LPTIM_ULPClockConfigTypeDef, %struct.LPTIM_TriggerConfigTypeDef, i32, i32, i32, i32, i32 }
%struct.LPTIM_ClockConfigTypeDef = type { i32, i32 }
%struct.LPTIM_ULPClockConfigTypeDef = type { i32, i32 }
%struct.LPTIM_TriggerConfigTypeDef = type { i32, i32, i32 }
%struct.LPTIM_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_LPTIM_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %203

9:                                                ; preds = %1
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %10, i32 0, i32 1
  %12 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %11, i32 0, i32 0
  %13 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %12, i32 0, i32 0
  %14 = load i32, ptr %13, align 8, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = icmp eq i64 %15, 1
  br i1 %16, label %17, label %18

17:                                               ; preds = %9
  br label %18

18:                                               ; preds = %17, %9
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %19, i32 0, i32 1
  %21 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %20, i32 0, i32 2
  %22 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %21, i32 0, i32 0
  %23 = load i32, ptr %22, align 8, !tbaa !15
  %24 = icmp ne i32 %23, 65535
  br i1 %24, label %25, label %26

25:                                               ; preds = %18
  br label %26

26:                                               ; preds = %25, %18
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %27, i32 0, i32 4
  %29 = load volatile i32, ptr %28, align 8, !tbaa !16
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %31, label %35

31:                                               ; preds = %26
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %32, i32 0, i32 3
  store i32 0, ptr %33, align 4, !tbaa !17
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_LPTIM_MspInit(ptr noundef %34)
  br label %35

35:                                               ; preds = %31, %26
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %36, i32 0, i32 4
  store volatile i32 2, ptr %37, align 8, !tbaa !16
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !18
  %41 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %40, i32 0, i32 3
  %42 = load volatile i32, ptr %41, align 4, !tbaa !19
  store i32 %42, ptr %4, align 4, !tbaa !21
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %43, i32 0, i32 1
  %45 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %45, i32 0, i32 0
  %47 = load i32, ptr %46, align 8, !tbaa !9
  %48 = zext i32 %47 to i64
  %49 = icmp eq i64 %48, 1
  br i1 %49, label %57, label %50

50:                                               ; preds = %35
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %51, i32 0, i32 1
  %53 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %52, i32 0, i32 5
  %54 = load i32, ptr %53, align 4, !tbaa !22
  %55 = zext i32 %54 to i64
  %56 = icmp eq i64 %55, 8388608
  br i1 %56, label %57, label %60

57:                                               ; preds = %50, %35
  %58 = load i32, ptr %4, align 4, !tbaa !21
  %59 = and i32 %58, -31
  store i32 %59, ptr %4, align 4, !tbaa !21
  br label %60

60:                                               ; preds = %57, %50
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %61, i32 0, i32 1
  %63 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %62, i32 0, i32 2
  %64 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %63, i32 0, i32 0
  %65 = load i32, ptr %64, align 8, !tbaa !15
  %66 = icmp ne i32 %65, 65535
  br i1 %66, label %67, label %70

67:                                               ; preds = %60
  %68 = load i32, ptr %4, align 4, !tbaa !21
  %69 = and i32 %68, -57537
  store i32 %69, ptr %4, align 4, !tbaa !21
  br label %70

70:                                               ; preds = %67, %60
  %71 = load i32, ptr %4, align 4, !tbaa !21
  %72 = and i32 %71, -15076872
  store i32 %72, ptr %4, align 4, !tbaa !21
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %73, i32 0, i32 1
  %75 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %74, i32 0, i32 0
  %76 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %75, i32 0, i32 0
  %77 = load i32, ptr %76, align 8, !tbaa !9
  %78 = load ptr, ptr %3, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %78, i32 0, i32 1
  %80 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %79, i32 0, i32 0
  %81 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %80, i32 0, i32 1
  %82 = load i32, ptr %81, align 4, !tbaa !23
  %83 = or i32 %77, %82
  %84 = load ptr, ptr %3, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %84, i32 0, i32 1
  %86 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %85, i32 0, i32 3
  %87 = load i32, ptr %86, align 4, !tbaa !24
  %88 = or i32 %83, %87
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %89, i32 0, i32 1
  %91 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %90, i32 0, i32 4
  %92 = load i32, ptr %91, align 8, !tbaa !25
  %93 = or i32 %88, %92
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %94, i32 0, i32 1
  %96 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %95, i32 0, i32 5
  %97 = load i32, ptr %96, align 4, !tbaa !22
  %98 = or i32 %93, %97
  %99 = load i32, ptr %4, align 4, !tbaa !21
  %100 = or i32 %99, %98
  store i32 %100, ptr %4, align 4, !tbaa !21
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %101, i32 0, i32 1
  %103 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %102, i32 0, i32 0
  %104 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %103, i32 0, i32 0
  %105 = load i32, ptr %104, align 8, !tbaa !9
  %106 = zext i32 %105 to i64
  %107 = icmp eq i64 %106, 1
  br i1 %107, label %115, label %108

108:                                              ; preds = %70
  %109 = load ptr, ptr %3, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %109, i32 0, i32 1
  %111 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %110, i32 0, i32 5
  %112 = load i32, ptr %111, align 4, !tbaa !22
  %113 = zext i32 %112 to i64
  %114 = icmp eq i64 %113, 8388608
  br i1 %114, label %115, label %129

115:                                              ; preds = %108, %70
  %116 = load ptr, ptr %3, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %116, i32 0, i32 1
  %118 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %117, i32 0, i32 1
  %119 = getelementptr inbounds %struct.LPTIM_ULPClockConfigTypeDef, ptr %118, i32 0, i32 0
  %120 = load i32, ptr %119, align 8, !tbaa !26
  %121 = load ptr, ptr %3, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %121, i32 0, i32 1
  %123 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %122, i32 0, i32 1
  %124 = getelementptr inbounds %struct.LPTIM_ULPClockConfigTypeDef, ptr %123, i32 0, i32 1
  %125 = load i32, ptr %124, align 4, !tbaa !27
  %126 = or i32 %120, %125
  %127 = load i32, ptr %4, align 4, !tbaa !21
  %128 = or i32 %127, %126
  store i32 %128, ptr %4, align 4, !tbaa !21
  br label %129

129:                                              ; preds = %115, %108
  %130 = load ptr, ptr %3, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %130, i32 0, i32 1
  %132 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %131, i32 0, i32 2
  %133 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %132, i32 0, i32 0
  %134 = load i32, ptr %133, align 8, !tbaa !15
  %135 = icmp ne i32 %134, 65535
  br i1 %135, label %136, label %156

136:                                              ; preds = %129
  %137 = load ptr, ptr %3, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %137, i32 0, i32 1
  %139 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %138, i32 0, i32 2
  %140 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %139, i32 0, i32 0
  %141 = load i32, ptr %140, align 8, !tbaa !15
  %142 = load ptr, ptr %3, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %142, i32 0, i32 1
  %144 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %143, i32 0, i32 2
  %145 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %144, i32 0, i32 1
  %146 = load i32, ptr %145, align 4, !tbaa !28
  %147 = or i32 %141, %146
  %148 = load ptr, ptr %3, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %148, i32 0, i32 1
  %150 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %149, i32 0, i32 2
  %151 = getelementptr inbounds %struct.LPTIM_TriggerConfigTypeDef, ptr %150, i32 0, i32 2
  %152 = load i32, ptr %151, align 8, !tbaa !29
  %153 = or i32 %147, %152
  %154 = load i32, ptr %4, align 4, !tbaa !21
  %155 = or i32 %154, %153
  store i32 %155, ptr %4, align 4, !tbaa !21
  br label %156

156:                                              ; preds = %136, %129
  %157 = load i32, ptr %4, align 4, !tbaa !21
  %158 = load ptr, ptr %3, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %158, i32 0, i32 0
  %160 = load ptr, ptr %159, align 8, !tbaa !18
  %161 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %160, i32 0, i32 3
  store volatile i32 %157, ptr %161, align 4, !tbaa !19
  %162 = load ptr, ptr %3, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %162, i32 0, i32 0
  %164 = load ptr, ptr %163, align 8, !tbaa !18
  %165 = icmp eq ptr %164, inttoptr (i64 1073751040 to ptr)
  br i1 %165, label %171, label %166

166:                                              ; preds = %156
  %167 = load ptr, ptr %3, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %167, i32 0, i32 0
  %169 = load ptr, ptr %168, align 8, !tbaa !18
  %170 = icmp eq ptr %169, inttoptr (i64 1476404224 to ptr)
  br i1 %170, label %171, label %185

171:                                              ; preds = %166, %156
  %172 = load ptr, ptr %3, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %172, i32 0, i32 1
  %174 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %173, i32 0, i32 6
  %175 = load i32, ptr %174, align 8, !tbaa !30
  %176 = load ptr, ptr %3, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %176, i32 0, i32 1
  %178 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %177, i32 0, i32 7
  %179 = load i32, ptr %178, align 4, !tbaa !31
  %180 = or i32 %175, %179
  %181 = load ptr, ptr %3, align 8, !tbaa !5
  %182 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %181, i32 0, i32 0
  %183 = load ptr, ptr %182, align 8, !tbaa !18
  %184 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %183, i32 0, i32 9
  store volatile i32 %180, ptr %184, align 4, !tbaa !32
  br label %200

185:                                              ; preds = %166
  %186 = load ptr, ptr %3, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %186, i32 0, i32 0
  %188 = load ptr, ptr %187, align 8, !tbaa !18
  %189 = icmp eq ptr %188, inttoptr (i64 1476405248 to ptr)
  br i1 %189, label %190, label %199

190:                                              ; preds = %185
  %191 = load ptr, ptr %3, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %191, i32 0, i32 1
  %193 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %192, i32 0, i32 6
  %194 = load i32, ptr %193, align 8, !tbaa !30
  %195 = load ptr, ptr %3, align 8, !tbaa !5
  %196 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %195, i32 0, i32 0
  %197 = load ptr, ptr %196, align 8, !tbaa !18
  %198 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %197, i32 0, i32 9
  store volatile i32 %194, ptr %198, align 4, !tbaa !32
  br label %199

199:                                              ; preds = %190, %185
  br label %200

200:                                              ; preds = %199, %171
  %201 = load ptr, ptr %3, align 8, !tbaa !5
  %202 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %201, i32 0, i32 4
  store volatile i32 1, ptr %202, align 8, !tbaa !16
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %203

203:                                              ; preds = %200, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %204 = load i32, ptr %2, align 4
  ret i32 %204
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LPTIM_MspInit(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"", !6, i64 0, !11, i64 8, !13, i64 56, !13, i64 60, !13, i64 64}
!11 = !{!"", !12, i64 0, !12, i64 8, !14, i64 16, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44}
!12 = !{!"", !13, i64 0, !13, i64 4}
!13 = !{!"int", !7, i64 0}
!14 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8}
!15 = !{!10, !13, i64 24}
!16 = !{!10, !13, i64 64}
!17 = !{!10, !13, i64 60}
!18 = !{!10, !6, i64 0}
!19 = !{!20, !13, i64 12}
!20 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36}
!21 = !{!13, !13, i64 0}
!22 = !{!10, !13, i64 44}
!23 = !{!10, !13, i64 12}
!24 = !{!10, !13, i64 36}
!25 = !{!10, !13, i64 40}
!26 = !{!10, !13, i64 16}
!27 = !{!10, !13, i64 20}
!28 = !{!10, !13, i64 28}
!29 = !{!10, !13, i64 32}
!30 = !{!10, !13, i64 48}
!31 = !{!10, !13, i64 52}
!32 = !{!20, !13, i64 36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_LPTIM_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %65, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = getelementptr inbounds i8, ptr %0, i64 64
  %7 = load volatile i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %11

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 0, ptr %10, align 4, !tbaa !14
  tail call void @HAL_LPTIM_MspInit(ptr noundef nonnull %0)
  br label %11

11:                                               ; preds = %9, %3
  store volatile i32 2, ptr %6, align 8, !tbaa !5
  %12 = load ptr, ptr %0, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %12, i64 12
  %14 = load volatile i32, ptr %13, align 4, !tbaa !16
  %15 = load i32, ptr %4, align 8, !tbaa !18
  %16 = icmp eq i32 %15, 1
  %.phi.trans.insert.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 44
  %.pre.pre = load i32, ptr %.phi.trans.insert.phi.trans.insert, align 4, !tbaa !19
  br i1 %16, label %._crit_edge, label %17

17:                                               ; preds = %11
  %18 = icmp eq i32 %.pre.pre, 8388608
  br i1 %18, label %._crit_edge, label %20

._crit_edge:                                      ; preds = %11, %17
  %.pre = phi i32 [ 8388608, %17 ], [ %.pre.pre, %11 ]
  %19 = and i32 %14, -31
  br label %20

20:                                               ; preds = %._crit_edge, %17
  %21 = phi i32 [ %.pre, %._crit_edge ], [ %.pre.pre, %17 ]
  %.0 = phi i32 [ %19, %._crit_edge ], [ %14, %17 ]
  %22 = load i32, ptr %5, align 8, !tbaa !20
  %.not = icmp eq i32 %22, 65535
  %23 = and i32 %.0, -15134408
  %spec.select = select i1 %.not, i32 %.0, i32 %23
  %24 = and i32 %spec.select, -15076872
  %25 = getelementptr inbounds i8, ptr %0, i64 12
  %26 = load i32, ptr %25, align 4, !tbaa !21
  %27 = getelementptr inbounds i8, ptr %0, i64 36
  %28 = load i32, ptr %27, align 4, !tbaa !22
  %29 = getelementptr inbounds i8, ptr %0, i64 40
  %30 = load i32, ptr %29, align 8, !tbaa !23
  %31 = or i32 %26, %28
  %32 = or i32 %31, %30
  %33 = or i32 %32, %24
  %34 = or i32 %33, %15
  %35 = or i32 %34, %21
  %36 = icmp eq i32 %21, 8388608
  %or.cond = select i1 %16, i1 true, i1 %36
  br i1 %or.cond, label %37, label %44

37:                                               ; preds = %20
  %38 = getelementptr inbounds i8, ptr %0, i64 16
  %39 = load i32, ptr %38, align 8, !tbaa !24
  %40 = getelementptr inbounds i8, ptr %0, i64 20
  %41 = load i32, ptr %40, align 4, !tbaa !25
  %42 = or i32 %39, %41
  %43 = or i32 %42, %35
  br label %44

44:                                               ; preds = %20, %37
  %.2 = phi i32 [ %43, %37 ], [ %35, %20 ]
  br i1 %.not, label %53, label %45

45:                                               ; preds = %44
  %46 = getelementptr inbounds i8, ptr %0, i64 28
  %47 = load i32, ptr %46, align 4, !tbaa !26
  %48 = getelementptr inbounds i8, ptr %0, i64 32
  %49 = load i32, ptr %48, align 8, !tbaa !27
  %50 = or i32 %47, %49
  %51 = or i32 %50, %22
  %52 = or i32 %51, %.2
  br label %53

53:                                               ; preds = %45, %44
  %.3 = phi i32 [ %52, %45 ], [ %.2, %44 ]
  store volatile i32 %.3, ptr %13, align 4, !tbaa !16
  %magicptr46 = ptrtoint ptr %12 to i64
  switch i64 %magicptr46, label %64 [
    i64 1073751040, label %54
    i64 1476404224, label %54
    i64 1476405248, label %61
  ]

54:                                               ; preds = %53, %53
  %55 = getelementptr inbounds i8, ptr %0, i64 48
  %56 = load i32, ptr %55, align 8, !tbaa !28
  %57 = getelementptr inbounds i8, ptr %0, i64 52
  %58 = load i32, ptr %57, align 4, !tbaa !29
  %59 = or i32 %58, %56
  %60 = getelementptr inbounds i8, ptr %12, i64 36
  store volatile i32 %59, ptr %60, align 4, !tbaa !30
  br label %64

61:                                               ; preds = %53
  %62 = getelementptr inbounds i8, ptr %0, i64 48
  %63 = load i32, ptr %62, align 8, !tbaa !28
  store volatile i32 %63, ptr inttoptr (i64 1476405284 to ptr), align 4, !tbaa !30
  br label %64

64:                                               ; preds = %53, %61, %54
  store volatile i32 1, ptr %6, align 8, !tbaa !5
  br label %65

65:                                               ; preds = %1, %64
  %.041 = phi i32 [ 0, %64 ], [ 1, %1 ]
  ret i32 %.041
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LPTIM_MspInit(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !12, i64 56, !12, i64 60, !12, i64 64}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 8, !13, i64 16, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!11 = !{!"", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!14 = !{!6, !12, i64 60}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !12, i64 12}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!18 = !{!6, !12, i64 8}
!19 = !{!6, !12, i64 44}
!20 = !{!6, !12, i64 24}
!21 = !{!6, !12, i64 12}
!22 = !{!6, !12, i64 36}
!23 = !{!6, !12, i64 40}
!24 = !{!6, !12, i64 16}
!25 = !{!6, !12, i64 20}
!26 = !{!6, !12, i64 28}
!27 = !{!6, !12, i64 32}
!28 = !{!6, !12, i64 48}
!29 = !{!6, !12, i64 52}
!30 = !{!17, !12, i64 36}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass