; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMAResume)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SAI_HandleTypeDef = type { ptr, %struct.SAI_InitTypeDef, %struct.SAI_FrameInitTypeDef, %struct.SAI_SlotInitTypeDef, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SAI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.SAI_PdmInitTypeDef, i32, i32, i32, i32 }
%struct.SAI_PdmInitTypeDef = type { i32, i32, i32 }
%struct.SAI_FrameInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SAI_SlotInitTypeDef = type { i32, i32, i32, i32 }
%struct.SAI_Block_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SAI_DMAResume(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  br label %4

4:                                                ; preds = %1
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %5, i32 0, i32 11
  %7 = load i32, ptr %6, align 8, !tbaa !9
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %9, label %10

9:                                                ; preds = %4
  store i32 2, ptr %2, align 4
  br label %45

10:                                               ; preds = %4
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %11, i32 0, i32 11
  store i32 1, ptr %12, align 8, !tbaa !9
  br label %13

13:                                               ; preds = %10
  br label %14

14:                                               ; preds = %13
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %15, i32 0, i32 0
  %17 = load ptr, ptr %16, align 8, !tbaa !17
  %18 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %17, i32 0, i32 0
  %19 = load volatile i32, ptr %18, align 4, !tbaa !18
  %20 = zext i32 %19 to i64
  %21 = or i64 %20, 131072
  %22 = trunc i64 %21 to i32
  store volatile i32 %22, ptr %18, align 4, !tbaa !18
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !17
  %26 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %25, i32 0, i32 0
  %27 = load volatile i32, ptr %26, align 4, !tbaa !18
  %28 = zext i32 %27 to i64
  %29 = and i64 %28, 65536
  %30 = icmp eq i64 %29, 0
  br i1 %30, label %31, label %40

31:                                               ; preds = %14
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !17
  %35 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %34, i32 0, i32 0
  %36 = load volatile i32, ptr %35, align 4, !tbaa !18
  %37 = zext i32 %36 to i64
  %38 = or i64 %37, 65536
  %39 = trunc i64 %38 to i32
  store volatile i32 %39, ptr %35, align 4, !tbaa !18
  br label %40

40:                                               ; preds = %31, %14
  br label %41

41:                                               ; preds = %40
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %42, i32 0, i32 11
  store i32 0, ptr %43, align 8, !tbaa !9
  br label %44

44:                                               ; preds = %41
  store i32 0, ptr %2, align 4
  br label %45

45:                                               ; preds = %44, %9
  %46 = load i32, ptr %2, align 4
  ret i32 %46
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 176}
!10 = !{!"__SAI_HandleTypeDef", !6, i64 0, !11, i64 8, !14, i64 88, !15, i64 108, !6, i64 128, !16, i64 136, !16, i64 138, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !12, i64 176, !12, i64 180, !12, i64 184}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !13, i64 52, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!16 = !{!"short", !7, i64 0}
!17 = !{!10, !6, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SAI_DMAResume(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 176
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %4 = icmp eq i32 %3, 1
  br i1 %4, label %16, label %5

5:                                                ; preds = %1
  %6 = load ptr, ptr %0, align 8, !tbaa !16
  %7 = load volatile i32, ptr %6, align 4, !tbaa !17
  %8 = or i32 %7, 131072
  store volatile i32 %8, ptr %6, align 4, !tbaa !17
  %9 = load volatile i32, ptr %6, align 4, !tbaa !17
  %10 = and i32 %9, 65536
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %15

12:                                               ; preds = %5
  %13 = load volatile i32, ptr %6, align 4, !tbaa !17
  %14 = or i32 %13, 65536
  store volatile i32 %14, ptr %6, align 4, !tbaa !17
  br label %15

15:                                               ; preds = %5, %12
  store i32 0, ptr %2, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %1, %15
  %.0 = phi i32 [ 0, %15 ], [ 2, %1 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 176}
!6 = !{!"__SAI_HandleTypeDef", !7, i64 0, !10, i64 8, !13, i64 88, !14, i64 108, !7, i64 128, !15, i64 136, !15, i64 138, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !11, i64 176, !11, i64 180, !11, i64 184}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass