; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/src/sys (dma)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

; Function Attrs: nounwind uwtable
define dso_local void @dsy_dma_init() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  br label %3

3:                                                ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  %4 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %5 = zext i32 %4 to i64
  %6 = or i64 %5, 1
  %7 = trunc i64 %6 to i32
  store volatile i32 %7, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %8 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, 1
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr %1, align 4, !tbaa !10
  %12 = load volatile i32, ptr %1, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %13

13:                                               ; preds = %3
  br label %14

14:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  %15 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %16 = zext i32 %15 to i64
  %17 = or i64 %16, 2
  %18 = trunc i64 %17 to i32
  store volatile i32 %18, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %19 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 46), align 4, !tbaa !5
  %20 = zext i32 %19 to i64
  %21 = and i64 %20, 2
  %22 = trunc i64 %21 to i32
  store volatile i32 %22, ptr %2, align 4, !tbaa !10
  %23 = load volatile i32, ptr %2, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %24

24:                                               ; preds = %14
  call void @HAL_NVIC_SetPriority(i32 noundef 11, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 11)
  call void @HAL_NVIC_SetPriority(i32 noundef 12, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 12)
  call void @HAL_NVIC_SetPriority(i32 noundef 13, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 13)
  call void @HAL_NVIC_SetPriority(i32 noundef 14, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 14)
  call void @HAL_NVIC_SetPriority(i32 noundef 15, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 15)
  call void @HAL_NVIC_SetPriority(i32 noundef 16, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 16)
  call void @HAL_NVIC_SetPriority(i32 noundef 60, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 60)
  call void @HAL_NVIC_SetPriority(i32 noundef 17, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 17)
  call void @HAL_NVIC_SetPriority(i32 noundef 56, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 56)
  call void @HAL_NVIC_SetPriority(i32 noundef 57, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 57)
  call void @HAL_NVIC_SetPriority(i32 noundef 58, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 58)
  call void @HAL_NVIC_SetPriority(i32 noundef 59, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 59)
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 216}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @dsy_dma_init() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1)
  %3 = load volatile i32, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %4 = or i32 %3, 1
  store volatile i32 %4, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %5 = load volatile i32, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %6 = and i32 %5, 1
  store volatile i32 %6, ptr %1, align 4, !tbaa !10
  %.0..0..0..0.1 = load volatile i32, ptr %1, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  %7 = load volatile i32, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %8 = or i32 %7, 2
  store volatile i32 %8, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %9 = load volatile i32, ptr inttoptr (i64 1476543704 to ptr), align 8, !tbaa !5
  %10 = and i32 %9, 2
  store volatile i32 %10, ptr %2, align 4, !tbaa !10
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  tail call void @HAL_NVIC_SetPriority(i32 noundef 11, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 11) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 12, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 12) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 13, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 13) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 14, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 14) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 15, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 15) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 16, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 16) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 60, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 60) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 17, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 17) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 56, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 56) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 57, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 57) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 58, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 58) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 59, i32 noundef 0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 59) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 216}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass