; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/ASwitch.ll (ZN7ASwitch19route_fw_2_2_configEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ASwitch = type { %class.Unit, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i8, i32, i32, i8, i8, i8, i32, [4 x i8], %class.ASwitchStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ASwitchStats = type <{ %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8] }>
%class.Stats = type { ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #1

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) #2

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

declare void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) #2

declare void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) unnamed_addr #2

; Function Attrs: nounwind
declare void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch19route_fw_2_2_configEv(ptr noundef nonnull align 8 dereferenceable(288) %0) #5 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  br label %10

10:                                               ; preds = %28, %1
  %11 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 12
  %12 = load ptr, ptr %11, align 8, !tbaa !9
  %13 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %12)
  %14 = xor i1 %13, true
  br i1 %14, label %15, label %33

15:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #6
  %16 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 12
  %17 = load ptr, ptr %16, align 8, !tbaa !9
  %18 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %17)
  store ptr %18, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #6
  %19 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 64) #7
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  invoke void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64) %19, ptr noundef %20)
          to label %21 unwind label %29

21:                                               ; preds = %15
  store ptr %19, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 15
  %23 = load ptr, ptr %22, align 8, !tbaa !26
  %24 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %23, ptr noundef %24)
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = icmp eq ptr %25, null
  br i1 %26, label %28, label %27

27:                                               ; preds = %21
  call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %25) #6
  call void @_ZdlPvm(ptr noundef %25, i64 noundef 64) #8
  br label %28

28:                                               ; preds = %27, %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #6
  br label %10, !llvm.loop !27

29:                                               ; preds = %15
  %30 = landingpad { ptr, i32 }
          cleanup
  %31 = extractvalue { ptr, i32 } %30, 0
  store ptr %31, ptr %5, align 8
  %32 = extractvalue { ptr, i32 } %30, 1
  store i32 %32, ptr %6, align 4
  call void @_ZdlPvm(ptr noundef %19, i64 noundef 64) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #6
  br label %58

33:                                               ; preds = %10
  br label %34

34:                                               ; preds = %52, %33
  %35 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 13
  %36 = load ptr, ptr %35, align 8, !tbaa !29
  %37 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %36)
  %38 = xor i1 %37, true
  br i1 %38, label %39, label %57

39:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %40 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 13
  %41 = load ptr, ptr %40, align 8, !tbaa !29
  %42 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %41)
  store ptr %42, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  %43 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 64) #7
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  invoke void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64) %43, ptr noundef %44)
          to label %45 unwind label %53

45:                                               ; preds = %39
  store ptr %43, ptr %8, align 8, !tbaa !5
  %46 = getelementptr inbounds %class.ASwitch, ptr %9, i32 0, i32 15
  %47 = load ptr, ptr %46, align 8, !tbaa !26
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %47, ptr noundef %48)
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = icmp eq ptr %49, null
  br i1 %50, label %52, label %51

51:                                               ; preds = %45
  call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %49) #6
  call void @_ZdlPvm(ptr noundef %49, i64 noundef 64) #8
  br label %52

52:                                               ; preds = %51, %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  br label %34, !llvm.loop !30

53:                                               ; preds = %39
  %54 = landingpad { ptr, i32 }
          cleanup
  %55 = extractvalue { ptr, i32 } %54, 0
  store ptr %55, ptr %5, align 8
  %56 = extractvalue { ptr, i32 } %54, 1
  store i32 %56, ptr %6, align 4
  call void @_ZdlPvm(ptr noundef %43, i64 noundef 64) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  br label %58

57:                                               ; preds = %34
  ret void

58:                                               ; preds = %53, %29
  %59 = load ptr, ptr %5, align 8
  %60 = load i32, ptr %6, align 4
  %61 = insertvalue { ptr, i32 } poison, ptr %59, 0
  %62 = insertvalue { ptr, i32 } %61, i32 %60, 1
  resume { ptr, i32 } %62
}

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 96}
!10 = !{!"_ZTS7ASwitch", !11, i64 0, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !16, i64 136, !12, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !12, i64 208, !20, i64 212, !21, i64 216, !22, i64 220, !23, i64 224, !21, i64 228, !21, i64 229, !21, i64 230, !12, i64 232, !24, i64 240}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTS4fl_t", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!23 = !{!"_ZTS16adderoperation_t", !7, i64 0}
!24 = !{!"_ZTS12ASwitchStats", !25, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!25 = !{!"_ZTS5Stats"}
!26 = !{!10, !6, i64 120}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = !{!10, !6, i64 104}
!30 = distinct !{!30, !28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #1

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2

declare void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) local_unnamed_addr #2

declare void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) unnamed_addr #2

; Function Attrs: nounwind
declare void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch19route_fw_2_2_configEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(288) %0) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 96
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %3)
  br i1 %4, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 120
  br label %10

.preheader:                                       ; preds = %18, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 104
  %7 = load ptr, ptr %6, align 8, !tbaa !25
  %8 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %7)
  br i1 %8, label %._crit_edge, label %.lr.ph13

.lr.ph13:                                         ; preds = %.preheader
  %9 = getelementptr inbounds i8, ptr %0, i64 120
  br label %23

10:                                               ; preds = %.lr.ph, %18
  %11 = load ptr, ptr %2, align 8, !tbaa !5
  %12 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %11)
  %13 = tail call noalias noundef nonnull dereferenceable(64) ptr @_Znwm(i64 noundef 64) #5
  invoke void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64) %13, ptr noundef %12)
          to label %14 unwind label %21

14:                                               ; preds = %10
  %15 = load ptr, ptr %5, align 8, !tbaa !26
  tail call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %15, ptr noundef nonnull %13)
  %16 = icmp eq ptr %12, null
  br i1 %16, label %18, label %17

17:                                               ; preds = %14
  tail call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %12) #6
  tail call void @_ZdlPvm(ptr noundef nonnull %12, i64 noundef 64) #7
  br label %18

18:                                               ; preds = %17, %14
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %19)
  br i1 %20, label %.preheader, label %10, !llvm.loop !27

21:                                               ; preds = %10
  %22 = landingpad { ptr, i32 }
          cleanup
  br label %36

23:                                               ; preds = %.lr.ph13, %31
  %24 = load ptr, ptr %6, align 8, !tbaa !25
  %25 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %24)
  %26 = tail call noalias noundef nonnull dereferenceable(64) ptr @_Znwm(i64 noundef 64) #5
  invoke void @_ZN11DataPackageC1EPS_(ptr noundef nonnull align 8 dereferenceable(64) %26, ptr noundef %25)
          to label %27 unwind label %34

27:                                               ; preds = %23
  %28 = load ptr, ptr %9, align 8, !tbaa !26
  tail call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %28, ptr noundef nonnull %26)
  %29 = icmp eq ptr %25, null
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  tail call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %25) #6
  tail call void @_ZdlPvm(ptr noundef nonnull %25, i64 noundef 64) #7
  br label %31

31:                                               ; preds = %30, %27
  %32 = load ptr, ptr %6, align 8, !tbaa !25
  %33 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %32)
  br i1 %33, label %._crit_edge, label %23, !llvm.loop !29

34:                                               ; preds = %23
  %35 = landingpad { ptr, i32 }
          cleanup
  br label %36

._crit_edge:                                      ; preds = %31, %.preheader
  ret void

36:                                               ; preds = %34, %21
  %.lcssa.sink = phi ptr [ %26, %34 ], [ %13, %21 ]
  %.pn = phi { ptr, i32 } [ %35, %34 ], [ %22, %21 ]
  tail call void @_ZdlPvm(ptr noundef nonnull %.lcssa.sink, i64 noundef 64) #7
  resume { ptr, i32 } %.pn
}

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { nounwind }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 96}
!6 = !{!"_ZTS7ASwitch", !7, i64 0, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60, !8, i64 64, !8, i64 68, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !8, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !15, i64 136, !8, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !8, i64 208, !19, i64 212, !20, i64 216, !21, i64 220, !22, i64 224, !20, i64 228, !20, i64 229, !20, i64 230, !8, i64 232, !23, i64 240}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!"_ZTS4fl_t", !9, i64 0}
!20 = !{!"bool", !9, i64 0}
!21 = !{!"_ZTS13adderconfig_t", !9, i64 0}
!22 = !{!"_ZTS16adderoperation_t", !9, i64 0}
!23 = !{!"_ZTS12ASwitchStats", !24, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40}
!24 = !{!"_ZTS5Stats"}
!25 = !{!6, !13, i64 104}
!26 = !{!6, !13, i64 120}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = distinct !{!29, !28}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass