; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/CompilerART.ll (ZN11CompilerART20generate_art_signalsEj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair.46" = type { i32, i32 }
%class.CompilerComponent = type <{ ptr, ptr, %"class.std::vector.23", ptr, i32, i8, [3 x i8], i32, [4 x i8] }>
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.CompilerART = type { %class.CompilerComponent.base, %"class.std::map", %"class.std::map.31", %"class.std::map.36", %"class.std::map.41" }
%class.CompilerComponent.base = type <{ ptr, ptr, %"class.std::vector.23", ptr, i32, i8, [3 x i8], i32 }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, adderconfig_t>, std::_Select1st<std::pair<const std::pair<int, int>, adderconfig_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, adderconfig_t>, std::_Select1st<std::pair<const std::pair<int, int>, adderconfig_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.31" = type { %"class.std::_Rb_tree.32" }
%"class.std::_Rb_tree.32" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, fl_t>, std::_Select1st<std::pair<const std::pair<int, int>, fl_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, fl_t>, std::_Select1st<std::pair<const std::pair<int, int>, fl_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::map.36" = type { %"class.std::_Rb_tree.37" }
%"class.std::_Rb_tree.37" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, std::pair<bool, bool>>, std::_Select1st<std::pair<const std::pair<int, int>, std::pair<bool, bool>>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, std::pair<bool, bool>>, std::_Select1st<std::pair<const std::pair<int, int>, std::pair<bool, bool>>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::map.41" = type { %"class.std::_Rb_tree.42" }
%"class.std::_Rb_tree.42" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, bool>, std::_Select1st<std::pair<const std::pair<int, int>, bool>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, bool>, std::_Select1st<std::pair<const std::pair<int, int>, bool>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }

@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj = external hidden unnamed_addr constant [53 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CompilerART20generate_art_signalsEj(ptr noundef nonnull align 8 dereferenceable(256) %0, i32 noundef %1) #3 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"struct.std::pair.46", align 4
  %19 = alloca i8, align 1
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca %"struct.std::pair.46", align 4
  %32 = alloca %"struct.std::pair.46", align 4
  %33 = alloca %"struct.std::pair.46", align 4
  %34 = alloca %"struct.std::pair.46", align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca %"struct.std::pair.46", align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %40 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = call noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %41)
  %43 = call noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef 2)
  %44 = fdiv double %42, %43
  %45 = fptosi double %44 to i32
  store i32 %45, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #7
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = call noalias noundef nonnull ptr @_Znam(i64 noundef %47) #8
  store ptr %48, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  %49 = load i32, ptr %4, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = call noalias noundef nonnull ptr @_Znam(i64 noundef %50) #8
  store ptr %51, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %533, %2
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 1
  %55 = load ptr, ptr %54, align 8, !tbaa !11
  %56 = call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %55)
  %57 = icmp ult i32 %53, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %52
  store i32 2, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %536

59:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %74, %59
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = load i32, ptr %4, align 4, !tbaa !9
  %63 = icmp ult i32 %61, %62
  br i1 %63, label %65, label %64

64:                                               ; preds = %60
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %77

65:                                               ; preds = %60
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i8, ptr %66, i64 %68
  store i8 0, ptr %69, align 1, !tbaa !18
  %70 = load ptr, ptr %7, align 8, !tbaa !5
  %71 = load i32, ptr %11, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds i8, ptr %70, i64 %72
  store i8 0, ptr %73, align 1, !tbaa !18
  br label %74

74:                                               ; preds = %65
  %75 = load i32, ptr %11, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %11, align 4, !tbaa !9
  br label %60, !llvm.loop !19

77:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 1
  %80 = load ptr, ptr %79, align 8, !tbaa !11
  %81 = call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %80)
  %82 = mul i32 %78, %81
  store i32 %82, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  %83 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %83, ptr %13, align 4, !tbaa !9
  br label %84

84:                                               ; preds = %98, %77
  %85 = load i32, ptr %13, align 4, !tbaa !9
  %86 = load i32, ptr %12, align 4, !tbaa !9
  %87 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 1
  %88 = load ptr, ptr %87, align 8, !tbaa !11
  %89 = call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %88)
  %90 = add i32 %86, %89
  %91 = icmp ult i32 %85, %90
  br i1 %91, label %93, label %92

92:                                               ; preds = %84
  store i32 8, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %101

93:                                               ; preds = %84
  %94 = load ptr, ptr %6, align 8, !tbaa !5
  %95 = load i32, ptr %13, align 4, !tbaa !9
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds i8, ptr %94, i64 %96
  store i8 1, ptr %97, align 1, !tbaa !18
  br label %98

98:                                               ; preds = %93
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %13, align 4, !tbaa !9
  br label %84, !llvm.loop !21

101:                                              ; preds = %92
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  %102 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %102, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %103 = load i32, ptr %5, align 4, !tbaa !9
  %104 = sub nsw i32 %103, 1
  store i32 %104, ptr %15, align 4, !tbaa !9
  br label %105

105:                                              ; preds = %529, %101
  %106 = load i32, ptr %15, align 4, !tbaa !9
  %107 = icmp sge i32 %106, 0
  br i1 %107, label %109, label %108

108:                                              ; preds = %105
  store i32 11, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  br label %532

109:                                              ; preds = %105
  %110 = load i32, ptr %14, align 4, !tbaa !9
  %111 = sdiv i32 %110, 2
  store i32 %111, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %112

112:                                              ; preds = %481, %109
  %113 = load i32, ptr %16, align 4, !tbaa !9
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = icmp slt i32 %113, %114
  br i1 %115, label %117, label %116

116:                                              ; preds = %112
  store i32 14, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  br label %484

117:                                              ; preds = %112
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  %118 = load i32, ptr %16, align 4, !tbaa !9
  %119 = mul nsw i32 %118, 2
  store i32 %119, ptr %17, align 4, !tbaa !9
  %120 = load i32, ptr %16, align 4, !tbaa !9
  %121 = icmp eq i32 %120, 0
  br i1 %121, label %127, label %122

122:                                              ; preds = %117
  %123 = load i32, ptr %16, align 4, !tbaa !9
  %124 = load i32, ptr %14, align 4, !tbaa !9
  %125 = sub nsw i32 %124, 1
  %126 = icmp eq i32 %123, %125
  br i1 %126, label %127, label %163

127:                                              ; preds = %122, %117
  %128 = load ptr, ptr %6, align 8, !tbaa !5
  %129 = load i32, ptr %17, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = getelementptr inbounds i8, ptr %128, i64 %130
  %132 = load i8, ptr %131, align 1, !tbaa !18, !range !22, !noundef !23
  %133 = trunc i8 %132 to i1
  br i1 %133, label %142, label %134

134:                                              ; preds = %127
  %135 = load ptr, ptr %6, align 8, !tbaa !5
  %136 = load i32, ptr %17, align 4, !tbaa !9
  %137 = add nsw i32 %136, 1
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds i8, ptr %135, i64 %138
  %140 = load i8, ptr %139, align 1, !tbaa !18, !range !22, !noundef !23
  %141 = trunc i8 %140 to i1
  br i1 %141, label %142, label %157

142:                                              ; preds = %134, %127
  %143 = load ptr, ptr %7, align 8, !tbaa !5
  %144 = load i32, ptr %16, align 4, !tbaa !9
  %145 = sext i32 %144 to i64
  %146 = getelementptr inbounds i8, ptr %143, i64 %145
  store i8 1, ptr %146, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %18, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16)
  %147 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %148 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %147, ptr noundef nonnull align 4 dereferenceable(8) %18)
  %149 = icmp ugt i64 %148, 0
  br i1 %149, label %150, label %153

150:                                              ; preds = %142
  %151 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %151, ptr noundef nonnull align 4 dereferenceable(8) %18)
  store i32 3, ptr %152, align 4, !tbaa !24
  br label %156

153:                                              ; preds = %142
  %154 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %155 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %154, ptr noundef nonnull align 4 dereferenceable(8) %18)
  store i32 0, ptr %155, align 4, !tbaa !24
  br label %156

156:                                              ; preds = %153, %150
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  br label %162

157:                                              ; preds = %134
  %158 = load ptr, ptr %7, align 8, !tbaa !5
  %159 = load i32, ptr %16, align 4, !tbaa !9
  %160 = sext i32 %159 to i64
  %161 = getelementptr inbounds i8, ptr %158, i64 %160
  store i8 0, ptr %161, align 1, !tbaa !18
  br label %162

162:                                              ; preds = %157, %156
  br label %480

163:                                              ; preds = %122
  %164 = load i32, ptr %16, align 4, !tbaa !9
  %165 = srem i32 %164, 2
  %166 = icmp ne i32 %165, 0
  br i1 %166, label %167, label %479

167:                                              ; preds = %163
  call void @llvm.lifetime.start.p0(i64 1, ptr %19) #7
  store i8 0, ptr %19, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #7
  %168 = load i32, ptr %17, align 4, !tbaa !9
  %169 = add nsw i32 %168, 1
  store i32 %169, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  %170 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %170, ptr %22, align 4, !tbaa !9
  %171 = load ptr, ptr %6, align 8, !tbaa !5
  %172 = load i32, ptr %21, align 4, !tbaa !9
  %173 = sext i32 %172 to i64
  %174 = getelementptr inbounds i8, ptr %171, i64 %173
  %175 = load i8, ptr %174, align 1, !tbaa !18, !range !22, !noundef !23
  %176 = trunc i8 %175 to i1
  br i1 %176, label %177, label %179

177:                                              ; preds = %167
  %178 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %178, ptr %22, align 4, !tbaa !9
  br label %179

179:                                              ; preds = %177, %167
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #7
  %180 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %180, ptr %23, align 4, !tbaa !9
  br label %181

181:                                              ; preds = %197, %179
  %182 = load i32, ptr %23, align 4, !tbaa !9
  %183 = icmp sge i32 %182, 0
  br i1 %183, label %185, label %184

184:                                              ; preds = %181
  store i32 17, ptr %10, align 4
  br label %200

185:                                              ; preds = %181
  %186 = load ptr, ptr %6, align 8, !tbaa !5
  %187 = load i32, ptr %23, align 4, !tbaa !9
  %188 = sext i32 %187 to i64
  %189 = getelementptr inbounds i8, ptr %186, i64 %188
  %190 = load i8, ptr %189, align 1, !tbaa !18, !range !22, !noundef !23
  %191 = trunc i8 %190 to i1
  br i1 %191, label %192, label %195

192:                                              ; preds = %185
  %193 = load i32, ptr %20, align 4, !tbaa !9
  %194 = add nsw i32 %193, 1
  store i32 %194, ptr %20, align 4, !tbaa !9
  br label %196

195:                                              ; preds = %185
  store i32 17, ptr %10, align 4
  br label %200

196:                                              ; preds = %192
  br label %197

197:                                              ; preds = %196
  %198 = load i32, ptr %23, align 4, !tbaa !9
  %199 = add nsw i32 %198, -1
  store i32 %199, ptr %23, align 4, !tbaa !9
  br label %181, !llvm.loop !26

200:                                              ; preds = %195, %184
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #7
  br label %201

201:                                              ; preds = %200
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #7
  store i32 0, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #7
  %202 = load i32, ptr %21, align 4, !tbaa !9
  %203 = add nsw i32 %202, 1
  store i32 %203, ptr %25, align 4, !tbaa !9
  %204 = load ptr, ptr %6, align 8, !tbaa !5
  %205 = load i32, ptr %25, align 4, !tbaa !9
  %206 = sext i32 %205 to i64
  %207 = getelementptr inbounds i8, ptr %204, i64 %206
  %208 = load i8, ptr %207, align 1, !tbaa !18, !range !22, !noundef !23
  %209 = trunc i8 %208 to i1
  br i1 %209, label %213, label %210

210:                                              ; preds = %201
  %211 = load i32, ptr %25, align 4, !tbaa !9
  %212 = add nsw i32 %211, 1
  store i32 %212, ptr %25, align 4, !tbaa !9
  br label %213

213:                                              ; preds = %210, %201
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #7
  %214 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %214, ptr %26, align 4, !tbaa !9
  br label %215

215:                                              ; preds = %232, %213
  %216 = load i32, ptr %26, align 4, !tbaa !9
  %217 = load i32, ptr %4, align 4, !tbaa !9
  %218 = icmp ult i32 %216, %217
  br i1 %218, label %220, label %219

219:                                              ; preds = %215
  store i32 20, ptr %10, align 4
  br label %235

220:                                              ; preds = %215
  %221 = load ptr, ptr %6, align 8, !tbaa !5
  %222 = load i32, ptr %26, align 4, !tbaa !9
  %223 = sext i32 %222 to i64
  %224 = getelementptr inbounds i8, ptr %221, i64 %223
  %225 = load i8, ptr %224, align 1, !tbaa !18, !range !22, !noundef !23
  %226 = trunc i8 %225 to i1
  br i1 %226, label %227, label %230

227:                                              ; preds = %220
  %228 = load i32, ptr %24, align 4, !tbaa !9
  %229 = add nsw i32 %228, 1
  store i32 %229, ptr %24, align 4, !tbaa !9
  br label %231

230:                                              ; preds = %220
  store i32 20, ptr %10, align 4
  br label %235

231:                                              ; preds = %227
  br label %232

232:                                              ; preds = %231
  %233 = load i32, ptr %26, align 4, !tbaa !9
  %234 = add nsw i32 %233, 1
  store i32 %234, ptr %26, align 4, !tbaa !9
  br label %215, !llvm.loop !27

235:                                              ; preds = %230, %219
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #7
  br label %236

236:                                              ; preds = %235
  %237 = load i32, ptr %20, align 4, !tbaa !9
  %238 = icmp eq i32 %237, 0
  br i1 %238, label %242, label %239

239:                                              ; preds = %236
  %240 = load i32, ptr %24, align 4, !tbaa !9
  %241 = icmp eq i32 %240, 0
  br i1 %241, label %242, label %269

242:                                              ; preds = %239, %236
  store i8 0, ptr %19, align 1, !tbaa !18
  %243 = load ptr, ptr %7, align 8, !tbaa !5
  %244 = load i32, ptr %16, align 4, !tbaa !9
  %245 = sext i32 %244 to i64
  %246 = getelementptr inbounds i8, ptr %243, i64 %245
  store i8 0, ptr %246, align 1, !tbaa !18
  %247 = load ptr, ptr %7, align 8, !tbaa !5
  %248 = load i32, ptr %16, align 4, !tbaa !9
  %249 = add nsw i32 %248, 1
  %250 = sext i32 %249 to i64
  %251 = getelementptr inbounds i8, ptr %247, i64 %250
  store i8 0, ptr %251, align 1, !tbaa !18
  %252 = load i32, ptr %20, align 4, !tbaa !9
  %253 = icmp sgt i32 %252, 0
  br i1 %253, label %254, label %259

254:                                              ; preds = %242
  %255 = load ptr, ptr %7, align 8, !tbaa !5
  %256 = load i32, ptr %16, align 4, !tbaa !9
  %257 = sext i32 %256 to i64
  %258 = getelementptr inbounds i8, ptr %255, i64 %257
  store i8 1, ptr %258, align 1, !tbaa !18
  br label %259

259:                                              ; preds = %254, %242
  %260 = load i32, ptr %24, align 4, !tbaa !9
  %261 = icmp sgt i32 %260, 0
  br i1 %261, label %262, label %268

262:                                              ; preds = %259
  %263 = load ptr, ptr %7, align 8, !tbaa !5
  %264 = load i32, ptr %16, align 4, !tbaa !9
  %265 = add nsw i32 %264, 1
  %266 = sext i32 %265 to i64
  %267 = getelementptr inbounds i8, ptr %263, i64 %266
  store i8 1, ptr %267, align 1, !tbaa !18
  br label %268

268:                                              ; preds = %262, %259
  br label %384

269:                                              ; preds = %239
  %270 = load i32, ptr %20, align 4, !tbaa !9
  %271 = load i32, ptr %24, align 4, !tbaa !9
  %272 = icmp sge i32 %270, %271
  br i1 %272, label %273, label %274

273:                                              ; preds = %269
  store i32 0, ptr %8, align 4, !tbaa !28
  br label %275

274:                                              ; preds = %269
  store i32 1, ptr %8, align 4, !tbaa !28
  br label %275

275:                                              ; preds = %274, %273
  %276 = load i32, ptr %8, align 4, !tbaa !28
  %277 = icmp eq i32 %276, 0
  br i1 %277, label %278, label %331

278:                                              ; preds = %275
  %279 = load ptr, ptr %6, align 8, !tbaa !5
  %280 = load i32, ptr %21, align 4, !tbaa !9
  %281 = add nsw i32 %280, 3
  %282 = sext i32 %281 to i64
  %283 = getelementptr inbounds i8, ptr %279, i64 %282
  %284 = load i8, ptr %283, align 1, !tbaa !18, !range !22, !noundef !23
  %285 = trunc i8 %284 to i1
  br i1 %285, label %294, label %286

286:                                              ; preds = %278
  %287 = load ptr, ptr %6, align 8, !tbaa !5
  %288 = load i32, ptr %21, align 4, !tbaa !9
  %289 = add nsw i32 %288, 4
  %290 = sext i32 %289 to i64
  %291 = getelementptr inbounds i8, ptr %287, i64 %290
  %292 = load i8, ptr %291, align 1, !tbaa !18, !range !22, !noundef !23
  %293 = trunc i8 %292 to i1
  br i1 %293, label %294, label %304

294:                                              ; preds = %286, %278
  store i8 0, ptr %19, align 1, !tbaa !18
  %295 = load ptr, ptr %7, align 8, !tbaa !5
  %296 = load i32, ptr %16, align 4, !tbaa !9
  %297 = sext i32 %296 to i64
  %298 = getelementptr inbounds i8, ptr %295, i64 %297
  store i8 1, ptr %298, align 1, !tbaa !18
  %299 = load ptr, ptr %7, align 8, !tbaa !5
  %300 = load i32, ptr %16, align 4, !tbaa !9
  %301 = add nsw i32 %300, 1
  %302 = sext i32 %301 to i64
  %303 = getelementptr inbounds i8, ptr %299, i64 %302
  store i8 1, ptr %303, align 1, !tbaa !18
  br label %330

304:                                              ; preds = %286
  store i8 1, ptr %19, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #7
  %305 = load i32, ptr %17, align 4, !tbaa !9
  %306 = add nsw i32 %305, 2
  store i32 %306, ptr %27, align 4, !tbaa !9
  br label %307

307:                                              ; preds = %317, %304
  %308 = load i32, ptr %27, align 4, !tbaa !9
  %309 = load i32, ptr %4, align 4, !tbaa !9
  %310 = icmp ult i32 %308, %309
  br i1 %310, label %312, label %311

311:                                              ; preds = %307
  store i32 23, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #7
  br label %320

312:                                              ; preds = %307
  %313 = load ptr, ptr %6, align 8, !tbaa !5
  %314 = load i32, ptr %27, align 4, !tbaa !9
  %315 = sext i32 %314 to i64
  %316 = getelementptr inbounds i8, ptr %313, i64 %315
  store i8 0, ptr %316, align 1, !tbaa !18
  br label %317

317:                                              ; preds = %312
  %318 = load i32, ptr %27, align 4, !tbaa !9
  %319 = add nsw i32 %318, 1
  store i32 %319, ptr %27, align 4, !tbaa !9
  br label %307, !llvm.loop !30

320:                                              ; preds = %311
  %321 = load ptr, ptr %7, align 8, !tbaa !5
  %322 = load i32, ptr %16, align 4, !tbaa !9
  %323 = sext i32 %322 to i64
  %324 = getelementptr inbounds i8, ptr %321, i64 %323
  store i8 1, ptr %324, align 1, !tbaa !18
  %325 = load ptr, ptr %7, align 8, !tbaa !5
  %326 = load i32, ptr %16, align 4, !tbaa !9
  %327 = add nsw i32 %326, 1
  %328 = sext i32 %327 to i64
  %329 = getelementptr inbounds i8, ptr %325, i64 %328
  store i8 0, ptr %329, align 1, !tbaa !18
  br label %330

330:                                              ; preds = %320, %294
  br label %383

331:                                              ; preds = %275
  %332 = load ptr, ptr %6, align 8, !tbaa !5
  %333 = load i32, ptr %21, align 4, !tbaa !9
  %334 = sub nsw i32 %333, 2
  %335 = sext i32 %334 to i64
  %336 = getelementptr inbounds i8, ptr %332, i64 %335
  %337 = load i8, ptr %336, align 1, !tbaa !18, !range !22, !noundef !23
  %338 = trunc i8 %337 to i1
  br i1 %338, label %347, label %339

339:                                              ; preds = %331
  %340 = load ptr, ptr %6, align 8, !tbaa !5
  %341 = load i32, ptr %21, align 4, !tbaa !9
  %342 = sub nsw i32 %341, 3
  %343 = sext i32 %342 to i64
  %344 = getelementptr inbounds i8, ptr %340, i64 %343
  %345 = load i8, ptr %344, align 1, !tbaa !18, !range !22, !noundef !23
  %346 = trunc i8 %345 to i1
  br i1 %346, label %347, label %357

347:                                              ; preds = %339, %331
  store i8 0, ptr %19, align 1, !tbaa !18
  %348 = load ptr, ptr %7, align 8, !tbaa !5
  %349 = load i32, ptr %16, align 4, !tbaa !9
  %350 = sext i32 %349 to i64
  %351 = getelementptr inbounds i8, ptr %348, i64 %350
  store i8 1, ptr %351, align 1, !tbaa !18
  %352 = load ptr, ptr %7, align 8, !tbaa !5
  %353 = load i32, ptr %16, align 4, !tbaa !9
  %354 = add nsw i32 %353, 1
  %355 = sext i32 %354 to i64
  %356 = getelementptr inbounds i8, ptr %352, i64 %355
  store i8 1, ptr %356, align 1, !tbaa !18
  br label %382

357:                                              ; preds = %339
  store i8 1, ptr %19, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #7
  store i32 0, ptr %28, align 4, !tbaa !9
  br label %358

358:                                              ; preds = %369, %357
  %359 = load i32, ptr %28, align 4, !tbaa !9
  %360 = load i32, ptr %17, align 4, !tbaa !9
  %361 = add nsw i32 %360, 1
  %362 = icmp sle i32 %359, %361
  br i1 %362, label %364, label %363

363:                                              ; preds = %358
  store i32 26, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #7
  br label %372

364:                                              ; preds = %358
  %365 = load ptr, ptr %6, align 8, !tbaa !5
  %366 = load i32, ptr %28, align 4, !tbaa !9
  %367 = sext i32 %366 to i64
  %368 = getelementptr inbounds i8, ptr %365, i64 %367
  store i8 0, ptr %368, align 1, !tbaa !18
  br label %369

369:                                              ; preds = %364
  %370 = load i32, ptr %28, align 4, !tbaa !9
  %371 = add nsw i32 %370, 1
  store i32 %371, ptr %28, align 4, !tbaa !9
  br label %358, !llvm.loop !31

372:                                              ; preds = %363
  %373 = load ptr, ptr %7, align 8, !tbaa !5
  %374 = load i32, ptr %16, align 4, !tbaa !9
  %375 = add nsw i32 %374, 1
  %376 = sext i32 %375 to i64
  %377 = getelementptr inbounds i8, ptr %373, i64 %376
  store i8 1, ptr %377, align 1, !tbaa !18
  %378 = load ptr, ptr %7, align 8, !tbaa !5
  %379 = load i32, ptr %16, align 4, !tbaa !9
  %380 = sext i32 %379 to i64
  %381 = getelementptr inbounds i8, ptr %378, i64 %380
  store i8 0, ptr %381, align 1, !tbaa !18
  br label %382

382:                                              ; preds = %372, %347
  br label %383

383:                                              ; preds = %382, %330
  br label %384

384:                                              ; preds = %383, %268
  %385 = load i8, ptr %19, align 1, !tbaa !18, !range !22, !noundef !23
  %386 = trunc i8 %385 to i1
  br i1 %386, label %387, label %415

387:                                              ; preds = %384
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #7
  %388 = load i32, ptr %8, align 4, !tbaa !28
  %389 = icmp eq i32 %388, 0
  br i1 %389, label %390, label %394

390:                                              ; preds = %387
  %391 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %391, ptr %29, align 4, !tbaa !9
  %392 = load i32, ptr %16, align 4, !tbaa !9
  %393 = add nsw i32 %392, 1
  store i32 %393, ptr %30, align 4, !tbaa !9
  br label %398

394:                                              ; preds = %387
  %395 = load i32, ptr %16, align 4, !tbaa !9
  %396 = add nsw i32 %395, 1
  store i32 %396, ptr %29, align 4, !tbaa !9
  %397 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %397, ptr %30, align 4, !tbaa !9
  br label %398

398:                                              ; preds = %394, %390
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %31, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %29)
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %32, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %30)
  %399 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %400 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %399, ptr noundef nonnull align 4 dereferenceable(8) %31)
  store i32 0, ptr %400, align 4, !tbaa !32
  %401 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %402 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %401, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 1, ptr %402, align 4, !tbaa !32
  %403 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %404 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %403, ptr noundef nonnull align 4 dereferenceable(8) %31)
  store i32 1, ptr %404, align 4, !tbaa !24
  %405 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %406 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %405, ptr noundef nonnull align 4 dereferenceable(8) %32)
  %407 = icmp ugt i64 %406, 0
  br i1 %407, label %408, label %411

408:                                              ; preds = %398
  %409 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %410 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %409, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 2, ptr %410, align 4, !tbaa !24
  br label %414

411:                                              ; preds = %398
  %412 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %413 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %412, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 0, ptr %413, align 4, !tbaa !24
  br label %414

414:                                              ; preds = %411, %408
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #7
  br label %478

415:                                              ; preds = %384
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %33, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16)
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #7
  %416 = load i32, ptr %16, align 4, !tbaa !9
  %417 = add nsw i32 %416, 1
  store i32 %417, ptr %35, align 4, !tbaa !9
  call void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %34, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %35)
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #7
  %418 = load i32, ptr %20, align 4, !tbaa !9
  %419 = icmp sgt i32 %418, 0
  br i1 %419, label %420, label %447

420:                                              ; preds = %415
  %421 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %422 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %421, ptr noundef nonnull align 4 dereferenceable(8) %33)
  %423 = icmp ugt i64 %422, 0
  br i1 %423, label %424, label %443

424:                                              ; preds = %420
  %425 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %426 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %425, ptr noundef nonnull align 4 dereferenceable(8) %33)
  %427 = icmp ugt i64 %426, 0
  br i1 %427, label %428, label %439

428:                                              ; preds = %424
  %429 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %430 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %429, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 2, ptr %430, align 4, !tbaa !24
  %431 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %432 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %431, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %433 = load i32, ptr %432, align 4, !tbaa !32
  %434 = icmp eq i32 %433, 1
  br i1 %434, label %435, label %436

435:                                              ; preds = %428
  br label %438

436:                                              ; preds = %428
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 371, ptr noundef @__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj) #9
  unreachable

437:                                              ; No predecessors!
  br label %438

438:                                              ; preds = %437, %435
  br label %442

439:                                              ; preds = %424
  %440 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %441 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %440, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 3, ptr %441, align 4, !tbaa !24
  br label %442

442:                                              ; preds = %439, %438
  br label %446

443:                                              ; preds = %420
  %444 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %445 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %444, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 0, ptr %445, align 4, !tbaa !24
  br label %446

446:                                              ; preds = %443, %442
  br label %447

447:                                              ; preds = %446, %415
  %448 = load i32, ptr %24, align 4, !tbaa !9
  %449 = icmp sgt i32 %448, 0
  br i1 %449, label %450, label %477

450:                                              ; preds = %447
  %451 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %452 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %451, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %453 = icmp ugt i64 %452, 0
  br i1 %453, label %454, label %473

454:                                              ; preds = %450
  %455 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %456 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %455, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %457 = icmp ugt i64 %456, 0
  br i1 %457, label %458, label %469

458:                                              ; preds = %454
  %459 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %460 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %459, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %461 = load i32, ptr %460, align 4, !tbaa !32
  %462 = icmp eq i32 %461, 1
  br i1 %462, label %463, label %464

463:                                              ; preds = %458
  br label %466

464:                                              ; preds = %458
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 386, ptr noundef @__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj) #9
  unreachable

465:                                              ; No predecessors!
  br label %466

466:                                              ; preds = %465, %463
  %467 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %468 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %467, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 2, ptr %468, align 4, !tbaa !24
  br label %472

469:                                              ; preds = %454
  %470 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %471 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %470, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 3, ptr %471, align 4, !tbaa !24
  br label %472

472:                                              ; preds = %469, %466
  br label %476

473:                                              ; preds = %450
  %474 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %475 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %474, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 0, ptr %475, align 4, !tbaa !24
  br label %476

476:                                              ; preds = %473, %472
  br label %477

477:                                              ; preds = %476, %447
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #7
  br label %478

478:                                              ; preds = %477, %414
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr %19) #7
  br label %479

479:                                              ; preds = %478, %163
  br label %480

480:                                              ; preds = %479, %162
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  br label %481

481:                                              ; preds = %480
  %482 = load i32, ptr %16, align 4, !tbaa !9
  %483 = add nsw i32 %482, 1
  store i32 %483, ptr %16, align 4, !tbaa !9
  br label %112, !llvm.loop !34

484:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #7
  store i32 0, ptr %36, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #7
  store i32 0, ptr %38, align 4, !tbaa !9
  br label %485

485:                                              ; preds = %519, %484
  %486 = load i32, ptr %38, align 4, !tbaa !9
  %487 = load i32, ptr %4, align 4, !tbaa !9
  %488 = icmp ult i32 %486, %487
  br i1 %488, label %490, label %489

489:                                              ; preds = %485
  store i32 29, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #7
  br label %522

490:                                              ; preds = %485
  %491 = load ptr, ptr %7, align 8, !tbaa !5
  %492 = load i32, ptr %38, align 4, !tbaa !9
  %493 = sext i32 %492 to i64
  %494 = getelementptr inbounds i8, ptr %491, i64 %493
  %495 = load i8, ptr %494, align 1, !tbaa !18, !range !22, !noundef !23
  %496 = trunc i8 %495 to i1
  %497 = zext i1 %496 to i32
  %498 = icmp eq i32 %497, 1
  br i1 %498, label %499, label %503

499:                                              ; preds = %490
  %500 = load i32, ptr %36, align 4, !tbaa !9
  %501 = add i32 %500, 1
  store i32 %501, ptr %36, align 4, !tbaa !9
  %502 = load i32, ptr %38, align 4, !tbaa !9
  store i32 %502, ptr %37, align 4, !tbaa !9
  br label %503

503:                                              ; preds = %499, %490
  %504 = load ptr, ptr %7, align 8, !tbaa !5
  %505 = load i32, ptr %38, align 4, !tbaa !9
  %506 = sext i32 %505 to i64
  %507 = getelementptr inbounds i8, ptr %504, i64 %506
  %508 = load i8, ptr %507, align 1, !tbaa !18, !range !22, !noundef !23
  %509 = trunc i8 %508 to i1
  %510 = load ptr, ptr %6, align 8, !tbaa !5
  %511 = load i32, ptr %38, align 4, !tbaa !9
  %512 = sext i32 %511 to i64
  %513 = getelementptr inbounds i8, ptr %510, i64 %512
  %514 = zext i1 %509 to i8
  store i8 %514, ptr %513, align 1, !tbaa !18
  %515 = load ptr, ptr %7, align 8, !tbaa !5
  %516 = load i32, ptr %38, align 4, !tbaa !9
  %517 = sext i32 %516 to i64
  %518 = getelementptr inbounds i8, ptr %515, i64 %517
  store i8 0, ptr %518, align 1, !tbaa !18
  br label %519

519:                                              ; preds = %503
  %520 = load i32, ptr %38, align 4, !tbaa !9
  %521 = add nsw i32 %520, 1
  store i32 %521, ptr %38, align 4, !tbaa !9
  br label %485, !llvm.loop !35

522:                                              ; preds = %489
  %523 = load i32, ptr %36, align 4, !tbaa !9
  %524 = icmp eq i32 %523, 1
  br i1 %524, label %525, label %528

525:                                              ; preds = %522
  call void @llvm.lifetime.start.p0(i64 8, ptr %39) #7
  call void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8) %39, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %37)
  %526 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 4
  %527 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %526, ptr noundef nonnull align 4 dereferenceable(8) %39)
  store i8 1, ptr %527, align 1, !tbaa !18
  call void @llvm.lifetime.end.p0(i64 8, ptr %39) #7
  br label %528

528:                                              ; preds = %525, %522
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #7
  br label %529

529:                                              ; preds = %528
  %530 = load i32, ptr %15, align 4, !tbaa !9
  %531 = add nsw i32 %530, -1
  store i32 %531, ptr %15, align 4, !tbaa !9
  br label %105, !llvm.loop !36

532:                                              ; preds = %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %533

533:                                              ; preds = %532
  %534 = load i32, ptr %9, align 4, !tbaa !9
  %535 = add nsw i32 %534, 1
  store i32 %535, ptr %9, align 4, !tbaa !9
  br label %52, !llvm.loop !37

536:                                              ; preds = %58
  %537 = load ptr, ptr %6, align 8, !tbaa !5
  %538 = icmp eq ptr %537, null
  br i1 %538, label %540, label %539

539:                                              ; preds = %536
  call void @_ZdaPv(ptr noundef %537) #10
  br label %540

540:                                              ; preds = %539, %536
  %541 = load ptr, ptr %7, align 8, !tbaa !5
  %542 = icmp eq ptr %541, null
  br i1 %542, label %544, label %543

543:                                              ; preds = %540
  call void @_ZdaPv(ptr noundef %541) #10
  br label %544

544:                                              ; preds = %543, %540
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #6

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { noreturn nounwind }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTS17CompilerComponent", !6, i64 8, !13, i64 16, !6, i64 40, !10, i64 48, !17, i64 52, !10, i64 56}
!13 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"bool", !7, i64 0}
!18 = !{!17, !17, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!25, !25, i64 0}
!25 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!26 = distinct !{!26, !20}
!27 = distinct !{!27, !20}
!28 = !{!29, !29, i64 0}
!29 = !{!"_ZTS11direction_t", !7, i64 0}
!30 = distinct !{!30, !20}
!31 = distinct !{!31, !20}
!32 = !{!33, !33, i64 0}
!33 = !{!"_ZTS4fl_t", !7, i64 0}
!34 = distinct !{!34, !20}
!35 = distinct !{!35, !20}
!36 = distinct !{!36, !20}
!37 = distinct !{!37, !20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair.46" = type { i32, i32 }

@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj = external hidden unnamed_addr constant [53 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CompilerART20generate_art_signalsEj(ptr noundef nonnull align 8 dereferenceable(256) %0, i32 noundef %1) local_unnamed_addr #3 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %"struct.std::pair.46", align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"struct.std::pair.46", align 4
  %9 = alloca %"struct.std::pair.46", align 4
  %10 = alloca %"struct.std::pair.46", align 4
  %11 = alloca %"struct.std::pair.46", align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"struct.std::pair.46", align 4
  %15 = tail call noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %1)
  %16 = tail call noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef 2)
  %17 = zext i32 %1 to i64
  %18 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %17) #9
  %19 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %17) #9
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load ptr, ptr %20, align 8, !tbaa !5
  %22 = tail call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %21)
  %.not = icmp eq i32 %22, 0
  br i1 %.not, label %._crit_edge209, label %.preheader156.lr.ph

.preheader156.lr.ph:                              ; preds = %2
  %23 = fdiv double %15, %16
  %24 = fptosi double %23 to i32
  %.fr222 = freeze i32 %24
  %.not220 = icmp eq i32 %1, 0
  %storemerge200 = add nsw i32 %.fr222, -1
  %25 = icmp sgt i32 %.fr222, 0
  %26 = getelementptr inbounds i8, ptr %0, i64 112
  %27 = getelementptr inbounds i8, ptr %0, i64 64
  %28 = getelementptr inbounds i8, ptr %0, i64 208
  br i1 %25, label %.preheader156.us.preheader, label %.preheader156.lr.ph.split

.preheader156.us.preheader:                       ; preds = %.preheader156.lr.ph
  %29 = add i32 %1, -3
  %min.iters.check = icmp ult i32 %1, 8
  %n.vec = and i64 %17, 4294967288
  %cmp.n = icmp eq i64 %n.vec, %17
  br label %.preheader156.us

.preheader156.us:                                 ; preds = %.preheader156.us.preheader, %._crit_edge205.us
  %.0123207.us = phi i32 [ %228, %._crit_edge205.us ], [ 0, %.preheader156.us.preheader ]
  br i1 %.not220, label %._crit_edge.us, label %.lr.ph.us.preheader

.lr.ph.us.preheader:                              ; preds = %.preheader156.us
  call void @llvm.memset.p0.i64(ptr nonnull align 1 %18, i8 0, i64 %17, i1 false), !tbaa !16
  call void @llvm.memset.p0.i64(ptr nonnull align 1 %19, i8 0, i64 %17, i1 false), !tbaa !16
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %.lr.ph.us.preheader, %.preheader156.us
  %30 = load ptr, ptr %20, align 8, !tbaa !5
  %31 = call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %30)
  %32 = mul i32 %31, %.0123207.us
  %33 = load ptr, ptr %20, align 8, !tbaa !5
  %34 = call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %33)
  %35 = add i32 %34, %32
  %36 = icmp ult i32 %32, %35
  br i1 %36, label %.lr.ph164.us.preheader, label %.lr.ph204.us

.lr.ph164.us.preheader:                           ; preds = %._crit_edge.us
  %37 = sext i32 %32 to i64
  br label %.lr.ph164.us

.lr.ph204.us:                                     ; preds = %.lr.ph164.us, %._crit_edge.us
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #10
  store i32 %storemerge200, ptr %3, align 4, !tbaa !17
  br label %38

38:                                               ; preds = %.lr.ph204.us, %._crit_edge198.us.thread
  %.0124201.us = phi i32 [ %1, %.lr.ph204.us ], [ %39, %._crit_edge198.us.thread ]
  %39 = sdiv i32 %.0124201.us, 2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #10
  store i32 0, ptr %4, align 4, !tbaa !17
  %40 = icmp sgt i32 %.0124201.us, 1
  br i1 %40, label %.lr.ph191.us, label %._crit_edge192.us

._crit_edge192.us:                                ; preds = %212, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %13) #10
  br i1 %.not220, label %._crit_edge198.us.thread, label %.lr.ph197.us.preheader

.lr.ph197.us.preheader:                           ; preds = %._crit_edge192.us
  br i1 %min.iters.check, label %.lr.ph197.us.preheader304, label %vector.body

.lr.ph197.us.preheader304:                        ; preds = %middle.block, %.lr.ph197.us.preheader
  %indvars.iv249.ph = phi i64 [ 0, %.lr.ph197.us.preheader ], [ %n.vec, %middle.block ]
  %.0111194.us.ph = phi i32 [ 0, %.lr.ph197.us.preheader ], [ %70, %middle.block ]
  br label %.lr.ph197.us

vector.body:                                      ; preds = %.lr.ph197.us.preheader, %63
  %index = phi i64 [ %index.next, %63 ], [ 0, %.lr.ph197.us.preheader ]
  %vec.phi = phi <4 x i32> [ %predphi, %63 ], [ zeroinitializer, %.lr.ph197.us.preheader ]
  %vec.phi269 = phi <4 x i32> [ %predphi285, %63 ], [ zeroinitializer, %.lr.ph197.us.preheader ]
  %41 = getelementptr inbounds i8, ptr %19, i64 %index
  %42 = getelementptr inbounds i8, ptr %41, i64 4
  %wide.load = load <4 x i8>, ptr %41, align 1, !tbaa !16
  %wide.load270 = load <4 x i8>, ptr %42, align 1, !tbaa !16
  %43 = trunc <4 x i8> %wide.load to <4 x i1>
  %44 = trunc <4 x i8> %wide.load270 to <4 x i1>
  %45 = extractelement <4 x i1> %43, i64 0
  %46 = extractelement <4 x i1> %43, i64 1
  %47 = or i1 %45, %46
  %48 = extractelement <4 x i1> %43, i64 2
  %49 = or i1 %47, %48
  %50 = extractelement <4 x i1> %43, i64 3
  %51 = or i1 %49, %50
  %52 = extractelement <4 x i1> %44, i64 0
  %53 = or i1 %51, %52
  %54 = extractelement <4 x i1> %44, i64 1
  %55 = or i1 %53, %54
  %56 = extractelement <4 x i1> %44, i64 2
  %57 = or i1 %55, %56
  %58 = extractelement <4 x i1> %44, i64 3
  %59 = or i1 %57, %58
  br i1 %59, label %60, label %63

60:                                               ; preds = %vector.body
  %61 = trunc i64 %index to i32
  %62 = zext i1 %46 to i32
  %spec.select287.v = select i1 %48, i32 2, i32 %62
  %spec.select288.v = select i1 %50, i32 3, i32 %spec.select287.v
  %spec.select289.v = select i1 %52, i32 4, i32 %spec.select288.v
  %spec.select290.v = select i1 %54, i32 5, i32 %spec.select289.v
  %spec.select291.v = select i1 %56, i32 6, i32 %spec.select290.v
  %spec.select292.v = select i1 %58, i32 7, i32 %spec.select291.v
  %spec.select292 = or disjoint i32 %spec.select292.v, %61
  store i32 %spec.select292, ptr %13, align 4, !tbaa !17
  br label %63

63:                                               ; preds = %vector.body, %60
  %.mask = and <4 x i8> %wide.load, <i8 1, i8 1, i8 1, i8 1>
  %64 = zext nneg <4 x i8> %.mask to <4 x i32>
  %predphi = add <4 x i32> %vec.phi, %64
  %.mask286 = and <4 x i8> %wide.load270, <i8 1, i8 1, i8 1, i8 1>
  %65 = zext nneg <4 x i8> %.mask286 to <4 x i32>
  %predphi285 = add <4 x i32> %vec.phi269, %65
  %66 = getelementptr inbounds i8, ptr %18, i64 %index
  %67 = getelementptr inbounds i8, ptr %66, i64 4
  store <4 x i8> %wide.load, ptr %66, align 1, !tbaa !16
  store <4 x i8> %wide.load270, ptr %67, align 1, !tbaa !16
  %68 = getelementptr inbounds i8, ptr %41, i64 4
  store <4 x i8> zeroinitializer, ptr %41, align 1, !tbaa !16
  store <4 x i8> zeroinitializer, ptr %68, align 1, !tbaa !16
  %index.next = add nuw i64 %index, 8
  %69 = icmp eq i64 %index.next, %n.vec
  br i1 %69, label %middle.block, label %vector.body, !llvm.loop !18

middle.block:                                     ; preds = %63
  %bin.rdx = add <4 x i32> %predphi285, %predphi
  %70 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge198.us, label %.lr.ph197.us.preheader304

._crit_edge198.us:                                ; preds = %82, %middle.block
  %.1.us.lcssa = phi i32 [ %70, %middle.block ], [ %.1.us, %82 ]
  %71 = icmp eq i32 %.1.us.lcssa, 1
  br i1 %71, label %72, label %._crit_edge198.us.thread

72:                                               ; preds = %._crit_edge198.us
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %14) #10
  call void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8) %14, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %73 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %28, ptr noundef nonnull align 4 dereferenceable(8) %14)
  store i8 1, ptr %73, align 1, !tbaa !16
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %14) #10
  br label %._crit_edge198.us.thread

._crit_edge198.us.thread:                         ; preds = %._crit_edge192.us, %72, %._crit_edge198.us
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %13) #10
  %74 = load i32, ptr %3, align 4, !tbaa !17
  %storemerge.us = add nsw i32 %74, -1
  store i32 %storemerge.us, ptr %3, align 4, !tbaa !17
  %75 = icmp sgt i32 %74, 0
  br i1 %75, label %38, label %._crit_edge205.us, !llvm.loop !22

.lr.ph197.us:                                     ; preds = %.lr.ph197.us.preheader304, %82
  %indvars.iv249 = phi i64 [ %indvars.iv.next250, %82 ], [ %indvars.iv249.ph, %.lr.ph197.us.preheader304 ]
  %.0111194.us = phi i32 [ %.1.us, %82 ], [ %.0111194.us.ph, %.lr.ph197.us.preheader304 ]
  %76 = getelementptr inbounds i8, ptr %19, i64 %indvars.iv249
  %77 = load i8, ptr %76, align 1, !tbaa !16, !range !23, !noundef !24
  %78 = trunc nuw i8 %77 to i1
  br i1 %78, label %79, label %82

79:                                               ; preds = %.lr.ph197.us
  %80 = add i32 %.0111194.us, 1
  %81 = trunc nuw nsw i64 %indvars.iv249 to i32
  store i32 %81, ptr %13, align 4, !tbaa !17
  br label %82

82:                                               ; preds = %79, %.lr.ph197.us
  %.1.us = phi i32 [ %80, %79 ], [ %.0111194.us, %.lr.ph197.us ]
  %83 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv249
  store i8 %77, ptr %83, align 1, !tbaa !16
  store i8 0, ptr %76, align 1, !tbaa !16
  %indvars.iv.next250 = add nuw nsw i64 %indvars.iv249, 1
  %exitcond252.not = icmp eq i64 %indvars.iv.next250, %17
  br i1 %exitcond252.not, label %._crit_edge198.us, label %.lr.ph197.us, !llvm.loop !25

84:                                               ; preds = %.lr.ph191.us, %212
  %storemerge131188.us = phi i32 [ 0, %.lr.ph191.us ], [ %214, %212 ]
  %85 = shl i32 %storemerge131188.us, 1
  %86 = icmp eq i32 %storemerge131188.us, 0
  %87 = icmp eq i32 %storemerge131188.us, %227
  %or.cond146.us = select i1 %86, i1 true, i1 %87
  br i1 %or.cond146.us, label %193, label %88

88:                                               ; preds = %84
  %89 = and i32 %storemerge131188.us, 1
  %.not.us = icmp eq i32 %89, 0
  br i1 %.not.us, label %212, label %90

90:                                               ; preds = %88
  %91 = or disjoint i32 %85, 1
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds i8, ptr %18, i64 %92
  %94 = load i8, ptr %93, align 1, !tbaa !16, !range !23, !noundef !24
  %95 = trunc nuw i8 %94 to i1
  %spec.select.us = select i1 %95, i32 %91, i32 %85
  %96 = icmp sgt i32 %spec.select.us, -1
  br i1 %96, label %.lr.ph169.us.preheader, label %._crit_edge170.us

.lr.ph169.us.preheader:                           ; preds = %90
  %97 = zext nneg i32 %spec.select.us to i64
  %98 = add nuw i32 %spec.select.us, 1
  br label %.lr.ph169.us

.lr.ph169.us:                                     ; preds = %.lr.ph169.us.preheader, %191
  %indvars.iv236 = phi i64 [ %97, %.lr.ph169.us.preheader ], [ %indvars.iv.next237, %191 ]
  %.0121166.us = phi i32 [ 0, %.lr.ph169.us.preheader ], [ %192, %191 ]
  %99 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv236
  %100 = load i8, ptr %99, align 1, !tbaa !16, !range !23, !noundef !24
  %101 = trunc nuw i8 %100 to i1
  br i1 %101, label %191, label %._crit_edge170.us

._crit_edge170.us:                                ; preds = %191, %.lr.ph169.us, %90
  %.0121.lcssa.us = phi i32 [ 0, %90 ], [ %.0121166.us, %.lr.ph169.us ], [ %98, %191 ]
  %102 = add nsw i32 %85, 2
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds i8, ptr %18, i64 %103
  %105 = load i8, ptr %104, align 1, !tbaa !16, !range !23, !noundef !24
  %106 = trunc nuw i8 %105 to i1
  %107 = add nsw i32 %85, 3
  %spec.select147.us = select i1 %106, i32 %102, i32 %107
  %108 = icmp ult i32 %spec.select147.us, %1
  br i1 %108, label %.lr.ph176.us.preheader, label %._crit_edge177.us.thread

._crit_edge177.us.thread:                         ; preds = %._crit_edge170.us
  %109 = icmp eq i32 %.0121.lcssa.us, 0
  %110 = sext i32 %storemerge131188.us to i64
  %111 = getelementptr inbounds i8, ptr %19, i64 %110
  store i8 0, ptr %111, align 1, !tbaa !16
  %112 = getelementptr i8, ptr %111, i64 1
  store i8 0, ptr %112, align 1, !tbaa !16
  br i1 %109, label %.thread, label %.thread.sink.split

.lr.ph176.us.preheader:                           ; preds = %._crit_edge170.us
  %113 = sext i32 %spec.select147.us to i64
  %114 = sub i32 %1, %spec.select147.us
  br label %.lr.ph176.us

.lr.ph176.us:                                     ; preds = %.lr.ph176.us.preheader, %189
  %indvars.iv239 = phi i64 [ %113, %.lr.ph176.us.preheader ], [ %indvars.iv.next240, %189 ]
  %.0116173.us = phi i32 [ 0, %.lr.ph176.us.preheader ], [ %190, %189 ]
  %115 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv239
  %116 = load i8, ptr %115, align 1, !tbaa !16, !range !23, !noundef !24
  %117 = trunc nuw i8 %116 to i1
  br i1 %117, label %189, label %._crit_edge177.us

._crit_edge177.us:                                ; preds = %189, %.lr.ph176.us
  %.0116.lcssa.us = phi i32 [ %114, %189 ], [ %.0116173.us, %.lr.ph176.us ]
  %118 = icmp eq i32 %.0121.lcssa.us, 0
  %119 = icmp eq i32 %.0116.lcssa.us, 0
  %or.cond.us = or i1 %118, %119
  br i1 %or.cond.us, label %153, label %120

120:                                              ; preds = %._crit_edge177.us
  %.not132.not.us = icmp ult i32 %.0121.lcssa.us, %.0116.lcssa.us
  %121 = sext i32 %85 to i64
  %122 = getelementptr i8, ptr %18, i64 %121
  br i1 %.not132.not.us, label %135, label %123

123:                                              ; preds = %120
  %124 = getelementptr i8, ptr %122, i64 4
  %125 = load i8, ptr %124, align 1, !tbaa !16, !range !23, !noundef !24
  %126 = trunc nuw i8 %125 to i1
  br i1 %126, label %.thread.sink.split.sink.split, label %127

127:                                              ; preds = %123
  %128 = getelementptr i8, ptr %122, i64 5
  %129 = load i8, ptr %128, align 1, !tbaa !16, !range !23, !noundef !24
  %130 = trunc nuw i8 %129 to i1
  br i1 %130, label %.thread.sink.split.sink.split, label %.preheader155.us

._crit_edge183.us:                                ; preds = %.lr.ph182.us.preheader, %.preheader155.us
  %131 = sext i32 %storemerge131188.us to i64
  %132 = getelementptr inbounds i8, ptr %19, i64 %131
  store i8 1, ptr %132, align 1, !tbaa !16
  %133 = getelementptr i8, ptr %132, i64 1
  store i8 0, ptr %133, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #10
  store i32 %storemerge131188.us, ptr %6, align 4, !tbaa !17
  %134 = add nsw i32 %storemerge131188.us, 1
  br label %147

135:                                              ; preds = %120
  %136 = getelementptr i8, ptr %122, i64 -1
  %137 = load i8, ptr %136, align 1, !tbaa !16, !range !23, !noundef !24
  %138 = trunc nuw i8 %137 to i1
  br i1 %138, label %.thread.sink.split.sink.split, label %139

139:                                              ; preds = %135
  %140 = getelementptr i8, ptr %122, i64 -2
  %141 = load i8, ptr %140, align 1, !tbaa !16, !range !23, !noundef !24
  %142 = trunc nuw i8 %141 to i1
  br i1 %142, label %.thread.sink.split.sink.split, label %.preheader.us

._crit_edge187.us:                                ; preds = %.lr.ph186.us.preheader, %.preheader.us
  %143 = sext i32 %storemerge131188.us to i64
  %144 = getelementptr i8, ptr %19, i64 %143
  %145 = getelementptr i8, ptr %144, i64 1
  store i8 1, ptr %145, align 1, !tbaa !16
  store i8 0, ptr %144, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #10
  %146 = add nsw i32 %storemerge131188.us, 1
  store i32 %146, ptr %6, align 4, !tbaa !17
  br label %147

147:                                              ; preds = %._crit_edge187.us, %._crit_edge183.us
  %storemerge142.us = phi i32 [ %storemerge131188.us, %._crit_edge187.us ], [ %134, %._crit_edge183.us ]
  store i32 %storemerge142.us, ptr %7, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %9, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %148 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %8)
  store i32 0, ptr %148, align 4, !tbaa !26
  %149 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %9)
  store i32 1, ptr %149, align 4, !tbaa !26
  %150 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %8)
  store i32 1, ptr %150, align 4, !tbaa !28
  %151 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %9)
  %.not143.us = icmp eq i64 %151, 0
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %9)
  %. = select i1 %.not143.us, i32 0, i32 2
  store i32 %., ptr %152, align 4, !tbaa !28
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #10
  br label %212

153:                                              ; preds = %._crit_edge177.us
  %154 = sext i32 %storemerge131188.us to i64
  %155 = getelementptr inbounds i8, ptr %19, i64 %154
  store i8 0, ptr %155, align 1, !tbaa !16
  %156 = getelementptr i8, ptr %155, i64 1
  store i8 0, ptr %156, align 1, !tbaa !16
  br i1 %118, label %158, label %157

157:                                              ; preds = %153
  store i8 1, ptr %155, align 1, !tbaa !16
  br i1 %119, label %.thread, label %.thread.sink.split

158:                                              ; preds = %153
  br i1 %119, label %.thread, label %.thread.sink.split

.thread.sink.split.sink.split:                    ; preds = %135, %139, %123, %127
  %159 = sext i32 %storemerge131188.us to i64
  %160 = getelementptr inbounds i8, ptr %19, i64 %159
  store i8 1, ptr %160, align 1, !tbaa !16
  %161 = getelementptr i8, ptr %160, i64 1
  br label %.thread.sink.split

.thread.sink.split:                               ; preds = %.thread.sink.split.sink.split, %158, %157, %._crit_edge177.us.thread
  %.sink260 = phi ptr [ %111, %._crit_edge177.us.thread ], [ %156, %157 ], [ %156, %158 ], [ %161, %.thread.sink.split.sink.split ]
  %.ph = phi i1 [ true, %._crit_edge177.us.thread ], [ false, %157 ], [ false, %158 ], [ %119, %.thread.sink.split.sink.split ]
  %.ph259 = phi i1 [ false, %._crit_edge177.us.thread ], [ false, %157 ], [ true, %158 ], [ %118, %.thread.sink.split.sink.split ]
  store i8 1, ptr %.sink260, align 1, !tbaa !16
  br label %.thread

.thread:                                          ; preds = %.thread.sink.split, %._crit_edge177.us.thread, %157, %158
  %162 = phi i1 [ true, %158 ], [ true, %157 ], [ true, %._crit_edge177.us.thread ], [ %.ph, %.thread.sink.split ]
  %163 = phi i1 [ true, %158 ], [ false, %157 ], [ true, %._crit_edge177.us.thread ], [ %.ph259, %.thread.sink.split ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %10, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #10
  %164 = load i32, ptr %4, align 4, !tbaa !17
  %165 = add nsw i32 %164, 1
  store i32 %165, ptr %12, align 4, !tbaa !17
  call void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %11, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %12)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #10
  br i1 %163, label %178, label %166

166:                                              ; preds = %.thread
  %167 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %10)
  %.not137.us = icmp eq i64 %167, 0
  br i1 %.not137.us, label %176, label %168

168:                                              ; preds = %166
  %169 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %10)
  %.not138.us = icmp eq i64 %169, 0
  %170 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %10)
  br i1 %.not138.us, label %175, label %171

171:                                              ; preds = %168
  store i32 2, ptr %170, align 4, !tbaa !28
  %172 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %173 = load i32, ptr %172, align 4, !tbaa !26
  %174 = icmp eq i32 %173, 1
  br i1 %174, label %178, label %.split.us

175:                                              ; preds = %168
  store i32 3, ptr %170, align 4, !tbaa !28
  br label %178

176:                                              ; preds = %166
  %177 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %10)
  store i32 0, ptr %177, align 4, !tbaa !28
  br label %178

178:                                              ; preds = %176, %175, %171, %.thread
  br i1 %162, label %188, label %179

179:                                              ; preds = %178
  %180 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %.not140.us = icmp eq i64 %180, 0
  br i1 %.not140.us, label %.sink.split, label %181

181:                                              ; preds = %179
  %182 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %.not141.us = icmp eq i64 %182, 0
  br i1 %.not141.us, label %.sink.split, label %183

183:                                              ; preds = %181
  %184 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %185 = load i32, ptr %184, align 4, !tbaa !26
  %186 = icmp eq i32 %185, 1
  br i1 %186, label %.sink.split, label %.split211.us

.sink.split:                                      ; preds = %179, %181, %183
  %.sink261 = phi i32 [ 2, %183 ], [ 3, %181 ], [ 0, %179 ]
  %187 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %11)
  store i32 %.sink261, ptr %187, align 4, !tbaa !28
  br label %188

188:                                              ; preds = %.sink.split, %178
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #10
  br label %212

189:                                              ; preds = %.lr.ph176.us
  %190 = add nuw i32 %.0116173.us, 1
  %indvars.iv.next240 = add nuw nsw i64 %indvars.iv239, 1
  %exitcond242.not = icmp eq i32 %190, %114
  br i1 %exitcond242.not, label %._crit_edge177.us, label %.lr.ph176.us, !llvm.loop !30

191:                                              ; preds = %.lr.ph169.us
  %192 = add nuw i32 %.0121166.us, 1
  %indvars.iv.next237 = add nsw i64 %indvars.iv236, -1
  %exitcond.not = icmp eq i32 %.0121166.us, %spec.select.us
  br i1 %exitcond.not, label %._crit_edge170.us, label %.lr.ph169.us, !llvm.loop !31

193:                                              ; preds = %84
  %194 = sext i32 %85 to i64
  %195 = getelementptr inbounds i8, ptr %18, i64 %194
  %196 = load i8, ptr %195, align 1, !tbaa !16, !range !23, !noundef !24
  %197 = trunc nuw i8 %196 to i1
  br i1 %197, label %207, label %198

198:                                              ; preds = %193
  %199 = or disjoint i32 %85, 1
  %200 = sext i32 %199 to i64
  %201 = getelementptr inbounds i8, ptr %18, i64 %200
  %202 = load i8, ptr %201, align 1, !tbaa !16, !range !23, !noundef !24
  %203 = trunc nuw i8 %202 to i1
  br i1 %203, label %207, label %204

204:                                              ; preds = %198
  %205 = sext i32 %storemerge131188.us to i64
  %206 = getelementptr inbounds i8, ptr %19, i64 %205
  store i8 0, ptr %206, align 1, !tbaa !16
  br label %212

207:                                              ; preds = %198, %193
  %208 = sext i32 %storemerge131188.us to i64
  %209 = getelementptr inbounds i8, ptr %19, i64 %208
  store i8 1, ptr %209, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %5, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %210 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.not144.us = icmp eq i64 %210, 0
  %211 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.266 = select i1 %.not144.us, i32 0, i32 3
  store i32 %.266, ptr %211, align 4, !tbaa !28
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #10
  br label %212

212:                                              ; preds = %207, %204, %188, %147, %88
  %213 = load i32, ptr %4, align 4, !tbaa !17
  %214 = add nsw i32 %213, 1
  store i32 %214, ptr %4, align 4, !tbaa !17
  %215 = icmp slt i32 %214, %39
  br i1 %215, label %84, label %._crit_edge192.us, !llvm.loop !32

.lr.ph164.us:                                     ; preds = %.lr.ph164.us.preheader, %.lr.ph164.us
  %indvars.iv233 = phi i64 [ %37, %.lr.ph164.us.preheader ], [ %indvars.iv.next234, %.lr.ph164.us ]
  %216 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv233
  store i8 1, ptr %216, align 1, !tbaa !16
  %indvars.iv.next234 = add nuw nsw i64 %indvars.iv233, 1
  %217 = load ptr, ptr %20, align 8, !tbaa !5
  %218 = call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %217)
  %219 = add i32 %218, %32
  %220 = trunc nsw i64 %indvars.iv.next234 to i32
  %221 = icmp ugt i32 %219, %220
  br i1 %221, label %.lr.ph164.us, label %.lr.ph204.us, !llvm.loop !33

.preheader.us:                                    ; preds = %139
  %.not133184.us = icmp slt i32 %storemerge131188.us, 0
  br i1 %.not133184.us, label %._crit_edge187.us, label %.lr.ph186.us.preheader

.lr.ph186.us.preheader:                           ; preds = %.preheader.us
  %smax = call i32 @llvm.smax.i32(i32 %91, i32 0)
  %narrow = add nuw i32 %smax, 1
  %222 = zext i32 %narrow to i64
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %18, i8 0, i64 %222, i1 false), !tbaa !16
  br label %._crit_edge187.us

.preheader155.us:                                 ; preds = %127
  %223 = icmp ult i32 %102, %1
  br i1 %223, label %.lr.ph182.us.preheader, label %._crit_edge183.us

.lr.ph182.us.preheader:                           ; preds = %.preheader155.us
  %224 = sub i32 %29, %85
  %225 = zext i32 %224 to i64
  %226 = add nuw nsw i64 %225, 1
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %104, i8 0, i64 %226, i1 false), !tbaa !16
  br label %._crit_edge183.us

.lr.ph191.us:                                     ; preds = %38
  %227 = add nsw i32 %39, -1
  br label %84

._crit_edge205.us:                                ; preds = %._crit_edge198.us.thread
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #10
  %228 = add nuw nsw i32 %.0123207.us, 1
  %229 = load ptr, ptr %20, align 8, !tbaa !5
  %230 = call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %229)
  %231 = icmp ult i32 %228, %230
  br i1 %231, label %.preheader156.us, label %._crit_edge209, !llvm.loop !34

.preheader156.lr.ph.split:                        ; preds = %.preheader156.lr.ph
  br i1 %.not220, label %.preheader156, label %.preheader156.us212

.preheader156.us212:                              ; preds = %.preheader156.lr.ph.split, %._crit_edge165.us219
  %.0123207.us213 = phi i32 [ %239, %._crit_edge165.us219 ], [ 0, %.preheader156.lr.ph.split ]
  tail call void @llvm.memset.p0.i64(ptr nonnull align 1 %18, i8 0, i64 %17, i1 false), !tbaa !16
  tail call void @llvm.memset.p0.i64(ptr nonnull align 1 %19, i8 0, i64 %17, i1 false), !tbaa !16
  %232 = load ptr, ptr %20, align 8, !tbaa !5
  %233 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %232)
  %234 = mul i32 %233, %.0123207.us213
  %235 = load ptr, ptr %20, align 8, !tbaa !5
  %236 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %235)
  %237 = add i32 %236, %234
  %238 = icmp ult i32 %234, %237
  br i1 %238, label %.lr.ph164.us218.preheader, label %._crit_edge165.us219

._crit_edge165.us219:                             ; preds = %.lr.ph164.us218, %.preheader156.us212
  %239 = add nuw nsw i32 %.0123207.us213, 1
  %240 = load ptr, ptr %20, align 8, !tbaa !5
  %241 = tail call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %240)
  %242 = icmp ult i32 %239, %241
  br i1 %242, label %.preheader156.us212, label %._crit_edge209, !llvm.loop !34

.lr.ph164.us218:                                  ; preds = %.lr.ph164.us218.preheader, %.lr.ph164.us218
  %indvars.iv = phi i64 [ %249, %.lr.ph164.us218.preheader ], [ %indvars.iv.next, %.lr.ph164.us218 ]
  %243 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv
  store i8 1, ptr %243, align 1, !tbaa !16
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %244 = load ptr, ptr %20, align 8, !tbaa !5
  %245 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %244)
  %246 = add i32 %245, %234
  %247 = trunc nsw i64 %indvars.iv.next to i32
  %248 = icmp ugt i32 %246, %247
  br i1 %248, label %.lr.ph164.us218, label %._crit_edge165.us219, !llvm.loop !33

.lr.ph164.us218.preheader:                        ; preds = %.preheader156.us212
  %249 = sext i32 %234 to i64
  br label %.lr.ph164.us218

.preheader156:                                    ; preds = %.preheader156.lr.ph.split, %._crit_edge165
  %.0123207 = phi i32 [ %258, %._crit_edge165 ], [ 0, %.preheader156.lr.ph.split ]
  %250 = load ptr, ptr %20, align 8, !tbaa !5
  %251 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %250)
  %252 = mul i32 %251, %.0123207
  %253 = load ptr, ptr %20, align 8, !tbaa !5
  %254 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %253)
  %255 = add i32 %254, %252
  %256 = icmp ult i32 %252, %255
  br i1 %256, label %.lr.ph164.preheader, label %._crit_edge165

.lr.ph164.preheader:                              ; preds = %.preheader156
  %257 = sext i32 %252 to i64
  br label %.lr.ph164

._crit_edge165:                                   ; preds = %.lr.ph164, %.preheader156
  %258 = add nuw nsw i32 %.0123207, 1
  %259 = load ptr, ptr %20, align 8, !tbaa !5
  %260 = tail call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %259)
  %261 = icmp ult i32 %258, %260
  br i1 %261, label %.preheader156, label %._crit_edge209, !llvm.loop !34

.lr.ph164:                                        ; preds = %.lr.ph164.preheader, %.lr.ph164
  %indvars.iv227 = phi i64 [ %257, %.lr.ph164.preheader ], [ %indvars.iv.next228, %.lr.ph164 ]
  %262 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv227
  store i8 1, ptr %262, align 1, !tbaa !16
  %indvars.iv.next228 = add nuw nsw i64 %indvars.iv227, 1
  %263 = load ptr, ptr %20, align 8, !tbaa !5
  %264 = tail call noundef i32 @_ZNK4Tile11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(41) %263)
  %265 = add i32 %264, %252
  %266 = trunc nsw i64 %indvars.iv.next228 to i32
  %267 = icmp ugt i32 %265, %266
  br i1 %267, label %.lr.ph164, label %._crit_edge165, !llvm.loop !33

.split.us:                                        ; preds = %171
  call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 371, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj) #11
  unreachable

.split211.us:                                     ; preds = %183
  call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 386, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN11CompilerART20generate_art_signalsEj) #11
  unreachable

._crit_edge209:                                   ; preds = %._crit_edge165.us219, %._crit_edge165, %._crit_edge205.us, %2
  call void @_ZdaPv(ptr noundef nonnull %18) #12
  call void @_ZdaPv(ptr noundef nonnull %19) #12
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #6

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #7

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #8

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #8

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #8 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { nounwind }
attributes #11 = { noreturn nounwind }
attributes #12 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS17CompilerComponent", !7, i64 8, !10, i64 16, !7, i64 40, !14, i64 48, !15, i64 52, !14, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!14 = !{!"int", !8, i64 0}
!15 = !{!"bool", !8, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!14, !14, i64 0}
!18 = distinct !{!18, !19, !20, !21}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!"llvm.loop.isvectorized", i32 1}
!21 = !{!"llvm.loop.unroll.runtime.disable"}
!22 = distinct !{!22, !19}
!23 = !{i8 0, i8 2}
!24 = !{}
!25 = distinct !{!25, !19, !21, !20}
!26 = !{!27, !27, i64 0}
!27 = !{!"_ZTS4fl_t", !8, i64 0}
!28 = !{!29, !29, i64 0}
!29 = !{!"_ZTS13adderconfig_t", !8, i64 0}
!30 = distinct !{!30, !19}
!31 = distinct !{!31, !19}
!32 = distinct !{!32, !19}
!33 = distinct !{!33, !19}
!34 = distinct !{!34, !19}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass