; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/ASwitch.ll (ZN7ASwitch16route_3_1_configEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ASwitch = type { %class.Unit, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i8, i32, i32, i8, i8, i8, i32, [4 x i8], %class.ASwitchStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ASwitchStats = type <{ %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8] }>
%class.Stats = type { ptr }

@.str.1 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [26 x i8], align 1
@__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv = external hidden unnamed_addr constant [33 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [40 x i8], align 1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #0

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

declare void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7ASwitch28perform_operation_3_operandsEP11DataPackageS1_S1_(ptr noundef nonnull align 8 dereferenceable(288), ptr noundef, ptr noundef, ptr noundef) #4 align 2

; Function Attrs: nounwind
declare void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch16route_3_1_configEv(ptr noundef nonnull align 8 dereferenceable(288) %0) #4 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  %8 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 29
  %9 = load i8, ptr %8, align 4, !tbaa !9, !range !26, !noundef !27
  %10 = trunc i8 %9 to i1
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  br label %14

12:                                               ; preds = %1
  call void @__assert_fail(ptr noundef @.str.13, ptr noundef @.str.1, i32 noundef 442, ptr noundef @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #6
  unreachable

13:                                               ; No predecessors!
  br label %14

14:                                               ; preds = %13, %11
  %15 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 30
  %16 = load i8, ptr %15, align 1, !tbaa !28, !range !26, !noundef !27
  %17 = trunc i8 %16 to i1
  br i1 %17, label %18, label %19

18:                                               ; preds = %14
  br label %21

19:                                               ; preds = %14
  call void @__assert_fail(ptr noundef @.str.14, ptr noundef @.str.1, i32 noundef 443, ptr noundef @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #6
  unreachable

20:                                               ; No predecessors!
  br label %21

21:                                               ; preds = %20, %18
  %22 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 26
  %23 = load i8, ptr %22, align 8, !tbaa !29, !range !26, !noundef !27
  %24 = trunc i8 %23 to i1
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  %26 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 25
  %27 = load i32, ptr %26, align 4, !tbaa !30
  %28 = icmp eq i32 %27, 0
  br label %29

29:                                               ; preds = %25, %21
  %30 = phi i1 [ false, %21 ], [ %28, %25 ]
  br i1 %30, label %31, label %32

31:                                               ; preds = %29
  br label %34

32:                                               ; preds = %29
  call void @__assert_fail(ptr noundef @.str.15, ptr noundef @.str.1, i32 noundef 445, ptr noundef @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #6
  unreachable

33:                                               ; No predecessors!
  br label %34

34:                                               ; preds = %33, %31
  %35 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 12
  %36 = load ptr, ptr %35, align 8, !tbaa !31
  %37 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %36)
  br i1 %37, label %75, label %38

38:                                               ; preds = %34
  %39 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 13
  %40 = load ptr, ptr %39, align 8, !tbaa !32
  %41 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %40)
  br i1 %41, label %75, label %42

42:                                               ; preds = %38
  %43 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 14
  %44 = load ptr, ptr %43, align 8, !tbaa !33
  %45 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %44)
  br i1 %45, label %75, label %46

46:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #7
  %47 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 12
  %48 = load ptr, ptr %47, align 8, !tbaa !31
  %49 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %48)
  store ptr %49, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #7
  %50 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 13
  %51 = load ptr, ptr %50, align 8, !tbaa !32
  %52 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %51)
  store ptr %52, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #7
  %53 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 14
  %54 = load ptr, ptr %53, align 8, !tbaa !33
  %55 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %54)
  store ptr %55, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #7
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = call noundef ptr @_ZN7ASwitch28perform_operation_3_operandsEP11DataPackageS1_S1_(ptr noundef nonnull align 8 dereferenceable(288) %7, ptr noundef %56, ptr noundef %57, ptr noundef %58)
  store ptr %59, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %class.ASwitch, ptr %7, i32 0, i32 15
  %61 = load ptr, ptr %60, align 8, !tbaa !34
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %61, ptr noundef %62)
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = icmp eq ptr %63, null
  br i1 %64, label %66, label %65

65:                                               ; preds = %46
  call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %63) #7
  call void @_ZdlPvm(ptr noundef %63, i64 noundef 64) #8
  br label %66

66:                                               ; preds = %65, %46
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = icmp eq ptr %67, null
  br i1 %68, label %70, label %69

69:                                               ; preds = %66
  call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %67) #7
  call void @_ZdlPvm(ptr noundef %67, i64 noundef 64) #8
  br label %70

70:                                               ; preds = %69, %66
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = icmp eq ptr %71, null
  br i1 %72, label %74, label %73

73:                                               ; preds = %70
  call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %71) #7
  call void @_ZdlPvm(ptr noundef %71, i64 noundef 64) #8
  br label %74

74:                                               ; preds = %73, %70
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #7
  br label %75

75:                                               ; preds = %74, %42, %38, %34
  ret void
}

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !21, i64 228}
!10 = !{!"_ZTS7ASwitch", !11, i64 0, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !16, i64 136, !12, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !12, i64 208, !20, i64 212, !21, i64 216, !22, i64 220, !23, i64 224, !21, i64 228, !21, i64 229, !21, i64 230, !12, i64 232, !24, i64 240}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTS4fl_t", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!23 = !{!"_ZTS16adderoperation_t", !7, i64 0}
!24 = !{!"_ZTS12ASwitchStats", !25, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!25 = !{!"_ZTS5Stats"}
!26 = !{i8 0, i8 2}
!27 = !{}
!28 = !{!10, !21, i64 229}
!29 = !{!10, !21, i64 216}
!30 = !{!10, !20, i64 212}
!31 = !{!10, !6, i64 96}
!32 = !{!10, !6, i64 104}
!33 = !{!10, !6, i64 112}
!34 = !{!10, !6, i64 120}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [26 x i8], align 1
@__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv = external hidden unnamed_addr constant [33 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [40 x i8], align 1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7ASwitch28perform_operation_3_operandsEP11DataPackageS1_S1_(ptr noundef nonnull align 8 dereferenceable(288), ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: nounwind
declare void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64)) unnamed_addr #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch16route_3_1_configEv(ptr noundef nonnull align 8 dereferenceable(288) %0) local_unnamed_addr #3 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 228
  %3 = load i8, ptr %2, align 4, !tbaa !5, !range !25, !noundef !26
  %4 = trunc nuw i8 %3 to i1
  br i1 %4, label %6, label %5

5:                                                ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.13, ptr noundef nonnull @.str.1, i32 noundef 442, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #5
  unreachable

6:                                                ; preds = %1
  %7 = getelementptr inbounds i8, ptr %0, i64 229
  %8 = load i8, ptr %7, align 1, !tbaa !27, !range !25, !noundef !26
  %9 = trunc nuw i8 %8 to i1
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  tail call void @__assert_fail(ptr noundef nonnull @.str.14, ptr noundef nonnull @.str.1, i32 noundef 443, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #5
  unreachable

11:                                               ; preds = %6
  %12 = getelementptr inbounds i8, ptr %0, i64 216
  %13 = load i8, ptr %12, align 8, !tbaa !28, !range !25, !noundef !26
  %14 = trunc nuw i8 %13 to i1
  %15 = getelementptr inbounds i8, ptr %0, i64 212
  %16 = load i32, ptr %15, align 4
  %17 = icmp eq i32 %16, 0
  %or.cond = select i1 %14, i1 %17, i1 false
  br i1 %or.cond, label %18, label %.critedge

.critedge:                                        ; preds = %11
  tail call void @__assert_fail(ptr noundef nonnull @.str.15, ptr noundef nonnull @.str.1, i32 noundef 445, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7ASwitch16route_3_1_configEv) #5
  unreachable

18:                                               ; preds = %11
  %19 = getelementptr inbounds i8, ptr %0, i64 96
  %20 = load ptr, ptr %19, align 8, !tbaa !29
  %21 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %20)
  br i1 %21, label %48, label %22

22:                                               ; preds = %18
  %23 = getelementptr inbounds i8, ptr %0, i64 104
  %24 = load ptr, ptr %23, align 8, !tbaa !30
  %25 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %24)
  br i1 %25, label %48, label %26

26:                                               ; preds = %22
  %27 = getelementptr inbounds i8, ptr %0, i64 112
  %28 = load ptr, ptr %27, align 8, !tbaa !31
  %29 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %28)
  br i1 %29, label %48, label %30

30:                                               ; preds = %26
  %31 = load ptr, ptr %19, align 8, !tbaa !29
  %32 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %31)
  %33 = load ptr, ptr %23, align 8, !tbaa !30
  %34 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %33)
  %35 = load ptr, ptr %27, align 8, !tbaa !31
  %36 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %35)
  %37 = tail call noundef ptr @_ZN7ASwitch28perform_operation_3_operandsEP11DataPackageS1_S1_(ptr noundef nonnull align 8 dereferenceable(288) %0, ptr noundef %32, ptr noundef %34, ptr noundef %36)
  %38 = getelementptr inbounds i8, ptr %0, i64 120
  %39 = load ptr, ptr %38, align 8, !tbaa !32
  tail call void @_ZN4Fifo4pushEP11DataPackage(ptr noundef nonnull align 8 dereferenceable(120) %39, ptr noundef %37)
  %40 = icmp eq ptr %32, null
  br i1 %40, label %42, label %41

41:                                               ; preds = %30
  tail call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %32) #6
  tail call void @_ZdlPvm(ptr noundef nonnull %32, i64 noundef 64) #7
  br label %42

42:                                               ; preds = %41, %30
  %43 = icmp eq ptr %34, null
  br i1 %43, label %45, label %44

44:                                               ; preds = %42
  tail call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %34) #6
  tail call void @_ZdlPvm(ptr noundef nonnull %34, i64 noundef 64) #7
  br label %45

45:                                               ; preds = %44, %42
  %46 = icmp eq ptr %36, null
  br i1 %46, label %48, label %47

47:                                               ; preds = %45
  tail call void @_ZN11DataPackageD1Ev(ptr noundef nonnull align 8 dereferenceable(64) %36) #6
  tail call void @_ZdlPvm(ptr noundef nonnull %36, i64 noundef 64) #7
  br label %48

48:                                               ; preds = %45, %47, %26, %22, %18
  ret void
}

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !20, i64 228}
!6 = !{!"_ZTS7ASwitch", !7, i64 0, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60, !8, i64 64, !8, i64 68, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !8, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !15, i64 136, !8, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !8, i64 208, !19, i64 212, !20, i64 216, !21, i64 220, !22, i64 224, !20, i64 228, !20, i64 229, !20, i64 230, !8, i64 232, !23, i64 240}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!"_ZTS4fl_t", !9, i64 0}
!20 = !{!"bool", !9, i64 0}
!21 = !{!"_ZTS13adderconfig_t", !9, i64 0}
!22 = !{!"_ZTS16adderoperation_t", !9, i64 0}
!23 = !{!"_ZTS12ASwitchStats", !24, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40}
!24 = !{!"_ZTS5Stats"}
!25 = !{i8 0, i8 2}
!26 = !{}
!27 = !{!6, !20, i64 229}
!28 = !{!6, !20, i64 216}
!29 = !{!6, !13, i64 96}
!30 = !{!6, !13, i64 104}
!31 = !{!6, !13, i64 112}
!32 = !{!6, !13, i64 120}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass