; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LPTIM_HandleTypeDef = type { ptr, %struct.LPTIM_InitTypeDef, i32, i32, i32 }
%struct.LPTIM_InitTypeDef = type { %struct.LPTIM_ClockConfigTypeDef, %struct.LPTIM_ULPClockConfigTypeDef, %struct.LPTIM_TriggerConfigTypeDef, i32, i32, i32, i32, i32 }
%struct.LPTIM_ClockConfigTypeDef = type { i32, i32 }
%struct.LPTIM_ULPClockConfigTypeDef = type { i32, i32 }
%struct.LPTIM_TriggerConfigTypeDef = type { i32, i32, i32 }
%struct.LPTIM_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_LPTIM_Counter_Start_IT(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %5, i32 0, i32 4
  store volatile i32 2, ptr %6, align 8, !tbaa !11
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %7, i32 0, i32 1
  %9 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %8, i32 0, i32 0
  %10 = getelementptr inbounds %struct.LPTIM_ClockConfigTypeDef, ptr %9, i32 0, i32 0
  %11 = load i32, ptr %10, align 8, !tbaa !16
  %12 = zext i32 %11 to i64
  %13 = icmp ne i64 %12, 1
  br i1 %13, label %14, label %30

14:                                               ; preds = %2
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %15, i32 0, i32 1
  %17 = getelementptr inbounds %struct.LPTIM_InitTypeDef, ptr %16, i32 0, i32 5
  %18 = load i32, ptr %17, align 4, !tbaa !17
  %19 = zext i32 %18 to i64
  %20 = icmp eq i64 %19, 8388608
  br i1 %20, label %21, label %30

21:                                               ; preds = %14
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %22, i32 0, i32 0
  %24 = load ptr, ptr %23, align 8, !tbaa !18
  %25 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %24, i32 0, i32 3
  %26 = load volatile i32, ptr %25, align 4, !tbaa !19
  %27 = zext i32 %26 to i64
  %28 = and i64 %27, -3585
  %29 = trunc i64 %28 to i32
  store volatile i32 %29, ptr %25, align 4, !tbaa !19
  br label %30

30:                                               ; preds = %21, %14, %2
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %31, i32 0, i32 0
  %33 = load ptr, ptr %32, align 8, !tbaa !18
  %34 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %33, i32 0, i32 2
  %35 = load volatile i32, ptr %34, align 4, !tbaa !21
  %36 = zext i32 %35 to i64
  %37 = or i64 %36, 16
  %38 = trunc i64 %37 to i32
  store volatile i32 %38, ptr %34, align 4, !tbaa !21
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %39, i32 0, i32 0
  %41 = load ptr, ptr %40, align 8, !tbaa !18
  %42 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %41, i32 0, i32 2
  %43 = load volatile i32, ptr %42, align 4, !tbaa !21
  %44 = zext i32 %43 to i64
  %45 = or i64 %44, 2
  %46 = trunc i64 %45 to i32
  store volatile i32 %46, ptr %42, align 4, !tbaa !21
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %47, i32 0, i32 0
  %49 = load ptr, ptr %48, align 8, !tbaa !18
  %50 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %49, i32 0, i32 4
  %51 = load volatile i32, ptr %50, align 4, !tbaa !22
  %52 = zext i32 %51 to i64
  %53 = or i64 %52, 1
  %54 = trunc i64 %53 to i32
  store volatile i32 %54, ptr %50, align 4, !tbaa !22
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %56, i32 0, i32 0
  %58 = load ptr, ptr %57, align 8, !tbaa !18
  %59 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %58, i32 0, i32 6
  store volatile i32 %55, ptr %59, align 4, !tbaa !23
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !18
  %63 = getelementptr inbounds %struct.LPTIM_TypeDef, ptr %62, i32 0, i32 4
  %64 = load volatile i32, ptr %63, align 4, !tbaa !22
  %65 = zext i32 %64 to i64
  %66 = or i64 %65, 4
  %67 = trunc i64 %66 to i32
  store volatile i32 %67, ptr %63, align 4, !tbaa !22
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.LPTIM_HandleTypeDef, ptr %68, i32 0, i32 4
  store volatile i32 1, ptr %69, align 8, !tbaa !11
  ret i32 0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 56, !10, i64 60, !10, i64 64}
!13 = !{!"", !14, i64 0, !14, i64 8, !15, i64 16, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!14 = !{!"", !10, i64 0, !10, i64 4}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8}
!16 = !{!12, !10, i64 8}
!17 = !{!12, !10, i64 44}
!18 = !{!12, !6, i64 0}
!19 = !{!20, !10, i64 12}
!20 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36}
!21 = !{!20, !10, i64 8}
!22 = !{!20, !10, i64 16}
!23 = !{!20, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local noundef i32 @HAL_LPTIM_Counter_Start_IT(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 2, ptr %3, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load i32, ptr %4, align 8, !tbaa !14
  %.not = icmp eq i32 %5, 1
  br i1 %.not, label %._crit_edge, label %6

._crit_edge:                                      ; preds = %2
  %.pre = load ptr, ptr %0, align 8, !tbaa !15
  br label %14

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 44
  %8 = load i32, ptr %7, align 4, !tbaa !16
  %9 = icmp eq i32 %8, 8388608
  %.pre10 = load ptr, ptr %0, align 8, !tbaa !15
  br i1 %9, label %10, label %14

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %.pre10, i64 12
  %12 = load volatile i32, ptr %11, align 4, !tbaa !17
  %13 = and i32 %12, -3585
  store volatile i32 %13, ptr %11, align 4, !tbaa !17
  br label %14

14:                                               ; preds = %._crit_edge, %10, %6
  %15 = phi ptr [ %.pre, %._crit_edge ], [ %.pre10, %10 ], [ %.pre10, %6 ]
  %16 = getelementptr inbounds i8, ptr %15, i64 8
  %17 = load volatile i32, ptr %16, align 4, !tbaa !19
  %18 = or i32 %17, 16
  store volatile i32 %18, ptr %16, align 4, !tbaa !19
  %19 = load volatile i32, ptr %16, align 4, !tbaa !19
  %20 = or i32 %19, 2
  store volatile i32 %20, ptr %16, align 4, !tbaa !19
  %21 = getelementptr inbounds i8, ptr %15, i64 16
  %22 = load volatile i32, ptr %21, align 4, !tbaa !20
  %23 = or i32 %22, 1
  store volatile i32 %23, ptr %21, align 4, !tbaa !20
  %24 = getelementptr inbounds i8, ptr %15, i64 24
  store volatile i32 %1, ptr %24, align 4, !tbaa !21
  %25 = load volatile i32, ptr %21, align 4, !tbaa !20
  %26 = or i32 %25, 4
  store volatile i32 %26, ptr %21, align 4, !tbaa !20
  store volatile i32 1, ptr %3, align 8, !tbaa !5
  ret i32 0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !12, i64 56, !12, i64 60, !12, i64 64}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 8, !13, i64 16, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!11 = !{!"", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!14 = !{!6, !12, i64 8}
!15 = !{!6, !7, i64 0}
!16 = !{!6, !12, i64 44}
!17 = !{!18, !12, i64 12}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!19 = !{!18, !12, i64 8}
!20 = !{!18, !12, i64 16}
!21 = !{!18, !12, i64 24}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass