; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SAI_HandleTypeDef = type { ptr, %struct.SAI_InitTypeDef, %struct.SAI_FrameInitTypeDef, %struct.SAI_SlotInitTypeDef, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SAI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.SAI_PdmInitTypeDef, i32, i32, i32, i32 }
%struct.SAI_PdmInitTypeDef = type { i32, i32, i32 }
%struct.SAI_FrameInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SAI_SlotInitTypeDef = type { i32, i32, i32, i32 }
%struct.SAI_Block_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_InterruptFlag(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SAI_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  %8 = load ptr, ptr %6, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %14, label %10

10:                                               ; preds = %3
  %11 = load i16, ptr %7, align 2, !tbaa !9
  %12 = zext i16 %11 to i32
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %10, %3
  store i32 1, ptr %4, align 4
  br label %106

15:                                               ; preds = %10
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %16, i32 0, i32 12
  %18 = load volatile i32, ptr %17, align 4, !tbaa !11
  %19 = icmp eq i32 %18, 1
  br i1 %19, label %20, label %105

20:                                               ; preds = %15
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %22, i32 0, i32 11
  %24 = load i32, ptr %23, align 8, !tbaa !18
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 2, ptr %4, align 4
  br label %106

27:                                               ; preds = %21
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %28, i32 0, i32 11
  store i32 1, ptr %29, align 8, !tbaa !18
  br label %30

30:                                               ; preds = %27
  br label %31

31:                                               ; preds = %30
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %33, i32 0, i32 4
  store ptr %32, ptr %34, align 8, !tbaa !19
  %35 = load i16, ptr %7, align 2, !tbaa !9
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %36, i32 0, i32 5
  store i16 %35, ptr %37, align 8, !tbaa !20
  %38 = load i16, ptr %7, align 2, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %39, i32 0, i32 6
  store i16 %38, ptr %40, align 2, !tbaa !21
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %41, i32 0, i32 13
  store volatile i32 0, ptr %42, align 8, !tbaa !22
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %43, i32 0, i32 12
  store volatile i32 34, ptr %44, align 4, !tbaa !11
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %45, i32 0, i32 1
  %47 = getelementptr inbounds %struct.SAI_InitTypeDef, ptr %46, i32 0, i32 15
  %48 = load i32, ptr %47, align 4, !tbaa !23
  %49 = zext i32 %48 to i64
  %50 = icmp eq i64 %49, 64
  br i1 %50, label %51, label %60

51:                                               ; preds = %31
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %52, i32 0, i32 1
  %54 = getelementptr inbounds %struct.SAI_InitTypeDef, ptr %53, i32 0, i32 11
  %55 = load i32, ptr %54, align 4, !tbaa !24
  %56 = icmp eq i32 %55, 0
  br i1 %56, label %57, label %60

57:                                               ; preds = %51
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %58, i32 0, i32 10
  store ptr @SAI_Receive_IT8Bit, ptr %59, align 8, !tbaa !25
  br label %74

60:                                               ; preds = %51, %31
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %61, i32 0, i32 1
  %63 = getelementptr inbounds %struct.SAI_InitTypeDef, ptr %62, i32 0, i32 15
  %64 = load i32, ptr %63, align 4, !tbaa !23
  %65 = zext i32 %64 to i64
  %66 = icmp ule i64 %65, 128
  br i1 %66, label %67, label %70

67:                                               ; preds = %60
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %68, i32 0, i32 10
  store ptr @SAI_Receive_IT16Bit, ptr %69, align 8, !tbaa !25
  br label %73

70:                                               ; preds = %60
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %71, i32 0, i32 10
  store ptr @SAI_Receive_IT32Bit, ptr %72, align 8, !tbaa !25
  br label %73

73:                                               ; preds = %70, %67
  br label %74

74:                                               ; preds = %73, %57
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = call i32 @SAI_InterruptFlag(ptr noundef %75, i32 noundef 1)
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %77, i32 0, i32 0
  %79 = load ptr, ptr %78, align 8, !tbaa !26
  %80 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %79, i32 0, i32 4
  %81 = load volatile i32, ptr %80, align 4, !tbaa !27
  %82 = or i32 %81, %76
  store volatile i32 %82, ptr %80, align 4, !tbaa !27
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %83, i32 0, i32 0
  %85 = load ptr, ptr %84, align 8, !tbaa !26
  %86 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %85, i32 0, i32 0
  %87 = load volatile i32, ptr %86, align 4, !tbaa !29
  %88 = zext i32 %87 to i64
  %89 = and i64 %88, 65536
  %90 = icmp eq i64 %89, 0
  br i1 %90, label %91, label %100

91:                                               ; preds = %74
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %92, i32 0, i32 0
  %94 = load ptr, ptr %93, align 8, !tbaa !26
  %95 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %94, i32 0, i32 0
  %96 = load volatile i32, ptr %95, align 4, !tbaa !29
  %97 = zext i32 %96 to i64
  %98 = or i64 %97, 65536
  %99 = trunc i64 %98 to i32
  store volatile i32 %99, ptr %95, align 4, !tbaa !29
  br label %100

100:                                              ; preds = %91, %74
  br label %101

101:                                              ; preds = %100
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %102, i32 0, i32 11
  store i32 0, ptr %103, align 8, !tbaa !18
  br label %104

104:                                              ; preds = %101
  store i32 0, ptr %4, align 4
  br label %106

105:                                              ; preds = %15
  store i32 2, ptr %4, align 4
  br label %106

106:                                              ; preds = %105, %104, %26, %14
  %107 = load i32, ptr %4, align 4
  ret i32 %107
}

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT8Bit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT16Bit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT32Bit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 180}
!12 = !{!"__SAI_HandleTypeDef", !6, i64 0, !13, i64 8, !16, i64 88, !17, i64 108, !6, i64 128, !10, i64 136, !10, i64 138, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !14, i64 176, !14, i64 180, !14, i64 184}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44, !14, i64 48, !15, i64 52, !14, i64 64, !14, i64 68, !14, i64 72, !14, i64 76}
!14 = !{!"int", !7, i64 0}
!15 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8}
!16 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16}
!17 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12}
!18 = !{!12, !14, i64 176}
!19 = !{!12, !6, i64 128}
!20 = !{!12, !10, i64 136}
!21 = !{!12, !10, i64 138}
!22 = !{!12, !14, i64 184}
!23 = !{!12, !14, i64 76}
!24 = !{!12, !14, i64 52}
!25 = !{!12, !6, i64 168}
!26 = !{!12, !6, i64 0}
!27 = !{!28, !14, i64 16}
!28 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28}
!29 = !{!28, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_InterruptFlag(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SAI_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = icmp eq ptr %1, null
  %5 = icmp eq i16 %2, 0
  %or.cond = or i1 %4, %5
  br i1 %or.cond, label %42, label %6

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 180
  %8 = load volatile i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %10, label %42

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %0, i64 176
  %12 = load i32, ptr %11, align 8, !tbaa !16
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %42, label %14

14:                                               ; preds = %10
  store i32 1, ptr %11, align 8, !tbaa !16
  %15 = getelementptr inbounds i8, ptr %0, i64 128
  store ptr %1, ptr %15, align 8, !tbaa !17
  %16 = getelementptr inbounds i8, ptr %0, i64 136
  store i16 %2, ptr %16, align 8, !tbaa !18
  %17 = getelementptr inbounds i8, ptr %0, i64 138
  store i16 %2, ptr %17, align 2, !tbaa !19
  %18 = getelementptr inbounds i8, ptr %0, i64 184
  store volatile i32 0, ptr %18, align 8, !tbaa !20
  store volatile i32 34, ptr %7, align 4, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %0, i64 76
  %20 = load i32, ptr %19, align 4, !tbaa !21
  %21 = icmp eq i32 %20, 64
  br i1 %21, label %22, label %26

22:                                               ; preds = %14
  %23 = getelementptr inbounds i8, ptr %0, i64 52
  %24 = load i32, ptr %23, align 4, !tbaa !22
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %28, label %.thread

26:                                               ; preds = %14
  %27 = icmp ult i32 %20, 129
  br i1 %27, label %.thread, label %28

.thread:                                          ; preds = %22, %26
  br label %28

28:                                               ; preds = %26, %22, %.thread
  %SAI_Receive_IT16Bit.sink = phi ptr [ @SAI_Receive_IT16Bit, %.thread ], [ @SAI_Receive_IT8Bit, %22 ], [ @SAI_Receive_IT32Bit, %26 ]
  %29 = getelementptr inbounds i8, ptr %0, i64 168
  store ptr %SAI_Receive_IT16Bit.sink, ptr %29, align 8, !tbaa !23
  %30 = tail call i32 @SAI_InterruptFlag(ptr noundef nonnull %0, i32 noundef 1)
  %31 = load ptr, ptr %0, align 8, !tbaa !24
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  %33 = load volatile i32, ptr %32, align 4, !tbaa !25
  %34 = or i32 %33, %30
  store volatile i32 %34, ptr %32, align 4, !tbaa !25
  %35 = load volatile i32, ptr %31, align 4, !tbaa !27
  %36 = and i32 %35, 65536
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %41

38:                                               ; preds = %28
  %39 = load volatile i32, ptr %31, align 4, !tbaa !27
  %40 = or i32 %39, 65536
  store volatile i32 %40, ptr %31, align 4, !tbaa !27
  br label %41

41:                                               ; preds = %28, %38
  store i32 0, ptr %11, align 8, !tbaa !16
  br label %42

42:                                               ; preds = %6, %10, %3, %41
  %.0 = phi i32 [ 0, %41 ], [ 1, %3 ], [ 2, %10 ], [ 2, %6 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT8Bit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT16Bit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SAI_Receive_IT32Bit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 180}
!6 = !{!"__SAI_HandleTypeDef", !7, i64 0, !10, i64 8, !13, i64 88, !14, i64 108, !7, i64 128, !15, i64 136, !15, i64 138, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !11, i64 176, !11, i64 180, !11, i64 184}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !11, i64 176}
!17 = !{!6, !7, i64 128}
!18 = !{!6, !15, i64 136}
!19 = !{!6, !15, i64 138}
!20 = !{!6, !11, i64 184}
!21 = !{!6, !11, i64 76}
!22 = !{!6, !11, i64 52}
!23 = !{!6, !7, i64 168}
!24 = !{!6, !7, i64 0}
!25 = !{!26, !11, i64 16}
!26 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!27 = !{!26, !11, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass