; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__USART_HandleTypeDef = type { ptr, %struct.USART_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i16, i16, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.USART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_USART_Abort_IT(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 1, ptr %3, align 4, !tbaa !9
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %4, i32 0, i32 0
  %6 = load ptr, ptr %5, align 8, !tbaa !11
  %7 = getelementptr inbounds %struct.USART_TypeDef, ptr %6, i32 0, i32 0
  %8 = load volatile i32, ptr %7, align 4, !tbaa !15
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, -481
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr %7, align 4, !tbaa !15
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  %15 = getelementptr inbounds %struct.USART_TypeDef, ptr %14, i32 0, i32 2
  %16 = load volatile i32, ptr %15, align 4, !tbaa !17
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, -276824066
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr %15, align 4, !tbaa !17
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %20, i32 0, i32 15
  %22 = load ptr, ptr %21, align 8, !tbaa !18
  %23 = icmp ne ptr %22, null
  br i1 %23, label %24, label %44

24:                                               ; preds = %1
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !11
  %28 = getelementptr inbounds %struct.USART_TypeDef, ptr %27, i32 0, i32 2
  %29 = load volatile i32, ptr %28, align 4, !tbaa !17
  %30 = zext i32 %29 to i64
  %31 = and i64 %30, 128
  %32 = icmp eq i64 %31, 128
  br i1 %32, label %33, label %38

33:                                               ; preds = %24
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %34, i32 0, i32 15
  %36 = load ptr, ptr %35, align 8, !tbaa !18
  %37 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %36, i32 0, i32 10
  store ptr @USART_DMATxAbortCallback, ptr %37, align 8, !tbaa !19
  br label %43

38:                                               ; preds = %24
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %39, i32 0, i32 15
  %41 = load ptr, ptr %40, align 8, !tbaa !18
  %42 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %41, i32 0, i32 10
  store ptr null, ptr %42, align 8, !tbaa !19
  br label %43

43:                                               ; preds = %38, %33
  br label %44

44:                                               ; preds = %43, %1
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %45, i32 0, i32 16
  %47 = load ptr, ptr %46, align 8, !tbaa !21
  %48 = icmp ne ptr %47, null
  br i1 %48, label %49, label %69

49:                                               ; preds = %44
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !11
  %53 = getelementptr inbounds %struct.USART_TypeDef, ptr %52, i32 0, i32 2
  %54 = load volatile i32, ptr %53, align 4, !tbaa !17
  %55 = zext i32 %54 to i64
  %56 = and i64 %55, 64
  %57 = icmp eq i64 %56, 64
  br i1 %57, label %58, label %63

58:                                               ; preds = %49
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %59, i32 0, i32 16
  %61 = load ptr, ptr %60, align 8, !tbaa !21
  %62 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %61, i32 0, i32 10
  store ptr @USART_DMARxAbortCallback, ptr %62, align 8, !tbaa !19
  br label %68

63:                                               ; preds = %49
  %64 = load ptr, ptr %2, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %64, i32 0, i32 16
  %66 = load ptr, ptr %65, align 8, !tbaa !21
  %67 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %66, i32 0, i32 10
  store ptr null, ptr %67, align 8, !tbaa !19
  br label %68

68:                                               ; preds = %63, %58
  br label %69

69:                                               ; preds = %68, %44
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !11
  %73 = getelementptr inbounds %struct.USART_TypeDef, ptr %72, i32 0, i32 2
  %74 = load volatile i32, ptr %73, align 4, !tbaa !17
  %75 = zext i32 %74 to i64
  %76 = and i64 %75, 128
  %77 = icmp eq i64 %76, 128
  br i1 %77, label %78, label %105

78:                                               ; preds = %69
  %79 = load ptr, ptr %2, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %79, i32 0, i32 0
  %81 = load ptr, ptr %80, align 8, !tbaa !11
  %82 = getelementptr inbounds %struct.USART_TypeDef, ptr %81, i32 0, i32 2
  %83 = load volatile i32, ptr %82, align 4, !tbaa !17
  %84 = zext i32 %83 to i64
  %85 = and i64 %84, -129
  %86 = trunc i64 %85 to i32
  store volatile i32 %86, ptr %82, align 4, !tbaa !17
  %87 = load ptr, ptr %2, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %87, i32 0, i32 15
  %89 = load ptr, ptr %88, align 8, !tbaa !18
  %90 = icmp ne ptr %89, null
  br i1 %90, label %91, label %104

91:                                               ; preds = %78
  %92 = load ptr, ptr %2, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %92, i32 0, i32 15
  %94 = load ptr, ptr %93, align 8, !tbaa !18
  %95 = call i32 @HAL_DMA_Abort_IT(ptr noundef %94)
  %96 = icmp ne i32 %95, 0
  br i1 %96, label %97, label %102

97:                                               ; preds = %91
  %98 = load ptr, ptr %2, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %98, i32 0, i32 15
  %100 = load ptr, ptr %99, align 8, !tbaa !18
  %101 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %100, i32 0, i32 10
  store ptr null, ptr %101, align 8, !tbaa !19
  br label %103

102:                                              ; preds = %91
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %103

103:                                              ; preds = %102, %97
  br label %104

104:                                              ; preds = %103, %78
  br label %105

105:                                              ; preds = %104, %69
  %106 = load ptr, ptr %2, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %106, i32 0, i32 0
  %108 = load ptr, ptr %107, align 8, !tbaa !11
  %109 = getelementptr inbounds %struct.USART_TypeDef, ptr %108, i32 0, i32 2
  %110 = load volatile i32, ptr %109, align 4, !tbaa !17
  %111 = zext i32 %110 to i64
  %112 = and i64 %111, 64
  %113 = icmp eq i64 %112, 64
  br i1 %113, label %114, label %141

114:                                              ; preds = %105
  %115 = load ptr, ptr %2, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %115, i32 0, i32 0
  %117 = load ptr, ptr %116, align 8, !tbaa !11
  %118 = getelementptr inbounds %struct.USART_TypeDef, ptr %117, i32 0, i32 2
  %119 = load volatile i32, ptr %118, align 4, !tbaa !17
  %120 = zext i32 %119 to i64
  %121 = and i64 %120, -65
  %122 = trunc i64 %121 to i32
  store volatile i32 %122, ptr %118, align 4, !tbaa !17
  %123 = load ptr, ptr %2, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %123, i32 0, i32 16
  %125 = load ptr, ptr %124, align 8, !tbaa !21
  %126 = icmp ne ptr %125, null
  br i1 %126, label %127, label %140

127:                                              ; preds = %114
  %128 = load ptr, ptr %2, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %128, i32 0, i32 16
  %130 = load ptr, ptr %129, align 8, !tbaa !21
  %131 = call i32 @HAL_DMA_Abort_IT(ptr noundef %130)
  %132 = icmp ne i32 %131, 0
  br i1 %132, label %133, label %138

133:                                              ; preds = %127
  %134 = load ptr, ptr %2, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %134, i32 0, i32 16
  %136 = load ptr, ptr %135, align 8, !tbaa !21
  %137 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %136, i32 0, i32 10
  store ptr null, ptr %137, align 8, !tbaa !19
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %139

138:                                              ; preds = %127
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %139

139:                                              ; preds = %138, %133
  br label %140

140:                                              ; preds = %139, %114
  br label %141

141:                                              ; preds = %140, %105
  %142 = load i32, ptr %3, align 4, !tbaa !9
  %143 = icmp eq i32 %142, 1
  br i1 %143, label %144, label %177

144:                                              ; preds = %141
  %145 = load ptr, ptr %2, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %145, i32 0, i32 4
  store volatile i16 0, ptr %146, align 2, !tbaa !22
  %147 = load ptr, ptr %2, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %147, i32 0, i32 7
  store volatile i16 0, ptr %148, align 2, !tbaa !23
  %149 = load ptr, ptr %2, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %149, i32 0, i32 19
  store volatile i32 0, ptr %150, align 8, !tbaa !24
  %151 = load ptr, ptr %2, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %151, i32 0, i32 0
  %153 = load ptr, ptr %152, align 8, !tbaa !11
  %154 = getelementptr inbounds %struct.USART_TypeDef, ptr %153, i32 0, i32 8
  store volatile i32 15, ptr %154, align 4, !tbaa !25
  %155 = load ptr, ptr %2, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %155, i32 0, i32 12
  %157 = load i32, ptr %156, align 8, !tbaa !26
  %158 = zext i32 %157 to i64
  %159 = icmp eq i64 %158, 536870912
  br i1 %159, label %160, label %167

160:                                              ; preds = %144
  %161 = load ptr, ptr %2, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %161, i32 0, i32 0
  %163 = load ptr, ptr %162, align 8, !tbaa !11
  %164 = getelementptr inbounds %struct.USART_TypeDef, ptr %163, i32 0, i32 6
  %165 = load volatile i32, ptr %164, align 4, !tbaa !27
  %166 = or i32 %165, 16
  store volatile i32 %166, ptr %164, align 4, !tbaa !27
  br label %167

167:                                              ; preds = %160, %144
  %168 = load ptr, ptr %2, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %168, i32 0, i32 0
  %170 = load ptr, ptr %169, align 8, !tbaa !11
  %171 = getelementptr inbounds %struct.USART_TypeDef, ptr %170, i32 0, i32 6
  %172 = load volatile i32, ptr %171, align 4, !tbaa !27
  %173 = or i32 %172, 8
  store volatile i32 %173, ptr %171, align 4, !tbaa !27
  %174 = load ptr, ptr %2, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.__USART_HandleTypeDef, ptr %174, i32 0, i32 18
  store volatile i32 1, ptr %175, align 4, !tbaa !28
  %176 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_USART_AbortCpltCallback(ptr noundef %176)
  br label %177

177:                                              ; preds = %167, %141
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 0
}

; Function Attrs: nounwind uwtable
declare hidden void @USART_DMATxAbortCallback(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @USART_DMARxAbortCallback(ptr noundef) #1

declare i32 @HAL_DMA_Abort_IT(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_USART_AbortCpltCallback(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"__USART_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 48, !14, i64 56, !14, i64 58, !6, i64 64, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 84, !10, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !10, i64 128, !10, i64 132, !10, i64 136}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!17 = !{!16, !10, i64 8}
!18 = !{!12, !6, i64 112}
!19 = !{!20, !6, i64 112}
!20 = !{!"__DMA_HandleTypeDef", !6, i64 0, !16, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!21 = !{!12, !6, i64 120}
!22 = !{!12, !14, i64 58}
!23 = !{!12, !14, i64 74}
!24 = !{!12, !10, i64 136}
!25 = !{!16, !10, i64 32}
!26 = !{!12, !10, i64 88}
!27 = !{!16, !10, i64 24}
!28 = !{!12, !10, i64 132}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @HAL_USART_Abort_IT(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = load volatile i32, ptr %2, align 4, !tbaa !13
  %4 = and i32 %3, -481
  store volatile i32 %4, ptr %2, align 4, !tbaa !13
  %5 = getelementptr inbounds i8, ptr %2, i64 8
  %6 = load volatile i32, ptr %5, align 4, !tbaa !15
  %7 = and i32 %6, -276824066
  store volatile i32 %7, ptr %5, align 4, !tbaa !15
  %8 = getelementptr inbounds i8, ptr %0, i64 112
  %9 = load ptr, ptr %8, align 8, !tbaa !16
  %.not = icmp eq ptr %9, null
  br i1 %.not, label %13, label %.sink.split

.sink.split:                                      ; preds = %1
  %10 = load volatile i32, ptr %5, align 4, !tbaa !15
  %11 = and i32 %10, 128
  %.not31 = icmp eq i32 %11, 0
  %12 = getelementptr inbounds i8, ptr %9, i64 112
  %.USART_DMATxAbortCallback = select i1 %.not31, ptr null, ptr @USART_DMATxAbortCallback
  store ptr %.USART_DMATxAbortCallback, ptr %12, align 8, !tbaa !17
  br label %13

13:                                               ; preds = %.sink.split, %1
  %14 = getelementptr inbounds i8, ptr %0, i64 120
  %15 = load ptr, ptr %14, align 8, !tbaa !19
  %.not32 = icmp eq ptr %15, null
  br i1 %.not32, label %19, label %.sink.split43

.sink.split43:                                    ; preds = %13
  %16 = load volatile i32, ptr %5, align 4, !tbaa !15
  %17 = and i32 %16, 64
  %.not33 = icmp eq i32 %17, 0
  %18 = getelementptr inbounds i8, ptr %15, i64 112
  %.USART_DMARxAbortCallback = select i1 %.not33, ptr null, ptr @USART_DMARxAbortCallback
  store ptr %.USART_DMARxAbortCallback, ptr %18, align 8, !tbaa !17
  br label %19

19:                                               ; preds = %.sink.split43, %13
  %20 = load volatile i32, ptr %5, align 4, !tbaa !15
  %21 = and i32 %20, 128
  %.not34 = icmp eq i32 %21, 0
  br i1 %.not34, label %30, label %22

22:                                               ; preds = %19
  %23 = load volatile i32, ptr %5, align 4, !tbaa !15
  %24 = and i32 %23, -129
  store volatile i32 %24, ptr %5, align 4, !tbaa !15
  br i1 %.not, label %30, label %25

25:                                               ; preds = %22
  %26 = tail call i32 @HAL_DMA_Abort_IT(ptr noundef nonnull %9) #2
  %.not36 = icmp eq i32 %26, 0
  br i1 %.not36, label %30, label %27

27:                                               ; preds = %25
  %28 = load ptr, ptr %8, align 8, !tbaa !16
  %29 = getelementptr inbounds i8, ptr %28, i64 112
  store ptr null, ptr %29, align 8, !tbaa !17
  br label %30

30:                                               ; preds = %25, %22, %27, %19
  %31 = phi i1 [ true, %27 ], [ true, %22 ], [ true, %19 ], [ false, %25 ]
  %32 = load ptr, ptr %0, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %32, i64 8
  %34 = load volatile i32, ptr %33, align 4, !tbaa !15
  %35 = and i32 %34, 64
  %.not37 = icmp eq i32 %35, 0
  br i1 %.not37, label %44, label %36

36:                                               ; preds = %30
  %37 = load volatile i32, ptr %33, align 4, !tbaa !15
  %38 = and i32 %37, -65
  store volatile i32 %38, ptr %33, align 4, !tbaa !15
  %39 = load ptr, ptr %14, align 8, !tbaa !19
  %.not38 = icmp eq ptr %39, null
  br i1 %.not38, label %44, label %40

40:                                               ; preds = %36
  %41 = tail call i32 @HAL_DMA_Abort_IT(ptr noundef nonnull %39) #2
  %.not39 = icmp eq i32 %41, 0
  br i1 %.not39, label %.thread41, label %.thread

.thread:                                          ; preds = %40
  %42 = load ptr, ptr %14, align 8, !tbaa !19
  %43 = getelementptr inbounds i8, ptr %42, i64 112
  store ptr null, ptr %43, align 8, !tbaa !17
  br label %45

44:                                               ; preds = %36, %30
  br i1 %31, label %45, label %.thread41

45:                                               ; preds = %.thread, %44
  %46 = getelementptr inbounds i8, ptr %0, i64 58
  store volatile i16 0, ptr %46, align 2, !tbaa !20
  %47 = getelementptr inbounds i8, ptr %0, i64 74
  store volatile i16 0, ptr %47, align 2, !tbaa !21
  %48 = getelementptr inbounds i8, ptr %0, i64 136
  store volatile i32 0, ptr %48, align 8, !tbaa !22
  %49 = load ptr, ptr %0, align 8, !tbaa !5
  %50 = getelementptr inbounds i8, ptr %49, i64 32
  store volatile i32 15, ptr %50, align 4, !tbaa !23
  %51 = getelementptr inbounds i8, ptr %0, i64 88
  %52 = load i32, ptr %51, align 8, !tbaa !24
  %53 = icmp eq i32 %52, 536870912
  br i1 %53, label %54, label %58

54:                                               ; preds = %45
  %55 = getelementptr inbounds i8, ptr %49, i64 24
  %56 = load volatile i32, ptr %55, align 4, !tbaa !25
  %57 = or i32 %56, 16
  store volatile i32 %57, ptr %55, align 4, !tbaa !25
  br label %58

58:                                               ; preds = %54, %45
  %59 = getelementptr inbounds i8, ptr %49, i64 24
  %60 = load volatile i32, ptr %59, align 4, !tbaa !25
  %61 = or i32 %60, 8
  store volatile i32 %61, ptr %59, align 4, !tbaa !25
  %62 = getelementptr inbounds i8, ptr %0, i64 132
  store volatile i32 1, ptr %62, align 4, !tbaa !26
  tail call void @HAL_USART_AbortCpltCallback(ptr noundef nonnull %0)
  br label %.thread41

.thread41:                                        ; preds = %40, %58, %44
  ret i32 0
}

; Function Attrs: nounwind uwtable
declare hidden void @USART_DMATxAbortCallback(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @USART_DMARxAbortCallback(ptr noundef) #0

declare i32 @HAL_DMA_Abort_IT(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_USART_AbortCpltCallback(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__USART_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 48, !12, i64 56, !12, i64 58, !7, i64 64, !12, i64 72, !12, i64 74, !12, i64 76, !12, i64 78, !12, i64 80, !11, i64 84, !11, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !11, i64 128, !11, i64 132, !11, i64 136}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!15 = !{!14, !11, i64 8}
!16 = !{!6, !7, i64 112}
!17 = !{!18, !7, i64 112}
!18 = !{!"__DMA_HandleTypeDef", !7, i64 0, !14, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!19 = !{!6, !7, i64 120}
!20 = !{!6, !12, i64 58}
!21 = !{!6, !12, i64 74}
!22 = !{!6, !11, i64 136}
!23 = !{!14, !11, i64 32}
!24 = !{!6, !11, i64 88}
!25 = !{!14, !11, i64 24}
!26 = !{!6, !11, i64 132}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass