; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SPDIFRX_HandleTypeDef = type { ptr, %struct.SPDIFRX_InitTypeDef, ptr, ptr, i16, i16, i16, i16, ptr, ptr, i32, i32, i32 }
%struct.SPDIFRX_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SPDIFRX_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SPDIFRX_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %118

9:                                                ; preds = %1
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %10, i32 0, i32 11
  %12 = load volatile i32, ptr %11, align 4, !tbaa !9
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %18

14:                                               ; preds = %9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %15, i32 0, i32 10
  store volatile i32 0, ptr %16, align 8, !tbaa !14
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_SPDIFRX_MspInit(ptr noundef %17)
  br label %18

18:                                               ; preds = %14, %9
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %19, i32 0, i32 11
  store volatile i32 2, ptr %20, align 4, !tbaa !9
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %21, i32 0, i32 0
  %23 = load ptr, ptr %22, align 8, !tbaa !15
  %24 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %23, i32 0, i32 0
  %25 = load volatile i32, ptr %24, align 4, !tbaa !16
  %26 = and i32 %25, -4
  store volatile i32 %26, ptr %24, align 4, !tbaa !16
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !15
  %30 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %29, i32 0, i32 0
  %31 = load volatile i32, ptr %30, align 4, !tbaa !16
  store i32 %31, ptr %4, align 4, !tbaa !18
  %32 = load i32, ptr %4, align 4, !tbaa !18
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, -3636217
  %35 = trunc i64 %34 to i32
  store i32 %35, ptr %4, align 4, !tbaa !18
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %36, i32 0, i32 1
  %38 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %37, i32 0, i32 5
  %39 = load i32, ptr %38, align 4, !tbaa !19
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %40, i32 0, i32 1
  %42 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %41, i32 0, i32 0
  %43 = load i32, ptr %42, align 8, !tbaa !20
  %44 = or i32 %39, %43
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %45, i32 0, i32 1
  %47 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %46, i32 0, i32 1
  %48 = load i32, ptr %47, align 4, !tbaa !21
  %49 = or i32 %44, %48
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %50, i32 0, i32 1
  %52 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %51, i32 0, i32 2
  %53 = load i32, ptr %52, align 8, !tbaa !22
  %54 = or i32 %49, %53
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %55, i32 0, i32 1
  %57 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %56, i32 0, i32 3
  %58 = load i32, ptr %57, align 4, !tbaa !23
  %59 = or i32 %54, %58
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %60, i32 0, i32 1
  %62 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %61, i32 0, i32 4
  %63 = load i32, ptr %62, align 8, !tbaa !24
  %64 = or i32 %59, %63
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %65, i32 0, i32 1
  %67 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %66, i32 0, i32 6
  %68 = load i32, ptr %67, align 8, !tbaa !25
  %69 = or i32 %64, %68
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %70, i32 0, i32 1
  %72 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %71, i32 0, i32 7
  %73 = load i32, ptr %72, align 4, !tbaa !26
  %74 = or i32 %69, %73
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %75, i32 0, i32 1
  %77 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %76, i32 0, i32 8
  %78 = load i32, ptr %77, align 8, !tbaa !27
  %79 = or i32 %74, %78
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %80, i32 0, i32 1
  %82 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %81, i32 0, i32 9
  %83 = load i32, ptr %82, align 4, !tbaa !28
  %84 = or i32 %79, %83
  %85 = load i32, ptr %4, align 4, !tbaa !18
  %86 = or i32 %85, %84
  store i32 %86, ptr %4, align 4, !tbaa !18
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %87, i32 0, i32 1
  %89 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %88, i32 0, i32 10
  %90 = load i32, ptr %89, align 8, !tbaa !29
  %91 = icmp eq i32 %90, 1
  br i1 %91, label %92, label %97

92:                                               ; preds = %18
  %93 = load i32, ptr %4, align 4, !tbaa !18
  %94 = zext i32 %93 to i64
  %95 = or i64 %94, 1048576
  %96 = trunc i64 %95 to i32
  store i32 %96, ptr %4, align 4, !tbaa !18
  br label %97

97:                                               ; preds = %92, %18
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %98, i32 0, i32 1
  %100 = getelementptr inbounds %struct.SPDIFRX_InitTypeDef, ptr %99, i32 0, i32 11
  %101 = load i32, ptr %100, align 4, !tbaa !30
  %102 = icmp eq i32 %101, 1
  br i1 %102, label %103, label %108

103:                                              ; preds = %97
  %104 = load i32, ptr %4, align 4, !tbaa !18
  %105 = zext i32 %104 to i64
  %106 = or i64 %105, 2097152
  %107 = trunc i64 %106 to i32
  store i32 %107, ptr %4, align 4, !tbaa !18
  br label %108

108:                                              ; preds = %103, %97
  %109 = load i32, ptr %4, align 4, !tbaa !18
  %110 = load ptr, ptr %3, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %110, i32 0, i32 0
  %112 = load ptr, ptr %111, align 8, !tbaa !15
  %113 = getelementptr inbounds %struct.SPDIFRX_TypeDef, ptr %112, i32 0, i32 0
  store volatile i32 %109, ptr %113, align 4, !tbaa !16
  %114 = load ptr, ptr %3, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %114, i32 0, i32 12
  store volatile i32 0, ptr %115, align 8, !tbaa !31
  %116 = load ptr, ptr %3, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.SPDIFRX_HandleTypeDef, ptr %116, i32 0, i32 11
  store volatile i32 1, ptr %117, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %118

118:                                              ; preds = %108, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %119 = load i32, ptr %2, align 4
  ret i32 %119
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_SPDIFRX_MspInit(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 100}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 56, !6, i64 64, !13, i64 72, !13, i64 74, !13, i64 76, !13, i64 78, !6, i64 80, !6, i64 88, !12, i64 96, !12, i64 100, !12, i64 104}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !12, i64 96}
!15 = !{!10, !6, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!18 = !{!12, !12, i64 0}
!19 = !{!10, !12, i64 28}
!20 = !{!10, !12, i64 8}
!21 = !{!10, !12, i64 12}
!22 = !{!10, !12, i64 16}
!23 = !{!10, !12, i64 20}
!24 = !{!10, !12, i64 24}
!25 = !{!10, !12, i64 32}
!26 = !{!10, !12, i64 36}
!27 = !{!10, !12, i64 40}
!28 = !{!10, !12, i64 44}
!29 = !{!10, !12, i64 48}
!30 = !{!10, !12, i64 52}
!31 = !{!10, !12, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_SPDIFRX_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %31, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 100
  %5 = load volatile i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %9

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 96
  store volatile i32 0, ptr %8, align 8, !tbaa !13
  tail call void @HAL_SPDIFRX_MspInit(ptr noundef nonnull %0)
  br label %9

9:                                                ; preds = %7, %3
  store volatile i32 2, ptr %4, align 4, !tbaa !5
  %10 = load ptr, ptr %0, align 8, !tbaa !14
  %11 = load volatile i32, ptr %10, align 4, !tbaa !15
  %12 = and i32 %11, -4
  store volatile i32 %12, ptr %10, align 4, !tbaa !15
  %13 = load volatile i32, ptr %10, align 4, !tbaa !15
  %14 = and i32 %13, -3636217
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = load <8 x i32>, ptr %15, align 8, !tbaa !17
  %17 = getelementptr inbounds i8, ptr %0, i64 40
  %18 = load i32, ptr %17, align 8, !tbaa !18
  %19 = getelementptr inbounds i8, ptr %0, i64 44
  %20 = load i32, ptr %19, align 4, !tbaa !19
  %21 = tail call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> %16)
  %op.rdx = or i32 %21, %18
  %op.rdx29 = or i32 %20, %14
  %op.rdx30 = or i32 %op.rdx, %op.rdx29
  %22 = getelementptr inbounds i8, ptr %0, i64 48
  %23 = load i32, ptr %22, align 8, !tbaa !20
  %24 = icmp eq i32 %23, 1
  %25 = or i32 %op.rdx30, 1048576
  %spec.select = select i1 %24, i32 %25, i32 %op.rdx30
  %26 = getelementptr inbounds i8, ptr %0, i64 52
  %27 = load i32, ptr %26, align 4, !tbaa !21
  %28 = icmp eq i32 %27, 1
  %29 = or i32 %spec.select, 2097152
  %.1 = select i1 %28, i32 %29, i32 %spec.select
  store volatile i32 %.1, ptr %10, align 4, !tbaa !15
  %30 = getelementptr inbounds i8, ptr %0, i64 104
  store volatile i32 0, ptr %30, align 8, !tbaa !22
  store volatile i32 1, ptr %4, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %1, %9
  %.027 = phi i32 [ 0, %9 ], [ 1, %1 ]
  ret i32 %.027
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_SPDIFRX_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v8i32(<8 x i32>) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 100}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 56, !7, i64 64, !12, i64 72, !12, i64 74, !12, i64 76, !12, i64 78, !7, i64 80, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 96}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!17 = !{!11, !11, i64 0}
!18 = !{!6, !11, i64 40}
!19 = !{!6, !11, i64 44}
!20 = !{!6, !11, i64 48}
!21 = !{!6, !11, i64 52}
!22 = !{!6, !11, i64 104}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass