; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/JAN2021-Long/TILESQRS.ll (Z4logcxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z4logcxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 0, ptr %5, align 8, !tbaa !5
  br label %6

6:                                                ; preds = %17, %2
  %7 = load i64, ptr %5, align 8, !tbaa !5
  %8 = icmp slt i64 %7, 5
  br i1 %8, label %9, label %20

9:                                                ; preds = %6
  %10 = load i64, ptr %5, align 8, !tbaa !5
  %11 = shl i64 1, %10
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = icmp eq i64 %11, %12
  br i1 %13, label %14, label %16

14:                                               ; preds = %9
  %15 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %15, ptr %3, align 8
  br label %21

16:                                               ; preds = %9
  br label %17

17:                                               ; preds = %16
  %18 = load i64, ptr %5, align 8, !tbaa !5
  %19 = add nsw i64 %18, 1
  store i64 %19, ptr %5, align 8, !tbaa !5
  br label %6, !llvm.loop !9

20:                                               ; preds = %6
  store i64 0, ptr %3, align 8
  br label %21

21:                                               ; preds = %20, %14
  %22 = load i64, ptr %3, align 8
  ret i64 %22
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@switch.table._Z4logcxx = private unnamed_addr constant [8 x i64] [i64 1, i64 2, i64 0, i64 3, i64 0, i64 0, i64 0, i64 4], align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z4logcxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = add i64 %0, -2
  %4 = tail call i64 @llvm.fshl.i64(i64 %3, i64 %3, i64 63)
  %5 = icmp ult i64 %4, 8
  br i1 %5, label %switch.lookup, label %6

switch.lookup:                                    ; preds = %2
  %switch.gep = getelementptr inbounds [8 x i64], ptr @switch.table._Z4logcxx, i64 0, i64 %4
  %switch.load = load i64, ptr %switch.gep, align 8
  br label %6

6:                                                ; preds = %switch.lookup, %2
  %.06 = phi i64 [ 0, %2 ], [ %switch.load, %switch.lookup ]
  ret i64 %.06
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fshl.i64(i64, i64, i64) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass