; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.COMP_HandleTypeDef = type { ptr, %struct.COMP_InitTypeDef, i32, i32, i32 }
%struct.COMP_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.COMP_TypeDef = type { i32 }

@SystemCoreClock = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_COMP_Start_IT(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store volatile i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = icmp eq ptr %5, null
  br i1 %6, label %7, label %8

7:                                                ; preds = %1
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %58

8:                                                ; preds = %1
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %9, i32 0, i32 0
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  %12 = getelementptr inbounds %struct.COMP_TypeDef, ptr %11, i32 0, i32 0
  %13 = load volatile i32, ptr %12, align 4, !tbaa !14
  %14 = zext i32 %13 to i64
  %15 = and i64 %14, 2147483648
  %16 = icmp eq i64 %15, 2147483648
  br i1 %16, label %17, label %18

17:                                               ; preds = %8
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %57

18:                                               ; preds = %8
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %19, i32 0, i32 3
  %21 = load volatile i32, ptr %20, align 4, !tbaa !16
  %22 = icmp eq i32 %21, 1
  br i1 %22, label %23, label %55

23:                                               ; preds = %18
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %24, i32 0, i32 0
  %26 = load ptr, ptr %25, align 8, !tbaa !11
  %27 = getelementptr inbounds %struct.COMP_TypeDef, ptr %26, i32 0, i32 0
  %28 = load volatile i32, ptr %27, align 4, !tbaa !14
  %29 = zext i32 %28 to i64
  %30 = or i64 %29, 1
  %31 = trunc i64 %30 to i32
  store volatile i32 %31, ptr %27, align 4, !tbaa !14
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !11
  %35 = getelementptr inbounds %struct.COMP_TypeDef, ptr %34, i32 0, i32 0
  %36 = load volatile i32, ptr %35, align 4, !tbaa !14
  %37 = zext i32 %36 to i64
  %38 = or i64 %37, 64
  %39 = trunc i64 %38 to i32
  store volatile i32 %39, ptr %35, align 4, !tbaa !14
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %40, i32 0, i32 3
  store volatile i32 2, ptr %41, align 4, !tbaa !16
  %42 = load i32, ptr @SystemCoreClock, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = udiv i64 %43, 2000000
  %45 = mul i64 80, %44
  %46 = trunc i64 %45 to i32
  store volatile i32 %46, ptr %3, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %51, %23
  %48 = load volatile i32, ptr %3, align 4, !tbaa !9
  %49 = zext i32 %48 to i64
  %50 = icmp ne i64 %49, 0
  br i1 %50, label %51, label %54

51:                                               ; preds = %47
  %52 = load volatile i32, ptr %3, align 4, !tbaa !9
  %53 = add i32 %52, -1
  store volatile i32 %53, ptr %3, align 4, !tbaa !9
  br label %47, !llvm.loop !17

54:                                               ; preds = %47
  br label %56

55:                                               ; preds = %18
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %56

56:                                               ; preds = %55, %54
  br label %57

57:                                               ; preds = %56, %17
  br label %58

58:                                               ; preds = %57, %7
  %59 = load i32, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 40, !10, i64 44, !10, i64 48}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0}
!16 = !{!12, !10, i64 44}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_COMP_Start_IT(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  %3 = icmp eq ptr %0, null
  br i1 %3, label %.loopexit, label %4

4:                                                ; preds = %1
  %5 = load ptr, ptr %0, align 8, !tbaa !9
  %6 = load volatile i32, ptr %5, align 4, !tbaa !13
  %.not = icmp sgt i32 %6, -1
  br i1 %.not, label %7, label %.loopexit

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 44
  %9 = load volatile i32, ptr %8, align 4, !tbaa !15
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %.loopexit

11:                                               ; preds = %7
  %12 = load volatile i32, ptr %5, align 4, !tbaa !13
  %13 = or i32 %12, 1
  store volatile i32 %13, ptr %5, align 4, !tbaa !13
  %14 = load volatile i32, ptr %5, align 4, !tbaa !13
  %15 = or i32 %14, 64
  store volatile i32 %15, ptr %5, align 4, !tbaa !13
  store volatile i32 2, ptr %8, align 4, !tbaa !15
  %16 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %17 = udiv i32 %16, 2000000
  %narrow = mul nuw nsw i32 %17, 80
  store volatile i32 %narrow, ptr %2, align 4, !tbaa !5
  %.0..0..0..0.10 = load volatile i32, ptr %2, align 4, !tbaa !5
  %.not911 = icmp eq i32 %.0..0..0..0.10, 0
  br i1 %.not911, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %11, %.lr.ph
  %.0..0..0..0.1 = load volatile i32, ptr %2, align 4, !tbaa !5
  %18 = add i32 %.0..0..0..0.1, -1
  store volatile i32 %18, ptr %2, align 4, !tbaa !5
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !5
  %.not9 = icmp eq i32 %.0..0..0..0., 0
  br i1 %.not9, label %.loopexit, label %.lr.ph, !llvm.loop !16

.loopexit:                                        ; preds = %.lr.ph, %11, %7, %4, %1
  %.0 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 1, %7 ], [ 0, %11 ], [ 0, %.lr.ph ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !12, i64 8, !6, i64 40, !6, i64 44, !6, i64 48}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!13 = !{!14, !6, i64 0}
!14 = !{!"", !6, i64 0}
!15 = !{!10, !6, i64 44}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass