; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/src/dev (codec_wm8731)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.daisy::I2CHandle" = type { ptr }
%"class.daisy::Wm8731" = type <{ %"class.daisy::I2CHandle", %"struct.daisy::Wm8731::Config", i8, [3 x i8] }>
%"struct.daisy::Wm8731::Config" = type { i8, i8, i8, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5daisy6Wm87314InitERKNS0_6ConfigENS_9I2CHandleE(ptr noundef nonnull align 8 dereferenceable(21) %0, ptr noundef nonnull align 4 dereferenceable(12) %1, ptr %2) #0 align 2 {
  %4 = alloca i32, align 4
  %5 = alloca %"class.daisy::I2CHandle", align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = getelementptr inbounds %"class.daisy::I2CHandle", ptr %5, i32 0, i32 0
  store ptr %2, ptr %12, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  %13 = load ptr, ptr %6, align 8
  %14 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %5, i64 8, i1 false), !tbaa.struct !9
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %16, ptr align 4 %15, i64 12, i1 false), !tbaa.struct !10
  %17 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %18 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %17, i32 0, i32 2
  %19 = load i8, ptr %18, align 2, !tbaa !17, !range !21, !noundef !22
  %20 = trunc i8 %19 to i1
  %21 = zext i1 %20 to i64
  %22 = select i1 %20, i32 27, i32 26
  %23 = trunc i32 %22 to i8
  %24 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 2
  store i8 %23, ptr %24, align 4, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %25 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 15, i16 noundef zeroext 0)
  store i32 %25, ptr %8, align 4, !tbaa !24
  %26 = load i32, ptr %8, align 4, !tbaa !24
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %3
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

29:                                               ; preds = %3
  %30 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 0, i16 noundef zeroext 23)
  store i32 %30, ptr %8, align 4, !tbaa !24
  %31 = load i32, ptr %8, align 4, !tbaa !24
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

34:                                               ; preds = %29
  %35 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 1, i16 noundef zeroext 23)
  store i32 %35, ptr %8, align 4, !tbaa !24
  %36 = load i32, ptr %8, align 4, !tbaa !24
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %34
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

39:                                               ; preds = %34
  %40 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 2, i16 noundef zeroext 0)
  store i32 %40, ptr %8, align 4, !tbaa !24
  %41 = load i32, ptr %8, align 4, !tbaa !24
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %44

43:                                               ; preds = %39
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

44:                                               ; preds = %39
  %45 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 3, i16 noundef zeroext 0)
  store i32 %45, ptr %8, align 4, !tbaa !24
  %46 = load i32, ptr %8, align 4, !tbaa !24
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

49:                                               ; preds = %44
  %50 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 4, i16 noundef zeroext 18)
  store i32 %50, ptr %8, align 4, !tbaa !24
  %51 = load i32, ptr %8, align 4, !tbaa !24
  %52 = icmp ne i32 %51, 0
  br i1 %52, label %53, label %54

53:                                               ; preds = %49
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

54:                                               ; preds = %49
  %55 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 5, i16 noundef zeroext 0)
  store i32 %55, ptr %8, align 4, !tbaa !24
  %56 = load i32, ptr %8, align 4, !tbaa !24
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %54
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %133

59:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 66, ptr %10, align 1, !tbaa !26
  %60 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %61 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %60, i32 0, i32 0
  %62 = load i8, ptr %61, align 8, !tbaa !27, !range !21, !noundef !22
  %63 = trunc i8 %62 to i1
  br i1 %63, label %64, label %69

64:                                               ; preds = %59
  %65 = load i8, ptr %10, align 1, !tbaa !26
  %66 = zext i8 %65 to i32
  %67 = or i32 %66, 32
  %68 = trunc i32 %67 to i8
  store i8 %68, ptr %10, align 1, !tbaa !26
  br label %69

69:                                               ; preds = %64, %59
  %70 = load i8, ptr %10, align 1, !tbaa !26
  %71 = zext i8 %70 to i16
  %72 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 6, i16 noundef zeroext %71)
  store i32 %72, ptr %8, align 4, !tbaa !24
  %73 = load i32, ptr %8, align 4, !tbaa !24
  %74 = icmp ne i32 %73, 0
  br i1 %74, label %75, label %76

75:                                               ; preds = %69
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %132

76:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  %77 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %78 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %77, i32 0, i32 3
  %79 = load i32, ptr %78, align 4, !tbaa !28
  %80 = trunc i32 %79 to i8
  %81 = zext i8 %80 to i32
  %82 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %83 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %82, i32 0, i32 4
  %84 = load i32, ptr %83, align 8, !tbaa !29
  %85 = trunc i32 %84 to i8
  %86 = zext i8 %85 to i32
  %87 = or i32 %81, %86
  %88 = trunc i32 %87 to i8
  store i8 %88, ptr %11, align 1, !tbaa !26
  %89 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %90 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %89, i32 0, i32 0
  %91 = load i8, ptr %90, align 8, !tbaa !27, !range !21, !noundef !22
  %92 = trunc i8 %91 to i1
  %93 = zext i1 %92 to i64
  %94 = select i1 %92, i32 0, i32 64
  %95 = load i8, ptr %11, align 1, !tbaa !26
  %96 = zext i8 %95 to i32
  %97 = or i32 %96, %94
  %98 = trunc i32 %97 to i8
  store i8 %98, ptr %11, align 1, !tbaa !26
  %99 = getelementptr inbounds %"class.daisy::Wm8731", ptr %13, i32 0, i32 1
  %100 = getelementptr inbounds %"struct.daisy::Wm8731::Config", ptr %99, i32 0, i32 1
  %101 = load i8, ptr %100, align 1, !tbaa !30, !range !21, !noundef !22
  %102 = trunc i8 %101 to i1
  br i1 %102, label %103, label %108

103:                                              ; preds = %76
  %104 = load i8, ptr %11, align 1, !tbaa !26
  %105 = zext i8 %104 to i32
  %106 = or i32 %105, 32
  %107 = trunc i32 %106 to i8
  store i8 %107, ptr %11, align 1, !tbaa !26
  br label %108

108:                                              ; preds = %103, %76
  %109 = load i8, ptr %11, align 1, !tbaa !26
  %110 = zext i8 %109 to i16
  %111 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 7, i16 noundef zeroext %110)
  store i32 %111, ptr %8, align 4, !tbaa !24
  %112 = load i32, ptr %8, align 4, !tbaa !24
  %113 = icmp ne i32 %112, 0
  br i1 %113, label %114, label %115

114:                                              ; preds = %108
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %131

115:                                              ; preds = %108
  %116 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 8, i16 noundef zeroext 0)
  store i32 %116, ptr %8, align 4, !tbaa !24
  %117 = load i32, ptr %8, align 4, !tbaa !24
  %118 = icmp ne i32 %117, 0
  br i1 %118, label %119, label %120

119:                                              ; preds = %115
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %131

120:                                              ; preds = %115
  %121 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 9, i16 noundef zeroext 0)
  store i32 %121, ptr %8, align 4, !tbaa !24
  %122 = load i32, ptr %8, align 4, !tbaa !24
  %123 = icmp ne i32 %122, 0
  br i1 %123, label %124, label %125

124:                                              ; preds = %120
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %131

125:                                              ; preds = %120
  %126 = call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %13, i8 noundef zeroext 9, i16 noundef zeroext 1)
  store i32 %126, ptr %8, align 4, !tbaa !24
  %127 = load i32, ptr %8, align 4, !tbaa !24
  %128 = icmp ne i32 %127, 0
  br i1 %128, label %129, label %130

129:                                              ; preds = %125
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %131

130:                                              ; preds = %125
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %131

131:                                              ; preds = %130, %129, %124, %119, %114
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  br label %132

132:                                              ; preds = %131, %75
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  br label %133

133:                                              ; preds = %132, %58, %53, %48, %43, %38, %33, %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %134 = load i32, ptr %4, align 4
  ret i32 %134
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21), i8 noundef zeroext, i16 noundef zeroext) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 8, !5}
!10 = !{i64 0, i64 1, !11, i64 1, i64 1, !11, i64 2, i64 1, !11, i64 4, i64 4, !13, i64 8, i64 4, !15}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTSN5daisy6Wm87316Config6FormatE", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"_ZTSN5daisy6Wm87316Config10WordLengthE", !7, i64 0}
!17 = !{!18, !12, i64 10}
!18 = !{!"_ZTSN5daisy6Wm8731E", !19, i64 0, !20, i64 8, !7, i64 20}
!19 = !{!"_ZTSN5daisy9I2CHandleE", !6, i64 0}
!20 = !{!"_ZTSN5daisy6Wm87316ConfigE", !12, i64 0, !12, i64 1, !12, i64 2, !14, i64 4, !16, i64 8}
!21 = !{i8 0, i8 2}
!22 = !{}
!23 = !{!18, !7, i64 20}
!24 = !{!25, !25, i64 0}
!25 = !{!"_ZTSN5daisy6Wm87316ResultE", !7, i64 0}
!26 = !{!7, !7, i64 0}
!27 = !{!18, !12, i64 8}
!28 = !{!18, !14, i64 12}
!29 = !{!18, !16, i64 16}
!30 = !{!18, !12, i64 9}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 2) i32 @_ZN5daisy6Wm87314InitERKNS0_6ConfigENS_9I2CHandleE(ptr noundef nonnull align 8 dereferenceable(21) %0, ptr nocapture noundef nonnull readonly align 4 dereferenceable(12) %1, ptr %2) local_unnamed_addr #0 align 2 {
  store ptr %2, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(12) %4, ptr noundef nonnull align 4 dereferenceable(12) %1, i64 12, i1 false), !tbaa.struct !9
  %5 = getelementptr inbounds i8, ptr %0, i64 10
  %6 = load i8, ptr %5, align 2, !tbaa !16, !range !20, !noundef !21
  %7 = trunc nuw i8 %6 to i1
  %8 = select i1 %7, i8 27, i8 26
  %9 = getelementptr inbounds i8, ptr %0, i64 20
  store i8 %8, ptr %9, align 4, !tbaa !22
  %10 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 15, i16 noundef zeroext 0)
  %.not = icmp eq i32 %10, 0
  br i1 %.not, label %11, label %50

11:                                               ; preds = %3
  %12 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 0, i16 noundef zeroext 23)
  %.not21 = icmp eq i32 %12, 0
  br i1 %.not21, label %13, label %50

13:                                               ; preds = %11
  %14 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 1, i16 noundef zeroext 23)
  %.not22 = icmp eq i32 %14, 0
  br i1 %.not22, label %15, label %50

15:                                               ; preds = %13
  %16 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 2, i16 noundef zeroext 0)
  %.not23 = icmp eq i32 %16, 0
  br i1 %.not23, label %17, label %50

17:                                               ; preds = %15
  %18 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 3, i16 noundef zeroext 0)
  %.not24 = icmp eq i32 %18, 0
  br i1 %.not24, label %19, label %50

19:                                               ; preds = %17
  %20 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 4, i16 noundef zeroext 18)
  %.not25 = icmp eq i32 %20, 0
  br i1 %.not25, label %21, label %50

21:                                               ; preds = %19
  %22 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 5, i16 noundef zeroext 0)
  %.not26 = icmp eq i32 %22, 0
  br i1 %.not26, label %23, label %50

23:                                               ; preds = %21
  %24 = load i8, ptr %4, align 8, !tbaa !23, !range !20, !noundef !21
  %25 = trunc nuw i8 %24 to i1
  %spec.select = select i1 %25, i16 98, i16 66
  %26 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 6, i16 noundef zeroext %spec.select)
  %.not27 = icmp eq i32 %26, 0
  br i1 %.not27, label %27, label %50

27:                                               ; preds = %23
  %28 = getelementptr inbounds i8, ptr %0, i64 12
  %29 = load i32, ptr %28, align 4, !tbaa !24
  %30 = getelementptr inbounds i8, ptr %0, i64 16
  %31 = load i32, ptr %30, align 8, !tbaa !25
  %32 = or i32 %31, %29
  %33 = load i8, ptr %4, align 8, !tbaa !23, !range !20, !noundef !21
  %34 = trunc nuw i8 %33 to i1
  %35 = select i1 %34, i32 0, i32 64
  %36 = or i32 %32, %35
  %37 = trunc i32 %36 to i16
  %38 = getelementptr inbounds i8, ptr %0, i64 9
  %39 = load i8, ptr %38, align 1, !tbaa !26, !range !20, !noundef !21
  %40 = trunc nuw i8 %39 to i1
  %41 = or i16 %37, 32
  %.0 = select i1 %40, i16 %41, i16 %37
  %42 = and i16 %.0, 255
  %43 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 7, i16 noundef zeroext %42)
  %.not28 = icmp eq i32 %43, 0
  br i1 %.not28, label %44, label %50

44:                                               ; preds = %27
  %45 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 8, i16 noundef zeroext 0)
  %.not29 = icmp eq i32 %45, 0
  br i1 %.not29, label %46, label %50

46:                                               ; preds = %44
  %47 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 9, i16 noundef zeroext 0)
  %.not30 = icmp eq i32 %47, 0
  br i1 %.not30, label %48, label %50

48:                                               ; preds = %46
  %49 = tail call noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21) %0, i8 noundef zeroext 9, i16 noundef zeroext 1)
  %.not31 = icmp ne i32 %49, 0
  %. = zext i1 %.not31 to i32
  br label %50

50:                                               ; preds = %23, %48, %46, %44, %27, %21, %19, %17, %15, %13, %11, %3
  %.2 = phi i32 [ 1, %3 ], [ 1, %11 ], [ 1, %13 ], [ 1, %15 ], [ 1, %17 ], [ 1, %19 ], [ 1, %21 ], [ 1, %23 ], [ 1, %27 ], [ 1, %44 ], [ 1, %46 ], [ %., %48 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5daisy6Wm873120WriteControlRegisterEht(ptr noundef nonnull align 8 dereferenceable(21), i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 1, !10, i64 1, i64 1, !10, i64 2, i64 1, !10, i64 4, i64 4, !12, i64 8, i64 4, !14}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTSN5daisy6Wm87316Config6FormatE", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTSN5daisy6Wm87316Config10WordLengthE", !7, i64 0}
!16 = !{!17, !11, i64 10}
!17 = !{!"_ZTSN5daisy6Wm8731E", !18, i64 0, !19, i64 8, !7, i64 20}
!18 = !{!"_ZTSN5daisy9I2CHandleE", !6, i64 0}
!19 = !{!"_ZTSN5daisy6Wm87316ConfigE", !11, i64 0, !11, i64 1, !11, i64 2, !13, i64 4, !15, i64 8}
!20 = !{i8 0, i8 2}
!21 = !{}
!22 = !{!17, !7, i64 20}
!23 = !{!17, !11, i64 8}
!24 = !{!17, !13, i64 12}
!25 = !{!17, !15, i64 16}
!26 = !{!17, !11, i64 9}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass