; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/Feb2021-Long/SUMXOR2.ll (Z5setupv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@f1 = external dso_local global %"class.std::vector.0", align 8
@f2 = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z3mulxx(i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3invx(i64 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5setupv() #2 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef 0) #3
  store i64 1, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #3
  store i64 1, ptr %1, align 8, !tbaa !5
  br label %4

4:                                                ; preds = %17, %0
  %5 = load i64, ptr %1, align 8, !tbaa !5
  %6 = icmp slt i64 %5, 200007
  br i1 %6, label %8, label %7

7:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #3
  br label %20

8:                                                ; preds = %4
  %9 = load i64, ptr %1, align 8, !tbaa !5
  %10 = sub nsw i64 %9, 1
  %11 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef %10) #3
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = load i64, ptr %1, align 8, !tbaa !5
  %14 = call noundef i64 @_Z3mulxx(i64 noundef %12, i64 noundef %13)
  %15 = load i64, ptr %1, align 8, !tbaa !5
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef %15) #3
  store i64 %14, ptr %16, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %8
  %18 = load i64, ptr %1, align 8, !tbaa !5
  %19 = add nsw i64 %18, 1
  store i64 %19, ptr %1, align 8, !tbaa !5
  br label %4, !llvm.loop !9

20:                                               ; preds = %7
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef 200006) #3
  %22 = load i64, ptr %21, align 8, !tbaa !5
  %23 = call noundef i64 @_Z3invx(i64 noundef %22)
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef 200006) #3
  store i64 %23, ptr %24, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  store i64 200005, ptr %2, align 8, !tbaa !5
  br label %25

25:                                               ; preds = %39, %20
  %26 = load i64, ptr %2, align 8, !tbaa !5
  %27 = icmp sge i64 %26, 0
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #3
  br label %42

29:                                               ; preds = %25
  %30 = load i64, ptr %2, align 8, !tbaa !5
  %31 = add nsw i64 %30, 1
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef %31) #3
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = load i64, ptr %2, align 8, !tbaa !5
  %35 = add nsw i64 %34, 1
  %36 = call noundef i64 @_Z3mulxx(i64 noundef %33, i64 noundef %35)
  %37 = load i64, ptr %2, align 8, !tbaa !5
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef %37) #3
  store i64 %36, ptr %38, align 8, !tbaa !5
  br label %39

39:                                               ; preds = %29
  %40 = load i64, ptr %2, align 8, !tbaa !5
  %41 = add nsw i64 %40, -1
  store i64 %41, ptr %2, align 8, !tbaa !5
  br label %25, !llvm.loop !11

42:                                               ; preds = %28
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@f1 = external dso_local global %"class.std::vector.0", align 8
@f2 = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z3mulxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3invx(i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5setupv() local_unnamed_addr #1 {
  %1 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef 0) #2
  store i64 1, ptr %1, align 8, !tbaa !5
  br label %7

2:                                                ; preds = %7
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef 200006) #2
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %5 = tail call noundef i64 @_Z3invx(i64 noundef %4)
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef 200006) #2
  store i64 %5, ptr %6, align 8, !tbaa !5
  br label %15

7:                                                ; preds = %0, %7
  %.01011 = phi i64 [ 1, %0 ], [ %13, %7 ]
  %8 = add nsw i64 %.01011, -1
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef %8) #2
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %11 = tail call noundef i64 @_Z3mulxx(i64 noundef %10, i64 noundef %.01011)
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f1, i64 noundef %.01011) #2
  store i64 %11, ptr %12, align 8, !tbaa !5
  %13 = add nuw nsw i64 %.01011, 1
  %exitcond.not = icmp eq i64 %13, 200007
  br i1 %exitcond.not, label %2, label %7, !llvm.loop !9

14:                                               ; preds = %15
  ret void

15:                                               ; preds = %2, %15
  %.012 = phi i64 [ 200005, %2 ], [ %21, %15 ]
  %16 = add nuw nsw i64 %.012, 1
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef %16) #2
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = tail call noundef i64 @_Z3mulxx(i64 noundef %18, i64 noundef %16)
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @f2, i64 noundef %.012) #2
  store i64 %19, ptr %20, align 8, !tbaa !5
  %21 = add nsw i64 %.012, -1
  %.not = icmp eq i64 %.012, 0
  br i1 %.not, label %14, label %15, !llvm.loop !11
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass