; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ConfigWideBusOperation)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.MMC_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_MMC_CardInfoTypeDef, [4 x i32], [4 x i32], [128 x i32] }
%struct.HAL_MMC_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_GetResponse(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_MMC_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %struct.SDMMC_InitTypeDef, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store volatile i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 20, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %12, i32 0, i32 8
  store volatile i32 3, ptr %13, align 8, !tbaa !11
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = icmp eq i64 %15, 32768
  br i1 %16, label %17, label %31

17:                                               ; preds = %2
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %18, i32 0, i32 0
  %20 = load ptr, ptr %19, align 8, !tbaa !15
  %21 = call i32 @SDMMC_CmdSwitch(ptr noundef %20, i32 noundef 62325248)
  store i32 %21, ptr %8, align 4, !tbaa !9
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %30

24:                                               ; preds = %17
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %26, i32 0, i32 9
  %28 = load volatile i32, ptr %27, align 4, !tbaa !16
  %29 = or i32 %28, %25
  store volatile i32 %29, ptr %27, align 4, !tbaa !16
  br label %30

30:                                               ; preds = %24, %17
  br label %73

31:                                               ; preds = %2
  %32 = load i32, ptr %5, align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  %34 = icmp eq i64 %33, 16384
  br i1 %34, label %35, label %49

35:                                               ; preds = %31
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %36, i32 0, i32 0
  %38 = load ptr, ptr %37, align 8, !tbaa !15
  %39 = call i32 @SDMMC_CmdSwitch(ptr noundef %38, i32 noundef 62324992)
  store i32 %39, ptr %8, align 4, !tbaa !9
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %48

42:                                               ; preds = %35
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %44, i32 0, i32 9
  %46 = load volatile i32, ptr %45, align 4, !tbaa !16
  %47 = or i32 %46, %43
  store volatile i32 %47, ptr %45, align 4, !tbaa !16
  br label %48

48:                                               ; preds = %42, %35
  br label %72

49:                                               ; preds = %31
  %50 = load i32, ptr %5, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %52, label %66

52:                                               ; preds = %49
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %53, i32 0, i32 0
  %55 = load ptr, ptr %54, align 8, !tbaa !15
  %56 = call i32 @SDMMC_CmdSwitch(ptr noundef %55, i32 noundef 0)
  store i32 %56, ptr %8, align 4, !tbaa !9
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = icmp ne i32 %57, 0
  br i1 %58, label %59, label %65

59:                                               ; preds = %52
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %61, i32 0, i32 9
  %63 = load volatile i32, ptr %62, align 4, !tbaa !16
  %64 = or i32 %63, %60
  store volatile i32 %64, ptr %62, align 4, !tbaa !16
  br label %65

65:                                               ; preds = %59, %52
  br label %71

66:                                               ; preds = %49
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %67, i32 0, i32 9
  %69 = load volatile i32, ptr %68, align 4, !tbaa !16
  %70 = or i32 %69, 134217728
  store volatile i32 %70, ptr %68, align 4, !tbaa !16
  br label %71

71:                                               ; preds = %66, %65
  br label %72

72:                                               ; preds = %71, %48
  br label %73

73:                                               ; preds = %72, %30
  br label %74

74:                                               ; preds = %107, %73
  %75 = load i32, ptr %10, align 4, !tbaa !9
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %117

77:                                               ; preds = %74
  %78 = load volatile i32, ptr %6, align 4, !tbaa !9
  %79 = icmp eq i32 %78, 65535
  br i1 %79, label %80, label %87

80:                                               ; preds = %77
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %81, i32 0, i32 8
  store volatile i32 1, ptr %82, align 8, !tbaa !11
  %83 = load ptr, ptr %4, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %83, i32 0, i32 9
  %85 = load volatile i32, ptr %84, align 4, !tbaa !16
  %86 = or i32 %85, 67108864
  store volatile i32 %86, ptr %84, align 4, !tbaa !16
  store i32 1, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %199

87:                                               ; preds = %77
  %88 = load volatile i32, ptr %6, align 4, !tbaa !9
  %89 = add i32 %88, 1
  store volatile i32 %89, ptr %6, align 4, !tbaa !9
  %90 = load ptr, ptr %4, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %90, i32 0, i32 0
  %92 = load ptr, ptr %91, align 8, !tbaa !15
  %93 = load ptr, ptr %4, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %93, i32 0, i32 10
  %95 = getelementptr inbounds %struct.HAL_MMC_CardInfoTypeDef, ptr %94, i32 0, i32 2
  %96 = load i32, ptr %95, align 8, !tbaa !17
  %97 = shl i32 %96, 16
  %98 = call i32 @SDMMC_CmdSendStatus(ptr noundef %92, i32 noundef %97)
  store i32 %98, ptr %8, align 4, !tbaa !9
  %99 = load i32, ptr %8, align 4, !tbaa !9
  %100 = icmp ne i32 %99, 0
  br i1 %100, label %101, label %107

101:                                              ; preds = %87
  %102 = load i32, ptr %8, align 4, !tbaa !9
  %103 = load ptr, ptr %4, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %103, i32 0, i32 9
  %105 = load volatile i32, ptr %104, align 4, !tbaa !16
  %106 = or i32 %105, %102
  store volatile i32 %106, ptr %104, align 4, !tbaa !16
  br label %107

107:                                              ; preds = %101, %87
  %108 = load ptr, ptr %4, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %108, i32 0, i32 0
  %110 = load ptr, ptr %109, align 8, !tbaa !15
  %111 = call i32 @SDMMC_GetResponse(ptr noundef %110, i32 noundef 0)
  store i32 %111, ptr %9, align 4, !tbaa !9
  %112 = load i32, ptr %9, align 4, !tbaa !9
  %113 = lshr i32 %112, 7
  %114 = icmp eq i32 %113, 1
  %115 = zext i1 %114 to i64
  %116 = select i1 %114, i32 0, i32 1
  store i32 %116, ptr %10, align 4, !tbaa !9
  br label %74, !llvm.loop !18

117:                                              ; preds = %74
  store volatile i32 -1, ptr %6, align 4, !tbaa !9
  br label %118

118:                                              ; preds = %152, %117
  %119 = load i32, ptr %9, align 4, !tbaa !9
  %120 = and i32 %119, 256
  %121 = icmp eq i32 %120, 0
  br i1 %121, label %122, label %157

122:                                              ; preds = %118
  %123 = load volatile i32, ptr %6, align 4, !tbaa !9
  %124 = icmp eq i32 %123, 0
  br i1 %124, label %125, label %132

125:                                              ; preds = %122
  %126 = load ptr, ptr %4, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %126, i32 0, i32 8
  store volatile i32 1, ptr %127, align 8, !tbaa !11
  %128 = load ptr, ptr %4, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %128, i32 0, i32 9
  %130 = load volatile i32, ptr %129, align 4, !tbaa !16
  %131 = or i32 %130, 67108864
  store volatile i32 %131, ptr %129, align 4, !tbaa !16
  store i32 1, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %199

132:                                              ; preds = %122
  %133 = load volatile i32, ptr %6, align 4, !tbaa !9
  %134 = add i32 %133, -1
  store volatile i32 %134, ptr %6, align 4, !tbaa !9
  %135 = load ptr, ptr %4, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %135, i32 0, i32 0
  %137 = load ptr, ptr %136, align 8, !tbaa !15
  %138 = load ptr, ptr %4, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %138, i32 0, i32 10
  %140 = getelementptr inbounds %struct.HAL_MMC_CardInfoTypeDef, ptr %139, i32 0, i32 2
  %141 = load i32, ptr %140, align 8, !tbaa !17
  %142 = shl i32 %141, 16
  %143 = call i32 @SDMMC_CmdSendStatus(ptr noundef %137, i32 noundef %142)
  store i32 %143, ptr %8, align 4, !tbaa !9
  %144 = load i32, ptr %8, align 4, !tbaa !9
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %146, label %152

146:                                              ; preds = %132
  %147 = load i32, ptr %8, align 4, !tbaa !9
  %148 = load ptr, ptr %4, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %148, i32 0, i32 9
  %150 = load volatile i32, ptr %149, align 4, !tbaa !16
  %151 = or i32 %150, %147
  store volatile i32 %151, ptr %149, align 4, !tbaa !16
  br label %152

152:                                              ; preds = %146, %132
  %153 = load ptr, ptr %4, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %153, i32 0, i32 0
  %155 = load ptr, ptr %154, align 8, !tbaa !15
  %156 = call i32 @SDMMC_GetResponse(ptr noundef %155, i32 noundef 0)
  store i32 %156, ptr %9, align 4, !tbaa !9
  br label %118, !llvm.loop !20

157:                                              ; preds = %118
  %158 = load ptr, ptr %4, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %158, i32 0, i32 9
  %160 = load volatile i32, ptr %159, align 4, !tbaa !16
  %161 = icmp ne i32 %160, 0
  br i1 %161, label %162, label %169

162:                                              ; preds = %157
  %163 = load ptr, ptr %4, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %163, i32 0, i32 0
  %165 = load ptr, ptr %164, align 8, !tbaa !15
  %166 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %165, i32 0, i32 14
  store volatile i32 534777855, ptr %166, align 4, !tbaa !21
  %167 = load ptr, ptr %4, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %167, i32 0, i32 8
  store volatile i32 1, ptr %168, align 8, !tbaa !11
  store i32 1, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %199

169:                                              ; preds = %157
  %170 = load ptr, ptr %4, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %170, i32 0, i32 1
  %172 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %171, i32 0, i32 0
  %173 = load i32, ptr %172, align 8, !tbaa !23
  %174 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %7, i32 0, i32 0
  store i32 %173, ptr %174, align 4, !tbaa !24
  %175 = load ptr, ptr %4, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %175, i32 0, i32 1
  %177 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %176, i32 0, i32 1
  %178 = load i32, ptr %177, align 4, !tbaa !25
  %179 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %7, i32 0, i32 1
  store i32 %178, ptr %179, align 4, !tbaa !26
  %180 = load i32, ptr %5, align 4, !tbaa !9
  %181 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %7, i32 0, i32 2
  store i32 %180, ptr %181, align 4, !tbaa !27
  %182 = load ptr, ptr %4, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %182, i32 0, i32 1
  %184 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %183, i32 0, i32 3
  %185 = load i32, ptr %184, align 4, !tbaa !28
  %186 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %7, i32 0, i32 3
  store i32 %185, ptr %186, align 4, !tbaa !29
  %187 = load ptr, ptr %4, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %187, i32 0, i32 1
  %189 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %188, i32 0, i32 4
  %190 = load i32, ptr %189, align 8, !tbaa !30
  %191 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %7, i32 0, i32 4
  store i32 %190, ptr %191, align 4, !tbaa !31
  %192 = load ptr, ptr %4, align 8, !tbaa !5
  %193 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %192, i32 0, i32 0
  %194 = load ptr, ptr %193, align 8, !tbaa !15
  %195 = call i32 @SDMMC_Init(ptr noundef %194, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8 %7)
  br label %196

196:                                              ; preds = %169
  %197 = load ptr, ptr %4, align 8, !tbaa !5
  %198 = getelementptr inbounds %struct.MMC_HandleTypeDef, ptr %197, i32 0, i32 8
  store volatile i32 1, ptr %198, align 8, !tbaa !11
  store i32 0, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %199

199:                                              ; preds = %196, %162, %125, %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 20, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %200 = load i32, ptr %3, align 4
  ret i32 %200
}

declare i32 @SDMMC_CmdSwitch(ptr noundef, i32 noundef) #1

declare i32 @SDMMC_CmdSendStatus(ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 100, !7, i64 116, !7, i64 132}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!15 = !{!12, !6, i64 0}
!16 = !{!12, !10, i64 68}
!17 = !{!12, !10, i64 80}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
!21 = !{!22, !10, i64 56}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!23 = !{!12, !10, i64 8}
!24 = !{!13, !10, i64 0}
!25 = !{!12, !10, i64 12}
!26 = !{!13, !10, i64 4}
!27 = !{!13, !10, i64 8}
!28 = !{!12, !10, i64 20}
!29 = !{!13, !10, i64 12}
!30 = !{!12, !10, i64 24}
!31 = !{!13, !10, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_GetResponse(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_MMC_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) local_unnamed_addr #2 {
  %3 = alloca i32, align 4
  %4 = alloca %struct.SDMMC_InitTypeDef, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %4) #3
  %5 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 3, ptr %5, align 8, !tbaa !9
  switch i32 %1, label %.sink.split [
    i32 32768, label %6
    i32 16384, label %9
    i32 0, label %12
  ]

6:                                                ; preds = %2
  %7 = load ptr, ptr %0, align 8, !tbaa !14
  %8 = tail call i32 @SDMMC_CmdSwitch(ptr noundef %7, i32 noundef 62325248) #3
  %.not59 = icmp eq i32 %8, 0
  br i1 %.not59, label %18, label %.sink.split

9:                                                ; preds = %2
  %10 = load ptr, ptr %0, align 8, !tbaa !14
  %11 = tail call i32 @SDMMC_CmdSwitch(ptr noundef %10, i32 noundef 62324992) #3
  %.not58 = icmp eq i32 %11, 0
  br i1 %.not58, label %18, label %.sink.split

12:                                               ; preds = %2
  %13 = load ptr, ptr %0, align 8, !tbaa !14
  %14 = tail call i32 @SDMMC_CmdSwitch(ptr noundef %13, i32 noundef 0) #3
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %18, label %.sink.split

.sink.split:                                      ; preds = %2, %12, %9, %6
  %.sink66 = phi i32 [ %8, %6 ], [ %11, %9 ], [ %14, %12 ], [ 134217728, %2 ]
  %15 = getelementptr inbounds i8, ptr %0, i64 68
  %16 = load volatile i32, ptr %15, align 4, !tbaa !15
  %17 = or i32 %16, %.sink66
  store volatile i32 %17, ptr %15, align 4, !tbaa !15
  br label %18

18:                                               ; preds = %.sink.split, %9, %12, %6
  %19 = getelementptr inbounds i8, ptr %0, i64 80
  %20 = getelementptr inbounds i8, ptr %0, i64 68
  br label %21

21:                                               ; preds = %18, %35
  %.0..0..0..0. = load volatile i32, ptr %3, align 4, !tbaa !5
  %22 = icmp eq i32 %.0..0..0..0., 65535
  br i1 %22, label %23, label %26

23:                                               ; preds = %21
  store volatile i32 1, ptr %5, align 8, !tbaa !9
  %24 = load volatile i32, ptr %20, align 4, !tbaa !15
  %25 = or i32 %24, 67108864
  store volatile i32 %25, ptr %20, align 4, !tbaa !15
  br label %73

26:                                               ; preds = %21
  %.0..0..0..0.13 = load volatile i32, ptr %3, align 4, !tbaa !5
  %27 = add i32 %.0..0..0..0.13, 1
  store volatile i32 %27, ptr %3, align 4, !tbaa !5
  %28 = load ptr, ptr %0, align 8, !tbaa !14
  %29 = load i32, ptr %19, align 8, !tbaa !16
  %30 = shl i32 %29, 16
  %31 = tail call i32 @SDMMC_CmdSendStatus(ptr noundef %28, i32 noundef %30) #3
  %.not62 = icmp eq i32 %31, 0
  br i1 %.not62, label %35, label %32

32:                                               ; preds = %26
  %33 = load volatile i32, ptr %20, align 4, !tbaa !15
  %34 = or i32 %33, %31
  store volatile i32 %34, ptr %20, align 4, !tbaa !15
  br label %35

35:                                               ; preds = %32, %26
  %36 = load ptr, ptr %0, align 8, !tbaa !14
  %37 = tail call i32 @SDMMC_GetResponse(ptr noundef %36, i32 noundef 0) #3
  %.mask = and i32 %37, -128
  %38 = icmp eq i32 %.mask, 128
  br i1 %38, label %21, label %39, !llvm.loop !17

39:                                               ; preds = %35
  store volatile i32 -1, ptr %3, align 4, !tbaa !5
  %40 = and i32 %37, 256
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %39, %55
  %.0..0..0..0.14 = load volatile i32, ptr %3, align 4, !tbaa !5
  %42 = icmp eq i32 %.0..0..0..0.14, 0
  br i1 %42, label %43, label %46

43:                                               ; preds = %.lr.ph
  store volatile i32 1, ptr %5, align 8, !tbaa !9
  %44 = load volatile i32, ptr %20, align 4, !tbaa !15
  %45 = or i32 %44, 67108864
  store volatile i32 %45, ptr %20, align 4, !tbaa !15
  br label %73

46:                                               ; preds = %.lr.ph
  %.0..0..0..0.15 = load volatile i32, ptr %3, align 4, !tbaa !5
  %47 = add i32 %.0..0..0..0.15, -1
  store volatile i32 %47, ptr %3, align 4, !tbaa !5
  %48 = load ptr, ptr %0, align 8, !tbaa !14
  %49 = load i32, ptr %19, align 8, !tbaa !16
  %50 = shl i32 %49, 16
  %51 = tail call i32 @SDMMC_CmdSendStatus(ptr noundef %48, i32 noundef %50) #3
  %.not61 = icmp eq i32 %51, 0
  br i1 %.not61, label %55, label %52

52:                                               ; preds = %46
  %53 = load volatile i32, ptr %20, align 4, !tbaa !15
  %54 = or i32 %53, %51
  store volatile i32 %54, ptr %20, align 4, !tbaa !15
  br label %55

55:                                               ; preds = %52, %46
  %56 = load ptr, ptr %0, align 8, !tbaa !14
  %57 = tail call i32 @SDMMC_GetResponse(ptr noundef %56, i32 noundef 0) #3
  %58 = and i32 %57, 256
  %59 = icmp eq i32 %58, 0
  br i1 %59, label %.lr.ph, label %._crit_edge, !llvm.loop !19

._crit_edge:                                      ; preds = %55, %39
  %60 = load volatile i32, ptr %20, align 4, !tbaa !15
  %.not60 = icmp eq i32 %60, 0
  br i1 %.not60, label %64, label %61

61:                                               ; preds = %._crit_edge
  %62 = load ptr, ptr %0, align 8, !tbaa !14
  %63 = getelementptr inbounds i8, ptr %62, i64 56
  store volatile i32 534777855, ptr %63, align 4, !tbaa !20
  store volatile i32 1, ptr %5, align 8, !tbaa !9
  br label %73

64:                                               ; preds = %._crit_edge
  %65 = getelementptr inbounds i8, ptr %0, i64 8
  %66 = load <2 x i32>, ptr %65, align 8, !tbaa !5
  store <2 x i32> %66, ptr %4, align 8, !tbaa !5
  %67 = getelementptr inbounds i8, ptr %4, i64 8
  store i32 %1, ptr %67, align 8, !tbaa !22
  %68 = getelementptr inbounds i8, ptr %0, i64 20
  %69 = getelementptr inbounds i8, ptr %4, i64 12
  %70 = load <2 x i32>, ptr %68, align 4, !tbaa !5
  store <2 x i32> %70, ptr %69, align 4, !tbaa !5
  %71 = load ptr, ptr %0, align 8, !tbaa !14
  %72 = tail call i32 @SDMMC_Init(ptr noundef %71, ptr noundef nonnull byval(%struct.SDMMC_InitTypeDef) align 8 %4) #3
  store volatile i32 1, ptr %5, align 8, !tbaa !9
  br label %73

73:                                               ; preds = %64, %61, %43, %23
  %.051 = phi i32 [ 1, %23 ], [ 1, %43 ], [ 1, %61 ], [ 0, %64 ]
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  ret i32 %.051
}

declare i32 @SDMMC_CmdSwitch(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_CmdSendStatus(ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 64}
!10 = !{!"", !11, i64 0, !12, i64 8, !6, i64 28, !11, i64 32, !6, i64 40, !11, i64 48, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !13, i64 72, !7, i64 100, !7, i64 116, !7, i64 132}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!13 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24}
!14 = !{!10, !11, i64 0}
!15 = !{!10, !6, i64 68}
!16 = !{!10, !6, i64 80}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = !{!21, !6, i64 56}
!21 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !7, i64 68, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !7, i64 96, !6, i64 128, !7, i64 132, !6, i64 1020}
!22 = !{!12, !6, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass