; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/DSNetwork.ll (ZN9DSNetwork5cycleEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }
%class.DSNetwork = type { %class.Unit, i32, i32, i32, %"class.std::map", %"class.std::map.3", ptr }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, DSwitch *>, std::_Select1st<std::pair<const std::pair<int, int>, DSwitch *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, DSwitch *>, std::_Select1st<std::pair<const std::pair<int, int>, DSwitch *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.3" = type { %"class.std::_Rb_tree.4" }
%"class.std::_Rb_tree.4" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, Connection *>, std::_Select1st<std::pair<const std::pair<int, int>, Connection *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, Connection *>, std::_Select1st<std::pair<const std::pair<int, int>, Connection *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEEixERS6_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9DSNetwork5cycleEv(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"struct.std::pair", align 4
  %8 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 1, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %36, %1
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = getelementptr inbounds %class.DSNetwork, ptr %9, i32 0, i32 3
  %13 = load i32, ptr %12, align 8, !tbaa !11
  %14 = icmp slt i32 %11, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %10
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %39

16:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %30, %16
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = load i32, ptr %3, align 4, !tbaa !9
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %17
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %33

22:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %23 = getelementptr inbounds %class.DSNetwork, ptr %9, i32 0, i32 4
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEEixERS6_(ptr noundef nonnull align 8 dereferenceable(48) %23, ptr noundef nonnull align 4 dereferenceable(8) %7)
  %25 = load ptr, ptr %24, align 8, !tbaa !5
  store ptr %25, ptr %8, align 8, !tbaa !5
  %26 = load ptr, ptr %8, align 8, !tbaa !5
  %27 = load ptr, ptr %26, align 8, !tbaa !28
  %28 = getelementptr inbounds ptr, ptr %27, i64 2
  %29 = load ptr, ptr %28, align 8
  call void %29(ptr noundef nonnull align 8 dereferenceable(184) %26)
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %30

30:                                               ; preds = %22
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %6, align 4, !tbaa !9
  br label %17, !llvm.loop !30

33:                                               ; preds = %21
  %34 = load i32, ptr %3, align 4, !tbaa !9
  %35 = mul nsw i32 %34, 2
  store i32 %35, ptr %3, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %33
  %37 = load i32, ptr %4, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %4, align 4, !tbaa !9
  br label %10, !llvm.loop !32

39:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 56}
!12 = !{!"_ZTS9DSNetwork", !13, i64 0, !10, i64 48, !10, i64 52, !10, i64 56, !17, i64 64, !25, i64 112, !6, i64 160}
!13 = !{!"_ZTS4Unit", !10, i64 8, !14, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !16, i64 8, !7, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTSSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE", !18, i64 0}
!18 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P7DSwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !19, i64 0}
!19 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P7DSwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !20, i64 0, !22, i64 8}
!20 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !21, i64 0}
!21 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!22 = !{!"_ZTSSt15_Rb_tree_header", !23, i64 0, !16, i64 32}
!23 = !{!"_ZTSSt18_Rb_tree_node_base", !24, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!24 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!25 = !{!"_ZTSSt3mapISt4pairIiiEP10ConnectionSt4lessIS1_ESaIS0_IKS1_S3_EEE", !26, i64 0}
!26 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !20, i64 0, !22, i64 8}
!28 = !{!29, !29, i64 0}
!29 = !{!"vtable pointer", !8, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = distinct !{!32, !31}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEEixERS6_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9DSNetwork5cycleEv(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #2 align 2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %"struct.std::pair", align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  %5 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 0, ptr %2, align 4, !tbaa !5
  %6 = load i32, ptr %5, align 8, !tbaa !9
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph6, label %._crit_edge7

.lr.ph6:                                          ; preds = %1
  %8 = getelementptr inbounds i8, ptr %0, i64 64
  br label %9

._crit_edge7:                                     ; preds = %._crit_edge, %1
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret void

9:                                                ; preds = %.lr.ph6, %._crit_edge
  %10 = phi i32 [ %6, %.lr.ph6 ], [ %13, %._crit_edge ]
  %11 = phi i32 [ 0, %.lr.ph6 ], [ %16, %._crit_edge ]
  %.04 = phi i32 [ 1, %.lr.ph6 ], [ %15, %._crit_edge ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  %12 = icmp sgt i32 %.04, 0
  br i1 %12, label %.lr.ph, label %._crit_edge

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %.pre = load i32, ptr %2, align 4, !tbaa !5
  %.pre8 = load i32, ptr %5, align 8, !tbaa !9
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %9
  %13 = phi i32 [ %.pre8, %._crit_edge.loopexit ], [ %10, %9 ]
  %14 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %11, %9 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  %15 = shl nsw i32 %.04, 1
  %16 = add nsw i32 %14, 1
  store i32 %16, ptr %2, align 4, !tbaa !5
  %17 = icmp slt i32 %16, %13
  br i1 %17, label %9, label %._crit_edge7, !llvm.loop !27

.lr.ph:                                           ; preds = %9, %.lr.ph
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %4, ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %18 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEEixERS6_(ptr noundef nonnull align 8 dereferenceable(48) %8, ptr noundef nonnull align 4 dereferenceable(8) %4)
  %19 = load ptr, ptr %18, align 8, !tbaa !29
  %20 = load ptr, ptr %19, align 8, !tbaa !30
  %21 = getelementptr inbounds i8, ptr %20, i64 16
  %22 = load ptr, ptr %21, align 8
  call void %22(ptr noundef nonnull align 8 dereferenceable(184) %19)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %3, align 4, !tbaa !5
  %25 = icmp slt i32 %24, %.04
  br i1 %25, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !32
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 56}
!10 = !{!"_ZTS9DSNetwork", !11, i64 0, !6, i64 48, !6, i64 52, !6, i64 56, !16, i64 64, !24, i64 112, !14, i64 160}
!11 = !{!"_ZTS4Unit", !6, i64 8, !12, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !15, i64 8, !7, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt3mapISt4pairIiiEP7DSwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE", !17, i64 0}
!17 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P7DSwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !18, i64 0}
!18 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P7DSwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !19, i64 0, !21, i64 8}
!19 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !20, i64 0}
!20 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!21 = !{!"_ZTSSt15_Rb_tree_header", !22, i64 0, !15, i64 32}
!22 = !{!"_ZTSSt18_Rb_tree_node_base", !23, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!23 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!24 = !{!"_ZTSSt3mapISt4pairIiiEP10ConnectionSt4lessIS1_ESaIS0_IKS1_S3_EEE", !25, i64 0}
!25 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !26, i64 0}
!26 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !19, i64 0, !21, i64 8}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = !{!14, !14, i64 0}
!30 = !{!31, !31, i64 0}
!31 = !{!"vtable pointer", !8, i64 0}
!32 = distinct !{!32, !28}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass