; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ReadStop)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.TIM_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_DMA_Abort_IT(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_TIM_DMABurst_ReadStop(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  %6 = load i32, ptr %4, align 4, !tbaa !9
  switch i32 %6, label %49 [
    i32 256, label %7
    i32 512, label %13
    i32 1024, label %19
    i32 2048, label %25
    i32 4096, label %31
    i32 8192, label %37
    i32 16384, label %43
  ]

7:                                                ; preds = %2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %8, i32 0, i32 3
  %10 = getelementptr inbounds [7 x ptr], ptr %9, i64 0, i64 0
  %11 = load ptr, ptr %10, align 8, !tbaa !5
  %12 = call i32 @HAL_DMA_Abort_IT(ptr noundef %11)
  store i32 %12, ptr %5, align 4, !tbaa !9
  br label %50

13:                                               ; preds = %2
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %14, i32 0, i32 3
  %16 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 1
  %17 = load ptr, ptr %16, align 8, !tbaa !5
  %18 = call i32 @HAL_DMA_Abort_IT(ptr noundef %17)
  store i32 %18, ptr %5, align 4, !tbaa !9
  br label %50

19:                                               ; preds = %2
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %20, i32 0, i32 3
  %22 = getelementptr inbounds [7 x ptr], ptr %21, i64 0, i64 2
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = call i32 @HAL_DMA_Abort_IT(ptr noundef %23)
  store i32 %24, ptr %5, align 4, !tbaa !9
  br label %50

25:                                               ; preds = %2
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %26, i32 0, i32 3
  %28 = getelementptr inbounds [7 x ptr], ptr %27, i64 0, i64 3
  %29 = load ptr, ptr %28, align 8, !tbaa !5
  %30 = call i32 @HAL_DMA_Abort_IT(ptr noundef %29)
  store i32 %30, ptr %5, align 4, !tbaa !9
  br label %50

31:                                               ; preds = %2
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %32, i32 0, i32 3
  %34 = getelementptr inbounds [7 x ptr], ptr %33, i64 0, i64 4
  %35 = load ptr, ptr %34, align 8, !tbaa !5
  %36 = call i32 @HAL_DMA_Abort_IT(ptr noundef %35)
  store i32 %36, ptr %5, align 4, !tbaa !9
  br label %50

37:                                               ; preds = %2
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %38, i32 0, i32 3
  %40 = getelementptr inbounds [7 x ptr], ptr %39, i64 0, i64 5
  %41 = load ptr, ptr %40, align 8, !tbaa !5
  %42 = call i32 @HAL_DMA_Abort_IT(ptr noundef %41)
  store i32 %42, ptr %5, align 4, !tbaa !9
  br label %50

43:                                               ; preds = %2
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %44, i32 0, i32 3
  %46 = getelementptr inbounds [7 x ptr], ptr %45, i64 0, i64 6
  %47 = load ptr, ptr %46, align 8, !tbaa !5
  %48 = call i32 @HAL_DMA_Abort_IT(ptr noundef %47)
  store i32 %48, ptr %5, align 4, !tbaa !9
  br label %50

49:                                               ; preds = %2
  br label %50

50:                                               ; preds = %49, %43, %37, %31, %25, %19, %13, %7
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = icmp eq i32 0, %51
  br i1 %52, label %53, label %62

53:                                               ; preds = %50
  %54 = load i32, ptr %4, align 4, !tbaa !9
  %55 = xor i32 %54, -1
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %56, i32 0, i32 0
  %58 = load ptr, ptr %57, align 8, !tbaa !11
  %59 = getelementptr inbounds %struct.TIM_TypeDef, ptr %58, i32 0, i32 3
  %60 = load volatile i32, ptr %59, align 4, !tbaa !14
  %61 = and i32 %60, %55
  store volatile i32 %61, ptr %59, align 4, !tbaa !14
  br label %62

62:                                               ; preds = %53, %50
  %63 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %63
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 32, !7, i64 40, !10, i64 96, !10, i64 100}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!14 = !{!15, !10, i64 12}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_DMA_Abort_IT(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_TIM_DMABurst_ReadStop(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #1 {
  switch i32 %1, label %.thread [
    i32 256, label %9
    i32 512, label %3
    i32 1024, label %4
    i32 2048, label %5
    i32 4096, label %6
    i32 8192, label %7
    i32 16384, label %8
  ]

3:                                                ; preds = %2
  br label %9

4:                                                ; preds = %2
  br label %9

5:                                                ; preds = %2
  br label %9

6:                                                ; preds = %2
  br label %9

7:                                                ; preds = %2
  br label %9

8:                                                ; preds = %2
  br label %9

9:                                                ; preds = %2, %8, %7, %6, %5, %4, %3
  %.sink = phi i64 [ 88, %8 ], [ 80, %7 ], [ 72, %6 ], [ 64, %5 ], [ 56, %4 ], [ 48, %3 ], [ 40, %2 ]
  %10 = getelementptr inbounds i8, ptr %0, i64 %.sink
  %11 = load ptr, ptr %10, align 8, !tbaa !5
  %12 = tail call i32 @HAL_DMA_Abort_IT(ptr noundef %11) #2
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %.thread, label %19

.thread:                                          ; preds = %2, %9
  %14 = xor i32 %1, -1
  %15 = load ptr, ptr %0, align 8, !tbaa !9
  %16 = getelementptr inbounds i8, ptr %15, i64 12
  %17 = load volatile i32, ptr %16, align 4, !tbaa !13
  %18 = and i32 %17, %14
  store volatile i32 %18, ptr %16, align 4, !tbaa !13
  br label %19

19:                                               ; preds = %.thread, %9
  %.012 = phi i32 [ 0, %.thread ], [ %12, %9 ]
  ret i32 %.012
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 32, !7, i64 40, !12, i64 96, !12, i64 100}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 12}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass