; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (TamperTimeStampIRQHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EXTI_Core_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RTCEx_TamperTimeStampIRQHandler(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  store volatile i32 262144, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %3, i32 0, i32 0
  %5 = load ptr, ptr %4, align 8, !tbaa !12
  %6 = getelementptr inbounds %struct.RTC_TypeDef, ptr %5, i32 0, i32 2
  %7 = load volatile i32, ptr %6, align 4, !tbaa !15
  %8 = zext i32 %7 to i64
  %9 = and i64 %8, 32768
  %10 = icmp ne i64 %9, 0
  %11 = zext i1 %10 to i64
  %12 = select i1 %10, i32 1, i32 0
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %42

14:                                               ; preds = %1
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %15, i32 0, i32 0
  %17 = load ptr, ptr %16, align 8, !tbaa !12
  %18 = getelementptr inbounds %struct.RTC_TypeDef, ptr %17, i32 0, i32 3
  %19 = load volatile i32, ptr %18, align 4, !tbaa !17
  %20 = zext i32 %19 to i64
  %21 = and i64 %20, 2048
  %22 = icmp ne i64 %21, 0
  %23 = zext i1 %22 to i64
  %24 = select i1 %22, i32 1, i32 0
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %41

26:                                               ; preds = %14
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_RTCEx_TimeStampEventCallback(ptr noundef %27)
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !12
  %31 = getelementptr inbounds %struct.RTC_TypeDef, ptr %30, i32 0, i32 3
  %32 = load volatile i32, ptr %31, align 4, !tbaa !17
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, 128
  %35 = or i64 -2177, %34
  %36 = trunc i64 %35 to i32
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !12
  %40 = getelementptr inbounds %struct.RTC_TypeDef, ptr %39, i32 0, i32 3
  store volatile i32 %36, ptr %40, align 4, !tbaa !17
  br label %41

41:                                               ; preds = %26, %14
  br label %42

42:                                               ; preds = %41, %1
  %43 = load ptr, ptr %2, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !12
  %46 = getelementptr inbounds %struct.RTC_TypeDef, ptr %45, i32 0, i32 16
  %47 = load volatile i32, ptr %46, align 4, !tbaa !18
  %48 = zext i32 %47 to i64
  %49 = and i64 %48, 65540
  %50 = icmp ne i64 %49, 0
  %51 = zext i1 %50 to i64
  %52 = select i1 %50, i32 1, i32 0
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %82

54:                                               ; preds = %42
  %55 = load ptr, ptr %2, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !12
  %58 = getelementptr inbounds %struct.RTC_TypeDef, ptr %57, i32 0, i32 3
  %59 = load volatile i32, ptr %58, align 4, !tbaa !17
  %60 = zext i32 %59 to i64
  %61 = and i64 %60, 8192
  %62 = icmp ne i64 %61, 0
  %63 = zext i1 %62 to i64
  %64 = select i1 %62, i32 1, i32 0
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %81

66:                                               ; preds = %54
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_RTCEx_Tamper1EventCallback(ptr noundef %67)
  %68 = load ptr, ptr %2, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %68, i32 0, i32 0
  %70 = load ptr, ptr %69, align 8, !tbaa !12
  %71 = getelementptr inbounds %struct.RTC_TypeDef, ptr %70, i32 0, i32 3
  %72 = load volatile i32, ptr %71, align 4, !tbaa !17
  %73 = zext i32 %72 to i64
  %74 = and i64 %73, 128
  %75 = or i64 -8321, %74
  %76 = trunc i64 %75 to i32
  %77 = load ptr, ptr %2, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %77, i32 0, i32 0
  %79 = load ptr, ptr %78, align 8, !tbaa !12
  %80 = getelementptr inbounds %struct.RTC_TypeDef, ptr %79, i32 0, i32 3
  store volatile i32 %76, ptr %80, align 4, !tbaa !17
  br label %81

81:                                               ; preds = %66, %54
  br label %82

82:                                               ; preds = %81, %42
  %83 = load ptr, ptr %2, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %83, i32 0, i32 0
  %85 = load ptr, ptr %84, align 8, !tbaa !12
  %86 = getelementptr inbounds %struct.RTC_TypeDef, ptr %85, i32 0, i32 16
  %87 = load volatile i32, ptr %86, align 4, !tbaa !18
  %88 = zext i32 %87 to i64
  %89 = and i64 %88, 524292
  %90 = icmp ne i64 %89, 0
  %91 = zext i1 %90 to i64
  %92 = select i1 %90, i32 1, i32 0
  %93 = icmp ne i32 %92, 0
  br i1 %93, label %94, label %122

94:                                               ; preds = %82
  %95 = load ptr, ptr %2, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %95, i32 0, i32 0
  %97 = load ptr, ptr %96, align 8, !tbaa !12
  %98 = getelementptr inbounds %struct.RTC_TypeDef, ptr %97, i32 0, i32 3
  %99 = load volatile i32, ptr %98, align 4, !tbaa !17
  %100 = zext i32 %99 to i64
  %101 = and i64 %100, 16384
  %102 = icmp ne i64 %101, 0
  %103 = zext i1 %102 to i64
  %104 = select i1 %102, i32 1, i32 0
  %105 = icmp ne i32 %104, 0
  br i1 %105, label %106, label %121

106:                                              ; preds = %94
  %107 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_RTCEx_Tamper2EventCallback(ptr noundef %107)
  %108 = load ptr, ptr %2, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %108, i32 0, i32 0
  %110 = load ptr, ptr %109, align 8, !tbaa !12
  %111 = getelementptr inbounds %struct.RTC_TypeDef, ptr %110, i32 0, i32 3
  %112 = load volatile i32, ptr %111, align 4, !tbaa !17
  %113 = zext i32 %112 to i64
  %114 = and i64 %113, 128
  %115 = or i64 -16513, %114
  %116 = trunc i64 %115 to i32
  %117 = load ptr, ptr %2, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %117, i32 0, i32 0
  %119 = load ptr, ptr %118, align 8, !tbaa !12
  %120 = getelementptr inbounds %struct.RTC_TypeDef, ptr %119, i32 0, i32 3
  store volatile i32 %116, ptr %120, align 4, !tbaa !17
  br label %121

121:                                              ; preds = %106, %94
  br label %122

122:                                              ; preds = %121, %82
  %123 = load ptr, ptr %2, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %123, i32 0, i32 0
  %125 = load ptr, ptr %124, align 8, !tbaa !12
  %126 = getelementptr inbounds %struct.RTC_TypeDef, ptr %125, i32 0, i32 16
  %127 = load volatile i32, ptr %126, align 4, !tbaa !18
  %128 = zext i32 %127 to i64
  %129 = and i64 %128, 4194308
  %130 = icmp ne i64 %129, 0
  %131 = zext i1 %130 to i64
  %132 = select i1 %130, i32 1, i32 0
  %133 = icmp ne i32 %132, 0
  br i1 %133, label %134, label %162

134:                                              ; preds = %122
  %135 = load ptr, ptr %2, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %135, i32 0, i32 0
  %137 = load ptr, ptr %136, align 8, !tbaa !12
  %138 = getelementptr inbounds %struct.RTC_TypeDef, ptr %137, i32 0, i32 3
  %139 = load volatile i32, ptr %138, align 4, !tbaa !17
  %140 = zext i32 %139 to i64
  %141 = and i64 %140, 32768
  %142 = icmp ne i64 %141, 0
  %143 = zext i1 %142 to i64
  %144 = select i1 %142, i32 1, i32 0
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %146, label %161

146:                                              ; preds = %134
  %147 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_RTCEx_Tamper3EventCallback(ptr noundef %147)
  %148 = load ptr, ptr %2, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %148, i32 0, i32 0
  %150 = load ptr, ptr %149, align 8, !tbaa !12
  %151 = getelementptr inbounds %struct.RTC_TypeDef, ptr %150, i32 0, i32 3
  %152 = load volatile i32, ptr %151, align 4, !tbaa !17
  %153 = zext i32 %152 to i64
  %154 = and i64 %153, 128
  %155 = or i64 -32897, %154
  %156 = trunc i64 %155 to i32
  %157 = load ptr, ptr %2, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %157, i32 0, i32 0
  %159 = load ptr, ptr %158, align 8, !tbaa !12
  %160 = getelementptr inbounds %struct.RTC_TypeDef, ptr %159, i32 0, i32 3
  store volatile i32 %156, ptr %160, align 4, !tbaa !17
  br label %161

161:                                              ; preds = %146, %134
  br label %162

162:                                              ; preds = %161, %122
  %163 = load ptr, ptr %2, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %163, i32 0, i32 3
  store volatile i32 1, ptr %164, align 8, !tbaa !19
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_TimeStampEventCallback(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper1EventCallback(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper2EventCallback(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper3EventCallback(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"", !6, i64 0, !14, i64 8, !11, i64 36, !11, i64 40}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!15 = !{!16, !11, i64 8}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204}
!17 = !{!16, !11, i64 12}
!18 = !{!16, !11, i64 64}
!19 = !{!13, !11, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RTCEx_TamperTimeStampIRQHandler(ptr noundef %0) local_unnamed_addr #0 {
  store volatile i32 262144, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !5
  %2 = load ptr, ptr %0, align 8, !tbaa !10
  %3 = getelementptr inbounds i8, ptr %2, i64 8
  %4 = load volatile i32, ptr %3, align 4, !tbaa !14
  %5 = and i32 %4, 32768
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %16, label %6

6:                                                ; preds = %1
  %7 = getelementptr inbounds i8, ptr %2, i64 12
  %8 = load volatile i32, ptr %7, align 4, !tbaa !16
  %9 = and i32 %8, 2048
  %.not21 = icmp eq i32 %9, 0
  br i1 %.not21, label %16, label %10

10:                                               ; preds = %6
  tail call void @HAL_RTCEx_TimeStampEventCallback(ptr noundef nonnull %0)
  %11 = load ptr, ptr %0, align 8, !tbaa !10
  %12 = getelementptr inbounds i8, ptr %11, i64 12
  %13 = load volatile i32, ptr %12, align 4, !tbaa !16
  %14 = and i32 %13, 128
  %15 = or disjoint i32 %14, -2177
  store volatile i32 %15, ptr %12, align 4, !tbaa !16
  br label %16

16:                                               ; preds = %6, %10, %1
  %17 = phi ptr [ %2, %6 ], [ %11, %10 ], [ %2, %1 ]
  %18 = getelementptr inbounds i8, ptr %17, i64 64
  %19 = load volatile i32, ptr %18, align 4, !tbaa !17
  %20 = and i32 %19, 65540
  %.not22 = icmp eq i32 %20, 0
  br i1 %.not22, label %31, label %21

21:                                               ; preds = %16
  %22 = getelementptr inbounds i8, ptr %17, i64 12
  %23 = load volatile i32, ptr %22, align 4, !tbaa !16
  %24 = and i32 %23, 8192
  %.not23 = icmp eq i32 %24, 0
  br i1 %.not23, label %31, label %25

25:                                               ; preds = %21
  tail call void @HAL_RTCEx_Tamper1EventCallback(ptr noundef nonnull %0)
  %26 = load ptr, ptr %0, align 8, !tbaa !10
  %27 = getelementptr inbounds i8, ptr %26, i64 12
  %28 = load volatile i32, ptr %27, align 4, !tbaa !16
  %29 = and i32 %28, 128
  %30 = or disjoint i32 %29, -8321
  store volatile i32 %30, ptr %27, align 4, !tbaa !16
  br label %31

31:                                               ; preds = %21, %25, %16
  %32 = phi ptr [ %17, %21 ], [ %26, %25 ], [ %17, %16 ]
  %33 = getelementptr inbounds i8, ptr %32, i64 64
  %34 = load volatile i32, ptr %33, align 4, !tbaa !17
  %35 = and i32 %34, 524292
  %.not24 = icmp eq i32 %35, 0
  br i1 %.not24, label %46, label %36

36:                                               ; preds = %31
  %37 = getelementptr inbounds i8, ptr %32, i64 12
  %38 = load volatile i32, ptr %37, align 4, !tbaa !16
  %39 = and i32 %38, 16384
  %.not25 = icmp eq i32 %39, 0
  br i1 %.not25, label %46, label %40

40:                                               ; preds = %36
  tail call void @HAL_RTCEx_Tamper2EventCallback(ptr noundef nonnull %0)
  %41 = load ptr, ptr %0, align 8, !tbaa !10
  %42 = getelementptr inbounds i8, ptr %41, i64 12
  %43 = load volatile i32, ptr %42, align 4, !tbaa !16
  %44 = and i32 %43, 128
  %45 = or disjoint i32 %44, -16513
  store volatile i32 %45, ptr %42, align 4, !tbaa !16
  br label %46

46:                                               ; preds = %36, %40, %31
  %47 = phi ptr [ %32, %36 ], [ %41, %40 ], [ %32, %31 ]
  %48 = getelementptr inbounds i8, ptr %47, i64 64
  %49 = load volatile i32, ptr %48, align 4, !tbaa !17
  %50 = and i32 %49, 4194308
  %.not26 = icmp eq i32 %50, 0
  br i1 %.not26, label %61, label %51

51:                                               ; preds = %46
  %52 = getelementptr inbounds i8, ptr %47, i64 12
  %53 = load volatile i32, ptr %52, align 4, !tbaa !16
  %54 = and i32 %53, 32768
  %.not27 = icmp eq i32 %54, 0
  br i1 %.not27, label %61, label %55

55:                                               ; preds = %51
  tail call void @HAL_RTCEx_Tamper3EventCallback(ptr noundef nonnull %0)
  %56 = load ptr, ptr %0, align 8, !tbaa !10
  %57 = getelementptr inbounds i8, ptr %56, i64 12
  %58 = load volatile i32, ptr %57, align 4, !tbaa !16
  %59 = and i32 %58, 128
  %60 = or disjoint i32 %59, -32897
  store volatile i32 %60, ptr %57, align 4, !tbaa !16
  br label %61

61:                                               ; preds = %51, %55, %46
  %62 = getelementptr inbounds i8, ptr %0, i64 40
  store volatile i32 1, ptr %62, align 8, !tbaa !18
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_TimeStampEventCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper1EventCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper2EventCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_RTCEx_Tamper3EventCallback(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"", !12, i64 0, !13, i64 8, !7, i64 36, !7, i64 40}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24}
!14 = !{!15, !7, i64 8}
!15 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204}
!16 = !{!15, !7, i64 12}
!17 = !{!15, !7, i64 64}
!18 = !{!11, !7, i64 40}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass