; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Start)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ADC_HandleTypeDef = type { ptr, %struct.ADC_InitTypeDef, ptr, i32, i32, i32, %struct.ADC_InjectionConfigTypeDef }
%struct.ADC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.ADC_OversamplingTypeDef }
%struct.ADC_OversamplingTypeDef = type { i32, i32, i32, i32 }
%struct.ADC_InjectionConfigTypeDef = type { i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADCEx_Calibration_Start(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store volatile i32 0, ptr %9, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %12, i32 0, i32 3
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %94

17:                                               ; preds = %11
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %18, i32 0, i32 3
  store i32 1, ptr %19, align 8, !tbaa !11
  br label %20

20:                                               ; preds = %17
  br label %21

21:                                               ; preds = %20
  br label %22

22:                                               ; preds = %21
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = call i32 @ADC_Disable(ptr noundef %23)
  store i32 %24, ptr %8, align 4, !tbaa !9
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %27, label %80

27:                                               ; preds = %22
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %28, i32 0, i32 4
  %30 = load volatile i32, ptr %29, align 4, !tbaa !16
  %31 = zext i32 %30 to i64
  %32 = and i64 %31, -4353
  %33 = or i64 %32, 2
  %34 = trunc i64 %33 to i32
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %35, i32 0, i32 4
  store volatile i32 %34, ptr %36, align 4, !tbaa !16
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !17
  %40 = load i32, ptr %6, align 4, !tbaa !9
  %41 = load i32, ptr %7, align 4, !tbaa !9
  call void @LL_ADC_StartCalibration(ptr noundef %39, i32 noundef %40, i32 noundef %41)
  br label %42

42:                                               ; preds = %69, %27
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !17
  %46 = call i32 @LL_ADC_IsCalibrationOnGoing(ptr noundef %45)
  %47 = zext i32 %46 to i64
  %48 = icmp ne i64 %47, 0
  br i1 %48, label %49, label %70

49:                                               ; preds = %42
  %50 = load volatile i32, ptr %9, align 4, !tbaa !9
  %51 = add i32 %50, 1
  store volatile i32 %51, ptr %9, align 4, !tbaa !9
  %52 = load volatile i32, ptr %9, align 4, !tbaa !9
  %53 = icmp uge i32 %52, 1432000000
  br i1 %53, label %54, label %69

54:                                               ; preds = %49
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %55, i32 0, i32 4
  %57 = load volatile i32, ptr %56, align 4, !tbaa !16
  %58 = zext i32 %57 to i64
  %59 = and i64 %58, -3
  %60 = or i64 %59, 16
  %61 = trunc i64 %60 to i32
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %62, i32 0, i32 4
  store volatile i32 %61, ptr %63, align 4, !tbaa !16
  br label %64

64:                                               ; preds = %54
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %65, i32 0, i32 3
  store i32 0, ptr %66, align 8, !tbaa !11
  br label %67

67:                                               ; preds = %64
  br label %68

68:                                               ; preds = %67
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %94

69:                                               ; preds = %49
  br label %42, !llvm.loop !18

70:                                               ; preds = %42
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %71, i32 0, i32 4
  %73 = load volatile i32, ptr %72, align 4, !tbaa !16
  %74 = zext i32 %73 to i64
  %75 = and i64 %74, -3
  %76 = or i64 %75, 1
  %77 = trunc i64 %76 to i32
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %78, i32 0, i32 4
  store volatile i32 %77, ptr %79, align 4, !tbaa !16
  br label %87

80:                                               ; preds = %22
  %81 = load ptr, ptr %5, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %81, i32 0, i32 4
  %83 = load volatile i32, ptr %82, align 4, !tbaa !16
  %84 = zext i32 %83 to i64
  %85 = or i64 %84, 16
  %86 = trunc i64 %85 to i32
  store volatile i32 %86, ptr %82, align 4, !tbaa !16
  br label %87

87:                                               ; preds = %80, %70
  br label %88

88:                                               ; preds = %87
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %89, i32 0, i32 3
  store i32 0, ptr %90, align 8, !tbaa !11
  br label %91

91:                                               ; preds = %88
  br label %92

92:                                               ; preds = %91
  %93 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %93, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %94

94:                                               ; preds = %92, %68, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %95 = load i32, ptr %4, align 4
  ret i32 %95
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @ADC_Disable(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_StartCalibration(ptr noundef, i32 noundef, i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsCalibrationOnGoing(ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 96}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 88, !10, i64 96, !10, i64 100, !10, i64 104, !15, i64 108}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !14, i64 60}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!15 = !{!"", !10, i64 0, !10, i64 4}
!16 = !{!12, !10, i64 100}
!17 = !{!12, !6, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADCEx_Calibration_Start(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4)
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 96
  %6 = load i32, ptr %5, align 8, !tbaa !9
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %33, label %8

8:                                                ; preds = %3
  store i32 1, ptr %5, align 8, !tbaa !9
  %9 = tail call i32 @ADC_Disable(ptr noundef nonnull %0) #4
  %10 = icmp eq i32 %9, 0
  %11 = getelementptr inbounds i8, ptr %0, i64 100
  %12 = load volatile i32, ptr %11, align 4, !tbaa !15
  br i1 %10, label %13, label %31

13:                                               ; preds = %8
  %14 = and i32 %12, -4355
  %15 = or disjoint i32 %14, 2
  store volatile i32 %15, ptr %11, align 4, !tbaa !15
  %16 = load ptr, ptr %0, align 8, !tbaa !16
  tail call void @LL_ADC_StartCalibration(ptr noundef %16, i32 noundef %1, i32 noundef %2)
  br label %17

17:                                               ; preds = %20, %13
  %18 = load ptr, ptr %0, align 8, !tbaa !16
  %19 = tail call i32 @LL_ADC_IsCalibrationOnGoing(ptr noundef %18)
  %.not = icmp eq i32 %19, 0
  br i1 %.not, label %27, label %20

20:                                               ; preds = %17
  %.0..0..0..0. = load volatile i32, ptr %4, align 4, !tbaa !5
  %21 = add i32 %.0..0..0..0., 1
  store volatile i32 %21, ptr %4, align 4, !tbaa !5
  %.0..0..0..0.1 = load volatile i32, ptr %4, align 4, !tbaa !5
  %22 = icmp ugt i32 %.0..0..0..0.1, 1431999999
  br i1 %22, label %23, label %17, !llvm.loop !17

23:                                               ; preds = %20
  %24 = load volatile i32, ptr %11, align 4, !tbaa !15
  %25 = and i32 %24, -19
  %26 = or disjoint i32 %25, 16
  br label %.sink.split

27:                                               ; preds = %17
  %28 = load volatile i32, ptr %11, align 4, !tbaa !15
  %29 = and i32 %28, -4
  %30 = or disjoint i32 %29, 1
  br label %.sink.split

31:                                               ; preds = %8
  %32 = or i32 %12, 16
  br label %.sink.split

.sink.split:                                      ; preds = %31, %27, %23
  %.sink.sink = phi i32 [ %26, %23 ], [ %30, %27 ], [ %32, %31 ]
  %.0.ph = phi i32 [ 1, %23 ], [ %9, %27 ], [ %9, %31 ]
  store volatile i32 %.sink.sink, ptr %11, align 4, !tbaa !15
  store i32 0, ptr %5, align 8, !tbaa !9
  br label %33

33:                                               ; preds = %.sink.split, %3
  %.0 = phi i32 [ 2, %3 ], [ %.0.ph, %.sink.split ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4)
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @ADC_Disable(ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_StartCalibration(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_IsCalibrationOnGoing(ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 96}
!10 = !{!"", !11, i64 0, !12, i64 8, !11, i64 88, !6, i64 96, !6, i64 100, !6, i64 104, !14, i64 108}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !13, i64 60}
!13 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!14 = !{!"", !6, i64 0, !6, i64 4}
!15 = !{!10, !6, i64 100}
!16 = !{!10, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass