; LLVM IR from vergecurrency/verge :: src/secp256k1/src (bench_ecmult)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.secp256k1_callback = type { ptr, ptr }

@default_illegal_callback = external hidden constant %struct.secp256k1_callback, align 8
@.str.1 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [54 x i8], align 1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @secp256k1_callback_call(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @secp256k1_context_preallocated_size(i32 noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  store i64 208, ptr %4, align 8, !tbaa !9
  br label %6

6:                                                ; preds = %1
  %7 = load i64, ptr %4, align 8, !tbaa !9
  %8 = icmp ne i64 %7, 0
  %9 = zext i1 %8 to i32
  br label %10

10:                                               ; preds = %6
  br label %11

11:                                               ; preds = %10
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = and i32 %12, 255
  %14 = icmp ne i32 %13, 1
  %15 = zext i1 %14 to i32
  %16 = sext i32 %15 to i64
  %17 = call i64 @llvm.expect.i64(i64 %16, i64 0)
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %11
  call void @secp256k1_callback_call(ptr noundef @default_illegal_callback, ptr noundef @.str.1)
  store i64 0, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %31

20:                                               ; preds = %11
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = and i32 %21, 1024
  %23 = icmp ne i32 %22, 0
  %24 = zext i1 %23 to i32
  %25 = sext i32 %24 to i64
  %26 = call i64 @llvm.expect.i64(i64 %25, i64 0)
  %27 = icmp ne i64 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %20
  call void @secp256k1_callback_call(ptr noundef @default_illegal_callback, ptr noundef @.str.2)
  store i64 0, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %31

29:                                               ; preds = %20
  %30 = load i64, ptr %4, align 8, !tbaa !9
  store i64 %30, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %31

31:                                               ; preds = %29, %28, %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  %32 = load i64, ptr %2, align 8
  ret i64 %32
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.secp256k1_callback = type { ptr, ptr }

@default_illegal_callback = external hidden constant %struct.secp256k1_callback, align 8
@.str.1 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [54 x i8], align 1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @secp256k1_callback_call(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 209) i64 @secp256k1_context_preallocated_size(i32 noundef %0) local_unnamed_addr #1 {
  %2 = and i32 %0, 255
  %.not = icmp eq i32 %2, 1
  br i1 %.not, label %3, label %.sink.split, !prof !5

3:                                                ; preds = %1
  %4 = and i32 %0, 1024
  %.not5 = icmp eq i32 %4, 0
  br i1 %.not5, label %5, label %.sink.split, !prof !5

.sink.split:                                      ; preds = %3, %1
  %.str.2.sink = phi ptr [ @.str.1, %1 ], [ @.str.2, %3 ]
  tail call void @secp256k1_callback_call(ptr noundef nonnull @default_illegal_callback, ptr noundef nonnull %.str.2.sink)
  br label %5

5:                                                ; preds = %.sink.split, %3
  %.0 = phi i64 [ 208, %3 ], [ 0, %.sink.split ]
  ret i64 %.0
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 2000, i32 1}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass