; LLVM IR from lzyrapx/Competitive-Programming :: LibreOJ/106（Splay）（104基础上加区间）.ll (Z7InsertXiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@qv = external dso_local global i32, align 4
@tot = external dso_local global i32, align 4
@root = external dso_local global [200040 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5SplayiiRi(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7InsertXiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %9
  call void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4) %10, i32 noundef 0)
  %11 = load i32, ptr @tot, align 4, !tbaa !5
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %13
  call void @_Z5SplayiiRi(i32 noundef %11, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %14)
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = icmp eq i32 %15, %16
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  br label %40

19:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = add nsw i32 %20, %21
  %23 = ashr i32 %22, 1
  store i32 %23, ptr %7, align 4, !tbaa !5
  %24 = load i32, ptr @qv, align 4, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = icmp sle i32 %24, %25
  br i1 %26, label %27, label %32

27:                                               ; preds = %19
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = shl i32 %28, 1
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z7InsertXiii(i32 noundef %29, i32 noundef %30, i32 noundef %31)
  br label %39

32:                                               ; preds = %19
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = shl i32 %33, 1
  %35 = or i32 %34, 1
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  %38 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z7InsertXiii(i32 noundef %35, i32 noundef %37, i32 noundef %38)
  br label %39

39:                                               ; preds = %32, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %40

40:                                               ; preds = %39, %18
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@qv = external dso_local local_unnamed_addr global i32, align 4
@tot = external dso_local local_unnamed_addr global i32, align 4
@root = external dso_local global [200040 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5SplayiiRi(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7InsertXiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = sext i32 %0 to i64
  %5 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %4
  tail call void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef 0)
  %6 = load i32, ptr @tot, align 4, !tbaa !5
  tail call void @_Z5SplayiiRi(i32 noundef %6, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %7 = icmp eq i32 %1, %2
  br i1 %7, label %tailrecurse.outer._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %tailrecurse.outer
  %.tr16.ph23 = phi i32 [ %.tr1620, %tailrecurse.outer ], [ %2, %3 ]
  %.tr15.ph22 = phi i32 [ %18, %tailrecurse.outer ], [ %1, %3 ]
  %.tr.ph21 = phi i32 [ %17, %tailrecurse.outer ], [ %0, %3 ]
  br label %8

8:                                                ; preds = %.lr.ph, %tailrecurse
  %.tr1620 = phi i32 [ %.tr16.ph23, %.lr.ph ], [ %10, %tailrecurse ]
  %.tr19 = phi i32 [ %.tr.ph21, %.lr.ph ], [ %12, %tailrecurse ]
  %9 = add nsw i32 %.tr1620, %.tr15.ph22
  %10 = ashr i32 %9, 1
  %11 = load i32, ptr @qv, align 4, !tbaa !5
  %.not = icmp sgt i32 %11, %10
  %12 = shl i32 %.tr19, 1
  br i1 %.not, label %tailrecurse.outer, label %tailrecurse

tailrecurse:                                      ; preds = %8
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %13
  tail call void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4) %14, i32 noundef 0)
  %15 = load i32, ptr @tot, align 4, !tbaa !5
  tail call void @_Z5SplayiiRi(i32 noundef %15, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %14)
  %16 = icmp eq i32 %.tr15.ph22, %10
  br i1 %16, label %tailrecurse.outer._crit_edge, label %8

tailrecurse.outer:                                ; preds = %8
  %17 = or disjoint i32 %12, 1
  %18 = add nsw i32 %10, 1
  %19 = sext i32 %17 to i64
  %20 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %19
  tail call void @_Z7InsertYRii(ptr noundef nonnull align 4 dereferenceable(4) %20, i32 noundef 0)
  %21 = load i32, ptr @tot, align 4, !tbaa !5
  tail call void @_Z5SplayiiRi(i32 noundef %21, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %20)
  %22 = icmp eq i32 %18, %.tr1620
  br i1 %22, label %tailrecurse.outer._crit_edge, label %.lr.ph

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %3
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass