; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Inc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NAND_AddressTypeDef = type { i16, i16, i16 }
%struct.NAND_HandleTypeDef = type { ptr, %struct.FMC_NAND_InitTypeDef, i32, i32, %struct.NAND_DeviceConfigTypeDef }
%struct.FMC_NAND_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.NAND_DeviceConfigTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_NAND_Address_Inc(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 256, ptr %5, align 4, !tbaa !9
  %6 = load ptr, ptr %4, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %6, i32 0, i32 0
  %8 = load i16, ptr %7, align 2, !tbaa !11
  %9 = add i16 %8, 1
  store i16 %9, ptr %7, align 2, !tbaa !11
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %10, i32 0, i32 0
  %12 = load i16, ptr %11, align 2, !tbaa !11
  %13 = zext i16 %12 to i32
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %14, i32 0, i32 4
  %16 = getelementptr inbounds %struct.NAND_DeviceConfigTypeDef, ptr %15, i32 0, i32 2
  %17 = load i32, ptr %16, align 4, !tbaa !14
  %18 = icmp eq i32 %13, %17
  br i1 %18, label %19, label %54

19:                                               ; preds = %2
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %20, i32 0, i32 0
  store i16 0, ptr %21, align 2, !tbaa !11
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %22, i32 0, i32 2
  %24 = load i16, ptr %23, align 2, !tbaa !17
  %25 = add i16 %24, 1
  store i16 %25, ptr %23, align 2, !tbaa !17
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %26, i32 0, i32 2
  %28 = load i16, ptr %27, align 2, !tbaa !17
  %29 = zext i16 %28 to i32
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %30, i32 0, i32 4
  %32 = getelementptr inbounds %struct.NAND_DeviceConfigTypeDef, ptr %31, i32 0, i32 5
  %33 = load i32, ptr %32, align 4, !tbaa !18
  %34 = icmp eq i32 %29, %33
  br i1 %34, label %35, label %53

35:                                               ; preds = %19
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %36, i32 0, i32 2
  store i16 0, ptr %37, align 2, !tbaa !17
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %38, i32 0, i32 1
  %40 = load i16, ptr %39, align 2, !tbaa !19
  %41 = add i16 %40, 1
  store i16 %41, ptr %39, align 2, !tbaa !19
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.NAND_AddressTypeDef, ptr %42, i32 0, i32 1
  %44 = load i16, ptr %43, align 2, !tbaa !19
  %45 = zext i16 %44 to i32
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %46, i32 0, i32 4
  %48 = getelementptr inbounds %struct.NAND_DeviceConfigTypeDef, ptr %47, i32 0, i32 4
  %49 = load i32, ptr %48, align 4, !tbaa !20
  %50 = icmp eq i32 %45, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %35
  store i32 512, ptr %5, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %51, %35
  br label %53

53:                                               ; preds = %52, %19
  br label %54

54:                                               ; preds = %53, %2
  %55 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %55
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"", !13, i64 0, !13, i64 2, !13, i64 4}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !10, i64 52}
!15 = !{!"", !6, i64 0, !16, i64 8, !10, i64 36, !10, i64 40, !16, i64 44}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!17 = !{!12, !13, i64 4}
!18 = !{!15, !10, i64 64}
!19 = !{!12, !13, i64 2}
!20 = !{!15, !10, i64 60}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local range(i32 256, 513) i32 @HAL_NAND_Address_Inc(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
  %3 = load i16, ptr %1, align 2, !tbaa !5
  %4 = add i16 %3, 1
  store i16 %4, ptr %1, align 2, !tbaa !5
  %5 = zext i16 %4 to i32
  %6 = getelementptr inbounds i8, ptr %0, i64 52
  %7 = load i32, ptr %6, align 4, !tbaa !10
  %8 = icmp eq i32 %7, %5
  br i1 %8, label %9, label %25

9:                                                ; preds = %2
  store i16 0, ptr %1, align 2, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %1, i64 4
  %11 = load i16, ptr %10, align 2, !tbaa !15
  %12 = add i16 %11, 1
  store i16 %12, ptr %10, align 2, !tbaa !15
  %13 = zext i16 %12 to i32
  %14 = getelementptr inbounds i8, ptr %0, i64 64
  %15 = load i32, ptr %14, align 4, !tbaa !16
  %16 = icmp eq i32 %15, %13
  br i1 %16, label %17, label %25

17:                                               ; preds = %9
  store i16 0, ptr %10, align 2, !tbaa !15
  %18 = getelementptr inbounds i8, ptr %1, i64 2
  %19 = load i16, ptr %18, align 2, !tbaa !17
  %20 = add i16 %19, 1
  store i16 %20, ptr %18, align 2, !tbaa !17
  %21 = zext i16 %20 to i32
  %22 = getelementptr inbounds i8, ptr %0, i64 60
  %23 = load i32, ptr %22, align 4, !tbaa !18
  %24 = icmp eq i32 %23, %21
  %spec.select = select i1 %24, i32 512, i32 256
  br label %25

25:                                               ; preds = %17, %9, %2
  %.0 = phi i32 [ 256, %9 ], [ 256, %2 ], [ %spec.select, %17 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 2, !7, i64 4}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 52}
!11 = !{!"", !12, i64 0, !13, i64 8, !14, i64 36, !14, i64 40, !13, i64 44}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24}
!14 = !{!"int", !8, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!11, !14, i64 64}
!17 = !{!6, !7, i64 2}
!18 = !{!11, !14, i64 60}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass