; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ADCTriggerConfig)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_ADCTriggerCfgTypeDef = type { i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_ADCTriggerConfig(ptr noundef %0, i32 noundef %1, ptr noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %10, i32 0, i32 4
  %12 = load volatile i32, ptr %11, align 8, !tbaa !11
  %13 = icmp eq i32 %12, 2
  br i1 %13, label %14, label %15

14:                                               ; preds = %3
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

15:                                               ; preds = %3
  br label %16

16:                                               ; preds = %15
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %17, i32 0, i32 3
  %19 = load i32, ptr %18, align 4, !tbaa !14
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

22:                                               ; preds = %16
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %23, i32 0, i32 3
  store i32 1, ptr %24, align 4, !tbaa !14
  br label %25

25:                                               ; preds = %22
  br label %26

26:                                               ; preds = %25
  br label %27

27:                                               ; preds = %26
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %28, i32 0, i32 4
  store volatile i32 2, ptr %29, align 8, !tbaa !11
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %30, i32 0, i32 0
  %32 = load ptr, ptr %31, align 8, !tbaa !15
  %33 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %32, i32 0, i32 3
  %34 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %33, i32 0, i32 0
  %35 = load volatile i32, ptr %34, align 4, !tbaa !16
  store i32 %35, ptr %8, align 4, !tbaa !9
  %36 = load i32, ptr %6, align 4, !tbaa !9
  switch i32 %36, label %128 [
    i32 1, label %37
    i32 2, label %59
    i32 4, label %82
    i32 8, label %105
  ]

37:                                               ; preds = %27
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = and i64 %39, -458753
  %41 = trunc i64 %40 to i32
  store i32 %41, ptr %8, align 4, !tbaa !9
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %42, i32 0, i32 0
  %44 = load i32, ptr %43, align 4, !tbaa !20
  %45 = zext i32 %44 to i64
  %46 = and i64 %45, 458752
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = zext i32 %47 to i64
  %49 = or i64 %48, %46
  %50 = trunc i64 %49 to i32
  store i32 %50, ptr %8, align 4, !tbaa !9
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %51, i32 0, i32 1
  %53 = load i32, ptr %52, align 4, !tbaa !22
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %54, i32 0, i32 0
  %56 = load ptr, ptr %55, align 8, !tbaa !15
  %57 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %56, i32 0, i32 3
  %58 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %57, i32 0, i32 15
  store volatile i32 %53, ptr %58, align 4, !tbaa !23
  br label %136

59:                                               ; preds = %27
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = zext i32 %60 to i64
  %62 = and i64 %61, -3670017
  %63 = trunc i64 %62 to i32
  store i32 %63, ptr %8, align 4, !tbaa !9
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %64, i32 0, i32 0
  %66 = load i32, ptr %65, align 4, !tbaa !20
  %67 = shl i32 %66, 3
  %68 = zext i32 %67 to i64
  %69 = and i64 %68, 3670016
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = zext i32 %70 to i64
  %72 = or i64 %71, %69
  %73 = trunc i64 %72 to i32
  store i32 %73, ptr %8, align 4, !tbaa !9
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %74, i32 0, i32 1
  %76 = load i32, ptr %75, align 4, !tbaa !22
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %77, i32 0, i32 0
  %79 = load ptr, ptr %78, align 8, !tbaa !15
  %80 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %79, i32 0, i32 3
  %81 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %80, i32 0, i32 16
  store volatile i32 %76, ptr %81, align 4, !tbaa !24
  br label %136

82:                                               ; preds = %27
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = zext i32 %83 to i64
  %85 = and i64 %84, -29360129
  %86 = trunc i64 %85 to i32
  store i32 %86, ptr %8, align 4, !tbaa !9
  %87 = load ptr, ptr %7, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %87, i32 0, i32 0
  %89 = load i32, ptr %88, align 4, !tbaa !20
  %90 = shl i32 %89, 6
  %91 = zext i32 %90 to i64
  %92 = and i64 %91, 29360128
  %93 = load i32, ptr %8, align 4, !tbaa !9
  %94 = zext i32 %93 to i64
  %95 = or i64 %94, %92
  %96 = trunc i64 %95 to i32
  store i32 %96, ptr %8, align 4, !tbaa !9
  %97 = load ptr, ptr %7, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %97, i32 0, i32 1
  %99 = load i32, ptr %98, align 4, !tbaa !22
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %100, i32 0, i32 0
  %102 = load ptr, ptr %101, align 8, !tbaa !15
  %103 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %102, i32 0, i32 3
  %104 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %103, i32 0, i32 17
  store volatile i32 %99, ptr %104, align 4, !tbaa !25
  br label %136

105:                                              ; preds = %27
  %106 = load i32, ptr %8, align 4, !tbaa !9
  %107 = zext i32 %106 to i64
  %108 = and i64 %107, -234881025
  %109 = trunc i64 %108 to i32
  store i32 %109, ptr %8, align 4, !tbaa !9
  %110 = load ptr, ptr %7, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %110, i32 0, i32 0
  %112 = load i32, ptr %111, align 4, !tbaa !20
  %113 = shl i32 %112, 9
  %114 = zext i32 %113 to i64
  %115 = and i64 %114, 234881024
  %116 = load i32, ptr %8, align 4, !tbaa !9
  %117 = zext i32 %116 to i64
  %118 = or i64 %117, %115
  %119 = trunc i64 %118 to i32
  store i32 %119, ptr %8, align 4, !tbaa !9
  %120 = load ptr, ptr %7, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.HRTIM_ADCTriggerCfgTypeDef, ptr %120, i32 0, i32 1
  %122 = load i32, ptr %121, align 4, !tbaa !22
  %123 = load ptr, ptr %5, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %123, i32 0, i32 0
  %125 = load ptr, ptr %124, align 8, !tbaa !15
  %126 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %125, i32 0, i32 3
  %127 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %126, i32 0, i32 18
  store volatile i32 %122, ptr %127, align 4, !tbaa !26
  br label %136

128:                                              ; preds = %27
  %129 = load ptr, ptr %5, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %129, i32 0, i32 4
  store volatile i32 7, ptr %130, align 8, !tbaa !11
  br label %131

131:                                              ; preds = %128
  %132 = load ptr, ptr %5, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %132, i32 0, i32 3
  store i32 0, ptr %133, align 4, !tbaa !14
  br label %134

134:                                              ; preds = %131
  br label %135

135:                                              ; preds = %134
  br label %136

136:                                              ; preds = %135, %105, %82, %59, %37
  %137 = load ptr, ptr %5, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %137, i32 0, i32 4
  %139 = load volatile i32, ptr %138, align 8, !tbaa !11
  %140 = icmp eq i32 %139, 7
  br i1 %140, label %141, label %142

141:                                              ; preds = %136
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

142:                                              ; preds = %136
  %143 = load i32, ptr %8, align 4, !tbaa !9
  %144 = load ptr, ptr %5, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %144, i32 0, i32 0
  %146 = load ptr, ptr %145, align 8, !tbaa !15
  %147 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %146, i32 0, i32 3
  %148 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %147, i32 0, i32 0
  store volatile i32 %143, ptr %148, align 4, !tbaa !16
  %149 = load ptr, ptr %5, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %149, i32 0, i32 4
  store volatile i32 1, ptr %150, align 8, !tbaa !11
  br label %151

151:                                              ; preds = %142
  %152 = load ptr, ptr %5, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %152, i32 0, i32 3
  store i32 0, ptr %153, align 4, !tbaa !14
  br label %154

154:                                              ; preds = %151
  br label %155

155:                                              ; preds = %154
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

156:                                              ; preds = %155, %141, %21, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %157 = load i32, ptr %4, align 4
  ret i32 %157
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 200}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 196}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 896}
!17 = !{!"", !18, i64 0, !7, i64 128, !7, i64 768, !19, i64 896}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!20 = !{!21, !10, i64 0}
!21 = !{!"", !10, i64 0, !10, i64 4}
!22 = !{!21, !10, i64 4}
!23 = !{!17, !10, i64 956}
!24 = !{!17, !10, i64 960}
!25 = !{!17, !10, i64 964}
!26 = !{!17, !10, i64 968}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_ADCTriggerConfig(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 200
  %5 = load volatile i32, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i32 %5, 2
  br i1 %6, label %55, label %7

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 196
  %9 = load i32, ptr %8, align 4, !tbaa !12
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %55, label %11

11:                                               ; preds = %7
  store i32 1, ptr %8, align 4, !tbaa !12
  store volatile i32 2, ptr %4, align 8, !tbaa !5
  %12 = load ptr, ptr %0, align 8, !tbaa !13
  %13 = getelementptr inbounds i8, ptr %12, i64 896
  %14 = load volatile i32, ptr %13, align 4, !tbaa !14
  switch i32 %1, label %50 [
    i32 1, label %15
    i32 2, label %23
    i32 4, label %32
    i32 8, label %41
  ]

15:                                               ; preds = %11
  %16 = and i32 %14, -458753
  %17 = load i32, ptr %2, align 4, !tbaa !18
  %18 = and i32 %17, 458752
  %19 = or disjoint i32 %18, %16
  %20 = getelementptr inbounds i8, ptr %2, i64 4
  %21 = load i32, ptr %20, align 4, !tbaa !20
  %22 = getelementptr inbounds i8, ptr %12, i64 956
  store volatile i32 %21, ptr %22, align 4, !tbaa !21
  br label %51

23:                                               ; preds = %11
  %24 = and i32 %14, -3670017
  %25 = load i32, ptr %2, align 4, !tbaa !18
  %26 = shl i32 %25, 3
  %27 = and i32 %26, 3670016
  %28 = or disjoint i32 %27, %24
  %29 = getelementptr inbounds i8, ptr %2, i64 4
  %30 = load i32, ptr %29, align 4, !tbaa !20
  %31 = getelementptr inbounds i8, ptr %12, i64 960
  store volatile i32 %30, ptr %31, align 4, !tbaa !22
  br label %51

32:                                               ; preds = %11
  %33 = and i32 %14, -29360129
  %34 = load i32, ptr %2, align 4, !tbaa !18
  %35 = shl i32 %34, 6
  %36 = and i32 %35, 29360128
  %37 = or disjoint i32 %36, %33
  %38 = getelementptr inbounds i8, ptr %2, i64 4
  %39 = load i32, ptr %38, align 4, !tbaa !20
  %40 = getelementptr inbounds i8, ptr %12, i64 964
  store volatile i32 %39, ptr %40, align 4, !tbaa !23
  br label %51

41:                                               ; preds = %11
  %42 = and i32 %14, -234881025
  %43 = load i32, ptr %2, align 4, !tbaa !18
  %44 = shl i32 %43, 9
  %45 = and i32 %44, 234881024
  %46 = or disjoint i32 %45, %42
  %47 = getelementptr inbounds i8, ptr %2, i64 4
  %48 = load i32, ptr %47, align 4, !tbaa !20
  %49 = getelementptr inbounds i8, ptr %12, i64 968
  store volatile i32 %48, ptr %49, align 4, !tbaa !24
  br label %51

50:                                               ; preds = %11
  store volatile i32 7, ptr %4, align 8, !tbaa !5
  store i32 0, ptr %8, align 4, !tbaa !12
  br label %51

51:                                               ; preds = %50, %41, %32, %23, %15
  %.0 = phi i32 [ %14, %50 ], [ %46, %41 ], [ %37, %32 ], [ %28, %23 ], [ %19, %15 ]
  %52 = load volatile i32, ptr %4, align 8, !tbaa !5
  %53 = icmp eq i32 %52, 7
  br i1 %53, label %55, label %54

54:                                               ; preds = %51
  store volatile i32 %.0, ptr %13, align 4, !tbaa !14
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  store i32 0, ptr %8, align 4, !tbaa !12
  br label %55

55:                                               ; preds = %51, %7, %3, %54
  %.033 = phi i32 [ 0, %54 ], [ 2, %3 ], [ 2, %7 ], [ 1, %51 ]
  ret i32 %.033
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 200}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 196}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 896}
!15 = !{!"", !16, i64 0, !8, i64 128, !8, i64 768, !17, i64 896}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!18 = !{!19, !11, i64 0}
!19 = !{!"", !11, i64 0, !11, i64 4}
!20 = !{!19, !11, i64 4}
!21 = !{!15, !11, i64 956}
!22 = !{!15, !11, i64 960}
!23 = !{!15, !11, i64 964}
!24 = !{!15, !11, i64 968}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass