; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@TimerIdxToTimerId = external hidden global [6 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMATimerxCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAError(ptr noundef) #1

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_SimplePWMStart_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %16 = load ptr, ptr %8, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %16, i32 0, i32 4
  %18 = load volatile i32, ptr %17, align 8, !tbaa !11
  %19 = icmp eq i32 %18, 2
  br i1 %19, label %20, label %21

20:                                               ; preds = %6
  store i32 2, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

21:                                               ; preds = %6
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %22, i32 0, i32 4
  %24 = load volatile i32, ptr %23, align 8, !tbaa !11
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %40

26:                                               ; preds = %21
  %27 = load i32, ptr %11, align 4, !tbaa !9
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %35, label %29

29:                                               ; preds = %26
  %30 = load i32, ptr %12, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 0
  br i1 %31, label %35, label %32

32:                                               ; preds = %29
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = icmp eq i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %32, %29, %26
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

36:                                               ; preds = %32
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %37, i32 0, i32 4
  store volatile i32 2, ptr %38, align 8, !tbaa !11
  br label %39

39:                                               ; preds = %36
  br label %40

40:                                               ; preds = %39, %21
  br label %41

41:                                               ; preds = %40
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %42, i32 0, i32 3
  %44 = load i32, ptr %43, align 4, !tbaa !14
  %45 = icmp eq i32 %44, 1
  br i1 %45, label %46, label %47

46:                                               ; preds = %41
  store i32 2, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

47:                                               ; preds = %41
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %48, i32 0, i32 3
  store i32 1, ptr %49, align 4, !tbaa !14
  br label %50

50:                                               ; preds = %47
  br label %51

51:                                               ; preds = %50
  br label %52

52:                                               ; preds = %51
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %54, i32 0, i32 0
  %56 = load ptr, ptr %55, align 8, !tbaa !15
  %57 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %56, i32 0, i32 3
  %58 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %57, i32 0, i32 5
  %59 = load volatile i32, ptr %58, align 4, !tbaa !16
  %60 = or i32 %59, %53
  store volatile i32 %60, ptr %58, align 4, !tbaa !16
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = load i32, ptr %9, align 4, !tbaa !9
  %63 = call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef %61, i32 noundef %62)
  store ptr %63, ptr %14, align 8, !tbaa !5
  %64 = load ptr, ptr %14, align 8, !tbaa !5
  %65 = icmp eq ptr %64, null
  br i1 %65, label %66, label %74

66:                                               ; preds = %52
  %67 = load ptr, ptr %8, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %67, i32 0, i32 4
  store volatile i32 7, ptr %68, align 8, !tbaa !11
  br label %69

69:                                               ; preds = %66
  %70 = load ptr, ptr %8, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %70, i32 0, i32 3
  store i32 0, ptr %71, align 4, !tbaa !14
  br label %72

72:                                               ; preds = %69
  br label %73

73:                                               ; preds = %72
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

74:                                               ; preds = %52
  %75 = load ptr, ptr %14, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %75, i32 0, i32 9
  store ptr @HRTIM_DMAError, ptr %76, align 8, !tbaa !20
  %77 = load ptr, ptr %14, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %77, i32 0, i32 5
  store ptr @HRTIM_DMATimerxCplt, ptr %78, align 8, !tbaa !23
  %79 = load ptr, ptr %14, align 8, !tbaa !5
  %80 = load i32, ptr %11, align 4, !tbaa !9
  %81 = load i32, ptr %12, align 4, !tbaa !9
  %82 = load i32, ptr %13, align 4, !tbaa !9
  %83 = call i32 @HAL_DMA_Start_IT(ptr noundef %79, i32 noundef %80, i32 noundef %81, i32 noundef %82)
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %85, label %93

85:                                               ; preds = %74
  %86 = load ptr, ptr %8, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %86, i32 0, i32 4
  store volatile i32 7, ptr %87, align 8, !tbaa !11
  br label %88

88:                                               ; preds = %85
  %89 = load ptr, ptr %8, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %89, i32 0, i32 3
  store i32 0, ptr %90, align 4, !tbaa !14
  br label %91

91:                                               ; preds = %88
  br label %92

92:                                               ; preds = %91
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

93:                                               ; preds = %74
  %94 = load i32, ptr %10, align 4, !tbaa !9
  switch i32 %94, label %121 [
    i32 1, label %95
    i32 4, label %95
    i32 16, label %95
    i32 64, label %95
    i32 256, label %95
    i32 2, label %108
    i32 8, label %108
    i32 32, label %108
    i32 128, label %108
    i32 512, label %108
  ]

95:                                               ; preds = %93, %93, %93, %93, %93
  %96 = load ptr, ptr %8, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %96, i32 0, i32 0
  %98 = load ptr, ptr %97, align 8, !tbaa !15
  %99 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %98, i32 0, i32 1
  %100 = load i32, ptr %9, align 4, !tbaa !9
  %101 = zext i32 %100 to i64
  %102 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %99, i64 0, i64 %101
  %103 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %102, i32 0, i32 3
  %104 = load volatile i32, ptr %103, align 4, !tbaa !24
  %105 = zext i32 %104 to i64
  %106 = or i64 %105, 65536
  %107 = trunc i64 %106 to i32
  store volatile i32 %107, ptr %103, align 4, !tbaa !24
  br label %129

108:                                              ; preds = %93, %93, %93, %93, %93
  %109 = load ptr, ptr %8, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %109, i32 0, i32 0
  %111 = load ptr, ptr %110, align 8, !tbaa !15
  %112 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %111, i32 0, i32 1
  %113 = load i32, ptr %9, align 4, !tbaa !9
  %114 = zext i32 %113 to i64
  %115 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %112, i64 0, i64 %114
  %116 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %115, i32 0, i32 3
  %117 = load volatile i32, ptr %116, align 4, !tbaa !24
  %118 = zext i32 %117 to i64
  %119 = or i64 %118, 131072
  %120 = trunc i64 %119 to i32
  store volatile i32 %120, ptr %116, align 4, !tbaa !24
  br label %129

121:                                              ; preds = %93
  %122 = load ptr, ptr %8, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %122, i32 0, i32 4
  store volatile i32 7, ptr %123, align 8, !tbaa !11
  br label %124

124:                                              ; preds = %121
  %125 = load ptr, ptr %8, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %125, i32 0, i32 3
  store i32 0, ptr %126, align 4, !tbaa !14
  br label %127

127:                                              ; preds = %124
  br label %128

128:                                              ; preds = %127
  br label %129

129:                                              ; preds = %128, %108, %95
  %130 = load ptr, ptr %8, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %130, i32 0, i32 4
  %132 = load volatile i32, ptr %131, align 8, !tbaa !11
  %133 = icmp eq i32 %132, 7
  br i1 %133, label %134, label %135

134:                                              ; preds = %129
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

135:                                              ; preds = %129
  %136 = load i32, ptr %9, align 4, !tbaa !9
  %137 = zext i32 %136 to i64
  %138 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %137
  %139 = load i32, ptr %138, align 4, !tbaa !9
  %140 = load ptr, ptr %8, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %140, i32 0, i32 0
  %142 = load ptr, ptr %141, align 8, !tbaa !15
  %143 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %142, i32 0, i32 0
  %144 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %143, i32 0, i32 0
  %145 = load volatile i32, ptr %144, align 4, !tbaa !26
  %146 = or i32 %145, %139
  store volatile i32 %146, ptr %144, align 4, !tbaa !26
  %147 = load ptr, ptr %8, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %147, i32 0, i32 4
  store volatile i32 1, ptr %148, align 8, !tbaa !11
  br label %149

149:                                              ; preds = %135
  %150 = load ptr, ptr %8, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %150, i32 0, i32 3
  store i32 0, ptr %151, align 4, !tbaa !14
  br label %152

152:                                              ; preds = %149
  br label %153

153:                                              ; preds = %152
  store i32 0, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %154

154:                                              ; preds = %153, %134, %92, %73, %46, %35, %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  %155 = load i32, ptr %7, align 4
  ret i32 %155
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 200}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 196}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 916}
!17 = !{!"", !18, i64 0, !7, i64 128, !7, i64 768, !19, i64 896}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!20 = !{!21, !6, i64 104}
!21 = !{!"__DMA_HandleTypeDef", !6, i64 0, !22, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!23 = !{!21, !6, i64 72}
!24 = !{!25, !10, i64 12}
!25 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !7, i64 108}
!26 = !{!17, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }

@TimerIdxToTimerId = external hidden local_unnamed_addr global [6 x i32], align 16

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMATimerxCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @HRTIM_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_SimplePWMStart_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = getelementptr inbounds i8, ptr %0, i64 200
  %8 = load volatile i32, ptr %7, align 8, !tbaa !5
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %59, label %10

10:                                               ; preds = %6
  %11 = load volatile i32, ptr %7, align 8, !tbaa !5
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %18

13:                                               ; preds = %10
  %14 = icmp eq i32 %3, 0
  %15 = icmp eq i32 %4, 0
  %or.cond = or i1 %14, %15
  %16 = icmp eq i32 %5, 0
  %or.cond3 = or i1 %or.cond, %16
  br i1 %or.cond3, label %59, label %17

17:                                               ; preds = %13
  store volatile i32 2, ptr %7, align 8, !tbaa !5
  br label %18

18:                                               ; preds = %10, %17
  %19 = getelementptr inbounds i8, ptr %0, i64 196
  %20 = load i32, ptr %19, align 4, !tbaa !12
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %59, label %22

22:                                               ; preds = %18
  store i32 1, ptr %19, align 4, !tbaa !12
  %23 = load ptr, ptr %0, align 8, !tbaa !13
  %24 = getelementptr inbounds i8, ptr %23, i64 916
  %25 = load volatile i32, ptr %24, align 4, !tbaa !14
  %26 = or i32 %25, %2
  store volatile i32 %26, ptr %24, align 4, !tbaa !14
  %27 = tail call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef nonnull %0, i32 noundef %1)
  %28 = icmp eq ptr %27, null
  br i1 %28, label %.sink.split, label %29

29:                                               ; preds = %22
  %30 = getelementptr inbounds i8, ptr %27, i64 104
  store ptr @HRTIM_DMAError, ptr %30, align 8, !tbaa !18
  %31 = getelementptr inbounds i8, ptr %27, i64 72
  store ptr @HRTIM_DMATimerxCplt, ptr %31, align 8, !tbaa !21
  %32 = tail call i32 @HAL_DMA_Start_IT(ptr noundef nonnull %27, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2
  %.not = icmp eq i32 %32, 0
  br i1 %.not, label %33, label %.sink.split

33:                                               ; preds = %29
  switch i32 %2, label %48 [
    i32 1, label %34
    i32 4, label %34
    i32 16, label %34
    i32 64, label %34
    i32 256, label %34
    i32 2, label %41
    i32 8, label %41
    i32 32, label %41
    i32 128, label %41
    i32 512, label %41
  ]

34:                                               ; preds = %33, %33, %33, %33, %33
  %35 = load ptr, ptr %0, align 8, !tbaa !13
  %36 = getelementptr inbounds i8, ptr %35, i64 128
  %37 = zext i32 %1 to i64
  %38 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %36, i64 0, i64 %37, i32 3
  %39 = load volatile i32, ptr %38, align 4, !tbaa !22
  %40 = or i32 %39, 65536
  store volatile i32 %40, ptr %38, align 4, !tbaa !22
  br label %49

41:                                               ; preds = %33, %33, %33, %33, %33
  %42 = load ptr, ptr %0, align 8, !tbaa !13
  %43 = getelementptr inbounds i8, ptr %42, i64 128
  %44 = zext i32 %1 to i64
  %45 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %43, i64 0, i64 %44, i32 3
  %46 = load volatile i32, ptr %45, align 4, !tbaa !22
  %47 = or i32 %46, 131072
  store volatile i32 %47, ptr %45, align 4, !tbaa !22
  br label %49

48:                                               ; preds = %33
  store volatile i32 7, ptr %7, align 8, !tbaa !5
  store i32 0, ptr %19, align 4, !tbaa !12
  br label %49

49:                                               ; preds = %48, %41, %34
  %50 = load volatile i32, ptr %7, align 8, !tbaa !5
  %51 = icmp eq i32 %50, 7
  br i1 %51, label %59, label %52

52:                                               ; preds = %49
  %53 = zext i32 %1 to i64
  %54 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %53
  %55 = load i32, ptr %54, align 4, !tbaa !24
  %56 = load ptr, ptr %0, align 8, !tbaa !13
  %57 = load volatile i32, ptr %56, align 4, !tbaa !25
  %58 = or i32 %57, %55
  store volatile i32 %58, ptr %56, align 4, !tbaa !25
  br label %.sink.split

.sink.split:                                      ; preds = %29, %22, %52
  %.sink = phi i32 [ 1, %52 ], [ 7, %22 ], [ 7, %29 ]
  %.0.ph = phi i32 [ 0, %52 ], [ 1, %22 ], [ 1, %29 ]
  store volatile i32 %.sink, ptr %7, align 8, !tbaa !5
  store i32 0, ptr %19, align 4, !tbaa !12
  br label %59

59:                                               ; preds = %.sink.split, %49, %18, %13, %6
  %.0 = phi i32 [ 2, %6 ], [ 1, %13 ], [ 2, %18 ], [ 1, %49 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 200}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 196}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 916}
!15 = !{!"", !16, i64 0, !8, i64 128, !8, i64 768, !17, i64 896}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!18 = !{!19, !7, i64 104}
!19 = !{!"__DMA_HandleTypeDef", !7, i64 0, !20, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!21 = !{!19, !7, i64 72}
!22 = !{!23, !11, i64 12}
!23 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !8, i64 108}
!24 = !{!11, !11, i64 0}
!25 = !{!15, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass