; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/Feb2021-Long/SUMXOR2.ll (Z5bitsNRSt6vectorI4baseSaIS0_EEx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local global i64, align 8
@starters = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [93 x i8], align 1
@__PRETTY_FUNCTION__._Z5bitsNRSt6vectorI4baseSaIS0_EEx = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8checkXORx(i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5bitsNRSt6vectorI4baseSaIS0_EEx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca %struct.base, align 8
  %13 = alloca %struct.base, align 8
  %14 = alloca %struct.base, align 8
  %15 = alloca %struct.base, align 8
  %16 = alloca %struct.base, align 8
  %17 = alloca %struct.base, align 8
  %18 = alloca %struct.base, align 8
  %19 = alloca %struct.base, align 8
  %20 = alloca %struct.base, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %21 = load i64, ptr %4, align 8, !tbaa !9
  %22 = icmp eq i64 %21, -1
  br i1 %22, label %23, label %26

23:                                               ; preds = %2
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = call noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %24) #8
  store i64 %25, ptr %4, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %23, %2
  %27 = load i64, ptr %4, align 8, !tbaa !9
  %28 = load i64, ptr %4, align 8, !tbaa !9
  %29 = sub nsw i64 %28, 1
  %30 = and i64 %27, %29
  %31 = icmp eq i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %26
  br label %35

33:                                               ; preds = %26
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.4, i32 noundef 107, ptr noundef @__PRETTY_FUNCTION__._Z5bitsNRSt6vectorI4baseSaIS0_EEx) #9
  unreachable

34:                                               ; No predecessors!
  br label %35

35:                                               ; preds = %34, %32
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #8
  %36 = load i64, ptr %4, align 8, !tbaa !9
  %37 = trunc i64 %36 to i32
  %38 = call i32 @llvm.cttz.i32(i32 %37, i1 true)
  %39 = sext i32 %38 to i64
  store i64 %39, ptr %5, align 8, !tbaa !9
  %40 = load i64, ptr %5, align 8, !tbaa !9
  call void @_Z8checkXORx(i64 noundef %40)
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #8
  %41 = load i64, ptr @lim, align 8, !tbaa !9
  %42 = load i64, ptr %5, align 8, !tbaa !9
  %43 = sub nsw i64 %41, %42
  store i64 %43, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #8
  store i64 0, ptr %7, align 8, !tbaa !9
  br label %44

44:                                               ; preds = %69, %35
  %45 = load i64, ptr %7, align 8, !tbaa !9
  %46 = load i64, ptr %4, align 8, !tbaa !9
  %47 = icmp slt i64 %45, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #8
  br label %72

49:                                               ; preds = %44
  %50 = load i64, ptr %7, align 8, !tbaa !9
  %51 = load i64, ptr %7, align 8, !tbaa !9
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %51) #8
  %53 = load i64, ptr %52, align 8, !tbaa !9
  %54 = load i64, ptr %6, align 8, !tbaa !9
  %55 = ashr i64 %53, %54
  %56 = icmp slt i64 %50, %55
  br i1 %56, label %57, label %68

57:                                               ; preds = %49
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = load i64, ptr %7, align 8, !tbaa !9
  %60 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %59) #8
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = load i64, ptr %7, align 8, !tbaa !9
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %62) #8
  %64 = load i64, ptr %63, align 8, !tbaa !9
  %65 = load i64, ptr %6, align 8, !tbaa !9
  %66 = ashr i64 %64, %65
  %67 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %66) #8
  call void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16) %60, ptr noundef nonnull align 8 dereferenceable(16) %67) #8
  br label %68

68:                                               ; preds = %57, %49
  br label %69

69:                                               ; preds = %68
  %70 = load i64, ptr %7, align 8, !tbaa !9
  %71 = add nsw i64 %70, 1
  store i64 %71, ptr %7, align 8, !tbaa !9
  br label %44, !llvm.loop !11

72:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  store i64 1, ptr %8, align 8, !tbaa !9
  br label %73

73:                                               ; preds = %173, %72
  %74 = load i64, ptr %8, align 8, !tbaa !9
  %75 = load i64, ptr %4, align 8, !tbaa !9
  %76 = icmp slt i64 %74, %75
  br i1 %76, label %78, label %77

77:                                               ; preds = %73
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  br label %176

78:                                               ; preds = %73
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #8
  store i64 0, ptr %10, align 8, !tbaa !9
  br label %79

79:                                               ; preds = %167, %78
  %80 = load i64, ptr %10, align 8, !tbaa !9
  %81 = load i64, ptr %4, align 8, !tbaa !9
  %82 = icmp slt i64 %80, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %79
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #8
  br label %172

84:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #8
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %85

85:                                               ; preds = %163, %84
  %86 = load i64, ptr %11, align 8, !tbaa !9
  %87 = load i64, ptr %8, align 8, !tbaa !9
  %88 = icmp slt i64 %86, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %85
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  br label %166

90:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #8
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = load i64, ptr %10, align 8, !tbaa !9
  %93 = load i64, ptr %11, align 8, !tbaa !9
  %94 = add nsw i64 %92, %93
  %95 = load i64, ptr %8, align 8, !tbaa !9
  %96 = add nsw i64 %94, %95
  %97 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %96) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %13, ptr align 8 %97, i64 16, i1 false), !tbaa.struct !13
  %98 = load i64, ptr %11, align 8, !tbaa !9
  %99 = load i64, ptr %8, align 8, !tbaa !9
  %100 = add nsw i64 %98, %99
  %101 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %100) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %101, i64 16, i1 false), !tbaa.struct !13
  %102 = getelementptr inbounds { double, double }, ptr %13, i32 0, i32 0
  %103 = load double, ptr %102, align 8
  %104 = getelementptr inbounds { double, double }, ptr %13, i32 0, i32 1
  %105 = load double, ptr %104, align 8
  %106 = getelementptr inbounds { double, double }, ptr %14, i32 0, i32 0
  %107 = load double, ptr %106, align 8
  %108 = getelementptr inbounds { double, double }, ptr %14, i32 0, i32 1
  %109 = load double, ptr %108, align 8
  %110 = call { double, double } @_Zml4baseS_(double %103, double %105, double %107, double %109)
  %111 = getelementptr inbounds { double, double }, ptr %12, i32 0, i32 0
  %112 = extractvalue { double, double } %110, 0
  store double %112, ptr %111, align 8
  %113 = getelementptr inbounds { double, double }, ptr %12, i32 0, i32 1
  %114 = extractvalue { double, double } %110, 1
  store double %114, ptr %113, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #8
  %115 = load ptr, ptr %3, align 8, !tbaa !5
  %116 = load i64, ptr %10, align 8, !tbaa !9
  %117 = load i64, ptr %11, align 8, !tbaa !9
  %118 = add nsw i64 %116, %117
  %119 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %118) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %16, ptr align 8 %119, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %17, ptr align 8 %12, i64 16, i1 false), !tbaa.struct !13
  %120 = getelementptr inbounds { double, double }, ptr %16, i32 0, i32 0
  %121 = load double, ptr %120, align 8
  %122 = getelementptr inbounds { double, double }, ptr %16, i32 0, i32 1
  %123 = load double, ptr %122, align 8
  %124 = getelementptr inbounds { double, double }, ptr %17, i32 0, i32 0
  %125 = load double, ptr %124, align 8
  %126 = getelementptr inbounds { double, double }, ptr %17, i32 0, i32 1
  %127 = load double, ptr %126, align 8
  %128 = call { double, double } @_Zmi4baseS_(double %121, double %123, double %125, double %127)
  %129 = getelementptr inbounds { double, double }, ptr %15, i32 0, i32 0
  %130 = extractvalue { double, double } %128, 0
  store double %130, ptr %129, align 8
  %131 = getelementptr inbounds { double, double }, ptr %15, i32 0, i32 1
  %132 = extractvalue { double, double } %128, 1
  store double %132, ptr %131, align 8
  %133 = load ptr, ptr %3, align 8, !tbaa !5
  %134 = load i64, ptr %10, align 8, !tbaa !9
  %135 = load i64, ptr %11, align 8, !tbaa !9
  %136 = add nsw i64 %134, %135
  %137 = load i64, ptr %8, align 8, !tbaa !9
  %138 = add nsw i64 %136, %137
  %139 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %133, i64 noundef %138) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %139, ptr align 8 %15, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #8
  call void @llvm.lifetime.start.p0(i64 16, ptr %18) #8
  %140 = load ptr, ptr %3, align 8, !tbaa !5
  %141 = load i64, ptr %10, align 8, !tbaa !9
  %142 = load i64, ptr %11, align 8, !tbaa !9
  %143 = add nsw i64 %141, %142
  %144 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %140, i64 noundef %143) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %19, ptr align 8 %144, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %20, ptr align 8 %12, i64 16, i1 false), !tbaa.struct !13
  %145 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 0
  %146 = load double, ptr %145, align 8
  %147 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 1
  %148 = load double, ptr %147, align 8
  %149 = getelementptr inbounds { double, double }, ptr %20, i32 0, i32 0
  %150 = load double, ptr %149, align 8
  %151 = getelementptr inbounds { double, double }, ptr %20, i32 0, i32 1
  %152 = load double, ptr %151, align 8
  %153 = call { double, double } @_Zpl4baseS_(double %146, double %148, double %150, double %152)
  %154 = getelementptr inbounds { double, double }, ptr %18, i32 0, i32 0
  %155 = extractvalue { double, double } %153, 0
  store double %155, ptr %154, align 8
  %156 = getelementptr inbounds { double, double }, ptr %18, i32 0, i32 1
  %157 = extractvalue { double, double } %153, 1
  store double %157, ptr %156, align 8
  %158 = load ptr, ptr %3, align 8, !tbaa !5
  %159 = load i64, ptr %10, align 8, !tbaa !9
  %160 = load i64, ptr %11, align 8, !tbaa !9
  %161 = add nsw i64 %159, %160
  %162 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %158, i64 noundef %161) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %162, ptr align 8 %18, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %18) #8
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #8
  br label %163

163:                                              ; preds = %90
  %164 = load i64, ptr %11, align 8, !tbaa !9
  %165 = add nsw i64 %164, 1
  store i64 %165, ptr %11, align 8, !tbaa !9
  br label %85, !llvm.loop !16

166:                                              ; preds = %89
  br label %167

167:                                              ; preds = %166
  %168 = load i64, ptr %8, align 8, !tbaa !9
  %169 = mul nsw i64 2, %168
  %170 = load i64, ptr %10, align 8, !tbaa !9
  %171 = add nsw i64 %170, %169
  store i64 %171, ptr %10, align 8, !tbaa !9
  br label %79, !llvm.loop !17

172:                                              ; preds = %83
  br label %173

173:                                              ; preds = %172
  %174 = load i64, ptr %8, align 8, !tbaa !9
  %175 = shl i64 %174, 1
  store i64 %175, ptr %8, align 8, !tbaa !9
  br label %73, !llvm.loop !18

176:                                              ; preds = %77
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #8
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zml4baseS_(double, double, double, double) #7

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zmi4baseS_(double, double, double, double) #7

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zpl4baseS_(double, double, double, double) #7

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{i64 0, i64 8, !14, i64 8, i64 8, !14}
!14 = !{!15, !15, i64 0}
!15 = !{!"double", !7, i64 0}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lim = external dso_local local_unnamed_addr global i64, align 8
@starters = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [93 x i8], align 1
@__PRETTY_FUNCTION__._Z5bitsNRSt6vectorI4baseSaIS0_EEx = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8checkXORx(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5bitsNRSt6vectorI4baseSaIS0_EEx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i64 %1, -1
  br i1 %3, label %4, label %6

4:                                                ; preds = %2
  %5 = tail call noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #7
  br label %6

6:                                                ; preds = %4, %2
  %.0 = phi i64 [ %5, %4 ], [ %1, %2 ]
  %7 = tail call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 %.0)
  %8 = icmp ult i64 %7, 2
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.4, i32 noundef 107, ptr noundef nonnull @__PRETTY_FUNCTION__._Z5bitsNRSt6vectorI4baseSaIS0_EEx) #8
  unreachable

10:                                               ; preds = %6
  %11 = trunc i64 %.0 to i32
  %12 = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %11, i1 true)
  %13 = zext nneg i32 %12 to i64
  tail call void @_Z8checkXORx(i64 noundef %13)
  %14 = load i64, ptr @lim, align 8, !tbaa !5
  %15 = sub nsw i64 %14, %13
  %16 = icmp sgt i64 %.0, 0
  br i1 %16, label %.lr.ph, label %._crit_edge

.preheader66:                                     ; preds = %52
  %.not = icmp eq i64 %.0, 1
  br i1 %.not, label %._crit_edge, label %.preheader65.us

.preheader65.us:                                  ; preds = %.preheader66, %._crit_edge71.us
  %.06172.us = phi i64 [ %18, %._crit_edge71.us ], [ 1, %.preheader66 ]
  %17 = icmp sgt i64 %.06172.us, 0
  %18 = shl i64 %.06172.us, 1
  br i1 %17, label %.preheader.us.us, label %._crit_edge71.us

._crit_edge71.us:                                 ; preds = %._crit_edge.us.us, %.preheader65.us
  %19 = icmp slt i64 %18, %.0
  br i1 %19, label %.preheader65.us, label %._crit_edge, !llvm.loop !9

.preheader.us.us:                                 ; preds = %.preheader65.us, %._crit_edge.us.us
  %.06270.us.us = phi i64 [ %40, %._crit_edge.us.us ], [ 0, %.preheader65.us ]
  br label %20

20:                                               ; preds = %20, %.preheader.us.us
  %.06368.us.us = phi i64 [ 0, %.preheader.us.us ], [ %39, %20 ]
  %21 = add nuw nsw i64 %.06368.us.us, %.06270.us.us
  %22 = add nuw nsw i64 %21, %.06172.us
  %23 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #7
  %.sroa.012.0.copyload.us.us = load double, ptr %23, align 8, !tbaa !11
  %.sroa.213.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %23, i64 8
  %.sroa.213.0.copyload.us.us = load double, ptr %.sroa.213.0..sroa_idx.us.us, align 8, !tbaa !11
  %24 = add nuw nsw i64 %.06368.us.us, %.06172.us
  %25 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %24) #7
  %.sroa.010.0.copyload.us.us = load double, ptr %25, align 8, !tbaa !11
  %.sroa.211.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %25, i64 8
  %.sroa.211.0.copyload.us.us = load double, ptr %.sroa.211.0..sroa_idx.us.us, align 8, !tbaa !11
  %26 = tail call { double, double } @_Zml4baseS_(double %.sroa.012.0.copyload.us.us, double %.sroa.213.0.copyload.us.us, double %.sroa.010.0.copyload.us.us, double %.sroa.211.0.copyload.us.us)
  %27 = extractvalue { double, double } %26, 0
  %28 = extractvalue { double, double } %26, 1
  %29 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #7
  %.sroa.06.0.copyload.us.us = load double, ptr %29, align 8, !tbaa !11
  %.sroa.27.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %29, i64 8
  %.sroa.27.0.copyload.us.us = load double, ptr %.sroa.27.0..sroa_idx.us.us, align 8, !tbaa !11
  %30 = tail call { double, double } @_Zmi4baseS_(double %.sroa.06.0.copyload.us.us, double %.sroa.27.0.copyload.us.us, double %27, double %28)
  %31 = extractvalue { double, double } %30, 0
  %32 = extractvalue { double, double } %30, 1
  %33 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #7
  store double %31, ptr %33, align 8, !tbaa !11
  %.sroa.49.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %33, i64 8
  store double %32, ptr %.sroa.49.0..sroa_idx.us.us, align 8, !tbaa !11
  %34 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #7
  %.sroa.01.0.copyload.us.us = load double, ptr %34, align 8, !tbaa !11
  %.sroa.22.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %34, i64 8
  %.sroa.22.0.copyload.us.us = load double, ptr %.sroa.22.0..sroa_idx.us.us, align 8, !tbaa !11
  %35 = tail call { double, double } @_Zpl4baseS_(double %.sroa.01.0.copyload.us.us, double %.sroa.22.0.copyload.us.us, double %27, double %28)
  %36 = extractvalue { double, double } %35, 0
  %37 = extractvalue { double, double } %35, 1
  %38 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #7
  store double %36, ptr %38, align 8, !tbaa !11
  %.sroa.4.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %38, i64 8
  store double %37, ptr %.sroa.4.0..sroa_idx.us.us, align 8, !tbaa !11
  %39 = add nuw nsw i64 %.06368.us.us, 1
  %exitcond79.not = icmp eq i64 %39, %.06172.us
  br i1 %exitcond79.not, label %._crit_edge.us.us, label %20, !llvm.loop !13

._crit_edge.us.us:                                ; preds = %20
  %40 = add nuw nsw i64 %.06270.us.us, %18
  %41 = icmp slt i64 %40, %.0
  br i1 %41, label %.preheader.us.us, label %._crit_edge71.us, !llvm.loop !14

.lr.ph:                                           ; preds = %10, %52
  %.06067 = phi i64 [ %53, %52 ], [ 0, %10 ]
  %42 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %.06067) #7
  %43 = load i64, ptr %42, align 8, !tbaa !5
  %44 = ashr i64 %43, %15
  %45 = icmp slt i64 %.06067, %44
  br i1 %45, label %46, label %52

46:                                               ; preds = %.lr.ph
  %47 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.06067) #7
  %48 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %.06067) #7
  %49 = load i64, ptr %48, align 8, !tbaa !5
  %50 = ashr i64 %49, %15
  %51 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %50) #7
  tail call void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16) %47, ptr noundef nonnull align 8 dereferenceable(16) %51) #7
  br label %52

52:                                               ; preds = %.lr.ph, %46
  %53 = add nuw nsw i64 %.06067, 1
  %exitcond.not = icmp eq i64 %53, %.0
  br i1 %exitcond.not, label %.preheader66, label %.lr.ph, !llvm.loop !15

._crit_edge:                                      ; preds = %._crit_edge71.us, %10, %.preheader66
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zml4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zmi4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zpl4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.ctpop.i64(i64) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass