; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (32b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDRAM_HandleTypeDef = type { ptr, %struct.FMC_SDRAM_InitTypeDef, i32, i32, ptr }
%struct.FMC_SDRAM_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SDRAM_Write_32b(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %14, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %15, ptr %12, align 8, !tbaa !5
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %16, i32 0, i32 2
  %18 = load volatile i32, ptr %17, align 8, !tbaa !11
  %19 = icmp eq i32 %18, 2
  br i1 %19, label %20, label %21

20:                                               ; preds = %4
  store i32 2, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %67

21:                                               ; preds = %4
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %22, i32 0, i32 2
  %24 = load volatile i32, ptr %23, align 8, !tbaa !11
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %64

26:                                               ; preds = %21
  br label %27

27:                                               ; preds = %26
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %28, i32 0, i32 3
  %30 = load i32, ptr %29, align 4, !tbaa !14
  %31 = icmp eq i32 %30, 1
  br i1 %31, label %32, label %33

32:                                               ; preds = %27
  store i32 2, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %67

33:                                               ; preds = %27
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %34, i32 0, i32 3
  store i32 1, ptr %35, align 4, !tbaa !14
  br label %36

36:                                               ; preds = %33
  br label %37

37:                                               ; preds = %36
  br label %38

38:                                               ; preds = %37
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %39, i32 0, i32 2
  store volatile i32 2, ptr %40, align 8, !tbaa !11
  %41 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %41, ptr %10, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %53, %38
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %56

45:                                               ; preds = %42
  %46 = load ptr, ptr %12, align 8, !tbaa !5
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = load ptr, ptr %11, align 8, !tbaa !5
  store volatile i32 %47, ptr %48, align 4, !tbaa !9
  %49 = load ptr, ptr %12, align 8, !tbaa !5
  %50 = getelementptr inbounds i32, ptr %49, i32 1
  store ptr %50, ptr %12, align 8, !tbaa !5
  %51 = load ptr, ptr %11, align 8, !tbaa !5
  %52 = getelementptr inbounds i32, ptr %51, i32 1
  store ptr %52, ptr %11, align 8, !tbaa !5
  br label %53

53:                                               ; preds = %45
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = add i32 %54, -1
  store i32 %55, ptr %10, align 4, !tbaa !9
  br label %42, !llvm.loop !15

56:                                               ; preds = %42
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %57, i32 0, i32 2
  store volatile i32 1, ptr %58, align 8, !tbaa !11
  br label %59

59:                                               ; preds = %56
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.SDRAM_HandleTypeDef, ptr %60, i32 0, i32 3
  store i32 0, ptr %61, align 4, !tbaa !14
  br label %62

62:                                               ; preds = %59
  br label %63

63:                                               ; preds = %62
  br label %65

64:                                               ; preds = %21
  store i32 1, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %67

65:                                               ; preds = %63
  br label %66

66:                                               ; preds = %65
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %67

67:                                               ; preds = %66, %64, %32, %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %68 = load i32, ptr %5, align 4
  ret i32 %68
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 48, !10, i64 52, !6, i64 56}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36}
!14 = !{!12, !10, i64 52}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SDRAM_Write_32b(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = load volatile i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 2
  br i1 %7, label %46, label %8

8:                                                ; preds = %4
  %9 = load volatile i32, ptr %5, align 8, !tbaa !5
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %46

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 52
  %13 = load i32, ptr %12, align 4, !tbaa !12
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %46, label %15

15:                                               ; preds = %11
  store i32 1, ptr %12, align 4, !tbaa !12
  store volatile i32 2, ptr %5, align 8, !tbaa !5
  %.not19 = icmp eq i32 %3, 0
  br i1 %.not19, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %15
  %xtraiter = and i32 %3, 7
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader, %.lr.ph.prol
  %.022.prol = phi ptr [ %17, %.lr.ph.prol ], [ %2, %.lr.ph.preheader ]
  %.01621.prol = phi ptr [ %18, %.lr.ph.prol ], [ %1, %.lr.ph.preheader ]
  %.01720.prol = phi i32 [ %19, %.lr.ph.prol ], [ %3, %.lr.ph.preheader ]
  %prol.iter = phi i32 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader ]
  %16 = load i32, ptr %.022.prol, align 4, !tbaa !13
  store volatile i32 %16, ptr %.01621.prol, align 4, !tbaa !13
  %17 = getelementptr inbounds i8, ptr %.022.prol, i64 4
  %18 = getelementptr inbounds i8, ptr %.01621.prol, i64 4
  %19 = add i32 %.01720.prol, -1
  %prol.iter.next = add i32 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i32 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !14

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %.022.unr = phi ptr [ %2, %.lr.ph.preheader ], [ %17, %.lr.ph.prol ]
  %.01621.unr = phi ptr [ %1, %.lr.ph.preheader ], [ %18, %.lr.ph.prol ]
  %.01720.unr = phi i32 [ %3, %.lr.ph.preheader ], [ %19, %.lr.ph.prol ]
  %20 = icmp ult i32 %3, 8
  br i1 %20, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.022 = phi ptr [ %43, %.lr.ph ], [ %.022.unr, %.lr.ph.prol.loopexit ]
  %.01621 = phi ptr [ %44, %.lr.ph ], [ %.01621.unr, %.lr.ph.prol.loopexit ]
  %.01720 = phi i32 [ %45, %.lr.ph ], [ %.01720.unr, %.lr.ph.prol.loopexit ]
  %21 = load i32, ptr %.022, align 4, !tbaa !13
  store volatile i32 %21, ptr %.01621, align 4, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %.022, i64 4
  %23 = getelementptr inbounds i8, ptr %.01621, i64 4
  %24 = load i32, ptr %22, align 4, !tbaa !13
  store volatile i32 %24, ptr %23, align 4, !tbaa !13
  %25 = getelementptr inbounds i8, ptr %.022, i64 8
  %26 = getelementptr inbounds i8, ptr %.01621, i64 8
  %27 = load i32, ptr %25, align 4, !tbaa !13
  store volatile i32 %27, ptr %26, align 4, !tbaa !13
  %28 = getelementptr inbounds i8, ptr %.022, i64 12
  %29 = getelementptr inbounds i8, ptr %.01621, i64 12
  %30 = load i32, ptr %28, align 4, !tbaa !13
  store volatile i32 %30, ptr %29, align 4, !tbaa !13
  %31 = getelementptr inbounds i8, ptr %.022, i64 16
  %32 = getelementptr inbounds i8, ptr %.01621, i64 16
  %33 = load i32, ptr %31, align 4, !tbaa !13
  store volatile i32 %33, ptr %32, align 4, !tbaa !13
  %34 = getelementptr inbounds i8, ptr %.022, i64 20
  %35 = getelementptr inbounds i8, ptr %.01621, i64 20
  %36 = load i32, ptr %34, align 4, !tbaa !13
  store volatile i32 %36, ptr %35, align 4, !tbaa !13
  %37 = getelementptr inbounds i8, ptr %.022, i64 24
  %38 = getelementptr inbounds i8, ptr %.01621, i64 24
  %39 = load i32, ptr %37, align 4, !tbaa !13
  store volatile i32 %39, ptr %38, align 4, !tbaa !13
  %40 = getelementptr inbounds i8, ptr %.022, i64 28
  %41 = getelementptr inbounds i8, ptr %.01621, i64 28
  %42 = load i32, ptr %40, align 4, !tbaa !13
  store volatile i32 %42, ptr %41, align 4, !tbaa !13
  %43 = getelementptr inbounds i8, ptr %.022, i64 32
  %44 = getelementptr inbounds i8, ptr %.01621, i64 32
  %45 = add i32 %.01720, -8
  %.not.7 = icmp eq i32 %45, 0
  br i1 %.not.7, label %._crit_edge, label %.lr.ph, !llvm.loop !16

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %15
  store volatile i32 1, ptr %5, align 8, !tbaa !5
  store i32 0, ptr %12, align 4, !tbaa !12
  br label %46

46:                                               ; preds = %8, %11, %4, %._crit_edge
  %.018 = phi i32 [ 0, %._crit_edge ], [ 2, %4 ], [ 2, %11 ], [ 1, %8 ]
  ret i32 %.018
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 48, !11, i64 52, !7, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 52}
!13 = !{!11, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.unroll.disable"}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass