; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SD_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca %struct.SDMMC_InitTypeDef, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 20, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %9, i32 0, i32 8
  store volatile i32 3, ptr %10, align 8, !tbaa !11
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %11, i32 0, i32 10
  %13 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %12, i32 0, i32 0
  %14 = load i32, ptr %13, align 8, !tbaa !15
  %15 = icmp ne i32 %14, 3
  br i1 %15, label %16, label %56

16:                                               ; preds = %2
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = zext i32 %17 to i64
  %19 = icmp eq i64 %18, 32768
  br i1 %19, label %20, label %25

20:                                               ; preds = %16
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %21, i32 0, i32 9
  %23 = load volatile i32, ptr %22, align 4, !tbaa !16
  %24 = or i32 %23, 268435456
  store volatile i32 %24, ptr %22, align 4, !tbaa !16
  br label %55

25:                                               ; preds = %16
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = zext i32 %26 to i64
  %28 = icmp eq i64 %27, 16384
  br i1 %28, label %29, label %37

29:                                               ; preds = %25
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = call i32 @SD_WideBus_Enable(ptr noundef %30)
  store i32 %31, ptr %7, align 4, !tbaa !9
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %33, i32 0, i32 9
  %35 = load volatile i32, ptr %34, align 4, !tbaa !16
  %36 = or i32 %35, %32
  store volatile i32 %36, ptr %34, align 4, !tbaa !16
  br label %54

37:                                               ; preds = %25
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %48

40:                                               ; preds = %37
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = call i32 @SD_WideBus_Disable(ptr noundef %41)
  store i32 %42, ptr %7, align 4, !tbaa !9
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %44, i32 0, i32 9
  %46 = load volatile i32, ptr %45, align 4, !tbaa !16
  %47 = or i32 %46, %43
  store volatile i32 %47, ptr %45, align 4, !tbaa !16
  br label %53

48:                                               ; preds = %37
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %49, i32 0, i32 9
  %51 = load volatile i32, ptr %50, align 4, !tbaa !16
  %52 = or i32 %51, 134217728
  store volatile i32 %52, ptr %50, align 4, !tbaa !16
  br label %53

53:                                               ; preds = %48, %40
  br label %54

54:                                               ; preds = %53, %29
  br label %55

55:                                               ; preds = %54, %20
  br label %61

56:                                               ; preds = %2
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %57, i32 0, i32 9
  %59 = load volatile i32, ptr %58, align 4, !tbaa !16
  %60 = or i32 %59, 268435456
  store volatile i32 %60, ptr %58, align 4, !tbaa !16
  br label %61

61:                                               ; preds = %56, %55
  %62 = load ptr, ptr %4, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %62, i32 0, i32 9
  %64 = load volatile i32, ptr %63, align 4, !tbaa !16
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %73

66:                                               ; preds = %61
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %67, i32 0, i32 0
  %69 = load ptr, ptr %68, align 8, !tbaa !17
  %70 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %69, i32 0, i32 14
  store volatile i32 534777855, ptr %70, align 4, !tbaa !18
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %71, i32 0, i32 8
  store volatile i32 1, ptr %72, align 8, !tbaa !11
  store i32 1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %134

73:                                               ; preds = %61
  %74 = load ptr, ptr %4, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %74, i32 0, i32 1
  %76 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %75, i32 0, i32 0
  %77 = load i32, ptr %76, align 8, !tbaa !20
  %78 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 0
  store i32 %77, ptr %78, align 4, !tbaa !21
  %79 = load ptr, ptr %4, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %79, i32 0, i32 1
  %81 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %80, i32 0, i32 1
  %82 = load i32, ptr %81, align 4, !tbaa !22
  %83 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 1
  store i32 %82, ptr %83, align 4, !tbaa !23
  %84 = load i32, ptr %5, align 4, !tbaa !9
  %85 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 2
  store i32 %84, ptr %85, align 4, !tbaa !24
  %86 = load ptr, ptr %4, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %86, i32 0, i32 1
  %88 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %87, i32 0, i32 3
  %89 = load i32, ptr %88, align 4, !tbaa !25
  %90 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 3
  store i32 %89, ptr %90, align 4, !tbaa !26
  %91 = load ptr, ptr %4, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %91, i32 0, i32 1
  %93 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %92, i32 0, i32 4
  %94 = load i32, ptr %93, align 8, !tbaa !27
  %95 = icmp uge i32 %94, 4
  br i1 %95, label %96, label %102

96:                                               ; preds = %73
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %97, i32 0, i32 1
  %99 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %98, i32 0, i32 4
  %100 = load i32, ptr %99, align 8, !tbaa !27
  %101 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 4
  store i32 %100, ptr %101, align 4, !tbaa !28
  br label %126

102:                                              ; preds = %73
  %103 = load ptr, ptr %4, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %103, i32 0, i32 10
  %105 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %104, i32 0, i32 8
  %106 = load i32, ptr %105, align 8, !tbaa !29
  %107 = icmp eq i32 %106, 512
  br i1 %107, label %108, label %114

108:                                              ; preds = %102
  %109 = load ptr, ptr %4, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %109, i32 0, i32 1
  %111 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %110, i32 0, i32 4
  %112 = load i32, ptr %111, align 8, !tbaa !27
  %113 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 4
  store i32 %112, ptr %113, align 4, !tbaa !28
  br label %125

114:                                              ; preds = %102
  %115 = load ptr, ptr %4, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %115, i32 0, i32 10
  %117 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %116, i32 0, i32 8
  %118 = load i32, ptr %117, align 8, !tbaa !29
  %119 = icmp eq i32 %118, 256
  br i1 %119, label %120, label %122

120:                                              ; preds = %114
  %121 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 4
  store i32 2, ptr %121, align 4, !tbaa !28
  br label %124

122:                                              ; preds = %114
  %123 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %6, i32 0, i32 4
  store i32 4, ptr %123, align 4, !tbaa !28
  br label %124

124:                                              ; preds = %122, %120
  br label %125

125:                                              ; preds = %124, %108
  br label %126

126:                                              ; preds = %125, %96
  %127 = load ptr, ptr %4, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %127, i32 0, i32 0
  %129 = load ptr, ptr %128, align 8, !tbaa !17
  %130 = call i32 @SDMMC_Init(ptr noundef %129, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8 %6)
  br label %131

131:                                              ; preds = %126
  %132 = load ptr, ptr %4, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %132, i32 0, i32 8
  store volatile i32 1, ptr %133, align 8, !tbaa !11
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %134

134:                                              ; preds = %131, %66
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 20, ptr %6) #3
  %135 = load i32, ptr %3, align 4
  ret i32 %135
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Enable(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Disable(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 108, !7, i64 124}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!12, !10, i64 72}
!16 = !{!12, !10, i64 68}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !10, i64 56}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!20 = !{!12, !10, i64 8}
!21 = !{!13, !10, i64 0}
!22 = !{!12, !10, i64 12}
!23 = !{!13, !10, i64 4}
!24 = !{!13, !10, i64 8}
!25 = !{!12, !10, i64 20}
!26 = !{!13, !10, i64 12}
!27 = !{!12, !10, i64 24}
!28 = !{!13, !10, i64 16}
!29 = !{!12, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_SD_ConfigWideBusOperation(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = alloca %struct.SDMMC_InitTypeDef, align 8
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 3, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 72
  %6 = load i32, ptr %5, align 8, !tbaa !13
  %.not = icmp eq i32 %6, 3
  br i1 %.not, label %13, label %7

7:                                                ; preds = %2
  switch i32 %1, label %12 [
    i32 32768, label %13
    i32 16384, label %8
    i32 0, label %10
  ]

8:                                                ; preds = %7
  %9 = tail call i32 @SD_WideBus_Enable(ptr noundef nonnull %0)
  br label %13

10:                                               ; preds = %7
  %11 = tail call i32 @SD_WideBus_Disable(ptr noundef nonnull %0)
  br label %13

12:                                               ; preds = %7
  br label %13

13:                                               ; preds = %2, %7, %10, %12, %8
  %.sink34 = phi i32 [ %11, %10 ], [ 134217728, %12 ], [ %9, %8 ], [ 268435456, %7 ], [ 268435456, %2 ]
  %14 = getelementptr inbounds i8, ptr %0, i64 68
  %15 = load volatile i32, ptr %14, align 4, !tbaa !14
  %16 = or i32 %15, %.sink34
  store volatile i32 %16, ptr %14, align 4, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %0, i64 68
  %18 = load volatile i32, ptr %17, align 4, !tbaa !14
  %.not31 = icmp eq i32 %18, 0
  br i1 %.not31, label %22, label %19

19:                                               ; preds = %13
  %20 = load ptr, ptr %0, align 8, !tbaa !15
  %21 = getelementptr inbounds i8, ptr %20, i64 56
  store volatile i32 534777855, ptr %21, align 4, !tbaa !16
  br label %44

22:                                               ; preds = %13
  %23 = getelementptr inbounds i8, ptr %0, i64 8
  %24 = load <2 x i32>, ptr %23, align 8, !tbaa !18
  store <2 x i32> %24, ptr %3, align 8, !tbaa !18
  %25 = getelementptr inbounds i8, ptr %3, i64 8
  store i32 %1, ptr %25, align 8, !tbaa !19
  %26 = getelementptr inbounds i8, ptr %0, i64 20
  %27 = load i32, ptr %26, align 4, !tbaa !20
  %28 = getelementptr inbounds i8, ptr %3, i64 12
  store i32 %27, ptr %28, align 4, !tbaa !21
  %29 = getelementptr inbounds i8, ptr %0, i64 24
  %30 = load i32, ptr %29, align 8, !tbaa !22
  %31 = icmp ugt i32 %30, 3
  br i1 %31, label %32, label %34

32:                                               ; preds = %22
  %33 = getelementptr inbounds i8, ptr %3, i64 16
  store i32 %30, ptr %33, align 8, !tbaa !23
  br label %41

34:                                               ; preds = %22
  %35 = getelementptr inbounds i8, ptr %0, i64 104
  %36 = load i32, ptr %35, align 8, !tbaa !24
  %37 = getelementptr inbounds i8, ptr %3, i64 16
  switch i32 %36, label %40 [
    i32 512, label %38
    i32 256, label %39
  ]

38:                                               ; preds = %34
  store i32 %30, ptr %37, align 8, !tbaa !23
  br label %41

39:                                               ; preds = %34
  store i32 2, ptr %37, align 8, !tbaa !23
  br label %41

40:                                               ; preds = %34
  store i32 4, ptr %37, align 8, !tbaa !23
  br label %41

41:                                               ; preds = %38, %40, %39, %32
  %42 = load ptr, ptr %0, align 8, !tbaa !15
  %43 = tail call i32 @SDMMC_Init(ptr noundef %42, ptr noundef nonnull byval(%struct.SDMMC_InitTypeDef) align 8 %3) #3
  br label %44

44:                                               ; preds = %41, %19
  %.0 = phi i32 [ 1, %19 ], [ 0, %41 ]
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %3) #3
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_Init(ptr noundef, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Enable(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @SD_WideBus_Disable(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 28, !7, i64 32, !11, i64 40, !7, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !12, i64 72, !8, i64 108, !8, i64 124}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!13 = !{!6, !11, i64 72}
!14 = !{!6, !11, i64 68}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 56}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !8, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !8, i64 132, !11, i64 1020}
!18 = !{!11, !11, i64 0}
!19 = !{!10, !11, i64 8}
!20 = !{!6, !11, i64 20}
!21 = !{!10, !11, i64 12}
!22 = !{!6, !11, i64 24}
!23 = !{!10, !11, i64 16}
!24 = !{!6, !11, i64 104}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass