; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/SDMemory.ll (ZN8SDMemoryD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SDMemory = type { %class.MemoryController, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", i32, i32, i32, i32, i32, i32, ptr, %"class.std::vector.3", %"class.std::vector.3", ptr, ptr, ptr, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, %"class.std::__cxx11::list", %"class.std::vector", ptr, i32, %class.SDMemoryStats }
%class.MemoryController = type { %class.Unit }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::list" = type { %"class.std::__cxx11::_List_base" }
%"class.std::__cxx11::_List_base" = type { %"struct.std::__cxx11::_List_base<DataPackage *, std::allocator<DataPackage *>>::_List_impl" }
%"struct.std::__cxx11::_List_base<DataPackage *, std::allocator<DataPackage *>>::_List_impl" = type { %"struct.std::__detail::_List_node_header" }
%"struct.std::__detail::_List_node_header" = type { %"struct.std::__detail::_List_node_base", i64 }
%"struct.std::__detail::_List_node_base" = type { ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.SDMemoryStats = type { %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::vector.11", %"class.std::vector.11", %"class.std::vector.11", %"class.std::vector.11" }
%class.Stats = type { ptr }
%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTV8SDMemory = external dso_local unnamed_addr constant { [18 x ptr] }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN13SDMemoryStatsD2Ev(ptr noundef nonnull align 8 dereferenceable(152)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8SDMemoryD2Ev(ptr noundef nonnull align 8 dereferenceable(568) %0) unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %6 = load ptr, ptr %2, align 8
  store ptr getelementptr inbounds inrange(-16, 128) ({ [18 x ptr] }, ptr @_ZTV8SDMemory, i32 0, i32 0, i32 2), ptr %6, align 8, !tbaa !9
  %7 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 13
  %8 = load ptr, ptr %7, align 8, !tbaa !11
  %9 = icmp eq ptr %8, null
  br i1 %9, label %11, label %10

10:                                               ; preds = %1
  call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %8) #5
  call void @_ZdlPvm(ptr noundef %8, i64 noundef 120) #6
  br label %11

11:                                               ; preds = %10, %1
  %12 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 23
  %13 = load i8, ptr %12, align 4, !tbaa !40, !range !41, !noundef !42
  %14 = trunc i8 %13 to i1
  br i1 %14, label %15, label %44

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  %16 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 2
  %17 = load ptr, ptr %16, align 8, !tbaa !43
  %18 = invoke noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %17)
          to label %19 unwind label %78

19:                                               ; preds = %15
  store i32 %18, ptr %3, align 4, !tbaa !44
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !44
  br label %20

20:                                               ; preds = %35, %19
  %21 = load i32, ptr %4, align 4, !tbaa !44
  %22 = load i32, ptr %3, align 4, !tbaa !44
  %23 = icmp ult i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %38

25:                                               ; preds = %20
  %26 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 57
  %27 = load ptr, ptr %26, align 8, !tbaa !45
  %28 = load i32, ptr %4, align 4, !tbaa !44
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds ptr, ptr %27, i64 %29
  %31 = load ptr, ptr %30, align 8, !tbaa !5
  %32 = icmp eq ptr %31, null
  br i1 %32, label %34, label %33

33:                                               ; preds = %25
  call void @_ZdlPvm(ptr noundef %31, i64 noundef 128) #6
  br label %34

34:                                               ; preds = %33, %25
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %4, align 4, !tbaa !44
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %4, align 4, !tbaa !44
  br label %20, !llvm.loop !46

38:                                               ; preds = %24
  %39 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 57
  %40 = load ptr, ptr %39, align 8, !tbaa !45
  %41 = icmp eq ptr %40, null
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  call void @_ZdaPv(ptr noundef %40) #6
  br label %43

43:                                               ; preds = %42, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %44

44:                                               ; preds = %43, %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !44
  br label %45

45:                                               ; preds = %68, %44
  %46 = load i32, ptr %5, align 4, !tbaa !44
  %47 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 8
  %48 = load i32, ptr %47, align 4, !tbaa !48
  %49 = icmp ult i32 %46, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %71

51:                                               ; preds = %45
  %52 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 14
  %53 = load i32, ptr %5, align 4, !tbaa !44
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #5
  %56 = load ptr, ptr %55, align 8, !tbaa !5
  %57 = icmp eq ptr %56, null
  br i1 %57, label %59, label %58

58:                                               ; preds = %51
  call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %56) #5
  call void @_ZdlPvm(ptr noundef %56, i64 noundef 120) #6
  br label %59

59:                                               ; preds = %58, %51
  %60 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 15
  %61 = load i32, ptr %5, align 4, !tbaa !44
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #5
  %64 = load ptr, ptr %63, align 8, !tbaa !5
  %65 = icmp eq ptr %64, null
  br i1 %65, label %67, label %66

66:                                               ; preds = %59
  call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %64) #5
  call void @_ZdlPvm(ptr noundef %64, i64 noundef 120) #6
  br label %67

67:                                               ; preds = %66, %59
  br label %68

68:                                               ; preds = %67
  %69 = load i32, ptr %5, align 4, !tbaa !44
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %5, align 4, !tbaa !44
  br label %45, !llvm.loop !49

71:                                               ; preds = %50
  %72 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 59
  call void @_ZN13SDMemoryStatsD2Ev(ptr noundef nonnull align 8 dereferenceable(152) %72) #5
  %73 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 56
  call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %73) #5
  %74 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 55
  call void @_ZNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %74) #5
  %75 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 15
  call void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %75) #5
  %76 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 14
  call void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %76) #5
  %77 = getelementptr inbounds %class.SDMemory, ptr %6, i32 0, i32 6
  call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %77) #5
  call void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %6) #5
  ret void

78:                                               ; preds = %15
  %79 = landingpad { ptr, i32 }
          catch ptr null
  %80 = extractvalue { ptr, i32 } %79, 0
  call void @__clang_call_terminate(ptr %80) #7
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41)) #3 align 2

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 136}
!12 = !{!"_ZTS8SDMemory", !13, i64 0, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !19, i64 88, !15, i64 112, !15, i64 116, !15, i64 120, !15, i64 124, !15, i64 128, !15, i64 132, !6, i64 136, !23, i64 144, !23, i64 168, !6, i64 192, !6, i64 200, !6, i64 208, !27, i64 216, !27, i64 217, !27, i64 218, !27, i64 219, !27, i64 220, !27, i64 221, !15, i64 224, !15, i64 228, !15, i64 232, !15, i64 236, !15, i64 240, !15, i64 244, !15, i64 248, !15, i64 252, !15, i64 256, !15, i64 260, !15, i64 264, !15, i64 268, !15, i64 272, !15, i64 276, !15, i64 280, !15, i64 284, !15, i64 288, !15, i64 292, !15, i64 296, !15, i64 300, !15, i64 304, !15, i64 308, !15, i64 312, !15, i64 316, !15, i64 320, !15, i64 324, !15, i64 328, !15, i64 332, !15, i64 336, !6, i64 344, !28, i64 352, !19, i64 376, !6, i64 400, !15, i64 408, !33, i64 416}
!13 = !{!"_ZTS16MemoryController", !14, i64 0}
!14 = !{!"_ZTS4Unit", !15, i64 8, !16, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !17, i64 0, !18, i64 8, !7, i64 16}
!17 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!18 = !{!"long", !7, i64 0}
!19 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"_ZTSNSt7__cxx114listIP11DataPackageSaIS2_EEE", !29, i64 0}
!29 = !{!"_ZTSNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EEE", !30, i64 0}
!30 = !{!"_ZTSNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EE10_List_implE", !31, i64 0}
!31 = !{!"_ZTSNSt8__detail17_List_node_headerE", !32, i64 0, !18, i64 16}
!32 = !{!"_ZTSNSt8__detail15_List_node_baseE", !6, i64 0, !6, i64 8}
!33 = !{!"_ZTS13SDMemoryStats", !34, i64 0, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !35, i64 48, !36, i64 56, !36, i64 80, !36, i64 104, !36, i64 128}
!34 = !{!"_ZTS5Stats"}
!35 = !{!"_ZTS8Dataflow", !7, i64 0}
!36 = !{!"_ZTSSt6vectorIjSaIjEE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!40 = !{!12, !27, i64 220}
!41 = !{i8 0, i8 2}
!42 = !{}
!43 = !{!12, !6, i64 56}
!44 = !{!15, !15, i64 0}
!45 = !{!12, !6, i64 400}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}
!48 = !{!12, !15, i64 116}
!49 = distinct !{!49, !47}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV8SDMemory = external dso_local unnamed_addr constant { [18 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN13SDMemoryStatsD2Ev(ptr noundef nonnull align 8 dereferenceable(152)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8SDMemoryD2Ev(ptr noundef nonnull align 8 dereferenceable(568) %0) unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  store ptr getelementptr inbounds inrange(-16, 128) (i8, ptr @_ZTV8SDMemory, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 136
  %3 = load ptr, ptr %2, align 8, !tbaa !8
  %4 = icmp eq ptr %3, null
  br i1 %4, label %6, label %5

5:                                                ; preds = %1
  tail call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %3) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 120) #4
  br label %6

6:                                                ; preds = %5, %1
  %7 = getelementptr inbounds i8, ptr %0, i64 220
  %8 = load i8, ptr %7, align 4, !tbaa !39, !range !40, !noundef !41
  %9 = trunc nuw i8 %8 to i1
  br i1 %9, label %10, label %26

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %0, i64 56
  %12 = load ptr, ptr %11, align 8, !tbaa !42
  %13 = tail call noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41) %12)
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %10
  %14 = getelementptr inbounds i8, ptr %0, i64 400
  %wide.trip.count = zext i32 %13 to i64
  br label %18

._crit_edge:                                      ; preds = %24, %10
  %15 = getelementptr inbounds i8, ptr %0, i64 400
  %16 = load ptr, ptr %15, align 8, !tbaa !43
  %17 = icmp eq ptr %16, null
  br i1 %17, label %26, label %25

18:                                               ; preds = %.lr.ph, %24
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %24 ]
  %19 = load ptr, ptr %14, align 8, !tbaa !43
  %20 = getelementptr inbounds ptr, ptr %19, i64 %indvars.iv
  %21 = load ptr, ptr %20, align 8, !tbaa !44
  %22 = icmp eq ptr %21, null
  br i1 %22, label %24, label %23

23:                                               ; preds = %18
  tail call void @_ZdlPvm(ptr noundef nonnull %21, i64 noundef 128) #4
  br label %24

24:                                               ; preds = %18, %23
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %18, !llvm.loop !45

25:                                               ; preds = %._crit_edge
  tail call void @_ZdaPv(ptr noundef nonnull %16) #4
  br label %26

26:                                               ; preds = %._crit_edge, %25, %6
  %27 = getelementptr inbounds i8, ptr %0, i64 116
  %28 = load i32, ptr %27, align 4, !tbaa !47
  %.not19 = icmp eq i32 %28, 0
  br i1 %.not19, label %._crit_edge18, label %.lr.ph17

.lr.ph17:                                         ; preds = %26
  %29 = getelementptr inbounds i8, ptr %0, i64 144
  %30 = getelementptr inbounds i8, ptr %0, i64 168
  br label %37

._crit_edge18:                                    ; preds = %47, %26
  %31 = getelementptr inbounds i8, ptr %0, i64 416
  tail call void @_ZN13SDMemoryStatsD2Ev(ptr noundef nonnull align 8 dereferenceable(152) %31) #3
  %32 = getelementptr inbounds i8, ptr %0, i64 376
  tail call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %32) #3
  %33 = getelementptr inbounds i8, ptr %0, i64 352
  tail call void @_ZNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %33) #3
  %34 = getelementptr inbounds i8, ptr %0, i64 168
  tail call void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %34) #3
  %35 = getelementptr inbounds i8, ptr %0, i64 144
  tail call void @_ZNSt6vectorIP4FifoSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %35) #3
  %36 = getelementptr inbounds i8, ptr %0, i64 88
  tail call void @_ZNSt6vectorIP10ConnectionSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %36) #3
  tail call void @_ZN4UnitD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %0) #3
  ret void

37:                                               ; preds = %.lr.ph17, %47
  %indvars.iv21 = phi i64 [ 0, %.lr.ph17 ], [ %indvars.iv.next22, %47 ]
  %38 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv21) #3
  %39 = load ptr, ptr %38, align 8, !tbaa !44
  %40 = icmp eq ptr %39, null
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  tail call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %39) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %39, i64 noundef 120) #4
  br label %42

42:                                               ; preds = %41, %37
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %indvars.iv21) #3
  %44 = load ptr, ptr %43, align 8, !tbaa !44
  %45 = icmp eq ptr %44, null
  br i1 %45, label %47, label %46

46:                                               ; preds = %42
  tail call void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120) %44) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %44, i64 noundef 120) #4
  br label %47

47:                                               ; preds = %42, %46
  %indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
  %48 = load i32, ptr %27, align 4, !tbaa !47
  %49 = zext i32 %48 to i64
  %50 = icmp ult i64 %indvars.iv.next22, %49
  br i1 %50, label %37, label %._crit_edge18, !llvm.loop !48
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4FifoD2Ev(ptr noundef nonnull align 8 dereferenceable(120)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile11get_Num_VNsEv(ptr noundef nonnull align 4 dereferenceable(41)) local_unnamed_addr #2 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !16, i64 136}
!9 = !{!"_ZTS8SDMemory", !10, i64 0, !16, i64 48, !16, i64 56, !16, i64 64, !16, i64 72, !16, i64 80, !18, i64 88, !12, i64 112, !12, i64 116, !12, i64 120, !12, i64 124, !12, i64 128, !12, i64 132, !16, i64 136, !22, i64 144, !22, i64 168, !16, i64 192, !16, i64 200, !16, i64 208, !26, i64 216, !26, i64 217, !26, i64 218, !26, i64 219, !26, i64 220, !26, i64 221, !12, i64 224, !12, i64 228, !12, i64 232, !12, i64 236, !12, i64 240, !12, i64 244, !12, i64 248, !12, i64 252, !12, i64 256, !12, i64 260, !12, i64 264, !12, i64 268, !12, i64 272, !12, i64 276, !12, i64 280, !12, i64 284, !12, i64 288, !12, i64 292, !12, i64 296, !12, i64 300, !12, i64 304, !12, i64 308, !12, i64 312, !12, i64 316, !12, i64 320, !12, i64 324, !12, i64 328, !12, i64 332, !12, i64 336, !16, i64 344, !27, i64 352, !18, i64 376, !16, i64 400, !12, i64 408, !32, i64 416}
!10 = !{!"_ZTS16MemoryController", !11, i64 0}
!11 = !{!"_ZTS4Unit", !12, i64 8, !14, i64 16}
!12 = !{!"int", !13, i64 0}
!13 = !{!"omnipotent char", !7, i64 0}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !17, i64 8, !13, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !16, i64 0}
!16 = !{!"any pointer", !13, i64 0}
!17 = !{!"long", !13, i64 0}
!18 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!22 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!26 = !{!"bool", !13, i64 0}
!27 = !{!"_ZTSNSt7__cxx114listIP11DataPackageSaIS2_EEE", !28, i64 0}
!28 = !{!"_ZTSNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EEE", !29, i64 0}
!29 = !{!"_ZTSNSt7__cxx1110_List_baseIP11DataPackageSaIS2_EE10_List_implE", !30, i64 0}
!30 = !{!"_ZTSNSt8__detail17_List_node_headerE", !31, i64 0, !17, i64 16}
!31 = !{!"_ZTSNSt8__detail15_List_node_baseE", !16, i64 0, !16, i64 8}
!32 = !{!"_ZTS13SDMemoryStats", !33, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !34, i64 48, !35, i64 56, !35, i64 80, !35, i64 104, !35, i64 128}
!33 = !{!"_ZTS5Stats"}
!34 = !{!"_ZTS8Dataflow", !13, i64 0}
!35 = !{!"_ZTSSt6vectorIjSaIjEE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!39 = !{!9, !26, i64 220}
!40 = !{i8 0, i8 2}
!41 = !{}
!42 = !{!9, !16, i64 56}
!43 = !{!9, !16, i64 400}
!44 = !{!16, !16, i64 0}
!45 = distinct !{!45, !46}
!46 = !{!"llvm.loop.mustprogress"}
!47 = !{!9, !12, i64 116}
!48 = distinct !{!48, !46}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass