; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QSPI_HandleTypeDef = type { ptr, %struct.QSPI_InitTypeDef, ptr, i32, i32, ptr, i32, i32, ptr, i32, i32, i32, i32 }
%struct.QSPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.QUADSPI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__MDMA_HandleTypeDef = type { ptr, %struct.MDMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32 }
%struct.MDMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.MDMA_Channel_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_QSPI_Transmit_DMA(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %9, i32 0, i32 9
  %11 = load volatile i32, ptr %10, align 8, !tbaa !11
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %14

13:                                               ; preds = %8
  store i32 2, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %231

14:                                               ; preds = %8
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %15, i32 0, i32 9
  store volatile i32 1, ptr %16, align 8, !tbaa !11
  br label %17

17:                                               ; preds = %14
  br label %18

18:                                               ; preds = %17
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %20, i32 0, i32 10
  %22 = load volatile i32, ptr %21, align 4, !tbaa !14
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %223

24:                                               ; preds = %19
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %25, i32 0, i32 11
  store volatile i32 0, ptr %26, align 8, !tbaa !15
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = icmp ne ptr %27, null
  br i1 %28, label %29, label %212

29:                                               ; preds = %24
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %30, i32 0, i32 10
  store volatile i32 18, ptr %31, align 4, !tbaa !14
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !16
  %35 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %34, i32 0, i32 3
  store volatile i32 3, ptr %35, align 4, !tbaa !17
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %36, i32 0, i32 0
  %38 = load ptr, ptr %37, align 8, !tbaa !16
  %39 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %38, i32 0, i32 4
  %40 = load volatile i32, ptr %39, align 4, !tbaa !19
  %41 = add i32 %40, 1
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %42, i32 0, i32 4
  store volatile i32 %41, ptr %43, align 4, !tbaa !20
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %44, i32 0, i32 0
  %46 = load ptr, ptr %45, align 8, !tbaa !16
  %47 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %46, i32 0, i32 4
  %48 = load volatile i32, ptr %47, align 4, !tbaa !19
  %49 = add i32 %48, 1
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %50, i32 0, i32 3
  store volatile i32 %49, ptr %51, align 8, !tbaa !21
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %53, i32 0, i32 2
  store ptr %52, ptr %54, align 8, !tbaa !22
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !16
  %58 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %57, i32 0, i32 5
  %59 = load volatile i32, ptr %58, align 4, !tbaa !23
  %60 = zext i32 %59 to i64
  %61 = and i64 %60, -201326593
  %62 = or i64 %61, 0
  %63 = trunc i64 %62 to i32
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !16
  %67 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %66, i32 0, i32 5
  store volatile i32 %63, ptr %67, align 4, !tbaa !23
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %68, i32 0, i32 8
  %70 = load ptr, ptr %69, align 8, !tbaa !24
  %71 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %70, i32 0, i32 5
  store ptr @QSPI_DMATxCplt, ptr %71, align 8, !tbaa !25
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %72, i32 0, i32 8
  %74 = load ptr, ptr %73, align 8, !tbaa !24
  %75 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %74, i32 0, i32 9
  store ptr @QSPI_DMAError, ptr %75, align 8, !tbaa !28
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %76, i32 0, i32 8
  %78 = load ptr, ptr %77, align 8, !tbaa !24
  %79 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %78, i32 0, i32 10
  store ptr null, ptr %79, align 8, !tbaa !29
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %80, i32 0, i32 8
  %82 = load ptr, ptr %81, align 8, !tbaa !24
  %83 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %82, i32 0, i32 0
  %84 = load ptr, ptr %83, align 8, !tbaa !30
  %85 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %84, i32 0, i32 4
  %86 = load volatile i32, ptr %85, align 4, !tbaa !31
  %87 = zext i32 %86 to i64
  %88 = and i64 %87, -3085
  %89 = or i64 %88, 0
  %90 = trunc i64 %89 to i32
  %91 = load ptr, ptr %4, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %91, i32 0, i32 8
  %93 = load ptr, ptr %92, align 8, !tbaa !24
  %94 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %93, i32 0, i32 0
  %95 = load ptr, ptr %94, align 8, !tbaa !30
  %96 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %95, i32 0, i32 4
  store volatile i32 %90, ptr %96, align 4, !tbaa !31
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %97, i32 0, i32 8
  %99 = load ptr, ptr %98, align 8, !tbaa !24
  %100 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %99, i32 0, i32 1
  %101 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %100, i32 0, i32 6
  %102 = load i32, ptr %101, align 8, !tbaa !32
  %103 = icmp eq i32 %102, 0
  br i1 %103, label %104, label %122

104:                                              ; preds = %29
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %105, i32 0, i32 8
  %107 = load ptr, ptr %106, align 8, !tbaa !24
  %108 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %107, i32 0, i32 0
  %109 = load ptr, ptr %108, align 8, !tbaa !30
  %110 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %109, i32 0, i32 4
  %111 = load volatile i32, ptr %110, align 4, !tbaa !31
  %112 = zext i32 %111 to i64
  %113 = and i64 %112, -772
  %114 = or i64 %113, 2
  %115 = trunc i64 %114 to i32
  %116 = load ptr, ptr %4, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %116, i32 0, i32 8
  %118 = load ptr, ptr %117, align 8, !tbaa !24
  %119 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !30
  %121 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %120, i32 0, i32 4
  store volatile i32 %115, ptr %121, align 4, !tbaa !31
  br label %181

122:                                              ; preds = %29
  %123 = load ptr, ptr %4, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %123, i32 0, i32 8
  %125 = load ptr, ptr %124, align 8, !tbaa !24
  %126 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %125, i32 0, i32 1
  %127 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %126, i32 0, i32 6
  %128 = load i32, ptr %127, align 8, !tbaa !32
  %129 = icmp eq i32 %128, 16
  br i1 %129, label %130, label %148

130:                                              ; preds = %122
  %131 = load ptr, ptr %4, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %131, i32 0, i32 8
  %133 = load ptr, ptr %132, align 8, !tbaa !24
  %134 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %133, i32 0, i32 0
  %135 = load ptr, ptr %134, align 8, !tbaa !30
  %136 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %135, i32 0, i32 4
  %137 = load volatile i32, ptr %136, align 4, !tbaa !31
  %138 = zext i32 %137 to i64
  %139 = and i64 %138, -772
  %140 = or i64 %139, 258
  %141 = trunc i64 %140 to i32
  %142 = load ptr, ptr %4, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %142, i32 0, i32 8
  %144 = load ptr, ptr %143, align 8, !tbaa !24
  %145 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %144, i32 0, i32 0
  %146 = load ptr, ptr %145, align 8, !tbaa !30
  %147 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %146, i32 0, i32 4
  store volatile i32 %141, ptr %147, align 4, !tbaa !31
  br label %180

148:                                              ; preds = %122
  %149 = load ptr, ptr %4, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %149, i32 0, i32 8
  %151 = load ptr, ptr %150, align 8, !tbaa !24
  %152 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %151, i32 0, i32 1
  %153 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %152, i32 0, i32 6
  %154 = load i32, ptr %153, align 8, !tbaa !32
  %155 = icmp eq i32 %154, 32
  br i1 %155, label %156, label %174

156:                                              ; preds = %148
  %157 = load ptr, ptr %4, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %157, i32 0, i32 8
  %159 = load ptr, ptr %158, align 8, !tbaa !24
  %160 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %159, i32 0, i32 0
  %161 = load ptr, ptr %160, align 8, !tbaa !30
  %162 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %161, i32 0, i32 4
  %163 = load volatile i32, ptr %162, align 4, !tbaa !31
  %164 = zext i32 %163 to i64
  %165 = and i64 %164, -772
  %166 = or i64 %165, 514
  %167 = trunc i64 %166 to i32
  %168 = load ptr, ptr %4, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %168, i32 0, i32 8
  %170 = load ptr, ptr %169, align 8, !tbaa !24
  %171 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %170, i32 0, i32 0
  %172 = load ptr, ptr %171, align 8, !tbaa !30
  %173 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %172, i32 0, i32 4
  store volatile i32 %167, ptr %173, align 4, !tbaa !31
  br label %179

174:                                              ; preds = %148
  %175 = load ptr, ptr %4, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %175, i32 0, i32 11
  %177 = load volatile i32, ptr %176, align 8, !tbaa !15
  %178 = or i32 %177, 4
  store volatile i32 %178, ptr %176, align 8, !tbaa !15
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %179

179:                                              ; preds = %174, %156
  br label %180

180:                                              ; preds = %179, %130
  br label %181

181:                                              ; preds = %180, %104
  %182 = load ptr, ptr %4, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %182, i32 0, i32 0
  %184 = load ptr, ptr %183, align 8, !tbaa !16
  %185 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %184, i32 0, i32 0
  %186 = load volatile i32, ptr %185, align 4, !tbaa !33
  %187 = zext i32 %186 to i64
  %188 = or i64 %187, 196608
  %189 = trunc i64 %188 to i32
  store volatile i32 %189, ptr %185, align 4, !tbaa !33
  %190 = load ptr, ptr %4, align 8, !tbaa !5
  %191 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %190, i32 0, i32 8
  %192 = load ptr, ptr %191, align 8, !tbaa !24
  %193 = load ptr, ptr %5, align 8, !tbaa !5
  %194 = ptrtoint ptr %193 to i32
  %195 = load ptr, ptr %4, align 8, !tbaa !5
  %196 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %195, i32 0, i32 0
  %197 = load ptr, ptr %196, align 8, !tbaa !16
  %198 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %197, i32 0, i32 8
  %199 = ptrtoint ptr %198 to i32
  %200 = load ptr, ptr %4, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %200, i32 0, i32 3
  %202 = load volatile i32, ptr %201, align 8, !tbaa !21
  %203 = call i32 @HAL_MDMA_Start_IT(ptr noundef %192, i32 noundef %194, i32 noundef %199, i32 noundef %202, i32 noundef 1)
  %204 = icmp eq i32 %203, 0
  br i1 %204, label %205, label %211

205:                                              ; preds = %181
  br label %206

206:                                              ; preds = %205
  %207 = load ptr, ptr %4, align 8, !tbaa !5
  %208 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %207, i32 0, i32 9
  store volatile i32 0, ptr %208, align 8, !tbaa !11
  br label %209

209:                                              ; preds = %206
  br label %210

210:                                              ; preds = %209
  br label %211

211:                                              ; preds = %210, %181
  br label %222

212:                                              ; preds = %24
  %213 = load ptr, ptr %4, align 8, !tbaa !5
  %214 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %213, i32 0, i32 11
  %215 = load volatile i32, ptr %214, align 8, !tbaa !15
  %216 = or i32 %215, 8
  store volatile i32 %216, ptr %214, align 8, !tbaa !15
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %217

217:                                              ; preds = %212
  %218 = load ptr, ptr %4, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %218, i32 0, i32 9
  store volatile i32 0, ptr %219, align 8, !tbaa !11
  br label %220

220:                                              ; preds = %217
  br label %221

221:                                              ; preds = %220
  br label %222

222:                                              ; preds = %221, %211
  br label %229

223:                                              ; preds = %19
  store i32 2, ptr %6, align 4, !tbaa !9
  br label %224

224:                                              ; preds = %223
  %225 = load ptr, ptr %4, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %225, i32 0, i32 9
  store volatile i32 0, ptr %226, align 8, !tbaa !11
  br label %227

227:                                              ; preds = %224
  br label %228

228:                                              ; preds = %227
  br label %229

229:                                              ; preds = %228, %222
  %230 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %230, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %231

231:                                              ; preds = %229, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %232 = load i32, ptr %3, align 4
  ret i32 %232
}

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMATxCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMAError(ptr noundef) #1

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 80}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 40, !10, i64 48, !10, i64 52, !6, i64 56, !10, i64 64, !10, i64 68, !6, i64 72, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!12, !10, i64 84}
!15 = !{!12, !10, i64 88}
!16 = !{!12, !6, i64 0}
!17 = !{!18, !10, i64 12}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48}
!19 = !{!18, !10, i64 16}
!20 = !{!12, !10, i64 52}
!21 = !{!12, !10, i64 48}
!22 = !{!12, !6, i64 40}
!23 = !{!18, !10, i64 20}
!24 = !{!12, !6, i64 72}
!25 = !{!26, !6, i64 80}
!26 = !{!"__MDMA_HandleTypeDef", !6, i64 0, !27, i64 8, !10, i64 64, !10, i64 68, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !10, i64 144, !10, i64 148}
!27 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52}
!28 = !{!26, !6, i64 112}
!29 = !{!26, !6, i64 120}
!30 = !{!26, !6, i64 0}
!31 = !{!27, !10, i64 16}
!32 = !{!26, !10, i64 32}
!33 = !{!18, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_QSPI_Transmit_DMA(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 80
  %4 = load volatile i32, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %66, label %6

6:                                                ; preds = %2
  store volatile i32 1, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 84
  %8 = load volatile i32, ptr %7, align 4, !tbaa !12
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %10, label %.sink.split

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 0, ptr %11, align 8, !tbaa !13
  %.not = icmp eq ptr %1, null
  br i1 %.not, label %63, label %12

12:                                               ; preds = %10
  store volatile i32 18, ptr %7, align 4, !tbaa !12
  %13 = load ptr, ptr %0, align 8, !tbaa !14
  %14 = getelementptr inbounds i8, ptr %13, i64 12
  store volatile i32 3, ptr %14, align 4, !tbaa !15
  %15 = getelementptr inbounds i8, ptr %13, i64 16
  %16 = load volatile i32, ptr %15, align 4, !tbaa !17
  %17 = add i32 %16, 1
  %18 = getelementptr inbounds i8, ptr %0, i64 52
  store volatile i32 %17, ptr %18, align 4, !tbaa !18
  %19 = load volatile i32, ptr %15, align 4, !tbaa !17
  %20 = add i32 %19, 1
  %21 = getelementptr inbounds i8, ptr %0, i64 48
  store volatile i32 %20, ptr %21, align 8, !tbaa !19
  %22 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr %1, ptr %22, align 8, !tbaa !20
  %23 = getelementptr inbounds i8, ptr %13, i64 20
  %24 = load volatile i32, ptr %23, align 4, !tbaa !21
  %25 = and i32 %24, -201326593
  store volatile i32 %25, ptr %23, align 4, !tbaa !21
  %26 = getelementptr inbounds i8, ptr %0, i64 72
  %27 = load ptr, ptr %26, align 8, !tbaa !22
  %28 = getelementptr inbounds i8, ptr %27, i64 80
  store ptr @QSPI_DMATxCplt, ptr %28, align 8, !tbaa !23
  %29 = getelementptr inbounds i8, ptr %27, i64 112
  store ptr @QSPI_DMAError, ptr %29, align 8, !tbaa !26
  %30 = getelementptr inbounds i8, ptr %27, i64 120
  store ptr null, ptr %30, align 8, !tbaa !27
  %31 = load ptr, ptr %27, align 8, !tbaa !28
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  %33 = load volatile i32, ptr %32, align 4, !tbaa !29
  %34 = and i32 %33, -3085
  store volatile i32 %34, ptr %32, align 4, !tbaa !29
  %35 = getelementptr inbounds i8, ptr %27, i64 32
  %36 = load i32, ptr %35, align 8, !tbaa !30
  switch i32 %36, label %49 [
    i32 0, label %37
    i32 16, label %41
    i32 32, label %45
  ]

37:                                               ; preds = %12
  %38 = load volatile i32, ptr %32, align 4, !tbaa !29
  %39 = and i32 %38, -772
  %40 = or disjoint i32 %39, 2
  store volatile i32 %40, ptr %32, align 4, !tbaa !29
  br label %52

41:                                               ; preds = %12
  %42 = load volatile i32, ptr %32, align 4, !tbaa !29
  %43 = and i32 %42, -772
  %44 = or disjoint i32 %43, 258
  store volatile i32 %44, ptr %32, align 4, !tbaa !29
  br label %52

45:                                               ; preds = %12
  %46 = load volatile i32, ptr %32, align 4, !tbaa !29
  %47 = and i32 %46, -772
  %48 = or disjoint i32 %47, 514
  store volatile i32 %48, ptr %32, align 4, !tbaa !29
  br label %52

49:                                               ; preds = %12
  %50 = load volatile i32, ptr %11, align 8, !tbaa !13
  %51 = or i32 %50, 4
  store volatile i32 %51, ptr %11, align 8, !tbaa !13
  br label %52

52:                                               ; preds = %41, %49, %45, %37
  %.0 = phi i32 [ 0, %37 ], [ 0, %41 ], [ 0, %45 ], [ 1, %49 ]
  %53 = load volatile i32, ptr %13, align 4, !tbaa !31
  %54 = or i32 %53, 196608
  store volatile i32 %54, ptr %13, align 4, !tbaa !31
  %55 = ptrtoint ptr %1 to i64
  %56 = trunc i64 %55 to i32
  %57 = getelementptr inbounds i8, ptr %13, i64 32
  %58 = ptrtoint ptr %57 to i64
  %59 = trunc i64 %58 to i32
  %60 = load volatile i32, ptr %21, align 8, !tbaa !19
  %61 = tail call i32 @HAL_MDMA_Start_IT(ptr noundef nonnull %27, i32 noundef %56, i32 noundef %59, i32 noundef %60, i32 noundef 1) #2
  %62 = icmp eq i32 %61, 0
  br i1 %62, label %.sink.split, label %66

63:                                               ; preds = %10
  %64 = load volatile i32, ptr %11, align 8, !tbaa !13
  %65 = or i32 %64, 8
  store volatile i32 %65, ptr %11, align 8, !tbaa !13
  br label %.sink.split

.sink.split:                                      ; preds = %6, %52, %63
  %.040.ph = phi i32 [ 1, %63 ], [ %.0, %52 ], [ 2, %6 ]
  store volatile i32 0, ptr %3, align 8, !tbaa !5
  br label %66

66:                                               ; preds = %.sink.split, %52, %2
  %.040 = phi i32 [ 2, %2 ], [ %.0, %52 ], [ %.040.ph, %.sink.split ]
  ret i32 %.040
}

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMATxCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @QSPI_DMAError(ptr noundef) #0

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 80}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 40, !11, i64 48, !11, i64 52, !7, i64 56, !11, i64 64, !11, i64 68, !7, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 84}
!13 = !{!6, !11, i64 88}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 12}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48}
!17 = !{!16, !11, i64 16}
!18 = !{!6, !11, i64 52}
!19 = !{!6, !11, i64 48}
!20 = !{!6, !7, i64 40}
!21 = !{!16, !11, i64 20}
!22 = !{!6, !7, i64 72}
!23 = !{!24, !7, i64 80}
!24 = !{!"__MDMA_HandleTypeDef", !7, i64 0, !25, i64 8, !11, i64 64, !11, i64 68, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !11, i64 144, !11, i64 148}
!25 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52}
!26 = !{!24, !7, i64 112}
!27 = !{!24, !7, i64 120}
!28 = !{!24, !7, i64 0}
!29 = !{!25, !11, i64 16}
!30 = !{!24, !11, i64 32}
!31 = !{!16, !11, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass