; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/1254.ll (Z9judge_bfsiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32 }
%"class.std::queue" = type { %"class.std::deque" }
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl" }
%"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl" = type { %"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl_data" }
%"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl_data" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }

@p = external dso_local global %struct.Node, align 4
@q = external dso_local global %struct.Node, align 4
@dir = external dso_local global [4 x [2 x i32]], align 16
@map = external dso_local global [10 x [10 x i32]], align 16
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9judge_bfsiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 personality ptr @__gxx_personality_v0 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca [10 x [10 x i32]], align 16
  %15 = alloca %"class.std::queue", align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %20, ptr @p, align 4, !tbaa !9
  %21 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %21, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 400, ptr %14) #6
  %22 = getelementptr inbounds [10 x [10 x i32]], ptr %14, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 16 %22, i8 0, i64 400, i1 false)
  %23 = load i32, ptr @p, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [10 x [10 x i32]], ptr %14, i64 0, i64 %24
  %26 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [10 x i32], ptr %25, i64 0, i64 %27
  store i32 1, ptr %28, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 80, ptr %15) #6
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEEC2IS3_vEEv(ptr noundef nonnull align 8 dereferenceable(80) %15)
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %15, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %29 unwind label %46

29:                                               ; preds = %6
  br label %30

30:                                               ; preds = %127, %29
  %31 = invoke noundef zeroext i1 @_ZNKSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80) %15)
          to label %32 unwind label %46

32:                                               ; preds = %30
  %33 = xor i1 %31, true
  br i1 %33, label %34, label %128

34:                                               ; preds = %32
  %35 = invoke noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5frontEv(ptr noundef nonnull align 8 dereferenceable(80) %15)
          to label %36 unwind label %46

36:                                               ; preds = %34
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 @q, ptr align 4 %35, i64 8, i1 false), !tbaa.struct !12
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE3popEv(ptr noundef nonnull align 8 dereferenceable(80) %15)
          to label %37 unwind label %46

37:                                               ; preds = %36
  %38 = load i32, ptr @q, align 4, !tbaa !9
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = icmp eq i32 %38, %39
  br i1 %40, label %41, label %50

41:                                               ; preds = %37
  %42 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @q, i32 0, i32 1), align 4, !tbaa !11
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = icmp eq i32 %42, %43
  br i1 %44, label %45, label %50

45:                                               ; preds = %41
  store i32 1, ptr %7, align 4
  store i32 1, ptr %18, align 4
  br label %129

46:                                               ; preds = %36, %34, %30, %6
  %47 = landingpad { ptr, i32 }
          cleanup
  %48 = extractvalue { ptr, i32 } %47, 0
  store ptr %48, ptr %16, align 8
  %49 = extractvalue { ptr, i32 } %47, 1
  store i32 %49, ptr %17, align 4
  br label %131

50:                                               ; preds = %41, %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  store i32 0, ptr %19, align 4, !tbaa !5
  br label %51

51:                                               ; preds = %124, %50
  %52 = load i32, ptr %19, align 4, !tbaa !5
  %53 = icmp slt i32 %52, 4
  br i1 %53, label %55, label %54

54:                                               ; preds = %51
  store i32 4, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  br label %127

55:                                               ; preds = %51
  %56 = load i32, ptr @q, align 4, !tbaa !9
  %57 = load i32, ptr %19, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [4 x [2 x i32]], ptr @dir, i64 0, i64 %58
  %60 = getelementptr inbounds [2 x i32], ptr %59, i64 0, i64 0
  %61 = load i32, ptr %60, align 8, !tbaa !5
  %62 = add nsw i32 %56, %61
  store i32 %62, ptr @p, align 4, !tbaa !9
  %63 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @q, i32 0, i32 1), align 4, !tbaa !11
  %64 = load i32, ptr %19, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [4 x [2 x i32]], ptr @dir, i64 0, i64 %65
  %67 = getelementptr inbounds [2 x i32], ptr %66, i64 0, i64 1
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = add nsw i32 %63, %68
  store i32 %69, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %70 = load i32, ptr @p, align 4, !tbaa !9
  %71 = icmp slt i32 %70, 1
  br i1 %71, label %83, label %72

72:                                               ; preds = %55
  %73 = load i32, ptr @p, align 4, !tbaa !9
  %74 = load i32, ptr @n, align 4, !tbaa !5
  %75 = icmp sgt i32 %73, %74
  br i1 %75, label %83, label %76

76:                                               ; preds = %72
  %77 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %78 = icmp slt i32 %77, 1
  br i1 %78, label %83, label %79

79:                                               ; preds = %76
  %80 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %81 = load i32, ptr @m, align 4, !tbaa !5
  %82 = icmp sgt i32 %80, %81
  br i1 %82, label %83, label %84

83:                                               ; preds = %79, %76, %72, %55
  br label %124

84:                                               ; preds = %79
  %85 = load i32, ptr @p, align 4, !tbaa !9
  %86 = load i32, ptr %12, align 4, !tbaa !5
  %87 = icmp eq i32 %85, %86
  br i1 %87, label %88, label %93

88:                                               ; preds = %84
  %89 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %90 = load i32, ptr %13, align 4, !tbaa !5
  %91 = icmp eq i32 %89, %90
  br i1 %91, label %92, label %93

92:                                               ; preds = %88
  br label %124

93:                                               ; preds = %88, %84
  %94 = load i32, ptr @p, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = getelementptr inbounds [10 x [10 x i32]], ptr %14, i64 0, i64 %95
  %97 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %98 = sext i32 %97 to i64
  %99 = getelementptr inbounds [10 x i32], ptr %96, i64 0, i64 %98
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = icmp eq i32 %100, 0
  br i1 %101, label %102, label %123

102:                                              ; preds = %93
  %103 = load i32, ptr @p, align 4, !tbaa !9
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds [10 x [10 x i32]], ptr @map, i64 0, i64 %104
  %106 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [10 x i32], ptr %105, i64 0, i64 %107
  %109 = load i32, ptr %108, align 4, !tbaa !5
  %110 = icmp ne i32 %109, 1
  br i1 %110, label %111, label %123

111:                                              ; preds = %102
  %112 = load i32, ptr @p, align 4, !tbaa !9
  %113 = sext i32 %112 to i64
  %114 = getelementptr inbounds [10 x [10 x i32]], ptr %14, i64 0, i64 %113
  %115 = load i32, ptr getelementptr inbounds (%struct.Node, ptr @p, i32 0, i32 1), align 4, !tbaa !11
  %116 = sext i32 %115 to i64
  %117 = getelementptr inbounds [10 x i32], ptr %114, i64 0, i64 %116
  store i32 1, ptr %117, align 4, !tbaa !5
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %15, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %118 unwind label %119

118:                                              ; preds = %111
  br label %123

119:                                              ; preds = %111
  %120 = landingpad { ptr, i32 }
          cleanup
  %121 = extractvalue { ptr, i32 } %120, 0
  store ptr %121, ptr %16, align 8
  %122 = extractvalue { ptr, i32 } %120, 1
  store i32 %122, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  br label %131

123:                                              ; preds = %118, %102, %93
  br label %124

124:                                              ; preds = %123, %92, %83
  %125 = load i32, ptr %19, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %19, align 4, !tbaa !5
  br label %51, !llvm.loop !13

127:                                              ; preds = %54
  br label %30, !llvm.loop !15

128:                                              ; preds = %32
  store i32 0, ptr %7, align 4
  store i32 1, ptr %18, align 4
  br label %129

129:                                              ; preds = %128, %45
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %15) #6
  call void @llvm.lifetime.end.p0(i64 80, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 400, ptr %14) #6
  %130 = load i32, ptr %7, align 4
  ret i32 %130

131:                                              ; preds = %119, %46
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %15) #6
  call void @llvm.lifetime.end.p0(i64 80, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 400, ptr %14) #6
  br label %132

132:                                              ; preds = %131
  %133 = load ptr, ptr %16, align 8
  %134 = load i32, ptr %17, align 4
  %135 = insertvalue { ptr, i32 } poison, ptr %133, 0
  %136 = insertvalue { ptr, i32 } %135, i32 %134, 1
  resume { ptr, i32 } %136
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEEC2IS3_vEEv(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(8)) #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5frontEv(ptr noundef nonnull align 8 dereferenceable(80)) #3 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE3popEv(ptr noundef nonnull align 8 dereferenceable(80)) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #5 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = !{i64 0, i64 4, !5, i64 4, i64 4, !5}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32 }
%"class.std::queue" = type { %"class.std::deque" }
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl" }
%"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl" = type { %"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl_data" }
%"struct.std::_Deque_base<Node, std::allocator<Node>>::_Deque_impl_data" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }

@p = external dso_local global %struct.Node, align 4
@q = external dso_local local_unnamed_addr global %struct.Node, align 4
@dir = external dso_local local_unnamed_addr global [4 x [2 x i32]], align 16
@map = external dso_local local_unnamed_addr global [10 x [10 x i32]], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 2) i32 @_Z9judge_bfsiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %7 = alloca [10 x [10 x i32]], align 16
  %8 = alloca %"class.std::queue", align 8
  store i32 %0, ptr @p, align 4, !tbaa !5
  store i32 %1, ptr getelementptr inbounds (i8, ptr @p, i64 4), align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 400, ptr nonnull %7) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(400) %7, i8 0, i64 400, i1 false)
  %9 = sext i32 %0 to i64
  %10 = sext i32 %1 to i64
  %11 = getelementptr inbounds [10 x [10 x i32]], ptr %7, i64 0, i64 %9, i64 %10
  store i32 1, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 80, ptr nonnull %8) #5
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEEC2IS3_vEEv(ptr noundef nonnull align 8 dereferenceable(80) %8)
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %8, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %.preheader24 unwind label %24

.preheader24:                                     ; preds = %6
  %12 = call noundef zeroext i1 @_ZNKSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80) %8)
  br i1 %12, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader24, %.loopexit
  %13 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5frontEv(ptr noundef nonnull align 8 dereferenceable(80) %8)
  %14 = load i64, ptr %13, align 4
  store i64 %14, ptr @q, align 4
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE3popEv(ptr noundef nonnull align 8 dereferenceable(80) %8)
  %15 = load i32, ptr @q, align 4, !tbaa !5
  %16 = icmp eq i32 %15, %2
  %17 = load i32, ptr getelementptr inbounds (i8, ptr @q, i64 4), align 4
  %18 = icmp eq i32 %17, %3
  %or.cond20 = select i1 %16, i1 %18, i1 false
  br i1 %or.cond20, label %._crit_edge, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.lr.ph
  %19 = load i32, ptr @dir, align 16, !tbaa !11
  %20 = add nsw i32 %19, %15
  store i32 %20, ptr @p, align 4, !tbaa !5
  %21 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 4), align 4, !tbaa !11
  %22 = add nsw i32 %21, %17
  store i32 %22, ptr getelementptr inbounds (i8, ptr @p, i64 4), align 4, !tbaa !10
  %23 = icmp slt i32 %20, 1
  br i1 %23, label %.preheader.1, label %26

24:                                               ; preds = %6
  %25 = landingpad { ptr, i32 }
          cleanup
  br label %126

26:                                               ; preds = %.preheader.preheader
  %27 = load i32, ptr @n, align 4, !tbaa !11
  %28 = icmp sgt i32 %20, %27
  %29 = icmp slt i32 %22, 1
  %or.cond = select i1 %28, i1 true, i1 %29
  %30 = load i32, ptr @m, align 4
  %31 = icmp sgt i32 %22, %30
  %or.cond22 = select i1 %or.cond, i1 true, i1 %31
  br i1 %or.cond22, label %.preheader.1, label %32

32:                                               ; preds = %26
  %33 = icmp eq i32 %20, %4
  %34 = icmp eq i32 %22, %5
  %or.cond23 = select i1 %33, i1 %34, i1 false
  br i1 %or.cond23, label %.preheader.1, label %35

35:                                               ; preds = %32
  %36 = zext nneg i32 %20 to i64
  %37 = zext nneg i32 %22 to i64
  %38 = getelementptr inbounds [10 x [10 x i32]], ptr %7, i64 0, i64 %36, i64 %37
  %39 = load i32, ptr %38, align 4, !tbaa !11
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %.preheader.1

41:                                               ; preds = %35
  %42 = getelementptr inbounds [10 x [10 x i32]], ptr @map, i64 0, i64 %36, i64 %37
  %43 = load i32, ptr %42, align 4, !tbaa !11
  %.not = icmp eq i32 %43, 1
  br i1 %.not, label %.preheader.1, label %44

44:                                               ; preds = %41
  store i32 1, ptr %38, align 4, !tbaa !11
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %8, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %..preheader.1_crit_edge unwind label %45

..preheader.1_crit_edge:                          ; preds = %44
  %.pre = load i32, ptr @q, align 4, !tbaa !5
  %.pre29 = load i32, ptr getelementptr inbounds (i8, ptr @q, i64 4), align 4, !tbaa !10
  br label %.preheader.1

45:                                               ; preds = %124, %98, %72, %44
  %46 = landingpad { ptr, i32 }
          cleanup
  br label %126

.preheader.1:                                     ; preds = %..preheader.1_crit_edge, %32, %35, %41, %.preheader.preheader, %26
  %47 = phi i32 [ %.pre29, %..preheader.1_crit_edge ], [ %17, %32 ], [ %17, %35 ], [ %17, %41 ], [ %17, %.preheader.preheader ], [ %17, %26 ]
  %48 = phi i32 [ %.pre, %..preheader.1_crit_edge ], [ %15, %32 ], [ %15, %35 ], [ %15, %41 ], [ %15, %.preheader.preheader ], [ %15, %26 ]
  %49 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 8), align 8, !tbaa !11
  %50 = add nsw i32 %49, %48
  store i32 %50, ptr @p, align 4, !tbaa !5
  %51 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 12), align 4, !tbaa !11
  %52 = add nsw i32 %51, %47
  store i32 %52, ptr getelementptr inbounds (i8, ptr @p, i64 4), align 4, !tbaa !10
  %53 = icmp slt i32 %50, 1
  br i1 %53, label %.preheader.2, label %54

54:                                               ; preds = %.preheader.1
  %55 = load i32, ptr @n, align 4, !tbaa !11
  %56 = icmp sgt i32 %50, %55
  %57 = icmp slt i32 %52, 1
  %or.cond.1 = select i1 %56, i1 true, i1 %57
  %58 = load i32, ptr @m, align 4
  %59 = icmp sgt i32 %52, %58
  %or.cond22.1 = select i1 %or.cond.1, i1 true, i1 %59
  br i1 %or.cond22.1, label %.preheader.2, label %60

60:                                               ; preds = %54
  %61 = icmp eq i32 %50, %4
  %62 = icmp eq i32 %52, %5
  %or.cond23.1 = select i1 %61, i1 %62, i1 false
  br i1 %or.cond23.1, label %.preheader.2, label %63

63:                                               ; preds = %60
  %64 = zext nneg i32 %50 to i64
  %65 = zext nneg i32 %52 to i64
  %66 = getelementptr inbounds [10 x [10 x i32]], ptr %7, i64 0, i64 %64, i64 %65
  %67 = load i32, ptr %66, align 4, !tbaa !11
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %.preheader.2

69:                                               ; preds = %63
  %70 = getelementptr inbounds [10 x [10 x i32]], ptr @map, i64 0, i64 %64, i64 %65
  %71 = load i32, ptr %70, align 4, !tbaa !11
  %.not.1 = icmp eq i32 %71, 1
  br i1 %.not.1, label %.preheader.2, label %72

72:                                               ; preds = %69
  store i32 1, ptr %66, align 4, !tbaa !11
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %8, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %..preheader.2_crit_edge unwind label %45

..preheader.2_crit_edge:                          ; preds = %72
  %.pre30 = load i32, ptr @q, align 4, !tbaa !5
  %.pre31 = load i32, ptr getelementptr inbounds (i8, ptr @q, i64 4), align 4, !tbaa !10
  br label %.preheader.2

.preheader.2:                                     ; preds = %..preheader.2_crit_edge, %69, %63, %60, %54, %.preheader.1
  %73 = phi i32 [ %.pre31, %..preheader.2_crit_edge ], [ %47, %69 ], [ %47, %63 ], [ %47, %60 ], [ %47, %54 ], [ %47, %.preheader.1 ]
  %74 = phi i32 [ %.pre30, %..preheader.2_crit_edge ], [ %48, %69 ], [ %48, %63 ], [ %48, %60 ], [ %48, %54 ], [ %48, %.preheader.1 ]
  %75 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 16), align 16, !tbaa !11
  %76 = add nsw i32 %75, %74
  store i32 %76, ptr @p, align 4, !tbaa !5
  %77 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 20), align 4, !tbaa !11
  %78 = add nsw i32 %77, %73
  store i32 %78, ptr getelementptr inbounds (i8, ptr @p, i64 4), align 4, !tbaa !10
  %79 = icmp slt i32 %76, 1
  br i1 %79, label %.preheader.3, label %80

80:                                               ; preds = %.preheader.2
  %81 = load i32, ptr @n, align 4, !tbaa !11
  %82 = icmp sgt i32 %76, %81
  %83 = icmp slt i32 %78, 1
  %or.cond.2 = select i1 %82, i1 true, i1 %83
  %84 = load i32, ptr @m, align 4
  %85 = icmp sgt i32 %78, %84
  %or.cond22.2 = select i1 %or.cond.2, i1 true, i1 %85
  br i1 %or.cond22.2, label %.preheader.3, label %86

86:                                               ; preds = %80
  %87 = icmp eq i32 %76, %4
  %88 = icmp eq i32 %78, %5
  %or.cond23.2 = select i1 %87, i1 %88, i1 false
  br i1 %or.cond23.2, label %.preheader.3, label %89

89:                                               ; preds = %86
  %90 = zext nneg i32 %76 to i64
  %91 = zext nneg i32 %78 to i64
  %92 = getelementptr inbounds [10 x [10 x i32]], ptr %7, i64 0, i64 %90, i64 %91
  %93 = load i32, ptr %92, align 4, !tbaa !11
  %94 = icmp eq i32 %93, 0
  br i1 %94, label %95, label %.preheader.3

95:                                               ; preds = %89
  %96 = getelementptr inbounds [10 x [10 x i32]], ptr @map, i64 0, i64 %90, i64 %91
  %97 = load i32, ptr %96, align 4, !tbaa !11
  %.not.2 = icmp eq i32 %97, 1
  br i1 %.not.2, label %.preheader.3, label %98

98:                                               ; preds = %95
  store i32 1, ptr %92, align 4, !tbaa !11
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %8, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %..preheader.3_crit_edge unwind label %45

..preheader.3_crit_edge:                          ; preds = %98
  %.pre32 = load i32, ptr @q, align 4, !tbaa !5
  %.pre33 = load i32, ptr getelementptr inbounds (i8, ptr @q, i64 4), align 4, !tbaa !10
  br label %.preheader.3

.preheader.3:                                     ; preds = %..preheader.3_crit_edge, %95, %89, %86, %80, %.preheader.2
  %99 = phi i32 [ %.pre33, %..preheader.3_crit_edge ], [ %73, %95 ], [ %73, %89 ], [ %73, %86 ], [ %73, %80 ], [ %73, %.preheader.2 ]
  %100 = phi i32 [ %.pre32, %..preheader.3_crit_edge ], [ %74, %95 ], [ %74, %89 ], [ %74, %86 ], [ %74, %80 ], [ %74, %.preheader.2 ]
  %101 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 24), align 8, !tbaa !11
  %102 = add nsw i32 %101, %100
  store i32 %102, ptr @p, align 4, !tbaa !5
  %103 = load i32, ptr getelementptr inbounds (i8, ptr @dir, i64 28), align 4, !tbaa !11
  %104 = add nsw i32 %103, %99
  store i32 %104, ptr getelementptr inbounds (i8, ptr @p, i64 4), align 4, !tbaa !10
  %105 = icmp slt i32 %102, 1
  br i1 %105, label %.loopexit, label %106

106:                                              ; preds = %.preheader.3
  %107 = load i32, ptr @n, align 4, !tbaa !11
  %108 = icmp sgt i32 %102, %107
  %109 = icmp slt i32 %104, 1
  %or.cond.3 = select i1 %108, i1 true, i1 %109
  %110 = load i32, ptr @m, align 4
  %111 = icmp sgt i32 %104, %110
  %or.cond22.3 = select i1 %or.cond.3, i1 true, i1 %111
  br i1 %or.cond22.3, label %.loopexit, label %112

112:                                              ; preds = %106
  %113 = icmp eq i32 %102, %4
  %114 = icmp eq i32 %104, %5
  %or.cond23.3 = select i1 %113, i1 %114, i1 false
  br i1 %or.cond23.3, label %.loopexit, label %115

115:                                              ; preds = %112
  %116 = zext nneg i32 %102 to i64
  %117 = zext nneg i32 %104 to i64
  %118 = getelementptr inbounds [10 x [10 x i32]], ptr %7, i64 0, i64 %116, i64 %117
  %119 = load i32, ptr %118, align 4, !tbaa !11
  %120 = icmp eq i32 %119, 0
  br i1 %120, label %121, label %.loopexit

121:                                              ; preds = %115
  %122 = getelementptr inbounds [10 x [10 x i32]], ptr @map, i64 0, i64 %116, i64 %117
  %123 = load i32, ptr %122, align 4, !tbaa !11
  %.not.3 = icmp eq i32 %123, 1
  br i1 %.not.3, label %.loopexit, label %124

124:                                              ; preds = %121
  store i32 1, ptr %118, align 4, !tbaa !11
  invoke void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %8, ptr noundef nonnull align 4 dereferenceable(8) @p)
          to label %.loopexit unwind label %45

.loopexit:                                        ; preds = %124, %121, %115, %112, %106, %.preheader.3
  %125 = call noundef zeroext i1 @_ZNKSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80) %8)
  br i1 %125, label %._crit_edge, label %.lr.ph, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph, %.loopexit, %.preheader24
  %.015 = phi i32 [ 0, %.preheader24 ], [ 0, %.loopexit ], [ 1, %.lr.ph ]
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %8) #5
  call void @llvm.lifetime.end.p0(i64 80, ptr nonnull %8) #5
  call void @llvm.lifetime.end.p0(i64 400, ptr nonnull %7) #5
  ret i32 %.015

126:                                              ; preds = %45, %24
  %.pn = phi { ptr, i32 } [ %46, %45 ], [ %25, %24 ]
  call void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80) %8) #5
  call void @llvm.lifetime.end.p0(i64 80, ptr nonnull %8) #5
  call void @llvm.lifetime.end.p0(i64 400, ptr nonnull %7) #5
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEEC2IS3_vEEv(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE4pushERKS0_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE5frontEv(ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEE3popEv(ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZNSt5queueI4NodeSt5dequeIS0_SaIS0_EEED2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4Node", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass