; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/SDMemory.ll (ZN13VNAT_RegisterC2EjjjjjjjjjjjjjjjP8DNNLayerP4Tile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.VNAT_Register = type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i8, i8, [6 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN13VNAT_RegisterC2EjjjjjjjjjjjjjjjP8DNNLayerP4Tile(ptr noundef nonnull align 8 dereferenceable(122) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, ptr noundef %16, ptr noundef %17) unnamed_addr #0 align 2 {
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca ptr, align 8
  %36 = alloca ptr, align 8
  store ptr %0, ptr %19, align 8, !tbaa !5
  store i32 %1, ptr %20, align 4, !tbaa !9
  store i32 %2, ptr %21, align 4, !tbaa !9
  store i32 %3, ptr %22, align 4, !tbaa !9
  store i32 %4, ptr %23, align 4, !tbaa !9
  store i32 %5, ptr %24, align 4, !tbaa !9
  store i32 %6, ptr %25, align 4, !tbaa !9
  store i32 %7, ptr %26, align 4, !tbaa !9
  store i32 %8, ptr %27, align 4, !tbaa !9
  store i32 %9, ptr %28, align 4, !tbaa !9
  store i32 %10, ptr %29, align 4, !tbaa !9
  store i32 %11, ptr %30, align 4, !tbaa !9
  store i32 %12, ptr %31, align 4, !tbaa !9
  store i32 %13, ptr %32, align 4, !tbaa !9
  store i32 %14, ptr %33, align 4, !tbaa !9
  store i32 %15, ptr %34, align 4, !tbaa !9
  store ptr %16, ptr %35, align 8, !tbaa !5
  store ptr %17, ptr %36, align 8, !tbaa !5
  %37 = load ptr, ptr %19, align 8
  %38 = load i32, ptr %20, align 4, !tbaa !9
  %39 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 0
  store i32 %38, ptr %39, align 8, !tbaa !11
  %40 = load i32, ptr %21, align 4, !tbaa !9
  %41 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 1
  store i32 %40, ptr %41, align 4, !tbaa !14
  %42 = load i32, ptr %21, align 4, !tbaa !9
  %43 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 2
  store i32 %42, ptr %43, align 8, !tbaa !15
  %44 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 3
  store i32 0, ptr %44, align 4, !tbaa !16
  %45 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 4
  store i32 0, ptr %45, align 8, !tbaa !17
  %46 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 5
  store i32 0, ptr %46, align 4, !tbaa !18
  %47 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 6
  store i32 0, ptr %47, align 8, !tbaa !19
  %48 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 7
  store i32 0, ptr %48, align 4, !tbaa !20
  %49 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 8
  store i32 0, ptr %49, align 8, !tbaa !21
  %50 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 9
  store i32 0, ptr %50, align 4, !tbaa !22
  %51 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 10
  store i32 0, ptr %51, align 8, !tbaa !23
  %52 = load i32, ptr %27, align 4, !tbaa !9
  %53 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 11
  store i32 %52, ptr %53, align 4, !tbaa !24
  %54 = load i32, ptr %28, align 4, !tbaa !9
  %55 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 12
  store i32 %54, ptr %55, align 8, !tbaa !25
  %56 = load i32, ptr %29, align 4, !tbaa !9
  %57 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 13
  store i32 %56, ptr %57, align 4, !tbaa !26
  %58 = load i32, ptr %30, align 4, !tbaa !9
  %59 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 14
  store i32 %58, ptr %59, align 8, !tbaa !27
  %60 = load i32, ptr %31, align 4, !tbaa !9
  %61 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 15
  store i32 %60, ptr %61, align 4, !tbaa !28
  %62 = load i32, ptr %32, align 4, !tbaa !9
  %63 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 16
  store i32 %62, ptr %63, align 8, !tbaa !29
  %64 = load i32, ptr %33, align 4, !tbaa !9
  %65 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 17
  store i32 %64, ptr %65, align 4, !tbaa !30
  %66 = load i32, ptr %34, align 4, !tbaa !9
  %67 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 18
  store i32 %66, ptr %67, align 8, !tbaa !31
  %68 = load i32, ptr %24, align 4, !tbaa !9
  %69 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 21
  store i32 %68, ptr %69, align 4, !tbaa !32
  %70 = load i32, ptr %22, align 4, !tbaa !9
  %71 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 19
  store i32 %70, ptr %71, align 4, !tbaa !33
  %72 = load i32, ptr %23, align 4, !tbaa !9
  %73 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 20
  store i32 %72, ptr %73, align 8, !tbaa !34
  %74 = load i32, ptr %25, align 4, !tbaa !9
  %75 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 22
  store i32 %74, ptr %75, align 8, !tbaa !35
  %76 = load i32, ptr %26, align 4, !tbaa !9
  %77 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 23
  store i32 %76, ptr %77, align 4, !tbaa !36
  %78 = load i32, ptr %32, align 4, !tbaa !9
  %79 = load i32, ptr %33, align 4, !tbaa !9
  %80 = mul i32 %78, %79
  %81 = load i32, ptr %34, align 4, !tbaa !9
  %82 = mul i32 %80, %81
  %83 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 24
  store i32 %82, ptr %83, align 8, !tbaa !37
  %84 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 25
  store i32 0, ptr %84, align 4, !tbaa !38
  %85 = load ptr, ptr %35, align 8, !tbaa !5
  %86 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  store ptr %85, ptr %86, align 8, !tbaa !39
  %87 = load ptr, ptr %36, align 8, !tbaa !5
  %88 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 27
  store ptr %87, ptr %88, align 8, !tbaa !40
  %89 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 21
  %90 = load i32, ptr %89, align 4, !tbaa !32
  %91 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  %92 = load ptr, ptr %91, align 8, !tbaa !39
  %93 = call noundef i32 @_ZNK8DNNLayer5get_KEv(ptr noundef nonnull align 8 dereferenceable(84) %92)
  %94 = icmp ult i32 %90, %93
  br i1 %94, label %95, label %125

95:                                               ; preds = %18
  %96 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 19
  %97 = load i32, ptr %96, align 4, !tbaa !33
  %98 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  %99 = load ptr, ptr %98, align 8, !tbaa !39
  %100 = call noundef i32 @_ZNK8DNNLayer5get_NEv(ptr noundef nonnull align 8 dereferenceable(84) %99)
  %101 = icmp ult i32 %97, %100
  br i1 %101, label %102, label %125

102:                                              ; preds = %95
  %103 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 20
  %104 = load i32, ptr %103, align 8, !tbaa !34
  %105 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  %106 = load ptr, ptr %105, align 8, !tbaa !39
  %107 = call noundef i32 @_ZNK8DNNLayer5get_GEv(ptr noundef nonnull align 8 dereferenceable(84) %106)
  %108 = icmp ult i32 %104, %107
  br i1 %108, label %109, label %125

109:                                              ; preds = %102
  %110 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 22
  %111 = load i32, ptr %110, align 8, !tbaa !35
  %112 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  %113 = load ptr, ptr %112, align 8, !tbaa !39
  %114 = call noundef i32 @_ZNK8DNNLayer6get_X_Ev(ptr noundef nonnull align 8 dereferenceable(84) %113)
  %115 = icmp ult i32 %111, %114
  br i1 %115, label %116, label %125

116:                                              ; preds = %109
  %117 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 23
  %118 = load i32, ptr %117, align 4, !tbaa !36
  %119 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 26
  %120 = load ptr, ptr %119, align 8, !tbaa !39
  %121 = call noundef i32 @_ZNK8DNNLayer6get_Y_Ev(ptr noundef nonnull align 8 dereferenceable(84) %120)
  %122 = icmp ult i32 %118, %121
  br i1 %122, label %123, label %125

123:                                              ; preds = %116
  %124 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 29
  store i8 1, ptr %124, align 1, !tbaa !41
  br label %127

125:                                              ; preds = %116, %109, %102, %95, %18
  %126 = getelementptr inbounds %class.VNAT_Register, ptr %37, i32 0, i32 29
  store i8 0, ptr %126, align 1, !tbaa !41
  br label %127

127:                                              ; preds = %125, %123
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_KEv(ptr noundef nonnull align 8 dereferenceable(84)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_NEv(ptr noundef nonnull align 8 dereferenceable(84)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_GEv(ptr noundef nonnull align 8 dereferenceable(84)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer6get_X_Ev(ptr noundef nonnull align 8 dereferenceable(84)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer6get_Y_Ev(ptr noundef nonnull align 8 dereferenceable(84)) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS13VNAT_Register", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !6, i64 104, !6, i64 112, !13, i64 120, !13, i64 121}
!13 = !{!"bool", !7, i64 0}
!14 = !{!12, !10, i64 4}
!15 = !{!12, !10, i64 8}
!16 = !{!12, !10, i64 12}
!17 = !{!12, !10, i64 16}
!18 = !{!12, !10, i64 20}
!19 = !{!12, !10, i64 24}
!20 = !{!12, !10, i64 28}
!21 = !{!12, !10, i64 32}
!22 = !{!12, !10, i64 36}
!23 = !{!12, !10, i64 40}
!24 = !{!12, !10, i64 44}
!25 = !{!12, !10, i64 48}
!26 = !{!12, !10, i64 52}
!27 = !{!12, !10, i64 56}
!28 = !{!12, !10, i64 60}
!29 = !{!12, !10, i64 64}
!30 = !{!12, !10, i64 68}
!31 = !{!12, !10, i64 72}
!32 = !{!12, !10, i64 84}
!33 = !{!12, !10, i64 76}
!34 = !{!12, !10, i64 80}
!35 = !{!12, !10, i64 88}
!36 = !{!12, !10, i64 92}
!37 = !{!12, !10, i64 96}
!38 = !{!12, !10, i64 100}
!39 = !{!12, !6, i64 104}
!40 = !{!12, !6, i64 112}
!41 = !{!12, !13, i64 121}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN13VNAT_RegisterC2EjjjjjjjjjjjjjjjP8DNNLayerP4Tile(ptr nocapture noundef nonnull align 8 dereferenceable(122) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, ptr noundef nonnull %16, ptr noundef %17) unnamed_addr #0 align 2 {
  store i32 %1, ptr %0, align 8, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %19, align 4, !tbaa !12
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %2, ptr %20, align 8, !tbaa !13
  %21 = getelementptr inbounds i8, ptr %0, i64 12
  %22 = getelementptr inbounds i8, ptr %0, i64 44
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(32) %21, i8 0, i64 32, i1 false)
  store i32 %8, ptr %22, align 4, !tbaa !14
  %23 = getelementptr inbounds i8, ptr %0, i64 48
  store i32 %9, ptr %23, align 8, !tbaa !15
  %24 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %10, ptr %24, align 4, !tbaa !16
  %25 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %11, ptr %25, align 8, !tbaa !17
  %26 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 %12, ptr %26, align 4, !tbaa !18
  %27 = getelementptr inbounds i8, ptr %0, i64 64
  store i32 %13, ptr %27, align 8, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %0, i64 68
  store i32 %14, ptr %28, align 4, !tbaa !20
  %29 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 %15, ptr %29, align 8, !tbaa !21
  %30 = getelementptr inbounds i8, ptr %0, i64 84
  store i32 %5, ptr %30, align 4, !tbaa !22
  %31 = getelementptr inbounds i8, ptr %0, i64 76
  store i32 %3, ptr %31, align 4, !tbaa !23
  %32 = getelementptr inbounds i8, ptr %0, i64 80
  store i32 %4, ptr %32, align 8, !tbaa !24
  %33 = getelementptr inbounds i8, ptr %0, i64 88
  store i32 %6, ptr %33, align 8, !tbaa !25
  %34 = getelementptr inbounds i8, ptr %0, i64 92
  store i32 %7, ptr %34, align 4, !tbaa !26
  %35 = mul i32 %14, %13
  %36 = mul i32 %35, %15
  %37 = getelementptr inbounds i8, ptr %0, i64 96
  store i32 %36, ptr %37, align 8, !tbaa !27
  %38 = getelementptr inbounds i8, ptr %0, i64 100
  store i32 0, ptr %38, align 4, !tbaa !28
  %39 = getelementptr inbounds i8, ptr %0, i64 104
  store ptr %16, ptr %39, align 8, !tbaa !29
  %40 = getelementptr inbounds i8, ptr %0, i64 112
  store ptr %17, ptr %40, align 8, !tbaa !30
  %41 = tail call noundef i32 @_ZNK8DNNLayer5get_KEv(ptr noundef nonnull align 8 dereferenceable(84) %16)
  %42 = icmp ugt i32 %41, %5
  br i1 %42, label %43, label %63

43:                                               ; preds = %18
  %44 = load i32, ptr %31, align 4, !tbaa !23
  %45 = load ptr, ptr %39, align 8, !tbaa !29
  %46 = tail call noundef i32 @_ZNK8DNNLayer5get_NEv(ptr noundef nonnull align 8 dereferenceable(84) %45)
  %47 = icmp ult i32 %44, %46
  br i1 %47, label %48, label %63

48:                                               ; preds = %43
  %49 = load i32, ptr %32, align 8, !tbaa !24
  %50 = load ptr, ptr %39, align 8, !tbaa !29
  %51 = tail call noundef i32 @_ZNK8DNNLayer5get_GEv(ptr noundef nonnull align 8 dereferenceable(84) %50)
  %52 = icmp ult i32 %49, %51
  br i1 %52, label %53, label %63

53:                                               ; preds = %48
  %54 = load i32, ptr %33, align 8, !tbaa !25
  %55 = load ptr, ptr %39, align 8, !tbaa !29
  %56 = tail call noundef i32 @_ZNK8DNNLayer6get_X_Ev(ptr noundef nonnull align 8 dereferenceable(84) %55)
  %57 = icmp ult i32 %54, %56
  br i1 %57, label %58, label %63

58:                                               ; preds = %53
  %59 = load i32, ptr %34, align 4, !tbaa !26
  %60 = load ptr, ptr %39, align 8, !tbaa !29
  %61 = tail call noundef i32 @_ZNK8DNNLayer6get_Y_Ev(ptr noundef nonnull align 8 dereferenceable(84) %60)
  %62 = icmp ult i32 %59, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %58, %53, %48, %43, %18
  br label %64

64:                                               ; preds = %58, %63
  %.sink = phi i8 [ 0, %63 ], [ 1, %58 ]
  %65 = getelementptr inbounds i8, ptr %0, i64 121
  store i8 %.sink, ptr %65, align 1, !tbaa !31
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_KEv(ptr noundef nonnull align 8 dereferenceable(84)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_NEv(ptr noundef nonnull align 8 dereferenceable(84)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer5get_GEv(ptr noundef nonnull align 8 dereferenceable(84)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer6get_X_Ev(ptr noundef nonnull align 8 dereferenceable(84)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8DNNLayer6get_Y_Ev(ptr noundef nonnull align 8 dereferenceable(84)) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS13VNAT_Register", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !10, i64 104, !10, i64 112, !11, i64 120, !11, i64 121}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"bool", !8, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !7, i64 44}
!15 = !{!6, !7, i64 48}
!16 = !{!6, !7, i64 52}
!17 = !{!6, !7, i64 56}
!18 = !{!6, !7, i64 60}
!19 = !{!6, !7, i64 64}
!20 = !{!6, !7, i64 68}
!21 = !{!6, !7, i64 72}
!22 = !{!6, !7, i64 84}
!23 = !{!6, !7, i64 76}
!24 = !{!6, !7, i64 80}
!25 = !{!6, !7, i64 88}
!26 = !{!6, !7, i64 92}
!27 = !{!6, !7, i64 96}
!28 = !{!6, !7, i64 100}
!29 = !{!6, !10, i64 104}
!30 = !{!6, !10, i64 112}
!31 = !{!6, !11, i64 121}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass