; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SMBUS_HandleTypeDef = type { ptr, %struct.SMBUS_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32, i32 }
%struct.SMBUS_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SMBUS_Master_Abort_IT(ptr noundef %0, i16 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  %6 = load ptr, ptr %4, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %6, i32 0, i32 8
  %8 = load volatile i32, ptr %7, align 8, !tbaa !11
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %10, label %64

10:                                               ; preds = %2
  br label %11

11:                                               ; preds = %10
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %12, i32 0, i32 7
  %14 = load i32, ptr %13, align 4, !tbaa !15
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 2, ptr %3, align 4
  br label %65

17:                                               ; preds = %11
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %18, i32 0, i32 7
  store i32 1, ptr %19, align 4, !tbaa !15
  br label %20

20:                                               ; preds = %17
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %22, i32 0, i32 6
  %24 = load volatile i32, ptr %23, align 8, !tbaa !16
  %25 = icmp eq i32 %24, 18
  br i1 %25, label %26, label %29

26:                                               ; preds = %21
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %27, i32 0, i32 8
  store volatile i32 18, ptr %28, align 8, !tbaa !11
  br label %39

29:                                               ; preds = %21
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %30, i32 0, i32 6
  %32 = load volatile i32, ptr %31, align 8, !tbaa !16
  %33 = icmp eq i32 %32, 34
  br i1 %33, label %34, label %37

34:                                               ; preds = %29
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %35, i32 0, i32 8
  store volatile i32 34, ptr %36, align 8, !tbaa !11
  br label %38

37:                                               ; preds = %29
  store i32 1, ptr %3, align 4
  br label %65

38:                                               ; preds = %34
  br label %39

39:                                               ; preds = %38, %26
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %40, i32 0, i32 9
  store volatile i32 0, ptr %41, align 4, !tbaa !17
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = load i16, ptr %5, align 2, !tbaa !9
  call void @SMBUS_TransferConfig(ptr noundef %42, i16 noundef zeroext %43, i8 noundef zeroext 1, i32 noundef 33554432, i32 noundef 0)
  br label %44

44:                                               ; preds = %39
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %45, i32 0, i32 7
  store i32 0, ptr %46, align 4, !tbaa !15
  br label %47

47:                                               ; preds = %44
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %48, i32 0, i32 8
  %50 = load volatile i32, ptr %49, align 8, !tbaa !11
  %51 = icmp eq i32 %50, 18
  br i1 %51, label %52, label %54

52:                                               ; preds = %47
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  call void @SMBUS_Enable_IRQ(ptr noundef %53, i32 noundef 242)
  br label %63

54:                                               ; preds = %47
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %55, i32 0, i32 8
  %57 = load volatile i32, ptr %56, align 8, !tbaa !11
  %58 = icmp eq i32 %57, 34
  br i1 %58, label %59, label %61

59:                                               ; preds = %54
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  call void @SMBUS_Enable_IRQ(ptr noundef %60, i32 noundef 212)
  br label %62

61:                                               ; preds = %54
  br label %62

62:                                               ; preds = %61, %59
  br label %63

63:                                               ; preds = %62, %52
  store i32 0, ptr %3, align 4
  br label %65

64:                                               ; preds = %2
  store i32 2, ptr %3, align 4
  br label %65

65:                                               ; preds = %64, %63, %37, %16
  %66 = load i32, ptr %3, align 4
  ret i32 %66
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 80}
!12 = !{!"__SMBUS_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 56, !10, i64 64, !10, i64 66, !14, i64 68, !14, i64 72, !14, i64 76, !14, i64 80, !14, i64 84}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !14, i64 76}
!16 = !{!12, !14, i64 72}
!17 = !{!12, !14, i64 84}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SMBUS_Master_Abort_IT(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 80
  %4 = load volatile i32, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %6, label %24

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 76
  %8 = load i32, ptr %7, align 4, !tbaa !13
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %24, label %10

10:                                               ; preds = %6
  store i32 1, ptr %7, align 4, !tbaa !13
  %11 = getelementptr inbounds i8, ptr %0, i64 72
  %12 = load volatile i32, ptr %11, align 8, !tbaa !14
  %13 = icmp eq i32 %12, 18
  br i1 %13, label %17, label %14

14:                                               ; preds = %10
  %15 = load volatile i32, ptr %11, align 8, !tbaa !14
  %16 = icmp eq i32 %15, 34
  br i1 %16, label %17, label %24

17:                                               ; preds = %14, %10
  %.sink = phi i32 [ 18, %10 ], [ 34, %14 ]
  store volatile i32 %.sink, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds i8, ptr %0, i64 84
  store volatile i32 0, ptr %18, align 4, !tbaa !15
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext %1, i8 noundef zeroext 1, i32 noundef 33554432, i32 noundef 0)
  store i32 0, ptr %7, align 4, !tbaa !13
  %19 = load volatile i32, ptr %3, align 8, !tbaa !5
  %20 = icmp eq i32 %19, 18
  br i1 %20, label %.sink.split, label %21

21:                                               ; preds = %17
  %22 = load volatile i32, ptr %3, align 8, !tbaa !5
  %23 = icmp eq i32 %22, 34
  br i1 %23, label %.sink.split, label %24

.sink.split:                                      ; preds = %21, %17
  %.sink15 = phi i32 [ 242, %17 ], [ 212, %21 ]
  tail call void @SMBUS_Enable_IRQ(ptr noundef nonnull %0, i32 noundef %.sink15)
  br label %24

24:                                               ; preds = %.sink.split, %2, %21, %14, %6
  %.0 = phi i32 [ 2, %6 ], [ 1, %14 ], [ 0, %21 ], [ 2, %2 ], [ 0, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 80}
!6 = !{!"__SMBUS_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 76}
!14 = !{!6, !11, i64 72}
!15 = !{!6, !11, i64 84}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass