; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@TimerIdxToTimerId = external hidden global [6 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) #1

declare i32 @HAL_DMA_Abort(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_SimpleCaptureStop_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  br label %11

11:                                               ; preds = %3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %12, i32 0, i32 3
  %14 = load i32, ptr %13, align 4, !tbaa !11
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 2, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %295

17:                                               ; preds = %11
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %18, i32 0, i32 3
  store i32 1, ptr %19, align 4, !tbaa !11
  br label %20

20:                                               ; preds = %17
  br label %21

21:                                               ; preds = %20
  br label %22

22:                                               ; preds = %21
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %23, i32 0, i32 4
  store volatile i32 2, ptr %24, align 8, !tbaa !14
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef %25, i32 noundef %26)
  %28 = call i32 @HAL_DMA_Abort(ptr noundef %27)
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %38

30:                                               ; preds = %22
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %31, i32 0, i32 4
  store volatile i32 7, ptr %32, align 8, !tbaa !14
  br label %33

33:                                               ; preds = %30
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %34, i32 0, i32 3
  store i32 0, ptr %35, align 4, !tbaa !11
  br label %36

36:                                               ; preds = %33
  br label %37

37:                                               ; preds = %36
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %295

38:                                               ; preds = %22
  %39 = load i32, ptr %7, align 4, !tbaa !9
  switch i32 %39, label %82 [
    i32 1, label %40
    i32 2, label %61
  ]

40:                                               ; preds = %38
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %41, i32 0, i32 0
  %43 = load ptr, ptr %42, align 8, !tbaa !15
  %44 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %43, i32 0, i32 1
  %45 = load i32, ptr %6, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  %47 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %44, i64 0, i64 %46
  %48 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %47, i32 0, i32 23
  store volatile i32 0, ptr %48, align 4, !tbaa !16
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %49, i32 0, i32 0
  %51 = load ptr, ptr %50, align 8, !tbaa !15
  %52 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %51, i32 0, i32 1
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = zext i32 %53 to i64
  %55 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %52, i64 0, i64 %54
  %56 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %55, i32 0, i32 3
  %57 = load volatile i32, ptr %56, align 4, !tbaa !18
  %58 = zext i32 %57 to i64
  %59 = and i64 %58, -8388609
  %60 = trunc i64 %59 to i32
  store volatile i32 %60, ptr %56, align 4, !tbaa !18
  br label %90

61:                                               ; preds = %38
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %62, i32 0, i32 0
  %64 = load ptr, ptr %63, align 8, !tbaa !15
  %65 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %64, i32 0, i32 1
  %66 = load i32, ptr %6, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  %68 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %65, i64 0, i64 %67
  %69 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %68, i32 0, i32 24
  store volatile i32 0, ptr %69, align 4, !tbaa !19
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !15
  %73 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %72, i32 0, i32 1
  %74 = load i32, ptr %6, align 4, !tbaa !9
  %75 = zext i32 %74 to i64
  %76 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %73, i64 0, i64 %75
  %77 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %76, i32 0, i32 3
  %78 = load volatile i32, ptr %77, align 4, !tbaa !18
  %79 = zext i32 %78 to i64
  %80 = and i64 %79, -16777217
  %81 = trunc i64 %80 to i32
  store volatile i32 %81, ptr %77, align 4, !tbaa !18
  br label %90

82:                                               ; preds = %38
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %83, i32 0, i32 4
  store volatile i32 7, ptr %84, align 8, !tbaa !14
  br label %85

85:                                               ; preds = %82
  %86 = load ptr, ptr %5, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %86, i32 0, i32 3
  store i32 0, ptr %87, align 4, !tbaa !11
  br label %88

88:                                               ; preds = %85
  br label %89

89:                                               ; preds = %88
  br label %90

90:                                               ; preds = %89, %61, %40
  %91 = load ptr, ptr %5, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %91, i32 0, i32 4
  %93 = load volatile i32, ptr %92, align 8, !tbaa !14
  %94 = icmp eq i32 %93, 7
  br i1 %94, label %95, label %96

95:                                               ; preds = %90
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %295

96:                                               ; preds = %90
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !15
  %100 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %99, i32 0, i32 1
  %101 = load i32, ptr %6, align 4, !tbaa !9
  %102 = zext i32 %101 to i64
  %103 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %100, i64 0, i64 %102
  %104 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %103, i32 0, i32 23
  %105 = load volatile i32, ptr %104, align 4, !tbaa !16
  store i32 %105, ptr %8, align 4, !tbaa !9
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %106, i32 0, i32 0
  %108 = load ptr, ptr %107, align 8, !tbaa !15
  %109 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %108, i32 0, i32 1
  %110 = load i32, ptr %6, align 4, !tbaa !9
  %111 = zext i32 %110 to i64
  %112 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %109, i64 0, i64 %111
  %113 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %112, i32 0, i32 24
  %114 = load volatile i32, ptr %113, align 4, !tbaa !19
  store i32 %114, ptr %9, align 4, !tbaa !9
  %115 = load i32, ptr %8, align 4, !tbaa !9
  %116 = icmp eq i32 %115, 0
  br i1 %116, label %117, label %287

117:                                              ; preds = %96
  %118 = load i32, ptr %9, align 4, !tbaa !9
  %119 = icmp eq i32 %118, 0
  br i1 %119, label %120, label %287

120:                                              ; preds = %117
  br label %121

121:                                              ; preds = %120
  %122 = load i32, ptr %6, align 4, !tbaa !9
  %123 = zext i32 %122 to i64
  %124 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %123
  %125 = load i32, ptr %124, align 4, !tbaa !9
  %126 = zext i32 %125 to i64
  %127 = and i64 %126, 65536
  %128 = icmp eq i64 %127, 65536
  br i1 %128, label %129, label %139

129:                                              ; preds = %121
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !15
  %133 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %132, i32 0, i32 0
  %134 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %133, i32 0, i32 0
  %135 = load volatile i32, ptr %134, align 4, !tbaa !20
  %136 = zext i32 %135 to i64
  %137 = and i64 %136, -65537
  %138 = trunc i64 %137 to i32
  store volatile i32 %138, ptr %134, align 4, !tbaa !20
  br label %139

139:                                              ; preds = %129, %121
  %140 = load i32, ptr %6, align 4, !tbaa !9
  %141 = zext i32 %140 to i64
  %142 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %141
  %143 = load i32, ptr %142, align 4, !tbaa !9
  %144 = zext i32 %143 to i64
  %145 = and i64 %144, 131072
  %146 = icmp eq i64 %145, 131072
  br i1 %146, label %147, label %168

147:                                              ; preds = %139
  %148 = load ptr, ptr %5, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %148, i32 0, i32 0
  %150 = load ptr, ptr %149, align 8, !tbaa !15
  %151 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %150, i32 0, i32 3
  %152 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %151, i32 0, i32 5
  %153 = load volatile i32, ptr %152, align 4, !tbaa !24
  %154 = zext i32 %153 to i64
  %155 = and i64 %154, 3
  %156 = icmp eq i64 %155, 0
  br i1 %156, label %157, label %167

157:                                              ; preds = %147
  %158 = load ptr, ptr %5, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %158, i32 0, i32 0
  %160 = load ptr, ptr %159, align 8, !tbaa !15
  %161 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %160, i32 0, i32 0
  %162 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %161, i32 0, i32 0
  %163 = load volatile i32, ptr %162, align 4, !tbaa !20
  %164 = zext i32 %163 to i64
  %165 = and i64 %164, -131073
  %166 = trunc i64 %165 to i32
  store volatile i32 %166, ptr %162, align 4, !tbaa !20
  br label %167

167:                                              ; preds = %157, %147
  br label %168

168:                                              ; preds = %167, %139
  %169 = load i32, ptr %6, align 4, !tbaa !9
  %170 = zext i32 %169 to i64
  %171 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %170
  %172 = load i32, ptr %171, align 4, !tbaa !9
  %173 = zext i32 %172 to i64
  %174 = and i64 %173, 262144
  %175 = icmp eq i64 %174, 262144
  br i1 %175, label %176, label %197

176:                                              ; preds = %168
  %177 = load ptr, ptr %5, align 8, !tbaa !5
  %178 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %177, i32 0, i32 0
  %179 = load ptr, ptr %178, align 8, !tbaa !15
  %180 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %179, i32 0, i32 3
  %181 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %180, i32 0, i32 5
  %182 = load volatile i32, ptr %181, align 4, !tbaa !24
  %183 = zext i32 %182 to i64
  %184 = and i64 %183, 12
  %185 = icmp eq i64 %184, 0
  br i1 %185, label %186, label %196

186:                                              ; preds = %176
  %187 = load ptr, ptr %5, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %187, i32 0, i32 0
  %189 = load ptr, ptr %188, align 8, !tbaa !15
  %190 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %189, i32 0, i32 0
  %191 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %190, i32 0, i32 0
  %192 = load volatile i32, ptr %191, align 4, !tbaa !20
  %193 = zext i32 %192 to i64
  %194 = and i64 %193, -262145
  %195 = trunc i64 %194 to i32
  store volatile i32 %195, ptr %191, align 4, !tbaa !20
  br label %196

196:                                              ; preds = %186, %176
  br label %197

197:                                              ; preds = %196, %168
  %198 = load i32, ptr %6, align 4, !tbaa !9
  %199 = zext i32 %198 to i64
  %200 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %199
  %201 = load i32, ptr %200, align 4, !tbaa !9
  %202 = zext i32 %201 to i64
  %203 = and i64 %202, 524288
  %204 = icmp eq i64 %203, 524288
  br i1 %204, label %205, label %226

205:                                              ; preds = %197
  %206 = load ptr, ptr %5, align 8, !tbaa !5
  %207 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %206, i32 0, i32 0
  %208 = load ptr, ptr %207, align 8, !tbaa !15
  %209 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %208, i32 0, i32 3
  %210 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %209, i32 0, i32 5
  %211 = load volatile i32, ptr %210, align 4, !tbaa !24
  %212 = zext i32 %211 to i64
  %213 = and i64 %212, 48
  %214 = icmp eq i64 %213, 0
  br i1 %214, label %215, label %225

215:                                              ; preds = %205
  %216 = load ptr, ptr %5, align 8, !tbaa !5
  %217 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %216, i32 0, i32 0
  %218 = load ptr, ptr %217, align 8, !tbaa !15
  %219 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %218, i32 0, i32 0
  %220 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %219, i32 0, i32 0
  %221 = load volatile i32, ptr %220, align 4, !tbaa !20
  %222 = zext i32 %221 to i64
  %223 = and i64 %222, -524289
  %224 = trunc i64 %223 to i32
  store volatile i32 %224, ptr %220, align 4, !tbaa !20
  br label %225

225:                                              ; preds = %215, %205
  br label %226

226:                                              ; preds = %225, %197
  %227 = load i32, ptr %6, align 4, !tbaa !9
  %228 = zext i32 %227 to i64
  %229 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %228
  %230 = load i32, ptr %229, align 4, !tbaa !9
  %231 = zext i32 %230 to i64
  %232 = and i64 %231, 1048576
  %233 = icmp eq i64 %232, 1048576
  br i1 %233, label %234, label %255

234:                                              ; preds = %226
  %235 = load ptr, ptr %5, align 8, !tbaa !5
  %236 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %235, i32 0, i32 0
  %237 = load ptr, ptr %236, align 8, !tbaa !15
  %238 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %237, i32 0, i32 3
  %239 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %238, i32 0, i32 5
  %240 = load volatile i32, ptr %239, align 4, !tbaa !24
  %241 = zext i32 %240 to i64
  %242 = and i64 %241, 192
  %243 = icmp eq i64 %242, 0
  br i1 %243, label %244, label %254

244:                                              ; preds = %234
  %245 = load ptr, ptr %5, align 8, !tbaa !5
  %246 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %245, i32 0, i32 0
  %247 = load ptr, ptr %246, align 8, !tbaa !15
  %248 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %247, i32 0, i32 0
  %249 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %248, i32 0, i32 0
  %250 = load volatile i32, ptr %249, align 4, !tbaa !20
  %251 = zext i32 %250 to i64
  %252 = and i64 %251, -1048577
  %253 = trunc i64 %252 to i32
  store volatile i32 %253, ptr %249, align 4, !tbaa !20
  br label %254

254:                                              ; preds = %244, %234
  br label %255

255:                                              ; preds = %254, %226
  %256 = load i32, ptr %6, align 4, !tbaa !9
  %257 = zext i32 %256 to i64
  %258 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %257
  %259 = load i32, ptr %258, align 4, !tbaa !9
  %260 = zext i32 %259 to i64
  %261 = and i64 %260, 2097152
  %262 = icmp eq i64 %261, 2097152
  br i1 %262, label %263, label %284

263:                                              ; preds = %255
  %264 = load ptr, ptr %5, align 8, !tbaa !5
  %265 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %264, i32 0, i32 0
  %266 = load ptr, ptr %265, align 8, !tbaa !15
  %267 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %266, i32 0, i32 3
  %268 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %267, i32 0, i32 5
  %269 = load volatile i32, ptr %268, align 4, !tbaa !24
  %270 = zext i32 %269 to i64
  %271 = and i64 %270, 768
  %272 = icmp eq i64 %271, 0
  br i1 %272, label %273, label %283

273:                                              ; preds = %263
  %274 = load ptr, ptr %5, align 8, !tbaa !5
  %275 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %274, i32 0, i32 0
  %276 = load ptr, ptr %275, align 8, !tbaa !15
  %277 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %276, i32 0, i32 0
  %278 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %277, i32 0, i32 0
  %279 = load volatile i32, ptr %278, align 4, !tbaa !20
  %280 = zext i32 %279 to i64
  %281 = and i64 %280, -2097153
  %282 = trunc i64 %281 to i32
  store volatile i32 %282, ptr %278, align 4, !tbaa !20
  br label %283

283:                                              ; preds = %273, %263
  br label %284

284:                                              ; preds = %283, %255
  br label %285

285:                                              ; preds = %284
  br label %286

286:                                              ; preds = %285
  br label %287

287:                                              ; preds = %286, %117, %96
  %288 = load ptr, ptr %5, align 8, !tbaa !5
  %289 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %288, i32 0, i32 4
  store volatile i32 1, ptr %289, align 8, !tbaa !14
  br label %290

290:                                              ; preds = %287
  %291 = load ptr, ptr %5, align 8, !tbaa !5
  %292 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %291, i32 0, i32 3
  store i32 0, ptr %292, align 4, !tbaa !11
  br label %293

293:                                              ; preds = %290
  br label %294

294:                                              ; preds = %293
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %295

295:                                              ; preds = %294, %95, %37, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %296 = load i32, ptr %4, align 4
  ret i32 %296
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 196}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 200}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 92}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !7, i64 108}
!18 = !{!17, !10, i64 12}
!19 = !{!17, !10, i64 96}
!20 = !{!21, !10, i64 0}
!21 = !{!"", !22, i64 0, !7, i64 128, !7, i64 768, !23, i64 896}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!23 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!24 = !{!21, !10, i64 916}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }

@TimerIdxToTimerId = external hidden local_unnamed_addr global [6 x i32], align 16

; Function Attrs: nounwind uwtable
declare hidden ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @HAL_DMA_Abort(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_SimpleCaptureStop_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 196
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %104, label %7

7:                                                ; preds = %3
  store i32 1, ptr %4, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 200
  store volatile i32 2, ptr %8, align 8, !tbaa !12
  %9 = tail call ptr @HRTIM_GetDMAHandleFromTimerIdx(ptr noundef nonnull %0, i32 noundef %1)
  %10 = tail call i32 @HAL_DMA_Abort(ptr noundef %9) #2
  %.not = icmp eq i32 %10, 0
  br i1 %.not, label %11, label %.sink.split

11:                                               ; preds = %7
  switch i32 %2, label %28 [
    i32 1, label %12
    i32 2, label %20
  ]

12:                                               ; preds = %11
  %13 = load ptr, ptr %0, align 8, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %13, i64 128
  %15 = zext i32 %1 to i64
  %16 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %14, i64 0, i64 %15, i32 23
  store volatile i32 0, ptr %16, align 4, !tbaa !14
  %17 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %14, i64 0, i64 %15, i32 3
  %18 = load volatile i32, ptr %17, align 4, !tbaa !16
  %19 = and i32 %18, -8388609
  store volatile i32 %19, ptr %17, align 4, !tbaa !16
  br label %29

20:                                               ; preds = %11
  %21 = load ptr, ptr %0, align 8, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %21, i64 128
  %23 = zext i32 %1 to i64
  %24 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %22, i64 0, i64 %23, i32 24
  store volatile i32 0, ptr %24, align 4, !tbaa !17
  %25 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %22, i64 0, i64 %23, i32 3
  %26 = load volatile i32, ptr %25, align 4, !tbaa !16
  %27 = and i32 %26, -16777217
  store volatile i32 %27, ptr %25, align 4, !tbaa !16
  br label %29

28:                                               ; preds = %11
  store volatile i32 7, ptr %8, align 8, !tbaa !12
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %28, %20, %12
  %30 = load volatile i32, ptr %8, align 8, !tbaa !12
  %31 = icmp eq i32 %30, 7
  br i1 %31, label %104, label %32

32:                                               ; preds = %29
  %33 = load ptr, ptr %0, align 8, !tbaa !13
  %34 = getelementptr inbounds i8, ptr %33, i64 128
  %35 = zext i32 %1 to i64
  %36 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %34, i64 0, i64 %35, i32 23
  %37 = load volatile i32, ptr %36, align 4, !tbaa !14
  %38 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %34, i64 0, i64 %35, i32 24
  %39 = load volatile i32, ptr %38, align 4, !tbaa !17
  %40 = icmp eq i32 %37, 0
  %41 = icmp eq i32 %39, 0
  %or.cond = select i1 %40, i1 %41, i1 false
  br i1 %or.cond, label %42, label %.sink.split

42:                                               ; preds = %32
  %43 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %35
  %44 = load i32, ptr %43, align 4, !tbaa !18
  %45 = and i32 %44, 65536
  %.not45 = icmp eq i32 %45, 0
  br i1 %.not45, label %49, label %46

46:                                               ; preds = %42
  %47 = load volatile i32, ptr %33, align 4, !tbaa !19
  %48 = and i32 %47, -65537
  store volatile i32 %48, ptr %33, align 4, !tbaa !19
  %.pre = load i32, ptr %43, align 4, !tbaa !18
  br label %49

49:                                               ; preds = %46, %42
  %50 = phi i32 [ %.pre, %46 ], [ %44, %42 ]
  %51 = and i32 %50, 131072
  %.not46 = icmp eq i32 %51, 0
  br i1 %.not46, label %60, label %52

52:                                               ; preds = %49
  %53 = getelementptr inbounds i8, ptr %33, i64 916
  %54 = load volatile i32, ptr %53, align 4, !tbaa !23
  %55 = and i32 %54, 3
  %56 = icmp eq i32 %55, 0
  br i1 %56, label %57, label %60

57:                                               ; preds = %52
  %58 = load volatile i32, ptr %33, align 4, !tbaa !19
  %59 = and i32 %58, -131073
  store volatile i32 %59, ptr %33, align 4, !tbaa !19
  %.pre51 = load i32, ptr %43, align 4, !tbaa !18
  br label %60

60:                                               ; preds = %52, %57, %49
  %61 = phi i32 [ %50, %52 ], [ %.pre51, %57 ], [ %50, %49 ]
  %62 = and i32 %61, 262144
  %.not47 = icmp eq i32 %62, 0
  br i1 %.not47, label %71, label %63

63:                                               ; preds = %60
  %64 = getelementptr inbounds i8, ptr %33, i64 916
  %65 = load volatile i32, ptr %64, align 4, !tbaa !23
  %66 = and i32 %65, 12
  %67 = icmp eq i32 %66, 0
  br i1 %67, label %68, label %71

68:                                               ; preds = %63
  %69 = load volatile i32, ptr %33, align 4, !tbaa !19
  %70 = and i32 %69, -262145
  store volatile i32 %70, ptr %33, align 4, !tbaa !19
  %.pre52 = load i32, ptr %43, align 4, !tbaa !18
  br label %71

71:                                               ; preds = %63, %68, %60
  %72 = phi i32 [ %61, %63 ], [ %.pre52, %68 ], [ %61, %60 ]
  %73 = and i32 %72, 524288
  %.not48 = icmp eq i32 %73, 0
  br i1 %.not48, label %82, label %74

74:                                               ; preds = %71
  %75 = getelementptr inbounds i8, ptr %33, i64 916
  %76 = load volatile i32, ptr %75, align 4, !tbaa !23
  %77 = and i32 %76, 48
  %78 = icmp eq i32 %77, 0
  br i1 %78, label %79, label %82

79:                                               ; preds = %74
  %80 = load volatile i32, ptr %33, align 4, !tbaa !19
  %81 = and i32 %80, -524289
  store volatile i32 %81, ptr %33, align 4, !tbaa !19
  %.pre53 = load i32, ptr %43, align 4, !tbaa !18
  br label %82

82:                                               ; preds = %74, %79, %71
  %83 = phi i32 [ %72, %74 ], [ %.pre53, %79 ], [ %72, %71 ]
  %84 = and i32 %83, 1048576
  %.not49 = icmp eq i32 %84, 0
  br i1 %.not49, label %93, label %85

85:                                               ; preds = %82
  %86 = getelementptr inbounds i8, ptr %33, i64 916
  %87 = load volatile i32, ptr %86, align 4, !tbaa !23
  %88 = and i32 %87, 192
  %89 = icmp eq i32 %88, 0
  br i1 %89, label %90, label %93

90:                                               ; preds = %85
  %91 = load volatile i32, ptr %33, align 4, !tbaa !19
  %92 = and i32 %91, -1048577
  store volatile i32 %92, ptr %33, align 4, !tbaa !19
  %.pre54 = load i32, ptr %43, align 4, !tbaa !18
  br label %93

93:                                               ; preds = %85, %90, %82
  %94 = phi i32 [ %83, %85 ], [ %.pre54, %90 ], [ %83, %82 ]
  %95 = and i32 %94, 2097152
  %.not50 = icmp eq i32 %95, 0
  br i1 %.not50, label %.sink.split, label %96

96:                                               ; preds = %93
  %97 = getelementptr inbounds i8, ptr %33, i64 916
  %98 = load volatile i32, ptr %97, align 4, !tbaa !23
  %99 = and i32 %98, 768
  %100 = icmp eq i32 %99, 0
  br i1 %100, label %101, label %.sink.split

101:                                              ; preds = %96
  %102 = load volatile i32, ptr %33, align 4, !tbaa !19
  %103 = and i32 %102, -2097153
  store volatile i32 %103, ptr %33, align 4, !tbaa !19
  br label %.sink.split

.sink.split:                                      ; preds = %32, %96, %101, %93, %7
  %.sink = phi i32 [ 7, %7 ], [ 1, %93 ], [ 1, %101 ], [ 1, %96 ], [ 1, %32 ]
  %.0.ph = phi i32 [ 1, %7 ], [ 0, %93 ], [ 0, %101 ], [ 0, %96 ], [ 0, %32 ]
  store volatile i32 %.sink, ptr %8, align 8, !tbaa !12
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %104

104:                                              ; preds = %.sink.split, %29, %3
  %.0 = phi i32 [ 2, %3 ], [ 1, %29 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 196}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 200}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 92}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !8, i64 108}
!16 = !{!15, !11, i64 12}
!17 = !{!15, !11, i64 96}
!18 = !{!11, !11, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"", !21, i64 0, !8, i64 128, !8, i64 768, !22, i64 896}
!21 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!22 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!23 = !{!20, !11, i64 916}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass