; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/OSMeshSDMemory.ll (ZN14OSMeshSDMemory7setTileEP4Tile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.OSMeshSDMemory = type { %class.MemoryController, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, i32, %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, %"class.std::vector.13", %"class.std::vector.13", ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, %"class.std::vector.8", i32, %class.SDMemoryStats }
%class.MemoryController = type { %class.Unit }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.SDMemoryStats = type { %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.3" }
%class.Stats = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN14OSMeshSDMemory7setTileEP4Tile(ptr noundef nonnull align 8 dereferenceable(552) %0, ptr noundef %1) unnamed_addr #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = call noundef i32 @_ZNK4Tile8get_T_X_Ev(ptr noundef nonnull align 4 dereferenceable(41) %8)
  %10 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 31
  store i32 %9, ptr %10, align 8, !tbaa !9
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = call noundef i32 @_ZNK4Tile7get_T_KEv(ptr noundef nonnull align 4 dereferenceable(41) %11)
  %13 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 29
  store i32 %12, ptr %13, align 8, !tbaa !38
  %14 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 30
  store i32 1, ptr %14, align 4, !tbaa !39
  %15 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 4
  %16 = load i32, ptr %15, align 8, !tbaa !40
  %17 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 31
  %18 = load i32, ptr %17, align 8, !tbaa !9
  %19 = udiv i32 %16, %18
  %20 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 4
  %21 = load i32, ptr %20, align 8, !tbaa !40
  %22 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 31
  %23 = load i32, ptr %22, align 8, !tbaa !9
  %24 = urem i32 %21, %23
  %25 = icmp ne i32 %24, 0
  %26 = zext i1 %25 to i32
  %27 = add i32 %19, %26
  %28 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 34
  store i32 %27, ptr %28, align 4, !tbaa !41
  %29 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 6
  %30 = load i32, ptr %29, align 8, !tbaa !42
  %31 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 33
  store i32 %30, ptr %31, align 8, !tbaa !43
  %32 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 5
  %33 = load i32, ptr %32, align 4, !tbaa !44
  %34 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 29
  %35 = load i32, ptr %34, align 8, !tbaa !38
  %36 = udiv i32 %33, %35
  %37 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 5
  %38 = load i32, ptr %37, align 4, !tbaa !44
  %39 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 29
  %40 = load i32, ptr %39, align 8, !tbaa !38
  %41 = urem i32 %38, %40
  %42 = icmp ne i32 %41, 0
  %43 = zext i1 %42 to i32
  %44 = add i32 %36, %43
  %45 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 32
  store i32 %44, ptr %45, align 4, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !46
  br label %46

46:                                               ; preds = %57, %2
  %47 = load i32, ptr %5, align 4, !tbaa !46
  %48 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 29
  %49 = load i32, ptr %48, align 8, !tbaa !38
  %50 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 31
  %51 = load i32, ptr %50, align 8, !tbaa !9
  %52 = mul i32 %49, %51
  %53 = icmp ult i32 %47, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %60

55:                                               ; preds = %46
  %56 = getelementptr inbounds %class.OSMeshSDMemory, ptr %7, i32 0, i32 12
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !46
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %56, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %57

57:                                               ; preds = %55
  %58 = load i32, ptr %5, align 4, !tbaa !46
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %5, align 4, !tbaa !46
  br label %46, !llvm.loop !47

60:                                               ; preds = %54
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile8get_T_X_Ev(ptr noundef nonnull align 4 dereferenceable(41)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile7get_T_KEv(ptr noundef nonnull align 4 dereferenceable(41)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 312}
!10 = !{!"_ZTS14OSMeshSDMemory", !11, i64 0, !6, i64 48, !6, i64 56, !6, i64 64, !13, i64 72, !13, i64 76, !13, i64 80, !13, i64 84, !13, i64 88, !6, i64 96, !17, i64 104, !18, i64 112, !22, i64 136, !26, i64 160, !13, i64 184, !13, i64 188, !13, i64 192, !13, i64 196, !13, i64 200, !13, i64 204, !13, i64 208, !13, i64 212, !13, i64 216, !6, i64 224, !30, i64 232, !30, i64 256, !6, i64 280, !6, i64 288, !6, i64 296, !13, i64 304, !13, i64 308, !13, i64 312, !13, i64 316, !13, i64 320, !13, i64 324, !13, i64 328, !13, i64 332, !13, i64 336, !34, i64 340, !34, i64 341, !34, i64 342, !34, i64 343, !34, i64 344, !13, i64 348, !13, i64 352, !13, i64 356, !13, i64 360, !13, i64 364, !26, i64 368, !13, i64 392, !35, i64 400}
!11 = !{!"_ZTS16MemoryController", !12, i64 0}
!12 = !{!"_ZTS4Unit", !13, i64 8, !14, i64 16}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !16, i64 8, !7, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTS21OSMeshControllerState", !7, i64 0}
!18 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIjSaIjEE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!30 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!34 = !{!"bool", !7, i64 0}
!35 = !{!"_ZTS13SDMemoryStats", !36, i64 0, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !37, i64 48, !22, i64 56, !22, i64 80, !22, i64 104, !22, i64 128}
!36 = !{!"_ZTS5Stats"}
!37 = !{!"_ZTS8Dataflow", !7, i64 0}
!38 = !{!10, !13, i64 304}
!39 = !{!10, !13, i64 308}
!40 = !{!10, !13, i64 72}
!41 = !{!10, !13, i64 324}
!42 = !{!10, !13, i64 80}
!43 = !{!10, !13, i64 320}
!44 = !{!10, !13, i64 76}
!45 = !{!10, !13, i64 316}
!46 = !{!13, !13, i64 0}
!47 = distinct !{!47, !48}
!48 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN14OSMeshSDMemory7setTileEP4Tile(ptr noundef nonnull align 8 dereferenceable(552) %0, ptr noundef nonnull %1) unnamed_addr #1 align 2 {
  %3 = alloca i32, align 4
  %4 = tail call noundef i32 @_ZNK4Tile8get_T_X_Ev(ptr noundef nonnull align 4 dereferenceable(41) %1)
  %5 = getelementptr inbounds i8, ptr %0, i64 312
  store i32 %4, ptr %5, align 8, !tbaa !5
  %6 = tail call noundef i32 @_ZNK4Tile7get_T_KEv(ptr noundef nonnull align 4 dereferenceable(41) %1)
  %7 = getelementptr inbounds i8, ptr %0, i64 304
  store i32 %6, ptr %7, align 8, !tbaa !37
  %8 = getelementptr inbounds i8, ptr %0, i64 308
  store i32 1, ptr %8, align 4, !tbaa !38
  %9 = getelementptr inbounds i8, ptr %0, i64 72
  %10 = load i32, ptr %9, align 8, !tbaa !39
  %11 = load i32, ptr %5, align 8, !tbaa !5
  %12 = udiv i32 %10, %11
  %13 = urem i32 %10, %11
  %14 = icmp ne i32 %13, 0
  %15 = zext i1 %14 to i32
  %16 = add i32 %12, %15
  %17 = getelementptr inbounds i8, ptr %0, i64 324
  store i32 %16, ptr %17, align 4, !tbaa !40
  %18 = getelementptr inbounds i8, ptr %0, i64 80
  %19 = load i32, ptr %18, align 8, !tbaa !41
  %20 = getelementptr inbounds i8, ptr %0, i64 320
  store i32 %19, ptr %20, align 8, !tbaa !42
  %21 = getelementptr inbounds i8, ptr %0, i64 76
  %22 = load i32, ptr %21, align 4, !tbaa !43
  %23 = udiv i32 %22, %6
  %24 = urem i32 %22, %6
  %25 = icmp ne i32 %24, 0
  %26 = zext i1 %25 to i32
  %27 = add i32 %23, %26
  %28 = getelementptr inbounds i8, ptr %0, i64 316
  store i32 %27, ptr %28, align 4, !tbaa !44
  %29 = mul i32 %11, %6
  %.not = icmp eq i32 %29, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %30 = getelementptr inbounds i8, ptr %0, i64 136
  br label %31

._crit_edge:                                      ; preds = %31, %2
  ret void

31:                                               ; preds = %.lr.ph, %31
  %.04 = phi i32 [ 0, %.lr.ph ], [ %32, %31 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 0, ptr %3, align 4, !tbaa !45
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %30, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  %32 = add nuw nsw i32 %.04, 1
  %33 = load i32, ptr %7, align 8, !tbaa !37
  %34 = load i32, ptr %5, align 8, !tbaa !5
  %35 = mul i32 %34, %33
  %36 = icmp ult i32 %32, %35
  br i1 %36, label %31, label %._crit_edge, !llvm.loop !46
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile8get_T_X_Ev(ptr noundef nonnull align 4 dereferenceable(41)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Tile7get_T_KEv(ptr noundef nonnull align 4 dereferenceable(41)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 312}
!6 = !{!"_ZTS14OSMeshSDMemory", !7, i64 0, !14, i64 48, !14, i64 56, !14, i64 64, !9, i64 72, !9, i64 76, !9, i64 80, !9, i64 84, !9, i64 88, !14, i64 96, !16, i64 104, !17, i64 112, !21, i64 136, !25, i64 160, !9, i64 184, !9, i64 188, !9, i64 192, !9, i64 196, !9, i64 200, !9, i64 204, !9, i64 208, !9, i64 212, !9, i64 216, !14, i64 224, !29, i64 232, !29, i64 256, !14, i64 280, !14, i64 288, !14, i64 296, !9, i64 304, !9, i64 308, !9, i64 312, !9, i64 316, !9, i64 320, !9, i64 324, !9, i64 328, !9, i64 332, !9, i64 336, !33, i64 340, !33, i64 341, !33, i64 342, !33, i64 343, !33, i64 344, !9, i64 348, !9, i64 352, !9, i64 356, !9, i64 360, !9, i64 364, !25, i64 368, !9, i64 392, !34, i64 400}
!7 = !{!"_ZTS16MemoryController", !8, i64 0}
!8 = !{!"_ZTS4Unit", !9, i64 8, !12, i64 16}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !15, i64 8, !10, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!"long", !10, i64 0}
!16 = !{!"_ZTS21OSMeshControllerState", !10, i64 0}
!17 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!"_ZTSSt6vectorIjSaIjEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!25 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!29 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!33 = !{!"bool", !10, i64 0}
!34 = !{!"_ZTS13SDMemoryStats", !35, i64 0, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44, !36, i64 48, !21, i64 56, !21, i64 80, !21, i64 104, !21, i64 128}
!35 = !{!"_ZTS5Stats"}
!36 = !{!"_ZTS8Dataflow", !10, i64 0}
!37 = !{!6, !9, i64 304}
!38 = !{!6, !9, i64 308}
!39 = !{!6, !9, i64 72}
!40 = !{!6, !9, i64 324}
!41 = !{!6, !9, i64 80}
!42 = !{!6, !9, i64 320}
!43 = !{!6, !9, i64 76}
!44 = !{!6, !9, i64 316}
!45 = !{!9, !9, i64 0}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass