; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (SetSynchroShift)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RTCEx_SetSynchroShift(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  br label %10

10:                                               ; preds = %3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %11, i32 0, i32 2
  %13 = load i32, ptr %12, align 4, !tbaa !11
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %10
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %142

16:                                               ; preds = %10
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %17, i32 0, i32 2
  store i32 1, ptr %18, align 4, !tbaa !11
  br label %19

19:                                               ; preds = %16
  br label %20

20:                                               ; preds = %19
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %22, i32 0, i32 3
  store volatile i32 2, ptr %23, align 8, !tbaa !14
  br label %24

24:                                               ; preds = %21
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !15
  %28 = getelementptr inbounds %struct.RTC_TypeDef, ptr %27, i32 0, i32 9
  store volatile i32 202, ptr %28, align 4, !tbaa !16
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !15
  %32 = getelementptr inbounds %struct.RTC_TypeDef, ptr %31, i32 0, i32 9
  store volatile i32 83, ptr %32, align 4, !tbaa !16
  br label %33

33:                                               ; preds = %24
  br label %34

34:                                               ; preds = %33
  %35 = call i32 @HAL_GetTick()
  store i32 %35, ptr %8, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %65, %34
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !15
  %40 = getelementptr inbounds %struct.RTC_TypeDef, ptr %39, i32 0, i32 3
  %41 = load volatile i32, ptr %40, align 4, !tbaa !18
  %42 = zext i32 %41 to i64
  %43 = and i64 %42, 8
  %44 = icmp ne i64 %43, 0
  br i1 %44, label %45, label %66

45:                                               ; preds = %36
  %46 = call i32 @HAL_GetTick()
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = sub i32 %46, %47
  %49 = icmp ugt i32 %48, 1000
  br i1 %49, label %50, label %65

50:                                               ; preds = %45
  br label %51

51:                                               ; preds = %50
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %52, i32 0, i32 0
  %54 = load ptr, ptr %53, align 8, !tbaa !15
  %55 = getelementptr inbounds %struct.RTC_TypeDef, ptr %54, i32 0, i32 9
  store volatile i32 255, ptr %55, align 4, !tbaa !16
  br label %56

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %56
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %58, i32 0, i32 3
  store volatile i32 3, ptr %59, align 8, !tbaa !14
  br label %60

60:                                               ; preds = %57
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %61, i32 0, i32 2
  store i32 0, ptr %62, align 4, !tbaa !11
  br label %63

63:                                               ; preds = %60
  br label %64

64:                                               ; preds = %63
  store i32 3, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %142

65:                                               ; preds = %45
  br label %36, !llvm.loop !19

66:                                               ; preds = %36
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %67, i32 0, i32 0
  %69 = load ptr, ptr %68, align 8, !tbaa !15
  %70 = getelementptr inbounds %struct.RTC_TypeDef, ptr %69, i32 0, i32 2
  %71 = load volatile i32, ptr %70, align 4, !tbaa !21
  %72 = zext i32 %71 to i64
  %73 = and i64 %72, 16
  %74 = icmp eq i64 %73, 0
  br i1 %74, label %75, label %112

75:                                               ; preds = %66
  %76 = load i32, ptr %7, align 4, !tbaa !9
  %77 = load i32, ptr %6, align 4, !tbaa !9
  %78 = or i32 %76, %77
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %79, i32 0, i32 0
  %81 = load ptr, ptr %80, align 8, !tbaa !15
  %82 = getelementptr inbounds %struct.RTC_TypeDef, ptr %81, i32 0, i32 11
  store volatile i32 %78, ptr %82, align 4, !tbaa !22
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %83, i32 0, i32 0
  %85 = load ptr, ptr %84, align 8, !tbaa !15
  %86 = getelementptr inbounds %struct.RTC_TypeDef, ptr %85, i32 0, i32 2
  %87 = load volatile i32, ptr %86, align 4, !tbaa !21
  %88 = zext i32 %87 to i64
  %89 = and i64 %88, 32
  %90 = icmp eq i64 %89, 0
  br i1 %90, label %91, label %111

91:                                               ; preds = %75
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = call i32 @HAL_RTC_WaitForSynchro(ptr noundef %92)
  %94 = icmp ne i32 %93, 0
  br i1 %94, label %95, label %110

95:                                               ; preds = %91
  br label %96

96:                                               ; preds = %95
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !15
  %100 = getelementptr inbounds %struct.RTC_TypeDef, ptr %99, i32 0, i32 9
  store volatile i32 255, ptr %100, align 4, !tbaa !16
  br label %101

101:                                              ; preds = %96
  br label %102

102:                                              ; preds = %101
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %103, i32 0, i32 3
  store volatile i32 4, ptr %104, align 8, !tbaa !14
  br label %105

105:                                              ; preds = %102
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %106, i32 0, i32 2
  store i32 0, ptr %107, align 4, !tbaa !11
  br label %108

108:                                              ; preds = %105
  br label %109

109:                                              ; preds = %108
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %142

110:                                              ; preds = %91
  br label %111

111:                                              ; preds = %110, %75
  br label %127

112:                                              ; preds = %66
  br label %113

113:                                              ; preds = %112
  %114 = load ptr, ptr %5, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %114, i32 0, i32 0
  %116 = load ptr, ptr %115, align 8, !tbaa !15
  %117 = getelementptr inbounds %struct.RTC_TypeDef, ptr %116, i32 0, i32 9
  store volatile i32 255, ptr %117, align 4, !tbaa !16
  br label %118

118:                                              ; preds = %113
  br label %119

119:                                              ; preds = %118
  %120 = load ptr, ptr %5, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %120, i32 0, i32 3
  store volatile i32 4, ptr %121, align 8, !tbaa !14
  br label %122

122:                                              ; preds = %119
  %123 = load ptr, ptr %5, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %123, i32 0, i32 2
  store i32 0, ptr %124, align 4, !tbaa !11
  br label %125

125:                                              ; preds = %122
  br label %126

126:                                              ; preds = %125
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %142

127:                                              ; preds = %111
  br label %128

128:                                              ; preds = %127
  %129 = load ptr, ptr %5, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %129, i32 0, i32 0
  %131 = load ptr, ptr %130, align 8, !tbaa !15
  %132 = getelementptr inbounds %struct.RTC_TypeDef, ptr %131, i32 0, i32 9
  store volatile i32 255, ptr %132, align 4, !tbaa !16
  br label %133

133:                                              ; preds = %128
  br label %134

134:                                              ; preds = %133
  %135 = load ptr, ptr %5, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %135, i32 0, i32 3
  store volatile i32 1, ptr %136, align 8, !tbaa !14
  br label %137

137:                                              ; preds = %134
  %138 = load ptr, ptr %5, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %138, i32 0, i32 2
  store i32 0, ptr %139, align 4, !tbaa !11
  br label %140

140:                                              ; preds = %137
  br label %141

141:                                              ; preds = %140
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %142

142:                                              ; preds = %141, %126, %109, %64, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %143 = load i32, ptr %4, align 4
  ret i32 %143
}

declare i32 @HAL_RTC_WaitForSynchro(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 36, !10, i64 40}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!14 = !{!12, !10, i64 40}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 36}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204}
!18 = !{!17, !10, i64 12}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!17, !10, i64 8}
!22 = !{!17, !10, i64 44}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_RTCEx_SetSynchroShift(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = getelementptr inbounds i8, ptr %0, i64 36
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %37, label %7

7:                                                ; preds = %3
  store i32 1, ptr %4, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  store volatile i32 2, ptr %8, align 8, !tbaa !12
  %9 = load ptr, ptr %0, align 8, !tbaa !13
  %10 = getelementptr inbounds i8, ptr %9, i64 36
  store volatile i32 202, ptr %10, align 4, !tbaa !14
  store volatile i32 83, ptr %10, align 4, !tbaa !14
  %11 = tail call i32 @HAL_GetTick() #2
  br label %12

12:                                               ; preds = %17, %7
  %13 = load ptr, ptr %0, align 8, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %13, i64 12
  %15 = load volatile i32, ptr %14, align 4, !tbaa !16
  %16 = and i32 %15, 8
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %23, label %17

17:                                               ; preds = %12
  %18 = tail call i32 @HAL_GetTick() #2
  %19 = sub i32 %18, %11
  %20 = icmp ugt i32 %19, 1000
  br i1 %20, label %21, label %12, !llvm.loop !17

21:                                               ; preds = %17
  %22 = load ptr, ptr %0, align 8, !tbaa !13
  br label %.sink.split

23:                                               ; preds = %12
  %24 = getelementptr inbounds i8, ptr %13, i64 8
  %25 = load volatile i32, ptr %24, align 4, !tbaa !19
  %26 = and i32 %25, 16
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %.sink.split

28:                                               ; preds = %23
  %29 = or i32 %2, %1
  %30 = getelementptr inbounds i8, ptr %13, i64 44
  store volatile i32 %29, ptr %30, align 4, !tbaa !20
  %31 = load volatile i32, ptr %24, align 4, !tbaa !19
  %32 = and i32 %31, 32
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %.sink.split

34:                                               ; preds = %28
  %35 = tail call i32 @HAL_RTC_WaitForSynchro(ptr noundef nonnull %0) #2
  %.not25 = icmp ne i32 %35, 0
  %.pre = load ptr, ptr %0, align 8, !tbaa !13
  %spec.select = select i1 %.not25, i32 4, i32 1
  %spec.select31 = zext i1 %.not25 to i32
  br label %.sink.split

.sink.split:                                      ; preds = %34, %28, %23, %21
  %.sink30 = phi ptr [ %22, %21 ], [ %13, %23 ], [ %13, %28 ], [ %.pre, %34 ]
  %.sink = phi i32 [ 3, %21 ], [ 4, %23 ], [ 1, %28 ], [ %spec.select, %34 ]
  %.0.ph = phi i32 [ 3, %21 ], [ 1, %23 ], [ 0, %28 ], [ %spec.select31, %34 ]
  %36 = getelementptr inbounds i8, ptr %.sink30, i64 36
  store volatile i32 255, ptr %36, align 4, !tbaa !14
  store volatile i32 %.sink, ptr %8, align 8, !tbaa !12
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %.sink.split, %3
  %.0 = phi i32 [ 2, %3 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

declare i32 @HAL_RTC_WaitForSynchro(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 36}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 40}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 36}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204}
!16 = !{!15, !11, i64 12}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!15, !11, i64 8}
!20 = !{!15, !11, i64 44}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass