; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/CollectionBusLine.ll (ZN17CollectionBusLine5cycleEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.CollectionBusLine = type { %class.Unit, i32, %"class.std::vector", %"class.std::vector.3", ptr, i32, i32, %class.CollectionBusLineStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.CollectionBusLineStats = type { %class.Stats, i32, i32, i32, i32, %"class.std::vector.8" }
%class.Stats = type { ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17CollectionBusLine7receiveEv(ptr noundef nonnull align 8 dereferenceable(168)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17CollectionBusLine5cycleEv(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::vector.13", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca %"class.std::vector.13", align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8
  %13 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 7
  %14 = getelementptr inbounds %class.CollectionBusLineStats, ptr %13, i32 0, i32 1
  %15 = load i32, ptr %14, align 8, !tbaa !9
  %16 = add i32 %15, 1
  store i32 %16, ptr %14, align 8, !tbaa !9
  call void @_ZN17CollectionBusLine7receiveEv(ptr noundef nonnull align 8 dereferenceable(168) %12)
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #4
  store i8 0, ptr %3, align 1, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !32
  br label %17

17:                                               ; preds = %35, %1
  %18 = load i32, ptr %6, align 4, !tbaa !32
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %21 = call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #4
  %22 = icmp ult i64 %19, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %38

24:                                               ; preds = %17
  %25 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %26 = load i32, ptr %6, align 4, !tbaa !32
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #4
  %29 = load ptr, ptr %28, align 8, !tbaa !5
  %30 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %29)
  br i1 %30, label %34, label %31

31:                                               ; preds = %24
  %32 = load i32, ptr %5, align 4, !tbaa !32
  %33 = add i32 %32, 1
  store i32 %33, ptr %5, align 4, !tbaa !32
  br label %34

34:                                               ; preds = %31, %24
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %6, align 4, !tbaa !32
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %6, align 4, !tbaa !32
  br label %17, !llvm.loop !33

38:                                               ; preds = %23
  %39 = load i32, ptr %5, align 4, !tbaa !32
  %40 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 7
  %41 = getelementptr inbounds %class.CollectionBusLineStats, ptr %40, i32 0, i32 3
  %42 = load i32, ptr %41, align 8, !tbaa !35
  %43 = add i32 %42, %39
  store i32 %43, ptr %41, align 8, !tbaa !35
  %44 = load i32, ptr %5, align 4, !tbaa !32
  %45 = icmp ugt i32 %44, 1
  br i1 %45, label %46, label %51

46:                                               ; preds = %38
  %47 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 7
  %48 = getelementptr inbounds %class.CollectionBusLineStats, ptr %47, i32 0, i32 2
  %49 = load i32, ptr %48, align 4, !tbaa !36
  %50 = add i32 %49, 1
  store i32 %50, ptr %48, align 4, !tbaa !36
  br label %51

51:                                               ; preds = %46, %38
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #4
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  br label %52

52:                                               ; preds = %98, %51
  %53 = load i8, ptr %3, align 1, !tbaa !30, !range !37, !noundef !38
  %54 = trunc i8 %53 to i1
  br i1 %54, label %61, label %55

55:                                               ; preds = %52
  %56 = load i32, ptr %4, align 4, !tbaa !32
  %57 = zext i32 %56 to i64
  %58 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %59 = call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %58) #4
  %60 = icmp ult i64 %57, %59
  br label %61

61:                                               ; preds = %55, %52
  %62 = phi i1 [ false, %52 ], [ %60, %55 ]
  br i1 %62, label %63, label %110

63:                                               ; preds = %61
  %64 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %65 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 5
  %66 = load i32, ptr %65, align 8, !tbaa !39
  %67 = zext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %67) #4
  %69 = load ptr, ptr %68, align 8, !tbaa !5
  %70 = invoke noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %69)
          to label %71 unwind label %90

71:                                               ; preds = %63
  br i1 %70, label %98, label %72

72:                                               ; preds = %71
  store i8 1, ptr %3, align 1, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %73 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %74 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 5
  %75 = load i32, ptr %74, align 8, !tbaa !39
  %76 = zext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %76) #4
  %78 = load ptr, ptr %77, align 8, !tbaa !5
  %79 = invoke noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %78)
          to label %80 unwind label %94

80:                                               ; preds = %72
  store ptr %79, ptr %10, align 8, !tbaa !5
  %81 = load ptr, ptr %10, align 8, !tbaa !5
  %82 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 6
  %83 = load i32, ptr %82, align 4, !tbaa !40
  invoke void @_ZN11DataPackage13setOutputPortEj(ptr noundef nonnull align 8 dereferenceable(64) %81, i32 noundef %83)
          to label %84 unwind label %94

84:                                               ; preds = %80
  invoke void @_ZNSt6vectorIP11DataPackageSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(8) %10)
          to label %85 unwind label %94

85:                                               ; preds = %84
  %86 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 7
  %87 = getelementptr inbounds %class.CollectionBusLineStats, ptr %86, i32 0, i32 4
  %88 = load i32, ptr %87, align 4, !tbaa !41
  %89 = add i32 %88, 1
  store i32 %89, ptr %87, align 4, !tbaa !41
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %98

90:                                               ; preds = %113, %63
  %91 = landingpad { ptr, i32 }
          cleanup
  %92 = extractvalue { ptr, i32 } %91, 0
  store ptr %92, ptr %8, align 8
  %93 = extractvalue { ptr, i32 } %91, 1
  store i32 %93, ptr %9, align 4
  br label %123

94:                                               ; preds = %84, %80, %72
  %95 = landingpad { ptr, i32 }
          cleanup
  %96 = extractvalue { ptr, i32 } %95, 0
  store ptr %96, ptr %8, align 8
  %97 = extractvalue { ptr, i32 } %95, 1
  store i32 %97, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %123

98:                                               ; preds = %85, %71
  %99 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 5
  %100 = load i32, ptr %99, align 8, !tbaa !39
  %101 = add i32 %100, 1
  %102 = zext i32 %101 to i64
  %103 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 3
  %104 = call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %103) #4
  %105 = urem i64 %102, %104
  %106 = trunc i64 %105 to i32
  %107 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 5
  store i32 %106, ptr %107, align 8, !tbaa !39
  %108 = load i32, ptr %4, align 4, !tbaa !32
  %109 = add i32 %108, 1
  store i32 %109, ptr %4, align 4, !tbaa !32
  br label %52, !llvm.loop !42

110:                                              ; preds = %61
  %111 = load i8, ptr %3, align 1, !tbaa !30, !range !37, !noundef !38
  %112 = trunc i8 %111 to i1
  br i1 %112, label %113, label %122

113:                                              ; preds = %110
  %114 = getelementptr inbounds %class.CollectionBusLine, ptr %12, i32 0, i32 4
  %115 = load ptr, ptr %114, align 8, !tbaa !43
  invoke void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %11, ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %116 unwind label %90

116:                                              ; preds = %113
  invoke void @_ZN10Connection4sendESt6vectorIP11DataPackageSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(64) %115, ptr noundef %11)
          to label %117 unwind label %118

117:                                              ; preds = %116
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  br label %122

118:                                              ; preds = %116
  %119 = landingpad { ptr, i32 }
          cleanup
  %120 = extractvalue { ptr, i32 } %119, 0
  store ptr %120, ptr %8, align 8
  %121 = extractvalue { ptr, i32 } %119, 1
  store i32 %121, ptr %9, align 4
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  br label %123

122:                                              ; preds = %117, %110
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  ret void

123:                                              ; preds = %118, %94, %90
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  br label %124

124:                                              ; preds = %123
  %125 = load ptr, ptr %8, align 8
  %126 = load i32, ptr %9, align 4
  %127 = insertvalue { ptr, i32 } poison, ptr %125, 0
  %128 = insertvalue { ptr, i32 } %127, i32 %126, 1
  resume { ptr, i32 } %128
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) #3

declare void @_ZN11DataPackage13setOutputPortEj(ptr noundef nonnull align 8 dereferenceable(64), i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

declare void @_ZN10Connection4sendESt6vectorIP11DataPackageSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 128}
!10 = !{!"_ZTS17CollectionBusLine", !11, i64 0, !12, i64 48, !16, i64 56, !20, i64 80, !6, i64 104, !12, i64 112, !12, i64 116, !24, i64 120}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTS22CollectionBusLineStats", !25, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !26, i64 24}
!25 = !{!"_ZTS5Stats"}
!26 = !{!"_ZTSSt6vectorIjSaIjEE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!30 = !{!31, !31, i64 0}
!31 = !{!"bool", !7, i64 0}
!32 = !{!12, !12, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!10, !12, i64 136}
!36 = !{!10, !12, i64 132}
!37 = !{i8 0, i8 2}
!38 = !{}
!39 = !{!10, !12, i64 112}
!40 = !{!10, !12, i64 116}
!41 = !{!10, !12, i64 140}
!42 = distinct !{!42, !34}
!43 = !{!10, !6, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17CollectionBusLine7receiveEv(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17CollectionBusLine5cycleEv(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.std::vector.13", align 8
  %3 = alloca ptr, align 8
  %4 = alloca %"class.std::vector.13", align 8
  %5 = getelementptr inbounds i8, ptr %0, i64 128
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = add i32 %6, 1
  store i32 %7, ptr %5, align 8, !tbaa !5
  tail call void @_ZN17CollectionBusLine7receiveEv(ptr noundef nonnull align 8 dereferenceable(168) %0)
  %8 = getelementptr inbounds i8, ptr %0, i64 80
  %9 = tail call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %._crit_edge.thread, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph
  %10 = getelementptr inbounds i8, ptr %0, i64 136
  %11 = load i32, ptr %10, align 8, !tbaa !29
  %12 = add i32 %11, %spec.select
  store i32 %12, ptr %10, align 8, !tbaa !29
  %13 = icmp ugt i32 %spec.select, 1
  br i1 %13, label %20, label %._crit_edge.thread

.lr.ph:                                           ; preds = %1, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %1 ]
  %.01421 = phi i32 [ %spec.select, %.lr.ph ], [ 0, %1 ]
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv) #4
  %15 = load ptr, ptr %14, align 8, !tbaa !30
  %16 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %15)
  %not. = xor i1 %16, true
  %17 = zext i1 %not. to i32
  %spec.select = add i32 %.01421, %17
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %18 = tail call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %19 = icmp ugt i64 %18, %indvars.iv.next
  br i1 %19, label %.lr.ph, label %._crit_edge, !llvm.loop !31

20:                                               ; preds = %._crit_edge
  %21 = getelementptr inbounds i8, ptr %0, i64 132
  %22 = load i32, ptr %21, align 4, !tbaa !33
  %23 = add i32 %22, 1
  store i32 %23, ptr %21, align 4, !tbaa !33
  br label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %1, %20, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %24 = getelementptr inbounds i8, ptr %0, i64 112
  %25 = getelementptr inbounds i8, ptr %0, i64 116
  %26 = getelementptr inbounds i8, ptr %0, i64 140
  br label %27

27:                                               ; preds = %._crit_edge.thread, %52
  %.01525 = phi i32 [ 0, %._crit_edge.thread ], [ %59, %52 ]
  %28 = zext i32 %.01525 to i64
  %29 = call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %30 = icmp ugt i64 %29, %28
  br i1 %30, label %31, label %.critedge

31:                                               ; preds = %27
  %32 = load i32, ptr %24, align 8, !tbaa !34
  %33 = zext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %33) #4
  %35 = load ptr, ptr %34, align 8, !tbaa !30
  %36 = invoke noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %35)
          to label %37 unwind label %.loopexit

37:                                               ; preds = %31
  br i1 %36, label %52, label %38

38:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %39 = load i32, ptr %24, align 8, !tbaa !34
  %40 = zext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP4FifoSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %40) #4
  %42 = load ptr, ptr %41, align 8, !tbaa !30
  %43 = invoke noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %42)
          to label %44 unwind label %50

44:                                               ; preds = %38
  store ptr %43, ptr %3, align 8, !tbaa !30
  %45 = load i32, ptr %25, align 4, !tbaa !35
  invoke void @_ZN11DataPackage13setOutputPortEj(ptr noundef nonnull align 8 dereferenceable(64) %43, i32 noundef %45)
          to label %46 unwind label %50

46:                                               ; preds = %44
  invoke void @_ZNSt6vectorIP11DataPackageSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %47 unwind label %50

47:                                               ; preds = %46
  %48 = load i32, ptr %26, align 4, !tbaa !36
  %49 = add i32 %48, 1
  store i32 %49, ptr %26, align 4, !tbaa !36
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  br label %52

.loopexit:                                        ; preds = %31
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %66

.loopexit.split-lp:                               ; preds = %.critedge20
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %66

50:                                               ; preds = %46, %44, %38
  %51 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  br label %66

52:                                               ; preds = %47, %37
  %53 = load i32, ptr %24, align 8, !tbaa !34
  %54 = add i32 %53, 1
  %55 = zext i32 %54 to i64
  %56 = call noundef i64 @_ZNKSt6vectorIP4FifoSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %57 = urem i64 %55, %56
  %58 = trunc nuw i64 %57 to i32
  store i32 %58, ptr %24, align 8, !tbaa !34
  %59 = add i32 %.01525, 1
  br i1 %36, label %27, label %.critedge20, !llvm.loop !37

.critedge20:                                      ; preds = %52
  %60 = getelementptr inbounds i8, ptr %0, i64 104
  %61 = load ptr, ptr %60, align 8, !tbaa !38
  invoke void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %2)
          to label %62 unwind label %.loopexit.split-lp

62:                                               ; preds = %.critedge20
  invoke void @_ZN10Connection4sendESt6vectorIP11DataPackageSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(64) %61, ptr noundef nonnull %4)
          to label %63 unwind label %64

63:                                               ; preds = %62
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  br label %.critedge

64:                                               ; preds = %62
  %65 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  br label %66

.critedge:                                        ; preds = %27, %63
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
  ret void

66:                                               ; preds = %.loopexit, %.loopexit.split-lp, %64, %50
  %.pn = phi { ptr, i32 } [ %65, %64 ], [ %51, %50 ], [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  call void @_ZNSt6vectorIP11DataPackageSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
  resume { ptr, i32 } %.pn
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #3

declare void @_ZN11DataPackage13setOutputPortEj(ptr noundef nonnull align 8 dereferenceable(64), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

declare void @_ZN10Connection4sendESt6vectorIP11DataPackageSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP11DataPackageSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 128}
!6 = !{!"_ZTS17CollectionBusLine", !7, i64 0, !8, i64 48, !15, i64 56, !19, i64 80, !13, i64 104, !8, i64 112, !8, i64 116, !23, i64 120}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!23 = !{!"_ZTS22CollectionBusLineStats", !24, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !25, i64 24}
!24 = !{!"_ZTS5Stats"}
!25 = !{!"_ZTSSt6vectorIjSaIjEE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!29 = !{!6, !8, i64 136}
!30 = !{!13, !13, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!6, !8, i64 132}
!34 = !{!6, !8, i64 112}
!35 = !{!6, !8, i64 116}
!36 = !{!6, !8, i64 140}
!37 = distinct !{!37, !32}
!38 = !{!6, !13, i64 104}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass