; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src (ASwitch)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ASwitch = type { %class.Unit, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i8, i32, i32, i8, i8, i8, i32, [4 x i8], %class.ASwitchStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ASwitchStats = type <{ %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8] }>
%class.Stats = type { ptr }

@.str.1 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_ = external hidden unnamed_addr constant [81 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_(ptr noundef nonnull align 8 dereferenceable(288) %0, ptr noundef %1, ptr noundef %2) #4 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca float, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %11 = load ptr, ptr %4, align 8
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = call noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %12)
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = call noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %14)
  %16 = icmp eq i32 %13, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %3
  br label %20

18:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.1, i32 noundef 315, ptr noundef @__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_) #7
  unreachable

19:                                               ; No predecessors!
  br label %20

20:                                               ; preds = %19, %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #8
  %21 = getelementptr inbounds %class.ASwitch, ptr %11, i32 0, i32 28
  %22 = load i32, ptr %21, align 8, !tbaa !9
  switch i32 %22, label %51 [
    i32 0, label %23
    i32 1, label %33
  ]

23:                                               ; preds = %20
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %24)
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %26)
  %28 = fadd float %25, %27
  store float %28, ptr %7, align 4, !tbaa !26
  %29 = getelementptr inbounds %class.ASwitch, ptr %11, i32 0, i32 34
  %30 = getelementptr inbounds %class.ASwitchStats, ptr %29, i32 0, i32 2
  %31 = load i32, ptr %30, align 4, !tbaa !28
  %32 = add i32 %31, 1
  store i32 %32, ptr %30, align 4, !tbaa !28
  br label %52

33:                                               ; preds = %20
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %34)
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %36)
  %38 = fcmp ogt float %35, %37
  br i1 %38, label %39, label %42

39:                                               ; preds = %33
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %40)
  br label %45

42:                                               ; preds = %33
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %43)
  br label %45

45:                                               ; preds = %42, %39
  %46 = phi float [ %41, %39 ], [ %44, %42 ]
  store float %46, ptr %7, align 4, !tbaa !26
  %47 = getelementptr inbounds %class.ASwitch, ptr %11, i32 0, i32 34
  %48 = getelementptr inbounds %class.ASwitchStats, ptr %47, i32 0, i32 3
  %49 = load i32, ptr %48, align 8, !tbaa !29
  %50 = add i32 %49, 1
  store i32 %50, ptr %48, align 8, !tbaa !29
  br label %52

51:                                               ; preds = %20
  call void @__assert_fail(ptr noundef @.str.5, ptr noundef @.str.1, i32 noundef 333, ptr noundef @__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_) #7
  unreachable

52:                                               ; preds = %45, %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  %53 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 64) #9
  %54 = load float, ptr %7, align 4, !tbaa !26
  %55 = getelementptr inbounds %class.ASwitch, ptr %11, i32 0, i32 1
  %56 = load i32, ptr %55, align 8, !tbaa !30
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = invoke noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %57)
          to label %59 unwind label %64

59:                                               ; preds = %52
  %60 = getelementptr inbounds %class.ASwitch, ptr %11, i32 0, i32 28
  %61 = load i32, ptr %60, align 8, !tbaa !9
  invoke void @_ZN11DataPackageC1Emf9operand_tjj16adderoperation_t(ptr noundef nonnull align 8 dereferenceable(64) %53, i64 noundef 4, float noundef %54, i32 noundef 3, i32 noundef %56, i32 noundef %58, i32 noundef %61)
          to label %62 unwind label %64

62:                                               ; preds = %59
  store ptr %53, ptr %8, align 8, !tbaa !5
  %63 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #8
  ret ptr %63

64:                                               ; preds = %59, %52
  %65 = landingpad { ptr, i32 }
          cleanup
  %66 = extractvalue { ptr, i32 } %65, 0
  store ptr %66, ptr %9, align 8
  %67 = extractvalue { ptr, i32 } %65, 1
  store i32 %67, ptr %10, align 4
  call void @_ZdlPvm(ptr noundef %53, i64 noundef 64) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #8
  br label %68

68:                                               ; preds = %64
  %69 = load ptr, ptr %9, align 8
  %70 = load i32, ptr %10, align 4
  %71 = insertvalue { ptr, i32 } poison, ptr %69, 0
  %72 = insertvalue { ptr, i32 } %71, i32 %70, 1
  resume { ptr, i32 } %72
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64)) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64)) #5 align 2

declare void @_ZN11DataPackageC1Emf9operand_tjj16adderoperation_t(ptr noundef nonnull align 8 dereferenceable(64), i64 noundef, float noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #6

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !23, i64 224}
!10 = !{!"_ZTS7ASwitch", !11, i64 0, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !16, i64 136, !12, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !12, i64 208, !20, i64 212, !21, i64 216, !22, i64 220, !23, i64 224, !21, i64 228, !21, i64 229, !21, i64 230, !12, i64 232, !24, i64 240}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTS4fl_t", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!23 = !{!"_ZTS16adderoperation_t", !7, i64 0}
!24 = !{!"_ZTS12ASwitchStats", !25, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!25 = !{!"_ZTS5Stats"}
!26 = !{!27, !27, i64 0}
!27 = !{!"float", !7, i64 0}
!28 = !{!10, !12, i64 252}
!29 = !{!10, !12, i64 256}
!30 = !{!10, !12, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_ = external hidden unnamed_addr constant [81 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull ptr @_ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_(ptr nocapture noundef nonnull align 8 dereferenceable(288) %0, ptr noundef nonnull %1, ptr noundef %2) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %4 = tail call noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %1)
  %5 = tail call noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %2)
  %6 = icmp eq i32 %4, %5
  br i1 %6, label %8, label %7

7:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.1, i32 noundef 315, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_) #6
  unreachable

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 224
  %10 = load i32, ptr %9, align 8, !tbaa !5
  switch i32 %10, label %26 [
    i32 0, label %11
    i32 1, label %18
  ]

11:                                               ; preds = %8
  %12 = tail call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %1)
  %13 = tail call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %2)
  %14 = fadd float %12, %13
  %15 = getelementptr inbounds i8, ptr %0, i64 252
  %16 = load i32, ptr %15, align 4, !tbaa !25
  %17 = add i32 %16, 1
  store i32 %17, ptr %15, align 4, !tbaa !25
  br label %27

18:                                               ; preds = %8
  %19 = tail call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %1)
  %20 = tail call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %2)
  %21 = fcmp ogt float %19, %20
  %. = select i1 %21, ptr %1, ptr %2
  %22 = tail call noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64) %.)
  %23 = getelementptr inbounds i8, ptr %0, i64 256
  %24 = load i32, ptr %23, align 8, !tbaa !26
  %25 = add i32 %24, 1
  store i32 %25, ptr %23, align 8, !tbaa !26
  br label %27

26:                                               ; preds = %8
  tail call void @__assert_fail(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.1, i32 noundef 333, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7ASwitch28perform_operation_2_operandsEP11DataPackageS1_) #6
  unreachable

27:                                               ; preds = %18, %11
  %.0 = phi float [ %22, %18 ], [ %14, %11 ]
  %28 = tail call noalias noundef nonnull dereferenceable(64) ptr @_Znwm(i64 noundef 64) #7
  %29 = getelementptr inbounds i8, ptr %0, i64 48
  %30 = load i32, ptr %29, align 8, !tbaa !27
  %31 = tail call noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64) %1)
  %32 = load i32, ptr %9, align 8, !tbaa !5
  invoke void @_ZN11DataPackageC1Emf9operand_tjj16adderoperation_t(ptr noundef nonnull align 8 dereferenceable(64) %28, i64 noundef 4, float noundef %.0, i32 noundef 3, i32 noundef %30, i32 noundef %31, i32 noundef %32)
          to label %33 unwind label %34

33:                                               ; preds = %27
  ret ptr %28

34:                                               ; preds = %27
  %35 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %28, i64 noundef 64) #8
  resume { ptr, i32 } %35
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK11DataPackage6get_vnEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK11DataPackage8get_dataEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #4 align 2

declare void @_ZN11DataPackageC1Emf9operand_tjj16adderoperation_t(ptr noundef nonnull align 8 dereferenceable(64), i64 noundef, float noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #5

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !22, i64 224}
!6 = !{!"_ZTS7ASwitch", !7, i64 0, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60, !8, i64 64, !8, i64 68, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !8, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !15, i64 136, !8, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !8, i64 208, !19, i64 212, !20, i64 216, !21, i64 220, !22, i64 224, !20, i64 228, !20, i64 229, !20, i64 230, !8, i64 232, !23, i64 240}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!"_ZTS4fl_t", !9, i64 0}
!20 = !{!"bool", !9, i64 0}
!21 = !{!"_ZTS13adderconfig_t", !9, i64 0}
!22 = !{!"_ZTS16adderoperation_t", !9, i64 0}
!23 = !{!"_ZTS12ASwitchStats", !24, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40}
!24 = !{!"_ZTS5Stats"}
!25 = !{!6, !8, i64 252}
!26 = !{!6, !8, i64 256}
!27 = !{!6, !8, i64 48}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass