; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Suspend)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__DMA2D_HandleTypeDef = type { ptr, %struct.DMA2D_InitTypeDef, ptr, ptr, [2 x %struct.DMA2D_LayerCfgTypeDef], i32, i32, i32 }
%struct.DMA2D_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.DMA2D_LayerCfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.DMA2D_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [236 x i32], [256 x i32], [256 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_DMA2D_CLUTLoading_Suspend(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !11
  %13 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %12, i32 0, i32 9
  store ptr %13, ptr %8, align 8, !tbaa !5
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %14, i32 0, i32 0
  %16 = load ptr, ptr %15, align 8, !tbaa !11
  %17 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %16, i32 0, i32 0
  %18 = load volatile i32, ptr %17, align 4, !tbaa !14
  %19 = zext i32 %18 to i64
  %20 = or i64 %19, 2
  %21 = trunc i64 %20 to i32
  store volatile i32 %21, ptr %17, align 4, !tbaa !14
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %29

24:                                               ; preds = %2
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !11
  %28 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %27, i32 0, i32 7
  store ptr %28, ptr %8, align 8, !tbaa !5
  br label %29

29:                                               ; preds = %24, %2
  %30 = call i32 @HAL_GetTick()
  store i32 %30, ptr %6, align 4, !tbaa !9
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %31, i32 0, i32 0
  %33 = load ptr, ptr %32, align 8, !tbaa !11
  %34 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %33, i32 0, i32 0
  %35 = load volatile i32, ptr %34, align 4, !tbaa !14
  %36 = zext i32 %35 to i64
  %37 = and i64 %36, 2
  %38 = icmp eq i64 %37, 2
  %39 = zext i1 %38 to i64
  %40 = select i1 %38, i64 1, i64 0
  %41 = trunc i64 %40 to i32
  store i32 %41, ptr %7, align 4, !tbaa !9
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = load volatile i32, ptr %42, align 4, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = and i64 %44, 32
  %46 = icmp ne i64 %45, 32
  %47 = zext i1 %46 to i64
  %48 = select i1 %46, i64 1, i64 0
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = or i64 %50, %48
  %52 = trunc i64 %51 to i32
  store i32 %52, ptr %7, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %69, %29
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = zext i32 %54 to i64
  %56 = icmp eq i64 %55, 0
  br i1 %56, label %57, label %92

57:                                               ; preds = %53
  %58 = call i32 @HAL_GetTick()
  %59 = load i32, ptr %6, align 4, !tbaa !9
  %60 = sub i32 %58, %59
  %61 = icmp ugt i32 %60, 1000
  br i1 %61, label %62, label %69

62:                                               ; preds = %57
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %63, i32 0, i32 7
  %65 = load volatile i32, ptr %64, align 8, !tbaa !16
  %66 = or i32 %65, 32
  store volatile i32 %66, ptr %64, align 8, !tbaa !16
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %67, i32 0, i32 6
  store volatile i32 3, ptr %68, align 4, !tbaa !17
  store i32 3, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

69:                                               ; preds = %57
  %70 = load ptr, ptr %4, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !11
  %73 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %72, i32 0, i32 0
  %74 = load volatile i32, ptr %73, align 4, !tbaa !14
  %75 = zext i32 %74 to i64
  %76 = and i64 %75, 2
  %77 = icmp eq i64 %76, 2
  %78 = zext i1 %77 to i64
  %79 = select i1 %77, i64 1, i64 0
  %80 = trunc i64 %79 to i32
  store i32 %80, ptr %7, align 4, !tbaa !9
  %81 = load ptr, ptr %8, align 8, !tbaa !5
  %82 = load volatile i32, ptr %81, align 4, !tbaa !9
  %83 = zext i32 %82 to i64
  %84 = and i64 %83, 32
  %85 = icmp ne i64 %84, 32
  %86 = zext i1 %85 to i64
  %87 = select i1 %85, i64 1, i64 0
  %88 = load i32, ptr %7, align 4, !tbaa !9
  %89 = zext i32 %88 to i64
  %90 = or i64 %89, %87
  %91 = trunc i64 %90 to i32
  store i32 %91, ptr %7, align 4, !tbaa !9
  br label %53, !llvm.loop !18

92:                                               ; preds = %53
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  %94 = load volatile i32, ptr %93, align 4, !tbaa !9
  %95 = zext i32 %94 to i64
  %96 = and i64 %95, 32
  %97 = icmp ne i64 %96, 0
  br i1 %97, label %98, label %101

98:                                               ; preds = %92
  %99 = load ptr, ptr %4, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %99, i32 0, i32 6
  store volatile i32 5, ptr %100, align 4, !tbaa !17
  br label %110

101:                                              ; preds = %92
  %102 = load ptr, ptr %4, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__DMA2D_HandleTypeDef, ptr %102, i32 0, i32 0
  %104 = load ptr, ptr %103, align 8, !tbaa !11
  %105 = getelementptr inbounds %struct.DMA2D_TypeDef, ptr %104, i32 0, i32 0
  %106 = load volatile i32, ptr %105, align 4, !tbaa !14
  %107 = zext i32 %106 to i64
  %108 = and i64 %107, -3
  %109 = trunc i64 %108 to i32
  store volatile i32 %109, ptr %105, align 4, !tbaa !14
  br label %110

110:                                              ; preds = %101, %98
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

111:                                              ; preds = %110, %62
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %112 = load i32, ptr %3, align 4
  ret i32 %112
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"__DMA2D_HandleTypeDef", !6, i64 0, !13, i64 8, !6, i64 32, !6, i64 40, !7, i64 48, !10, i64 104, !10, i64 108, !10, i64 112}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !7, i64 80, !7, i64 1024, !7, i64 2048}
!16 = !{!12, !10, i64 112}
!17 = !{!12, !10, i64 108}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_DMA2D_CLUTLoading_Suspend(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = load volatile i32, ptr %3, align 4, !tbaa !12
  %5 = or i32 %4, 2
  store volatile i32 %5, ptr %3, align 4, !tbaa !12
  %6 = icmp eq i32 %1, 1
  %spec.select.v = select i1 %6, i64 28, i64 36
  %spec.select = getelementptr inbounds i8, ptr %3, i64 %spec.select.v
  %7 = tail call i32 @HAL_GetTick() #2
  %8 = load ptr, ptr %0, align 8, !tbaa !5
  %9 = load volatile i32, ptr %8, align 4, !tbaa !12
  %10 = lshr i32 %9, 1
  %.lobit = and i32 %10, 1
  %11 = load volatile i32, ptr %spec.select, align 4, !tbaa !14
  %12 = lshr i32 %11, 5
  %.lobit19 = and i32 %12, 1
  %13 = xor i32 %.lobit19, 1
  %14 = or i32 %13, %.lobit
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2, %24
  %16 = tail call i32 @HAL_GetTick() #2
  %17 = sub i32 %16, %7
  %18 = icmp ugt i32 %17, 1000
  br i1 %18, label %19, label %24

19:                                               ; preds = %.lr.ph
  %20 = getelementptr inbounds i8, ptr %0, i64 112
  %21 = load volatile i32, ptr %20, align 8, !tbaa !15
  %22 = or i32 %21, 32
  store volatile i32 %22, ptr %20, align 8, !tbaa !15
  %23 = getelementptr inbounds i8, ptr %0, i64 108
  store volatile i32 3, ptr %23, align 4, !tbaa !16
  br label %41

24:                                               ; preds = %.lr.ph
  %25 = load ptr, ptr %0, align 8, !tbaa !5
  %26 = load volatile i32, ptr %25, align 4, !tbaa !12
  %27 = lshr i32 %26, 1
  %.lobit21 = and i32 %27, 1
  %28 = load volatile i32, ptr %spec.select, align 4, !tbaa !14
  %29 = lshr i32 %28, 5
  %.lobit23 = and i32 %29, 1
  %30 = xor i32 %.lobit23, 1
  %31 = or i32 %30, %.lobit21
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %.lr.ph, label %._crit_edge, !llvm.loop !17

._crit_edge:                                      ; preds = %24, %2
  %33 = phi ptr [ %8, %2 ], [ %25, %24 ]
  %34 = load volatile i32, ptr %spec.select, align 4, !tbaa !14
  %35 = and i32 %34, 32
  %.not = icmp eq i32 %35, 0
  br i1 %.not, label %38, label %36

36:                                               ; preds = %._crit_edge
  %37 = getelementptr inbounds i8, ptr %0, i64 108
  store volatile i32 5, ptr %37, align 4, !tbaa !16
  br label %41

38:                                               ; preds = %._crit_edge
  %39 = load volatile i32, ptr %33, align 4, !tbaa !12
  %40 = and i32 %39, -3
  store volatile i32 %40, ptr %33, align 4, !tbaa !12
  br label %41

41:                                               ; preds = %36, %38, %19
  %.018 = phi i32 [ 3, %19 ], [ 0, %38 ], [ 0, %36 ]
  ret i32 %.018
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__DMA2D_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 32, !7, i64 40, !8, i64 48, !11, i64 104, !11, i64 108, !11, i64 112}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !8, i64 80, !8, i64 1024, !8, i64 2048}
!14 = !{!11, !11, i64 0}
!15 = !{!6, !11, i64 112}
!16 = !{!6, !11, i64 108}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass