; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/1698 （线段树）成段替换.ll (Z6updateiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sum = external dso_local global [400040 x i32], align 16
@col = external dso_local global [400040 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6pushupi(i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8pushdownii(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  store i32 %5, ptr %12, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %10, align 4, !tbaa !5
  %17 = icmp sle i32 %15, %16
  br i1 %17, label %18, label %36

18:                                               ; preds = %6
  %19 = load i32, ptr %11, align 4, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %36

22:                                               ; preds = %18
  %23 = load i32, ptr %9, align 4, !tbaa !5
  %24 = load i32, ptr %12, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [400040 x i32], ptr @col, i64 0, i64 %25
  store i32 %23, ptr %26, align 4, !tbaa !5
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = load i32, ptr %11, align 4, !tbaa !5
  %29 = load i32, ptr %10, align 4, !tbaa !5
  %30 = sub nsw i32 %28, %29
  %31 = add nsw i32 %30, 1
  %32 = mul nsw i32 %27, %31
  %33 = load i32, ptr %12, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [400040 x i32], ptr @sum, i64 0, i64 %34
  store i32 %32, ptr %35, align 4, !tbaa !5
  br label %73

36:                                               ; preds = %18, %6
  %37 = load i32, ptr %12, align 4, !tbaa !5
  %38 = load i32, ptr %11, align 4, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  %41 = add nsw i32 %40, 1
  call void @_Z8pushdownii(i32 noundef %37, i32 noundef %41)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = add nsw i32 %42, %43
  %45 = ashr i32 %44, 1
  store i32 %45, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = icmp sle i32 %46, %47
  br i1 %48, label %49, label %57

49:                                               ; preds = %36
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = load i32, ptr %10, align 4, !tbaa !5
  %54 = load i32, ptr %13, align 4, !tbaa !5
  %55 = load i32, ptr %12, align 4, !tbaa !5
  %56 = shl i32 %55, 1
  call void @_Z6updateiiiiii(i32 noundef %50, i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %56)
  br label %57

57:                                               ; preds = %49, %36
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load i32, ptr %13, align 4, !tbaa !5
  %60 = icmp sgt i32 %58, %59
  br i1 %60, label %61, label %71

61:                                               ; preds = %57
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = load i32, ptr %8, align 4, !tbaa !5
  %64 = load i32, ptr %9, align 4, !tbaa !5
  %65 = load i32, ptr %13, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  %67 = load i32, ptr %11, align 4, !tbaa !5
  %68 = load i32, ptr %12, align 4, !tbaa !5
  %69 = shl i32 %68, 1
  %70 = or i32 %69, 1
  call void @_Z6updateiiiiii(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %66, i32 noundef %67, i32 noundef %70)
  br label %71

71:                                               ; preds = %61, %57
  %72 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6pushupi(i32 noundef %72)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %73

73:                                               ; preds = %71, %22
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sum = external dso_local local_unnamed_addr global [400040 x i32], align 16
@col = external dso_local local_unnamed_addr global [400040 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6pushupi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8pushdownii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %.not = icmp sgt i32 %0, %3
  %.not36 = icmp sgt i32 %4, %1
  %or.cond = or i1 %.not, %.not36
  br i1 %or.cond, label %13, label %7

7:                                                ; preds = %6
  %8 = sext i32 %5 to i64
  %9 = getelementptr inbounds [400040 x i32], ptr @col, i64 0, i64 %8
  store i32 %2, ptr %9, align 4, !tbaa !5
  %reass.sub = sub i32 %4, %3
  %10 = add i32 %reass.sub, 1
  %11 = mul nsw i32 %10, %2
  %12 = getelementptr inbounds [400040 x i32], ptr @sum, i64 0, i64 %8
  store i32 %11, ptr %12, align 4, !tbaa !5
  br label %26

13:                                               ; preds = %6
  %reass.sub38 = sub i32 %4, %3
  %14 = add i32 %reass.sub38, 1
  tail call void @_Z8pushdownii(i32 noundef %5, i32 noundef %14)
  %15 = add nsw i32 %4, %3
  %16 = ashr i32 %15, 1
  %.not37 = icmp slt i32 %16, %0
  br i1 %.not37, label %19, label %17

17:                                               ; preds = %13
  %18 = shl i32 %5, 1
  tail call void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %16, i32 noundef %18)
  br label %19

19:                                               ; preds = %17, %13
  %20 = icmp slt i32 %16, %1
  br i1 %20, label %21, label %25

21:                                               ; preds = %19
  %22 = add nsw i32 %16, 1
  %23 = shl i32 %5, 1
  %24 = or disjoint i32 %23, 1
  tail call void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %22, i32 noundef %4, i32 noundef %24)
  br label %25

25:                                               ; preds = %21, %19
  tail call void @_Z6pushupi(i32 noundef %5)
  br label %26

26:                                               ; preds = %25, %7
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass