; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMAStop)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SAI_HandleTypeDef = type { ptr, %struct.SAI_InitTypeDef, %struct.SAI_FrameInitTypeDef, %struct.SAI_SlotInitTypeDef, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SAI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.SAI_PdmInitTypeDef, i32, i32, i32, i32 }
%struct.SAI_PdmInitTypeDef = type { i32, i32, i32 }
%struct.SAI_FrameInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SAI_SlotInitTypeDef = type { i32, i32, i32, i32 }
%struct.SAI_Block_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_Disable(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SAI_DMAStop(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %1
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %7, i32 0, i32 11
  %9 = load i32, ptr %8, align 8, !tbaa !11
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %12

11:                                               ; preds = %6
  store i32 2, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %107

12:                                               ; preds = %6
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %13, i32 0, i32 11
  store i32 1, ptr %14, align 8, !tbaa !11
  br label %15

15:                                               ; preds = %12
  br label %16

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %18, i32 0, i32 0
  %20 = load ptr, ptr %19, align 8, !tbaa !18
  %21 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %20, i32 0, i32 0
  %22 = load volatile i32, ptr %21, align 4, !tbaa !19
  %23 = zext i32 %22 to i64
  %24 = and i64 %23, -131073
  %25 = trunc i64 %24 to i32
  store volatile i32 %25, ptr %21, align 4, !tbaa !19
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %26, i32 0, i32 12
  %28 = load volatile i32, ptr %27, align 4, !tbaa !21
  %29 = icmp eq i32 %28, 18
  br i1 %29, label %30, label %55

30:                                               ; preds = %17
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %31, i32 0, i32 7
  %33 = load ptr, ptr %32, align 8, !tbaa !22
  %34 = icmp ne ptr %33, null
  br i1 %34, label %35, label %55

35:                                               ; preds = %30
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %36, i32 0, i32 7
  %38 = load ptr, ptr %37, align 8, !tbaa !22
  %39 = call i32 @HAL_DMA_Abort(ptr noundef %38)
  %40 = icmp ne i32 %39, 0
  br i1 %40, label %41, label %54

41:                                               ; preds = %35
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %42, i32 0, i32 7
  %44 = load ptr, ptr %43, align 8, !tbaa !22
  %45 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %44, i32 0, i32 11
  %46 = load volatile i32, ptr %45, align 8, !tbaa !23
  %47 = icmp ne i32 %46, 128
  br i1 %47, label %48, label %53

48:                                               ; preds = %41
  store i32 1, ptr %4, align 4, !tbaa !9
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %49, i32 0, i32 13
  %51 = load volatile i32, ptr %50, align 8, !tbaa !26
  %52 = or i32 %51, 128
  store volatile i32 %52, ptr %50, align 8, !tbaa !26
  br label %53

53:                                               ; preds = %48, %41
  br label %54

54:                                               ; preds = %53, %35
  br label %55

55:                                               ; preds = %54, %30, %17
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %56, i32 0, i32 12
  %58 = load volatile i32, ptr %57, align 4, !tbaa !21
  %59 = icmp eq i32 %58, 34
  br i1 %59, label %60, label %85

60:                                               ; preds = %55
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %61, i32 0, i32 8
  %63 = load ptr, ptr %62, align 8, !tbaa !27
  %64 = icmp ne ptr %63, null
  br i1 %64, label %65, label %85

65:                                               ; preds = %60
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %66, i32 0, i32 8
  %68 = load ptr, ptr %67, align 8, !tbaa !27
  %69 = call i32 @HAL_DMA_Abort(ptr noundef %68)
  %70 = icmp ne i32 %69, 0
  br i1 %70, label %71, label %84

71:                                               ; preds = %65
  %72 = load ptr, ptr %3, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %72, i32 0, i32 8
  %74 = load ptr, ptr %73, align 8, !tbaa !27
  %75 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %74, i32 0, i32 11
  %76 = load volatile i32, ptr %75, align 8, !tbaa !23
  %77 = icmp ne i32 %76, 128
  br i1 %77, label %78, label %83

78:                                               ; preds = %71
  store i32 1, ptr %4, align 4, !tbaa !9
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %79, i32 0, i32 13
  %81 = load volatile i32, ptr %80, align 8, !tbaa !26
  %82 = or i32 %81, 128
  store volatile i32 %82, ptr %80, align 8, !tbaa !26
  br label %83

83:                                               ; preds = %78, %71
  br label %84

84:                                               ; preds = %83, %65
  br label %85

85:                                               ; preds = %84, %60, %55
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = call i32 @SAI_Disable(ptr noundef %86)
  %88 = icmp ne i32 %87, 0
  br i1 %88, label %89, label %90

89:                                               ; preds = %85
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %90

90:                                               ; preds = %89, %85
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %91, i32 0, i32 0
  %93 = load ptr, ptr %92, align 8, !tbaa !18
  %94 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %93, i32 0, i32 1
  %95 = load volatile i32, ptr %94, align 4, !tbaa !28
  %96 = zext i32 %95 to i64
  %97 = or i64 %96, 8
  %98 = trunc i64 %97 to i32
  store volatile i32 %98, ptr %94, align 4, !tbaa !28
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %99, i32 0, i32 12
  store volatile i32 1, ptr %100, align 4, !tbaa !21
  br label %101

101:                                              ; preds = %90
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %102, i32 0, i32 11
  store i32 0, ptr %103, align 8, !tbaa !11
  br label %104

104:                                              ; preds = %101
  br label %105

105:                                              ; preds = %104
  %106 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %106, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %107

107:                                              ; preds = %105, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %108 = load i32, ptr %2, align 4
  ret i32 %108
}

declare i32 @HAL_DMA_Abort(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 176}
!12 = !{!"__SAI_HandleTypeDef", !6, i64 0, !13, i64 8, !15, i64 88, !16, i64 108, !6, i64 128, !17, i64 136, !17, i64 138, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !10, i64 176, !10, i64 180, !10, i64 184}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !14, i64 52, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!17 = !{!"short", !7, i64 0}
!18 = !{!12, !6, i64 0}
!19 = !{!20, !10, i64 0}
!20 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!21 = !{!12, !10, i64 180}
!22 = !{!12, !6, i64 144}
!23 = !{!24, !10, i64 120}
!24 = !{!"__DMA_HandleTypeDef", !6, i64 0, !25, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!25 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!26 = !{!12, !10, i64 184}
!27 = !{!12, !6, i64 152}
!28 = !{!20, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_Disable(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SAI_DMAStop(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 176
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %4 = icmp eq i32 %3, 1
  br i1 %4, label %47, label %5

5:                                                ; preds = %1
  store i32 1, ptr %2, align 8, !tbaa !5
  %6 = load ptr, ptr %0, align 8, !tbaa !16
  %7 = load volatile i32, ptr %6, align 4, !tbaa !17
  %8 = and i32 %7, -131073
  store volatile i32 %8, ptr %6, align 4, !tbaa !17
  %9 = getelementptr inbounds i8, ptr %0, i64 180
  %10 = load volatile i32, ptr %9, align 4, !tbaa !19
  %11 = icmp eq i32 %10, 18
  br i1 %11, label %12, label %25

12:                                               ; preds = %5
  %13 = getelementptr inbounds i8, ptr %0, i64 144
  %14 = load ptr, ptr %13, align 8, !tbaa !20
  %.not = icmp eq ptr %14, null
  br i1 %.not, label %25, label %15

15:                                               ; preds = %12
  %16 = tail call i32 @HAL_DMA_Abort(ptr noundef nonnull %14) #2
  %.not21 = icmp eq i32 %16, 0
  br i1 %.not21, label %25, label %17

17:                                               ; preds = %15
  %18 = load ptr, ptr %13, align 8, !tbaa !20
  %19 = getelementptr inbounds i8, ptr %18, i64 120
  %20 = load volatile i32, ptr %19, align 8, !tbaa !21
  %.not22 = icmp eq i32 %20, 128
  br i1 %.not22, label %25, label %21

21:                                               ; preds = %17
  %22 = getelementptr inbounds i8, ptr %0, i64 184
  %23 = load volatile i32, ptr %22, align 8, !tbaa !24
  %24 = or i32 %23, 128
  store volatile i32 %24, ptr %22, align 8, !tbaa !24
  br label %25

25:                                               ; preds = %15, %21, %17, %12, %5
  %.0 = phi i32 [ 1, %21 ], [ 0, %17 ], [ 0, %15 ], [ 0, %12 ], [ 0, %5 ]
  %26 = load volatile i32, ptr %9, align 4, !tbaa !19
  %27 = icmp eq i32 %26, 34
  br i1 %27, label %28, label %41

28:                                               ; preds = %25
  %29 = getelementptr inbounds i8, ptr %0, i64 152
  %30 = load ptr, ptr %29, align 8, !tbaa !25
  %.not23 = icmp eq ptr %30, null
  br i1 %.not23, label %41, label %31

31:                                               ; preds = %28
  %32 = tail call i32 @HAL_DMA_Abort(ptr noundef nonnull %30) #2
  %.not24 = icmp eq i32 %32, 0
  br i1 %.not24, label %41, label %33

33:                                               ; preds = %31
  %34 = load ptr, ptr %29, align 8, !tbaa !25
  %35 = getelementptr inbounds i8, ptr %34, i64 120
  %36 = load volatile i32, ptr %35, align 8, !tbaa !21
  %.not25 = icmp eq i32 %36, 128
  br i1 %.not25, label %41, label %37

37:                                               ; preds = %33
  %38 = getelementptr inbounds i8, ptr %0, i64 184
  %39 = load volatile i32, ptr %38, align 8, !tbaa !24
  %40 = or i32 %39, 128
  store volatile i32 %40, ptr %38, align 8, !tbaa !24
  br label %41

41:                                               ; preds = %31, %37, %33, %28, %25
  %.1 = phi i32 [ 1, %37 ], [ %.0, %33 ], [ %.0, %31 ], [ %.0, %28 ], [ %.0, %25 ]
  %42 = tail call i32 @SAI_Disable(ptr noundef nonnull %0)
  %.not26 = icmp eq i32 %42, 0
  %spec.select = select i1 %.not26, i32 %.1, i32 1
  %43 = load ptr, ptr %0, align 8, !tbaa !16
  %44 = getelementptr inbounds i8, ptr %43, i64 4
  %45 = load volatile i32, ptr %44, align 4, !tbaa !26
  %46 = or i32 %45, 8
  store volatile i32 %46, ptr %44, align 4, !tbaa !26
  store volatile i32 1, ptr %9, align 4, !tbaa !19
  store i32 0, ptr %2, align 8, !tbaa !5
  br label %47

47:                                               ; preds = %1, %41
  %.018 = phi i32 [ %spec.select, %41 ], [ 2, %1 ]
  ret i32 %.018
}

declare i32 @HAL_DMA_Abort(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 176}
!6 = !{!"__SAI_HandleTypeDef", !7, i64 0, !10, i64 8, !13, i64 88, !14, i64 108, !7, i64 128, !15, i64 136, !15, i64 138, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !11, i64 176, !11, i64 180, !11, i64 184}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!19 = !{!6, !11, i64 180}
!20 = !{!6, !7, i64 144}
!21 = !{!22, !11, i64 120}
!22 = !{!"__DMA_HandleTypeDef", !7, i64 0, !23, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!23 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!24 = !{!6, !11, i64 184}
!25 = !{!6, !7, i64 152}
!26 = !{!18, !11, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass