; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Start)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ADC_HandleTypeDef = type { ptr, %struct.ADC_InitTypeDef, ptr, i32, i32, i32, %struct.ADC_InjectionConfigTypeDef }
%struct.ADC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.ADC_OversamplingTypeDef }
%struct.ADC_OversamplingTypeDef = type { i32, i32, i32, i32 }
%struct.ADC_InjectionConfigTypeDef = type { i32, i32 }
%struct.ADC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADC_Start(ptr noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %8, i32 0, i32 0
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = icmp eq ptr %10, inttoptr (i64 1073881088 to ptr)
  br i1 %11, label %17, label %12

12:                                               ; preds = %1
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %13, i32 0, i32 0
  %15 = load ptr, ptr %14, align 8, !tbaa !9
  %16 = icmp eq ptr %15, inttoptr (i64 1073881344 to ptr)
  br label %17

17:                                               ; preds = %12, %1
  %18 = phi i1 [ true, %1 ], [ %16, %12 ]
  %19 = zext i1 %18 to i64
  %20 = select i1 %18, ptr inttoptr (i64 1073881856 to ptr), ptr inttoptr (i64 1476551424 to ptr)
  %21 = call i32 @LL_ADC_GetMultimode(ptr noundef %20)
  store i32 %21, ptr %6, align 4, !tbaa !15
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %22, i32 0, i32 0
  %24 = load ptr, ptr %23, align 8, !tbaa !9
  %25 = call i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef %24)
  %26 = zext i32 %25 to i64
  %27 = icmp eq i64 %26, 0
  br i1 %27, label %28, label %199

28:                                               ; preds = %17
  br label %29

29:                                               ; preds = %28
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %30, i32 0, i32 3
  %32 = load i32, ptr %31, align 8, !tbaa !16
  %33 = icmp eq i32 %32, 1
  br i1 %33, label %34, label %35

34:                                               ; preds = %29
  store i32 2, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %202

35:                                               ; preds = %29
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %36, i32 0, i32 3
  store i32 1, ptr %37, align 8, !tbaa !16
  br label %38

38:                                               ; preds = %35
  br label %39

39:                                               ; preds = %38
  br label %40

40:                                               ; preds = %39
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = call i32 @ADC_Enable(ptr noundef %41)
  store i32 %42, ptr %4, align 4, !tbaa !15
  %43 = load i32, ptr %4, align 4, !tbaa !15
  %44 = icmp eq i32 %43, 0
  br i1 %44, label %45, label %192

45:                                               ; preds = %40
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %46, i32 0, i32 4
  %48 = load volatile i32, ptr %47, align 4, !tbaa !17
  %49 = zext i32 %48 to i64
  %50 = and i64 %49, -3586
  %51 = or i64 %50, 256
  %52 = trunc i64 %51 to i32
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %53, i32 0, i32 4
  store volatile i32 %52, ptr %54, align 4, !tbaa !17
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !9
  %58 = icmp eq ptr %57, inttoptr (i64 1073881344 to ptr)
  br i1 %58, label %59, label %60

59:                                               ; preds = %45
  br label %64

60:                                               ; preds = %45
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !9
  br label %64

64:                                               ; preds = %60, %59
  %65 = phi ptr [ inttoptr (i64 1073881088 to ptr), %59 ], [ %63, %60 ]
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %66, i32 0, i32 0
  %68 = load ptr, ptr %67, align 8, !tbaa !9
  %69 = icmp eq ptr %65, %68
  br i1 %69, label %74, label %70

70:                                               ; preds = %64
  %71 = load i32, ptr %6, align 4, !tbaa !15
  %72 = zext i32 %71 to i64
  %73 = icmp eq i64 %72, 0
  br i1 %73, label %74, label %81

74:                                               ; preds = %70, %64
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %75, i32 0, i32 4
  %77 = load volatile i32, ptr %76, align 4, !tbaa !17
  %78 = zext i32 %77 to i64
  %79 = and i64 %78, -1048577
  %80 = trunc i64 %79 to i32
  store volatile i32 %80, ptr %76, align 4, !tbaa !17
  br label %81

81:                                               ; preds = %74, %70
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %82, i32 0, i32 4
  %84 = load volatile i32, ptr %83, align 4, !tbaa !17
  %85 = zext i32 %84 to i64
  %86 = and i64 %85, 4096
  %87 = icmp eq i64 %86, 4096
  br i1 %87, label %88, label %93

88:                                               ; preds = %81
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %89, i32 0, i32 5
  %91 = load volatile i32, ptr %90, align 8, !tbaa !18
  %92 = and i32 %91, -7
  store volatile i32 %92, ptr %90, align 8, !tbaa !18
  br label %96

93:                                               ; preds = %81
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %94, i32 0, i32 5
  store volatile i32 0, ptr %95, align 8, !tbaa !18
  br label %96

96:                                               ; preds = %93, %88
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !9
  %100 = getelementptr inbounds %struct.ADC_TypeDef, ptr %99, i32 0, i32 0
  store volatile i32 28, ptr %100, align 4, !tbaa !19
  br label %101

101:                                              ; preds = %96
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %102, i32 0, i32 3
  store i32 0, ptr %103, align 8, !tbaa !16
  br label %104

104:                                              ; preds = %101
  br label %105

105:                                              ; preds = %104
  %106 = load ptr, ptr %3, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %106, i32 0, i32 0
  %108 = load ptr, ptr %107, align 8, !tbaa !9
  %109 = icmp eq ptr %108, inttoptr (i64 1073881344 to ptr)
  br i1 %109, label %110, label %111

110:                                              ; preds = %105
  br label %115

111:                                              ; preds = %105
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %112, i32 0, i32 0
  %114 = load ptr, ptr %113, align 8, !tbaa !9
  br label %115

115:                                              ; preds = %111, %110
  %116 = phi ptr [ inttoptr (i64 1073881088 to ptr), %110 ], [ %114, %111 ]
  %117 = load ptr, ptr %3, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %117, i32 0, i32 0
  %119 = load ptr, ptr %118, align 8, !tbaa !9
  %120 = icmp eq ptr %116, %119
  br i1 %120, label %133, label %121

121:                                              ; preds = %115
  %122 = load i32, ptr %6, align 4, !tbaa !15
  %123 = zext i32 %122 to i64
  %124 = icmp eq i64 %123, 0
  br i1 %124, label %133, label %125

125:                                              ; preds = %121
  %126 = load i32, ptr %6, align 4, !tbaa !15
  %127 = zext i32 %126 to i64
  %128 = icmp eq i64 %127, 5
  br i1 %128, label %133, label %129

129:                                              ; preds = %125
  %130 = load i32, ptr %6, align 4, !tbaa !15
  %131 = zext i32 %130 to i64
  %132 = icmp eq i64 %131, 9
  br i1 %132, label %133, label %156

133:                                              ; preds = %129, %125, %121, %115
  %134 = load ptr, ptr %3, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %134, i32 0, i32 0
  %136 = load ptr, ptr %135, align 8, !tbaa !9
  %137 = getelementptr inbounds %struct.ADC_TypeDef, ptr %136, i32 0, i32 3
  %138 = load volatile i32, ptr %137, align 4, !tbaa !21
  %139 = zext i32 %138 to i64
  %140 = and i64 %139, 33554432
  %141 = icmp ne i64 %140, 0
  br i1 %141, label %142, label %152

142:                                              ; preds = %133
  %143 = load ptr, ptr %3, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %143, i32 0, i32 4
  %145 = load volatile i32, ptr %144, align 4, !tbaa !17
  %146 = zext i32 %145 to i64
  %147 = and i64 %146, -8193
  %148 = or i64 %147, 4096
  %149 = trunc i64 %148 to i32
  %150 = load ptr, ptr %3, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %150, i32 0, i32 4
  store volatile i32 %149, ptr %151, align 4, !tbaa !17
  br label %152

152:                                              ; preds = %142, %133
  %153 = load ptr, ptr %3, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %153, i32 0, i32 0
  %155 = load ptr, ptr %154, align 8, !tbaa !9
  call void @LL_ADC_REG_StartConversion(ptr noundef %155)
  br label %191

156:                                              ; preds = %129
  %157 = load ptr, ptr %3, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %157, i32 0, i32 4
  %159 = load volatile i32, ptr %158, align 4, !tbaa !17
  %160 = zext i32 %159 to i64
  %161 = or i64 %160, 1048576
  %162 = trunc i64 %161 to i32
  store volatile i32 %162, ptr %158, align 4, !tbaa !17
  %163 = load ptr, ptr %3, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %163, i32 0, i32 0
  %165 = load ptr, ptr %164, align 8, !tbaa !9
  %166 = icmp eq ptr %165, inttoptr (i64 1073881344 to ptr)
  br i1 %166, label %167, label %168

167:                                              ; preds = %156
  br label %172

168:                                              ; preds = %156
  %169 = load ptr, ptr %3, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %169, i32 0, i32 0
  %171 = load ptr, ptr %170, align 8, !tbaa !9
  br label %172

172:                                              ; preds = %168, %167
  %173 = phi ptr [ inttoptr (i64 1073881088 to ptr), %167 ], [ %171, %168 ]
  store ptr %173, ptr %5, align 8, !tbaa !5
  %174 = load ptr, ptr %5, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.ADC_TypeDef, ptr %174, i32 0, i32 3
  %176 = load volatile i32, ptr %175, align 4, !tbaa !21
  %177 = zext i32 %176 to i64
  %178 = and i64 %177, 33554432
  %179 = icmp ne i64 %178, 0
  br i1 %179, label %180, label %190

180:                                              ; preds = %172
  %181 = load ptr, ptr %3, align 8, !tbaa !5
  %182 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %181, i32 0, i32 4
  %183 = load volatile i32, ptr %182, align 4, !tbaa !17
  %184 = zext i32 %183 to i64
  %185 = and i64 %184, -8193
  %186 = or i64 %185, 4096
  %187 = trunc i64 %186 to i32
  %188 = load ptr, ptr %3, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %188, i32 0, i32 4
  store volatile i32 %187, ptr %189, align 4, !tbaa !17
  br label %190

190:                                              ; preds = %180, %172
  br label %191

191:                                              ; preds = %190, %152
  br label %198

192:                                              ; preds = %40
  br label %193

193:                                              ; preds = %192
  %194 = load ptr, ptr %3, align 8, !tbaa !5
  %195 = getelementptr inbounds %struct.ADC_HandleTypeDef, ptr %194, i32 0, i32 3
  store i32 0, ptr %195, align 8, !tbaa !16
  br label %196

196:                                              ; preds = %193
  br label %197

197:                                              ; preds = %196
  br label %198

198:                                              ; preds = %197, %191
  br label %200

199:                                              ; preds = %17
  store i32 2, ptr %4, align 4, !tbaa !15
  br label %200

200:                                              ; preds = %199, %198
  %201 = load i32, ptr %4, align 4, !tbaa !15
  store i32 %201, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %202

202:                                              ; preds = %200, %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %203 = load i32, ptr %2, align 4
  ret i32 %203
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_GetMultimode(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_Enable(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StartConversion(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !6, i64 88, !12, i64 96, !12, i64 100, !12, i64 104, !14, i64 108}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !13, i64 60}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!14 = !{!"", !12, i64 0, !12, i64 4}
!15 = !{!12, !12, i64 0}
!16 = !{!10, !12, i64 96}
!17 = !{!10, !12, i64 100}
!18 = !{!10, !12, i64 104}
!19 = !{!20, !12, i64 0}
!20 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !7, i64 80, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !7, i64 112, !12, i64 128, !12, i64 132, !12, i64 136, !12, i64 140, !7, i64 144, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172, !12, i64 176, !12, i64 180, !12, i64 184, !12, i64 188, !12, i64 192, !12, i64 196, !12, i64 200}
!21 = !{!20, !12, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ADC_Start(ptr noundef %0) local_unnamed_addr #1 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = icmp eq ptr %2, inttoptr (i64 1073881088 to ptr)
  %4 = icmp eq ptr %2, inttoptr (i64 1073881344 to ptr)
  %spec.select = or i1 %3, %4
  %5 = select i1 %spec.select, ptr inttoptr (i64 1073881856 to ptr), ptr inttoptr (i64 1476551424 to ptr)
  %6 = tail call i32 @LL_ADC_GetMultimode(ptr noundef nonnull %5)
  %7 = load ptr, ptr %0, align 8, !tbaa !5
  %8 = tail call i32 @LL_ADC_REG_IsConversionOngoing(ptr noundef %7)
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %58

10:                                               ; preds = %1
  %11 = getelementptr inbounds i8, ptr %0, i64 96
  %12 = load i32, ptr %11, align 8, !tbaa !14
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %58, label %14

14:                                               ; preds = %10
  store i32 1, ptr %11, align 8, !tbaa !14
  %15 = tail call i32 @ADC_Enable(ptr noundef nonnull %0)
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %57

17:                                               ; preds = %14
  %18 = getelementptr inbounds i8, ptr %0, i64 100
  %19 = load volatile i32, ptr %18, align 4, !tbaa !15
  %20 = and i32 %19, -3842
  %21 = or disjoint i32 %20, 256
  store volatile i32 %21, ptr %18, align 4, !tbaa !15
  %22 = load ptr, ptr %0, align 8, !tbaa !5
  %23 = icmp eq ptr %22, inttoptr (i64 1073881344 to ptr)
  %spec.select56 = select i1 %23, ptr inttoptr (i64 1073881088 to ptr), ptr %22
  %24 = icmp eq ptr %spec.select56, %22
  %25 = freeze i1 %24
  %26 = icmp eq i32 %6, 0
  %or.cond = select i1 %25, i1 true, i1 %26
  br i1 %or.cond, label %27, label %30

27:                                               ; preds = %17
  %28 = load volatile i32, ptr %18, align 4, !tbaa !15
  %29 = and i32 %28, -1048577
  store volatile i32 %29, ptr %18, align 4, !tbaa !15
  br label %30

30:                                               ; preds = %17, %27
  %31 = load volatile i32, ptr %18, align 4, !tbaa !15
  %32 = and i32 %31, 4096
  %.not = icmp eq i32 %32, 0
  %33 = getelementptr inbounds i8, ptr %0, i64 104
  br i1 %.not, label %37, label %34

34:                                               ; preds = %30
  %35 = load volatile i32, ptr %33, align 8, !tbaa !16
  %36 = and i32 %35, -7
  br label %37

37:                                               ; preds = %30, %34
  %.sink = phi i32 [ %36, %34 ], [ 0, %30 ]
  store volatile i32 %.sink, ptr %33, align 8, !tbaa !16
  store volatile i32 28, ptr %22, align 4, !tbaa !17
  store i32 0, ptr %11, align 8, !tbaa !14
  br i1 %25, label %38, label %switch.early.test

switch.early.test:                                ; preds = %37
  switch i32 %6, label %47 [
    i32 9, label %38
    i32 5, label %38
    i32 0, label %38
  ]

38:                                               ; preds = %switch.early.test, %switch.early.test, %switch.early.test, %37
  %39 = getelementptr inbounds i8, ptr %22, i64 12
  %40 = load volatile i32, ptr %39, align 4, !tbaa !19
  %41 = and i32 %40, 33554432
  %.not55 = icmp eq i32 %41, 0
  br i1 %.not55, label %46, label %42

42:                                               ; preds = %38
  %43 = load volatile i32, ptr %18, align 4, !tbaa !15
  %44 = and i32 %43, -12289
  %45 = or disjoint i32 %44, 4096
  store volatile i32 %45, ptr %18, align 4, !tbaa !15
  br label %46

46:                                               ; preds = %42, %38
  tail call void @LL_ADC_REG_StartConversion(ptr noundef nonnull %22)
  br label %58

47:                                               ; preds = %switch.early.test
  %48 = load volatile i32, ptr %18, align 4, !tbaa !15
  %49 = or i32 %48, 1048576
  store volatile i32 %49, ptr %18, align 4, !tbaa !15
  %50 = getelementptr inbounds i8, ptr %spec.select56, i64 12
  %51 = load volatile i32, ptr %50, align 4, !tbaa !19
  %52 = and i32 %51, 33554432
  %.not54 = icmp eq i32 %52, 0
  br i1 %.not54, label %58, label %53

53:                                               ; preds = %47
  %54 = load volatile i32, ptr %18, align 4, !tbaa !15
  %55 = and i32 %54, -12289
  %56 = or disjoint i32 %55, 4096
  store volatile i32 %56, ptr %18, align 4, !tbaa !15
  br label %58

57:                                               ; preds = %14
  store i32 0, ptr %11, align 8, !tbaa !14
  br label %58

58:                                               ; preds = %46, %53, %47, %57, %1, %10
  %.0 = phi i32 [ 2, %10 ], [ 0, %46 ], [ 0, %53 ], [ 0, %47 ], [ %15, %57 ], [ 2, %1 ]
  ret i32 %.0
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @LL_ADC_GetMultimode(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @ADC_Enable(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @LL_ADC_REG_StartConversion(ptr noundef) local_unnamed_addr #0

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104, !13, i64 108}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !12, i64 60}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!13 = !{!"", !11, i64 0, !11, i64 4}
!14 = !{!6, !11, i64 96}
!15 = !{!6, !11, i64 100}
!16 = !{!6, !11, i64 104}
!17 = !{!18, !11, i64 0}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !8, i64 80, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !8, i64 112, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !8, i64 144, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200}
!19 = !{!18, !11, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass