; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/MSwitch.ll (ZN7MSwitch12resetSignalsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.MSwitch = type { %class.Unit, i8, i8, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i32, i32, i32, i32, i8, i8, i32, %class.MSwitchStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.MSwitchStats = type { %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%class.Stats = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7MSwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(264) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 21
  store i8 0, ptr %4, align 8, !tbaa !9
  %5 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 22
  store i8 0, ptr %5, align 1, !tbaa !23
  %6 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 25
  store i32 0, ptr %6, align 4, !tbaa !24
  %7 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 26
  store i32 0, ptr %7, align 8, !tbaa !25
  %8 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 27
  store i8 0, ptr %8, align 4, !tbaa !26
  %9 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 28
  store i8 0, ptr %9, align 1, !tbaa !27
  %10 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 23
  store i32 0, ptr %10, align 4, !tbaa !28
  %11 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 24
  store i32 0, ptr %11, align 8, !tbaa !29
  %12 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 20
  store i32 -1, ptr %12, align 4, !tbaa !30
  br label %13

13:                                               ; preds = %18, %1
  %14 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 6
  %15 = load ptr, ptr %14, align 8, !tbaa !31
  %16 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %15)
  %17 = xor i1 %16, true
  br i1 %17, label %18, label %22

18:                                               ; preds = %13
  %19 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 6
  %20 = load ptr, ptr %19, align 8, !tbaa !31
  %21 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %20)
  br label %13, !llvm.loop !32

22:                                               ; preds = %13
  br label %23

23:                                               ; preds = %28, %22
  %24 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 3
  %25 = load ptr, ptr %24, align 8, !tbaa !34
  %26 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %25)
  %27 = xor i1 %26, true
  br i1 %27, label %28, label %32

28:                                               ; preds = %23
  %29 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 3
  %30 = load ptr, ptr %29, align 8, !tbaa !34
  %31 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %30)
  br label %23, !llvm.loop !35

32:                                               ; preds = %23
  br label %33

33:                                               ; preds = %38, %32
  %34 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 7
  %35 = load ptr, ptr %34, align 8, !tbaa !36
  %36 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %35)
  %37 = xor i1 %36, true
  br i1 %37, label %38, label %42

38:                                               ; preds = %33
  %39 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 7
  %40 = load ptr, ptr %39, align 8, !tbaa !36
  %41 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %40)
  br label %33, !llvm.loop !37

42:                                               ; preds = %33
  br label %43

43:                                               ; preds = %48, %42
  %44 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 5
  %45 = load ptr, ptr %44, align 8, !tbaa !38
  %46 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %45)
  %47 = xor i1 %46, true
  br i1 %47, label %48, label %52

48:                                               ; preds = %43
  %49 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 5
  %50 = load ptr, ptr %49, align 8, !tbaa !38
  %51 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %50)
  br label %43, !llvm.loop !39

52:                                               ; preds = %43
  br label %53

53:                                               ; preds = %58, %52
  %54 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 4
  %55 = load ptr, ptr %54, align 8, !tbaa !40
  %56 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %55)
  %57 = xor i1 %56, true
  br i1 %57, label %58, label %62

58:                                               ; preds = %53
  %59 = getelementptr inbounds %class.MSwitch, ptr %3, i32 0, i32 4
  %60 = load ptr, ptr %59, align 8, !tbaa !40
  %61 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %60)
  br label %53, !llvm.loop !41

62:                                               ; preds = %53
  ret void
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !16, i64 184}
!10 = !{!"_ZTS7MSwitch", !11, i64 0, !16, i64 48, !16, i64 49, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !17, i64 96, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !12, i64 156, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172, !12, i64 176, !12, i64 180, !16, i64 184, !16, i64 185, !12, i64 188, !12, i64 192, !12, i64 196, !12, i64 200, !16, i64 204, !16, i64 205, !12, i64 208, !21, i64 216}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTS12MSwitchStats", !22, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!22 = !{!"_ZTS5Stats"}
!23 = !{!10, !16, i64 185}
!24 = !{!10, !12, i64 196}
!25 = !{!10, !12, i64 200}
!26 = !{!10, !16, i64 204}
!27 = !{!10, !16, i64 205}
!28 = !{!10, !12, i64 188}
!29 = !{!10, !12, i64 192}
!30 = !{!10, !12, i64 180}
!31 = !{!10, !6, i64 80}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = !{!10, !6, i64 56}
!35 = distinct !{!35, !33}
!36 = !{!10, !6, i64 88}
!37 = distinct !{!37, !33}
!38 = !{!10, !6, i64 72}
!39 = distinct !{!39, !33}
!40 = !{!10, !6, i64 64}
!41 = distinct !{!41, !33}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7MSwitch12resetSignalsEv(ptr nocapture noundef nonnull align 8 dereferenceable(264) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 184
  store i8 0, ptr %2, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 185
  store i8 0, ptr %3, align 1, !tbaa !22
  %4 = getelementptr inbounds i8, ptr %0, i64 188
  %5 = getelementptr inbounds i8, ptr %0, i64 180
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(18) %4, i8 0, i64 18, i1 false)
  store i32 -1, ptr %5, align 4, !tbaa !23
  %6 = getelementptr inbounds i8, ptr %0, i64 80
  %7 = load ptr, ptr %6, align 8, !tbaa !24
  %8 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %7)
  br i1 %8, label %.preheader3, label %.lr.ph

.preheader3:                                      ; preds = %.lr.ph, %1
  %9 = getelementptr inbounds i8, ptr %0, i64 56
  %10 = load ptr, ptr %9, align 8, !tbaa !25
  %11 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %10)
  br i1 %11, label %.preheader2, label %.lr.ph4

.lr.ph:                                           ; preds = %1, %.lr.ph
  %12 = load ptr, ptr %6, align 8, !tbaa !24
  %13 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %12)
  %14 = load ptr, ptr %6, align 8, !tbaa !24
  %15 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %14)
  br i1 %15, label %.preheader3, label %.lr.ph, !llvm.loop !26

.preheader2:                                      ; preds = %.lr.ph4, %.preheader3
  %16 = getelementptr inbounds i8, ptr %0, i64 88
  %17 = load ptr, ptr %16, align 8, !tbaa !28
  %18 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %17)
  br i1 %18, label %.preheader1, label %.lr.ph5

.lr.ph4:                                          ; preds = %.preheader3, %.lr.ph4
  %19 = load ptr, ptr %9, align 8, !tbaa !25
  %20 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %19)
  %21 = load ptr, ptr %9, align 8, !tbaa !25
  %22 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %21)
  br i1 %22, label %.preheader2, label %.lr.ph4, !llvm.loop !29

.preheader1:                                      ; preds = %.lr.ph5, %.preheader2
  %23 = getelementptr inbounds i8, ptr %0, i64 72
  %24 = load ptr, ptr %23, align 8, !tbaa !30
  %25 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %24)
  br i1 %25, label %.preheader, label %.lr.ph6

.lr.ph5:                                          ; preds = %.preheader2, %.lr.ph5
  %26 = load ptr, ptr %16, align 8, !tbaa !28
  %27 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %26)
  %28 = load ptr, ptr %16, align 8, !tbaa !28
  %29 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %28)
  br i1 %29, label %.preheader1, label %.lr.ph5, !llvm.loop !31

.preheader:                                       ; preds = %.lr.ph6, %.preheader1
  %30 = getelementptr inbounds i8, ptr %0, i64 64
  %31 = load ptr, ptr %30, align 8, !tbaa !32
  %32 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %31)
  br i1 %32, label %._crit_edge, label %.lr.ph7

.lr.ph6:                                          ; preds = %.preheader1, %.lr.ph6
  %33 = load ptr, ptr %23, align 8, !tbaa !30
  %34 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %33)
  %35 = load ptr, ptr %23, align 8, !tbaa !30
  %36 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %35)
  br i1 %36, label %.preheader, label %.lr.ph6, !llvm.loop !33

.lr.ph7:                                          ; preds = %.preheader, %.lr.ph7
  %37 = load ptr, ptr %30, align 8, !tbaa !32
  %38 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %37)
  %39 = load ptr, ptr %30, align 8, !tbaa !32
  %40 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %39)
  br i1 %40, label %._crit_edge, label %.lr.ph7, !llvm.loop !34

._crit_edge:                                      ; preds = %.lr.ph7, %.preheader
  ret void
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !15, i64 184}
!6 = !{!"_ZTS7MSwitch", !7, i64 0, !15, i64 48, !15, i64 49, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !16, i64 96, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !8, i64 152, !8, i64 156, !8, i64 160, !8, i64 164, !8, i64 168, !8, i64 172, !8, i64 176, !8, i64 180, !15, i64 184, !15, i64 185, !8, i64 188, !8, i64 192, !8, i64 196, !8, i64 200, !15, i64 204, !15, i64 205, !8, i64 208, !20, i64 216}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"bool", !9, i64 0}
!16 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!20 = !{!"_ZTS12MSwitchStats", !21, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44}
!21 = !{!"_ZTS5Stats"}
!22 = !{!6, !15, i64 185}
!23 = !{!6, !8, i64 180}
!24 = !{!6, !13, i64 80}
!25 = !{!6, !13, i64 56}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!6, !13, i64 88}
!29 = distinct !{!29, !27}
!30 = !{!6, !13, i64 72}
!31 = distinct !{!31, !27}
!32 = !{!6, !13, i64 64}
!33 = distinct !{!33, !27}
!34 = distinct !{!34, !27}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass