; LLVM IR from simbody/simbody :: SimTKcommon/src/ParallelExecutor.ll (ZNK5SimTK20ParallelExecutorImpl5cloneEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SimTK::ParallelExecutorImpl" = type <{ %"class.SimTK::PIMPLImplementation.base", i8, [3 x i8], %"class.std::mutex", %"class.std::condition_variable", %"class.std::condition_variable", %"class.SimTK::Array_", %"class.SimTK::Array_.0", ptr, i32, i32, i32, [4 x i8] }>
%"class.SimTK::PIMPLImplementation.base" = type <{ ptr, i32 }>
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::condition_variable" = type { %"class.std::__condvar" }
%"class.std::__condvar" = type { %union.pthread_cond_t }
%union.pthread_cond_t = type { %struct.__pthread_cond_s }
%struct.__pthread_cond_s = type { %union.__atomic_wide_counter, %union.__atomic_wide_counter, [2 x i32], [2 x i32], i32, i32, [2 x i32] }
%union.__atomic_wide_counter = type { i64 }
%"class.SimTK::Array_" = type { %"class.SimTK::ArrayView_" }
%"class.SimTK::ArrayView_" = type { %"class.SimTK::ArrayViewConst_" }
%"class.SimTK::ArrayViewConst_" = type { ptr, i32, i32 }
%"class.SimTK::Array_.0" = type { %"class.SimTK::ArrayView_.1" }
%"class.SimTK::ArrayView_.1" = type { %"class.SimTK::ArrayViewConst_.2" }
%"class.SimTK::ArrayViewConst_.2" = type { ptr, i32, i32 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZNK5SimTK20ParallelExecutorImpl5cloneEv(ptr noundef nonnull align 8 dereferenceable(204) %0) #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  %6 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 208) #3
  %7 = getelementptr inbounds %"class.SimTK::ParallelExecutorImpl", ptr %5, i32 0, i32 11
  %8 = load i32, ptr %7, align 8, !tbaa !9
  invoke void @_ZN5SimTK20ParallelExecutorImplC1Ei(ptr noundef nonnull align 8 dereferenceable(204) %6, i32 noundef %8)
          to label %9 unwind label %10

9:                                                ; preds = %1
  ret ptr %6

10:                                               ; preds = %1
  %11 = landingpad { ptr, i32 }
          cleanup
  %12 = extractvalue { ptr, i32 } %11, 0
  store ptr %12, ptr %3, align 8
  %13 = extractvalue { ptr, i32 } %11, 1
  store i32 %13, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %6, i64 noundef 208) #4
  br label %14

14:                                               ; preds = %10
  %15 = load ptr, ptr %3, align 8
  %16 = load i32, ptr %4, align 4
  %17 = insertvalue { ptr, i32 } poison, ptr %15, 0
  %18 = insertvalue { ptr, i32 } %17, i32 %16, 1
  resume { ptr, i32 } %18
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #2

declare void @_ZN5SimTK20ParallelExecutorImplC1Ei(ptr, i32)

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { builtin allocsize(0) }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 200}
!10 = !{!"_ZTSN5SimTK20ParallelExecutorImplE", !11, i64 0, !13, i64 12, !14, i64 16, !16, i64 56, !16, i64 104, !18, i64 152, !21, i64 168, !6, i64 184, !12, i64 192, !12, i64 196, !12, i64 200}
!11 = !{!"_ZTSN5SimTK19PIMPLImplementationINS_16ParallelExecutorENS_20ParallelExecutorImplEEE", !6, i64 0, !12, i64 8}
!12 = !{!"int", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"_ZTSSt5mutex", !15, i64 0}
!15 = !{!"_ZTSSt12__mutex_base", !7, i64 0}
!16 = !{!"_ZTSSt18condition_variable", !17, i64 0}
!17 = !{!"_ZTSSt9__condvar", !7, i64 0}
!18 = !{!"_ZTSN5SimTK6Array_ISt6threadjEE", !19, i64 0}
!19 = !{!"_ZTSN5SimTK10ArrayView_ISt6threadjEE", !20, i64 0}
!20 = !{!"_ZTSN5SimTK15ArrayViewConst_ISt6threadjEE", !6, i64 0, !12, i64 8, !12, i64 12}
!21 = !{!"_ZTSN5SimTK6Array_INS_10ThreadInfoEjEE", !22, i64 0}
!22 = !{!"_ZTSN5SimTK10ArrayView_INS_10ThreadInfoEjEE", !23, i64 0}
!23 = !{!"_ZTSN5SimTK15ArrayViewConst_INS_10ThreadInfoEjEE", !6, i64 0, !12, i64 8, !12, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull ptr @_ZNK5SimTK20ParallelExecutorImpl5cloneEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(204) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = tail call noalias noundef nonnull dereferenceable(208) ptr @_Znwm(i64 noundef 208) #3
  %3 = getelementptr inbounds i8, ptr %0, i64 200
  %4 = load i32, ptr %3, align 8, !tbaa !5
  invoke void @_ZN5SimTK20ParallelExecutorImplC1Ei(ptr noundef nonnull align 8 dereferenceable(204) %2, i32 noundef %4)
          to label %5 unwind label %6

5:                                                ; preds = %1
  ret ptr %2

6:                                                ; preds = %1
  %7 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %2, i64 noundef 208) #4
  resume { ptr, i32 } %7
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

declare void @_ZN5SimTK20ParallelExecutorImplC1Ei(ptr, i32) local_unnamed_addr

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { builtin allocsize(0) }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 200}
!6 = !{!"_ZTSN5SimTK20ParallelExecutorImplE", !7, i64 0, !12, i64 12, !13, i64 16, !15, i64 56, !15, i64 104, !17, i64 152, !20, i64 168, !8, i64 184, !11, i64 192, !11, i64 196, !11, i64 200}
!7 = !{!"_ZTSN5SimTK19PIMPLImplementationINS_16ParallelExecutorENS_20ParallelExecutorImplEEE", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"bool", !9, i64 0}
!13 = !{!"_ZTSSt5mutex", !14, i64 0}
!14 = !{!"_ZTSSt12__mutex_base", !9, i64 0}
!15 = !{!"_ZTSSt18condition_variable", !16, i64 0}
!16 = !{!"_ZTSSt9__condvar", !9, i64 0}
!17 = !{!"_ZTSN5SimTK6Array_ISt6threadjEE", !18, i64 0}
!18 = !{!"_ZTSN5SimTK10ArrayView_ISt6threadjEE", !19, i64 0}
!19 = !{!"_ZTSN5SimTK15ArrayViewConst_ISt6threadjEE", !8, i64 0, !11, i64 8, !11, i64 12}
!20 = !{!"_ZTSN5SimTK6Array_INS_10ThreadInfoEjEE", !21, i64 0}
!21 = !{!"_ZTSN5SimTK10ArrayView_INS_10ThreadInfoEjEE", !22, i64 0}
!22 = !{!"_ZTSN5SimTK15ArrayViewConst_INS_10ThreadInfoEjEE", !8, i64 0, !11, i64 8, !11, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass