; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/OCT2020-Long/SEGCOMPR.ll (Z3addRii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3addRii(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load i32, ptr %4, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = load i32, ptr %6, align 4, !tbaa !9
  %8 = add nsw i32 %7, %5
  store i32 %8, ptr %6, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %13, %2
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = icmp sge i32 %11, 998244353
  br i1 %12, label %13, label %17

13:                                               ; preds = %9
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = load i32, ptr %14, align 4, !tbaa !9
  %16 = sub nsw i32 %15, 998244353
  store i32 %16, ptr %14, align 4, !tbaa !9
  br label %9, !llvm.loop !11

17:                                               ; preds = %9
  br label %18

18:                                               ; preds = %22, %17
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = load i32, ptr %19, align 4, !tbaa !9
  %21 = icmp slt i32 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %18
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = load i32, ptr %23, align 4, !tbaa !9
  %25 = add nsw i32 %24, 998244353
  store i32 %25, ptr %23, align 4, !tbaa !9
  br label %18, !llvm.loop !13

26:                                               ; preds = %18
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_Z3addRii(ptr nocapture noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1) local_unnamed_addr #0 {
.preheader:
  %2 = load i32, ptr %0, align 4, !tbaa !5
  %.fr = freeze i32 %2
  %3 = add i32 %.fr, %1
  %4 = tail call i32 @llvm.smax.i32(i32 %3, i32 998244352)
  %5 = urem i32 %4, 998244353
  %6 = sub nuw nsw i32 %4, %5
  %7 = sub i32 %3, %6
  %8 = icmp slt i32 %7, 0
  br i1 %8, label %.lr.ph.preheader, label %19

.lr.ph.preheader:                                 ; preds = %.preheader
  %9 = tail call i32 @llvm.umax.i32(i32 %7, i32 -998244353)
  %10 = icmp ult i32 %7, -998244353
  %umin = zext i1 %10 to i32
  %11 = add nsw i32 %7, %umin
  %12 = sub nsw i32 %9, %11
  %13 = udiv i32 %12, 998244353
  %14 = add nuw nsw i32 %13, %umin
  %15 = mul i32 %14, 998244353
  %16 = add i32 %3, %15
  %17 = add i32 %16, 998244353
  %18 = sub i32 %17, %6
  br label %19

19:                                               ; preds = %.lr.ph.preheader, %.preheader
  %storemerge = phi i32 [ %18, %.lr.ph.preheader ], [ %7, %.preheader ]
  store i32 %storemerge, ptr %0, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass