; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (FlushRxFifo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SPI_HandleTypeDef = type { ptr, %struct.SPI_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SPI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, [3 x i32], i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SPIEx_FlushRxFifo(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  store i8 0, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %8, i32 0, i32 0
  %10 = load ptr, ptr %9, align 8, !tbaa !10
  %11 = getelementptr inbounds %struct.SPI_TypeDef, ptr %10, i32 0, i32 5
  %12 = load volatile i32, ptr %11, align 4, !tbaa !15
  store i32 %12, ptr %5, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  br label %13

13:                                               ; preds = %66, %1
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %14, i32 0, i32 0
  %16 = load ptr, ptr %15, align 8, !tbaa !10
  %17 = getelementptr inbounds %struct.SPI_TypeDef, ptr %16, i32 0, i32 5
  %18 = load volatile i32, ptr %17, align 4, !tbaa !15
  %19 = zext i32 %18 to i64
  %20 = and i64 %19, 24576
  %21 = icmp ne i64 %20, 0
  br i1 %21, label %27, label %22

22:                                               ; preds = %13
  %23 = load i32, ptr %5, align 4, !tbaa !17
  %24 = zext i32 %23 to i64
  %25 = and i64 %24, 32768
  %26 = icmp ne i64 %25, 0
  br label %27

27:                                               ; preds = %22, %13
  %28 = phi i1 [ true, %13 ], [ %26, %22 ]
  br i1 %28, label %29, label %67

29:                                               ; preds = %27
  %30 = load i8, ptr %4, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = add nsw i32 %31, 4
  %33 = trunc i32 %32 to i8
  store i8 %33, ptr %4, align 1, !tbaa !9
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %34, i32 0, i32 0
  %36 = load ptr, ptr %35, align 8, !tbaa !10
  %37 = getelementptr inbounds %struct.SPI_TypeDef, ptr %36, i32 0, i32 10
  %38 = load volatile i32, ptr %37, align 4, !tbaa !18
  store volatile i32 %38, ptr %6, align 4, !tbaa !17
  %39 = load volatile i32, ptr %6, align 4, !tbaa !17
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %40, i32 0, i32 0
  %42 = load ptr, ptr %41, align 8, !tbaa !10
  %43 = icmp eq ptr %42, inttoptr (i64 1073819648 to ptr)
  br i1 %43, label %54, label %44

44:                                               ; preds = %29
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !10
  %48 = icmp eq ptr %47, inttoptr (i64 1073756160 to ptr)
  br i1 %48, label %54, label %49

49:                                               ; preds = %44
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !10
  %53 = icmp eq ptr %52, inttoptr (i64 1073757184 to ptr)
  br i1 %53, label %54, label %60

54:                                               ; preds = %49, %44, %29
  %55 = load i8, ptr %4, align 1, !tbaa !9
  %56 = zext i8 %55 to i64
  %57 = icmp ugt i64 %56, 16
  br i1 %57, label %58, label %59

58:                                               ; preds = %54
  store i32 3, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

59:                                               ; preds = %54
  br label %66

60:                                               ; preds = %49
  %61 = load i8, ptr %4, align 1, !tbaa !9
  %62 = zext i8 %61 to i64
  %63 = icmp ugt i64 %62, 8
  br i1 %63, label %64, label %65

64:                                               ; preds = %60
  store i32 3, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

65:                                               ; preds = %60
  br label %66

66:                                               ; preds = %65, %59
  br label %13, !llvm.loop !19

67:                                               ; preds = %27
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

68:                                               ; preds = %67, %64, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  %69 = load i32, ptr %2, align 4
  ret i32 %69
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 0}
!11 = !{!"__SPI_HandleTypeDef", !6, i64 0, !12, i64 8, !6, i64 96, !14, i64 104, !14, i64 106, !6, i64 112, !14, i64 120, !14, i64 122, !13, i64 124, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !13, i64 160, !13, i64 164, !13, i64 168}
!12 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !13, i64 52, !13, i64 56, !13, i64 60, !13, i64 64, !13, i64 68, !13, i64 72, !13, i64 76, !13, i64 80, !13, i64 84}
!13 = !{!"int", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !13, i64 20}
!16 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !13, i64 32, !7, i64 36, !13, i64 48, !7, i64 52, !13, i64 64, !13, i64 68, !13, i64 72, !13, i64 76, !13, i64 80}
!17 = !{!13, !13, i64 0}
!18 = !{!16, !13, i64 48}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_SPIEx_FlushRxFifo(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %.fr26 = freeze ptr %3
  %4 = getelementptr inbounds i8, ptr %.fr26, i64 20
  %5 = load volatile i32, ptr %4, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  %.fr28 = freeze i32 %5
  %6 = and i32 %.fr28, 32768
  %.not30 = icmp eq i32 %6, 0
  %7 = load volatile i32, ptr %4, align 4, !tbaa !13
  %8 = and i32 %7, 24576
  %9 = or disjoint i32 %8, %6
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %10 = getelementptr inbounds i8, ptr %.fr26, i64 48
  %magicptr13 = ptrtoint ptr %.fr26 to i64
  switch i64 %magicptr13, label %.lr.ph.split [
    i64 1073819648, label %.lr.ph.split.us
    i64 1073756160, label %.lr.ph.split.us
    i64 1073757184, label %.lr.ph.split.us
  ]

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph, %.lr.ph
  %11 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %11, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us = load volatile i32, ptr %2, align 4, !tbaa !16
  %12 = load volatile i32, ptr %4, align 4, !tbaa !13
  br i1 %.not30, label %.lr.ph.split.us.split.preheader, label %.lr.ph.split.us.split.us

.lr.ph.split.us.split.preheader:                  ; preds = %.lr.ph.split.us
  %13 = and i32 %12, 24576
  %.not29 = icmp eq i32 %13, 0
  br i1 %.not29, label %._crit_edge, label %.lr.ph.split.us.split.1, !llvm.loop !17

.lr.ph.split.us.split.us:                         ; preds = %.lr.ph.split.us
  %14 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %14, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.us = load volatile i32, ptr %2, align 4, !tbaa !16
  %15 = load volatile i32, ptr %4, align 4, !tbaa !13
  %16 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %16, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.us.1 = load volatile i32, ptr %2, align 4, !tbaa !16
  %17 = load volatile i32, ptr %4, align 4, !tbaa !13
  %18 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %18, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.us.2 = load volatile i32, ptr %2, align 4, !tbaa !16
  %19 = load volatile i32, ptr %4, align 4, !tbaa !13
  %20 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %20, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.us.3 = load volatile i32, ptr %2, align 4, !tbaa !16
  br label %._crit_edge

.lr.ph.split.us.split.1:                          ; preds = %.lr.ph.split.us.split.preheader
  %21 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %21, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.1 = load volatile i32, ptr %2, align 4, !tbaa !16
  %22 = load volatile i32, ptr %4, align 4, !tbaa !13
  %23 = and i32 %22, 24576
  %.not29.1 = icmp eq i32 %23, 0
  br i1 %.not29.1, label %._crit_edge, label %.lr.ph.split.us.split.2, !llvm.loop !17

.lr.ph.split.us.split.2:                          ; preds = %.lr.ph.split.us.split.1
  %24 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %24, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.2 = load volatile i32, ptr %2, align 4, !tbaa !16
  %25 = load volatile i32, ptr %4, align 4, !tbaa !13
  %26 = and i32 %25, 24576
  %.not29.2 = icmp eq i32 %26, 0
  br i1 %.not29.2, label %._crit_edge, label %.lr.ph.split.us.split.3, !llvm.loop !17

.lr.ph.split.us.split.3:                          ; preds = %.lr.ph.split.us.split.2
  %27 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %27, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.3 = load volatile i32, ptr %2, align 4, !tbaa !16
  %28 = load volatile i32, ptr %4, align 4, !tbaa !13
  %29 = and i32 %28, 24576
  %.not29.3 = icmp eq i32 %29, 0
  br i1 %.not29.3, label %._crit_edge, label %.lr.ph.split.us.split.4, !llvm.loop !17

.lr.ph.split.us.split.4:                          ; preds = %.lr.ph.split.us.split.3
  %30 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %30, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us.4 = load volatile i32, ptr %2, align 4, !tbaa !16
  br label %._crit_edge

.lr.ph.split:                                     ; preds = %.lr.ph
  %31 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %31, ptr %2, align 4, !tbaa !16
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !16
  %32 = load volatile i32, ptr %4, align 4, !tbaa !13
  br i1 %.not30, label %.lr.ph.split.split.preheader, label %.lr.ph.split.split.us

.lr.ph.split.split.preheader:                     ; preds = %.lr.ph.split
  %33 = and i32 %32, 24576
  %.not31 = icmp eq i32 %33, 0
  br i1 %.not31, label %._crit_edge, label %.lr.ph.split.split.1, !llvm.loop !17

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split
  %34 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %34, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us21 = load volatile i32, ptr %2, align 4, !tbaa !16
  %35 = load volatile i32, ptr %4, align 4, !tbaa !13
  %36 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %36, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..us21.1 = load volatile i32, ptr %2, align 4, !tbaa !16
  br label %._crit_edge

.lr.ph.split.split.1:                             ; preds = %.lr.ph.split.split.preheader
  %37 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %37, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..1 = load volatile i32, ptr %2, align 4, !tbaa !16
  %38 = load volatile i32, ptr %4, align 4, !tbaa !13
  %39 = and i32 %38, 24576
  %.not31.1 = icmp eq i32 %39, 0
  br i1 %.not31.1, label %._crit_edge, label %.lr.ph.split.split.2, !llvm.loop !17

.lr.ph.split.split.2:                             ; preds = %.lr.ph.split.split.1
  %40 = load volatile i32, ptr %10, align 4, !tbaa !15
  store volatile i32 %40, ptr %2, align 4, !tbaa !16
  %.0..0..0..0..2 = load volatile i32, ptr %2, align 4, !tbaa !16
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.split.us.split.preheader, %.lr.ph.split.us.split.1, %.lr.ph.split.us.split.2, %.lr.ph.split.us.split.3, %.lr.ph.split.us.split.4, %.lr.ph.split.split.preheader, %.lr.ph.split.split.1, %.lr.ph.split.split.2, %.lr.ph.split.us.split.us, %.lr.ph.split.split.us, %1
  %.0 = phi i32 [ 0, %1 ], [ 3, %.lr.ph.split.split.us ], [ 3, %.lr.ph.split.us.split.us ], [ 0, %.lr.ph.split.split.preheader ], [ 0, %.lr.ph.split.split.1 ], [ 3, %.lr.ph.split.split.2 ], [ 0, %.lr.ph.split.us.split.preheader ], [ 0, %.lr.ph.split.us.split.1 ], [ 0, %.lr.ph.split.us.split.2 ], [ 0, %.lr.ph.split.us.split.3 ], [ 3, %.lr.ph.split.us.split.4 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__SPI_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 96, !12, i64 104, !12, i64 106, !7, i64 112, !12, i64 120, !12, i64 122, !11, i64 124, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!14, !11, i64 20}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !8, i64 36, !11, i64 48, !8, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!15 = !{!14, !11, i64 48}
!16 = !{!11, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass