; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CEC_HandleTypeDef = type { ptr, %struct.CEC_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32 }
%struct.CEC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i16, ptr }
%struct.CEC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CEC_Transmit_IT(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3, i32 noundef %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i8 %1, ptr %8, align 1, !tbaa !9
  store i8 %2, ptr %9, align 1, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !10
  %12 = load ptr, ptr %7, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %12, i32 0, i32 6
  %14 = load i32, ptr %13, align 8, !tbaa !12
  %15 = icmp eq i32 %14, 32
  br i1 %15, label %16, label %80

16:                                               ; preds = %5
  %17 = load ptr, ptr %10, align 8, !tbaa !5
  %18 = icmp eq ptr %17, null
  br i1 %18, label %19, label %23

19:                                               ; preds = %16
  %20 = load i32, ptr %11, align 4, !tbaa !10
  %21 = icmp ugt i32 %20, 0
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  store i32 1, ptr %6, align 4
  br label %81

23:                                               ; preds = %19, %16
  br label %24

24:                                               ; preds = %23
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %25, i32 0, i32 5
  %27 = load i32, ptr %26, align 4, !tbaa !16
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %30

29:                                               ; preds = %24
  store i32 2, ptr %6, align 4
  br label %81

30:                                               ; preds = %24
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %31, i32 0, i32 5
  store i32 1, ptr %32, align 4, !tbaa !16
  br label %33

33:                                               ; preds = %30
  br label %34

34:                                               ; preds = %33
  %35 = load ptr, ptr %10, align 8, !tbaa !5
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %36, i32 0, i32 2
  store ptr %35, ptr %37, align 8, !tbaa !17
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %38, i32 0, i32 6
  store i32 33, ptr %39, align 8, !tbaa !12
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %40, i32 0, i32 8
  store i32 0, ptr %41, align 8, !tbaa !18
  %42 = load i32, ptr %11, align 4, !tbaa !10
  %43 = trunc i32 %42 to i16
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %44, i32 0, i32 3
  store i16 %43, ptr %45, align 8, !tbaa !19
  %46 = load i32, ptr %11, align 4, !tbaa !10
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %57

48:                                               ; preds = %34
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %49, i32 0, i32 0
  %51 = load ptr, ptr %50, align 8, !tbaa !20
  %52 = getelementptr inbounds %struct.CEC_TypeDef, ptr %51, i32 0, i32 0
  %53 = load volatile i32, ptr %52, align 4, !tbaa !21
  %54 = zext i32 %53 to i64
  %55 = or i64 %54, 4
  %56 = trunc i64 %55 to i32
  store volatile i32 %56, ptr %52, align 4, !tbaa !21
  br label %57

57:                                               ; preds = %48, %34
  %58 = load i8, ptr %8, align 1, !tbaa !9
  %59 = zext i8 %58 to i32
  %60 = shl i32 %59, 4
  %61 = load i8, ptr %9, align 1, !tbaa !9
  %62 = zext i8 %61 to i32
  %63 = or i32 %60, %62
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !20
  %67 = getelementptr inbounds %struct.CEC_TypeDef, ptr %66, i32 0, i32 2
  store volatile i32 %63, ptr %67, align 4, !tbaa !23
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %68, i32 0, i32 0
  %70 = load ptr, ptr %69, align 8, !tbaa !20
  %71 = getelementptr inbounds %struct.CEC_TypeDef, ptr %70, i32 0, i32 0
  %72 = load volatile i32, ptr %71, align 4, !tbaa !21
  %73 = zext i32 %72 to i64
  %74 = or i64 %73, 2
  %75 = trunc i64 %74 to i32
  store volatile i32 %75, ptr %71, align 4, !tbaa !21
  br label %76

76:                                               ; preds = %57
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %77, i32 0, i32 5
  store i32 0, ptr %78, align 4, !tbaa !16
  br label %79

79:                                               ; preds = %76
  store i32 0, ptr %6, align 4
  br label %81

80:                                               ; preds = %5
  store i32 2, ptr %6, align 4
  br label %81

81:                                               ; preds = %80, %79, %29, %22
  %82 = load i32, ptr %6, align 4
  ret i32 %82
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 72}
!13 = !{!"", !6, i64 0, !14, i64 8, !6, i64 56, !15, i64 64, !15, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !15, i64 32, !6, i64 40}
!15 = !{!"short", !7, i64 0}
!16 = !{!13, !11, i64 68}
!17 = !{!13, !6, i64 56}
!18 = !{!13, !11, i64 80}
!19 = !{!13, !15, i64 64}
!20 = !{!13, !6, i64 0}
!21 = !{!22, !11, i64 0}
!22 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!23 = !{!22, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_CEC_Transmit_IT(ptr nocapture noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, 32
  br i1 %8, label %9, label %33

9:                                                ; preds = %5
  %10 = icmp eq ptr %3, null
  %11 = icmp ne i32 %4, 0
  %or.cond = and i1 %10, %11
  br i1 %or.cond, label %33, label %12

12:                                               ; preds = %9
  %13 = getelementptr inbounds i8, ptr %0, i64 68
  %14 = load i32, ptr %13, align 4, !tbaa !13
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %33, label %16

16:                                               ; preds = %12
  %17 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %3, ptr %17, align 8, !tbaa !14
  store i32 33, ptr %6, align 8, !tbaa !5
  %18 = getelementptr inbounds i8, ptr %0, i64 80
  store i32 0, ptr %18, align 8, !tbaa !15
  %19 = trunc i32 %4 to i16
  %20 = getelementptr inbounds i8, ptr %0, i64 64
  store i16 %19, ptr %20, align 8, !tbaa !16
  %21 = icmp eq i32 %4, 0
  %.pre = load ptr, ptr %0, align 8, !tbaa !17
  br i1 %21, label %22, label %25

22:                                               ; preds = %16
  %23 = load volatile i32, ptr %.pre, align 4, !tbaa !18
  %24 = or i32 %23, 4
  store volatile i32 %24, ptr %.pre, align 4, !tbaa !18
  br label %25

25:                                               ; preds = %22, %16
  %26 = zext i8 %1 to i32
  %27 = shl nuw nsw i32 %26, 4
  %28 = zext i8 %2 to i32
  %29 = or i32 %27, %28
  %30 = getelementptr inbounds i8, ptr %.pre, i64 8
  store volatile i32 %29, ptr %30, align 4, !tbaa !20
  %31 = load volatile i32, ptr %.pre, align 4, !tbaa !18
  %32 = or i32 %31, 2
  store volatile i32 %32, ptr %.pre, align 4, !tbaa !18
  store i32 0, ptr %13, align 4, !tbaa !13
  br label %33

33:                                               ; preds = %5, %12, %9, %25
  %.0 = phi i32 [ 0, %25 ], [ 1, %9 ], [ 2, %12 ], [ 2, %5 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 72}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !12, i64 32, !7, i64 40}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 68}
!14 = !{!6, !7, i64 56}
!15 = !{!6, !11, i64 80}
!16 = !{!6, !12, i64 64}
!17 = !{!6, !7, i64 0}
!18 = !{!19, !11, i64 0}
!19 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!20 = !{!19, !11, i64 8}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass