; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__RAMECC_HandleTypeDef = type { ptr, i32, ptr }
%struct.RAMECC_MonitorTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.RAMECC_TypeDef = type { i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RAMECC_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  br label %49

7:                                                ; preds = %1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %8, i32 0, i32 1
  store volatile i32 2, ptr %9, align 8, !tbaa !9
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !12
  %13 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %12, i32 0, i32 0
  %14 = load volatile i32, ptr %13, align 4, !tbaa !13
  %15 = zext i32 %14 to i64
  %16 = and i64 %15, -33
  %17 = trunc i64 %16 to i32
  store volatile i32 %17, ptr %13, align 4, !tbaa !13
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %18, i32 0, i32 0
  %20 = ptrtoint ptr %19 to i32
  %21 = and i32 %20, -256
  %22 = zext i32 %21 to i64
  %23 = inttoptr i64 %22 to ptr
  %24 = getelementptr inbounds %struct.RAMECC_TypeDef, ptr %23, i32 0, i32 0
  %25 = load volatile i32, ptr %24, align 4, !tbaa !15
  %26 = zext i32 %25 to i64
  %27 = and i64 %26, -16
  %28 = trunc i64 %27 to i32
  store volatile i32 %28, ptr %24, align 4, !tbaa !15
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !12
  %32 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %31, i32 0, i32 0
  %33 = load volatile i32, ptr %32, align 4, !tbaa !13
  %34 = zext i32 %33 to i64
  %35 = and i64 %34, -29
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr %32, align 4, !tbaa !13
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !12
  %40 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %39, i32 0, i32 1
  %41 = load volatile i32, ptr %40, align 4, !tbaa !17
  %42 = zext i32 %41 to i64
  %43 = and i64 %42, -8
  %44 = trunc i64 %43 to i32
  store volatile i32 %44, ptr %40, align 4, !tbaa !17
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %45, i32 0, i32 1
  store volatile i32 1, ptr %46, align 8, !tbaa !9
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %47, i32 0, i32 2
  store ptr null, ptr %48, align 8, !tbaa !18
  store i32 0, ptr %2, align 4
  br label %49

49:                                               ; preds = %7, %6
  %50 = load i32, ptr %2, align 4
  ret i32 %50
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"__RAMECC_HandleTypeDef", !6, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0}
!17 = !{!14, !11, i64 4}
!18 = !{!10, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_RAMECC_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %19, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  store volatile i32 2, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %0, align 8, !tbaa !11
  %6 = load volatile i32, ptr %5, align 4, !tbaa !12
  %7 = and i32 %6, -33
  store volatile i32 %7, ptr %5, align 4, !tbaa !12
  %8 = ptrtoint ptr %0 to i64
  %9 = and i64 %8, 4294967040
  %10 = inttoptr i64 %9 to ptr
  %11 = load volatile i32, ptr %10, align 256, !tbaa !14
  %12 = and i32 %11, -16
  store volatile i32 %12, ptr %10, align 256, !tbaa !14
  %13 = load volatile i32, ptr %5, align 4, !tbaa !12
  %14 = and i32 %13, -29
  store volatile i32 %14, ptr %5, align 4, !tbaa !12
  %15 = getelementptr inbounds i8, ptr %5, i64 4
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = and i32 %16, -8
  store volatile i32 %17, ptr %15, align 4, !tbaa !16
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr null, ptr %18, align 8, !tbaa !17
  br label %19

19:                                               ; preds = %1, %3
  %.0 = phi i32 [ 0, %3 ], [ 1, %1 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"__RAMECC_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0}
!16 = !{!13, !10, i64 4}
!17 = !{!6, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass