; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IRQHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DAC_HandleTypeDef = type { ptr, i32, i32, ptr, ptr, i32 }
%struct.DAC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_DAC_IRQHandler(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %3, i32 0, i32 0
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = getelementptr inbounds %struct.DAC_TypeDef, ptr %5, i32 0, i32 0
  %7 = load volatile i32, ptr %6, align 4, !tbaa !12
  %8 = zext i32 %7 to i64
  %9 = and i64 %8, 8192
  %10 = icmp eq i64 %9, 8192
  br i1 %10, label %11, label %41

11:                                               ; preds = %1
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !9
  %15 = getelementptr inbounds %struct.DAC_TypeDef, ptr %14, i32 0, i32 13
  %16 = load volatile i32, ptr %15, align 4, !tbaa !14
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, 8192
  %19 = icmp eq i64 %18, 8192
  br i1 %19, label %20, label %40

20:                                               ; preds = %11
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %21, i32 0, i32 1
  store volatile i32 4, ptr %22, align 8, !tbaa !15
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %23, i32 0, i32 5
  %25 = load volatile i32, ptr %24, align 8, !tbaa !16
  %26 = or i32 %25, 1
  store volatile i32 %26, ptr %24, align 8, !tbaa !16
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !9
  %30 = getelementptr inbounds %struct.DAC_TypeDef, ptr %29, i32 0, i32 13
  store volatile i32 8192, ptr %30, align 4, !tbaa !14
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %31, i32 0, i32 0
  %33 = load ptr, ptr %32, align 8, !tbaa !9
  %34 = getelementptr inbounds %struct.DAC_TypeDef, ptr %33, i32 0, i32 0
  %35 = load volatile i32, ptr %34, align 4, !tbaa !12
  %36 = zext i32 %35 to i64
  %37 = and i64 %36, -4097
  %38 = trunc i64 %37 to i32
  store volatile i32 %38, ptr %34, align 4, !tbaa !12
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_DAC_DMAUnderrunCallbackCh1(ptr noundef %39)
  br label %40

40:                                               ; preds = %20, %11
  br label %41

41:                                               ; preds = %40, %1
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %43, align 8, !tbaa !9
  %45 = getelementptr inbounds %struct.DAC_TypeDef, ptr %44, i32 0, i32 0
  %46 = load volatile i32, ptr %45, align 4, !tbaa !12
  %47 = zext i32 %46 to i64
  %48 = and i64 %47, 536870912
  %49 = icmp eq i64 %48, 536870912
  br i1 %49, label %50, label %80

50:                                               ; preds = %41
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %51, i32 0, i32 0
  %53 = load ptr, ptr %52, align 8, !tbaa !9
  %54 = getelementptr inbounds %struct.DAC_TypeDef, ptr %53, i32 0, i32 13
  %55 = load volatile i32, ptr %54, align 4, !tbaa !14
  %56 = zext i32 %55 to i64
  %57 = and i64 %56, 536870912
  %58 = icmp eq i64 %57, 536870912
  br i1 %58, label %59, label %79

59:                                               ; preds = %50
  %60 = load ptr, ptr %2, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %60, i32 0, i32 1
  store volatile i32 4, ptr %61, align 8, !tbaa !15
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %62, i32 0, i32 5
  %64 = load volatile i32, ptr %63, align 8, !tbaa !16
  %65 = or i32 %64, 2
  store volatile i32 %65, ptr %63, align 8, !tbaa !16
  %66 = load ptr, ptr %2, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %66, i32 0, i32 0
  %68 = load ptr, ptr %67, align 8, !tbaa !9
  %69 = getelementptr inbounds %struct.DAC_TypeDef, ptr %68, i32 0, i32 13
  store volatile i32 536870912, ptr %69, align 4, !tbaa !14
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.DAC_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !9
  %73 = getelementptr inbounds %struct.DAC_TypeDef, ptr %72, i32 0, i32 0
  %74 = load volatile i32, ptr %73, align 4, !tbaa !12
  %75 = zext i32 %74 to i64
  %76 = and i64 %75, -268435457
  %77 = trunc i64 %76 to i32
  store volatile i32 %77, ptr %73, align 4, !tbaa !12
  %78 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_DACEx_DMAUnderrunCallbackCh2(ptr noundef %78)
  br label %79

79:                                               ; preds = %59, %50
  br label %80

80:                                               ; preds = %79, %41
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DAC_DMAUnderrunCallbackCh1(ptr noundef) #0

declare void @HAL_DACEx_DMAUnderrunCallbackCh2(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !11, i64 12, !6, i64 16, !6, i64 24, !11, i64 32}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!14 = !{!13, !11, i64 52}
!15 = !{!10, !11, i64 8}
!16 = !{!10, !11, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_DAC_IRQHandler(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = load volatile i32, ptr %2, align 4, !tbaa !11
  %4 = and i32 %3, 8192
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %16, label %5

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %2, i64 52
  %7 = load volatile i32, ptr %6, align 4, !tbaa !13
  %8 = and i32 %7, 8192
  %.not14 = icmp eq i32 %8, 0
  br i1 %.not14, label %16, label %9

9:                                                ; preds = %5
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  store volatile i32 4, ptr %10, align 8, !tbaa !14
  %11 = getelementptr inbounds i8, ptr %0, i64 32
  %12 = load volatile i32, ptr %11, align 8, !tbaa !15
  %13 = or i32 %12, 1
  store volatile i32 %13, ptr %11, align 8, !tbaa !15
  store volatile i32 8192, ptr %6, align 4, !tbaa !13
  %14 = load volatile i32, ptr %2, align 4, !tbaa !11
  %15 = and i32 %14, -4097
  store volatile i32 %15, ptr %2, align 4, !tbaa !11
  tail call void @HAL_DAC_DMAUnderrunCallbackCh1(ptr noundef nonnull %0)
  %.pre = load ptr, ptr %0, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %5, %9, %1
  %17 = phi ptr [ %2, %5 ], [ %.pre, %9 ], [ %2, %1 ]
  %18 = load volatile i32, ptr %17, align 4, !tbaa !11
  %19 = and i32 %18, 536870912
  %.not15 = icmp eq i32 %19, 0
  br i1 %.not15, label %31, label %20

20:                                               ; preds = %16
  %21 = getelementptr inbounds i8, ptr %17, i64 52
  %22 = load volatile i32, ptr %21, align 4, !tbaa !13
  %23 = and i32 %22, 536870912
  %.not16 = icmp eq i32 %23, 0
  br i1 %.not16, label %31, label %24

24:                                               ; preds = %20
  %25 = getelementptr inbounds i8, ptr %0, i64 8
  store volatile i32 4, ptr %25, align 8, !tbaa !14
  %26 = getelementptr inbounds i8, ptr %0, i64 32
  %27 = load volatile i32, ptr %26, align 8, !tbaa !15
  %28 = or i32 %27, 2
  store volatile i32 %28, ptr %26, align 8, !tbaa !15
  store volatile i32 536870912, ptr %21, align 4, !tbaa !13
  %29 = load volatile i32, ptr %17, align 4, !tbaa !11
  %30 = and i32 %29, -268435457
  store volatile i32 %30, ptr %17, align 4, !tbaa !11
  tail call void @HAL_DACEx_DMAUnderrunCallbackCh2(ptr noundef nonnull %0) #2
  br label %31

31:                                               ; preds = %20, %24, %16
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DAC_DMAUnderrunCallbackCh1(ptr noundef) local_unnamed_addr #0

declare void @HAL_DACEx_DMAUnderrunCallbackCh2(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76}
!13 = !{!12, !10, i64 52}
!14 = !{!6, !10, i64 8}
!15 = !{!6, !10, i64 32}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass