; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (MultiWriteStart)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TIM_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_TIM_DMABurst_MultiWriteStart(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %14, i32 0, i32 5
  %16 = load volatile i32, ptr %15, align 4, !tbaa !11
  %17 = icmp eq i32 %16, 2
  br i1 %17, label %18, label %19

18:                                               ; preds = %6
  store i32 2, ptr %7, align 4
  br label %281

19:                                               ; preds = %6
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %20, i32 0, i32 5
  %22 = load volatile i32, ptr %21, align 4, !tbaa !11
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %35

24:                                               ; preds = %19
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = icmp eq ptr %25, null
  br i1 %26, label %27, label %31

27:                                               ; preds = %24
  %28 = load i32, ptr %12, align 4, !tbaa !9
  %29 = icmp ugt i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %27
  store i32 1, ptr %7, align 4
  br label %281

31:                                               ; preds = %27, %24
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %32, i32 0, i32 5
  store volatile i32 2, ptr %33, align 4, !tbaa !11
  br label %34

34:                                               ; preds = %31
  br label %36

35:                                               ; preds = %19
  br label %36

36:                                               ; preds = %35, %34
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %10, align 4, !tbaa !9
  switch i32 %38, label %263 [
    i32 256, label %39
    i32 512, label %71
    i32 1024, label %103
    i32 2048, label %135
    i32 4096, label %167
    i32 8192, label %199
    i32 16384, label %231
  ]

39:                                               ; preds = %37
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %40, i32 0, i32 3
  %42 = getelementptr inbounds [7 x ptr], ptr %41, i64 0, i64 0
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %43, i32 0, i32 5
  store ptr @TIM_DMAPeriodElapsedCplt, ptr %44, align 8, !tbaa !14
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %45, i32 0, i32 3
  %47 = getelementptr inbounds [7 x ptr], ptr %46, i64 0, i64 0
  %48 = load ptr, ptr %47, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %48, i32 0, i32 6
  store ptr @TIM_DMAPeriodElapsedHalfCplt, ptr %49, align 8, !tbaa !17
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %50, i32 0, i32 3
  %52 = getelementptr inbounds [7 x ptr], ptr %51, i64 0, i64 0
  %53 = load ptr, ptr %52, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %53, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %54, align 8, !tbaa !18
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %55, i32 0, i32 3
  %57 = getelementptr inbounds [7 x ptr], ptr %56, i64 0, i64 0
  %58 = load ptr, ptr %57, align 8, !tbaa !5
  %59 = load ptr, ptr %11, align 8, !tbaa !5
  %60 = ptrtoint ptr %59 to i32
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !19
  %64 = getelementptr inbounds %struct.TIM_TypeDef, ptr %63, i32 0, i32 19
  %65 = ptrtoint ptr %64 to i32
  %66 = load i32, ptr %13, align 4, !tbaa !9
  %67 = call i32 @HAL_DMA_Start_IT(ptr noundef %58, i32 noundef %60, i32 noundef %65, i32 noundef %66)
  %68 = icmp ne i32 %67, 0
  br i1 %68, label %69, label %70

69:                                               ; preds = %39
  store i32 1, ptr %7, align 4
  br label %281

70:                                               ; preds = %39
  br label %264

71:                                               ; preds = %37
  %72 = load ptr, ptr %8, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %72, i32 0, i32 3
  %74 = getelementptr inbounds [7 x ptr], ptr %73, i64 0, i64 1
  %75 = load ptr, ptr %74, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %75, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %76, align 8, !tbaa !14
  %77 = load ptr, ptr %8, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %77, i32 0, i32 3
  %79 = getelementptr inbounds [7 x ptr], ptr %78, i64 0, i64 1
  %80 = load ptr, ptr %79, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %80, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %81, align 8, !tbaa !17
  %82 = load ptr, ptr %8, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %82, i32 0, i32 3
  %84 = getelementptr inbounds [7 x ptr], ptr %83, i64 0, i64 1
  %85 = load ptr, ptr %84, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %85, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %86, align 8, !tbaa !18
  %87 = load ptr, ptr %8, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %87, i32 0, i32 3
  %89 = getelementptr inbounds [7 x ptr], ptr %88, i64 0, i64 1
  %90 = load ptr, ptr %89, align 8, !tbaa !5
  %91 = load ptr, ptr %11, align 8, !tbaa !5
  %92 = ptrtoint ptr %91 to i32
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %93, i32 0, i32 0
  %95 = load ptr, ptr %94, align 8, !tbaa !19
  %96 = getelementptr inbounds %struct.TIM_TypeDef, ptr %95, i32 0, i32 19
  %97 = ptrtoint ptr %96 to i32
  %98 = load i32, ptr %13, align 4, !tbaa !9
  %99 = call i32 @HAL_DMA_Start_IT(ptr noundef %90, i32 noundef %92, i32 noundef %97, i32 noundef %98)
  %100 = icmp ne i32 %99, 0
  br i1 %100, label %101, label %102

101:                                              ; preds = %71
  store i32 1, ptr %7, align 4
  br label %281

102:                                              ; preds = %71
  br label %264

103:                                              ; preds = %37
  %104 = load ptr, ptr %8, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %104, i32 0, i32 3
  %106 = getelementptr inbounds [7 x ptr], ptr %105, i64 0, i64 2
  %107 = load ptr, ptr %106, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %107, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %108, align 8, !tbaa !14
  %109 = load ptr, ptr %8, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %109, i32 0, i32 3
  %111 = getelementptr inbounds [7 x ptr], ptr %110, i64 0, i64 2
  %112 = load ptr, ptr %111, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %112, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %113, align 8, !tbaa !17
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %114, i32 0, i32 3
  %116 = getelementptr inbounds [7 x ptr], ptr %115, i64 0, i64 2
  %117 = load ptr, ptr %116, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %117, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %118, align 8, !tbaa !18
  %119 = load ptr, ptr %8, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %119, i32 0, i32 3
  %121 = getelementptr inbounds [7 x ptr], ptr %120, i64 0, i64 2
  %122 = load ptr, ptr %121, align 8, !tbaa !5
  %123 = load ptr, ptr %11, align 8, !tbaa !5
  %124 = ptrtoint ptr %123 to i32
  %125 = load ptr, ptr %8, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %125, i32 0, i32 0
  %127 = load ptr, ptr %126, align 8, !tbaa !19
  %128 = getelementptr inbounds %struct.TIM_TypeDef, ptr %127, i32 0, i32 19
  %129 = ptrtoint ptr %128 to i32
  %130 = load i32, ptr %13, align 4, !tbaa !9
  %131 = call i32 @HAL_DMA_Start_IT(ptr noundef %122, i32 noundef %124, i32 noundef %129, i32 noundef %130)
  %132 = icmp ne i32 %131, 0
  br i1 %132, label %133, label %134

133:                                              ; preds = %103
  store i32 1, ptr %7, align 4
  br label %281

134:                                              ; preds = %103
  br label %264

135:                                              ; preds = %37
  %136 = load ptr, ptr %8, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %136, i32 0, i32 3
  %138 = getelementptr inbounds [7 x ptr], ptr %137, i64 0, i64 3
  %139 = load ptr, ptr %138, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %139, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %140, align 8, !tbaa !14
  %141 = load ptr, ptr %8, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %141, i32 0, i32 3
  %143 = getelementptr inbounds [7 x ptr], ptr %142, i64 0, i64 3
  %144 = load ptr, ptr %143, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %144, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %145, align 8, !tbaa !17
  %146 = load ptr, ptr %8, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %146, i32 0, i32 3
  %148 = getelementptr inbounds [7 x ptr], ptr %147, i64 0, i64 3
  %149 = load ptr, ptr %148, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %149, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %150, align 8, !tbaa !18
  %151 = load ptr, ptr %8, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %151, i32 0, i32 3
  %153 = getelementptr inbounds [7 x ptr], ptr %152, i64 0, i64 3
  %154 = load ptr, ptr %153, align 8, !tbaa !5
  %155 = load ptr, ptr %11, align 8, !tbaa !5
  %156 = ptrtoint ptr %155 to i32
  %157 = load ptr, ptr %8, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %157, i32 0, i32 0
  %159 = load ptr, ptr %158, align 8, !tbaa !19
  %160 = getelementptr inbounds %struct.TIM_TypeDef, ptr %159, i32 0, i32 19
  %161 = ptrtoint ptr %160 to i32
  %162 = load i32, ptr %13, align 4, !tbaa !9
  %163 = call i32 @HAL_DMA_Start_IT(ptr noundef %154, i32 noundef %156, i32 noundef %161, i32 noundef %162)
  %164 = icmp ne i32 %163, 0
  br i1 %164, label %165, label %166

165:                                              ; preds = %135
  store i32 1, ptr %7, align 4
  br label %281

166:                                              ; preds = %135
  br label %264

167:                                              ; preds = %37
  %168 = load ptr, ptr %8, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %168, i32 0, i32 3
  %170 = getelementptr inbounds [7 x ptr], ptr %169, i64 0, i64 4
  %171 = load ptr, ptr %170, align 8, !tbaa !5
  %172 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %171, i32 0, i32 5
  store ptr @TIM_DMADelayPulseCplt, ptr %172, align 8, !tbaa !14
  %173 = load ptr, ptr %8, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %173, i32 0, i32 3
  %175 = getelementptr inbounds [7 x ptr], ptr %174, i64 0, i64 4
  %176 = load ptr, ptr %175, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %176, i32 0, i32 6
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %177, align 8, !tbaa !17
  %178 = load ptr, ptr %8, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %178, i32 0, i32 3
  %180 = getelementptr inbounds [7 x ptr], ptr %179, i64 0, i64 4
  %181 = load ptr, ptr %180, align 8, !tbaa !5
  %182 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %181, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %182, align 8, !tbaa !18
  %183 = load ptr, ptr %8, align 8, !tbaa !5
  %184 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %183, i32 0, i32 3
  %185 = getelementptr inbounds [7 x ptr], ptr %184, i64 0, i64 4
  %186 = load ptr, ptr %185, align 8, !tbaa !5
  %187 = load ptr, ptr %11, align 8, !tbaa !5
  %188 = ptrtoint ptr %187 to i32
  %189 = load ptr, ptr %8, align 8, !tbaa !5
  %190 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %189, i32 0, i32 0
  %191 = load ptr, ptr %190, align 8, !tbaa !19
  %192 = getelementptr inbounds %struct.TIM_TypeDef, ptr %191, i32 0, i32 19
  %193 = ptrtoint ptr %192 to i32
  %194 = load i32, ptr %13, align 4, !tbaa !9
  %195 = call i32 @HAL_DMA_Start_IT(ptr noundef %186, i32 noundef %188, i32 noundef %193, i32 noundef %194)
  %196 = icmp ne i32 %195, 0
  br i1 %196, label %197, label %198

197:                                              ; preds = %167
  store i32 1, ptr %7, align 4
  br label %281

198:                                              ; preds = %167
  br label %264

199:                                              ; preds = %37
  %200 = load ptr, ptr %8, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %200, i32 0, i32 3
  %202 = getelementptr inbounds [7 x ptr], ptr %201, i64 0, i64 5
  %203 = load ptr, ptr %202, align 8, !tbaa !5
  %204 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %203, i32 0, i32 5
  store ptr @TIMEx_DMACommutationCplt, ptr %204, align 8, !tbaa !14
  %205 = load ptr, ptr %8, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %205, i32 0, i32 3
  %207 = getelementptr inbounds [7 x ptr], ptr %206, i64 0, i64 5
  %208 = load ptr, ptr %207, align 8, !tbaa !5
  %209 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %208, i32 0, i32 6
  store ptr @TIMEx_DMACommutationHalfCplt, ptr %209, align 8, !tbaa !17
  %210 = load ptr, ptr %8, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %210, i32 0, i32 3
  %212 = getelementptr inbounds [7 x ptr], ptr %211, i64 0, i64 5
  %213 = load ptr, ptr %212, align 8, !tbaa !5
  %214 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %213, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %214, align 8, !tbaa !18
  %215 = load ptr, ptr %8, align 8, !tbaa !5
  %216 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %215, i32 0, i32 3
  %217 = getelementptr inbounds [7 x ptr], ptr %216, i64 0, i64 5
  %218 = load ptr, ptr %217, align 8, !tbaa !5
  %219 = load ptr, ptr %11, align 8, !tbaa !5
  %220 = ptrtoint ptr %219 to i32
  %221 = load ptr, ptr %8, align 8, !tbaa !5
  %222 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %221, i32 0, i32 0
  %223 = load ptr, ptr %222, align 8, !tbaa !19
  %224 = getelementptr inbounds %struct.TIM_TypeDef, ptr %223, i32 0, i32 19
  %225 = ptrtoint ptr %224 to i32
  %226 = load i32, ptr %13, align 4, !tbaa !9
  %227 = call i32 @HAL_DMA_Start_IT(ptr noundef %218, i32 noundef %220, i32 noundef %225, i32 noundef %226)
  %228 = icmp ne i32 %227, 0
  br i1 %228, label %229, label %230

229:                                              ; preds = %199
  store i32 1, ptr %7, align 4
  br label %281

230:                                              ; preds = %199
  br label %264

231:                                              ; preds = %37
  %232 = load ptr, ptr %8, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %232, i32 0, i32 3
  %234 = getelementptr inbounds [7 x ptr], ptr %233, i64 0, i64 6
  %235 = load ptr, ptr %234, align 8, !tbaa !5
  %236 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %235, i32 0, i32 5
  store ptr @TIM_DMATriggerCplt, ptr %236, align 8, !tbaa !14
  %237 = load ptr, ptr %8, align 8, !tbaa !5
  %238 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %237, i32 0, i32 3
  %239 = getelementptr inbounds [7 x ptr], ptr %238, i64 0, i64 6
  %240 = load ptr, ptr %239, align 8, !tbaa !5
  %241 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %240, i32 0, i32 6
  store ptr @TIM_DMATriggerHalfCplt, ptr %241, align 8, !tbaa !17
  %242 = load ptr, ptr %8, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %242, i32 0, i32 3
  %244 = getelementptr inbounds [7 x ptr], ptr %243, i64 0, i64 6
  %245 = load ptr, ptr %244, align 8, !tbaa !5
  %246 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %245, i32 0, i32 9
  store ptr @TIM_DMAError, ptr %246, align 8, !tbaa !18
  %247 = load ptr, ptr %8, align 8, !tbaa !5
  %248 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %247, i32 0, i32 3
  %249 = getelementptr inbounds [7 x ptr], ptr %248, i64 0, i64 6
  %250 = load ptr, ptr %249, align 8, !tbaa !5
  %251 = load ptr, ptr %11, align 8, !tbaa !5
  %252 = ptrtoint ptr %251 to i32
  %253 = load ptr, ptr %8, align 8, !tbaa !5
  %254 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %253, i32 0, i32 0
  %255 = load ptr, ptr %254, align 8, !tbaa !19
  %256 = getelementptr inbounds %struct.TIM_TypeDef, ptr %255, i32 0, i32 19
  %257 = ptrtoint ptr %256 to i32
  %258 = load i32, ptr %13, align 4, !tbaa !9
  %259 = call i32 @HAL_DMA_Start_IT(ptr noundef %250, i32 noundef %252, i32 noundef %257, i32 noundef %258)
  %260 = icmp ne i32 %259, 0
  br i1 %260, label %261, label %262

261:                                              ; preds = %231
  store i32 1, ptr %7, align 4
  br label %281

262:                                              ; preds = %231
  br label %264

263:                                              ; preds = %37
  br label %264

264:                                              ; preds = %263, %262, %230, %198, %166, %134, %102, %70
  %265 = load i32, ptr %9, align 4, !tbaa !9
  %266 = load i32, ptr %12, align 4, !tbaa !9
  %267 = or i32 %265, %266
  %268 = load ptr, ptr %8, align 8, !tbaa !5
  %269 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %268, i32 0, i32 0
  %270 = load ptr, ptr %269, align 8, !tbaa !19
  %271 = getelementptr inbounds %struct.TIM_TypeDef, ptr %270, i32 0, i32 18
  store volatile i32 %267, ptr %271, align 4, !tbaa !20
  %272 = load i32, ptr %10, align 4, !tbaa !9
  %273 = load ptr, ptr %8, align 8, !tbaa !5
  %274 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %273, i32 0, i32 0
  %275 = load ptr, ptr %274, align 8, !tbaa !19
  %276 = getelementptr inbounds %struct.TIM_TypeDef, ptr %275, i32 0, i32 3
  %277 = load volatile i32, ptr %276, align 4, !tbaa !22
  %278 = or i32 %277, %272
  store volatile i32 %278, ptr %276, align 4, !tbaa !22
  %279 = load ptr, ptr %8, align 8, !tbaa !5
  %280 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %279, i32 0, i32 5
  store volatile i32 1, ptr %280, align 4, !tbaa !11
  store i32 0, ptr %7, align 4
  br label %281

281:                                              ; preds = %264, %261, %229, %197, %165, %133, %101, %69, %30, %18
  %282 = load i32, ptr %7, align 4
  ret i32 %282
}

declare void @TIMEx_DMACommutationCplt(ptr noundef) #1

declare void @TIMEx_DMACommutationHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerHalfCplt(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 100}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 32, !7, i64 40, !10, i64 96, !10, i64 100}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!14 = !{!15, !6, i64 72}
!15 = !{!"__DMA_HandleTypeDef", !6, i64 0, !16, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!17 = !{!15, !6, i64 80}
!18 = !{!15, !6, i64 104}
!19 = !{!12, !6, i64 0}
!20 = !{!21, !10, i64 72}
!21 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104}
!22 = !{!21, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMAPeriodElapsedHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @TIM_DMADelayPulseHalfCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_TIM_DMABurst_MultiWriteStart(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = getelementptr inbounds i8, ptr %0, i64 100
  %8 = load volatile i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %137, label %10

10:                                               ; preds = %6
  %11 = load volatile i32, ptr %7, align 4, !tbaa !5
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %17

13:                                               ; preds = %10
  %14 = icmp eq ptr %3, null
  %15 = icmp ne i32 %4, 0
  %or.cond = and i1 %14, %15
  br i1 %or.cond, label %137, label %16

16:                                               ; preds = %13
  store volatile i32 2, ptr %7, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %16, %10
  switch i32 %2, label %130 [
    i32 256, label %18
    i32 512, label %34
    i32 1024, label %50
    i32 2048, label %66
    i32 4096, label %82
    i32 8192, label %98
    i32 16384, label %114
  ]

18:                                               ; preds = %17
  %19 = getelementptr inbounds i8, ptr %0, i64 40
  %20 = load ptr, ptr %19, align 8, !tbaa !12
  %21 = getelementptr inbounds i8, ptr %20, i64 72
  store ptr @TIM_DMAPeriodElapsedCplt, ptr %21, align 8, !tbaa !13
  %22 = load ptr, ptr %19, align 8, !tbaa !12
  %23 = getelementptr inbounds i8, ptr %22, i64 80
  store ptr @TIM_DMAPeriodElapsedHalfCplt, ptr %23, align 8, !tbaa !16
  %24 = load ptr, ptr %19, align 8, !tbaa !12
  %25 = getelementptr inbounds i8, ptr %24, i64 104
  store ptr @TIM_DMAError, ptr %25, align 8, !tbaa !17
  %26 = load ptr, ptr %19, align 8, !tbaa !12
  %27 = ptrtoint ptr %3 to i64
  %28 = trunc i64 %27 to i32
  %29 = load ptr, ptr %0, align 8, !tbaa !18
  %30 = getelementptr inbounds i8, ptr %29, i64 76
  %31 = ptrtoint ptr %30 to i64
  %32 = trunc i64 %31 to i32
  %33 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %26, i32 noundef %28, i32 noundef %32, i32 noundef %5) #2
  %.not67 = icmp eq i32 %33, 0
  br i1 %.not67, label %130, label %137

34:                                               ; preds = %17
  %35 = getelementptr inbounds i8, ptr %0, i64 48
  %36 = load ptr, ptr %35, align 8, !tbaa !12
  %37 = getelementptr inbounds i8, ptr %36, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %37, align 8, !tbaa !13
  %38 = load ptr, ptr %35, align 8, !tbaa !12
  %39 = getelementptr inbounds i8, ptr %38, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %39, align 8, !tbaa !16
  %40 = load ptr, ptr %35, align 8, !tbaa !12
  %41 = getelementptr inbounds i8, ptr %40, i64 104
  store ptr @TIM_DMAError, ptr %41, align 8, !tbaa !17
  %42 = load ptr, ptr %35, align 8, !tbaa !12
  %43 = ptrtoint ptr %3 to i64
  %44 = trunc i64 %43 to i32
  %45 = load ptr, ptr %0, align 8, !tbaa !18
  %46 = getelementptr inbounds i8, ptr %45, i64 76
  %47 = ptrtoint ptr %46 to i64
  %48 = trunc i64 %47 to i32
  %49 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %42, i32 noundef %44, i32 noundef %48, i32 noundef %5) #2
  %.not66 = icmp eq i32 %49, 0
  br i1 %.not66, label %130, label %137

50:                                               ; preds = %17
  %51 = getelementptr inbounds i8, ptr %0, i64 56
  %52 = load ptr, ptr %51, align 8, !tbaa !12
  %53 = getelementptr inbounds i8, ptr %52, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %53, align 8, !tbaa !13
  %54 = load ptr, ptr %51, align 8, !tbaa !12
  %55 = getelementptr inbounds i8, ptr %54, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %55, align 8, !tbaa !16
  %56 = load ptr, ptr %51, align 8, !tbaa !12
  %57 = getelementptr inbounds i8, ptr %56, i64 104
  store ptr @TIM_DMAError, ptr %57, align 8, !tbaa !17
  %58 = load ptr, ptr %51, align 8, !tbaa !12
  %59 = ptrtoint ptr %3 to i64
  %60 = trunc i64 %59 to i32
  %61 = load ptr, ptr %0, align 8, !tbaa !18
  %62 = getelementptr inbounds i8, ptr %61, i64 76
  %63 = ptrtoint ptr %62 to i64
  %64 = trunc i64 %63 to i32
  %65 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %58, i32 noundef %60, i32 noundef %64, i32 noundef %5) #2
  %.not65 = icmp eq i32 %65, 0
  br i1 %.not65, label %130, label %137

66:                                               ; preds = %17
  %67 = getelementptr inbounds i8, ptr %0, i64 64
  %68 = load ptr, ptr %67, align 8, !tbaa !12
  %69 = getelementptr inbounds i8, ptr %68, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %69, align 8, !tbaa !13
  %70 = load ptr, ptr %67, align 8, !tbaa !12
  %71 = getelementptr inbounds i8, ptr %70, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %71, align 8, !tbaa !16
  %72 = load ptr, ptr %67, align 8, !tbaa !12
  %73 = getelementptr inbounds i8, ptr %72, i64 104
  store ptr @TIM_DMAError, ptr %73, align 8, !tbaa !17
  %74 = load ptr, ptr %67, align 8, !tbaa !12
  %75 = ptrtoint ptr %3 to i64
  %76 = trunc i64 %75 to i32
  %77 = load ptr, ptr %0, align 8, !tbaa !18
  %78 = getelementptr inbounds i8, ptr %77, i64 76
  %79 = ptrtoint ptr %78 to i64
  %80 = trunc i64 %79 to i32
  %81 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %74, i32 noundef %76, i32 noundef %80, i32 noundef %5) #2
  %.not64 = icmp eq i32 %81, 0
  br i1 %.not64, label %130, label %137

82:                                               ; preds = %17
  %83 = getelementptr inbounds i8, ptr %0, i64 72
  %84 = load ptr, ptr %83, align 8, !tbaa !12
  %85 = getelementptr inbounds i8, ptr %84, i64 72
  store ptr @TIM_DMADelayPulseCplt, ptr %85, align 8, !tbaa !13
  %86 = load ptr, ptr %83, align 8, !tbaa !12
  %87 = getelementptr inbounds i8, ptr %86, i64 80
  store ptr @TIM_DMADelayPulseHalfCplt, ptr %87, align 8, !tbaa !16
  %88 = load ptr, ptr %83, align 8, !tbaa !12
  %89 = getelementptr inbounds i8, ptr %88, i64 104
  store ptr @TIM_DMAError, ptr %89, align 8, !tbaa !17
  %90 = load ptr, ptr %83, align 8, !tbaa !12
  %91 = ptrtoint ptr %3 to i64
  %92 = trunc i64 %91 to i32
  %93 = load ptr, ptr %0, align 8, !tbaa !18
  %94 = getelementptr inbounds i8, ptr %93, i64 76
  %95 = ptrtoint ptr %94 to i64
  %96 = trunc i64 %95 to i32
  %97 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %90, i32 noundef %92, i32 noundef %96, i32 noundef %5) #2
  %.not63 = icmp eq i32 %97, 0
  br i1 %.not63, label %130, label %137

98:                                               ; preds = %17
  %99 = getelementptr inbounds i8, ptr %0, i64 80
  %100 = load ptr, ptr %99, align 8, !tbaa !12
  %101 = getelementptr inbounds i8, ptr %100, i64 72
  store ptr @TIMEx_DMACommutationCplt, ptr %101, align 8, !tbaa !13
  %102 = load ptr, ptr %99, align 8, !tbaa !12
  %103 = getelementptr inbounds i8, ptr %102, i64 80
  store ptr @TIMEx_DMACommutationHalfCplt, ptr %103, align 8, !tbaa !16
  %104 = load ptr, ptr %99, align 8, !tbaa !12
  %105 = getelementptr inbounds i8, ptr %104, i64 104
  store ptr @TIM_DMAError, ptr %105, align 8, !tbaa !17
  %106 = load ptr, ptr %99, align 8, !tbaa !12
  %107 = ptrtoint ptr %3 to i64
  %108 = trunc i64 %107 to i32
  %109 = load ptr, ptr %0, align 8, !tbaa !18
  %110 = getelementptr inbounds i8, ptr %109, i64 76
  %111 = ptrtoint ptr %110 to i64
  %112 = trunc i64 %111 to i32
  %113 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %106, i32 noundef %108, i32 noundef %112, i32 noundef %5) #2
  %.not62 = icmp eq i32 %113, 0
  br i1 %.not62, label %130, label %137

114:                                              ; preds = %17
  %115 = getelementptr inbounds i8, ptr %0, i64 88
  %116 = load ptr, ptr %115, align 8, !tbaa !12
  %117 = getelementptr inbounds i8, ptr %116, i64 72
  store ptr @TIM_DMATriggerCplt, ptr %117, align 8, !tbaa !13
  %118 = load ptr, ptr %115, align 8, !tbaa !12
  %119 = getelementptr inbounds i8, ptr %118, i64 80
  store ptr @TIM_DMATriggerHalfCplt, ptr %119, align 8, !tbaa !16
  %120 = load ptr, ptr %115, align 8, !tbaa !12
  %121 = getelementptr inbounds i8, ptr %120, i64 104
  store ptr @TIM_DMAError, ptr %121, align 8, !tbaa !17
  %122 = load ptr, ptr %115, align 8, !tbaa !12
  %123 = ptrtoint ptr %3 to i64
  %124 = trunc i64 %123 to i32
  %125 = load ptr, ptr %0, align 8, !tbaa !18
  %126 = getelementptr inbounds i8, ptr %125, i64 76
  %127 = ptrtoint ptr %126 to i64
  %128 = trunc i64 %127 to i32
  %129 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %122, i32 noundef %124, i32 noundef %128, i32 noundef %5) #2
  %.not = icmp eq i32 %129, 0
  br i1 %.not, label %130, label %137

130:                                              ; preds = %17, %114, %98, %82, %66, %50, %34, %18
  %131 = or i32 %4, %1
  %132 = load ptr, ptr %0, align 8, !tbaa !18
  %133 = getelementptr inbounds i8, ptr %132, i64 72
  store volatile i32 %131, ptr %133, align 4, !tbaa !19
  %134 = getelementptr inbounds i8, ptr %132, i64 12
  %135 = load volatile i32, ptr %134, align 4, !tbaa !21
  %136 = or i32 %135, %2
  store volatile i32 %136, ptr %134, align 4, !tbaa !21
  store volatile i32 1, ptr %7, align 4, !tbaa !5
  br label %137

137:                                              ; preds = %114, %98, %82, %66, %50, %34, %18, %13, %6, %130
  %.0 = phi i32 [ 0, %130 ], [ 2, %6 ], [ 1, %13 ], [ 1, %18 ], [ 1, %34 ], [ 1, %50 ], [ 1, %66 ], [ 1, %82 ], [ 1, %98 ], [ 1, %114 ]
  ret i32 %.0
}

declare void @TIMEx_DMACommutationCplt(ptr noundef) #1

declare void @TIMEx_DMACommutationHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @TIM_DMATriggerHalfCplt(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 100}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 72}
!14 = !{!"__DMA_HandleTypeDef", !7, i64 0, !15, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!16 = !{!14, !7, i64 80}
!17 = !{!14, !7, i64 104}
!18 = !{!6, !7, i64 0}
!19 = !{!20, !11, i64 72}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104}
!21 = !{!20, !11, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass