; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ContextSaving)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HASH_TypeDef = type { i32, i32, i32, [5 x i32], i32, i32, [52 x i32], [54 x i32] }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_HASH_ContextSaving(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = ptrtoint ptr %8 to i32
  store i32 %9, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 ptrtoint (ptr getelementptr inbounds (%struct.HASH_TypeDef, ptr inttoptr (i64 1208095744 to ptr), i32 0, i32 7) to i32), ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = load volatile i32, ptr getelementptr inbounds (%struct.HASH_TypeDef, ptr inttoptr (i64 1208095744 to ptr), i32 0, i32 4), align 4, !tbaa !11
  %12 = zext i32 %11 to i64
  %13 = and i64 %12, 3
  %14 = trunc i64 %13 to i32
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = zext i32 %15 to i64
  %17 = inttoptr i64 %16 to ptr
  store i32 %14, ptr %17, align 4, !tbaa !9
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = add i32 %18, 4
  store i32 %19, ptr %5, align 4, !tbaa !9
  %20 = load volatile i32, ptr getelementptr inbounds (%struct.HASH_TypeDef, ptr inttoptr (i64 1208095744 to ptr), i32 0, i32 2), align 4, !tbaa !13
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, 31
  %23 = trunc i64 %22 to i32
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = zext i32 %24 to i64
  %26 = inttoptr i64 %25 to ptr
  store i32 %23, ptr %26, align 4, !tbaa !9
  %27 = load i32, ptr %5, align 4, !tbaa !9
  %28 = add i32 %27, 4
  store i32 %28, ptr %5, align 4, !tbaa !9
  %29 = load volatile i32, ptr inttoptr (i64 1208095744 to ptr), align 4, !tbaa !14
  %30 = zext i32 %29 to i64
  %31 = and i64 %30, 336120
  %32 = trunc i64 %31 to i32
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = inttoptr i64 %34 to ptr
  store i32 %32, ptr %35, align 4, !tbaa !9
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = add i32 %36, 4
  store i32 %37, ptr %5, align 4, !tbaa !9
  store i32 54, ptr %7, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %53, %2
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = icmp ugt i32 %39, 0
  br i1 %40, label %41, label %56

41:                                               ; preds = %38
  %42 = load i32, ptr %6, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = inttoptr i64 %43 to ptr
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = inttoptr i64 %47 to ptr
  store i32 %45, ptr %48, align 4, !tbaa !9
  %49 = load i32, ptr %5, align 4, !tbaa !9
  %50 = add i32 %49, 4
  store i32 %50, ptr %5, align 4, !tbaa !9
  %51 = load i32, ptr %6, align 4, !tbaa !9
  %52 = add i32 %51, 4
  store i32 %52, ptr %6, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %41
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = add i32 %54, -1
  store i32 %55, ptr %7, align 4, !tbaa !9
  br label %38, !llvm.loop !15

56:                                               ; preds = %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 32}
!12 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !7, i64 12, !10, i64 32, !10, i64 36, !7, i64 40, !7, i64 248}
!13 = !{!12, !10, i64 8}
!14 = !{!12, !10, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local void @HAL_HASH_ContextSaving(ptr nocapture noundef readnone %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = ptrtoint ptr %1 to i64
  %4 = load volatile i32, ptr inttoptr (i64 1208095776 to ptr), align 32, !tbaa !5
  %5 = and i32 %4, 3
  %6 = and i64 %3, 4294967295
  %7 = inttoptr i64 %6 to ptr
  store i32 %5, ptr %7, align 4, !tbaa !10
  %8 = add i64 %3, 4
  %9 = load volatile i32, ptr inttoptr (i64 1208095752 to ptr), align 8, !tbaa !11
  %10 = and i32 %9, 31
  %11 = and i64 %8, 4294967295
  %12 = inttoptr i64 %11 to ptr
  store i32 %10, ptr %12, align 4, !tbaa !10
  %13 = add i64 %3, 8
  %14 = load volatile i32, ptr inttoptr (i64 1208095744 to ptr), align 1024, !tbaa !12
  %15 = and i32 %14, 336120
  %16 = and i64 %13, 4294967295
  %17 = inttoptr i64 %16 to ptr
  store i32 %15, ptr %17, align 4, !tbaa !10
  %18 = add i64 %3, 12
  %19 = load i32, ptr inttoptr (i64 1208095992 to ptr), align 8, !tbaa !10
  %20 = and i64 %18, 4294967295
  %21 = inttoptr i64 %20 to ptr
  store i32 %19, ptr %21, align 4, !tbaa !10
  %22 = add i64 %3, 16
  %23 = load i32, ptr inttoptr (i64 1208095996 to ptr), align 4, !tbaa !10
  %24 = and i64 %22, 4294967295
  %25 = inttoptr i64 %24 to ptr
  store i32 %23, ptr %25, align 4, !tbaa !10
  %26 = add i64 %3, 20
  %27 = load i32, ptr inttoptr (i64 1208096000 to ptr), align 256, !tbaa !10
  %28 = and i64 %26, 4294967295
  %29 = inttoptr i64 %28 to ptr
  store i32 %27, ptr %29, align 4, !tbaa !10
  %30 = add i64 %3, 24
  %31 = load i32, ptr inttoptr (i64 1208096004 to ptr), align 4, !tbaa !10
  %32 = and i64 %30, 4294967295
  %33 = inttoptr i64 %32 to ptr
  store i32 %31, ptr %33, align 4, !tbaa !10
  %34 = add i64 %3, 28
  %35 = load i32, ptr inttoptr (i64 1208096008 to ptr), align 8, !tbaa !10
  %36 = and i64 %34, 4294967295
  %37 = inttoptr i64 %36 to ptr
  store i32 %35, ptr %37, align 4, !tbaa !10
  %38 = add i64 %3, 32
  %39 = load i32, ptr inttoptr (i64 1208096012 to ptr), align 4, !tbaa !10
  %40 = and i64 %38, 4294967295
  %41 = inttoptr i64 %40 to ptr
  store i32 %39, ptr %41, align 4, !tbaa !10
  %42 = add i64 %3, 36
  %43 = load i32, ptr inttoptr (i64 1208096016 to ptr), align 16, !tbaa !10
  %44 = and i64 %42, 4294967295
  %45 = inttoptr i64 %44 to ptr
  store i32 %43, ptr %45, align 4, !tbaa !10
  %46 = add i64 %3, 40
  %47 = load i32, ptr inttoptr (i64 1208096020 to ptr), align 4, !tbaa !10
  %48 = and i64 %46, 4294967295
  %49 = inttoptr i64 %48 to ptr
  store i32 %47, ptr %49, align 4, !tbaa !10
  %50 = add i64 %3, 44
  %51 = load i32, ptr inttoptr (i64 1208096024 to ptr), align 8, !tbaa !10
  %52 = and i64 %50, 4294967295
  %53 = inttoptr i64 %52 to ptr
  store i32 %51, ptr %53, align 4, !tbaa !10
  %54 = add i64 %3, 48
  %55 = load i32, ptr inttoptr (i64 1208096028 to ptr), align 4, !tbaa !10
  %56 = and i64 %54, 4294967295
  %57 = inttoptr i64 %56 to ptr
  store i32 %55, ptr %57, align 4, !tbaa !10
  %58 = add i64 %3, 52
  %59 = load i32, ptr inttoptr (i64 1208096032 to ptr), align 32, !tbaa !10
  %60 = and i64 %58, 4294967295
  %61 = inttoptr i64 %60 to ptr
  store i32 %59, ptr %61, align 4, !tbaa !10
  %62 = add i64 %3, 56
  %63 = load i32, ptr inttoptr (i64 1208096036 to ptr), align 4, !tbaa !10
  %64 = and i64 %62, 4294967295
  %65 = inttoptr i64 %64 to ptr
  store i32 %63, ptr %65, align 4, !tbaa !10
  %66 = add i64 %3, 60
  %67 = load i32, ptr inttoptr (i64 1208096040 to ptr), align 8, !tbaa !10
  %68 = and i64 %66, 4294967295
  %69 = inttoptr i64 %68 to ptr
  store i32 %67, ptr %69, align 4, !tbaa !10
  %70 = add i64 %3, 64
  %71 = load i32, ptr inttoptr (i64 1208096044 to ptr), align 4, !tbaa !10
  %72 = and i64 %70, 4294967295
  %73 = inttoptr i64 %72 to ptr
  store i32 %71, ptr %73, align 4, !tbaa !10
  %74 = add i64 %3, 68
  %75 = load i32, ptr inttoptr (i64 1208096048 to ptr), align 16, !tbaa !10
  %76 = and i64 %74, 4294967295
  %77 = inttoptr i64 %76 to ptr
  store i32 %75, ptr %77, align 4, !tbaa !10
  %78 = add i64 %3, 72
  %79 = load i32, ptr inttoptr (i64 1208096052 to ptr), align 4, !tbaa !10
  %80 = and i64 %78, 4294967295
  %81 = inttoptr i64 %80 to ptr
  store i32 %79, ptr %81, align 4, !tbaa !10
  %82 = add i64 %3, 76
  %83 = load i32, ptr inttoptr (i64 1208096056 to ptr), align 8, !tbaa !10
  %84 = and i64 %82, 4294967295
  %85 = inttoptr i64 %84 to ptr
  store i32 %83, ptr %85, align 4, !tbaa !10
  %86 = add i64 %3, 80
  %87 = load i32, ptr inttoptr (i64 1208096060 to ptr), align 4, !tbaa !10
  %88 = and i64 %86, 4294967295
  %89 = inttoptr i64 %88 to ptr
  store i32 %87, ptr %89, align 4, !tbaa !10
  %90 = add i64 %3, 84
  %91 = load i32, ptr inttoptr (i64 1208096064 to ptr), align 64, !tbaa !10
  %92 = and i64 %90, 4294967295
  %93 = inttoptr i64 %92 to ptr
  store i32 %91, ptr %93, align 4, !tbaa !10
  %94 = add i64 %3, 88
  %95 = load i32, ptr inttoptr (i64 1208096068 to ptr), align 4, !tbaa !10
  %96 = and i64 %94, 4294967295
  %97 = inttoptr i64 %96 to ptr
  store i32 %95, ptr %97, align 4, !tbaa !10
  %98 = add i64 %3, 92
  %99 = load i32, ptr inttoptr (i64 1208096072 to ptr), align 8, !tbaa !10
  %100 = and i64 %98, 4294967295
  %101 = inttoptr i64 %100 to ptr
  store i32 %99, ptr %101, align 4, !tbaa !10
  %102 = add i64 %3, 96
  %103 = load i32, ptr inttoptr (i64 1208096076 to ptr), align 4, !tbaa !10
  %104 = and i64 %102, 4294967295
  %105 = inttoptr i64 %104 to ptr
  store i32 %103, ptr %105, align 4, !tbaa !10
  %106 = add i64 %3, 100
  %107 = load i32, ptr inttoptr (i64 1208096080 to ptr), align 16, !tbaa !10
  %108 = and i64 %106, 4294967295
  %109 = inttoptr i64 %108 to ptr
  store i32 %107, ptr %109, align 4, !tbaa !10
  %110 = add i64 %3, 104
  %111 = load i32, ptr inttoptr (i64 1208096084 to ptr), align 4, !tbaa !10
  %112 = and i64 %110, 4294967295
  %113 = inttoptr i64 %112 to ptr
  store i32 %111, ptr %113, align 4, !tbaa !10
  %114 = add i64 %3, 108
  %115 = load i32, ptr inttoptr (i64 1208096088 to ptr), align 8, !tbaa !10
  %116 = and i64 %114, 4294967295
  %117 = inttoptr i64 %116 to ptr
  store i32 %115, ptr %117, align 4, !tbaa !10
  %118 = add i64 %3, 112
  %119 = load i32, ptr inttoptr (i64 1208096092 to ptr), align 4, !tbaa !10
  %120 = and i64 %118, 4294967295
  %121 = inttoptr i64 %120 to ptr
  store i32 %119, ptr %121, align 4, !tbaa !10
  %122 = add i64 %3, 116
  %123 = load i32, ptr inttoptr (i64 1208096096 to ptr), align 32, !tbaa !10
  %124 = and i64 %122, 4294967295
  %125 = inttoptr i64 %124 to ptr
  store i32 %123, ptr %125, align 4, !tbaa !10
  %126 = add i64 %3, 120
  %127 = load i32, ptr inttoptr (i64 1208096100 to ptr), align 4, !tbaa !10
  %128 = and i64 %126, 4294967295
  %129 = inttoptr i64 %128 to ptr
  store i32 %127, ptr %129, align 4, !tbaa !10
  %130 = add i64 %3, 124
  %131 = load i32, ptr inttoptr (i64 1208096104 to ptr), align 8, !tbaa !10
  %132 = and i64 %130, 4294967295
  %133 = inttoptr i64 %132 to ptr
  store i32 %131, ptr %133, align 4, !tbaa !10
  %134 = add i64 %3, 128
  %135 = load i32, ptr inttoptr (i64 1208096108 to ptr), align 4, !tbaa !10
  %136 = and i64 %134, 4294967295
  %137 = inttoptr i64 %136 to ptr
  store i32 %135, ptr %137, align 4, !tbaa !10
  %138 = add i64 %3, 132
  %139 = load i32, ptr inttoptr (i64 1208096112 to ptr), align 16, !tbaa !10
  %140 = and i64 %138, 4294967295
  %141 = inttoptr i64 %140 to ptr
  store i32 %139, ptr %141, align 4, !tbaa !10
  %142 = add i64 %3, 136
  %143 = load i32, ptr inttoptr (i64 1208096116 to ptr), align 4, !tbaa !10
  %144 = and i64 %142, 4294967295
  %145 = inttoptr i64 %144 to ptr
  store i32 %143, ptr %145, align 4, !tbaa !10
  %146 = add i64 %3, 140
  %147 = load i32, ptr inttoptr (i64 1208096120 to ptr), align 8, !tbaa !10
  %148 = and i64 %146, 4294967295
  %149 = inttoptr i64 %148 to ptr
  store i32 %147, ptr %149, align 4, !tbaa !10
  %150 = add i64 %3, 144
  %151 = load i32, ptr inttoptr (i64 1208096124 to ptr), align 4, !tbaa !10
  %152 = and i64 %150, 4294967295
  %153 = inttoptr i64 %152 to ptr
  store i32 %151, ptr %153, align 4, !tbaa !10
  %154 = add i64 %3, 148
  %155 = load i32, ptr inttoptr (i64 1208096128 to ptr), align 128, !tbaa !10
  %156 = and i64 %154, 4294967295
  %157 = inttoptr i64 %156 to ptr
  store i32 %155, ptr %157, align 4, !tbaa !10
  %158 = add i64 %3, 152
  %159 = load i32, ptr inttoptr (i64 1208096132 to ptr), align 4, !tbaa !10
  %160 = and i64 %158, 4294967295
  %161 = inttoptr i64 %160 to ptr
  store i32 %159, ptr %161, align 4, !tbaa !10
  %162 = add i64 %3, 156
  %163 = load i32, ptr inttoptr (i64 1208096136 to ptr), align 8, !tbaa !10
  %164 = and i64 %162, 4294967295
  %165 = inttoptr i64 %164 to ptr
  store i32 %163, ptr %165, align 4, !tbaa !10
  %166 = add i64 %3, 160
  %167 = load i32, ptr inttoptr (i64 1208096140 to ptr), align 4, !tbaa !10
  %168 = and i64 %166, 4294967295
  %169 = inttoptr i64 %168 to ptr
  store i32 %167, ptr %169, align 4, !tbaa !10
  %170 = add i64 %3, 164
  %171 = load i32, ptr inttoptr (i64 1208096144 to ptr), align 16, !tbaa !10
  %172 = and i64 %170, 4294967295
  %173 = inttoptr i64 %172 to ptr
  store i32 %171, ptr %173, align 4, !tbaa !10
  %174 = add i64 %3, 168
  %175 = load i32, ptr inttoptr (i64 1208096148 to ptr), align 4, !tbaa !10
  %176 = and i64 %174, 4294967295
  %177 = inttoptr i64 %176 to ptr
  store i32 %175, ptr %177, align 4, !tbaa !10
  %178 = add i64 %3, 172
  %179 = load i32, ptr inttoptr (i64 1208096152 to ptr), align 8, !tbaa !10
  %180 = and i64 %178, 4294967295
  %181 = inttoptr i64 %180 to ptr
  store i32 %179, ptr %181, align 4, !tbaa !10
  %182 = add i64 %3, 176
  %183 = load i32, ptr inttoptr (i64 1208096156 to ptr), align 4, !tbaa !10
  %184 = and i64 %182, 4294967295
  %185 = inttoptr i64 %184 to ptr
  store i32 %183, ptr %185, align 4, !tbaa !10
  %186 = add i64 %3, 180
  %187 = load i32, ptr inttoptr (i64 1208096160 to ptr), align 32, !tbaa !10
  %188 = and i64 %186, 4294967295
  %189 = inttoptr i64 %188 to ptr
  store i32 %187, ptr %189, align 4, !tbaa !10
  %190 = add i64 %3, 184
  %191 = load i32, ptr inttoptr (i64 1208096164 to ptr), align 4, !tbaa !10
  %192 = and i64 %190, 4294967295
  %193 = inttoptr i64 %192 to ptr
  store i32 %191, ptr %193, align 4, !tbaa !10
  %194 = add i64 %3, 188
  %195 = load i32, ptr inttoptr (i64 1208096168 to ptr), align 8, !tbaa !10
  %196 = and i64 %194, 4294967295
  %197 = inttoptr i64 %196 to ptr
  store i32 %195, ptr %197, align 4, !tbaa !10
  %198 = add i64 %3, 192
  %199 = load i32, ptr inttoptr (i64 1208096172 to ptr), align 4, !tbaa !10
  %200 = and i64 %198, 4294967295
  %201 = inttoptr i64 %200 to ptr
  store i32 %199, ptr %201, align 4, !tbaa !10
  %202 = add i64 %3, 196
  %203 = load i32, ptr inttoptr (i64 1208096176 to ptr), align 16, !tbaa !10
  %204 = and i64 %202, 4294967295
  %205 = inttoptr i64 %204 to ptr
  store i32 %203, ptr %205, align 4, !tbaa !10
  %206 = add i64 %3, 200
  %207 = load i32, ptr inttoptr (i64 1208096180 to ptr), align 4, !tbaa !10
  %208 = and i64 %206, 4294967295
  %209 = inttoptr i64 %208 to ptr
  store i32 %207, ptr %209, align 4, !tbaa !10
  %210 = add i64 %3, 204
  %211 = load i32, ptr inttoptr (i64 1208096184 to ptr), align 8, !tbaa !10
  %212 = and i64 %210, 4294967295
  %213 = inttoptr i64 %212 to ptr
  store i32 %211, ptr %213, align 4, !tbaa !10
  %214 = add i64 %3, 208
  %215 = load i32, ptr inttoptr (i64 1208096188 to ptr), align 4, !tbaa !10
  %216 = and i64 %214, 4294967295
  %217 = inttoptr i64 %216 to ptr
  store i32 %215, ptr %217, align 4, !tbaa !10
  %218 = add i64 %3, 212
  %219 = load i32, ptr inttoptr (i64 1208096192 to ptr), align 64, !tbaa !10
  %220 = and i64 %218, 4294967295
  %221 = inttoptr i64 %220 to ptr
  store i32 %219, ptr %221, align 4, !tbaa !10
  %222 = add i64 %3, 216
  %223 = load i32, ptr inttoptr (i64 1208096196 to ptr), align 4, !tbaa !10
  %224 = and i64 %222, 4294967295
  %225 = inttoptr i64 %224 to ptr
  store i32 %223, ptr %225, align 4, !tbaa !10
  %226 = add i64 %3, 220
  %227 = load i32, ptr inttoptr (i64 1208096200 to ptr), align 8, !tbaa !10
  %228 = and i64 %226, 4294967295
  %229 = inttoptr i64 %228 to ptr
  store i32 %227, ptr %229, align 4, !tbaa !10
  %230 = add i64 %3, 224
  %231 = load i32, ptr inttoptr (i64 1208096204 to ptr), align 4, !tbaa !10
  %232 = and i64 %230, 4294967295
  %233 = inttoptr i64 %232 to ptr
  store i32 %231, ptr %233, align 4, !tbaa !10
  ret void
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !7, i64 32, !7, i64 36, !8, i64 40, !8, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 0}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass