; LLVM IR from liyuming1978/NativeLibCompression :: DecRawso/jni/7zC (CpuArch)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Cx86cpuid = type { i32, [3 x i32], i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @x86cpuid_CheckAndRead(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @x86cpuid_GetFirm(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @CPU_Is_InOrder() #0 {
  %1 = alloca i32, align 4
  %2 = alloca %struct.Cx86cpuid, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 32, ptr %2) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %7 = call i32 @x86cpuid_CheckAndRead(ptr noundef %2)
  %8 = icmp ne i32 %7, 0
  br i1 %8, label %10, label %9

9:                                                ; preds = %0
  store i32 1, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %69

10:                                               ; preds = %0
  %11 = getelementptr inbounds %struct.Cx86cpuid, ptr %2, i32 0, i32 2
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = lshr i32 %12, 8
  %14 = and i32 %13, 1044495
  store i32 %14, ptr %4, align 4, !tbaa !10
  %15 = getelementptr inbounds %struct.Cx86cpuid, ptr %2, i32 0, i32 2
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = lshr i32 %16, 4
  %18 = and i32 %17, 61455
  store i32 %18, ptr %5, align 4, !tbaa !10
  %19 = call i32 @x86cpuid_GetFirm(ptr noundef %2)
  store i32 %19, ptr %3, align 4, !tbaa !10
  %20 = load i32, ptr %3, align 4, !tbaa !10
  switch i32 %20, label %68 [
    i32 0, label %21
    i32 1, label %35
    i32 2, label %54
  ]

21:                                               ; preds = %10
  %22 = load i32, ptr %4, align 4, !tbaa !10
  %23 = icmp ult i32 %22, 6
  br i1 %23, label %32, label %24

24:                                               ; preds = %21
  %25 = load i32, ptr %4, align 4, !tbaa !10
  %26 = icmp eq i32 %25, 6
  br i1 %26, label %27, label %30

27:                                               ; preds = %24
  %28 = load i32, ptr %5, align 4, !tbaa !10
  %29 = icmp eq i32 %28, 4108
  br label %30

30:                                               ; preds = %27, %24
  %31 = phi i1 [ false, %24 ], [ %29, %27 ]
  br label %32

32:                                               ; preds = %30, %21
  %33 = phi i1 [ true, %21 ], [ %31, %30 ]
  %34 = zext i1 %33 to i32
  store i32 %34, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %69

35:                                               ; preds = %10
  %36 = load i32, ptr %4, align 4, !tbaa !10
  %37 = icmp ult i32 %36, 5
  br i1 %37, label %51, label %38

38:                                               ; preds = %35
  %39 = load i32, ptr %4, align 4, !tbaa !10
  %40 = icmp eq i32 %39, 5
  br i1 %40, label %41, label %49

41:                                               ; preds = %38
  %42 = load i32, ptr %5, align 4, !tbaa !10
  %43 = icmp ult i32 %42, 6
  br i1 %43, label %47, label %44

44:                                               ; preds = %41
  %45 = load i32, ptr %5, align 4, !tbaa !10
  %46 = icmp eq i32 %45, 10
  br label %47

47:                                               ; preds = %44, %41
  %48 = phi i1 [ true, %41 ], [ %46, %44 ]
  br label %49

49:                                               ; preds = %47, %38
  %50 = phi i1 [ false, %38 ], [ %48, %47 ]
  br label %51

51:                                               ; preds = %49, %35
  %52 = phi i1 [ true, %35 ], [ %50, %49 ]
  %53 = zext i1 %52 to i32
  store i32 %53, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %69

54:                                               ; preds = %10
  %55 = load i32, ptr %4, align 4, !tbaa !10
  %56 = icmp ult i32 %55, 6
  br i1 %56, label %65, label %57

57:                                               ; preds = %54
  %58 = load i32, ptr %4, align 4, !tbaa !10
  %59 = icmp eq i32 %58, 6
  br i1 %59, label %60, label %63

60:                                               ; preds = %57
  %61 = load i32, ptr %5, align 4, !tbaa !10
  %62 = icmp ult i32 %61, 15
  br label %63

63:                                               ; preds = %60, %57
  %64 = phi i1 [ false, %57 ], [ %62, %60 ]
  br label %65

65:                                               ; preds = %63, %54
  %66 = phi i1 [ true, %54 ], [ %64, %63 ]
  %67 = zext i1 %66 to i32
  store i32 %67, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %69

68:                                               ; preds = %10
  store i32 1, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %69

69:                                               ; preds = %68, %65, %51, %32, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 32, ptr %2) #2
  %70 = load i32, ptr %1, align 4
  ret i32 %70
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Cx86cpuid = type { i32, [3 x i32], i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @x86cpuid_CheckAndRead(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @x86cpuid_GetFirm(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @CPU_Is_InOrder() local_unnamed_addr #0 {
  %1 = alloca %struct.Cx86cpuid, align 4
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %1) #2
  %2 = call i32 @x86cpuid_CheckAndRead(ptr noundef nonnull %1)
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %29, label %3

3:                                                ; preds = %0
  %4 = getelementptr inbounds i8, ptr %1, i64 16
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = lshr i32 %5, 8
  %7 = and i32 %6, 1044495
  %8 = lshr i32 %5, 4
  %9 = and i32 %8, 61455
  %10 = call i32 @x86cpuid_GetFirm(ptr noundef nonnull %1)
  switch i32 %10, label %29 [
    i32 0, label %11
    i32 1, label %16
    i32 2, label %24
  ]

11:                                               ; preds = %3
  %12 = icmp ult i32 %7, 6
  %13 = icmp eq i32 %7, 6
  %14 = icmp eq i32 %9, 4108
  %15 = select i1 %13, i1 %14, i1 false
  %narrow13 = select i1 %12, i1 true, i1 %15
  br label %29

16:                                               ; preds = %3
  %17 = icmp ult i32 %7, 5
  br i1 %17, label %29, label %18

18:                                               ; preds = %16
  %19 = icmp eq i32 %7, 5
  br i1 %19, label %20, label %29

20:                                               ; preds = %18
  %21 = icmp ult i32 %9, 6
  %22 = icmp eq i32 %9, 10
  %23 = or i1 %21, %22
  br label %29

24:                                               ; preds = %3
  %25 = icmp ult i32 %7, 6
  %26 = icmp eq i32 %7, 6
  %27 = icmp ult i32 %9, 15
  %28 = select i1 %26, i1 %27, i1 false
  %narrow = select i1 %25, i1 true, i1 %28
  br label %29

29:                                               ; preds = %3, %16, %20, %18, %0, %24, %11
  %.0.shrunk = phi i1 [ %narrow, %24 ], [ %narrow13, %11 ], [ true, %0 ], [ true, %16 ], [ false, %18 ], [ %23, %20 ], [ true, %3 ]
  %.0 = zext i1 %.0.shrunk to i32
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %1) #2
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass