; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @SDMMC_Init(ptr noundef %0, ptr noundef byval(%struct.SDMMC_InitTypeDef) align 8 %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  %5 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %1, i32 0, i32 0
  %6 = load i32, ptr %5, align 8, !tbaa !11
  %7 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %1, i32 0, i32 1
  %8 = load i32, ptr %7, align 4, !tbaa !13
  %9 = or i32 %6, %8
  %10 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %1, i32 0, i32 2
  %11 = load i32, ptr %10, align 8, !tbaa !14
  %12 = or i32 %9, %11
  %13 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %1, i32 0, i32 3
  %14 = load i32, ptr %13, align 4, !tbaa !15
  %15 = or i32 %12, %14
  %16 = getelementptr inbounds %struct.SDMMC_InitTypeDef, ptr %1, i32 0, i32 4
  %17 = load i32, ptr %16, align 8, !tbaa !16
  %18 = or i32 %15, %17
  %19 = load i32, ptr %4, align 4, !tbaa !9
  %20 = or i32 %19, %18
  store i32 %20, ptr %4, align 4, !tbaa !9
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %21, i32 0, i32 1
  %23 = load volatile i32, ptr %22, align 4, !tbaa !17
  %24 = and i32 %23, -4183040
  %25 = load i32, ptr %4, align 4, !tbaa !9
  %26 = or i32 %24, %25
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %27, i32 0, i32 1
  store volatile i32 %26, ptr %28, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!13 = !{!12, !10, i64 4}
!14 = !{!12, !10, i64 8}
!15 = !{!12, !10, i64 12}
!16 = !{!12, !10, i64 16}
!17 = !{!18, !10, i64 4}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable
define dso_local noundef i32 @SDMMC_Init(ptr noundef %0, ptr nocapture noundef readonly byval(%struct.SDMMC_InitTypeDef) align 8 %1) local_unnamed_addr #0 {
  %3 = load <4 x i32>, ptr %1, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %1, i64 16
  %5 = load i32, ptr %4, align 8, !tbaa !9
  %6 = getelementptr inbounds i8, ptr %0, i64 4
  %7 = load volatile i32, ptr %6, align 4, !tbaa !11
  %8 = and i32 %7, -4183040
  %9 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %3)
  %op.rdx = or i32 %9, %5
  %op.rdx3 = or i32 %op.rdx, %8
  store volatile i32 %op.rdx3, ptr %6, align 4, !tbaa !11
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #1

attributes #0 = { nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !7, i64 68, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !7, i64 96, !6, i64 128, !7, i64 132, !6, i64 1020}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,TailCallElimPass