; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/MAY2021-Long/ISS.ll (ZN5sieve5sieveEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZN5sieve2psE = external dso_local global %"class.std::vector", align 8
@_ZN5sieve3iscE = external dso_local global [4000002 x i8], align 16
@_ZN5sieve3phiE = external dso_local global [4000002 x i64], align 16
@_ZN5sieve1fE = external dso_local global [4000002 x i64], align 16
@_ZN5sieve1eE = external dso_local global [4000002 x i64], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sieve5sieveEv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i64 1, ptr getelementptr inbounds ([4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 1), align 8, !tbaa !5
  store i64 1, ptr getelementptr inbounds ([4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 1), align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 2, ptr %1, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %177, %0
  %7 = load i32, ptr %1, align 4, !tbaa !9
  %8 = icmp slt i32 %7, 4000002
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %180

10:                                               ; preds = %6
  %11 = load i32, ptr %1, align 4, !tbaa !9
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [4000002 x i8], ptr @_ZN5sieve3iscE, i64 0, i64 %12
  %14 = load i8, ptr %13, align 1, !tbaa !11, !range !13, !noundef !14
  %15 = trunc i8 %14 to i1
  br i1 %15, label %33, label %16

16:                                               ; preds = %10
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %17 = load i32, ptr %1, align 4, !tbaa !9
  %18 = sub nsw i32 %17, 1
  %19 = sext i32 %18 to i64
  %20 = load i32, ptr %1, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %21
  store i64 %19, ptr %22, align 8, !tbaa !5
  %23 = load i32, ptr %1, align 4, !tbaa !9
  %24 = mul nsw i32 2, %23
  %25 = sub nsw i32 %24, 1
  %26 = sext i32 %25 to i64
  %27 = load i32, ptr %1, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %28
  store i64 %26, ptr %29, align 8, !tbaa !5
  %30 = load i32, ptr %1, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %31
  store i64 1, ptr %32, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %16, %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %172, %33
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE) #4
  %38 = icmp ult i64 %36, %37
  br i1 %38, label %39, label %47

39:                                               ; preds = %34
  %40 = load i32, ptr %1, align 4, !tbaa !9
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %42) #4
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = mul nsw i32 %40, %44
  store i32 %45, ptr %3, align 4, !tbaa !9
  %46 = icmp slt i32 %45, 4000002
  br label %47

47:                                               ; preds = %39, %34
  %48 = phi i1 [ false, %34 ], [ %46, %39 ]
  br i1 %48, label %50, label %49

49:                                               ; preds = %47
  store i32 5, ptr %2, align 4
  br label %175

50:                                               ; preds = %47
  %51 = load i32, ptr %3, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [4000002 x i8], ptr @_ZN5sieve3iscE, i64 0, i64 %52
  store i8 1, ptr %53, align 1, !tbaa !11
  %54 = load i32, ptr %1, align 4, !tbaa !9
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %56) #4
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = srem i32 %54, %58
  %60 = icmp eq i32 %59, 0
  br i1 %60, label %61, label %137

61:                                               ; preds = %50
  %62 = load i32, ptr %1, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %63
  %65 = load i64, ptr %64, align 8, !tbaa !5
  %66 = load i32, ptr %4, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %67) #4
  %69 = load i32, ptr %68, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = mul nsw i64 %65, %70
  %72 = load i32, ptr %3, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %73
  store i64 %71, ptr %74, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %75 = load i32, ptr %4, align 4, !tbaa !9
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %76) #4
  %78 = load i32, ptr %77, align 4, !tbaa !9
  %79 = sitofp i32 %78 to x86_fp80
  %80 = load i32, ptr %1, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %81
  %83 = load i64, ptr %82, align 8, !tbaa !5
  %84 = sitofp i64 %83 to x86_fp80
  %85 = call x86_fp80 @powl(x86_fp80 noundef %79, x86_fp80 noundef %84) #4
  %86 = call noundef x86_fp80 @_ZSt5rounde(x86_fp80 noundef %85)
  %87 = fptosi x86_fp80 %86 to i32
  store i32 %87, ptr %5, align 4, !tbaa !9
  %88 = load i32, ptr %1, align 4, !tbaa !9
  %89 = load i32, ptr %5, align 4, !tbaa !9
  %90 = icmp eq i32 %88, %89
  br i1 %90, label %91, label %107

91:                                               ; preds = %61
  %92 = load i32, ptr %1, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %93
  %95 = load i64, ptr %94, align 8, !tbaa !5
  %96 = load i32, ptr %4, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %97) #4
  %99 = load i32, ptr %98, align 4, !tbaa !9
  %100 = sext i32 %99 to i64
  %101 = mul nsw i64 %95, %100
  %102 = load i32, ptr %3, align 4, !tbaa !9
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %103
  %105 = load i64, ptr %104, align 8, !tbaa !5
  %106 = add nsw i64 %101, %105
  br label %124

107:                                              ; preds = %61
  %108 = load i32, ptr %1, align 4, !tbaa !9
  %109 = load i32, ptr %5, align 4, !tbaa !9
  %110 = sdiv i32 %108, %109
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %111
  %113 = load i64, ptr %112, align 8, !tbaa !5
  %114 = load i32, ptr %5, align 4, !tbaa !9
  %115 = load i32, ptr %4, align 4, !tbaa !9
  %116 = sext i32 %115 to i64
  %117 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %116) #4
  %118 = load i32, ptr %117, align 4, !tbaa !9
  %119 = mul nsw i32 %114, %118
  %120 = sext i32 %119 to i64
  %121 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %120
  %122 = load i64, ptr %121, align 8, !tbaa !5
  %123 = mul nsw i64 %113, %122
  br label %124

124:                                              ; preds = %107, %91
  %125 = phi i64 [ %106, %91 ], [ %123, %107 ]
  %126 = load i32, ptr %3, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %127
  store i64 %125, ptr %128, align 8, !tbaa !5
  %129 = load i32, ptr %1, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %130
  %132 = load i64, ptr %131, align 8, !tbaa !5
  %133 = add nsw i64 %132, 1
  %134 = load i32, ptr %3, align 4, !tbaa !9
  %135 = sext i32 %134 to i64
  %136 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %135
  store i64 %133, ptr %136, align 8, !tbaa !5
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %175

137:                                              ; preds = %50
  %138 = load i32, ptr %1, align 4, !tbaa !9
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %139
  %141 = load i64, ptr %140, align 8, !tbaa !5
  %142 = load i32, ptr %4, align 4, !tbaa !9
  %143 = sext i32 %142 to i64
  %144 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %143) #4
  %145 = load i32, ptr %144, align 4, !tbaa !9
  %146 = sext i32 %145 to i64
  %147 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %146
  %148 = load i64, ptr %147, align 8, !tbaa !5
  %149 = mul nsw i64 %141, %148
  %150 = load i32, ptr %3, align 4, !tbaa !9
  %151 = sext i32 %150 to i64
  %152 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %151
  store i64 %149, ptr %152, align 8, !tbaa !5
  %153 = load i32, ptr %1, align 4, !tbaa !9
  %154 = sext i32 %153 to i64
  %155 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %154
  %156 = load i64, ptr %155, align 8, !tbaa !5
  %157 = load i32, ptr %4, align 4, !tbaa !9
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %158) #4
  %160 = load i32, ptr %159, align 4, !tbaa !9
  %161 = sext i32 %160 to i64
  %162 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %161
  %163 = load i64, ptr %162, align 8, !tbaa !5
  %164 = mul nsw i64 %156, %163
  %165 = load i32, ptr %3, align 4, !tbaa !9
  %166 = sext i32 %165 to i64
  %167 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %166
  store i64 %164, ptr %167, align 8, !tbaa !5
  %168 = load i32, ptr %3, align 4, !tbaa !9
  %169 = sext i32 %168 to i64
  %170 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %169
  store i64 1, ptr %170, align 8, !tbaa !5
  br label %171

171:                                              ; preds = %137
  br label %172

172:                                              ; preds = %171
  %173 = load i32, ptr %4, align 4, !tbaa !9
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %4, align 4, !tbaa !9
  br label %34, !llvm.loop !15

175:                                              ; preds = %124, %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %176

176:                                              ; preds = %175
  br label %177

177:                                              ; preds = %176
  %178 = load i32, ptr %1, align 4, !tbaa !9
  %179 = add nsw i32 %178, 1
  store i32 %179, ptr %1, align 4, !tbaa !9
  br label %6, !llvm.loop !17

180:                                              ; preds = %9
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt5rounde(x86_fp80 noundef) #2

; Function Attrs: nounwind
declare x86_fp80 @powl(x86_fp80 noundef, x86_fp80 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZN5sieve2psE = external dso_local global %"class.std::vector", align 8
@_ZN5sieve3iscE = external dso_local local_unnamed_addr global [4000002 x i8], align 16
@_ZN5sieve3phiE = external dso_local local_unnamed_addr global [4000002 x i64], align 16
@_ZN5sieve1fE = external dso_local local_unnamed_addr global [4000002 x i64], align 16
@_ZN5sieve1eE = external dso_local local_unnamed_addr global [4000002 x i64], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sieve5sieveEv() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  store i64 1, ptr getelementptr inbounds (i8, ptr @_ZN5sieve1fE, i64 8), align 8, !tbaa !5
  store i64 1, ptr getelementptr inbounds (i8, ptr @_ZN5sieve3phiE, i64 8), align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  store i32 2, ptr %1, align 4, !tbaa !9
  br label %3

2:                                                ; preds = %.critedge
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret void

3:                                                ; preds = %0, %.critedge
  %storemerge30 = phi i32 [ 2, %0 ], [ %108, %.critedge ]
  %4 = sext i32 %storemerge30 to i64
  %5 = getelementptr inbounds [4000002 x i8], ptr @_ZN5sieve3iscE, i64 0, i64 %4
  %6 = load i8, ptr %5, align 1, !tbaa !11, !range !13, !noundef !14
  %7 = trunc nuw i8 %6 to i1
  br i1 %7, label %19, label %8

8:                                                ; preds = %3
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %9 = load i32, ptr %1, align 4, !tbaa !9
  %10 = add nsw i32 %9, -1
  %11 = sext i32 %10 to i64
  %12 = sext i32 %9 to i64
  %13 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %12
  store i64 %11, ptr %13, align 8, !tbaa !5
  %14 = shl nsw i32 %9, 1
  %15 = add nsw i32 %14, -1
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %12
  store i64 %16, ptr %17, align 8, !tbaa !5
  %18 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %12
  store i64 1, ptr %18, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %8, %3
  %20 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE) #4
  %.not = icmp eq i64 %20, 0
  br i1 %.not, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %19, %88
  %indvars.iv = phi i64 [ %indvars.iv.next, %88 ], [ 0, %19 ]
  %21 = load i32, ptr %1, align 4, !tbaa !9
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = mul nsw i32 %23, %21
  %25 = icmp slt i32 %24, 4000002
  br i1 %25, label %26, label %.critedge

26:                                               ; preds = %.lr.ph
  %27 = sext i32 %24 to i64
  %28 = getelementptr inbounds [4000002 x i8], ptr @_ZN5sieve3iscE, i64 0, i64 %27
  store i8 1, ptr %28, align 1, !tbaa !11
  %29 = load i32, ptr %1, align 4, !tbaa !9
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = srem i32 %29, %31
  %33 = icmp eq i32 %32, 0
  %34 = load i32, ptr %1, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %35
  %37 = load i64, ptr %36, align 8, !tbaa !5
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = sext i32 %39 to i64
  br i1 %33, label %41, label %88

41:                                               ; preds = %26
  %42 = mul nsw i64 %37, %40
  %43 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %27
  store i64 %42, ptr %43, align 8, !tbaa !5
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = sitofp i32 %45 to x86_fp80
  %47 = load i32, ptr %1, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %48
  %50 = load i64, ptr %49, align 8, !tbaa !5
  %51 = sitofp i64 %50 to x86_fp80
  %52 = call x86_fp80 @powl(x86_fp80 noundef %46, x86_fp80 noundef %51) #4
  %53 = call noundef x86_fp80 @_ZSt5rounde(x86_fp80 noundef %52)
  %54 = fptosi x86_fp80 %53 to i32
  %55 = load i32, ptr %1, align 4, !tbaa !9
  %56 = icmp eq i32 %55, %54
  br i1 %56, label %57, label %67

57:                                               ; preds = %41
  %58 = sext i32 %54 to i64
  %59 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %58
  %60 = load i64, ptr %59, align 8, !tbaa !5
  %61 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = mul nsw i64 %60, %63
  %65 = load i64, ptr %43, align 8, !tbaa !5
  %66 = add nsw i64 %64, %65
  br label %79

67:                                               ; preds = %41
  %68 = sdiv i32 %55, %54
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %69
  %71 = load i64, ptr %70, align 8, !tbaa !5
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %73 = load i32, ptr %72, align 4, !tbaa !9
  %74 = mul nsw i32 %73, %54
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %75
  %77 = load i64, ptr %76, align 8, !tbaa !5
  %78 = mul nsw i64 %77, %71
  br label %79

79:                                               ; preds = %67, %57
  %80 = phi i64 [ %66, %57 ], [ %78, %67 ]
  %81 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %27
  store i64 %80, ptr %81, align 8, !tbaa !5
  %82 = load i32, ptr %1, align 4, !tbaa !9
  %83 = sext i32 %82 to i64
  %84 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %83
  %85 = load i64, ptr %84, align 8, !tbaa !5
  %86 = add nsw i64 %85, 1
  %87 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %27
  store i64 %86, ptr %87, align 8, !tbaa !5
  br label %.critedge

88:                                               ; preds = %26
  %89 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %40
  %90 = load i64, ptr %89, align 8, !tbaa !5
  %91 = mul nsw i64 %90, %37
  %92 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve3phiE, i64 0, i64 %27
  store i64 %91, ptr %92, align 8, !tbaa !5
  %93 = load i32, ptr %1, align 4, !tbaa !9
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %94
  %96 = load i64, ptr %95, align 8, !tbaa !5
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE, i64 noundef %indvars.iv) #4
  %98 = load i32, ptr %97, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %99
  %101 = load i64, ptr %100, align 8, !tbaa !5
  %102 = mul nsw i64 %101, %96
  %103 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1fE, i64 0, i64 %27
  store i64 %102, ptr %103, align 8, !tbaa !5
  %104 = getelementptr inbounds [4000002 x i64], ptr @_ZN5sieve1eE, i64 0, i64 %27
  store i64 1, ptr %104, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %105 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN5sieve2psE) #4
  %106 = icmp ugt i64 %105, %indvars.iv.next
  br i1 %106, label %.lr.ph, label %.critedge, !llvm.loop !15

.critedge:                                        ; preds = %88, %.lr.ph, %19, %79
  %107 = load i32, ptr %1, align 4, !tbaa !9
  %108 = add nsw i32 %107, 1
  store i32 %108, ptr %1, align 4, !tbaa !9
  %109 = icmp slt i32 %107, 4000001
  br i1 %109, label %3, label %2, !llvm.loop !17
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt5rounde(x86_fp80 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare x86_fp80 @powl(x86_fp80 noundef, x86_fp80 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass