; LLVM IR from RichtersFinger/ChainSimulation :: Chain.ll (ZN5Chain19loadXYFromSTDVectorESt6vectorI6VectorSaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Vector = type { double, double }
%class.Chain = type { double, double, double, double, double, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl" }
%"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl" = type { %"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ChainElement *, std::allocator<ChainElement *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ChainElement = type { double, double, double, double, double, double, double, double, i8, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5Chain19loadXYFromSTDVectorESt6vectorI6VectorSaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %36, %2
  %8 = load i32, ptr %5, align 4, !tbaa !9
  %9 = sext i32 %8 to i64
  %10 = call noundef i64 @_ZNKSt6vectorI6VectorSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %11 = icmp ult i64 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %39

13:                                               ; preds = %7
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %15) #2
  %17 = getelementptr inbounds %class.Vector, ptr %16, i32 0, i32 0
  %18 = load double, ptr %17, align 8, !tbaa !11
  %19 = getelementptr inbounds %class.Chain, ptr %6, i32 0, i32 5
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %21) #2
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = getelementptr inbounds %class.ChainElement, ptr %23, i32 0, i32 0
  store double %18, ptr %24, align 8, !tbaa !14
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %26) #2
  %28 = getelementptr inbounds %class.Vector, ptr %27, i32 0, i32 1
  %29 = load double, ptr %28, align 8, !tbaa !17
  %30 = getelementptr inbounds %class.Chain, ptr %6, i32 0, i32 5
  %31 = load i32, ptr %5, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #2
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  %35 = getelementptr inbounds %class.ChainElement, ptr %34, i32 0, i32 1
  store double %29, ptr %35, align 8, !tbaa !18
  br label %36

36:                                               ; preds = %13
  %37 = load i32, ptr %5, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %5, align 4, !tbaa !9
  br label %7, !llvm.loop !19

39:                                               ; preds = %12
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI6VectorSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTS6Vector", !13, i64 0, !13, i64 8}
!13 = !{!"double", !7, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"_ZTS12ChainElement", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !16, i64 64, !6, i64 72, !6, i64 80}
!16 = !{!"bool", !7, i64 0}
!17 = !{!12, !13, i64 8}
!18 = !{!15, !13, i64 8}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5Chain19loadXYFromSTDVectorESt6vectorI6VectorSaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef i64 @_ZNKSt6vectorI6VectorSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %4 = getelementptr inbounds i8, ptr %0, i64 40
  br label %5

._crit_edge:                                      ; preds = %5, %2
  ret void

5:                                                ; preds = %.lr.ph, %5
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %5 ]
  %6 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #1
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv) #1
  %9 = load ptr, ptr %8, align 8, !tbaa !10
  store double %7, ptr %9, align 8, !tbaa !12
  %10 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #1
  %11 = getelementptr inbounds i8, ptr %10, i64 8
  %12 = load double, ptr %11, align 8, !tbaa !15
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP12ChainElementSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv) #1
  %14 = load ptr, ptr %13, align 8, !tbaa !10
  %15 = getelementptr inbounds i8, ptr %14, i64 8
  store double %12, ptr %15, align 8, !tbaa !16
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %16 = tail call noundef i64 @_ZNKSt6vectorI6VectorSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %17 = icmp ugt i64 %16, %indvars.iv.next
  br i1 %17, label %5, label %._crit_edge, !llvm.loop !17
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI6VectorSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI6VectorSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS6Vector", !7, i64 0, !7, i64 8}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"_ZTS12ChainElement", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !14, i64 64, !11, i64 72, !11, i64 80}
!14 = !{!"bool", !8, i64 0}
!15 = !{!6, !7, i64 8}
!16 = !{!13, !7, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass