; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IRQHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LTDC_HandleTypeDef = type { ptr, %struct.LTDC_InitTypeDef, [2 x %struct.LTDC_LayerCfgTypeDef], i32, i32, i32 }
%struct.LTDC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.LTDC_ColorTypeDef }
%struct.LTDC_ColorTypeDef = type { i8, i8, i8, i8 }
%struct.LTDC_LayerCfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.LTDC_ColorTypeDef }
%struct.LTDC_TypeDef = type { [2 x i32], i32, i32, i32, i32, i32, [2 x i32], i32, [1 x i32], i32, [1 x i32], i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_LTDC_IRQHandler(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %5, i32 0, i32 0
  %7 = load ptr, ptr %6, align 8, !tbaa !9
  %8 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %7, i32 0, i32 12
  %9 = load volatile i32, ptr %8, align 4, !tbaa !14
  store i32 %9, ptr %3, align 4, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !9
  %13 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %12, i32 0, i32 11
  %14 = load volatile i32, ptr %13, align 4, !tbaa !17
  store i32 %14, ptr %4, align 4, !tbaa !16
  %15 = load i32, ptr %3, align 4, !tbaa !16
  %16 = zext i32 %15 to i64
  %17 = and i64 %16, 4
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %49

19:                                               ; preds = %1
  %20 = load i32, ptr %4, align 4, !tbaa !16
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, 4
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %49

24:                                               ; preds = %19
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !9
  %28 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %27, i32 0, i32 11
  %29 = load volatile i32, ptr %28, align 4, !tbaa !17
  %30 = zext i32 %29 to i64
  %31 = and i64 %30, -5
  %32 = trunc i64 %31 to i32
  store volatile i32 %32, ptr %28, align 4, !tbaa !17
  %33 = load ptr, ptr %2, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !9
  %36 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %35, i32 0, i32 13
  store volatile i32 4, ptr %36, align 4, !tbaa !18
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %37, i32 0, i32 5
  %39 = load volatile i32, ptr %38, align 4, !tbaa !19
  %40 = or i32 %39, 1
  store volatile i32 %40, ptr %38, align 4, !tbaa !19
  %41 = load ptr, ptr %2, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %41, i32 0, i32 4
  store volatile i32 4, ptr %42, align 8, !tbaa !20
  br label %43

43:                                               ; preds = %24
  %44 = load ptr, ptr %2, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %44, i32 0, i32 3
  store i32 0, ptr %45, align 4, !tbaa !21
  br label %46

46:                                               ; preds = %43
  br label %47

47:                                               ; preds = %46
  %48 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_LTDC_ErrorCallback(ptr noundef %48)
  br label %49

49:                                               ; preds = %47, %19, %1
  %50 = load i32, ptr %3, align 4, !tbaa !16
  %51 = zext i32 %50 to i64
  %52 = and i64 %51, 2
  %53 = icmp ne i64 %52, 0
  br i1 %53, label %54, label %84

54:                                               ; preds = %49
  %55 = load i32, ptr %4, align 4, !tbaa !16
  %56 = zext i32 %55 to i64
  %57 = and i64 %56, 2
  %58 = icmp ne i64 %57, 0
  br i1 %58, label %59, label %84

59:                                               ; preds = %54
  %60 = load ptr, ptr %2, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !9
  %63 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %62, i32 0, i32 11
  %64 = load volatile i32, ptr %63, align 4, !tbaa !17
  %65 = zext i32 %64 to i64
  %66 = and i64 %65, -3
  %67 = trunc i64 %66 to i32
  store volatile i32 %67, ptr %63, align 4, !tbaa !17
  %68 = load ptr, ptr %2, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %68, i32 0, i32 0
  %70 = load ptr, ptr %69, align 8, !tbaa !9
  %71 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %70, i32 0, i32 13
  store volatile i32 2, ptr %71, align 4, !tbaa !18
  %72 = load ptr, ptr %2, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %72, i32 0, i32 5
  %74 = load volatile i32, ptr %73, align 4, !tbaa !19
  %75 = or i32 %74, 2
  store volatile i32 %75, ptr %73, align 4, !tbaa !19
  %76 = load ptr, ptr %2, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %76, i32 0, i32 4
  store volatile i32 4, ptr %77, align 8, !tbaa !20
  br label %78

78:                                               ; preds = %59
  %79 = load ptr, ptr %2, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %79, i32 0, i32 3
  store i32 0, ptr %80, align 4, !tbaa !21
  br label %81

81:                                               ; preds = %78
  br label %82

82:                                               ; preds = %81
  %83 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_LTDC_ErrorCallback(ptr noundef %83)
  br label %84

84:                                               ; preds = %82, %54, %49
  %85 = load i32, ptr %3, align 4, !tbaa !16
  %86 = zext i32 %85 to i64
  %87 = and i64 %86, 1
  %88 = icmp ne i64 %87, 0
  br i1 %88, label %89, label %115

89:                                               ; preds = %84
  %90 = load i32, ptr %4, align 4, !tbaa !16
  %91 = zext i32 %90 to i64
  %92 = and i64 %91, 1
  %93 = icmp ne i64 %92, 0
  br i1 %93, label %94, label %115

94:                                               ; preds = %89
  %95 = load ptr, ptr %2, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %95, i32 0, i32 0
  %97 = load ptr, ptr %96, align 8, !tbaa !9
  %98 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %97, i32 0, i32 11
  %99 = load volatile i32, ptr %98, align 4, !tbaa !17
  %100 = zext i32 %99 to i64
  %101 = and i64 %100, -2
  %102 = trunc i64 %101 to i32
  store volatile i32 %102, ptr %98, align 4, !tbaa !17
  %103 = load ptr, ptr %2, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %103, i32 0, i32 0
  %105 = load ptr, ptr %104, align 8, !tbaa !9
  %106 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %105, i32 0, i32 13
  store volatile i32 1, ptr %106, align 4, !tbaa !18
  %107 = load ptr, ptr %2, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %107, i32 0, i32 4
  store volatile i32 1, ptr %108, align 8, !tbaa !20
  br label %109

109:                                              ; preds = %94
  %110 = load ptr, ptr %2, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %110, i32 0, i32 3
  store i32 0, ptr %111, align 4, !tbaa !21
  br label %112

112:                                              ; preds = %109
  br label %113

113:                                              ; preds = %112
  %114 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_LTDC_LineEventCallback(ptr noundef %114)
  br label %115

115:                                              ; preds = %113, %89, %84
  %116 = load i32, ptr %3, align 4, !tbaa !16
  %117 = zext i32 %116 to i64
  %118 = and i64 %117, 8
  %119 = icmp ne i64 %118, 0
  br i1 %119, label %120, label %146

120:                                              ; preds = %115
  %121 = load i32, ptr %4, align 4, !tbaa !16
  %122 = zext i32 %121 to i64
  %123 = and i64 %122, 8
  %124 = icmp ne i64 %123, 0
  br i1 %124, label %125, label %146

125:                                              ; preds = %120
  %126 = load ptr, ptr %2, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %126, i32 0, i32 0
  %128 = load ptr, ptr %127, align 8, !tbaa !9
  %129 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %128, i32 0, i32 11
  %130 = load volatile i32, ptr %129, align 4, !tbaa !17
  %131 = zext i32 %130 to i64
  %132 = and i64 %131, -9
  %133 = trunc i64 %132 to i32
  store volatile i32 %133, ptr %129, align 4, !tbaa !17
  %134 = load ptr, ptr %2, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %134, i32 0, i32 0
  %136 = load ptr, ptr %135, align 8, !tbaa !9
  %137 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %136, i32 0, i32 13
  store volatile i32 8, ptr %137, align 4, !tbaa !18
  %138 = load ptr, ptr %2, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %138, i32 0, i32 4
  store volatile i32 1, ptr %139, align 8, !tbaa !20
  br label %140

140:                                              ; preds = %125
  %141 = load ptr, ptr %2, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %141, i32 0, i32 3
  store i32 0, ptr %142, align 4, !tbaa !21
  br label %143

143:                                              ; preds = %140
  br label %144

144:                                              ; preds = %143
  %145 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_LTDC_ReloadEventCallback(ptr noundef %145)
  br label %146

146:                                              ; preds = %144, %120, %115
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_ErrorCallback(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_LineEventCallback(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_ReloadEventCallback(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !7, i64 60, !12, i64 164, !12, i64 168, !12, i64 172}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !13, i64 48}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!14 = !{!15, !12, i64 56}
!15 = !{!"", !7, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !7, i64 28, !12, i64 36, !7, i64 40, !12, i64 44, !7, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72}
!16 = !{!12, !12, i64 0}
!17 = !{!15, !12, i64 52}
!18 = !{!15, !12, i64 60}
!19 = !{!10, !12, i64 172}
!20 = !{!10, !12, i64 168}
!21 = !{!10, !12, i64 164}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_LTDC_IRQHandler(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %2, i64 56
  %4 = load volatile i32, ptr %3, align 4, !tbaa !13
  %5 = getelementptr inbounds i8, ptr %2, i64 52
  %6 = load volatile i32, ptr %5, align 4, !tbaa !15
  %7 = zext i32 %4 to i64
  %8 = and i64 %7, 4
  %.not = icmp eq i64 %8, 0
  %9 = and i32 %6, 4
  %.not31 = icmp eq i32 %9, 0
  %or.cond = select i1 %.not, i1 true, i1 %.not31
  br i1 %or.cond, label %19, label %10

10:                                               ; preds = %1
  %11 = load volatile i32, ptr %5, align 4, !tbaa !15
  %12 = and i32 %11, -5
  store volatile i32 %12, ptr %5, align 4, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %2, i64 60
  store volatile i32 4, ptr %13, align 4, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %0, i64 172
  %15 = load volatile i32, ptr %14, align 4, !tbaa !17
  %16 = or i32 %15, 1
  store volatile i32 %16, ptr %14, align 4, !tbaa !17
  %17 = getelementptr inbounds i8, ptr %0, i64 168
  store volatile i32 4, ptr %17, align 8, !tbaa !18
  %18 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 0, ptr %18, align 4, !tbaa !19
  tail call void @HAL_LTDC_ErrorCallback(ptr noundef nonnull %0)
  br label %19

19:                                               ; preds = %10, %1
  %20 = and i64 %7, 2
  %.not32 = icmp eq i64 %20, 0
  %21 = and i32 %6, 2
  %.not33 = icmp eq i32 %21, 0
  %or.cond38 = select i1 %.not32, i1 true, i1 %.not33
  br i1 %or.cond38, label %33, label %22

22:                                               ; preds = %19
  %23 = load ptr, ptr %0, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %23, i64 52
  %25 = load volatile i32, ptr %24, align 4, !tbaa !15
  %26 = and i32 %25, -3
  store volatile i32 %26, ptr %24, align 4, !tbaa !15
  %27 = getelementptr inbounds i8, ptr %23, i64 60
  store volatile i32 2, ptr %27, align 4, !tbaa !16
  %28 = getelementptr inbounds i8, ptr %0, i64 172
  %29 = load volatile i32, ptr %28, align 4, !tbaa !17
  %30 = or i32 %29, 2
  store volatile i32 %30, ptr %28, align 4, !tbaa !17
  %31 = getelementptr inbounds i8, ptr %0, i64 168
  store volatile i32 4, ptr %31, align 8, !tbaa !18
  %32 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 0, ptr %32, align 4, !tbaa !19
  tail call void @HAL_LTDC_ErrorCallback(ptr noundef nonnull %0)
  br label %33

33:                                               ; preds = %22, %19
  %34 = and i64 %7, 1
  %.not34 = icmp eq i64 %34, 0
  %35 = and i32 %6, 1
  %.not35 = icmp eq i32 %35, 0
  %or.cond39 = select i1 %.not34, i1 true, i1 %.not35
  br i1 %or.cond39, label %44, label %36

36:                                               ; preds = %33
  %37 = load ptr, ptr %0, align 8, !tbaa !5
  %38 = getelementptr inbounds i8, ptr %37, i64 52
  %39 = load volatile i32, ptr %38, align 4, !tbaa !15
  %40 = and i32 %39, -2
  store volatile i32 %40, ptr %38, align 4, !tbaa !15
  %41 = getelementptr inbounds i8, ptr %37, i64 60
  store volatile i32 1, ptr %41, align 4, !tbaa !16
  %42 = getelementptr inbounds i8, ptr %0, i64 168
  store volatile i32 1, ptr %42, align 8, !tbaa !18
  %43 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 0, ptr %43, align 4, !tbaa !19
  tail call void @HAL_LTDC_LineEventCallback(ptr noundef nonnull %0)
  br label %44

44:                                               ; preds = %36, %33
  %45 = and i64 %7, 8
  %.not36 = icmp eq i64 %45, 0
  %46 = and i32 %6, 8
  %.not37 = icmp eq i32 %46, 0
  %or.cond40 = select i1 %.not36, i1 true, i1 %.not37
  br i1 %or.cond40, label %55, label %47

47:                                               ; preds = %44
  %48 = load ptr, ptr %0, align 8, !tbaa !5
  %49 = getelementptr inbounds i8, ptr %48, i64 52
  %50 = load volatile i32, ptr %49, align 4, !tbaa !15
  %51 = and i32 %50, -9
  store volatile i32 %51, ptr %49, align 4, !tbaa !15
  %52 = getelementptr inbounds i8, ptr %48, i64 60
  store volatile i32 8, ptr %52, align 4, !tbaa !16
  %53 = getelementptr inbounds i8, ptr %0, i64 168
  store volatile i32 1, ptr %53, align 8, !tbaa !18
  %54 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 0, ptr %54, align 4, !tbaa !19
  tail call void @HAL_LTDC_ReloadEventCallback(ptr noundef nonnull %0)
  br label %55

55:                                               ; preds = %47, %44
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_ErrorCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_LineEventCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_ReloadEventCallback(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 60, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !12, i64 48}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!13 = !{!14, !11, i64 56}
!14 = !{!"", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !8, i64 28, !11, i64 36, !8, i64 40, !11, i64 44, !8, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72}
!15 = !{!14, !11, i64 52}
!16 = !{!14, !11, i64 60}
!17 = !{!6, !11, i64 172}
!18 = !{!6, !11, i64 168}
!19 = !{!6, !11, i64 164}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass