; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IRQHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__RAMECC_HandleTypeDef = type { ptr, i32, ptr }
%struct.RAMECC_TypeDef = type { i32 }
%struct.RAMECC_MonitorTypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RAMECC_IRQHandler(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %6, i32 0, i32 0
  %8 = load ptr, ptr %7, align 8, !tbaa !9
  %9 = ptrtoint ptr %8 to i32
  %10 = and i32 %9, -256
  %11 = zext i32 %10 to i64
  %12 = inttoptr i64 %11 to ptr
  %13 = getelementptr inbounds %struct.RAMECC_TypeDef, ptr %12, i32 0, i32 0
  %14 = load volatile i32, ptr %13, align 4, !tbaa !12
  store i32 %14, ptr %3, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %15, i32 0, i32 0
  %17 = load ptr, ptr %16, align 8, !tbaa !9
  %18 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %17, i32 0, i32 0
  %19 = load volatile i32, ptr %18, align 4, !tbaa !15
  %20 = lshr i32 %19, 1
  store i32 %20, ptr %4, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %21, i32 0, i32 0
  %23 = load ptr, ptr %22, align 8, !tbaa !9
  %24 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %23, i32 0, i32 1
  %25 = load volatile i32, ptr %24, align 4, !tbaa !17
  %26 = shl i32 %25, 1
  store i32 %26, ptr %5, align 4, !tbaa !14
  %27 = load i32, ptr %3, align 4, !tbaa !14
  %28 = zext i32 %27 to i64
  %29 = and i64 %28, 1
  %30 = icmp eq i64 %29, 1
  br i1 %30, label %31, label %32

31:                                               ; preds = %1
  store i32 268435471, ptr %3, align 4, !tbaa !14
  br label %32

32:                                               ; preds = %31, %1
  %33 = load i32, ptr %3, align 4, !tbaa !14
  %34 = load i32, ptr %4, align 4, !tbaa !14
  %35 = or i32 %33, %34
  %36 = load i32, ptr %5, align 4, !tbaa !14
  %37 = and i32 %35, %36
  %38 = lshr i32 %37, 1
  %39 = xor i32 %38, -1
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %40, i32 0, i32 0
  %42 = load ptr, ptr %41, align 8, !tbaa !9
  %43 = getelementptr inbounds %struct.RAMECC_MonitorTypeDef, ptr %42, i32 0, i32 1
  %44 = load volatile i32, ptr %43, align 4, !tbaa !17
  %45 = and i32 %44, %39
  store volatile i32 %45, ptr %43, align 4, !tbaa !17
  %46 = load ptr, ptr %2, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %46, i32 0, i32 2
  %48 = load ptr, ptr %47, align 8, !tbaa !18
  %49 = icmp ne ptr %48, null
  br i1 %49, label %50, label %55

50:                                               ; preds = %32
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.__RAMECC_HandleTypeDef, ptr %51, i32 0, i32 2
  %53 = load ptr, ptr %52, align 8, !tbaa !18
  %54 = load ptr, ptr %2, align 8, !tbaa !5
  call void %53(ptr noundef %54)
  br label %55

55:                                               ; preds = %50, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"__RAMECC_HandleTypeDef", !6, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!17 = !{!16, !11, i64 4}
!18 = !{!10, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RAMECC_IRQHandler(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = ptrtoint ptr %2 to i64
  %4 = and i64 %3, 4294967040
  %5 = inttoptr i64 %4 to ptr
  %6 = load volatile i32, ptr %5, align 256, !tbaa !11
  %7 = load volatile i32, ptr %2, align 4, !tbaa !13
  %8 = lshr i32 %7, 1
  %9 = getelementptr inbounds i8, ptr %2, i64 4
  %10 = load volatile i32, ptr %9, align 4, !tbaa !15
  %11 = shl i32 %10, 1
  %12 = and i32 %6, 1
  %.not = icmp eq i32 %12, 0
  %spec.store.select = select i1 %.not, i32 %6, i32 268435470
  %13 = or i32 %spec.store.select, %8
  %14 = and i32 %13, %11
  %15 = lshr exact i32 %14, 1
  %16 = xor i32 %15, -1
  %17 = load volatile i32, ptr %9, align 4, !tbaa !15
  %18 = and i32 %17, %16
  store volatile i32 %18, ptr %9, align 4, !tbaa !15
  %19 = getelementptr inbounds i8, ptr %0, i64 16
  %20 = load ptr, ptr %19, align 8, !tbaa !16
  %.not10 = icmp eq ptr %20, null
  br i1 %.not10, label %22, label %21

21:                                               ; preds = %1
  tail call void %20(ptr noundef nonnull %0) #1
  br label %22

22:                                               ; preds = %21, %1
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__RAMECC_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!15 = !{!14, !10, i64 4}
!16 = !{!6, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass