; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ID)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NAND_HandleTypeDef = type { ptr, %struct.FMC_NAND_InitTypeDef, i32, i32, %struct.NAND_DeviceConfigTypeDef }
%struct.FMC_NAND_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.NAND_DeviceConfigTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.NAND_IDTypeDef = type { i8, i8, i8, i8 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_NAND_Read_ID(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store volatile i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store volatile i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %10, i32 0, i32 3
  %12 = load volatile i32, ptr %11, align 8, !tbaa !11
  %13 = icmp eq i32 %12, 2
  br i1 %13, label %14, label %15

14:                                               ; preds = %2
  store i32 2, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

15:                                               ; preds = %2
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %16, i32 0, i32 3
  %18 = load volatile i32, ptr %17, align 8, !tbaa !11
  %19 = icmp eq i32 %18, 1
  br i1 %19, label %20, label %108

20:                                               ; preds = %15
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %22, i32 0, i32 2
  %24 = load i32, ptr %23, align 4, !tbaa !14
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 2, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

27:                                               ; preds = %21
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %28, i32 0, i32 2
  store i32 1, ptr %29, align 4, !tbaa !14
  br label %30

30:                                               ; preds = %27
  br label %31

31:                                               ; preds = %30
  br label %32

32:                                               ; preds = %31
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %33, i32 0, i32 3
  store volatile i32 2, ptr %34, align 8, !tbaa !11
  store i32 -2147483648, ptr %8, align 4, !tbaa !9
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = or i32 %35, 65536
  %37 = zext i32 %36 to i64
  %38 = inttoptr i64 %37 to ptr
  store volatile i8 -112, ptr %38, align 1, !tbaa !15
  call void @__DSB()
  %39 = load i32, ptr %8, align 4, !tbaa !9
  %40 = or i32 %39, 131072
  %41 = zext i32 %40 to i64
  %42 = inttoptr i64 %41 to ptr
  store volatile i8 0, ptr %42, align 1, !tbaa !15
  call void @__DSB()
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %43, i32 0, i32 1
  %45 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %44, i32 0, i32 2
  %46 = load i32, ptr %45, align 8, !tbaa !16
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %72

48:                                               ; preds = %32
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = inttoptr i64 %50 to ptr
  %52 = load volatile i32, ptr %51, align 4, !tbaa !9
  store volatile i32 %52, ptr %6, align 4, !tbaa !9
  %53 = load volatile i32, ptr %6, align 4, !tbaa !9
  %54 = trunc i32 %53 to i8
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %55, i32 0, i32 0
  store i8 %54, ptr %56, align 1, !tbaa !17
  %57 = load volatile i32, ptr %6, align 4, !tbaa !9
  %58 = lshr i32 %57, 8
  %59 = trunc i32 %58 to i8
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %60, i32 0, i32 1
  store i8 %59, ptr %61, align 1, !tbaa !19
  %62 = load volatile i32, ptr %6, align 4, !tbaa !9
  %63 = lshr i32 %62, 16
  %64 = trunc i32 %63 to i8
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %65, i32 0, i32 2
  store i8 %64, ptr %66, align 1, !tbaa !20
  %67 = load volatile i32, ptr %6, align 4, !tbaa !9
  %68 = lshr i32 %67, 24
  %69 = trunc i32 %68 to i8
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %70, i32 0, i32 3
  store i8 %69, ptr %71, align 1, !tbaa !21
  br label %100

72:                                               ; preds = %32
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = zext i32 %73 to i64
  %75 = inttoptr i64 %74 to ptr
  %76 = load volatile i32, ptr %75, align 4, !tbaa !9
  store volatile i32 %76, ptr %6, align 4, !tbaa !9
  %77 = load i32, ptr %8, align 4, !tbaa !9
  %78 = zext i32 %77 to i64
  %79 = inttoptr i64 %78 to ptr
  %80 = getelementptr inbounds i32, ptr %79, i64 4
  %81 = load volatile i32, ptr %80, align 4, !tbaa !9
  store volatile i32 %81, ptr %7, align 4, !tbaa !9
  %82 = load volatile i32, ptr %6, align 4, !tbaa !9
  %83 = trunc i32 %82 to i8
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %84, i32 0, i32 0
  store i8 %83, ptr %85, align 1, !tbaa !17
  %86 = load volatile i32, ptr %6, align 4, !tbaa !9
  %87 = lshr i32 %86, 16
  %88 = trunc i32 %87 to i8
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %89, i32 0, i32 1
  store i8 %88, ptr %90, align 1, !tbaa !19
  %91 = load volatile i32, ptr %7, align 4, !tbaa !9
  %92 = trunc i32 %91 to i8
  %93 = load ptr, ptr %5, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %93, i32 0, i32 2
  store i8 %92, ptr %94, align 1, !tbaa !20
  %95 = load volatile i32, ptr %7, align 4, !tbaa !9
  %96 = lshr i32 %95, 16
  %97 = trunc i32 %96 to i8
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.NAND_IDTypeDef, ptr %98, i32 0, i32 3
  store i8 %97, ptr %99, align 1, !tbaa !21
  br label %100

100:                                              ; preds = %72, %48
  %101 = load ptr, ptr %4, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %101, i32 0, i32 3
  store volatile i32 1, ptr %102, align 8, !tbaa !11
  br label %103

103:                                              ; preds = %100
  %104 = load ptr, ptr %4, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %104, i32 0, i32 2
  store i32 0, ptr %105, align 4, !tbaa !14
  br label %106

106:                                              ; preds = %103
  br label %107

107:                                              ; preds = %106
  br label %109

108:                                              ; preds = %15
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

109:                                              ; preds = %107
  br label %110

110:                                              ; preds = %109
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

111:                                              ; preds = %110, %108, %26, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %112 = load i32, ptr %3, align 4
  ret i32 %112
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__DSB() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 40}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 36, !10, i64 40, !13, i64 44}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!14 = !{!12, !10, i64 36}
!15 = !{!7, !7, i64 0}
!16 = !{!12, !10, i64 16}
!17 = !{!18, !7, i64 0}
!18 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!19 = !{!18, !7, i64 1}
!20 = !{!18, !7, i64 2}
!21 = !{!18, !7, i64 3}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_NAND_Read_ID(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4)
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = load volatile i32, ptr %5, align 8, !tbaa !9
  %7 = icmp eq i32 %6, 2
  br i1 %7, label %32, label %8

8:                                                ; preds = %2
  %9 = load volatile i32, ptr %5, align 8, !tbaa !9
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %32

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 36
  %13 = load i32, ptr %12, align 4, !tbaa !13
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %32, label %15

15:                                               ; preds = %11
  store i32 1, ptr %12, align 4, !tbaa !13
  store volatile i32 2, ptr %5, align 8, !tbaa !9
  store volatile i8 -112, ptr inttoptr (i64 2147549184 to ptr), align 65536, !tbaa !14
  tail call void @__DSB()
  store volatile i8 0, ptr inttoptr (i64 2147614720 to ptr), align 131072, !tbaa !14
  tail call void @__DSB()
  %16 = getelementptr inbounds i8, ptr %0, i64 16
  %17 = load i32, ptr %16, align 8, !tbaa !15
  %18 = icmp eq i32 %17, 0
  %19 = load volatile i32, ptr inttoptr (i64 2147483648 to ptr), align 2147483648, !tbaa !5
  store volatile i32 %19, ptr %3, align 4, !tbaa !5
  br i1 %18, label %20, label %24

20:                                               ; preds = %15
  %.0..0..0..0.6 = load volatile i32, ptr %3, align 4, !tbaa !5
  %.0..0..0..0.7 = load volatile i32, ptr %3, align 4, !tbaa !5
  %21 = lshr i32 %.0..0..0..0.7, 8
  %.0..0..0..0.8 = load volatile i32, ptr %3, align 4, !tbaa !5
  %22 = lshr i32 %.0..0..0..0.8, 16
  %.0..0..0..0.9 = load volatile i32, ptr %3, align 4, !tbaa !5
  %23 = lshr i32 %.0..0..0..0.9, 24
  br label %28

24:                                               ; preds = %15
  %25 = load volatile i32, ptr inttoptr (i64 2147483664 to ptr), align 16, !tbaa !5
  store volatile i32 %25, ptr %4, align 4, !tbaa !5
  %.0..0..0..0.10 = load volatile i32, ptr %3, align 4, !tbaa !5
  %.0..0..0..0.11 = load volatile i32, ptr %3, align 4, !tbaa !5
  %26 = lshr i32 %.0..0..0..0.11, 16
  %.0..0..0..0. = load volatile i32, ptr %4, align 4, !tbaa !5
  %.0..0..0..0.5 = load volatile i32, ptr %4, align 4, !tbaa !5
  %27 = lshr i32 %.0..0..0..0.5, 16
  br label %28

28:                                               ; preds = %24, %20
  %.sink31.in = phi i32 [ %.0..0..0..0.6, %20 ], [ %.0..0..0..0.10, %24 ]
  %.sink30.in = phi i32 [ %21, %20 ], [ %26, %24 ]
  %.sink29.in = phi i32 [ %22, %20 ], [ %.0..0..0..0., %24 ]
  %.sink.in = phi i32 [ %23, %20 ], [ %27, %24 ]
  %.sink = trunc i32 %.sink.in to i8
  %.sink29 = trunc i32 %.sink29.in to i8
  %.sink30 = trunc i32 %.sink30.in to i8
  %.sink31 = trunc i32 %.sink31.in to i8
  store i8 %.sink31, ptr %1, align 1
  %29 = getelementptr inbounds i8, ptr %1, i64 1
  store i8 %.sink30, ptr %29, align 1
  %30 = getelementptr inbounds i8, ptr %1, i64 2
  store i8 %.sink29, ptr %30, align 1
  %31 = getelementptr inbounds i8, ptr %1, i64 3
  store i8 %.sink, ptr %31, align 1
  store volatile i32 1, ptr %5, align 8, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !13
  br label %32

32:                                               ; preds = %8, %11, %2, %28
  %.0 = phi i32 [ 0, %28 ], [ 2, %2 ], [ 2, %11 ], [ 1, %8 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__DSB() local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 40}
!10 = !{!"", !11, i64 0, !12, i64 8, !6, i64 36, !6, i64 40, !12, i64 44}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24}
!13 = !{!10, !6, i64 36}
!14 = !{!7, !7, i64 0}
!15 = !{!10, !6, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass