; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SMBUS_HandleTypeDef = type { ptr, %struct.SMBUS_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32, i32 }
%struct.SMBUS_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_ConvertOtherXferOptions(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SMBUS_Master_Receive_IT(ptr noundef %0, i16 noundef zeroext %1, ptr noundef %2, i16 noundef zeroext %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca ptr, align 8
  %10 = alloca i16, align 2
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i16 %1, ptr %8, align 2, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !5
  store i16 %3, ptr %10, align 2, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %14, i32 0, i32 8
  %16 = load volatile i32, ptr %15, align 8, !tbaa !13
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %149

18:                                               ; preds = %5
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %20, i32 0, i32 7
  %22 = load i32, ptr %21, align 4, !tbaa !16
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %25

24:                                               ; preds = %19
  store i32 2, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %150

25:                                               ; preds = %19
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %26, i32 0, i32 7
  store i32 1, ptr %27, align 4, !tbaa !16
  br label %28

28:                                               ; preds = %25
  br label %29

29:                                               ; preds = %28
  br label %30

30:                                               ; preds = %29
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %31, i32 0, i32 8
  store volatile i32 34, ptr %32, align 8, !tbaa !13
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %33, i32 0, i32 9
  store volatile i32 0, ptr %34, align 4, !tbaa !17
  %35 = load ptr, ptr %9, align 8, !tbaa !5
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %36, i32 0, i32 2
  store ptr %35, ptr %37, align 8, !tbaa !18
  %38 = load i16, ptr %10, align 2, !tbaa !9
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %39, i32 0, i32 4
  store volatile i16 %38, ptr %40, align 2, !tbaa !19
  %41 = load i32, ptr %11, align 4, !tbaa !11
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %42, i32 0, i32 5
  store volatile i32 %41, ptr %43, align 4, !tbaa !20
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %44, i32 0, i32 2
  %46 = load ptr, ptr %45, align 8, !tbaa !18
  %47 = icmp eq ptr %46, null
  br i1 %47, label %48, label %55

48:                                               ; preds = %30
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %49, i32 0, i32 5
  %51 = load volatile i32, ptr %50, align 4, !tbaa !20
  %52 = zext i32 %51 to i64
  %53 = and i64 %52, -33554433
  %54 = trunc i64 %53 to i32
  store volatile i32 %54, ptr %50, align 4, !tbaa !20
  br label %55

55:                                               ; preds = %48, %30
  %56 = load i16, ptr %10, align 2, !tbaa !9
  %57 = zext i16 %56 to i32
  %58 = icmp ugt i32 %57, 255
  br i1 %58, label %59, label %62

59:                                               ; preds = %55
  %60 = load ptr, ptr %7, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %60, i32 0, i32 3
  store i16 255, ptr %61, align 8, !tbaa !21
  br label %66

62:                                               ; preds = %55
  %63 = load i16, ptr %10, align 2, !tbaa !9
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %64, i32 0, i32 3
  store i16 %63, ptr %65, align 8, !tbaa !21
  br label %66

66:                                               ; preds = %62, %59
  %67 = load ptr, ptr %7, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %67, i32 0, i32 3
  %69 = load i16, ptr %68, align 8, !tbaa !21
  %70 = zext i16 %69 to i32
  %71 = load ptr, ptr %7, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %71, i32 0, i32 4
  %73 = load volatile i16, ptr %72, align 2, !tbaa !19
  %74 = zext i16 %73 to i32
  %75 = icmp slt i32 %70, %74
  br i1 %75, label %76, label %96

76:                                               ; preds = %66
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %77, i32 0, i32 3
  %79 = load i16, ptr %78, align 8, !tbaa !21
  %80 = zext i16 %79 to i32
  %81 = icmp eq i32 %80, 255
  br i1 %81, label %82, label %96

82:                                               ; preds = %76
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = load i16, ptr %8, align 2, !tbaa !9
  %85 = load ptr, ptr %7, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %85, i32 0, i32 3
  %87 = load i16, ptr %86, align 8, !tbaa !21
  %88 = trunc i16 %87 to i8
  %89 = load ptr, ptr %7, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %89, i32 0, i32 5
  %91 = load volatile i32, ptr %90, align 4, !tbaa !20
  %92 = zext i32 %91 to i64
  %93 = and i64 %92, 67108864
  %94 = or i64 16777216, %93
  %95 = trunc i64 %94 to i32
  call void @SMBUS_TransferConfig(ptr noundef %83, i16 noundef zeroext %84, i8 noundef zeroext %88, i32 noundef %95, i32 noundef -2147474432)
  br label %142

96:                                               ; preds = %76, %66
  %97 = load ptr, ptr %7, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %97, i32 0, i32 5
  %99 = load volatile i32, ptr %98, align 4, !tbaa !20
  store i32 %99, ptr %12, align 4, !tbaa !11
  %100 = load ptr, ptr %7, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %100, i32 0, i32 6
  %102 = load volatile i32, ptr %101, align 8, !tbaa !22
  %103 = icmp eq i32 %102, 34
  br i1 %103, label %104, label %130

104:                                              ; preds = %96
  %105 = load i32, ptr %12, align 4, !tbaa !11
  %106 = icmp eq i32 %105, 170
  br i1 %106, label %116, label %107

107:                                              ; preds = %104
  %108 = load i32, ptr %12, align 4, !tbaa !11
  %109 = icmp eq i32 %108, 11141120
  br i1 %109, label %116, label %110

110:                                              ; preds = %107
  %111 = load i32, ptr %12, align 4, !tbaa !11
  %112 = icmp eq i32 %111, 43520
  br i1 %112, label %116, label %113

113:                                              ; preds = %110
  %114 = load i32, ptr %12, align 4, !tbaa !11
  %115 = icmp eq i32 %114, -1442840576
  br label %116

116:                                              ; preds = %113, %110, %107, %104
  %117 = phi i1 [ true, %110 ], [ true, %107 ], [ true, %104 ], [ %115, %113 ]
  %118 = zext i1 %117 to i32
  %119 = icmp eq i32 %118, 0
  br i1 %119, label %120, label %130

120:                                              ; preds = %116
  %121 = load ptr, ptr %7, align 8, !tbaa !5
  %122 = load i16, ptr %8, align 2, !tbaa !9
  %123 = load ptr, ptr %7, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %123, i32 0, i32 3
  %125 = load i16, ptr %124, align 8, !tbaa !21
  %126 = trunc i16 %125 to i8
  %127 = load ptr, ptr %7, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %127, i32 0, i32 5
  %129 = load volatile i32, ptr %128, align 4, !tbaa !20
  call void @SMBUS_TransferConfig(ptr noundef %121, i16 noundef zeroext %122, i8 noundef zeroext %126, i32 noundef %129, i32 noundef 0)
  br label %141

130:                                              ; preds = %116, %96
  %131 = load ptr, ptr %7, align 8, !tbaa !5
  call void @SMBUS_ConvertOtherXferOptions(ptr noundef %131)
  %132 = load ptr, ptr %7, align 8, !tbaa !5
  %133 = load i16, ptr %8, align 2, !tbaa !9
  %134 = load ptr, ptr %7, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %134, i32 0, i32 3
  %136 = load i16, ptr %135, align 8, !tbaa !21
  %137 = trunc i16 %136 to i8
  %138 = load ptr, ptr %7, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %138, i32 0, i32 5
  %140 = load volatile i32, ptr %139, align 4, !tbaa !20
  call void @SMBUS_TransferConfig(ptr noundef %132, i16 noundef zeroext %133, i8 noundef zeroext %137, i32 noundef %140, i32 noundef -2147474432)
  br label %141

141:                                              ; preds = %130, %120
  br label %142

142:                                              ; preds = %141, %82
  br label %143

143:                                              ; preds = %142
  %144 = load ptr, ptr %7, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %144, i32 0, i32 7
  store i32 0, ptr %145, align 4, !tbaa !16
  br label %146

146:                                              ; preds = %143
  br label %147

147:                                              ; preds = %146
  %148 = load ptr, ptr %7, align 8, !tbaa !5
  call void @SMBUS_Enable_IRQ(ptr noundef %148, i32 noundef 212)
  store i32 0, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %150

149:                                              ; preds = %5
  store i32 2, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %150

150:                                              ; preds = %149, %147, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  %151 = load i32, ptr %6, align 4
  ret i32 %151
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 80}
!14 = !{!"__SMBUS_HandleTypeDef", !6, i64 0, !15, i64 8, !6, i64 56, !10, i64 64, !10, i64 66, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!16 = !{!14, !12, i64 76}
!17 = !{!14, !12, i64 84}
!18 = !{!14, !6, i64 56}
!19 = !{!14, !10, i64 66}
!20 = !{!14, !12, i64 68}
!21 = !{!14, !10, i64 64}
!22 = !{!14, !12, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_ConvertOtherXferOptions(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SMBUS_Master_Receive_IT(ptr noundef %0, i16 noundef zeroext %1, ptr noundef %2, i16 noundef zeroext %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = getelementptr inbounds i8, ptr %0, i64 80
  %7 = load volatile i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %9, label %43

9:                                                ; preds = %5
  %10 = getelementptr inbounds i8, ptr %0, i64 76
  %11 = load i32, ptr %10, align 4, !tbaa !13
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %43, label %13

13:                                               ; preds = %9
  store i32 1, ptr %10, align 4, !tbaa !13
  store volatile i32 34, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %0, i64 84
  store volatile i32 0, ptr %14, align 4, !tbaa !14
  %15 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %2, ptr %15, align 8, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %0, i64 66
  store volatile i16 %3, ptr %16, align 2, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 %4, ptr %17, align 4, !tbaa !17
  %18 = icmp eq ptr %2, null
  br i1 %18, label %19, label %22

19:                                               ; preds = %13
  %20 = load volatile i32, ptr %17, align 4, !tbaa !17
  %21 = and i32 %20, -33554433
  store volatile i32 %21, ptr %17, align 4, !tbaa !17
  br label %22

22:                                               ; preds = %19, %13
  %spec.select = tail call i16 @llvm.umin.i16(i16 %3, i16 255)
  %23 = getelementptr inbounds i8, ptr %0, i64 64
  store i16 %spec.select, ptr %23, align 8
  %24 = load volatile i16, ptr %16, align 2, !tbaa !16
  %25 = icmp ugt i16 %3, 254
  %26 = icmp ugt i16 %24, 255
  %or.cond = and i1 %25, %26
  %27 = load volatile i32, ptr %17, align 4, !tbaa !17
  br i1 %or.cond, label %28, label %31

28:                                               ; preds = %22
  %29 = and i32 %27, 67108864
  %30 = or disjoint i32 %29, 16777216
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext %1, i8 noundef zeroext -1, i32 noundef %30, i32 noundef -2147474432)
  br label %42

31:                                               ; preds = %22
  %32 = getelementptr inbounds i8, ptr %0, i64 72
  %33 = load volatile i32, ptr %32, align 8, !tbaa !18
  %34 = icmp eq i32 %33, 34
  br i1 %34, label %35, label %.critedge

35:                                               ; preds = %31
  switch i32 %27, label %36 [
    i32 11141120, label %.critedge
    i32 43520, label %.critedge
    i32 170, label %.critedge
    i32 -1442840576, label %.critedge
  ]

36:                                               ; preds = %35
  %37 = trunc nuw i16 %spec.select to i8
  %38 = load volatile i32, ptr %17, align 4, !tbaa !17
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext %1, i8 noundef zeroext %37, i32 noundef %38, i32 noundef 0)
  br label %42

.critedge:                                        ; preds = %35, %35, %35, %35, %31
  tail call void @SMBUS_ConvertOtherXferOptions(ptr noundef nonnull %0)
  %39 = load i16, ptr %23, align 8, !tbaa !19
  %40 = trunc i16 %39 to i8
  %41 = load volatile i32, ptr %17, align 4, !tbaa !17
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext %1, i8 noundef zeroext %40, i32 noundef %41, i32 noundef -2147474432)
  br label %42

42:                                               ; preds = %28, %.critedge, %36
  store i32 0, ptr %10, align 4, !tbaa !13
  tail call void @SMBUS_Enable_IRQ(ptr noundef nonnull %0, i32 noundef 212)
  br label %43

43:                                               ; preds = %5, %9, %42
  %.0 = phi i32 [ 0, %42 ], [ 2, %9 ], [ 2, %5 ]
  ret i32 %.0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.umin.i16(i16, i16) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 80}
!6 = !{!"__SMBUS_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 76}
!14 = !{!6, !11, i64 84}
!15 = !{!6, !7, i64 56}
!16 = !{!6, !12, i64 66}
!17 = !{!6, !11, i64 68}
!18 = !{!6, !11, i64 72}
!19 = !{!6, !12, i64 64}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass