; LLVM IR from Xingyu-Lin/softgym :: PyFlex/extensions (flexExtContainer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.XQuat = type { float, float, float, float }
%struct.NvFlexExtSoftJoint = type { ptr, ptr, i32, i32, [3 x float], [4 x float], float, i8 }
%struct.NvFlexExtContainer = type <{ i32, [4 x i8], ptr, ptr, %struct.NvFlexVector, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %struct.NvFlexVector.10, %struct.NvFlexVector.10, %struct.NvFlexVector.12, %struct.NvFlexVector, %struct.NvFlexVector.10, %struct.NvFlexVector, %struct.NvFlexVector, %struct.NvFlexVector.14, %struct.NvFlexVector.14, %struct.NvFlexVector.14, %struct.NvFlexVector.16, %struct.NvFlexVector.12, %struct.NvFlexVector.12, %struct.NvFlexVector, %struct.NvFlexVector.14, %struct.NvFlexVector.14, %struct.NvFlexVector, %struct.NvFlexVector.12, %struct.NvFlexVector, %struct.NvFlexVector, %struct.NvFlexVector.14, %struct.NvFlexVector.14, %struct.NvFlexVector.14, %struct.NvFlexVector.12, %struct.NvFlexVector.12, i8, i8, [6 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<NvFlexExtInstance *, std::allocator<NvFlexExtInstance *>>::_Vector_impl" }
%"struct.std::_Vector_base<NvFlexExtInstance *, std::allocator<NvFlexExtInstance *>>::_Vector_impl" = type { %"struct.std::_Vector_base<NvFlexExtInstance *, std::allocator<NvFlexExtInstance *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<NvFlexExtInstance *, std::allocator<NvFlexExtInstance *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<NvFlexExtSoftJoint *, std::allocator<NvFlexExtSoftJoint *>>::_Vector_impl" }
%"struct.std::_Vector_base<NvFlexExtSoftJoint *, std::allocator<NvFlexExtSoftJoint *>>::_Vector_impl" = type { %"struct.std::_Vector_base<NvFlexExtSoftJoint *, std::allocator<NvFlexExtSoftJoint *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<NvFlexExtSoftJoint *, std::allocator<NvFlexExtSoftJoint *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.NvFlexVector.10 = type <{ ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>
%struct.NvFlexVector.16 = type <{ ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>
%struct.NvFlexVector = type <{ ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>
%struct.NvFlexVector.14 = type <{ ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>
%struct.NvFlexVector.12 = type <{ ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local ptr @NvFlexExtCreateSoftJoint(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, float noundef %4) #6 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca float, align 4
  %11 = alloca ptr, align 8
  %12 = alloca %class.XQuat, align 4
  %13 = alloca %class.XQuat, align 4
  %14 = alloca %class.XQuat, align 4
  %15 = alloca %class.XQuat, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store float %4, ptr %10, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #7
  %16 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 64) #8
  call void @llvm.memset.p0.i64(ptr align 16 %16, i8 0, i64 64, i1 false)
  store ptr %16, ptr %11, align 8, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %18, i64 4)
  %20 = extractvalue { i64, i1 } %19, 1
  %21 = extractvalue { i64, i1 } %19, 0
  %22 = select i1 %20, i64 -1, i64 %21
  %23 = call noalias noundef nonnull ptr @_Znam(i64 noundef %22) #8
  %24 = load ptr, ptr %11, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %24, i32 0, i32 0
  store ptr %23, ptr %25, align 8, !tbaa !13
  %26 = load ptr, ptr %11, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %26, i32 0, i32 0
  %28 = load ptr, ptr %27, align 8, !tbaa !13
  %29 = load ptr, ptr %7, align 8, !tbaa !5
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = mul i64 4, %31
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %28, ptr align 4 %29, i64 %32, i1 false)
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = mul nsw i32 3, %33
  %35 = sext i32 %34 to i64
  %36 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %35, i64 4)
  %37 = extractvalue { i64, i1 } %36, 1
  %38 = extractvalue { i64, i1 } %36, 0
  %39 = select i1 %37, i64 -1, i64 %38
  %40 = call noalias noundef nonnull ptr @_Znam(i64 noundef %39) #8
  %41 = load ptr, ptr %11, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %41, i32 0, i32 1
  store ptr %40, ptr %42, align 8, !tbaa !16
  %43 = load ptr, ptr %11, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %43, i32 0, i32 1
  %45 = load ptr, ptr %44, align 8, !tbaa !16
  %46 = load ptr, ptr %8, align 8, !tbaa !5
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = mul i64 12, %48
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %45, ptr align 4 %46, i64 %49, i1 false)
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #7
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %12)
  %50 = getelementptr inbounds %class.XQuat, ptr %12, i32 0, i32 0
  %51 = load float, ptr %50, align 4, !tbaa !17
  %52 = load ptr, ptr %11, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %52, i32 0, i32 5
  %54 = getelementptr inbounds [4 x float], ptr %53, i64 0, i64 0
  store float %51, ptr %54, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #7
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #7
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %13)
  %55 = getelementptr inbounds %class.XQuat, ptr %13, i32 0, i32 1
  %56 = load float, ptr %55, align 4, !tbaa !19
  %57 = load ptr, ptr %11, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %57, i32 0, i32 5
  %59 = getelementptr inbounds [4 x float], ptr %58, i64 0, i64 1
  store float %56, ptr %59, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #7
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #7
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %14)
  %60 = getelementptr inbounds %class.XQuat, ptr %14, i32 0, i32 2
  %61 = load float, ptr %60, align 4, !tbaa !20
  %62 = load ptr, ptr %11, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %62, i32 0, i32 5
  %64 = getelementptr inbounds [4 x float], ptr %63, i64 0, i64 2
  store float %61, ptr %64, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #7
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #7
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %15)
  %65 = getelementptr inbounds %class.XQuat, ptr %15, i32 0, i32 3
  %66 = load float, ptr %65, align 4, !tbaa !21
  %67 = load ptr, ptr %11, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %67, i32 0, i32 5
  %69 = getelementptr inbounds [4 x float], ptr %68, i64 0, i64 3
  store float %66, ptr %69, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #7
  %70 = load i32, ptr %9, align 4, !tbaa !9
  %71 = load ptr, ptr %11, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %71, i32 0, i32 3
  store i32 %70, ptr %72, align 4, !tbaa !22
  %73 = load float, ptr %10, align 4, !tbaa !11
  %74 = load ptr, ptr %11, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %74, i32 0, i32 6
  store float %73, ptr %75, align 4, !tbaa !23
  %76 = load ptr, ptr %11, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.NvFlexExtSoftJoint, ptr %76, i32 0, i32 7
  store i8 0, ptr %77, align 8, !tbaa !24
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.NvFlexExtContainer, ptr %78, i32 0, i32 7
  call void @_ZNSt6vectorIP18NvFlexExtSoftJointSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %79, ptr noundef nonnull align 8 dereferenceable(8) %11)
  %80 = load ptr, ptr %6, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.NvFlexExtContainer, ptr %80, i32 0, i32 33
  store i8 1, ptr %81, align 8, !tbaa !25
  %82 = load ptr, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  ret ptr %82
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP18NvFlexExtSoftJointSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #6 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTS18NvFlexExtSoftJoint", !6, i64 0, !6, i64 8, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 36, !12, i64 52, !15, i64 56}
!15 = !{!"bool", !7, i64 0}
!16 = !{!14, !6, i64 8}
!17 = !{!18, !12, i64 0}
!18 = !{!"_ZTS5XQuatIfE", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!19 = !{!18, !12, i64 4}
!20 = !{!18, !12, i64 8}
!21 = !{!18, !12, i64 12}
!22 = !{!14, !10, i64 20}
!23 = !{!14, !12, i64 52}
!24 = !{!14, !15, i64 56}
!25 = !{!26, !15, i64 1136}
!26 = !{!"_ZTS18NvFlexExtContainer", !10, i64 0, !6, i64 8, !6, i64 16, !27, i64 24, !29, i64 64, !33, i64 88, !37, i64 112, !41, i64 136, !41, i64 176, !42, i64 216, !27, i64 256, !41, i64 296, !27, i64 336, !27, i64 376, !43, i64 416, !43, i64 456, !43, i64 496, !44, i64 536, !42, i64 576, !42, i64 616, !27, i64 656, !43, i64 696, !43, i64 736, !27, i64 776, !42, i64 816, !27, i64 856, !27, i64 896, !43, i64 936, !43, i64 976, !43, i64 1016, !42, i64 1056, !42, i64 1096, !15, i64 1136, !15, i64 1137}
!27 = !{!"_ZTS12NvFlexVectorIiE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !28, i64 32}
!28 = !{!"_ZTS16NvFlexBufferType", !7, i64 0}
!29 = !{!"_ZTSSt6vectorIiSaIiEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIP17NvFlexExtInstanceSaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSSt6vectorIP18NvFlexExtSoftJointSaIS1_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTS12NvFlexVectorI8XVector4IfEE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !28, i64 32}
!42 = !{!"_ZTS12NvFlexVectorI8XVector3IfEE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !28, i64 32}
!43 = !{!"_ZTS12NvFlexVectorIfE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !28, i64 32}
!44 = !{!"_ZTS12NvFlexVectorI5XQuatIfEE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !28, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.XQuat = type { float, float, float, float }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local ptr @NvFlexExtCreateSoftJoint(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, i32 noundef %3, float noundef %4) local_unnamed_addr #5 {
  %6 = alloca ptr, align 8
  %7 = alloca %class.XQuat, align 4
  %8 = alloca %class.XQuat, align 4
  %9 = alloca %class.XQuat, align 4
  %10 = alloca %class.XQuat, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #6
  %11 = tail call noalias noundef nonnull dereferenceable(64) ptr @_Znwm(i64 noundef 64) #7
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(64) %11, i8 0, i64 64, i1 false)
  store ptr %11, ptr %6, align 8, !tbaa !5
  %12 = sext i32 %3 to i64
  %13 = icmp slt i32 %3, 0
  %14 = shl nsw i64 %12, 2
  %15 = select i1 %13, i64 -1, i64 %14
  %16 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %15) #7
  store ptr %16, ptr %11, align 8, !tbaa !9
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 4 %16, ptr align 4 %1, i64 %14, i1 false)
  %17 = mul nsw i32 %3, 3
  %18 = sext i32 %17 to i64
  %19 = shl nsw i64 %18, 2
  %20 = select i1 %13, i64 -1, i64 %19
  %21 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %20) #7
  %22 = getelementptr inbounds i8, ptr %11, i64 8
  store ptr %21, ptr %22, align 8, !tbaa !14
  %23 = mul nsw i64 %12, 12
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 4 %21, ptr align 4 %2, i64 %23, i1 false)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #6
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %7)
  %24 = load float, ptr %7, align 4, !tbaa !15
  %25 = getelementptr inbounds i8, ptr %11, i64 36
  store float %24, ptr %25, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #6
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %8)
  %26 = getelementptr inbounds i8, ptr %8, i64 4
  %27 = load float, ptr %26, align 4, !tbaa !18
  %28 = getelementptr inbounds i8, ptr %11, i64 40
  store float %27, ptr %28, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %9) #6
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %9)
  %29 = getelementptr inbounds i8, ptr %9, i64 8
  %30 = load float, ptr %29, align 4, !tbaa !19
  %31 = getelementptr inbounds i8, ptr %11, i64 44
  store float %30, ptr %31, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %9) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %10) #6
  call void @_ZN5XQuatIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(16) %10)
  %32 = getelementptr inbounds i8, ptr %10, i64 12
  %33 = load float, ptr %32, align 4, !tbaa !20
  %34 = getelementptr inbounds i8, ptr %11, i64 48
  store float %33, ptr %34, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %10) #6
  %35 = getelementptr inbounds i8, ptr %11, i64 20
  store i32 %3, ptr %35, align 4, !tbaa !21
  %36 = getelementptr inbounds i8, ptr %11, i64 52
  store float %4, ptr %36, align 4, !tbaa !22
  %37 = getelementptr inbounds i8, ptr %11, i64 56
  store i8 0, ptr %37, align 8, !tbaa !23
  %38 = getelementptr inbounds i8, ptr %0, i64 112
  call void @_ZNSt6vectorIP18NvFlexExtSoftJointSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %38, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %39 = getelementptr inbounds i8, ptr %0, i64 1136
  store i8 1, ptr %39, align 8, !tbaa !24
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #6
  ret ptr %40
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP18NvFlexExtSoftJointSaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #5 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS18NvFlexExtSoftJoint", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !7, i64 24, !7, i64 36, !12, i64 52, !13, i64 56}
!11 = !{!"int", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!10, !6, i64 8}
!15 = !{!16, !12, i64 0}
!16 = !{!"_ZTS5XQuatIfE", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!17 = !{!12, !12, i64 0}
!18 = !{!16, !12, i64 4}
!19 = !{!16, !12, i64 8}
!20 = !{!16, !12, i64 12}
!21 = !{!10, !11, i64 20}
!22 = !{!10, !12, i64 52}
!23 = !{!10, !13, i64 56}
!24 = !{!25, !13, i64 1136}
!25 = !{!"_ZTS18NvFlexExtContainer", !11, i64 0, !6, i64 8, !6, i64 16, !26, i64 24, !28, i64 64, !32, i64 88, !36, i64 112, !40, i64 136, !40, i64 176, !41, i64 216, !26, i64 256, !40, i64 296, !26, i64 336, !26, i64 376, !42, i64 416, !42, i64 456, !42, i64 496, !43, i64 536, !41, i64 576, !41, i64 616, !26, i64 656, !42, i64 696, !42, i64 736, !26, i64 776, !41, i64 816, !26, i64 856, !26, i64 896, !42, i64 936, !42, i64 976, !42, i64 1016, !41, i64 1056, !41, i64 1096, !13, i64 1136, !13, i64 1137}
!26 = !{!"_ZTS12NvFlexVectorIiE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !27, i64 32}
!27 = !{!"_ZTS16NvFlexBufferType", !7, i64 0}
!28 = !{!"_ZTSSt6vectorIiSaIiEE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorIP17NvFlexExtInstanceSaIS1_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIP17NvFlexExtInstanceSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTSSt6vectorIP18NvFlexExtSoftJointSaIS1_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIP18NvFlexExtSoftJointSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!40 = !{!"_ZTS12NvFlexVectorI8XVector4IfEE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !27, i64 32}
!41 = !{!"_ZTS12NvFlexVectorI8XVector3IfEE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !27, i64 32}
!42 = !{!"_ZTS12NvFlexVectorIfE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !27, i64 32}
!43 = !{!"_ZTS12NvFlexVectorI5XQuatIfEE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !27, i64 32}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass