; LLVM IR from lzyrapx/Competitive-Programming :: jisuanke/2020计蒜之道第一场/A.ll (Z12MainDiagonalii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_Z2veB5cxx11 = external dso_local global %"class.std::vector", align 8
@next_step = external dso_local global i8, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z12MainDiagonalii(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = sub nsw i32 %10, 1
  store i32 %11, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = sub nsw i32 %12, 1
  store i32 %13, ptr %8, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %34, %2
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = icmp sge i32 %15, 0
  br i1 %16, label %17, label %32

17:                                               ; preds = %14
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = icmp sge i32 %18, 0
  br i1 %19, label %20, label %32

20:                                               ; preds = %17
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_Z2veB5cxx11, i64 noundef %22) #3
  %24 = load i32, ptr %8, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %23, i64 noundef %25)
  %27 = load i8, ptr %26, align 1, !tbaa !9
  %28 = sext i8 %27 to i32
  %29 = load i8, ptr @next_step, align 1, !tbaa !9
  %30 = sext i8 %29 to i32
  %31 = icmp eq i32 %28, %30
  br label %32

32:                                               ; preds = %20, %17, %14
  %33 = phi i1 [ false, %17 ], [ false, %14 ], [ %31, %20 ]
  br i1 %33, label %34, label %41

34:                                               ; preds = %32
  %35 = load i32, ptr %6, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %38 = add nsw i32 %37, -1
  store i32 %38, ptr %7, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = add nsw i32 %39, -1
  store i32 %40, ptr %8, align 4, !tbaa !5
  br label %14, !llvm.loop !10

41:                                               ; preds = %32
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !5
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %8, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %66, %41
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = icmp slt i32 %47, 25
  br i1 %48, label %49, label %64

49:                                               ; preds = %46
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = icmp slt i32 %50, 25
  br i1 %51, label %52, label %64

52:                                               ; preds = %49
  %53 = load i32, ptr %7, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_Z2veB5cxx11, i64 noundef %54) #3
  %56 = load i32, ptr %8, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %55, i64 noundef %57)
  %59 = load i8, ptr %58, align 1, !tbaa !9
  %60 = sext i8 %59 to i32
  %61 = load i8, ptr @next_step, align 1, !tbaa !9
  %62 = sext i8 %61 to i32
  %63 = icmp eq i32 %60, %62
  br label %64

64:                                               ; preds = %52, %49, %46
  %65 = phi i1 [ false, %49 ], [ false, %46 ], [ %63, %52 ]
  br i1 %65, label %66, label %73

66:                                               ; preds = %64
  %67 = load i32, ptr %6, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %6, align 4, !tbaa !5
  %69 = load i32, ptr %7, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %7, align 4, !tbaa !5
  %71 = load i32, ptr %8, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %8, align 4, !tbaa !5
  br label %46, !llvm.loop !12

73:                                               ; preds = %64
  %74 = load i32, ptr %6, align 4, !tbaa !5
  %75 = icmp sge i32 %74, 4
  br i1 %75, label %76, label %77

76:                                               ; preds = %73
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %78

77:                                               ; preds = %73
  store i1 false, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %78

78:                                               ; preds = %77, %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %79 = load i1, ptr %3, align 1
  ret i1 %79
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_Z2veB5cxx11 = external dso_local global %"class.std::vector", align 8
@next_step = external dso_local local_unnamed_addr global i8, align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z12MainDiagonalii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %0, 0
  %4 = icmp sgt i32 %1, 0
  %or.cond31 = and i1 %3, %4
  br i1 %or.cond31, label %.lr.ph.preheader, label %.critedge

.lr.ph.preheader:                                 ; preds = %2
  %5 = zext nneg i32 %0 to i64
  %6 = zext nneg i32 %1 to i64
  %7 = add nsw i32 %1, -1
  %8 = add nsw i32 %0, -1
  %umin = tail call i32 @llvm.umin.i32(i32 %7, i32 %8)
  %9 = add nuw nsw i32 %umin, 1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %15
  %indvars.iv47 = phi i64 [ %6, %.lr.ph.preheader ], [ %indvars.iv.next48, %15 ]
  %indvars.iv = phi i64 [ %5, %.lr.ph.preheader ], [ %indvars.iv.next, %15 ]
  %.02632 = phi i32 [ 0, %.lr.ph.preheader ], [ %16, %15 ]
  %indvars.iv.next48 = add nsw i64 %indvars.iv47, -1
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %10 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_Z2veB5cxx11, i64 noundef %indvars.iv.next) #2
  %11 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %10, i64 noundef %indvars.iv.next48)
  %12 = load i8, ptr %11, align 1, !tbaa !5
  %13 = load i8, ptr @next_step, align 1, !tbaa !5
  %14 = icmp eq i8 %12, %13
  br i1 %14, label %15, label %.critedge

15:                                               ; preds = %.lr.ph
  %16 = add nuw nsw i32 %.02632, 1
  %exitcond.not = icmp eq i32 %.02632, %umin
  br i1 %exitcond.not, label %.critedge, label %.lr.ph, !llvm.loop !8

.critedge:                                        ; preds = %.lr.ph, %15, %2
  %.026.lcssa = phi i32 [ 0, %2 ], [ %9, %15 ], [ %.02632, %.lr.ph ]
  %17 = icmp slt i32 %0, 24
  %18 = icmp slt i32 %1, 24
  %or.cond339 = and i1 %17, %18
  br i1 %or.cond339, label %.lr.ph43.preheader, label %.critedge5

.lr.ph43.preheader:                               ; preds = %.critedge
  %19 = sext i32 %0 to i64
  %20 = sext i32 %1 to i64
  br label %.lr.ph43

.lr.ph43:                                         ; preds = %.lr.ph43.preheader, %26
  %indvars.iv54 = phi i64 [ %20, %.lr.ph43.preheader ], [ %indvars.iv.next55, %26 ]
  %indvars.iv52 = phi i64 [ %19, %.lr.ph43.preheader ], [ %indvars.iv.next53, %26 ]
  %.12740 = phi i32 [ %.026.lcssa, %.lr.ph43.preheader ], [ %27, %26 ]
  %indvars.iv.next55 = add nsw i64 %indvars.iv54, 1
  %indvars.iv.next53 = add nsw i64 %indvars.iv52, 1
  %21 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_Z2veB5cxx11, i64 noundef %indvars.iv.next53) #2
  %22 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %21, i64 noundef %indvars.iv.next55)
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %24 = load i8, ptr @next_step, align 1, !tbaa !5
  %25 = icmp eq i8 %23, %24
  br i1 %25, label %26, label %.critedge5

26:                                               ; preds = %.lr.ph43
  %27 = add nuw nsw i32 %.12740, 1
  %28 = icmp slt i64 %indvars.iv52, 23
  %29 = icmp slt i64 %indvars.iv54, 23
  %or.cond3 = select i1 %28, i1 %29, i1 false
  br i1 %or.cond3, label %.lr.ph43, label %.critedge5, !llvm.loop !10

.critedge5:                                       ; preds = %.lr.ph43, %26, %.critedge
  %.127.lcssa = phi i32 [ %.026.lcssa, %.critedge ], [ %27, %26 ], [ %.12740, %.lr.ph43 ]
  %30 = icmp ugt i32 %.127.lcssa, 3
  ret i1 %30
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass