; LLVM IR from trabucayre/openFPGALoader :: src/anlogic.ll (ZN7Anlogic20prepare_flash_accessEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Device = type <{ ptr, ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i8, i8, i8, i8 }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), i8 noundef zeroext, i32 noundef, i32 noundef) #1

declare void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7Anlogic20prepare_flash_accessEv(ptr noundef nonnull align 8 dereferenceable(144) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %14, %1
  %7 = load i32, ptr %3, align 4, !tbaa !9
  %8 = icmp slt i32 %7, 5
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %17

10:                                               ; preds = %6
  %11 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %12 = load ptr, ptr %11, align 8, !tbaa !11
  %13 = call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %12, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  br label %14

14:                                               ; preds = %10
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = add nsw i32 %15, 1
  store i32 %16, ptr %3, align 4, !tbaa !9
  br label %6, !llvm.loop !18

17:                                               ; preds = %9
  %18 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %19 = load ptr, ptr %18, align 8, !tbaa !11
  %20 = call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %19, i8 noundef zeroext 1, i32 noundef 8, i32 noundef 1)
  %21 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %22 = load ptr, ptr %21, align 8, !tbaa !11
  %23 = call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %22, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %24 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %25 = load ptr, ptr %24, align 8, !tbaa !11
  %26 = call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %25, i8 noundef zeroext 57, i32 noundef 8, i32 noundef 1)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %34, %17
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 4
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %37

31:                                               ; preds = %27
  %32 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %33 = load ptr, ptr %32, align 8, !tbaa !11
  call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %33, i32 noundef 50000)
  br label %34

34:                                               ; preds = %31
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %4, align 4, !tbaa !9
  br label %27, !llvm.loop !20

37:                                               ; preds = %30
  ret i1 true
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTS6Device", !6, i64 8, !13, i64 16, !13, i64 48, !16, i64 80, !17, i64 84, !17, i64 85, !17, i64 86}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSN6Device9prog_modeE", !7, i64 0}
!17 = !{!"bool", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193), i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7Anlogic20prepare_flash_accessEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(144) %0) unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %3, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %5, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %7, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %9, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %11 = load ptr, ptr %2, align 8, !tbaa !5
  %12 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %11, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %13, i8 noundef zeroext 1, i32 noundef 8, i32 noundef 1)
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %15, i8 noundef zeroext -1, i32 noundef 8, i32 noundef 1)
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = tail call noundef i32 @_ZN4Jtag7shiftIREhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %17, i8 noundef zeroext 57, i32 noundef 8, i32 noundef 1)
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  tail call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %19, i32 noundef 50000)
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  tail call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %20, i32 noundef 50000)
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  tail call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %21, i32 noundef 50000)
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  tail call void @_ZN4Jtag9toggleClkEi(ptr noundef nonnull align 8 dereferenceable(193) %22, i32 noundef 50000)
  ret i1 true
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS6Device", !7, i64 8, !10, i64 16, !10, i64 48, !13, i64 80, !14, i64 84, !14, i64 85, !14, i64 86}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !11, i64 0, !12, i64 8, !8, i64 16}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !7, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!"_ZTSN6Device9prog_modeE", !8, i64 0}
!14 = !{!"bool", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass