; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/JAN2021-Long/ORAND.ll (Z7fwht_orPxi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ext = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7fwht_orPxi(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 2, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %66, %2
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = load i32, ptr @ext, align 4, !tbaa !9
  %13 = icmp sle i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %10
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %71

15:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %61, %15
  %17 = load i32, ptr %8, align 4, !tbaa !9
  %18 = load i32, ptr @ext, align 4, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %65

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %57, %21
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %22
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %60

27:                                               ; preds = %22
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = add nsw i32 %29, %30
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = add nsw i32 %31, %32
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i64, ptr %28, i64 %34
  %36 = load i64, ptr %35, align 8, !tbaa !11
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = add nsw i32 %38, %39
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds i64, ptr %37, i64 %41
  %43 = load i64, ptr %42, align 8, !tbaa !11
  %44 = load i32, ptr %4, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = mul nsw i64 %43, %45
  %47 = add nsw i64 %36, %46
  %48 = srem i64 %47, 998244353
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = load i32, ptr %9, align 4, !tbaa !9
  %52 = add nsw i32 %50, %51
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = add nsw i32 %52, %53
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds i64, ptr %49, i64 %55
  store i64 %48, ptr %56, align 8, !tbaa !11
  br label %57

57:                                               ; preds = %27
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %9, align 4, !tbaa !9
  br label %22, !llvm.loop !13

60:                                               ; preds = %26
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %5, align 4, !tbaa !9
  %63 = load i32, ptr %8, align 4, !tbaa !9
  %64 = add nsw i32 %63, %62
  store i32 %64, ptr %8, align 4, !tbaa !9
  br label %16, !llvm.loop !15

65:                                               ; preds = %20
  br label %66

66:                                               ; preds = %65
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = shl i32 %67, 1
  store i32 %68, ptr %5, align 4, !tbaa !9
  %69 = load i32, ptr %6, align 4, !tbaa !9
  %70 = shl i32 %69, 1
  store i32 %70, ptr %6, align 4, !tbaa !9
  br label %10, !llvm.loop !16

71:                                               ; preds = %14
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ext = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @_Z7fwht_orPxi(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @ext, align 4, !tbaa !5
  %.not27 = icmp slt i32 %3, 2
  br i1 %.not27, label %._crit_edge, label %.preheader23.lr.ph

.preheader23.lr.ph:                               ; preds = %2
  %4 = sext i32 %1 to i64
  %5 = zext nneg i32 %3 to i64
  br label %.preheader23.us

.preheader23.us:                                  ; preds = %._crit_edge26.us, %.preheader23.lr.ph
  %.02130.us = phi i32 [ 1, %.preheader23.lr.ph ], [ %11, %._crit_edge26.us ]
  %.02228.us = phi i32 [ 2, %.preheader23.lr.ph ], [ %10, %._crit_edge26.us ]
  %6 = icmp sgt i32 %.02130.us, 0
  br i1 %6, label %.preheader.us.us.preheader, label %._crit_edge26.us

.preheader.us.us.preheader:                       ; preds = %.preheader23.us
  %7 = zext nneg i32 %.02130.us to i64
  %8 = sext i32 %.02228.us to i64
  %wide.trip.count = zext nneg i32 %.02130.us to i64
  %invariant.gep = getelementptr i64, ptr %0, i64 %7
  %xtraiter = and i64 %wide.trip.count, 1
  %9 = icmp eq i32 %.02130.us, 1
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader.us.us

._crit_edge26.us:                                 ; preds = %._crit_edge.us.us, %.preheader23.us
  %10 = shl i32 %.02228.us, 1
  %11 = shl i32 %.02130.us, 1
  %.not.us = icmp sgt i32 %10, %3
  br i1 %.not.us, label %._crit_edge, label %.preheader23.us, !llvm.loop !9

.preheader.us.us:                                 ; preds = %.preheader.us.us.preheader, %._crit_edge.us.us
  %indvars.iv38 = phi i64 [ 0, %.preheader.us.us.preheader ], [ %indvars.iv.next39, %._crit_edge.us.us ]
  br i1 %9, label %._crit_edge.us.us.unr-lcssa, label %.preheader.us.us.new

.preheader.us.us.new:                             ; preds = %.preheader.us.us, %.preheader.us.us.new
  %indvars.iv = phi i64 [ %indvars.iv.next.1, %.preheader.us.us.new ], [ 0, %.preheader.us.us ]
  %niter = phi i64 [ %niter.next.1, %.preheader.us.us.new ], [ 0, %.preheader.us.us ]
  %12 = add nsw i64 %indvars.iv, %indvars.iv38
  %gep = getelementptr i64, ptr %invariant.gep, i64 %12
  %13 = load i64, ptr %gep, align 8, !tbaa !11
  %14 = getelementptr inbounds i64, ptr %0, i64 %12
  %15 = load i64, ptr %14, align 8, !tbaa !11
  %16 = mul nsw i64 %15, %4
  %17 = add nsw i64 %16, %13
  %18 = srem i64 %17, 998244353
  store i64 %18, ptr %gep, align 8, !tbaa !11
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %19 = add nsw i64 %indvars.iv.next, %indvars.iv38
  %gep.1 = getelementptr i64, ptr %invariant.gep, i64 %19
  %20 = load i64, ptr %gep.1, align 8, !tbaa !11
  %21 = getelementptr inbounds i64, ptr %0, i64 %19
  %22 = load i64, ptr %21, align 8, !tbaa !11
  %23 = mul nsw i64 %22, %4
  %24 = add nsw i64 %23, %20
  %25 = srem i64 %24, 998244353
  store i64 %25, ptr %gep.1, align 8, !tbaa !11
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.us.us.unr-lcssa, label %.preheader.us.us.new, !llvm.loop !13

._crit_edge.us.us.unr-lcssa:                      ; preds = %.preheader.us.us.new, %.preheader.us.us
  %indvars.iv.unr = phi i64 [ 0, %.preheader.us.us ], [ %indvars.iv.next.1, %.preheader.us.us.new ]
  br i1 %lcmp.mod.not, label %._crit_edge.us.us, label %._crit_edge.us.us.epilog-lcssa

._crit_edge.us.us.epilog-lcssa:                   ; preds = %._crit_edge.us.us.unr-lcssa
  %26 = add nsw i64 %indvars.iv.unr, %indvars.iv38
  %gep.epil = getelementptr i64, ptr %invariant.gep, i64 %26
  %27 = load i64, ptr %gep.epil, align 8, !tbaa !11
  %28 = getelementptr inbounds i64, ptr %0, i64 %26
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %30 = mul nsw i64 %29, %4
  %31 = add nsw i64 %30, %27
  %32 = srem i64 %31, 998244353
  store i64 %32, ptr %gep.epil, align 8, !tbaa !11
  br label %._crit_edge.us.us

._crit_edge.us.us:                                ; preds = %._crit_edge.us.us.unr-lcssa, %._crit_edge.us.us.epilog-lcssa
  %indvars.iv.next39 = add nsw i64 %indvars.iv38, %8
  %33 = icmp slt i64 %indvars.iv.next39, %5
  br i1 %33, label %.preheader.us.us, label %._crit_edge26.us, !llvm.loop !14

._crit_edge:                                      ; preds = %._crit_edge26.us, %2
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass