; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SYSCFG_TypeDef = type { i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, [61 x i32], i32, [118 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_SYSCFG_CM7BootAddConfig(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %17

7:                                                ; preds = %2
  %8 = load volatile i32, ptr getelementptr inbounds (%struct.SYSCFG_TypeDef, ptr inttoptr (i64 1476396032 to ptr), i32 0, i32 14), align 4, !tbaa !9
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, -4294901761
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = lshr i32 %11, 16
  %13 = shl i32 %12, 16
  %14 = zext i32 %13 to i64
  %15 = or i64 %10, %14
  %16 = trunc i64 %15 to i32
  store volatile i32 %16, ptr getelementptr inbounds (%struct.SYSCFG_TypeDef, ptr inttoptr (i64 1476396032 to ptr), i32 0, i32 14), align 4, !tbaa !9
  br label %26

17:                                               ; preds = %2
  %18 = load volatile i32, ptr getelementptr inbounds (%struct.SYSCFG_TypeDef, ptr inttoptr (i64 1476396032 to ptr), i32 0, i32 15), align 4, !tbaa !11
  %19 = zext i32 %18 to i64
  %20 = and i64 %19, -65536
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = lshr i32 %21, 16
  %23 = zext i32 %22 to i64
  %24 = or i64 %20, %23
  %25 = trunc i64 %24 to i32
  store volatile i32 %25, ptr getelementptr inbounds (%struct.SYSCFG_TypeDef, ptr inttoptr (i64 1476396032 to ptr), i32 0, i32 15), align 4, !tbaa !11
  br label %26

26:                                               ; preds = %17, %7
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 776}
!10 = !{!"", !6, i64 0, !6, i64 4, !7, i64 8, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !7, i64 48, !6, i64 292, !7, i64 296, !6, i64 768, !6, i64 772, !6, i64 776, !6, i64 780, !6, i64 784, !6, i64 788, !6, i64 792, !6, i64 796, !6, i64 800, !6, i64 804, !6, i64 808, !6, i64 812, !6, i64 816, !6, i64 820, !6, i64 824, !6, i64 828, !6, i64 832, !6, i64 836}
!11 = !{!10, !6, i64 780}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @HAL_SYSCFG_CM7BootAddConfig(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i32 %0, 0
  br i1 %3, label %4, label %9

4:                                                ; preds = %2
  %5 = load volatile i32, ptr inttoptr (i64 1476396808 to ptr), align 8, !tbaa !5
  %6 = and i32 %5, 65535
  %7 = and i32 %1, -65536
  %8 = or disjoint i32 %6, %7
  store volatile i32 %8, ptr inttoptr (i64 1476396808 to ptr), align 8, !tbaa !5
  br label %14

9:                                                ; preds = %2
  %10 = load volatile i32, ptr inttoptr (i64 1476396812 to ptr), align 4, !tbaa !10
  %11 = and i32 %10, -65536
  %12 = lshr i32 %1, 16
  %13 = or disjoint i32 %11, %12
  store volatile i32 %13, ptr inttoptr (i64 1476396812 to ptr), align 4, !tbaa !10
  br label %14

14:                                               ; preds = %9, %4
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 776}
!6 = !{!"", !7, i64 0, !7, i64 4, !8, i64 8, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !8, i64 48, !7, i64 292, !8, i64 296, !7, i64 768, !7, i64 772, !7, i64 776, !7, i64 780, !7, i64 784, !7, i64 788, !7, i64 792, !7, i64 796, !7, i64 800, !7, i64 804, !7, i64 808, !7, i64 812, !7, i64 816, !7, i64 820, !7, i64 824, !7, i64 828, !7, i64 832, !7, i64 836}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 780}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass