; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Reset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NAND_HandleTypeDef = type { ptr, %struct.FMC_NAND_InitTypeDef, i32, i32, %struct.NAND_DeviceConfigTypeDef }
%struct.FMC_NAND_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.NAND_DeviceConfigTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_NAND_Reset(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %6, i32 0, i32 3
  %8 = load volatile i32, ptr %7, align 8, !tbaa !9
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 2, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %45

11:                                               ; preds = %1
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %12, i32 0, i32 3
  %14 = load volatile i32, ptr %13, align 8, !tbaa !9
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %42

16:                                               ; preds = %11
  br label %17

17:                                               ; preds = %16
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %18, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !13
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  store i32 2, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %45

23:                                               ; preds = %17
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %24, i32 0, i32 2
  store i32 1, ptr %25, align 4, !tbaa !13
  br label %26

26:                                               ; preds = %23
  br label %27

27:                                               ; preds = %26
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %29, i32 0, i32 3
  store volatile i32 2, ptr %30, align 8, !tbaa !9
  store i32 -2147483648, ptr %4, align 4, !tbaa !14
  %31 = load i32, ptr %4, align 4, !tbaa !14
  %32 = or i32 %31, 65536
  %33 = zext i32 %32 to i64
  %34 = inttoptr i64 %33 to ptr
  store volatile i8 -1, ptr %34, align 1, !tbaa !15
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %35, i32 0, i32 3
  store volatile i32 1, ptr %36, align 8, !tbaa !9
  br label %37

37:                                               ; preds = %28
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %38, i32 0, i32 2
  store i32 0, ptr %39, align 4, !tbaa !13
  br label %40

40:                                               ; preds = %37
  br label %41

41:                                               ; preds = %40
  br label %43

42:                                               ; preds = %11
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %45

43:                                               ; preds = %41
  br label %44

44:                                               ; preds = %43
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %45

45:                                               ; preds = %44, %42, %22, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %46 = load i32, ptr %2, align 4
  ret i32 %46
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 40}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 36, !12, i64 40, !11, i64 44}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !12, i64 36}
!14 = !{!12, !12, i64 0}
!15 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_NAND_Reset(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 40
  %3 = load volatile i32, ptr %2, align 8, !tbaa !5
  %4 = icmp eq i32 %3, 2
  br i1 %4, label %13, label %5

5:                                                ; preds = %1
  %6 = load volatile i32, ptr %2, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %8, label %13

8:                                                ; preds = %5
  %9 = getelementptr inbounds i8, ptr %0, i64 36
  %10 = load i32, ptr %9, align 4, !tbaa !12
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  store volatile i32 2, ptr %2, align 8, !tbaa !5
  store volatile i8 -1, ptr inttoptr (i64 2147549184 to ptr), align 65536, !tbaa !13
  store volatile i32 1, ptr %2, align 8, !tbaa !5
  store i32 0, ptr %9, align 4, !tbaa !12
  br label %13

13:                                               ; preds = %5, %8, %1, %12
  %.0 = phi i32 [ 0, %12 ], [ 2, %1 ], [ 2, %8 ], [ 1, %5 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 40}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40, !10, i64 44}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 36}
!13 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass