; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/Feb2021-Long/SUMXOR2.ll (Z8checkXORx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local global i64, align 8
@starters = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@_ZL2PI = external hidden global double, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8checkXORx(i64 noundef %0) #2 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca double, align 8
  %5 = alloca i64, align 8
  %6 = alloca double, align 8
  %7 = alloca %struct.base, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %9 = load i64, ptr @lim, align 8, !tbaa !5
  %10 = icmp sle i64 %8, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  br label %104

12:                                               ; preds = %1
  %13 = load i64, ptr %2, align 8, !tbaa !5
  %14 = trunc i64 %13 to i32
  %15 = shl i32 1, %14
  %16 = sext i32 %15 to i64
  call void @_ZNSt6vectorIxSaIxEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %16)
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  store i64 0, ptr %3, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %39, %12
  %18 = load i64, ptr %3, align 8, !tbaa !5
  %19 = load i64, ptr %2, align 8, !tbaa !5
  %20 = trunc i64 %19 to i32
  %21 = shl i32 1, %20
  %22 = sext i32 %21 to i64
  %23 = icmp slt i64 %18, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  br label %42

25:                                               ; preds = %17
  %26 = load i64, ptr %3, align 8, !tbaa !5
  %27 = ashr i64 %26, 1
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %27) #5
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %30 = ashr i64 %29, 1
  %31 = load i64, ptr %3, align 8, !tbaa !5
  %32 = and i64 %31, 1
  %33 = load i64, ptr %2, align 8, !tbaa !5
  %34 = sub nsw i64 %33, 1
  %35 = shl i64 %32, %34
  %36 = add nsw i64 %30, %35
  %37 = load i64, ptr %3, align 8, !tbaa !5
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %37) #5
  store i64 %36, ptr %38, align 8, !tbaa !5
  br label %39

39:                                               ; preds = %25
  %40 = load i64, ptr %3, align 8, !tbaa !5
  %41 = add nsw i64 %40, 1
  store i64 %41, ptr %3, align 8, !tbaa !5
  br label %17, !llvm.loop !9

42:                                               ; preds = %24
  %43 = load i64, ptr %2, align 8, !tbaa !5
  %44 = trunc i64 %43 to i32
  %45 = shl i32 1, %44
  %46 = sext i32 %45 to i64
  call void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %46)
  br label %47

47:                                               ; preds = %101, %42
  %48 = load i64, ptr @lim, align 8, !tbaa !5
  %49 = load i64, ptr %2, align 8, !tbaa !5
  %50 = icmp slt i64 %48, %49
  br i1 %50, label %51, label %104

51:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %52 = load double, ptr @_ZL2PI, align 8, !tbaa !11
  %53 = fmul double 2.000000e+00, %52
  %54 = load i64, ptr @lim, align 8, !tbaa !5
  %55 = add nsw i64 %54, 1
  %56 = trunc i64 %55 to i32
  %57 = shl i32 1, %56
  %58 = sitofp i32 %57 to double
  %59 = fdiv double %53, %58
  store double %59, ptr %4, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %60 = load i64, ptr @lim, align 8, !tbaa !5
  %61 = sub nsw i64 %60, 1
  %62 = trunc i64 %61 to i32
  %63 = shl i32 1, %62
  %64 = sext i32 %63 to i64
  store i64 %64, ptr %5, align 8, !tbaa !5
  br label %65

65:                                               ; preds = %98, %51
  %66 = load i64, ptr %5, align 8, !tbaa !5
  %67 = load i64, ptr @lim, align 8, !tbaa !5
  %68 = trunc i64 %67 to i32
  %69 = shl i32 1, %68
  %70 = sext i32 %69 to i64
  %71 = icmp slt i64 %66, %70
  br i1 %71, label %73, label %72

72:                                               ; preds = %65
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %101

73:                                               ; preds = %65
  %74 = load i64, ptr %5, align 8, !tbaa !5
  %75 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %74) #5
  %76 = load i64, ptr %5, align 8, !tbaa !5
  %77 = shl i64 %76, 1
  %78 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %77) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %78, ptr align 8 %75, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %79 = load double, ptr %4, align 8, !tbaa !11
  %80 = load i64, ptr %5, align 8, !tbaa !5
  %81 = mul nsw i64 2, %80
  %82 = add nsw i64 %81, 1
  %83 = load i64, ptr @lim, align 8, !tbaa !5
  %84 = trunc i64 %83 to i32
  %85 = shl i32 1, %84
  %86 = sext i32 %85 to i64
  %87 = sub nsw i64 %82, %86
  %88 = sitofp i64 %87 to double
  %89 = fmul double %79, %88
  store double %89, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #5
  %90 = load double, ptr %6, align 8, !tbaa !11
  %91 = call double @cos(double noundef %90) #5
  %92 = load double, ptr %6, align 8, !tbaa !11
  %93 = call double @sin(double noundef %92) #5
  call void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %7, double noundef %91, double noundef %93)
  %94 = load i64, ptr %5, align 8, !tbaa !5
  %95 = shl i64 %94, 1
  %96 = add nsw i64 %95, 1
  %97 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %96) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %97, ptr align 8 %7, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %98

98:                                               ; preds = %73
  %99 = load i64, ptr %5, align 8, !tbaa !5
  %100 = add nsw i64 %99, 1
  store i64 %100, ptr %5, align 8, !tbaa !5
  br label %65, !llvm.loop !14

101:                                              ; preds = %72
  %102 = load i64, ptr @lim, align 8, !tbaa !5
  %103 = add nsw i64 %102, 1
  store i64 %103, ptr @lim, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  br label %47, !llvm.loop !15

104:                                              ; preds = %47, %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind
declare double @cos(double noundef) #4

; Function Attrs: nounwind
declare double @sin(double noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{i64 0, i64 8, !11, i64 8, i64 8, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local local_unnamed_addr global i64, align 8
@starters = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@_ZL2PI = external hidden local_unnamed_addr global double, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8checkXORx(i64 noundef %0) local_unnamed_addr #2 {
  %2 = alloca %struct.base, align 8
  %3 = load i64, ptr @lim, align 8, !tbaa !5
  %.not = icmp slt i64 %3, %0
  br i1 %.not, label %4, label %.loopexit

4:                                                ; preds = %1
  %5 = trunc i64 %0 to i32
  %6 = shl nuw i32 1, %5
  %7 = sext i32 %6 to i64
  tail call void @_ZNSt6vectorIxSaIxEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %7)
  %.not30 = icmp eq i32 %5, 31
  br i1 %.not30, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %4
  %8 = add nsw i64 %0, -1
  %smax = tail call i64 @llvm.smax.i64(i64 %7, i64 1)
  br label %11

._crit_edge:                                      ; preds = %11, %4
  tail call void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %7)
  %9 = load i64, ptr @lim, align 8, !tbaa !5
  %10 = icmp slt i64 %9, %0
  br i1 %10, label %.lr.ph29, label %.loopexit

11:                                               ; preds = %.lr.ph, %11
  %.023 = phi i64 [ 0, %.lr.ph ], [ %20, %11 ]
  %12 = lshr i64 %.023, 1
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %12) #6
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = ashr i64 %14, 1
  %16 = and i64 %.023, 1
  %17 = shl nuw i64 %16, %8
  %18 = add nsw i64 %15, %17
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %.023) #6
  store i64 %18, ptr %19, align 8, !tbaa !5
  %20 = add nuw nsw i64 %.023, 1
  %exitcond.not = icmp eq i64 %20, %smax
  br i1 %exitcond.not, label %._crit_edge, label %11, !llvm.loop !9

.lr.ph29:                                         ; preds = %._crit_edge, %._crit_edge27
  %21 = phi i64 [ %34, %._crit_edge27 ], [ %9, %._crit_edge ]
  %22 = load double, ptr @_ZL2PI, align 8, !tbaa !11
  %23 = fmul double %22, 2.000000e+00
  %24 = trunc i64 %21 to i32
  %25 = add i32 %24, 1
  %26 = shl nuw i32 1, %25
  %27 = sitofp i32 %26 to double
  %28 = fdiv double %23, %27
  %29 = add i32 %24, -1
  %30 = shl nuw i32 1, %29
  %31 = shl nuw i32 1, %24
  %32 = icmp slt i32 %30, %31
  br i1 %32, label %.lr.ph26.preheader, label %._crit_edge27

.lr.ph26.preheader:                               ; preds = %.lr.ph29
  %33 = sext i32 %30 to i64
  br label %.lr.ph26

._crit_edge27:                                    ; preds = %.lr.ph26, %.lr.ph29
  %.lcssa = phi i64 [ %21, %.lr.ph29 ], [ %51, %.lr.ph26 ]
  %34 = add nsw i64 %.lcssa, 1
  store i64 %34, ptr @lim, align 8, !tbaa !5
  %35 = icmp slt i64 %34, %0
  br i1 %35, label %.lr.ph29, label %.loopexit, !llvm.loop !13

.lr.ph26:                                         ; preds = %.lr.ph26.preheader, %.lr.ph26
  %.01924 = phi i64 [ %50, %.lr.ph26 ], [ %33, %.lr.ph26.preheader ]
  %36 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %.01924) #6
  %37 = shl nsw i64 %.01924, 1
  %38 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %37) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %38, ptr noundef nonnull align 8 dereferenceable(16) %36, i64 16, i1 false), !tbaa.struct !14
  %39 = or disjoint i64 %37, 1
  %40 = load i64, ptr @lim, align 8, !tbaa !5
  %41 = trunc i64 %40 to i32
  %42 = shl nuw i32 1, %41
  %43 = sext i32 %42 to i64
  %44 = sub nsw i64 %39, %43
  %45 = sitofp i64 %44 to double
  %46 = fmul double %28, %45
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #6
  %47 = call double @cos(double noundef %46) #6
  %48 = call double @sin(double noundef %46) #6
  call void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %2, double noundef %47, double noundef %48)
  %49 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @starters, i64 noundef %39) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %49, ptr noundef nonnull align 8 dereferenceable(16) %2, i64 16, i1 false), !tbaa.struct !14
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #6
  %50 = add nsw i64 %.01924, 1
  %51 = load i64, ptr @lim, align 8, !tbaa !5
  %52 = trunc i64 %51 to i32
  %53 = shl nuw i32 1, %52
  %54 = sext i32 %53 to i64
  %55 = icmp slt i64 %50, %54
  br i1 %55, label %.lr.ph26, label %._crit_edge27, !llvm.loop !15

.loopexit:                                        ; preds = %._crit_edge27, %._crit_edge, %1
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @cos(double noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sin(double noundef) local_unnamed_addr #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = !{i64 0, i64 8, !11, i64 8, i64 8, !11}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass