; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DeactivateAlarm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RTC_DeactivateAlarm(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  br label %8

8:                                                ; preds = %2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %9, i32 0, i32 2
  %11 = load i32, ptr %10, align 4, !tbaa !11
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %14

13:                                               ; preds = %8
  store i32 2, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %155

14:                                               ; preds = %8
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %15, i32 0, i32 2
  store i32 1, ptr %16, align 4, !tbaa !11
  br label %17

17:                                               ; preds = %14
  br label %18

18:                                               ; preds = %17
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %20, i32 0, i32 3
  store volatile i32 2, ptr %21, align 8, !tbaa !14
  br label %22

22:                                               ; preds = %19
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !15
  %26 = getelementptr inbounds %struct.RTC_TypeDef, ptr %25, i32 0, i32 9
  store volatile i32 202, ptr %26, align 4, !tbaa !16
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !15
  %30 = getelementptr inbounds %struct.RTC_TypeDef, ptr %29, i32 0, i32 9
  store volatile i32 83, ptr %30, align 4, !tbaa !16
  br label %31

31:                                               ; preds = %22
  br label %32

32:                                               ; preds = %31
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = icmp eq i64 %34, 256
  br i1 %35, label %36, label %88

36:                                               ; preds = %32
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %37, i32 0, i32 0
  %39 = load ptr, ptr %38, align 8, !tbaa !15
  %40 = getelementptr inbounds %struct.RTC_TypeDef, ptr %39, i32 0, i32 2
  %41 = load volatile i32, ptr %40, align 4, !tbaa !18
  %42 = zext i32 %41 to i64
  %43 = and i64 %42, -257
  %44 = trunc i64 %43 to i32
  store volatile i32 %44, ptr %40, align 4, !tbaa !18
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !15
  %48 = getelementptr inbounds %struct.RTC_TypeDef, ptr %47, i32 0, i32 2
  %49 = load volatile i32, ptr %48, align 4, !tbaa !18
  %50 = zext i32 %49 to i64
  %51 = and i64 %50, -4097
  %52 = trunc i64 %51 to i32
  store volatile i32 %52, ptr %48, align 4, !tbaa !18
  %53 = call i32 @HAL_GetTick()
  store i32 %53, ptr %6, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %86, %36
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !15
  %58 = getelementptr inbounds %struct.RTC_TypeDef, ptr %57, i32 0, i32 3
  %59 = load volatile i32, ptr %58, align 4, !tbaa !19
  %60 = zext i32 %59 to i64
  %61 = and i64 %60, 1
  %62 = icmp ne i64 %61, 0
  %63 = zext i1 %62 to i64
  %64 = select i1 %62, i32 1, i32 0
  %65 = icmp eq i32 %64, 0
  br i1 %65, label %66, label %87

66:                                               ; preds = %54
  %67 = call i32 @HAL_GetTick()
  %68 = load i32, ptr %6, align 4, !tbaa !9
  %69 = sub i32 %67, %68
  %70 = icmp ugt i32 %69, 1000
  br i1 %70, label %71, label %86

71:                                               ; preds = %66
  br label %72

72:                                               ; preds = %71
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %73, i32 0, i32 0
  %75 = load ptr, ptr %74, align 8, !tbaa !15
  %76 = getelementptr inbounds %struct.RTC_TypeDef, ptr %75, i32 0, i32 9
  store volatile i32 255, ptr %76, align 4, !tbaa !16
  br label %77

77:                                               ; preds = %72
  br label %78

78:                                               ; preds = %77
  %79 = load ptr, ptr %4, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %79, i32 0, i32 3
  store volatile i32 3, ptr %80, align 8, !tbaa !14
  br label %81

81:                                               ; preds = %78
  %82 = load ptr, ptr %4, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %82, i32 0, i32 2
  store i32 0, ptr %83, align 4, !tbaa !11
  br label %84

84:                                               ; preds = %81
  br label %85

85:                                               ; preds = %84
  store i32 3, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %155

86:                                               ; preds = %66
  br label %54, !llvm.loop !20

87:                                               ; preds = %54
  br label %140

88:                                               ; preds = %32
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %89, i32 0, i32 0
  %91 = load ptr, ptr %90, align 8, !tbaa !15
  %92 = getelementptr inbounds %struct.RTC_TypeDef, ptr %91, i32 0, i32 2
  %93 = load volatile i32, ptr %92, align 4, !tbaa !18
  %94 = zext i32 %93 to i64
  %95 = and i64 %94, -513
  %96 = trunc i64 %95 to i32
  store volatile i32 %96, ptr %92, align 4, !tbaa !18
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !15
  %100 = getelementptr inbounds %struct.RTC_TypeDef, ptr %99, i32 0, i32 2
  %101 = load volatile i32, ptr %100, align 4, !tbaa !18
  %102 = zext i32 %101 to i64
  %103 = and i64 %102, -8193
  %104 = trunc i64 %103 to i32
  store volatile i32 %104, ptr %100, align 4, !tbaa !18
  %105 = call i32 @HAL_GetTick()
  store i32 %105, ptr %6, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %138, %88
  %107 = load ptr, ptr %4, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %107, i32 0, i32 0
  %109 = load ptr, ptr %108, align 8, !tbaa !15
  %110 = getelementptr inbounds %struct.RTC_TypeDef, ptr %109, i32 0, i32 3
  %111 = load volatile i32, ptr %110, align 4, !tbaa !19
  %112 = zext i32 %111 to i64
  %113 = and i64 %112, 2
  %114 = icmp ne i64 %113, 0
  %115 = zext i1 %114 to i64
  %116 = select i1 %114, i32 1, i32 0
  %117 = icmp eq i32 %116, 0
  br i1 %117, label %118, label %139

118:                                              ; preds = %106
  %119 = call i32 @HAL_GetTick()
  %120 = load i32, ptr %6, align 4, !tbaa !9
  %121 = sub i32 %119, %120
  %122 = icmp ugt i32 %121, 1000
  br i1 %122, label %123, label %138

123:                                              ; preds = %118
  br label %124

124:                                              ; preds = %123
  %125 = load ptr, ptr %4, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %125, i32 0, i32 0
  %127 = load ptr, ptr %126, align 8, !tbaa !15
  %128 = getelementptr inbounds %struct.RTC_TypeDef, ptr %127, i32 0, i32 9
  store volatile i32 255, ptr %128, align 4, !tbaa !16
  br label %129

129:                                              ; preds = %124
  br label %130

130:                                              ; preds = %129
  %131 = load ptr, ptr %4, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %131, i32 0, i32 3
  store volatile i32 3, ptr %132, align 8, !tbaa !14
  br label %133

133:                                              ; preds = %130
  %134 = load ptr, ptr %4, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %134, i32 0, i32 2
  store i32 0, ptr %135, align 4, !tbaa !11
  br label %136

136:                                              ; preds = %133
  br label %137

137:                                              ; preds = %136
  store i32 3, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %155

138:                                              ; preds = %118
  br label %106, !llvm.loop !22

139:                                              ; preds = %106
  br label %140

140:                                              ; preds = %139, %87
  br label %141

141:                                              ; preds = %140
  %142 = load ptr, ptr %4, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %142, i32 0, i32 0
  %144 = load ptr, ptr %143, align 8, !tbaa !15
  %145 = getelementptr inbounds %struct.RTC_TypeDef, ptr %144, i32 0, i32 9
  store volatile i32 255, ptr %145, align 4, !tbaa !16
  br label %146

146:                                              ; preds = %141
  br label %147

147:                                              ; preds = %146
  %148 = load ptr, ptr %4, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %148, i32 0, i32 3
  store volatile i32 1, ptr %149, align 8, !tbaa !14
  br label %150

150:                                              ; preds = %147
  %151 = load ptr, ptr %4, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %151, i32 0, i32 2
  store i32 0, ptr %152, align 4, !tbaa !11
  br label %153

153:                                              ; preds = %150
  br label %154

154:                                              ; preds = %153
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %155

155:                                              ; preds = %154, %137, %85, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %156 = load i32, ptr %3, align 4
  ret i32 %156
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 36, !10, i64 40}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!14 = !{!12, !10, i64 40}
!15 = !{!12, !6, i64 0}
!16 = !{!17, !10, i64 36}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204}
!18 = !{!17, !10, i64 8}
!19 = !{!17, !10, i64 12}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_RTC_DeactivateAlarm(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = getelementptr inbounds i8, ptr %0, i64 36
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %45, label %6

6:                                                ; preds = %2
  store i32 1, ptr %3, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  store volatile i32 2, ptr %7, align 8, !tbaa !12
  %8 = load ptr, ptr %0, align 8, !tbaa !13
  %9 = getelementptr inbounds i8, ptr %8, i64 36
  store volatile i32 202, ptr %9, align 4, !tbaa !14
  store volatile i32 83, ptr %9, align 4, !tbaa !14
  %10 = icmp eq i32 %1, 256
  %11 = getelementptr inbounds i8, ptr %8, i64 8
  %12 = load volatile i32, ptr %11, align 4, !tbaa !16
  br i1 %10, label %13, label %28

13:                                               ; preds = %6
  %14 = and i32 %12, -257
  store volatile i32 %14, ptr %11, align 4, !tbaa !16
  %15 = load volatile i32, ptr %11, align 4, !tbaa !16
  %16 = and i32 %15, -4097
  store volatile i32 %16, ptr %11, align 4, !tbaa !16
  %17 = tail call i32 @HAL_GetTick() #2
  br label %18

18:                                               ; preds = %24, %13
  %19 = load ptr, ptr %0, align 8, !tbaa !13
  %20 = getelementptr inbounds i8, ptr %19, i64 12
  %21 = load volatile i32, ptr %20, align 4, !tbaa !17
  %22 = and i32 %21, 1
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %.sink.split

24:                                               ; preds = %18
  %25 = tail call i32 @HAL_GetTick() #2
  %26 = sub i32 %25, %17
  %27 = icmp ugt i32 %26, 1000
  br i1 %27, label %.sink.split.sink.split, label %18, !llvm.loop !18

28:                                               ; preds = %6
  %29 = and i32 %12, -513
  store volatile i32 %29, ptr %11, align 4, !tbaa !16
  %30 = load volatile i32, ptr %11, align 4, !tbaa !16
  %31 = and i32 %30, -8193
  store volatile i32 %31, ptr %11, align 4, !tbaa !16
  %32 = tail call i32 @HAL_GetTick() #2
  br label %33

33:                                               ; preds = %39, %28
  %34 = load ptr, ptr %0, align 8, !tbaa !13
  %35 = getelementptr inbounds i8, ptr %34, i64 12
  %36 = load volatile i32, ptr %35, align 4, !tbaa !17
  %37 = and i32 %36, 2
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %.sink.split

39:                                               ; preds = %33
  %40 = tail call i32 @HAL_GetTick() #2
  %41 = sub i32 %40, %32
  %42 = icmp ugt i32 %41, 1000
  br i1 %42, label %.sink.split.sink.split, label %33, !llvm.loop !20

.sink.split.sink.split:                           ; preds = %39, %24
  %43 = load ptr, ptr %0, align 8, !tbaa !13
  br label %.sink.split

.sink.split:                                      ; preds = %33, %18, %.sink.split.sink.split
  %.sink30 = phi ptr [ %43, %.sink.split.sink.split ], [ %19, %18 ], [ %34, %33 ]
  %.sink = phi i32 [ 3, %.sink.split.sink.split ], [ 1, %18 ], [ 1, %33 ]
  %.0.ph = phi i32 [ 3, %.sink.split.sink.split ], [ 0, %18 ], [ 0, %33 ]
  %44 = getelementptr inbounds i8, ptr %.sink30, i64 36
  store volatile i32 255, ptr %44, align 4, !tbaa !14
  store volatile i32 %.sink, ptr %7, align 8, !tbaa !12
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %.sink.split, %2
  %.0 = phi i32 [ 2, %2 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 36}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 40}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 36}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204}
!16 = !{!15, !11, i64 8}
!17 = !{!15, !11, i64 12}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass