; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (ConfigPdmMicDelay)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SAI_HandleTypeDef = type { ptr, %struct.SAI_InitTypeDef, %struct.SAI_FrameInitTypeDef, %struct.SAI_SlotInitTypeDef, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SAI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.SAI_PdmInitTypeDef, i32, i32, i32, i32 }
%struct.SAI_PdmInitTypeDef = type { i32, i32, i32 }
%struct.SAI_FrameInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SAI_SlotInitTypeDef = type { i32, i32, i32, i32 }
%struct.SAIEx_PdmMicDelayParamTypeDef = type { i32, i32, i32 }
%struct.SAI_TypeDef = type { i32, [16 x i32], i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SAIEx_ConfigPdmMicDelay(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %8, i32 0, i32 0
  %10 = load ptr, ptr %9, align 8, !tbaa !11
  %11 = icmp eq ptr %10, inttoptr (i64 1073829892 to ptr)
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  br label %20

13:                                               ; preds = %2
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %14, i32 0, i32 0
  %16 = load ptr, ptr %15, align 8, !tbaa !11
  %17 = icmp eq ptr %16, inttoptr (i64 1476416516 to ptr)
  %18 = zext i1 %17 to i64
  %19 = select i1 %17, ptr inttoptr (i64 1476416512 to ptr), ptr null
  br label %20

20:                                               ; preds = %13, %12
  %21 = phi ptr [ inttoptr (i64 1073829888 to ptr), %12 ], [ %19, %13 ]
  store ptr %21, ptr %7, align 8, !tbaa !5
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %24, label %25

24:                                               ; preds = %20
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %62

25:                                               ; preds = %20
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.SAIEx_PdmMicDelayParamTypeDef, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 4, !tbaa !18
  %29 = sub i32 %28, 1
  %30 = mul i32 8, %29
  store i32 %30, ptr %6, align 4, !tbaa !9
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %31, i32 0, i32 12
  %33 = load volatile i32, ptr %32, align 4, !tbaa !19
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %60

35:                                               ; preds = %25
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = icmp ule i32 %36, 24
  br i1 %37, label %38, label %60

38:                                               ; preds = %35
  %39 = load i32, ptr %6, align 4, !tbaa !9
  %40 = shl i32 119, %39
  %41 = xor i32 %40, -1
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.SAI_TypeDef, ptr %42, i32 0, i32 3
  %44 = load volatile i32, ptr %43, align 4, !tbaa !20
  %45 = and i32 %44, %41
  store volatile i32 %45, ptr %43, align 4, !tbaa !20
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.SAIEx_PdmMicDelayParamTypeDef, ptr %46, i32 0, i32 2
  %48 = load i32, ptr %47, align 4, !tbaa !22
  %49 = shl i32 %48, 4
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.SAIEx_PdmMicDelayParamTypeDef, ptr %50, i32 0, i32 1
  %52 = load i32, ptr %51, align 4, !tbaa !23
  %53 = or i32 %49, %52
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = shl i32 %53, %54
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.SAI_TypeDef, ptr %56, i32 0, i32 3
  %58 = load volatile i32, ptr %57, align 4, !tbaa !20
  %59 = or i32 %58, %55
  store volatile i32 %59, ptr %57, align 4, !tbaa !20
  br label %61

60:                                               ; preds = %35, %25
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %61

61:                                               ; preds = %60, %38
  br label %62

62:                                               ; preds = %61, %24
  %63 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %63
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"__SAI_HandleTypeDef", !6, i64 0, !13, i64 8, !15, i64 88, !16, i64 108, !6, i64 128, !17, i64 136, !17, i64 138, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !10, i64 176, !10, i64 180, !10, i64 184}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !14, i64 52, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!17 = !{!"short", !7, i64 0}
!18 = !{!14, !10, i64 0}
!19 = !{!12, !10, i64 180}
!20 = !{!21, !10, i64 72}
!21 = !{!"", !10, i64 0, !7, i64 4, !10, i64 68, !10, i64 72}
!22 = !{!14, !10, i64 8}
!23 = !{!14, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_SAIEx_ConfigPdmMicDelay(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = icmp eq ptr %3, inttoptr (i64 1073829892 to ptr)
  %5 = icmp eq ptr %3, inttoptr (i64 1476416516 to ptr)
  %6 = select i1 %5, ptr inttoptr (i64 1476416512 to ptr), ptr null
  %7 = select i1 %4, ptr inttoptr (i64 1073829888 to ptr), ptr %6
  %8 = icmp eq ptr %7, null
  br i1 %8, label %32, label %9

9:                                                ; preds = %2
  %10 = load i32, ptr %1, align 4, !tbaa !16
  %11 = shl i32 %10, 3
  %12 = add i32 %11, -8
  %13 = getelementptr inbounds i8, ptr %0, i64 180
  %14 = load volatile i32, ptr %13, align 4, !tbaa !17
  %15 = icmp ne i32 %14, 0
  %16 = icmp ult i32 %12, 25
  %or.cond = select i1 %15, i1 %16, i1 false
  br i1 %or.cond, label %17, label %32

17:                                               ; preds = %9
  %18 = shl nuw nsw i32 119, %12
  %19 = xor i32 %18, -1
  %20 = getelementptr inbounds i8, ptr %7, i64 72
  %21 = load volatile i32, ptr %20, align 8, !tbaa !18
  %22 = and i32 %21, %19
  store volatile i32 %22, ptr %20, align 8, !tbaa !18
  %23 = getelementptr inbounds i8, ptr %1, i64 8
  %24 = load i32, ptr %23, align 4, !tbaa !20
  %25 = shl i32 %24, 4
  %26 = getelementptr inbounds i8, ptr %1, i64 4
  %27 = load i32, ptr %26, align 4, !tbaa !21
  %28 = or i32 %25, %27
  %29 = shl i32 %28, %12
  %30 = load volatile i32, ptr %20, align 8, !tbaa !18
  %31 = or i32 %29, %30
  store volatile i32 %31, ptr %20, align 8, !tbaa !18
  br label %32

32:                                               ; preds = %9, %2, %17
  %.0 = phi i32 [ 0, %17 ], [ 1, %2 ], [ 1, %9 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__SAI_HandleTypeDef", !7, i64 0, !10, i64 8, !13, i64 88, !14, i64 108, !7, i64 128, !15, i64 136, !15, i64 138, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !11, i64 176, !11, i64 180, !11, i64 184}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !8, i64 0}
!16 = !{!12, !11, i64 0}
!17 = !{!6, !11, i64 180}
!18 = !{!19, !11, i64 72}
!19 = !{!"", !11, i64 0, !8, i64 4, !11, i64 68, !11, i64 72}
!20 = !{!12, !11, i64 8}
!21 = !{!12, !11, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass