; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/ASNetwork.ll (ZN9ASNetwork12resetSignalsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Rb_tree_iterator" = type { ptr }
%class.ASNetwork = type <{ %class.ReduceNetwork, i32, i32, i32, [4 x i8], %"class.std::map", %"class.std::vector", %"class.std::vector", %"class.std::map.6", %"class.std::map.6", %"class.std::vector.11", ptr, ptr, i8, [3 x i8], %class.Config, [4 x i8] }>
%class.ReduceNetwork = type { %class.Unit }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, ASwitch *>, std::_Select1st<std::pair<const std::pair<int, int>, ASwitch *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, ASwitch *>, std::_Select1st<std::pair<const std::pair<int, int>, ASwitch *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ASwitch *, std::allocator<ASwitch *>>::_Vector_impl" }
%"struct.std::_Vector_base<ASwitch *, std::allocator<ASwitch *>>::_Vector_impl" = type { %"struct.std::_Vector_base<ASwitch *, std::allocator<ASwitch *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ASwitch *, std::allocator<ASwitch *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.6" = type { %"class.std::_Rb_tree.7" }
%"class.std::_Rb_tree.7" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, Connection *>, std::_Select1st<std::pair<const std::pair<int, int>, Connection *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, Connection *>, std::_Select1st<std::pair<const std::pair<int, int>, Connection *>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Config = type { i32, %class.DSNetworkConfig, %class.DSwitchConfig, %class.MSNetworkConfig, %class.MSwitchConfig, %class.ASNetworkConfig, %class.ASwitchConfig, %class.LookUpTableConfig, %class.SDMemoryConfig }
%class.DSNetworkConfig = type { i32 }
%class.DSwitchConfig = type { i32, i32, i32, i32 }
%class.MSNetworkConfig = type { i32, i32, i32, i32 }
%class.MSwitchConfig = type { i32, i32, i32, i32, i32, i32 }
%class.ASNetworkConfig = type { i32, i32 }
%class.ASwitchConfig = type { i32, i32, i32, i32, i32, i32 }
%class.LookUpTableConfig = type { i32, i32 }
%class.SDMemoryConfig = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%"struct.std::pair.21" = type { %"struct.std::pair", ptr }
%"struct.std::pair" = type { i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE5beginEv(ptr noundef nonnull align 8 dereferenceable(48)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZStneRKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEES8_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE3endEv(ptr noundef nonnull align 8 dereferenceable(48)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEptEv(ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9ASNetwork12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(460) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca %"struct.std::_Rb_tree_iterator", align 8
  %4 = alloca %"struct.std::_Rb_tree_iterator", align 8
  %5 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %6 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %7 = getelementptr inbounds %class.ASNetwork, ptr %6, i32 0, i32 5
  %8 = call ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE5beginEv(ptr noundef nonnull align 8 dereferenceable(48) %7) #4
  %9 = getelementptr inbounds %"struct.std::_Rb_tree_iterator", ptr %3, i32 0, i32 0
  store ptr %8, ptr %9, align 8
  br label %10

10:                                               ; preds = %21, %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %11 = getelementptr inbounds %class.ASNetwork, ptr %6, i32 0, i32 5
  %12 = call ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE3endEv(ptr noundef nonnull align 8 dereferenceable(48) %11) #4
  %13 = getelementptr inbounds %"struct.std::_Rb_tree_iterator", ptr %4, i32 0, i32 0
  store ptr %12, ptr %13, align 8
  %14 = call noundef zeroext i1 @_ZStneRKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEES8_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  br i1 %14, label %16, label %15

15:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  br label %23

16:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %17 = call noundef ptr @_ZNKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEptEv(ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  %18 = getelementptr inbounds %"struct.std::pair.21", ptr %17, i32 0, i32 1
  %19 = load ptr, ptr %18, align 8, !tbaa !9
  store ptr %19, ptr %5, align 8, !tbaa !5
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN7ASwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(288) %20)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  br label %21

21:                                               ; preds = %16
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  br label %10, !llvm.loop !13

23:                                               ; preds = %15
  %24 = getelementptr inbounds %class.ASNetwork, ptr %6, i32 0, i32 13
  %25 = load i8, ptr %24, align 8, !tbaa !15, !range !55, !noundef !56
  %26 = trunc i8 %25 to i1
  %27 = zext i1 %26 to i32
  %28 = icmp sgt i32 %27, 0
  br i1 %28, label %29, label %32

29:                                               ; preds = %23
  %30 = getelementptr inbounds %class.ASNetwork, ptr %6, i32 0, i32 12
  %31 = load ptr, ptr %30, align 8, !tbaa !57
  call void @_ZN18AccumulationBuffer12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(200) %31)
  br label %32

32:                                               ; preds = %29, %23
  ret void
}

declare void @_ZN7ASwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(288)) #3

declare void @_ZN18AccumulationBuffer12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(200)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTSSt4pairIKS_IiiEP7ASwitchE", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTSSt4pairIiiE", !12, i64 0, !12, i64 4}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !41, i64 296}
!16 = !{!"_ZTS9ASNetwork", !17, i64 0, !12, i64 48, !12, i64 52, !12, i64 56, !22, i64 64, !30, i64 112, !30, i64 136, !34, i64 160, !34, i64 208, !37, i64 256, !6, i64 280, !6, i64 288, !41, i64 296, !42, i64 300}
!17 = !{!"_ZTS13ReduceNetwork", !18, i64 0}
!18 = !{!"_ZTS4Unit", !12, i64 8, !19, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !21, i64 8, !7, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!21 = !{!"long", !7, i64 0}
!22 = !{!"_ZTSSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE", !23, i64 0}
!23 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P7ASwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !24, i64 0}
!24 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P7ASwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !25, i64 0, !27, i64 8}
!25 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !26, i64 0}
!26 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!27 = !{!"_ZTSSt15_Rb_tree_header", !28, i64 0, !21, i64 32}
!28 = !{!"_ZTSSt18_Rb_tree_node_base", !29, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!29 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!30 = !{!"_ZTSSt6vectorIP7ASwitchSaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIP7ASwitchSaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIP7ASwitchSaIS1_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIP7ASwitchSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!34 = !{!"_ZTSSt3mapISt4pairIiiEP10ConnectionSt4lessIS1_ESaIS0_IKS1_S3_EEE", !35, i64 0}
!35 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !36, i64 0}
!36 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !25, i64 0, !27, i64 8}
!37 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"bool", !7, i64 0}
!42 = !{!"_ZTS6Config", !12, i64 0, !43, i64 4, !44, i64 8, !45, i64 24, !47, i64 40, !48, i64 64, !50, i64 72, !51, i64 96, !52, i64 104}
!43 = !{!"_ZTS15DSNetworkConfig", !12, i64 0}
!44 = !{!"_ZTS13DSwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!45 = !{!"_ZTS15MSNetworkConfig", !46, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!46 = !{!"_ZTS19MultiplierNetwork_t", !7, i64 0}
!47 = !{!"_ZTS13MSwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!48 = !{!"_ZTS15ASNetworkConfig", !49, i64 0, !12, i64 4}
!49 = !{!"_ZTS15ReduceNetwork_t", !7, i64 0}
!50 = !{!"_ZTS13ASwitchConfig", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!51 = !{!"_ZTS17LookUpTableConfig", !12, i64 0, !12, i64 4}
!52 = !{!"_ZTS14SDMemoryConfig", !53, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !54, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52}
!53 = !{!"_ZTS18MemoryController_t", !7, i64 0}
!54 = !{!"_ZTS17MemoryHierarchy_t", !7, i64 0}
!55 = !{i8 0, i8 2}
!56 = !{}
!57 = !{!16, !6, i64 288}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Rb_tree_iterator" = type { ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE5beginEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZStneRKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEES8_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE3endEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEptEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9ASNetwork12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(460) %0) unnamed_addr #2 align 2 {
  %2 = alloca %"struct.std::_Rb_tree_iterator", align 8
  %3 = alloca %"struct.std::_Rb_tree_iterator", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  %4 = getelementptr inbounds i8, ptr %0, i64 64
  %5 = tail call ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE5beginEv(ptr noundef nonnull align 8 dereferenceable(48) %4) #4
  store ptr %5, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %6 = tail call ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE3endEv(ptr noundef nonnull align 8 dereferenceable(48) %4) #4
  store ptr %6, ptr %3, align 8
  %7 = call noundef zeroext i1 @_ZStneRKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEES8_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  br i1 %7, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %1
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  %8 = getelementptr inbounds i8, ptr %0, i64 296
  %9 = load i8, ptr %8, align 8, !tbaa !5, !range !49, !noundef !50
  %10 = trunc nuw i8 %9 to i1
  br i1 %10, label %17, label %20

.lr.ph:                                           ; preds = %1, %.lr.ph
  %11 = call noundef ptr @_ZNKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEptEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  %12 = getelementptr inbounds i8, ptr %11, i64 8
  %13 = load ptr, ptr %12, align 8, !tbaa !51
  call void @_ZN7ASwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(288) %13)
  %14 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %15 = call ptr @_ZNSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE3endEv(ptr noundef nonnull align 8 dereferenceable(48) %4) #4
  store ptr %15, ptr %3, align 8
  %16 = call noundef zeroext i1 @_ZStneRKSt17_Rb_tree_iteratorISt4pairIKS0_IiiEP7ASwitchEES8_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !54

17:                                               ; preds = %._crit_edge
  %18 = getelementptr inbounds i8, ptr %0, i64 288
  %19 = load ptr, ptr %18, align 8, !tbaa !56
  call void @_ZN18AccumulationBuffer12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(200) %19)
  br label %20

20:                                               ; preds = %17, %._crit_edge
  ret void
}

declare void @_ZN7ASwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(288)) local_unnamed_addr #3

declare void @_ZN18AccumulationBuffer12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(200)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !35, i64 296}
!6 = !{!"_ZTS9ASNetwork", !7, i64 0, !9, i64 48, !9, i64 52, !9, i64 56, !16, i64 64, !24, i64 112, !24, i64 136, !28, i64 160, !28, i64 208, !31, i64 256, !14, i64 280, !14, i64 288, !35, i64 296, !36, i64 300}
!7 = !{!"_ZTS13ReduceNetwork", !8, i64 0}
!8 = !{!"_ZTS4Unit", !9, i64 8, !12, i64 16}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !15, i64 8, !10, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!"long", !10, i64 0}
!16 = !{!"_ZTSSt3mapISt4pairIiiEP7ASwitchSt4lessIS1_ESaIS0_IKS1_S3_EEE", !17, i64 0}
!17 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P7ASwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !18, i64 0}
!18 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P7ASwitchESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !19, i64 0, !21, i64 8}
!19 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !20, i64 0}
!20 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!21 = !{!"_ZTSSt15_Rb_tree_header", !22, i64 0, !15, i64 32}
!22 = !{!"_ZTSSt18_Rb_tree_node_base", !23, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!23 = !{!"_ZTSSt14_Rb_tree_color", !10, i64 0}
!24 = !{!"_ZTSSt6vectorIP7ASwitchSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIP7ASwitchSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP7ASwitchSaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP7ASwitchSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!28 = !{!"_ZTSSt3mapISt4pairIiiEP10ConnectionSt4lessIS1_ESaIS0_IKS1_S3_EEE", !29, i64 0}
!29 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES0_IKS1_P10ConnectionESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !19, i64 0, !21, i64 8}
!31 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!35 = !{!"bool", !10, i64 0}
!36 = !{!"_ZTS6Config", !9, i64 0, !37, i64 4, !38, i64 8, !39, i64 24, !41, i64 40, !42, i64 64, !44, i64 72, !45, i64 96, !46, i64 104}
!37 = !{!"_ZTS15DSNetworkConfig", !9, i64 0}
!38 = !{!"_ZTS13DSwitchConfig", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12}
!39 = !{!"_ZTS15MSNetworkConfig", !40, i64 0, !9, i64 4, !9, i64 8, !9, i64 12}
!40 = !{!"_ZTS19MultiplierNetwork_t", !10, i64 0}
!41 = !{!"_ZTS13MSwitchConfig", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20}
!42 = !{!"_ZTS15ASNetworkConfig", !43, i64 0, !9, i64 4}
!43 = !{!"_ZTS15ReduceNetwork_t", !10, i64 0}
!44 = !{!"_ZTS13ASwitchConfig", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20}
!45 = !{!"_ZTS17LookUpTableConfig", !9, i64 0, !9, i64 4}
!46 = !{!"_ZTS14SDMemoryConfig", !47, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !48, i64 28, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44, !9, i64 48, !9, i64 52}
!47 = !{!"_ZTS18MemoryController_t", !10, i64 0}
!48 = !{!"_ZTS17MemoryHierarchy_t", !10, i64 0}
!49 = !{i8 0, i8 2}
!50 = !{}
!51 = !{!52, !14, i64 8}
!52 = !{!"_ZTSSt4pairIKS_IiiEP7ASwitchE", !53, i64 0, !14, i64 8}
!53 = !{!"_ZTSSt4pairIiiE", !9, i64 0, !9, i64 4}
!54 = distinct !{!54, !55}
!55 = !{!"llvm.loop.mustprogress"}
!56 = !{!6, !14, i64 288}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass