; LLVM IR from simbody/simbody :: SimTKcommon/src/Xml.ll (ZNK5SimTK3Xml4Node11getNodeTypeEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [73 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.47 = external hidden unnamed_addr constant [90 x i8], align 1
@_ZTIN5SimTK9Exception6AssertE = external dso_local constant { ptr, ptr, ptr }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5SimTK3Xml4Node7isValidEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

declare ptr @__cxa_allocate_exception(i64)

declare void @__cxa_free_exception(ptr)

declare void @__cxa_throw(ptr, ptr, ptr)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZNK5SimTK3Xml4Node11getNodeTypeEv(ptr noundef nonnull align 8 dereferenceable(8) %0) #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  %7 = call noundef zeroext i1 @_ZNK5SimTK3Xml4Node7isValidEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %7, label %9, label %8

8:                                                ; preds = %1
  store i32 0, ptr %2, align 4
  br label %30

9:                                                ; preds = %1
  %10 = call noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  %11 = call noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104) %10)
  switch i32 %11, label %16 [
    i32 2, label %12
    i32 3, label %13
    i32 4, label %14
    i32 1, label %15
  ]

12:                                               ; preds = %9
  store i32 4, ptr %2, align 4
  br label %30

13:                                               ; preds = %9
  store i32 8, ptr %2, align 4
  br label %30

14:                                               ; preds = %9
  store i32 2, ptr %2, align 4
  br label %30

15:                                               ; preds = %9
  store i32 1, ptr %2, align 4
  br label %30

16:                                               ; preds = %9
  br label %17

17:                                               ; preds = %16
  %18 = call ptr @__cxa_allocate_exception(i64 112) #2
  %19 = invoke noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
          to label %20 unwind label %24

20:                                               ; preds = %17
  %21 = invoke noundef ptr @_ZNK5SimTK9TiXmlNode8TypeNameEv(ptr noundef nonnull align 8 dereferenceable(104) %19)
          to label %22 unwind label %24

22:                                               ; preds = %20
  invoke void (ptr, ptr, i32, ptr, ptr, ...) @_ZN5SimTK9Exception6AssertC2EPKciS3_S3_z(ptr noundef nonnull align 8 dereferenceable(112) %18, ptr noundef @.str.10, i32 noundef 587, ptr noundef @.str.46, ptr noundef @.str.47, ptr noundef %21)
          to label %23 unwind label %24

23:                                               ; preds = %22
  call void @__cxa_throw(ptr %18, ptr @_ZTIN5SimTK9Exception6AssertE, ptr @_ZN5SimTK9Exception4BaseD2Ev) #3
  unreachable

24:                                               ; preds = %22, %20, %17
  %25 = landingpad { ptr, i32 }
          cleanup
  %26 = extractvalue { ptr, i32 } %25, 0
  store ptr %26, ptr %4, align 8
  %27 = extractvalue { ptr, i32 } %25, 1
  store i32 %27, ptr %5, align 4
  call void @__cxa_free_exception(ptr %18) #2
  br label %32

28:                                               ; No predecessors!
  br label %29

29:                                               ; preds = %28
  store i32 0, ptr %2, align 4
  br label %30

30:                                               ; preds = %29, %15, %14, %13, %12, %8
  %31 = load i32, ptr %2, align 4
  ret i32 %31

32:                                               ; preds = %24
  %33 = load ptr, ptr %4, align 8
  %34 = load i32, ptr %5, align 4
  %35 = insertvalue { ptr, i32 } poison, ptr %33, 0
  %36 = insertvalue { ptr, i32 } %35, i32 %34, 1
  resume { ptr, i32 } %36
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK5SimTK9TiXmlNode8TypeNameEv(ptr noundef nonnull align 8 dereferenceable(104)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5SimTK9Exception6AssertC2EPKciS3_S3_z(ptr noundef nonnull align 8 dereferenceable(112), ptr noundef, i32 noundef, ptr noundef, ptr noundef, ...) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5SimTK9Exception4BaseD2Ev(ptr noundef nonnull align 8 dereferenceable(112)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [73 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.47 = external hidden unnamed_addr constant [90 x i8], align 1
@_ZTIN5SimTK9Exception6AssertE = external dso_local constant { ptr, ptr, ptr }, align 8
@switch.table._ZNK5SimTK3Xml4Node11getNodeTypeEv = private unnamed_addr constant [4 x i32] [i32 1, i32 4, i32 8, i32 2], align 4

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5SimTK3Xml4Node7isValidEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

declare ptr @__cxa_allocate_exception(i64) local_unnamed_addr

declare void @__cxa_free_exception(ptr) local_unnamed_addr

declare void @__cxa_throw(ptr, ptr, ptr) local_unnamed_addr

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 9) i32 @_ZNK5SimTK3Xml4Node11getNodeTypeEv(ptr noundef nonnull align 8 dereferenceable(8) %0) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = tail call noundef zeroext i1 @_ZNK5SimTK3Xml4Node7isValidEv(ptr noundef nonnull align 8 dereferenceable(8) %0)
  br i1 %2, label %3, label %16

3:                                                ; preds = %1
  %4 = tail call noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %5 = tail call noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104) %4)
  %switch.tableidx = add i32 %5, -1
  %6 = icmp ult i32 %switch.tableidx, 4
  br i1 %6, label %switch.lookup, label %7

7:                                                ; preds = %3
  %8 = tail call ptr @__cxa_allocate_exception(i64 112) #2
  %9 = tail call noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %10 = invoke noundef ptr @_ZNK5SimTK9TiXmlNode8TypeNameEv(ptr noundef nonnull align 8 dereferenceable(104) %9)
          to label %11 unwind label %13

11:                                               ; preds = %7
  invoke void (ptr, ptr, i32, ptr, ptr, ...) @_ZN5SimTK9Exception6AssertC2EPKciS3_S3_z(ptr noundef nonnull align 8 dereferenceable(112) %8, ptr noundef nonnull @.str.10, i32 noundef 587, ptr noundef nonnull @.str.46, ptr noundef nonnull @.str.47, ptr noundef %10)
          to label %12 unwind label %13

12:                                               ; preds = %11
  tail call void @__cxa_throw(ptr nonnull %8, ptr nonnull @_ZTIN5SimTK9Exception6AssertE, ptr nonnull @_ZN5SimTK9Exception4BaseD2Ev) #3
  unreachable

13:                                               ; preds = %11, %7
  %14 = landingpad { ptr, i32 }
          cleanup
  tail call void @__cxa_free_exception(ptr %8) #2
  resume { ptr, i32 } %14

switch.lookup:                                    ; preds = %3
  %15 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [4 x i32], ptr @switch.table._ZNK5SimTK3Xml4Node11getNodeTypeEv, i64 0, i64 %15
  %switch.load = load i32, ptr %switch.gep, align 4
  br label %16

16:                                               ; preds = %switch.lookup, %1
  %.0 = phi i32 [ 0, %1 ], [ %switch.load, %switch.lookup ]
  ret i32 %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(104) ptr @_ZNK5SimTK3Xml4Node9getTiNodeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK5SimTK9TiXmlNode8TypeNameEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5SimTK9Exception6AssertC2EPKciS3_S3_z(ptr noundef nonnull align 8 dereferenceable(112), ptr noundef, i32 noundef, ptr noundef, ptr noundef, ...) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5SimTK9Exception4BaseD2Ev(ptr noundef nonnull align 8 dereferenceable(112)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass