; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (SetDate)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RTC_DateTypeDef = type { i8, i8, i8, i8 }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_EnterInitMode(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_RTC_WaitForSynchro(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_RTC_SetDate(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  br label %10

10:                                               ; preds = %3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %11, i32 0, i32 2
  %13 = load i32, ptr %12, align 4, !tbaa !11
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %10
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %185

16:                                               ; preds = %10
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %17, i32 0, i32 2
  store i32 1, ptr %18, align 4, !tbaa !11
  br label %19

19:                                               ; preds = %16
  br label %20

20:                                               ; preds = %19
  br label %21

21:                                               ; preds = %20
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %22, i32 0, i32 3
  store volatile i32 2, ptr %23, align 8, !tbaa !14
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %43

26:                                               ; preds = %21
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %27, i32 0, i32 1
  %29 = load i8, ptr %28, align 1, !tbaa !15
  %30 = zext i8 %29 to i32
  %31 = and i32 %30, 16
  %32 = icmp eq i32 %31, 16
  br i1 %32, label %33, label %43

33:                                               ; preds = %26
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %34, i32 0, i32 1
  %36 = load i8, ptr %35, align 1, !tbaa !15
  %37 = zext i8 %36 to i32
  %38 = and i32 %37, 239
  %39 = add nsw i32 %38, 10
  %40 = trunc i32 %39 to i8
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %41, i32 0, i32 1
  store i8 %40, ptr %42, align 1, !tbaa !15
  br label %43

43:                                               ; preds = %33, %26, %21
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = icmp eq i32 %44, 0
  br i1 %45, label %46, label %72

46:                                               ; preds = %43
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %47, i32 0, i32 3
  %49 = load i8, ptr %48, align 1, !tbaa !17
  %50 = call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %49)
  %51 = zext i8 %50 to i32
  %52 = shl i32 %51, 16
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %53, i32 0, i32 1
  %55 = load i8, ptr %54, align 1, !tbaa !15
  %56 = call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %55)
  %57 = zext i8 %56 to i32
  %58 = shl i32 %57, 8
  %59 = or i32 %52, %58
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %60, i32 0, i32 2
  %62 = load i8, ptr %61, align 1, !tbaa !18
  %63 = call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %62)
  %64 = zext i8 %63 to i32
  %65 = or i32 %59, %64
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %66, i32 0, i32 0
  %68 = load i8, ptr %67, align 1, !tbaa !19
  %69 = zext i8 %68 to i32
  %70 = shl i32 %69, 13
  %71 = or i32 %65, %70
  store i32 %71, ptr %8, align 4, !tbaa !9
  br label %95

72:                                               ; preds = %43
  %73 = load ptr, ptr %6, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %73, i32 0, i32 3
  %75 = load i8, ptr %74, align 1, !tbaa !17
  %76 = zext i8 %75 to i32
  %77 = shl i32 %76, 16
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %78, i32 0, i32 1
  %80 = load i8, ptr %79, align 1, !tbaa !15
  %81 = zext i8 %80 to i32
  %82 = shl i32 %81, 8
  %83 = or i32 %77, %82
  %84 = load ptr, ptr %6, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %84, i32 0, i32 2
  %86 = load i8, ptr %85, align 1, !tbaa !18
  %87 = zext i8 %86 to i32
  %88 = or i32 %83, %87
  %89 = load ptr, ptr %6, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.RTC_DateTypeDef, ptr %89, i32 0, i32 0
  %91 = load i8, ptr %90, align 1, !tbaa !19
  %92 = zext i8 %91 to i32
  %93 = shl i32 %92, 13
  %94 = or i32 %88, %93
  store i32 %94, ptr %8, align 4, !tbaa !9
  br label %95

95:                                               ; preds = %72, %46
  br label %96

96:                                               ; preds = %95
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %98, align 8, !tbaa !20
  %100 = getelementptr inbounds %struct.RTC_TypeDef, ptr %99, i32 0, i32 9
  store volatile i32 202, ptr %100, align 4, !tbaa !21
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %101, i32 0, i32 0
  %103 = load ptr, ptr %102, align 8, !tbaa !20
  %104 = getelementptr inbounds %struct.RTC_TypeDef, ptr %103, i32 0, i32 9
  store volatile i32 83, ptr %104, align 4, !tbaa !21
  br label %105

105:                                              ; preds = %96
  br label %106

106:                                              ; preds = %105
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = call i32 @RTC_EnterInitMode(ptr noundef %107)
  %109 = icmp ne i32 %108, 0
  br i1 %109, label %110, label %125

110:                                              ; preds = %106
  br label %111

111:                                              ; preds = %110
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %112, i32 0, i32 0
  %114 = load ptr, ptr %113, align 8, !tbaa !20
  %115 = getelementptr inbounds %struct.RTC_TypeDef, ptr %114, i32 0, i32 9
  store volatile i32 255, ptr %115, align 4, !tbaa !21
  br label %116

116:                                              ; preds = %111
  br label %117

117:                                              ; preds = %116
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %118, i32 0, i32 3
  store volatile i32 4, ptr %119, align 8, !tbaa !14
  br label %120

120:                                              ; preds = %117
  %121 = load ptr, ptr %5, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %121, i32 0, i32 2
  store i32 0, ptr %122, align 4, !tbaa !11
  br label %123

123:                                              ; preds = %120
  br label %124

124:                                              ; preds = %123
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %185

125:                                              ; preds = %106
  %126 = load i32, ptr %8, align 4, !tbaa !9
  %127 = zext i32 %126 to i64
  %128 = and i64 %127, 16777023
  %129 = trunc i64 %128 to i32
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !20
  %133 = getelementptr inbounds %struct.RTC_TypeDef, ptr %132, i32 0, i32 1
  store volatile i32 %129, ptr %133, align 4, !tbaa !23
  %134 = load ptr, ptr %5, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %134, i32 0, i32 0
  %136 = load ptr, ptr %135, align 8, !tbaa !20
  %137 = getelementptr inbounds %struct.RTC_TypeDef, ptr %136, i32 0, i32 3
  %138 = load volatile i32, ptr %137, align 4, !tbaa !24
  %139 = zext i32 %138 to i64
  %140 = and i64 %139, -129
  %141 = trunc i64 %140 to i32
  store volatile i32 %141, ptr %137, align 4, !tbaa !24
  %142 = load ptr, ptr %5, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %142, i32 0, i32 0
  %144 = load ptr, ptr %143, align 8, !tbaa !20
  %145 = getelementptr inbounds %struct.RTC_TypeDef, ptr %144, i32 0, i32 2
  %146 = load volatile i32, ptr %145, align 4, !tbaa !25
  %147 = zext i32 %146 to i64
  %148 = and i64 %147, 32
  %149 = icmp eq i64 %148, 0
  br i1 %149, label %150, label %170

150:                                              ; preds = %125
  %151 = load ptr, ptr %5, align 8, !tbaa !5
  %152 = call i32 @HAL_RTC_WaitForSynchro(ptr noundef %151)
  %153 = icmp ne i32 %152, 0
  br i1 %153, label %154, label %169

154:                                              ; preds = %150
  br label %155

155:                                              ; preds = %154
  %156 = load ptr, ptr %5, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %156, i32 0, i32 0
  %158 = load ptr, ptr %157, align 8, !tbaa !20
  %159 = getelementptr inbounds %struct.RTC_TypeDef, ptr %158, i32 0, i32 9
  store volatile i32 255, ptr %159, align 4, !tbaa !21
  br label %160

160:                                              ; preds = %155
  br label %161

161:                                              ; preds = %160
  %162 = load ptr, ptr %5, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %162, i32 0, i32 3
  store volatile i32 4, ptr %163, align 8, !tbaa !14
  br label %164

164:                                              ; preds = %161
  %165 = load ptr, ptr %5, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %165, i32 0, i32 2
  store i32 0, ptr %166, align 4, !tbaa !11
  br label %167

167:                                              ; preds = %164
  br label %168

168:                                              ; preds = %167
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %185

169:                                              ; preds = %150
  br label %170

170:                                              ; preds = %169, %125
  br label %171

171:                                              ; preds = %170
  %172 = load ptr, ptr %5, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %172, i32 0, i32 0
  %174 = load ptr, ptr %173, align 8, !tbaa !20
  %175 = getelementptr inbounds %struct.RTC_TypeDef, ptr %174, i32 0, i32 9
  store volatile i32 255, ptr %175, align 4, !tbaa !21
  br label %176

176:                                              ; preds = %171
  br label %177

177:                                              ; preds = %176
  %178 = load ptr, ptr %5, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %178, i32 0, i32 3
  store volatile i32 1, ptr %179, align 8, !tbaa !14
  br label %180

180:                                              ; preds = %177
  %181 = load ptr, ptr %5, align 8, !tbaa !5
  %182 = getelementptr inbounds %struct.RTC_HandleTypeDef, ptr %181, i32 0, i32 2
  store i32 0, ptr %182, align 4, !tbaa !11
  br label %183

183:                                              ; preds = %180
  br label %184

184:                                              ; preds = %183
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %185

185:                                              ; preds = %184, %168, %124, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %186 = load i32, ptr %4, align 4
  ret i32 %186
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 36, !10, i64 40}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!14 = !{!12, !10, i64 40}
!15 = !{!16, !7, i64 1}
!16 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!17 = !{!16, !7, i64 3}
!18 = !{!16, !7, i64 2}
!19 = !{!16, !7, i64 0}
!20 = !{!12, !6, i64 0}
!21 = !{!22, !10, i64 36}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204}
!23 = !{!22, !10, i64 4}
!24 = !{!22, !10, i64 12}
!25 = !{!22, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @RTC_EnterInitMode(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @HAL_RTC_WaitForSynchro(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_RTC_SetDate(ptr noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 36
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %74, label %7

7:                                                ; preds = %3
  store i32 1, ptr %4, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  store volatile i32 2, ptr %8, align 8, !tbaa !12
  %9 = icmp eq i32 %2, 0
  br i1 %9, label %10, label %.critedge

10:                                               ; preds = %7
  %11 = getelementptr inbounds i8, ptr %1, i64 1
  %12 = load i8, ptr %11, align 1, !tbaa !13
  %13 = and i8 %12, 16
  %.not = icmp eq i8 %13, 0
  br i1 %.not, label %17, label %14

14:                                               ; preds = %10
  %15 = and i8 %12, -17
  %16 = add nuw nsw i8 %15, 10
  store i8 %16, ptr %11, align 1, !tbaa !13
  br label %17

17:                                               ; preds = %10, %14
  %18 = getelementptr inbounds i8, ptr %1, i64 3
  %19 = load i8, ptr %18, align 1, !tbaa !15
  %20 = tail call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %19)
  %21 = zext i8 %20 to i32
  %22 = shl nuw nsw i32 %21, 16
  %23 = load i8, ptr %11, align 1, !tbaa !13
  %24 = tail call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %23)
  %25 = zext i8 %24 to i32
  %26 = shl nuw nsw i32 %25, 8
  %27 = or disjoint i32 %26, %22
  %28 = getelementptr inbounds i8, ptr %1, i64 2
  %29 = load i8, ptr %28, align 1, !tbaa !16
  %30 = tail call zeroext i8 @RTC_ByteToBcd2(i8 noundef zeroext %29)
  %31 = zext i8 %30 to i32
  %32 = or disjoint i32 %27, %31
  %33 = load i8, ptr %1, align 1, !tbaa !17
  %34 = zext i8 %33 to i32
  %35 = shl nuw nsw i32 %34, 13
  %36 = or i32 %35, %32
  br label %54

.critedge:                                        ; preds = %7
  %37 = getelementptr inbounds i8, ptr %1, i64 3
  %38 = load i8, ptr %37, align 1, !tbaa !15
  %39 = zext i8 %38 to i32
  %40 = shl nuw nsw i32 %39, 16
  %41 = getelementptr inbounds i8, ptr %1, i64 1
  %42 = load i8, ptr %41, align 1, !tbaa !13
  %43 = zext i8 %42 to i32
  %44 = shl nuw nsw i32 %43, 8
  %45 = or disjoint i32 %44, %40
  %46 = getelementptr inbounds i8, ptr %1, i64 2
  %47 = load i8, ptr %46, align 1, !tbaa !16
  %48 = zext i8 %47 to i32
  %49 = or disjoint i32 %45, %48
  %50 = load i8, ptr %1, align 1, !tbaa !17
  %51 = zext i8 %50 to i32
  %52 = shl nuw nsw i32 %51, 13
  %53 = or i32 %49, %52
  br label %54

54:                                               ; preds = %17, %.critedge
  %.0 = phi i32 [ %36, %17 ], [ %53, %.critedge ]
  %55 = load ptr, ptr %0, align 8, !tbaa !18
  %56 = getelementptr inbounds i8, ptr %55, i64 36
  store volatile i32 202, ptr %56, align 4, !tbaa !19
  store volatile i32 83, ptr %56, align 4, !tbaa !19
  %57 = tail call i32 @RTC_EnterInitMode(ptr noundef nonnull %0)
  %.not34 = icmp eq i32 %57, 0
  br i1 %.not34, label %60, label %58

58:                                               ; preds = %54
  %59 = load ptr, ptr %0, align 8, !tbaa !18
  br label %.sink.split

60:                                               ; preds = %54
  %61 = and i32 %.0, 16777023
  %62 = load ptr, ptr %0, align 8, !tbaa !18
  %63 = getelementptr inbounds i8, ptr %62, i64 4
  store volatile i32 %61, ptr %63, align 4, !tbaa !21
  %64 = getelementptr inbounds i8, ptr %62, i64 12
  %65 = load volatile i32, ptr %64, align 4, !tbaa !22
  %66 = and i32 %65, -129
  store volatile i32 %66, ptr %64, align 4, !tbaa !22
  %67 = getelementptr inbounds i8, ptr %62, i64 8
  %68 = load volatile i32, ptr %67, align 4, !tbaa !23
  %69 = and i32 %68, 32
  %70 = icmp eq i32 %69, 0
  br i1 %70, label %71, label %.sink.split

71:                                               ; preds = %60
  %72 = tail call i32 @HAL_RTC_WaitForSynchro(ptr noundef nonnull %0)
  %.not35 = icmp ne i32 %72, 0
  %.pre = load ptr, ptr %0, align 8, !tbaa !18
  %spec.select = select i1 %.not35, i32 4, i32 1
  %spec.select38 = zext i1 %.not35 to i32
  br label %.sink.split

.sink.split:                                      ; preds = %71, %60, %58
  %.sink37 = phi ptr [ %59, %58 ], [ %62, %60 ], [ %.pre, %71 ]
  %.sink = phi i32 [ 4, %58 ], [ 1, %60 ], [ %spec.select, %71 ]
  %.033.ph = phi i32 [ 1, %58 ], [ 0, %60 ], [ %spec.select38, %71 ]
  %73 = getelementptr inbounds i8, ptr %.sink37, i64 36
  store volatile i32 255, ptr %73, align 4, !tbaa !19
  store volatile i32 %.sink, ptr %8, align 8, !tbaa !12
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %74

74:                                               ; preds = %.sink.split, %3
  %.033 = phi i32 [ 2, %3 ], [ %.033.ph, %.sink.split ]
  ret i32 %.033
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 36}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 40}
!13 = !{!14, !8, i64 1}
!14 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!15 = !{!14, !8, i64 3}
!16 = !{!14, !8, i64 2}
!17 = !{!14, !8, i64 0}
!18 = !{!6, !7, i64 0}
!19 = !{!20, !11, i64 36}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204}
!21 = !{!20, !11, i64 4}
!22 = !{!20, !11, i64 12}
!23 = !{!20, !11, i64 8}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass