; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 01. Mathematics/20_Linear_Diophantine_with_two_variables.ll (Z18find_all_solutionsxxxxxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [128 x i8], align 1
@__PRETTY_FUNCTION__._Z18find_all_solutionsxxxxxxx = external hidden unnamed_addr constant [50 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z17find_any_solutionxxxRxS_S_(i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef, i64 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z18find_all_solutionsxxxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) #1 {
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  %25 = alloca i64, align 8
  %26 = alloca i64, align 8
  %27 = alloca i64, align 8
  store i64 %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !5
  store i64 %2, ptr %11, align 8, !tbaa !5
  store i64 %3, ptr %12, align 8, !tbaa !5
  store i64 %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !5
  store i64 %6, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  %28 = load i64, ptr %9, align 8, !tbaa !5
  %29 = load i64, ptr %10, align 8, !tbaa !5
  %30 = load i64, ptr %11, align 8, !tbaa !5
  %31 = call noundef zeroext i1 @_Z17find_any_solutionxxxRxS_S_(i64 noundef %28, i64 noundef %29, i64 noundef %30, ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18)
  %32 = zext i1 %31 to i32
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %7
  store i64 0, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %223

35:                                               ; preds = %7
  %36 = load i64, ptr %9, align 8, !tbaa !5
  %37 = icmp eq i64 %36, 0
  br i1 %37, label %38, label %58

38:                                               ; preds = %35
  %39 = load i64, ptr %10, align 8, !tbaa !5
  %40 = icmp eq i64 %39, 0
  br i1 %40, label %41, label %58

41:                                               ; preds = %38
  %42 = load i64, ptr %11, align 8, !tbaa !5
  %43 = icmp eq i64 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %41
  br label %47

45:                                               ; preds = %41
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 61, ptr noundef @__PRETTY_FUNCTION__._Z18find_all_solutionsxxxxxxx) #6
  unreachable

46:                                               ; No predecessors!
  br label %47

47:                                               ; preds = %46, %44
  %48 = load i64, ptr %13, align 8, !tbaa !5
  %49 = load i64, ptr %12, align 8, !tbaa !5
  %50 = sub nsw i64 %48, %49
  %51 = add nsw i64 %50, 1
  %52 = mul nsw i64 1, %51
  %53 = load i64, ptr %15, align 8, !tbaa !5
  %54 = load i64, ptr %14, align 8, !tbaa !5
  %55 = sub nsw i64 %53, %54
  %56 = add nsw i64 %55, 1
  %57 = mul nsw i64 %52, %56
  store i64 %57, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %223

58:                                               ; preds = %38, %35
  %59 = load i64, ptr %9, align 8, !tbaa !5
  %60 = icmp eq i64 %59, 0
  br i1 %60, label %61, label %81

61:                                               ; preds = %58
  %62 = load i64, ptr %13, align 8, !tbaa !5
  %63 = load i64, ptr %12, align 8, !tbaa !5
  %64 = sub nsw i64 %62, %63
  %65 = add nsw i64 %64, 1
  %66 = load i64, ptr %14, align 8, !tbaa !5
  %67 = load i64, ptr %11, align 8, !tbaa !5
  %68 = load i64, ptr %10, align 8, !tbaa !5
  %69 = sdiv i64 %67, %68
  %70 = icmp sle i64 %66, %69
  br i1 %70, label %71, label %77

71:                                               ; preds = %61
  %72 = load i64, ptr %11, align 8, !tbaa !5
  %73 = load i64, ptr %10, align 8, !tbaa !5
  %74 = sdiv i64 %72, %73
  %75 = load i64, ptr %15, align 8, !tbaa !5
  %76 = icmp sle i64 %74, %75
  br label %77

77:                                               ; preds = %71, %61
  %78 = phi i1 [ false, %61 ], [ %76, %71 ]
  %79 = zext i1 %78 to i64
  %80 = mul nsw i64 %65, %79
  store i64 %80, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %223

81:                                               ; preds = %58
  %82 = load i64, ptr %10, align 8, !tbaa !5
  %83 = icmp eq i64 %82, 0
  br i1 %83, label %84, label %104

84:                                               ; preds = %81
  %85 = load i64, ptr %15, align 8, !tbaa !5
  %86 = load i64, ptr %14, align 8, !tbaa !5
  %87 = sub nsw i64 %85, %86
  %88 = add nsw i64 %87, 1
  %89 = load i64, ptr %12, align 8, !tbaa !5
  %90 = load i64, ptr %11, align 8, !tbaa !5
  %91 = load i64, ptr %9, align 8, !tbaa !5
  %92 = sdiv i64 %90, %91
  %93 = icmp sle i64 %89, %92
  br i1 %93, label %94, label %100

94:                                               ; preds = %84
  %95 = load i64, ptr %11, align 8, !tbaa !5
  %96 = load i64, ptr %9, align 8, !tbaa !5
  %97 = sdiv i64 %95, %96
  %98 = load i64, ptr %13, align 8, !tbaa !5
  %99 = icmp sle i64 %97, %98
  br label %100

100:                                              ; preds = %94, %84
  %101 = phi i1 [ false, %84 ], [ %99, %94 ]
  %102 = zext i1 %101 to i64
  %103 = mul nsw i64 %88, %102
  store i64 %103, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %223

104:                                              ; preds = %81
  %105 = load i64, ptr %18, align 8, !tbaa !5
  %106 = load i64, ptr %9, align 8, !tbaa !5
  %107 = sdiv i64 %106, %105
  store i64 %107, ptr %9, align 8, !tbaa !5
  %108 = load i64, ptr %18, align 8, !tbaa !5
  %109 = load i64, ptr %10, align 8, !tbaa !5
  %110 = sdiv i64 %109, %108
  store i64 %110, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  %111 = load i64, ptr %9, align 8, !tbaa !5
  %112 = icmp sgt i64 %111, 0
  %113 = zext i1 %112 to i64
  %114 = select i1 %112, i32 1, i32 -1
  %115 = sext i32 %114 to i64
  store i64 %115, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  %116 = load i64, ptr %10, align 8, !tbaa !5
  %117 = icmp sgt i64 %116, 0
  %118 = zext i1 %117 to i64
  %119 = select i1 %117, i32 1, i32 -1
  %120 = sext i32 %119 to i64
  store i64 %120, ptr %21, align 8, !tbaa !5
  %121 = load i64, ptr %9, align 8, !tbaa !5
  %122 = load i64, ptr %10, align 8, !tbaa !5
  %123 = load i64, ptr %12, align 8, !tbaa !5
  %124 = load i64, ptr %16, align 8, !tbaa !5
  %125 = sub nsw i64 %123, %124
  %126 = load i64, ptr %10, align 8, !tbaa !5
  %127 = sdiv i64 %125, %126
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %121, i64 noundef %122, i64 noundef %127)
  %128 = load i64, ptr %16, align 8, !tbaa !5
  %129 = load i64, ptr %12, align 8, !tbaa !5
  %130 = icmp slt i64 %128, %129
  br i1 %130, label %131, label %135

131:                                              ; preds = %104
  %132 = load i64, ptr %9, align 8, !tbaa !5
  %133 = load i64, ptr %10, align 8, !tbaa !5
  %134 = load i64, ptr %21, align 8, !tbaa !5
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %132, i64 noundef %133, i64 noundef %134)
  br label %135

135:                                              ; preds = %131, %104
  %136 = load i64, ptr %16, align 8, !tbaa !5
  %137 = load i64, ptr %13, align 8, !tbaa !5
  %138 = icmp sgt i64 %136, %137
  br i1 %138, label %139, label %140

139:                                              ; preds = %135
  store i64 0, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %222

140:                                              ; preds = %135
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #5
  %141 = load i64, ptr %16, align 8, !tbaa !5
  store i64 %141, ptr %22, align 8, !tbaa !5
  %142 = load i64, ptr %9, align 8, !tbaa !5
  %143 = load i64, ptr %10, align 8, !tbaa !5
  %144 = load i64, ptr %13, align 8, !tbaa !5
  %145 = load i64, ptr %16, align 8, !tbaa !5
  %146 = sub nsw i64 %144, %145
  %147 = load i64, ptr %10, align 8, !tbaa !5
  %148 = sdiv i64 %146, %147
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %142, i64 noundef %143, i64 noundef %148)
  %149 = load i64, ptr %16, align 8, !tbaa !5
  %150 = load i64, ptr %13, align 8, !tbaa !5
  %151 = icmp sgt i64 %149, %150
  br i1 %151, label %152, label %157

152:                                              ; preds = %140
  %153 = load i64, ptr %9, align 8, !tbaa !5
  %154 = load i64, ptr %10, align 8, !tbaa !5
  %155 = load i64, ptr %21, align 8, !tbaa !5
  %156 = sub nsw i64 0, %155
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %153, i64 noundef %154, i64 noundef %156)
  br label %157

157:                                              ; preds = %152, %140
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #5
  %158 = load i64, ptr %16, align 8, !tbaa !5
  store i64 %158, ptr %23, align 8, !tbaa !5
  %159 = load i64, ptr %9, align 8, !tbaa !5
  %160 = load i64, ptr %10, align 8, !tbaa !5
  %161 = load i64, ptr %14, align 8, !tbaa !5
  %162 = load i64, ptr %17, align 8, !tbaa !5
  %163 = sub nsw i64 %161, %162
  %164 = sub nsw i64 0, %163
  %165 = load i64, ptr %9, align 8, !tbaa !5
  %166 = sdiv i64 %164, %165
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %159, i64 noundef %160, i64 noundef %166)
  %167 = load i64, ptr %17, align 8, !tbaa !5
  %168 = load i64, ptr %14, align 8, !tbaa !5
  %169 = icmp slt i64 %167, %168
  br i1 %169, label %170, label %175

170:                                              ; preds = %157
  %171 = load i64, ptr %9, align 8, !tbaa !5
  %172 = load i64, ptr %10, align 8, !tbaa !5
  %173 = load i64, ptr %20, align 8, !tbaa !5
  %174 = sub nsw i64 0, %173
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %171, i64 noundef %172, i64 noundef %174)
  br label %175

175:                                              ; preds = %170, %157
  %176 = load i64, ptr %17, align 8, !tbaa !5
  %177 = load i64, ptr %15, align 8, !tbaa !5
  %178 = icmp sgt i64 %176, %177
  br i1 %178, label %179, label %180

179:                                              ; preds = %175
  store i64 0, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %221

180:                                              ; preds = %175
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #5
  %181 = load i64, ptr %16, align 8, !tbaa !5
  store i64 %181, ptr %24, align 8, !tbaa !5
  %182 = load i64, ptr %9, align 8, !tbaa !5
  %183 = load i64, ptr %10, align 8, !tbaa !5
  %184 = load i64, ptr %15, align 8, !tbaa !5
  %185 = load i64, ptr %17, align 8, !tbaa !5
  %186 = sub nsw i64 %184, %185
  %187 = sub nsw i64 0, %186
  %188 = load i64, ptr %9, align 8, !tbaa !5
  %189 = sdiv i64 %187, %188
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %182, i64 noundef %183, i64 noundef %189)
  %190 = load i64, ptr %17, align 8, !tbaa !5
  %191 = load i64, ptr %15, align 8, !tbaa !5
  %192 = icmp sgt i64 %190, %191
  br i1 %192, label %193, label %197

193:                                              ; preds = %180
  %194 = load i64, ptr %9, align 8, !tbaa !5
  %195 = load i64, ptr %10, align 8, !tbaa !5
  %196 = load i64, ptr %20, align 8, !tbaa !5
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17, i64 noundef %194, i64 noundef %195, i64 noundef %196)
  br label %197

197:                                              ; preds = %193, %180
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #5
  %198 = load i64, ptr %16, align 8, !tbaa !5
  store i64 %198, ptr %25, align 8, !tbaa !5
  %199 = load i64, ptr %24, align 8, !tbaa !5
  %200 = load i64, ptr %25, align 8, !tbaa !5
  %201 = icmp sgt i64 %199, %200
  br i1 %201, label %202, label %203

202:                                              ; preds = %197
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %24, ptr noundef nonnull align 8 dereferenceable(8) %25) #5
  br label %203

203:                                              ; preds = %202, %197
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #5
  %204 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %22, ptr noundef nonnull align 8 dereferenceable(8) %24)
  %205 = load i64, ptr %204, align 8, !tbaa !5
  store i64 %205, ptr %26, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #5
  %206 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %23, ptr noundef nonnull align 8 dereferenceable(8) %25)
  %207 = load i64, ptr %206, align 8, !tbaa !5
  store i64 %207, ptr %27, align 8, !tbaa !5
  %208 = load i64, ptr %26, align 8, !tbaa !5
  %209 = load i64, ptr %27, align 8, !tbaa !5
  %210 = icmp sgt i64 %208, %209
  br i1 %210, label %211, label %212

211:                                              ; preds = %203
  store i64 0, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %220

212:                                              ; preds = %203
  %213 = load i64, ptr %27, align 8, !tbaa !5
  %214 = load i64, ptr %26, align 8, !tbaa !5
  %215 = sub nsw i64 %213, %214
  %216 = load i64, ptr %10, align 8, !tbaa !5
  %217 = call noundef i64 @_ZSt3absx(i64 noundef %216)
  %218 = sdiv i64 %215, %217
  %219 = add nsw i64 %218, 1
  store i64 %219, ptr %8, align 8
  store i32 1, ptr %19, align 4
  br label %220

220:                                              ; preds = %212, %211
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #5
  br label %221

221:                                              ; preds = %220, %179
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #5
  br label %222

222:                                              ; preds = %221, %139
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  br label %223

223:                                              ; preds = %222, %100, %77, %47, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  %224 = load i64, ptr %8, align 8
  ret i64 %224
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [128 x i8], align 1
@__PRETTY_FUNCTION__._Z18find_all_solutionsxxxxxxx = external hidden unnamed_addr constant [50 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z17find_any_solutionxxxRxS_S_(i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z18find_all_solutionsxxxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) local_unnamed_addr #1 {
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #5
  %15 = call noundef zeroext i1 @_Z17find_any_solutionxxxRxS_S_(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %15, label %16, label %93

16:                                               ; preds = %7
  %17 = icmp eq i64 %1, 0
  %18 = or i64 %1, %0
  %or.cond = icmp eq i64 %18, 0
  br i1 %or.cond, label %19, label %26

19:                                               ; preds = %16
  %20 = icmp eq i64 %2, 0
  br i1 %20, label %22, label %21

21:                                               ; preds = %19
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 61, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18find_all_solutionsxxxxxxx) #6
  unreachable

22:                                               ; preds = %19
  %reass.sub90 = sub i64 %4, %3
  %23 = add i64 %reass.sub90, 1
  %reass.sub91 = sub i64 %6, %5
  %24 = add i64 %reass.sub91, 1
  %25 = mul nsw i64 %24, %23
  br label %93

26:                                               ; preds = %16
  %27 = icmp eq i64 %0, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %26
  %reass.sub89 = sub i64 %4, %3
  %29 = add i64 %reass.sub89, 1
  %30 = sdiv i64 %2, %1
  %.not85 = icmp sge i64 %30, %5
  %31 = icmp sle i64 %30, %6
  %narrow86 = and i1 %.not85, %31
  %32 = select i1 %narrow86, i64 %29, i64 0
  br label %93

33:                                               ; preds = %26
  br i1 %17, label %34, label %39

34:                                               ; preds = %33
  %reass.sub = sub i64 %6, %5
  %35 = add i64 %reass.sub, 1
  %36 = sdiv i64 %2, %0
  %.not = icmp sge i64 %36, %3
  %37 = icmp sle i64 %36, %4
  %narrow = and i1 %.not, %37
  %38 = select i1 %narrow, i64 %35, i64 0
  br label %93

39:                                               ; preds = %33
  %40 = load i64, ptr %10, align 8, !tbaa !5
  %41 = sdiv i64 %0, %40
  %42 = sdiv i64 %1, %40
  %.inv = icmp slt i64 %41, 1
  %.neg83 = select i1 %.inv, i64 1, i64 -1
  %43 = select i1 %.inv, i64 -1, i64 1
  %.inv81 = icmp slt i64 %42, 1
  %.neg = select i1 %.inv81, i64 1, i64 -1
  %44 = load i64, ptr %8, align 8, !tbaa !5
  %45 = sub nsw i64 %3, %44
  %46 = sdiv i64 %45, %42
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %46)
  %47 = load i64, ptr %8, align 8, !tbaa !5
  %48 = icmp slt i64 %47, %3
  br i1 %48, label %49, label %51

49:                                               ; preds = %39
  %50 = select i1 %.inv81, i64 -1, i64 1
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %50)
  %.pre = load i64, ptr %8, align 8, !tbaa !5
  br label %51

51:                                               ; preds = %49, %39
  %52 = phi i64 [ %.pre, %49 ], [ %47, %39 ]
  %53 = icmp sgt i64 %52, %4
  br i1 %53, label %93, label %54

54:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #5
  store i64 %52, ptr %11, align 8, !tbaa !5
  %55 = sub nsw i64 %4, %52
  %56 = sdiv i64 %55, %42
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %56)
  %57 = load i64, ptr %8, align 8, !tbaa !5
  %58 = icmp sgt i64 %57, %4
  br i1 %58, label %59, label %60

59:                                               ; preds = %54
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %.neg)
  %.pre92 = load i64, ptr %8, align 8, !tbaa !5
  br label %60

60:                                               ; preds = %59, %54
  %61 = phi i64 [ %.pre92, %59 ], [ %57, %54 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %12) #5
  store i64 %61, ptr %12, align 8, !tbaa !5
  %62 = load i64, ptr %9, align 8, !tbaa !5
  %.neg82 = sub nsw i64 %62, %5
  %63 = sdiv i64 %.neg82, %41
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %63)
  %64 = load i64, ptr %9, align 8, !tbaa !5
  %65 = icmp slt i64 %64, %5
  br i1 %65, label %66, label %67

66:                                               ; preds = %60
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %.neg83)
  %.pre93 = load i64, ptr %9, align 8, !tbaa !5
  br label %67

67:                                               ; preds = %66, %60
  %68 = phi i64 [ %.pre93, %66 ], [ %64, %60 ]
  %69 = icmp sgt i64 %68, %6
  br i1 %69, label %92, label %70

70:                                               ; preds = %67
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %13) #5
  %71 = load i64, ptr %8, align 8, !tbaa !5
  store i64 %71, ptr %13, align 8, !tbaa !5
  %.neg84 = sub nsw i64 %68, %6
  %72 = sdiv i64 %.neg84, %41
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %72)
  %73 = load i64, ptr %9, align 8, !tbaa !5
  %74 = icmp sgt i64 %73, %6
  br i1 %74, label %75, label %76

75:                                               ; preds = %70
  call void @_Z14shift_solutionRxS_xxx(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, i64 noundef %41, i64 noundef %42, i64 noundef %43)
  br label %76

76:                                               ; preds = %75, %70
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %14) #5
  %77 = load i64, ptr %8, align 8, !tbaa !5
  store i64 %77, ptr %14, align 8, !tbaa !5
  %78 = icmp sgt i64 %71, %77
  br i1 %78, label %79, label %80

79:                                               ; preds = %76
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %14) #5
  br label %80

80:                                               ; preds = %79, %76
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(8) %13)
  %82 = load i64, ptr %81, align 8, !tbaa !5
  %83 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %14)
  %84 = load i64, ptr %83, align 8, !tbaa !5
  %85 = icmp sgt i64 %82, %84
  br i1 %85, label %91, label %86

86:                                               ; preds = %80
  %87 = sub nsw i64 %84, %82
  %88 = call noundef i64 @_ZSt3absx(i64 noundef %42)
  %89 = sdiv i64 %87, %88
  %90 = add nsw i64 %89, 1
  br label %91

91:                                               ; preds = %80, %86
  %.0 = phi i64 [ %90, %86 ], [ 0, %80 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %13) #5
  br label %92

92:                                               ; preds = %67, %91
  %.1 = phi i64 [ %.0, %91 ], [ 0, %67 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #5
  br label %93

93:                                               ; preds = %92, %51, %7, %34, %28, %22
  %.3 = phi i64 [ %25, %22 ], [ %32, %28 ], [ %38, %34 ], [ 0, %7 ], [ %.1, %92 ], [ 0, %51 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #5
  ret i64 %.3
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass