; LLVM IR from lzyrapx/Competitive-Programming :: LibreOJ/106（Splay）（104基础上加区间）.ll (Z4PreXiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@left = external dso_local global i32, align 4
@right = external dso_local global i32, align 4
@root = external dso_local global [200040 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4PreYi(i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z4PreXiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %12 = load i32, ptr @left, align 4, !tbaa !5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp sle i32 %12, %13
  br i1 %14, label %15, label %25

15:                                               ; preds = %3
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr @right, align 4, !tbaa !5
  %18 = icmp sle i32 %16, %17
  br i1 %18, label %19, label %25

19:                                               ; preds = %15
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = call noundef i32 @_Z4PreYi(i32 noundef %23)
  store i32 %24, ptr %4, align 4
  br label %67

25:                                               ; preds = %15, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = add nsw i32 %26, %27
  %29 = ashr i32 %28, 1
  store i32 %29, ptr %8, align 4, !tbaa !5
  %30 = load i32, ptr @right, align 4, !tbaa !5
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %33, label %39

33:                                               ; preds = %25
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = shl i32 %34, 1
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = call noundef i32 @_Z4PreXiii(i32 noundef %35, i32 noundef %36, i32 noundef %37)
  store i32 %38, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %66

39:                                               ; preds = %25
  %40 = load i32, ptr @left, align 4, !tbaa !5
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = icmp sgt i32 %40, %41
  br i1 %42, label %43, label %51

43:                                               ; preds = %39
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = shl i32 %44, 1
  %46 = or i32 %45, 1
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = call noundef i32 @_Z4PreXiii(i32 noundef %46, i32 noundef %48, i32 noundef %49)
  store i32 %50, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %66

51:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = shl i32 %52, 1
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = call noundef i32 @_Z4PreXiii(i32 noundef %53, i32 noundef %54, i32 noundef %55)
  store i32 %56, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %57 = load i32, ptr %5, align 4, !tbaa !5
  %58 = shl i32 %57, 1
  %59 = or i32 %58, 1
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = call noundef i32 @_Z4PreXiii(i32 noundef %59, i32 noundef %61, i32 noundef %62)
  store i32 %63, ptr %11, align 4, !tbaa !5
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11)
  %65 = load i32, ptr %64, align 4, !tbaa !5
  store i32 %65, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  store i32 1, ptr %9, align 4
  br label %66

66:                                               ; preds = %51, %43, %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %67

67:                                               ; preds = %66, %19
  %68 = load i32, ptr %4, align 4
  ret i32 %68
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@left = external dso_local local_unnamed_addr global i32, align 4
@right = external dso_local local_unnamed_addr global i32, align 4
@root = external dso_local local_unnamed_addr global [200040 x i32], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4PreYi(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z4PreXiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = load i32, ptr @left, align 4, !tbaa !5
  %7 = load i32, ptr @right, align 4
  %.not39 = icmp sgt i32 %6, %1
  %.not223140 = icmp slt i32 %7, %2
  %or.cond3241 = select i1 %.not39, i1 true, i1 %.not223140
  br i1 %or.cond3241, label %.lr.ph, label %tailrecurse.outer._crit_edge

.lr.ph:                                           ; preds = %3, %tailrecurse.outer
  %.not45 = phi i1 [ %.not, %tailrecurse.outer ], [ %.not39, %3 ]
  %.tr25.ph44 = phi i32 [ %.us-phi37, %tailrecurse.outer ], [ %2, %3 ]
  %.tr24.ph43 = phi i32 [ %21, %tailrecurse.outer ], [ %1, %3 ]
  %.tr.ph42 = phi i32 [ %20, %tailrecurse.outer ], [ %0, %3 ]
  %.not.fr = freeze i1 %.not45
  br i1 %.not.fr, label %tailrecurse.us, label %.lr.ph.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr2534.us = phi i32 [ %9, %tailrecurse.us ], [ %.tr25.ph44, %.lr.ph ]
  %.tr33.us = phi i32 [ %10, %tailrecurse.us ], [ %.tr.ph42, %.lr.ph ]
  %8 = add nsw i32 %.tr2534.us, %.tr24.ph43
  %9 = ashr i32 %8, 1
  %.not23.us = icmp sgt i32 %7, %9
  %10 = shl i32 %.tr33.us, 1
  br i1 %.not23.us, label %.split.us, label %tailrecurse.us

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %3
  %.tr.lcssa = phi i32 [ %0, %3 ], [ %17, %tailrecurse ], [ %20, %tailrecurse.outer ]
  %11 = sext i32 %.tr.lcssa to i64
  %12 = getelementptr inbounds [200040 x i32], ptr @root, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = tail call noundef i32 @_Z4PreYi(i32 noundef %13)
  br label %common.ret110

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr2534 = phi i32 [ %16, %tailrecurse ], [ %.tr25.ph44, %.lr.ph ]
  %.tr33 = phi i32 [ %17, %tailrecurse ], [ %.tr.ph42, %.lr.ph ]
  %15 = add nsw i32 %.tr2534, %.tr24.ph43
  %16 = ashr i32 %15, 1
  %.not23 = icmp sgt i32 %7, %16
  br i1 %.not23, label %.split.us, label %tailrecurse

tailrecurse:                                      ; preds = %.lr.ph.split
  %17 = shl i32 %.tr33, 1
  %.not22 = icmp slt i32 %7, %16
  br i1 %.not22, label %.lr.ph.split, label %tailrecurse.outer._crit_edge

.split.us:                                        ; preds = %.lr.ph.split, %tailrecurse.us
  %.us-phi = phi i32 [ %9, %tailrecurse.us ], [ %16, %.lr.ph.split ]
  %.us-phi36 = phi i32 [ %.tr33.us, %tailrecurse.us ], [ %.tr33, %.lr.ph.split ]
  %.us-phi37 = phi i32 [ %.tr2534.us, %tailrecurse.us ], [ %.tr2534, %.lr.ph.split ]
  %18 = icmp sgt i32 %6, %.us-phi
  br i1 %18, label %tailrecurse.outer, label %22

tailrecurse.outer:                                ; preds = %.split.us
  %19 = shl i32 %.us-phi36, 1
  %20 = or disjoint i32 %19, 1
  %21 = add nsw i32 %.us-phi, 1
  %.not = icmp sgt i32 %6, %21
  %.not2231 = icmp slt i32 %7, %.us-phi37
  %or.cond32 = select i1 %.not, i1 true, i1 %.not2231
  br i1 %or.cond32, label %.lr.ph, label %tailrecurse.outer._crit_edge

common.ret110:                                    ; preds = %22, %tailrecurse.outer._crit_edge
  %common.ret110.op = phi i32 [ %14, %tailrecurse.outer._crit_edge ], [ %29, %22 ]
  ret i32 %common.ret110.op

22:                                               ; preds = %.split.us
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  %23 = shl i32 %.us-phi36, 1
  %24 = tail call noundef i32 @_Z4PreXiii(i32 noundef %23, i32 noundef %.tr24.ph43, i32 noundef %.us-phi)
  store i32 %24, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %25 = or disjoint i32 %23, 1
  %26 = add nsw i32 %.us-phi, 1
  %27 = tail call noundef i32 @_Z4PreXiii(i32 noundef %25, i32 noundef %26, i32 noundef %.us-phi37)
  store i32 %27, ptr %5, align 4, !tbaa !5
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %29 = load i32, ptr %28, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  br label %common.ret110
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass