; LLVM IR from simbody/simbody :: SimTKcommon/src/Xml.ll (ZN5SimTK3Xml8Document10node_beginENS0_8NodeTypeE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SimTK::Xml::node_iterator" = type <{ %"class.SimTK::Xml::Node", i32, [4 x i8] }>
%"class.SimTK::Xml::Node" = type { ptr }
%"class.SimTK::Xml::Document::Impl" = type { %"class.SimTK::TiXmlDocument", %"class.SimTK::Xml::Element" }
%"class.SimTK::TiXmlDocument" = type { %"class.SimTK::TiXmlNode", i8, i32, %"class.SimTK::String", i32, %"struct.SimTK::TiXmlCursor", i8, %"class.SimTK::String" }
%"class.SimTK::TiXmlNode" = type { %"class.SimTK::TiXmlBase", ptr, i32, ptr, ptr, %"class.SimTK::String", ptr, ptr }
%"class.SimTK::TiXmlBase" = type { ptr, %"struct.SimTK::TiXmlCursor", ptr }
%"struct.SimTK::TiXmlCursor" = type { i32, i32 }
%"class.SimTK::String" = type { %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.SimTK::Xml::Element" = type { %"class.SimTK::Xml::Node" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(200) ptr @_ZN5SimTK3Xml8Document7updImplEv(ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5SimTK3Xml8Document10node_beginENS0_8NodeTypeE(ptr dead_on_unwind noalias writable sret(%"class.SimTK::Xml::node_iterator") align 8 %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i32 noundef %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %8 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %9 = call noundef nonnull align 8 dereferenceable(200) ptr @_ZN5SimTK3Xml8Document7updImplEv(ptr noundef nonnull align 8 dereferenceable(8) %8)
  %10 = getelementptr inbounds %"class.SimTK::Xml::Document::Impl", ptr %9, i32 0, i32 0
  %11 = call noundef ptr @_ZN5SimTK9TiXmlNode10FirstChildEv(ptr noundef nonnull align 8 dereferenceable(104) %10)
  store ptr %11, ptr %7, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %23, %3
  %13 = load ptr, ptr %7, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %21

15:                                               ; preds = %12
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  %18 = call noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104) %17)
  %19 = call noundef zeroext i1 @_ZL17nodeTypeIsAllowedN5SimTK3Xml8NodeTypeENS_9TiXmlNode8NodeTypeE(i32 noundef %16, i32 noundef %18)
  %20 = xor i1 %19, true
  br label %21

21:                                               ; preds = %15, %12
  %22 = phi i1 [ false, %12 ], [ %20, %15 ]
  br i1 %22, label %23, label %26

23:                                               ; preds = %21
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = call noundef ptr @_ZN5SimTK9TiXmlNode11NextSiblingEv(ptr noundef nonnull align 8 dereferenceable(104) %24)
  store ptr %25, ptr %7, align 8, !tbaa !5
  br label %12, !llvm.loop !11

26:                                               ; preds = %21
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = load i32, ptr %6, align 4, !tbaa !9
  call void @_ZN5SimTK3Xml13node_iteratorC2EPNS_9TiXmlNodeENS0_8NodeTypeE(ptr noundef nonnull align 8 dereferenceable(12) %0, ptr noundef %27, i32 noundef %28)
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN5SimTK9TiXmlNode10FirstChildEv(ptr noundef nonnull align 8 dereferenceable(104)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL17nodeTypeIsAllowedN5SimTK3Xml8NodeTypeENS_9TiXmlNode8NodeTypeE(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN5SimTK9TiXmlNode11NextSiblingEv(ptr noundef nonnull align 8 dereferenceable(104)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5SimTK3Xml13node_iteratorC2EPNS_9TiXmlNodeENS0_8NodeTypeE(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef, i32 noundef) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN5SimTK3Xml8NodeTypeE", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SimTK::Xml::node_iterator" = type <{ %"class.SimTK::Xml::Node", i32, [4 x i8] }>
%"class.SimTK::Xml::Node" = type { ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(200) ptr @_ZN5SimTK3Xml8Document7updImplEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5SimTK3Xml8Document10node_beginENS0_8NodeTypeE(ptr dead_on_unwind noalias writable sret(%"class.SimTK::Xml::node_iterator") align 8 %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i32 noundef %2) local_unnamed_addr #1 align 2 {
  %4 = tail call noundef nonnull align 8 dereferenceable(200) ptr @_ZN5SimTK3Xml8Document7updImplEv(ptr noundef nonnull align 8 dereferenceable(8) %1)
  %5 = tail call noundef ptr @_ZN5SimTK9TiXmlNode10FirstChildEv(ptr noundef nonnull align 8 dereferenceable(104) %4)
  %.not6 = icmp eq ptr %5, null
  br i1 %.not6, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %8
  %.07 = phi ptr [ %9, %8 ], [ %5, %3 ]
  %6 = tail call noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104) %.07)
  %7 = tail call noundef zeroext i1 @_ZL17nodeTypeIsAllowedN5SimTK3Xml8NodeTypeENS_9TiXmlNode8NodeTypeE(i32 noundef %2, i32 noundef %6)
  br i1 %7, label %.critedge, label %8

8:                                                ; preds = %.lr.ph
  %9 = tail call noundef ptr @_ZN5SimTK9TiXmlNode11NextSiblingEv(ptr noundef nonnull align 8 dereferenceable(104) %.07)
  %.not = icmp eq ptr %9, null
  br i1 %.not, label %.critedge, label %.lr.ph, !llvm.loop !5

.critedge:                                        ; preds = %.lr.ph, %8, %3
  %.0.lcssa = phi ptr [ null, %3 ], [ null, %8 ], [ %.07, %.lr.ph ]
  tail call void @_ZN5SimTK3Xml13node_iteratorC2EPNS_9TiXmlNodeENS0_8NodeTypeE(ptr noundef nonnull align 8 dereferenceable(12) %0, ptr noundef %.0.lcssa, i32 noundef %2)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN5SimTK9TiXmlNode10FirstChildEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL17nodeTypeIsAllowedN5SimTK3Xml8NodeTypeENS_9TiXmlNode8NodeTypeE(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5SimTK9TiXmlNode4TypeEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN5SimTK9TiXmlNode11NextSiblingEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5SimTK3Xml13node_iteratorC2EPNS_9TiXmlNodeENS0_8NodeTypeE(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef, i32 noundef) unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass