; LLVM IR from ritikbanger/Hacktoberfest2022-DSA :: 01. Mathematics/splittingarray.ll (Z4goodx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i64, align 8
@k = external dso_local global i64, align 8
@arr = external dso_local global %"class.std::vector", align 8
@maxi = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z4goodx(i64 noundef %0) #0 {
  %2 = alloca i1, align 1
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 0, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !5
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = load i64, ptr @maxi, align 8, !tbaa !5
  %10 = icmp slt i64 %8, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  store i1 false, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %55

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  store i64 0, ptr %7, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %42, %12
  %14 = load i64, ptr %7, align 8, !tbaa !5
  %15 = load i64, ptr @n, align 8, !tbaa !5
  %16 = icmp slt i64 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  br label %45

18:                                               ; preds = %13
  %19 = load i64, ptr %7, align 8, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %19) #2
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = load i64, ptr %5, align 8, !tbaa !5
  %23 = add nsw i64 %22, %21
  store i64 %23, ptr %5, align 8, !tbaa !5
  %24 = load i64, ptr %5, align 8, !tbaa !5
  %25 = load i64, ptr %3, align 8, !tbaa !5
  %26 = icmp sgt i64 %24, %25
  br i1 %26, label %27, label %33

27:                                               ; preds = %18
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %28) #2
  %30 = load i64, ptr %29, align 8, !tbaa !5
  store i64 %30, ptr %5, align 8, !tbaa !5
  %31 = load i64, ptr %4, align 8, !tbaa !5
  %32 = add nsw i64 %31, 1
  store i64 %32, ptr %4, align 8, !tbaa !5
  br label %41

33:                                               ; preds = %18
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = load i64, ptr %3, align 8, !tbaa !5
  %36 = icmp eq i64 %34, %35
  br i1 %36, label %37, label %40

37:                                               ; preds = %33
  store i64 0, ptr %5, align 8, !tbaa !5
  %38 = load i64, ptr %4, align 8, !tbaa !5
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %4, align 8, !tbaa !5
  br label %40

40:                                               ; preds = %37, %33
  br label %41

41:                                               ; preds = %40, %27
  br label %42

42:                                               ; preds = %41
  %43 = load i64, ptr %7, align 8, !tbaa !5
  %44 = add nsw i64 %43, 1
  store i64 %44, ptr %7, align 8, !tbaa !5
  br label %13, !llvm.loop !9

45:                                               ; preds = %17
  %46 = load i64, ptr %5, align 8, !tbaa !5
  %47 = icmp ne i64 %46, 0
  br i1 %47, label %48, label %51

48:                                               ; preds = %45
  %49 = load i64, ptr %4, align 8, !tbaa !5
  %50 = add nsw i64 %49, 1
  store i64 %50, ptr %4, align 8, !tbaa !5
  br label %51

51:                                               ; preds = %48, %45
  %52 = load i64, ptr %4, align 8, !tbaa !5
  %53 = load i64, ptr @k, align 8, !tbaa !5
  %54 = icmp sle i64 %52, %53
  store i1 %54, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %55

55:                                               ; preds = %51, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  %56 = load i1, ptr %2, align 1
  ret i1 %56
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i64, align 8
@k = external dso_local local_unnamed_addr global i64, align 8
@arr = external dso_local global %"class.std::vector", align 8
@maxi = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z4goodx(i64 noundef %0) local_unnamed_addr #0 {
  %2 = load i64, ptr @maxi, align 8, !tbaa !5
  %3 = icmp sgt i64 %2, %0
  br i1 %3, label %26, label %.preheader

.preheader:                                       ; preds = %1
  %4 = load i64, ptr @n, align 8, !tbaa !5
  %5 = icmp sgt i64 %4, 0
  br i1 %5, label %.lr.ph, label %._crit_edge

._crit_edge.loopexit:                             ; preds = %22
  %6 = icmp ne i64 %.1, 0
  %7 = zext i1 %6 to i64
  %8 = add nsw i64 %.117, %7
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %spec.select = phi i64 [ 0, %.preheader ], [ %8, %._crit_edge.loopexit ]
  %9 = load i64, ptr @k, align 8, !tbaa !5
  %10 = icmp sle i64 %spec.select, %9
  br label %26

.lr.ph:                                           ; preds = %.preheader, %22
  %.025 = phi i64 [ %23, %22 ], [ 0, %.preheader ]
  %.01524 = phi i64 [ %.1, %22 ], [ 0, %.preheader ]
  %.01623 = phi i64 [ %.117, %22 ], [ 0, %.preheader ]
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %.025) #1
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = add nsw i64 %12, %.01524
  %14 = icmp sgt i64 %13, %0
  br i1 %14, label %15, label %19

15:                                               ; preds = %.lr.ph
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %.025) #1
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = add nsw i64 %.01623, 1
  br label %22

19:                                               ; preds = %.lr.ph
  %20 = icmp eq i64 %13, %0
  %21 = zext i1 %20 to i64
  %spec.select21 = add nsw i64 %.01623, %21
  %spec.select22 = select i1 %20, i64 0, i64 %13
  br label %22

22:                                               ; preds = %19, %15
  %.117 = phi i64 [ %18, %15 ], [ %spec.select21, %19 ]
  %.1 = phi i64 [ %17, %15 ], [ %spec.select22, %19 ]
  %23 = add nuw nsw i64 %.025, 1
  %24 = load i64, ptr @n, align 8, !tbaa !5
  %25 = icmp slt i64 %23, %24
  br i1 %25, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !9

26:                                               ; preds = %1, %._crit_edge
  %.018 = phi i1 [ %10, %._crit_edge ], [ false, %1 ]
  ret i1 %.018
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass