; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/操作格子（线段树）(单点修改，区间求最值，区间求和).ll (Z5buildiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@sum = external dso_local global [800000 x i32], align 16
@MAX = external dso_local global [800000 x i32], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6pushupi(i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %10 = icmp eq i32 %8, %9
  br i1 %10, label %11, label %23

11:                                               ; preds = %3
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [800000 x i32], ptr @sum, i64 0, i64 %13
  %15 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %14)
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [800000 x i32], ptr @sum, i64 0, i64 %17
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [800000 x i32], ptr @MAX, i64 0, i64 %21
  store i32 %19, ptr %22, align 4, !tbaa !5
  br label %39

23:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = add nsw i32 %24, %25
  %27 = ashr i32 %26, 1
  store i32 %27, ptr %7, align 4, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = shl i32 %30, 1
  call void @_Z5buildiii(i32 noundef %28, i32 noundef %29, i32 noundef %31)
  %32 = load i32, ptr %7, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = load i32, ptr %6, align 4, !tbaa !5
  %36 = shl i32 %35, 1
  %37 = or i32 %36, 1
  call void @_Z5buildiii(i32 noundef %33, i32 noundef %34, i32 noundef %37)
  %38 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z6pushupi(i32 noundef %38)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %39

39:                                               ; preds = %23, %11
  ret void
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@sum = external dso_local global [800000 x i32], align 16
@MAX = external dso_local local_unnamed_addr global [800000 x i32], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6pushupi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %0, %1
  br i1 %4, label %common.ret, label %10

common.ret:                                       ; preds = %3
  %5 = sext i32 %2 to i64
  %6 = getelementptr inbounds [800000 x i32], ptr @sum, i64 0, i64 %5
  %7 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %8 = load i32, ptr %6, align 4, !tbaa !5
  %9 = getelementptr inbounds [800000 x i32], ptr @MAX, i64 0, i64 %5
  store i32 %8, ptr %9, align 4, !tbaa !5
  br label %common.ret15

common.ret15:                                     ; preds = %10, %common.ret
  ret void

10:                                               ; preds = %3
  %11 = add nsw i32 %1, %0
  %12 = ashr i32 %11, 1
  %13 = shl i32 %2, 1
  tail call void @_Z5buildiii(i32 noundef %0, i32 noundef %12, i32 noundef %13)
  %14 = add nsw i32 %12, 1
  %15 = or disjoint i32 %13, 1
  tail call void @_Z5buildiii(i32 noundef %14, i32 noundef %1, i32 noundef %15)
  tail call void @_Z6pushupi(i32 noundef %2)
  br label %common.ret15
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass