; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/ASwitch.ll (ZN7ASwitch12resetSignalsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ASwitch = type { %class.Unit, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, %"class.std::vector", i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i8, i32, i32, i8, i8, i8, i32, [4 x i8], %class.ASwitchStats }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl" = type { %"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DataPackage *, std::allocator<DataPackage *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.ASwitchStats = type <{ %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8] }>
%class.Stats = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch12resetSignalsEv(ptr noundef nonnull align 8 dereferenceable(288) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 18
  store i32 0, ptr %4, align 8, !tbaa !9
  %5 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 25
  store i32 2, ptr %5, align 4, !tbaa !26
  %6 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 27
  store i32 0, ptr %6, align 4, !tbaa !27
  %7 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 28
  store i32 0, ptr %7, align 8, !tbaa !28
  %8 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 29
  store i8 0, ptr %8, align 4, !tbaa !29
  %9 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 30
  store i8 0, ptr %9, align 1, !tbaa !30
  %10 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 26
  store i8 0, ptr %10, align 8, !tbaa !31
  %11 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 31
  store i8 0, ptr %11, align 2, !tbaa !32
  br label %12

12:                                               ; preds = %17, %1
  %13 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 12
  %14 = load ptr, ptr %13, align 8, !tbaa !33
  %15 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %14)
  %16 = xor i1 %15, true
  br i1 %16, label %17, label %21

17:                                               ; preds = %12
  %18 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 12
  %19 = load ptr, ptr %18, align 8, !tbaa !33
  %20 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %19)
  br label %12, !llvm.loop !34

21:                                               ; preds = %12
  br label %22

22:                                               ; preds = %27, %21
  %23 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 13
  %24 = load ptr, ptr %23, align 8, !tbaa !36
  %25 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %24)
  %26 = xor i1 %25, true
  br i1 %26, label %27, label %31

27:                                               ; preds = %22
  %28 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 13
  %29 = load ptr, ptr %28, align 8, !tbaa !36
  %30 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %29)
  br label %22, !llvm.loop !37

31:                                               ; preds = %22
  br label %32

32:                                               ; preds = %37, %31
  %33 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 15
  %34 = load ptr, ptr %33, align 8, !tbaa !38
  %35 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %34)
  %36 = xor i1 %35, true
  br i1 %36, label %37, label %41

37:                                               ; preds = %32
  %38 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 15
  %39 = load ptr, ptr %38, align 8, !tbaa !38
  %40 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %39)
  br label %32, !llvm.loop !39

41:                                               ; preds = %32
  br label %42

42:                                               ; preds = %47, %41
  %43 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 14
  %44 = load ptr, ptr %43, align 8, !tbaa !40
  %45 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %44)
  %46 = xor i1 %45, true
  br i1 %46, label %47, label %51

47:                                               ; preds = %42
  %48 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 14
  %49 = load ptr, ptr %48, align 8, !tbaa !40
  %50 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %49)
  br label %42, !llvm.loop !41

51:                                               ; preds = %42
  br label %52

52:                                               ; preds = %57, %51
  %53 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 16
  %54 = load ptr, ptr %53, align 8, !tbaa !42
  %55 = call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %54)
  %56 = xor i1 %55, true
  br i1 %56, label %57, label %61

57:                                               ; preds = %52
  %58 = getelementptr inbounds %class.ASwitch, ptr %3, i32 0, i32 16
  %59 = load ptr, ptr %58, align 8, !tbaa !42
  %60 = call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %59)
  br label %52, !llvm.loop !43

61:                                               ; preds = %52
  ret void
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 160}
!10 = !{!"_ZTS7ASwitch", !11, i64 0, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !16, i64 136, !12, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !12, i64 208, !20, i64 212, !21, i64 216, !22, i64 220, !23, i64 224, !21, i64 228, !21, i64 229, !21, i64 230, !12, i64 232, !24, i64 240}
!11 = !{!"_ZTS4Unit", !12, i64 8, !13, i64 16}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTS4fl_t", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!23 = !{!"_ZTS16adderoperation_t", !7, i64 0}
!24 = !{!"_ZTS12ASwitchStats", !25, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!25 = !{!"_ZTS5Stats"}
!26 = !{!10, !20, i64 212}
!27 = !{!10, !22, i64 220}
!28 = !{!10, !23, i64 224}
!29 = !{!10, !21, i64 228}
!30 = !{!10, !21, i64 229}
!31 = !{!10, !21, i64 216}
!32 = !{!10, !21, i64 230}
!33 = !{!10, !6, i64 96}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!10, !6, i64 104}
!37 = distinct !{!37, !35}
!38 = !{!10, !6, i64 120}
!39 = distinct !{!39, !35}
!40 = !{!10, !6, i64 112}
!41 = distinct !{!41, !35}
!42 = !{!10, !6, i64 128}
!43 = distinct !{!43, !35}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7ASwitch12resetSignalsEv(ptr nocapture noundef nonnull align 8 dereferenceable(288) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 160
  store i32 0, ptr %2, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 212
  store i32 2, ptr %3, align 4, !tbaa !25
  %4 = getelementptr inbounds i8, ptr %0, i64 220
  %5 = getelementptr inbounds i8, ptr %0, i64 216
  store i8 0, ptr %5, align 8, !tbaa !26
  %6 = getelementptr inbounds i8, ptr %0, i64 96
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(11) %4, i8 0, i64 11, i1 false)
  %7 = load ptr, ptr %6, align 8, !tbaa !27
  %8 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %7)
  br i1 %8, label %.preheader3, label %.lr.ph

.preheader3:                                      ; preds = %.lr.ph, %1
  %9 = getelementptr inbounds i8, ptr %0, i64 104
  %10 = load ptr, ptr %9, align 8, !tbaa !28
  %11 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %10)
  br i1 %11, label %.preheader2, label %.lr.ph4

.lr.ph:                                           ; preds = %1, %.lr.ph
  %12 = load ptr, ptr %6, align 8, !tbaa !27
  %13 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %12)
  %14 = load ptr, ptr %6, align 8, !tbaa !27
  %15 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %14)
  br i1 %15, label %.preheader3, label %.lr.ph, !llvm.loop !29

.preheader2:                                      ; preds = %.lr.ph4, %.preheader3
  %16 = getelementptr inbounds i8, ptr %0, i64 120
  %17 = load ptr, ptr %16, align 8, !tbaa !31
  %18 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %17)
  br i1 %18, label %.preheader1, label %.lr.ph5

.lr.ph4:                                          ; preds = %.preheader3, %.lr.ph4
  %19 = load ptr, ptr %9, align 8, !tbaa !28
  %20 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %19)
  %21 = load ptr, ptr %9, align 8, !tbaa !28
  %22 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %21)
  br i1 %22, label %.preheader2, label %.lr.ph4, !llvm.loop !32

.preheader1:                                      ; preds = %.lr.ph5, %.preheader2
  %23 = getelementptr inbounds i8, ptr %0, i64 112
  %24 = load ptr, ptr %23, align 8, !tbaa !33
  %25 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %24)
  br i1 %25, label %.preheader, label %.lr.ph6

.lr.ph5:                                          ; preds = %.preheader2, %.lr.ph5
  %26 = load ptr, ptr %16, align 8, !tbaa !31
  %27 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %26)
  %28 = load ptr, ptr %16, align 8, !tbaa !31
  %29 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %28)
  br i1 %29, label %.preheader1, label %.lr.ph5, !llvm.loop !34

.preheader:                                       ; preds = %.lr.ph6, %.preheader1
  %30 = getelementptr inbounds i8, ptr %0, i64 128
  %31 = load ptr, ptr %30, align 8, !tbaa !35
  %32 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %31)
  br i1 %32, label %._crit_edge, label %.lr.ph7

.lr.ph6:                                          ; preds = %.preheader1, %.lr.ph6
  %33 = load ptr, ptr %23, align 8, !tbaa !33
  %34 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %33)
  %35 = load ptr, ptr %23, align 8, !tbaa !33
  %36 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %35)
  br i1 %36, label %.preheader, label %.lr.ph6, !llvm.loop !36

.lr.ph7:                                          ; preds = %.preheader, %.lr.ph7
  %37 = load ptr, ptr %30, align 8, !tbaa !35
  %38 = tail call noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120) %37)
  %39 = load ptr, ptr %30, align 8, !tbaa !35
  %40 = tail call noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120) %39)
  br i1 %40, label %._crit_edge, label %.lr.ph7, !llvm.loop !37

._crit_edge:                                      ; preds = %.lr.ph7, %.preheader
  ret void
}

declare noundef zeroext i1 @_ZN4Fifo7isEmptyEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

declare noundef ptr @_ZN4Fifo3popEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 160}
!6 = !{!"_ZTS7ASwitch", !7, i64 0, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60, !8, i64 64, !8, i64 68, !8, i64 72, !8, i64 76, !8, i64 80, !8, i64 84, !8, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !15, i64 136, !8, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !8, i64 208, !19, i64 212, !20, i64 216, !21, i64 220, !22, i64 224, !20, i64 228, !20, i64 229, !20, i64 230, !8, i64 232, !23, i64 240}
!7 = !{!"_ZTS4Unit", !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !9, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"_ZTSSt6vectorIP11DataPackageSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11DataPackageSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11DataPackageSaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!"_ZTS4fl_t", !9, i64 0}
!20 = !{!"bool", !9, i64 0}
!21 = !{!"_ZTS13adderconfig_t", !9, i64 0}
!22 = !{!"_ZTS16adderoperation_t", !9, i64 0}
!23 = !{!"_ZTS12ASwitchStats", !24, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40}
!24 = !{!"_ZTS5Stats"}
!25 = !{!6, !19, i64 212}
!26 = !{!6, !20, i64 216}
!27 = !{!6, !13, i64 96}
!28 = !{!6, !13, i64 104}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = !{!6, !13, i64 120}
!32 = distinct !{!32, !30}
!33 = !{!6, !13, i64 112}
!34 = distinct !{!34, !30}
!35 = !{!6, !13, i64 128}
!36 = distinct !{!36, !30}
!37 = distinct !{!37, !30}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass