; LLVM IR from reworks-org/galaxy :: deps/sfml_deps/freetype-src/src/base (fttrigon)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FT_Vector_ = type { i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @ft_trig_prenorm(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @ft_trig_pseudo_polarize(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden i64 @ft_trig_downscale(i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @FT_Vector_Polarize(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca %struct.FT_Vector_, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %8) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %18

12:                                               ; preds = %3
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %18

15:                                               ; preds = %12
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = icmp ne ptr %16, null
  br i1 %17, label %19, label %18

18:                                               ; preds = %15, %12, %3
  store i32 1, ptr %9, align 4
  br label %57

19:                                               ; preds = %15
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %8, ptr align 8 %20, i64 16, i1 false), !tbaa.struct !9
  %21 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 0
  %22 = load i64, ptr %21, align 8, !tbaa !12
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %24, label %29

24:                                               ; preds = %19
  %25 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 1
  %26 = load i64, ptr %25, align 8, !tbaa !14
  %27 = icmp eq i64 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i32 1, ptr %9, align 4
  br label %57

29:                                               ; preds = %24, %19
  %30 = call i32 @ft_trig_prenorm(ptr noundef %8)
  store i32 %30, ptr %7, align 4, !tbaa !15
  call void @ft_trig_pseudo_polarize(ptr noundef %8)
  %31 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 0
  %32 = load i64, ptr %31, align 8, !tbaa !12
  %33 = call i64 @ft_trig_downscale(i64 noundef %32)
  %34 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 0
  store i64 %33, ptr %34, align 8, !tbaa !12
  %35 = load i32, ptr %7, align 4, !tbaa !15
  %36 = icmp sge i32 %35, 0
  br i1 %36, label %37, label %43

37:                                               ; preds = %29
  %38 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 0
  %39 = load i64, ptr %38, align 8, !tbaa !12
  %40 = load i32, ptr %7, align 4, !tbaa !15
  %41 = zext i32 %40 to i64
  %42 = ashr i64 %39, %41
  br label %51

43:                                               ; preds = %29
  %44 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 0
  %45 = load i64, ptr %44, align 8, !tbaa !12
  %46 = trunc i64 %45 to i32
  %47 = load i32, ptr %7, align 4, !tbaa !15
  %48 = sub nsw i32 0, %47
  %49 = shl i32 %46, %48
  %50 = zext i32 %49 to i64
  br label %51

51:                                               ; preds = %43, %37
  %52 = phi i64 [ %42, %37 ], [ %50, %43 ]
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  store i64 %52, ptr %53, align 8, !tbaa !10
  %54 = getelementptr inbounds %struct.FT_Vector_, ptr %8, i32 0, i32 1
  %55 = load i64, ptr %54, align 8, !tbaa !14
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  store i64 %55, ptr %56, align 8, !tbaa !10
  store i32 0, ptr %9, align 4
  br label %57

57:                                               ; preds = %51, %28, %18
  call void @llvm.lifetime.end.p0(i64 16, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %58 = load i32, ptr %9, align 4
  switch i32 %58, label %60 [
    i32 0, label %59
    i32 1, label %59
  ]

59:                                               ; preds = %57, %57
  ret void

60:                                               ; preds = %57
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 8, !10, i64 8, i64 8, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"FT_Vector_", !11, i64 0, !11, i64 8}
!14 = !{!13, !11, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FT_Vector_ = type { i64, i64 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @ft_trig_prenorm(ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden void @ft_trig_pseudo_polarize(ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden i64 @ft_trig_downscale(i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @FT_Vector_Polarize(ptr noundef readonly %0, ptr noundef writeonly %1, ptr noundef writeonly %2) local_unnamed_addr #2 {
  %4 = alloca %struct.FT_Vector_, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  %5 = icmp ne ptr %0, null
  %6 = icmp ne ptr %1, null
  %or.cond = and i1 %5, %6
  %7 = icmp ne ptr %2, null
  %or.cond3 = and i1 %or.cond, %7
  br i1 %or.cond3, label %8, label %27

8:                                                ; preds = %3
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %0, i64 16, i1 false), !tbaa.struct !5
  %9 = load i64, ptr %4, align 8, !tbaa !10
  %10 = icmp eq i64 %9, 0
  %11 = getelementptr inbounds i8, ptr %4, i64 8
  %12 = load i64, ptr %11, align 8
  %13 = icmp eq i64 %12, 0
  %or.cond6 = select i1 %10, i1 %13, i1 false
  br i1 %or.cond6, label %27, label %14

14:                                               ; preds = %8
  %15 = call i32 @ft_trig_prenorm(ptr noundef nonnull %4)
  call void @ft_trig_pseudo_polarize(ptr noundef nonnull %4)
  %16 = load i64, ptr %4, align 8, !tbaa !10
  %17 = call i64 @ft_trig_downscale(i64 noundef %16)
  %18 = zext nneg i32 %15 to i64
  %19 = ashr i64 %17, %18
  %20 = trunc i64 %17 to i32
  %21 = sub nsw i32 0, %15
  %22 = shl i32 %20, %21
  %23 = zext i32 %22 to i64
  %24 = icmp slt i32 %15, 0
  %25 = select i1 %24, i64 %23, i64 %19
  store i64 %25, ptr %1, align 8, !tbaa !6
  %26 = load i64, ptr %11, align 8, !tbaa !12
  store i64 %26, ptr %2, align 8, !tbaa !6
  br label %27

27:                                               ; preds = %8, %3, %14
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 8, !6, i64 8, i64 8, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"FT_Vector_", !7, i64 0, !7, i64 8}
!12 = !{!11, !7, i64 8}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass