; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (AdvFeatureConfig)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__UART_HandleTypeDef = type { ptr, %struct.UART_InitTypeDef, %struct.UART_AdvFeatureInitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i32, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
%struct.UART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.UART_AdvFeatureInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @UART_AdvFeatureConfig(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %3, i32 0, i32 2
  %5 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %4, i32 0, i32 0
  %6 = load i32, ptr %5, align 4, !tbaa !9
  %7 = and i32 %6, 1
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %9, label %28

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !15
  %13 = getelementptr inbounds %struct.USART_TypeDef, ptr %12, i32 0, i32 1
  %14 = load volatile i32, ptr %13, align 4, !tbaa !16
  %15 = zext i32 %14 to i64
  %16 = and i64 %15, -131073
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %17, i32 0, i32 2
  %19 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %18, i32 0, i32 1
  %20 = load i32, ptr %19, align 4, !tbaa !18
  %21 = zext i32 %20 to i64
  %22 = or i64 %16, %21
  %23 = trunc i64 %22 to i32
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %24, i32 0, i32 0
  %26 = load ptr, ptr %25, align 8, !tbaa !15
  %27 = getelementptr inbounds %struct.USART_TypeDef, ptr %26, i32 0, i32 1
  store volatile i32 %23, ptr %27, align 4, !tbaa !16
  br label %28

28:                                               ; preds = %9, %1
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %29, i32 0, i32 2
  %31 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %30, i32 0, i32 0
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = and i32 %32, 2
  %34 = icmp eq i32 %33, 2
  br i1 %34, label %35, label %54

35:                                               ; preds = %28
  %36 = load ptr, ptr %2, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %36, i32 0, i32 0
  %38 = load ptr, ptr %37, align 8, !tbaa !15
  %39 = getelementptr inbounds %struct.USART_TypeDef, ptr %38, i32 0, i32 1
  %40 = load volatile i32, ptr %39, align 4, !tbaa !16
  %41 = zext i32 %40 to i64
  %42 = and i64 %41, -65537
  %43 = load ptr, ptr %2, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %43, i32 0, i32 2
  %45 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %44, i32 0, i32 2
  %46 = load i32, ptr %45, align 4, !tbaa !19
  %47 = zext i32 %46 to i64
  %48 = or i64 %42, %47
  %49 = trunc i64 %48 to i32
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !15
  %53 = getelementptr inbounds %struct.USART_TypeDef, ptr %52, i32 0, i32 1
  store volatile i32 %49, ptr %53, align 4, !tbaa !16
  br label %54

54:                                               ; preds = %35, %28
  %55 = load ptr, ptr %2, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %55, i32 0, i32 2
  %57 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %56, i32 0, i32 0
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = and i32 %58, 4
  %60 = icmp eq i32 %59, 4
  br i1 %60, label %61, label %80

61:                                               ; preds = %54
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %62, i32 0, i32 0
  %64 = load ptr, ptr %63, align 8, !tbaa !15
  %65 = getelementptr inbounds %struct.USART_TypeDef, ptr %64, i32 0, i32 1
  %66 = load volatile i32, ptr %65, align 4, !tbaa !16
  %67 = zext i32 %66 to i64
  %68 = and i64 %67, -262145
  %69 = load ptr, ptr %2, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %69, i32 0, i32 2
  %71 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %70, i32 0, i32 3
  %72 = load i32, ptr %71, align 4, !tbaa !20
  %73 = zext i32 %72 to i64
  %74 = or i64 %68, %73
  %75 = trunc i64 %74 to i32
  %76 = load ptr, ptr %2, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %76, i32 0, i32 0
  %78 = load ptr, ptr %77, align 8, !tbaa !15
  %79 = getelementptr inbounds %struct.USART_TypeDef, ptr %78, i32 0, i32 1
  store volatile i32 %75, ptr %79, align 4, !tbaa !16
  br label %80

80:                                               ; preds = %61, %54
  %81 = load ptr, ptr %2, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %81, i32 0, i32 2
  %83 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %82, i32 0, i32 0
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = and i32 %84, 8
  %86 = icmp eq i32 %85, 8
  br i1 %86, label %87, label %106

87:                                               ; preds = %80
  %88 = load ptr, ptr %2, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %88, i32 0, i32 0
  %90 = load ptr, ptr %89, align 8, !tbaa !15
  %91 = getelementptr inbounds %struct.USART_TypeDef, ptr %90, i32 0, i32 1
  %92 = load volatile i32, ptr %91, align 4, !tbaa !16
  %93 = zext i32 %92 to i64
  %94 = and i64 %93, -32769
  %95 = load ptr, ptr %2, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %95, i32 0, i32 2
  %97 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %96, i32 0, i32 4
  %98 = load i32, ptr %97, align 4, !tbaa !21
  %99 = zext i32 %98 to i64
  %100 = or i64 %94, %99
  %101 = trunc i64 %100 to i32
  %102 = load ptr, ptr %2, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %102, i32 0, i32 0
  %104 = load ptr, ptr %103, align 8, !tbaa !15
  %105 = getelementptr inbounds %struct.USART_TypeDef, ptr %104, i32 0, i32 1
  store volatile i32 %101, ptr %105, align 4, !tbaa !16
  br label %106

106:                                              ; preds = %87, %80
  %107 = load ptr, ptr %2, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %107, i32 0, i32 2
  %109 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %108, i32 0, i32 0
  %110 = load i32, ptr %109, align 4, !tbaa !9
  %111 = and i32 %110, 16
  %112 = icmp eq i32 %111, 16
  br i1 %112, label %113, label %132

113:                                              ; preds = %106
  %114 = load ptr, ptr %2, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %114, i32 0, i32 0
  %116 = load ptr, ptr %115, align 8, !tbaa !15
  %117 = getelementptr inbounds %struct.USART_TypeDef, ptr %116, i32 0, i32 2
  %118 = load volatile i32, ptr %117, align 4, !tbaa !22
  %119 = zext i32 %118 to i64
  %120 = and i64 %119, -4097
  %121 = load ptr, ptr %2, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %121, i32 0, i32 2
  %123 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %122, i32 0, i32 5
  %124 = load i32, ptr %123, align 4, !tbaa !23
  %125 = zext i32 %124 to i64
  %126 = or i64 %120, %125
  %127 = trunc i64 %126 to i32
  %128 = load ptr, ptr %2, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %128, i32 0, i32 0
  %130 = load ptr, ptr %129, align 8, !tbaa !15
  %131 = getelementptr inbounds %struct.USART_TypeDef, ptr %130, i32 0, i32 2
  store volatile i32 %127, ptr %131, align 4, !tbaa !22
  br label %132

132:                                              ; preds = %113, %106
  %133 = load ptr, ptr %2, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %133, i32 0, i32 2
  %135 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %134, i32 0, i32 0
  %136 = load i32, ptr %135, align 4, !tbaa !9
  %137 = and i32 %136, 32
  %138 = icmp eq i32 %137, 32
  br i1 %138, label %139, label %158

139:                                              ; preds = %132
  %140 = load ptr, ptr %2, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %140, i32 0, i32 0
  %142 = load ptr, ptr %141, align 8, !tbaa !15
  %143 = getelementptr inbounds %struct.USART_TypeDef, ptr %142, i32 0, i32 2
  %144 = load volatile i32, ptr %143, align 4, !tbaa !22
  %145 = zext i32 %144 to i64
  %146 = and i64 %145, -8193
  %147 = load ptr, ptr %2, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %147, i32 0, i32 2
  %149 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %148, i32 0, i32 6
  %150 = load i32, ptr %149, align 4, !tbaa !24
  %151 = zext i32 %150 to i64
  %152 = or i64 %146, %151
  %153 = trunc i64 %152 to i32
  %154 = load ptr, ptr %2, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %154, i32 0, i32 0
  %156 = load ptr, ptr %155, align 8, !tbaa !15
  %157 = getelementptr inbounds %struct.USART_TypeDef, ptr %156, i32 0, i32 2
  store volatile i32 %153, ptr %157, align 4, !tbaa !22
  br label %158

158:                                              ; preds = %139, %132
  %159 = load ptr, ptr %2, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %159, i32 0, i32 2
  %161 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %160, i32 0, i32 0
  %162 = load i32, ptr %161, align 4, !tbaa !9
  %163 = and i32 %162, 64
  %164 = icmp eq i32 %163, 64
  br i1 %164, label %165, label %210

165:                                              ; preds = %158
  %166 = load ptr, ptr %2, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %166, i32 0, i32 0
  %168 = load ptr, ptr %167, align 8, !tbaa !15
  %169 = getelementptr inbounds %struct.USART_TypeDef, ptr %168, i32 0, i32 1
  %170 = load volatile i32, ptr %169, align 4, !tbaa !16
  %171 = zext i32 %170 to i64
  %172 = and i64 %171, -1048577
  %173 = load ptr, ptr %2, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %173, i32 0, i32 2
  %175 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %174, i32 0, i32 7
  %176 = load i32, ptr %175, align 4, !tbaa !25
  %177 = zext i32 %176 to i64
  %178 = or i64 %172, %177
  %179 = trunc i64 %178 to i32
  %180 = load ptr, ptr %2, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %180, i32 0, i32 0
  %182 = load ptr, ptr %181, align 8, !tbaa !15
  %183 = getelementptr inbounds %struct.USART_TypeDef, ptr %182, i32 0, i32 1
  store volatile i32 %179, ptr %183, align 4, !tbaa !16
  %184 = load ptr, ptr %2, align 8, !tbaa !5
  %185 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %184, i32 0, i32 2
  %186 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %185, i32 0, i32 7
  %187 = load i32, ptr %186, align 4, !tbaa !25
  %188 = zext i32 %187 to i64
  %189 = icmp eq i64 %188, 1048576
  br i1 %189, label %190, label %209

190:                                              ; preds = %165
  %191 = load ptr, ptr %2, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %191, i32 0, i32 0
  %193 = load ptr, ptr %192, align 8, !tbaa !15
  %194 = getelementptr inbounds %struct.USART_TypeDef, ptr %193, i32 0, i32 1
  %195 = load volatile i32, ptr %194, align 4, !tbaa !16
  %196 = zext i32 %195 to i64
  %197 = and i64 %196, -6291457
  %198 = load ptr, ptr %2, align 8, !tbaa !5
  %199 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %198, i32 0, i32 2
  %200 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %199, i32 0, i32 8
  %201 = load i32, ptr %200, align 4, !tbaa !26
  %202 = zext i32 %201 to i64
  %203 = or i64 %197, %202
  %204 = trunc i64 %203 to i32
  %205 = load ptr, ptr %2, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %205, i32 0, i32 0
  %207 = load ptr, ptr %206, align 8, !tbaa !15
  %208 = getelementptr inbounds %struct.USART_TypeDef, ptr %207, i32 0, i32 1
  store volatile i32 %204, ptr %208, align 4, !tbaa !16
  br label %209

209:                                              ; preds = %190, %165
  br label %210

210:                                              ; preds = %209, %158
  %211 = load ptr, ptr %2, align 8, !tbaa !5
  %212 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %211, i32 0, i32 2
  %213 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %212, i32 0, i32 0
  %214 = load i32, ptr %213, align 4, !tbaa !9
  %215 = and i32 %214, 128
  %216 = icmp eq i32 %215, 128
  br i1 %216, label %217, label %236

217:                                              ; preds = %210
  %218 = load ptr, ptr %2, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %218, i32 0, i32 0
  %220 = load ptr, ptr %219, align 8, !tbaa !15
  %221 = getelementptr inbounds %struct.USART_TypeDef, ptr %220, i32 0, i32 1
  %222 = load volatile i32, ptr %221, align 4, !tbaa !16
  %223 = zext i32 %222 to i64
  %224 = and i64 %223, -524289
  %225 = load ptr, ptr %2, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %225, i32 0, i32 2
  %227 = getelementptr inbounds %struct.UART_AdvFeatureInitTypeDef, ptr %226, i32 0, i32 9
  %228 = load i32, ptr %227, align 4, !tbaa !27
  %229 = zext i32 %228 to i64
  %230 = or i64 %224, %229
  %231 = trunc i64 %230 to i32
  %232 = load ptr, ptr %2, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %232, i32 0, i32 0
  %234 = load ptr, ptr %233, align 8, !tbaa !15
  %235 = getelementptr inbounds %struct.USART_TypeDef, ptr %234, i32 0, i32 1
  store volatile i32 %231, ptr %235, align 4, !tbaa !16
  br label %236

236:                                              ; preds = %217, %210
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 44}
!10 = !{!"__UART_HandleTypeDef", !6, i64 0, !11, i64 8, !13, i64 44, !6, i64 88, !14, i64 96, !14, i64 98, !6, i64 104, !14, i64 112, !14, i64 114, !14, i64 116, !12, i64 120, !14, i64 124, !14, i64 126, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!14 = !{!"short", !7, i64 0}
!15 = !{!10, !6, i64 0}
!16 = !{!17, !12, i64 4}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!18 = !{!10, !12, i64 48}
!19 = !{!10, !12, i64 52}
!20 = !{!10, !12, i64 56}
!21 = !{!10, !12, i64 60}
!22 = !{!17, !12, i64 8}
!23 = !{!10, !12, i64 64}
!24 = !{!10, !12, i64 68}
!25 = !{!10, !12, i64 72}
!26 = !{!10, !12, i64 76}
!27 = !{!10, !12, i64 80}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @UART_AdvFeatureConfig(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 44
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = and i32 %3, 1
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %13, label %5

5:                                                ; preds = %1
  %6 = load ptr, ptr %0, align 8, !tbaa !14
  %7 = getelementptr inbounds i8, ptr %6, i64 4
  %8 = load volatile i32, ptr %7, align 4, !tbaa !15
  %9 = and i32 %8, -131073
  %10 = getelementptr inbounds i8, ptr %0, i64 48
  %11 = load i32, ptr %10, align 4, !tbaa !17
  %12 = or i32 %9, %11
  store volatile i32 %12, ptr %7, align 4, !tbaa !15
  br label %13

13:                                               ; preds = %5, %1
  %14 = and i32 %3, 2
  %.not36 = icmp eq i32 %14, 0
  br i1 %.not36, label %23, label %15

15:                                               ; preds = %13
  %16 = load ptr, ptr %0, align 8, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %16, i64 4
  %18 = load volatile i32, ptr %17, align 4, !tbaa !15
  %19 = and i32 %18, -65537
  %20 = getelementptr inbounds i8, ptr %0, i64 52
  %21 = load i32, ptr %20, align 4, !tbaa !18
  %22 = or i32 %19, %21
  store volatile i32 %22, ptr %17, align 4, !tbaa !15
  br label %23

23:                                               ; preds = %15, %13
  %24 = and i32 %3, 4
  %.not37 = icmp eq i32 %24, 0
  br i1 %.not37, label %33, label %25

25:                                               ; preds = %23
  %26 = load ptr, ptr %0, align 8, !tbaa !14
  %27 = getelementptr inbounds i8, ptr %26, i64 4
  %28 = load volatile i32, ptr %27, align 4, !tbaa !15
  %29 = and i32 %28, -262145
  %30 = getelementptr inbounds i8, ptr %0, i64 56
  %31 = load i32, ptr %30, align 4, !tbaa !19
  %32 = or i32 %29, %31
  store volatile i32 %32, ptr %27, align 4, !tbaa !15
  br label %33

33:                                               ; preds = %25, %23
  %34 = and i32 %3, 8
  %.not38 = icmp eq i32 %34, 0
  br i1 %.not38, label %43, label %35

35:                                               ; preds = %33
  %36 = load ptr, ptr %0, align 8, !tbaa !14
  %37 = getelementptr inbounds i8, ptr %36, i64 4
  %38 = load volatile i32, ptr %37, align 4, !tbaa !15
  %39 = and i32 %38, -32769
  %40 = getelementptr inbounds i8, ptr %0, i64 60
  %41 = load i32, ptr %40, align 4, !tbaa !20
  %42 = or i32 %39, %41
  store volatile i32 %42, ptr %37, align 4, !tbaa !15
  br label %43

43:                                               ; preds = %35, %33
  %44 = and i32 %3, 16
  %.not39 = icmp eq i32 %44, 0
  br i1 %.not39, label %53, label %45

45:                                               ; preds = %43
  %46 = load ptr, ptr %0, align 8, !tbaa !14
  %47 = getelementptr inbounds i8, ptr %46, i64 8
  %48 = load volatile i32, ptr %47, align 4, !tbaa !21
  %49 = and i32 %48, -4097
  %50 = getelementptr inbounds i8, ptr %0, i64 64
  %51 = load i32, ptr %50, align 4, !tbaa !22
  %52 = or i32 %49, %51
  store volatile i32 %52, ptr %47, align 4, !tbaa !21
  br label %53

53:                                               ; preds = %45, %43
  %54 = and i32 %3, 32
  %.not40 = icmp eq i32 %54, 0
  br i1 %.not40, label %63, label %55

55:                                               ; preds = %53
  %56 = load ptr, ptr %0, align 8, !tbaa !14
  %57 = getelementptr inbounds i8, ptr %56, i64 8
  %58 = load volatile i32, ptr %57, align 4, !tbaa !21
  %59 = and i32 %58, -8193
  %60 = getelementptr inbounds i8, ptr %0, i64 68
  %61 = load i32, ptr %60, align 4, !tbaa !23
  %62 = or i32 %59, %61
  store volatile i32 %62, ptr %57, align 4, !tbaa !21
  br label %63

63:                                               ; preds = %55, %53
  %64 = and i32 %3, 64
  %.not41 = icmp eq i32 %64, 0
  br i1 %.not41, label %80, label %65

65:                                               ; preds = %63
  %66 = load ptr, ptr %0, align 8, !tbaa !14
  %67 = getelementptr inbounds i8, ptr %66, i64 4
  %68 = load volatile i32, ptr %67, align 4, !tbaa !15
  %69 = and i32 %68, -1048577
  %70 = getelementptr inbounds i8, ptr %0, i64 72
  %71 = load i32, ptr %70, align 4, !tbaa !24
  %72 = or i32 %69, %71
  store volatile i32 %72, ptr %67, align 4, !tbaa !15
  %73 = icmp eq i32 %71, 1048576
  br i1 %73, label %74, label %80

74:                                               ; preds = %65
  %75 = load volatile i32, ptr %67, align 4, !tbaa !15
  %76 = and i32 %75, -6291457
  %77 = getelementptr inbounds i8, ptr %0, i64 76
  %78 = load i32, ptr %77, align 4, !tbaa !25
  %79 = or i32 %76, %78
  store volatile i32 %79, ptr %67, align 4, !tbaa !15
  br label %80

80:                                               ; preds = %65, %74, %63
  %81 = and i32 %3, 128
  %.not42 = icmp eq i32 %81, 0
  br i1 %.not42, label %90, label %82

82:                                               ; preds = %80
  %83 = load ptr, ptr %0, align 8, !tbaa !14
  %84 = getelementptr inbounds i8, ptr %83, i64 4
  %85 = load volatile i32, ptr %84, align 4, !tbaa !15
  %86 = and i32 %85, -524289
  %87 = getelementptr inbounds i8, ptr %0, i64 80
  %88 = load i32, ptr %87, align 4, !tbaa !26
  %89 = or i32 %86, %88
  store volatile i32 %89, ptr %84, align 4, !tbaa !15
  br label %90

90:                                               ; preds = %82, %80
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 44}
!6 = !{!"__UART_HandleTypeDef", !7, i64 0, !10, i64 8, !12, i64 44, !7, i64 88, !13, i64 96, !13, i64 98, !7, i64 104, !13, i64 112, !13, i64 114, !13, i64 116, !11, i64 120, !13, i64 124, !13, i64 126, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!"short", !8, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 4}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!17 = !{!6, !11, i64 48}
!18 = !{!6, !11, i64 52}
!19 = !{!6, !11, i64 56}
!20 = !{!6, !11, i64 60}
!21 = !{!16, !11, i64 8}
!22 = !{!6, !11, i64 64}
!23 = !{!6, !11, i64 68}
!24 = !{!6, !11, i64 72}
!25 = !{!6, !11, i64 76}
!26 = !{!6, !11, i64 80}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass