; LLVM IR from lzyrapx/Competitive-Programming :: Codeforces/Math/1257G.ll (Z3dftP4polyii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.poly = type <{ %"class.std::vector", i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@rv = external dso_local global [3456912 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z1Mi(i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5mypowii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dftP4polyii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 1, ptr %13, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %43, %3
  %18 = load i32, ptr %13, align 4, !tbaa !9
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %21, label %46

21:                                               ; preds = %17
  %22 = load i32, ptr %13, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [3456912 x i32], ptr @rv, i64 0, i64 %23
  %25 = load i32, ptr %24, align 4, !tbaa !9
  %26 = load i32, ptr %13, align 4, !tbaa !9
  %27 = icmp sgt i32 %25, %26
  br i1 %27, label %28, label %42

28:                                               ; preds = %21
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.poly, ptr %29, i32 0, i32 0
  %31 = load i32, ptr %13, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [3456912 x i32], ptr @rv, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %35) #3
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.poly, ptr %37, i32 0, i32 0
  %39 = load i32, ptr %13, align 4, !tbaa !9
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %36, ptr noundef nonnull align 4 dereferenceable(4) %41) #3
  br label %42

42:                                               ; preds = %28, %21
  br label %43

43:                                               ; preds = %42
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %13, align 4, !tbaa !9
  br label %17, !llvm.loop !11

46:                                               ; preds = %17
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %144, %46
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = load i32, ptr %6, align 4, !tbaa !9
  %50 = icmp slt i32 %48, %49
  br i1 %50, label %51, label %147

51:                                               ; preds = %47
  %52 = load i32, ptr %5, align 4, !tbaa !9
  %53 = icmp eq i32 %52, 1
  br i1 %53, label %54, label %58

54:                                               ; preds = %51
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = sdiv i32 499122176, %55
  %57 = call noundef i32 @_Z5mypowii(i32 noundef 3, i32 noundef %56)
  br label %63

58:                                               ; preds = %51
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = sdiv i32 499122176, %59
  %61 = sub nsw i32 998244352, %60
  %62 = call noundef i32 @_Z5mypowii(i32 noundef 3, i32 noundef %61)
  br label %63

63:                                               ; preds = %58, %54
  %64 = phi i32 [ %57, %54 ], [ %62, %58 ]
  store i32 %64, ptr %7, align 4, !tbaa !9
  store i32 0, ptr %14, align 4, !tbaa !9
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = shl i32 %65, 1
  store i32 %66, ptr %12, align 4, !tbaa !9
  br label %67

67:                                               ; preds = %139, %63
  %68 = load i32, ptr %14, align 4, !tbaa !9
  %69 = load i32, ptr %6, align 4, !tbaa !9
  %70 = icmp slt i32 %68, %69
  br i1 %70, label %71, label %143

71:                                               ; preds = %67
  store i32 1, ptr %8, align 4, !tbaa !9
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %72

72:                                               ; preds = %127, %71
  %73 = load i32, ptr %15, align 4, !tbaa !9
  %74 = load i32, ptr %9, align 4, !tbaa !9
  %75 = icmp slt i32 %73, %74
  br i1 %75, label %76, label %138

76:                                               ; preds = %72
  %77 = load ptr, ptr %4, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.poly, ptr %77, i32 0, i32 0
  %79 = load i32, ptr %14, align 4, !tbaa !9
  %80 = load i32, ptr %15, align 4, !tbaa !9
  %81 = add nsw i32 %79, %80
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %82) #3
  %84 = load i32, ptr %83, align 4, !tbaa !9
  store i32 %84, ptr %10, align 4, !tbaa !9
  %85 = load i32, ptr %8, align 4, !tbaa !9
  %86 = sext i32 %85 to i64
  %87 = mul nsw i64 1, %86
  %88 = load ptr, ptr %4, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.poly, ptr %88, i32 0, i32 0
  %90 = load i32, ptr %14, align 4, !tbaa !9
  %91 = load i32, ptr %9, align 4, !tbaa !9
  %92 = add nsw i32 %90, %91
  %93 = load i32, ptr %15, align 4, !tbaa !9
  %94 = add nsw i32 %92, %93
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %95) #3
  %97 = load i32, ptr %96, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = mul nsw i64 %87, %98
  %100 = srem i64 %99, 998244353
  %101 = trunc i64 %100 to i32
  store i32 %101, ptr %11, align 4, !tbaa !9
  %102 = load i32, ptr %10, align 4, !tbaa !9
  %103 = load i32, ptr %11, align 4, !tbaa !9
  %104 = add nsw i32 %102, %103
  %105 = call noundef i32 @_Z1Mi(i32 noundef %104)
  %106 = load ptr, ptr %4, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.poly, ptr %106, i32 0, i32 0
  %108 = load i32, ptr %14, align 4, !tbaa !9
  %109 = load i32, ptr %15, align 4, !tbaa !9
  %110 = add nsw i32 %108, %109
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %111) #3
  store i32 %105, ptr %112, align 4, !tbaa !9
  %113 = load i32, ptr %10, align 4, !tbaa !9
  %114 = load i32, ptr %11, align 4, !tbaa !9
  %115 = sub nsw i32 %113, %114
  %116 = add nsw i32 %115, 998244353
  %117 = call noundef i32 @_Z1Mi(i32 noundef %116)
  %118 = load ptr, ptr %4, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.poly, ptr %118, i32 0, i32 0
  %120 = load i32, ptr %14, align 4, !tbaa !9
  %121 = load i32, ptr %9, align 4, !tbaa !9
  %122 = add nsw i32 %120, %121
  %123 = load i32, ptr %15, align 4, !tbaa !9
  %124 = add nsw i32 %122, %123
  %125 = sext i32 %124 to i64
  %126 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %119, i64 noundef %125) #3
  store i32 %117, ptr %126, align 4, !tbaa !9
  br label %127

127:                                              ; preds = %76
  %128 = load i32, ptr %15, align 4, !tbaa !9
  %129 = add nsw i32 %128, 1
  store i32 %129, ptr %15, align 4, !tbaa !9
  %130 = load i32, ptr %8, align 4, !tbaa !9
  %131 = sext i32 %130 to i64
  %132 = mul nsw i64 1, %131
  %133 = load i32, ptr %7, align 4, !tbaa !9
  %134 = sext i32 %133 to i64
  %135 = mul nsw i64 %132, %134
  %136 = srem i64 %135, 998244353
  %137 = trunc i64 %136 to i32
  store i32 %137, ptr %8, align 4, !tbaa !9
  br label %72, !llvm.loop !13

138:                                              ; preds = %72
  br label %139

139:                                              ; preds = %138
  %140 = load i32, ptr %12, align 4, !tbaa !9
  %141 = load i32, ptr %14, align 4, !tbaa !9
  %142 = add nsw i32 %141, %140
  store i32 %142, ptr %14, align 4, !tbaa !9
  br label %67, !llvm.loop !14

143:                                              ; preds = %67
  br label %144

144:                                              ; preds = %143
  %145 = load i32, ptr %9, align 4, !tbaa !9
  %146 = shl i32 %145, 1
  store i32 %146, ptr %9, align 4, !tbaa !9
  br label %47, !llvm.loop !15

147:                                              ; preds = %47
  %148 = load i32, ptr %5, align 4, !tbaa !9
  %149 = icmp eq i32 %148, -1
  br i1 %149, label %150, label %180

150:                                              ; preds = %147
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %151 = load i32, ptr %6, align 4, !tbaa !9
  %152 = call noundef i32 @_Z5mypowii(i32 noundef %151, i32 noundef 998244351)
  store i32 %152, ptr %16, align 4, !tbaa !9
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %153

153:                                              ; preds = %176, %150
  %154 = load i32, ptr %13, align 4, !tbaa !9
  %155 = load i32, ptr %6, align 4, !tbaa !9
  %156 = icmp slt i32 %154, %155
  br i1 %156, label %157, label %179

157:                                              ; preds = %153
  %158 = load i32, ptr %16, align 4, !tbaa !9
  %159 = sext i32 %158 to i64
  %160 = mul nsw i64 1, %159
  %161 = load ptr, ptr %4, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.poly, ptr %161, i32 0, i32 0
  %163 = load i32, ptr %13, align 4, !tbaa !9
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %162, i64 noundef %164) #3
  %166 = load i32, ptr %165, align 4, !tbaa !9
  %167 = sext i32 %166 to i64
  %168 = mul nsw i64 %160, %167
  %169 = srem i64 %168, 998244353
  %170 = trunc i64 %169 to i32
  %171 = load ptr, ptr %4, align 8, !tbaa !5
  %172 = getelementptr inbounds %struct.poly, ptr %171, i32 0, i32 0
  %173 = load i32, ptr %13, align 4, !tbaa !9
  %174 = sext i32 %173 to i64
  %175 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %172, i64 noundef %174) #3
  store i32 %170, ptr %175, align 4, !tbaa !9
  br label %176

176:                                              ; preds = %157
  %177 = load i32, ptr %13, align 4, !tbaa !9
  %178 = add nsw i32 %177, 1
  store i32 %178, ptr %13, align 4, !tbaa !9
  br label %153, !llvm.loop !16

179:                                              ; preds = %153
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %180

180:                                              ; preds = %179, %147
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@rv = external dso_local local_unnamed_addr global [3456912 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z1Mi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5mypowii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dftP4polyii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %2, 1
  br i1 %4, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %.lr.ph

.preheader60:                                     ; preds = %45
  br i1 %4, label %.lr.ph67, label %._crit_edge

.lr.ph67:                                         ; preds = %.preheader60
  %5 = icmp eq i32 %1, 1
  %6 = zext nneg i32 %2 to i64
  br label %.preheader.lr.ph.us

.preheader.lr.ph.us:                              ; preds = %..loopexit59_crit_edge.us, %.lr.ph67
  %.05666.us = phi i32 [ 1, %.lr.ph67 ], [ %10, %..loopexit59_crit_edge.us ]
  %7 = udiv i32 499122176, %.05666.us
  %8 = sub nuw nsw i32 998244352, %7
  %.sink = select i1 %5, i32 %7, i32 %8
  %9 = tail call noundef i32 @_Z5mypowii(i32 noundef 3, i32 noundef %.sink)
  %10 = shl i32 %.05666.us, 1
  %11 = icmp sgt i32 %.05666.us, 0
  %12 = sext i32 %9 to i64
  br i1 %11, label %.preheader.us.us.preheader, label %..loopexit59_crit_edge.us

.preheader.us.us.preheader:                       ; preds = %.preheader.lr.ph.us
  %13 = sext i32 %10 to i64
  %14 = zext nneg i32 %.05666.us to i64
  %wide.trip.count82 = zext nneg i32 %.05666.us to i64
  br label %.preheader.us.us

..loopexit59_crit_edge.us:                        ; preds = %._crit_edge.us.us, %.preheader.lr.ph.us
  %15 = icmp slt i32 %10, %2
  br i1 %15, label %.preheader.lr.ph.us, label %._crit_edge, !llvm.loop !5

.preheader.us.us:                                 ; preds = %.preheader.us.us.preheader, %._crit_edge.us.us
  %indvars.iv84 = phi i64 [ 0, %.preheader.us.us.preheader ], [ %indvars.iv.next85, %._crit_edge.us.us ]
  %16 = add nsw i64 %indvars.iv84, %14
  br label %17

17:                                               ; preds = %17, %.preheader.us.us
  %indvars.iv79 = phi i64 [ %indvars.iv.next80, %17 ], [ 0, %.preheader.us.us ]
  %.063.us.us = phi i64 [ %36, %17 ], [ 1, %.preheader.us.us ]
  %18 = add nsw i64 %indvars.iv79, %indvars.iv84
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  %20 = load i32, ptr %19, align 4, !tbaa !7
  %21 = add nsw i64 %16, %indvars.iv79
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %23 = load i32, ptr %22, align 4, !tbaa !7
  %24 = sext i32 %23 to i64
  %25 = mul nsw i64 %.063.us.us, %24
  %26 = srem i64 %25, 998244353
  %27 = trunc nsw i64 %26 to i32
  %28 = add nsw i32 %20, %27
  %29 = tail call noundef i32 @_Z1Mi(i32 noundef %28)
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  store i32 %29, ptr %30, align 4, !tbaa !7
  %31 = add i32 %20, 998244353
  %32 = sub i32 %31, %27
  %33 = tail call noundef i32 @_Z1Mi(i32 noundef %32)
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  store i32 %33, ptr %34, align 4, !tbaa !7
  %indvars.iv.next80 = add nuw nsw i64 %indvars.iv79, 1
  %35 = mul nsw i64 %.063.us.us, %12
  %36 = srem i64 %35, 998244353
  %exitcond83.not = icmp eq i64 %indvars.iv.next80, %wide.trip.count82
  br i1 %exitcond83.not, label %._crit_edge.us.us, label %17, !llvm.loop !11

._crit_edge.us.us:                                ; preds = %17
  %indvars.iv.next85 = add nsw i64 %indvars.iv84, %13
  %37 = icmp slt i64 %indvars.iv.next85, %6
  br i1 %37, label %.preheader.us.us, label %..loopexit59_crit_edge.us, !llvm.loop !12

.lr.ph:                                           ; preds = %.lr.ph.preheader, %45
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next, %45 ]
  %38 = getelementptr inbounds [3456912 x i32], ptr @rv, i64 0, i64 %indvars.iv
  %39 = load i32, ptr %38, align 4, !tbaa !7
  %40 = sext i32 %39 to i64
  %41 = icmp slt i64 %indvars.iv, %40
  br i1 %41, label %42, label %45

42:                                               ; preds = %.lr.ph
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %40) #2
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %43, ptr noundef nonnull align 4 dereferenceable(4) %44) #2
  br label %45

45:                                               ; preds = %.lr.ph, %42
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader60, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %..loopexit59_crit_edge.us, %3, %.preheader60
  %46 = icmp eq i32 %1, -1
  br i1 %46, label %47, label %.loopexit

47:                                               ; preds = %._crit_edge
  %48 = tail call noundef i32 @_Z5mypowii(i32 noundef %2, i32 noundef 998244351)
  %49 = icmp sgt i32 %2, 0
  br i1 %49, label %.lr.ph76, label %.loopexit

.lr.ph76:                                         ; preds = %47
  %50 = sext i32 %48 to i64
  %wide.trip.count90 = zext nneg i32 %2 to i64
  br label %51

51:                                               ; preds = %.lr.ph76, %51
  %indvars.iv87 = phi i64 [ 0, %.lr.ph76 ], [ %indvars.iv.next88, %51 ]
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv87) #2
  %53 = load i32, ptr %52, align 4, !tbaa !7
  %54 = sext i32 %53 to i64
  %55 = mul nsw i64 %54, %50
  %56 = srem i64 %55, 998244353
  %57 = trunc nsw i64 %56 to i32
  %58 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv87) #2
  store i32 %57, ptr %58, align 4, !tbaa !7
  %indvars.iv.next88 = add nuw nsw i64 %indvars.iv87, 1
  %exitcond91.not = icmp eq i64 %indvars.iv.next88, %wide.trip.count90
  br i1 %exitcond91.not, label %.loopexit, label %51, !llvm.loop !14

.loopexit:                                        ; preds = %51, %47, %._crit_edge
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6}
!14 = distinct !{!14, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass