; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/edge-impulse-sdk/CMSIS/NN/Source/NNSupportFunctions (offset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_q7_to_q15_with_offset(ptr noundef %0, ptr noundef %1, i32 noundef %2, i16 noundef signext %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i16 %3, ptr %8, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %10 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %10, ptr %9, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %14, %4
  %12 = load i32, ptr %9, align 4, !tbaa !9
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %14, label %28

14:                                               ; preds = %11
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %15, i32 1
  store ptr %16, ptr %5, align 8, !tbaa !5
  %17 = load i8, ptr %15, align 1, !tbaa !13
  %18 = sext i8 %17 to i16
  %19 = sext i16 %18 to i32
  %20 = load i16, ptr %8, align 2, !tbaa !11
  %21 = sext i16 %20 to i32
  %22 = add nsw i32 %19, %21
  %23 = trunc i32 %22 to i16
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds i16, ptr %24, i32 1
  store ptr %25, ptr %6, align 8, !tbaa !5
  store i16 %23, ptr %24, align 2, !tbaa !11
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = add nsw i32 %26, -1
  store i32 %27, ptr %9, align 4, !tbaa !9
  br label %11, !llvm.loop !14

28:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @arm_q7_to_q15_with_offset(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i16 noundef signext %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %2, 0
  br i1 %5, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %6 = zext nneg i32 %2 to i64
  %min.iters.check = icmp ult i32 %2, 16
  br i1 %min.iters.check, label %.lr.ph.preheader19, label %vector.memcheck

vector.memcheck:                                  ; preds = %.lr.ph.preheader
  %7 = add nsw i32 %2, -1
  %8 = zext i32 %7 to i64
  %9 = shl nuw nsw i64 %8, 1
  %10 = getelementptr i8, ptr %1, i64 %9
  %scevgep = getelementptr i8, ptr %10, i64 2
  %11 = zext nneg i32 %2 to i64
  %scevgep10 = getelementptr i8, ptr %0, i64 %11
  %bound0 = icmp ugt ptr %scevgep10, %1
  %bound1 = icmp ugt ptr %scevgep, %0
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph.preheader19, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %6, 2147483632
  %.cast = trunc nuw nsw i64 %n.vec to i32
  %ind.end = sub nsw i32 %2, %.cast
  %ind.end11 = getelementptr i8, ptr %0, i64 %n.vec
  %12 = shl nuw nsw i64 %n.vec, 1
  %ind.end13 = getelementptr i8, ptr %1, i64 %12
  %broadcast.splatinsert = insertelement <8 x i16> poison, i16 %3, i64 0
  %broadcast.splat = shufflevector <8 x i16> %broadcast.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %next.gep = getelementptr i8, ptr %0, i64 %index
  %offset.idx = shl i64 %index, 1
  %next.gep16 = getelementptr i8, ptr %1, i64 %offset.idx
  %13 = getelementptr i8, ptr %next.gep, i64 8
  %wide.load = load <8 x i8>, ptr %next.gep, align 1, !tbaa !5, !alias.scope !8
  %wide.load18 = load <8 x i8>, ptr %13, align 1, !tbaa !5, !alias.scope !8
  %14 = sext <8 x i8> %wide.load to <8 x i16>
  %15 = sext <8 x i8> %wide.load18 to <8 x i16>
  %16 = add <8 x i16> %broadcast.splat, %14
  %17 = add <8 x i16> %broadcast.splat, %15
  %18 = getelementptr i8, ptr %next.gep16, i64 16
  store <8 x i16> %16, ptr %next.gep16, align 2, !tbaa !11, !alias.scope !13, !noalias !8
  store <8 x i16> %17, ptr %18, align 2, !tbaa !11, !alias.scope !13, !noalias !8
  %index.next = add nuw i64 %index, 16
  %19 = icmp eq i64 %index.next, %n.vec
  br i1 %19, label %middle.block, label %vector.body, !llvm.loop !15

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %6
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader19

.lr.ph.preheader19:                               ; preds = %middle.block, %vector.memcheck, %.lr.ph.preheader
  %.09.ph = phi i32 [ %2, %vector.memcheck ], [ %2, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.058.ph = phi ptr [ %0, %vector.memcheck ], [ %0, %.lr.ph.preheader ], [ %ind.end11, %middle.block ]
  %.067.ph = phi ptr [ %1, %vector.memcheck ], [ %1, %.lr.ph.preheader ], [ %ind.end13, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader19, %.lr.ph
  %.09 = phi i32 [ %25, %.lr.ph ], [ %.09.ph, %.lr.ph.preheader19 ]
  %.058 = phi ptr [ %20, %.lr.ph ], [ %.058.ph, %.lr.ph.preheader19 ]
  %.067 = phi ptr [ %24, %.lr.ph ], [ %.067.ph, %.lr.ph.preheader19 ]
  %20 = getelementptr inbounds i8, ptr %.058, i64 1
  %21 = load i8, ptr %.058, align 1, !tbaa !5
  %22 = sext i8 %21 to i16
  %23 = add i16 %22, %3
  %24 = getelementptr inbounds i8, ptr %.067, i64 2
  store i16 %23, ptr %.067, align 2, !tbaa !11
  %25 = add nsw i32 %.09, -1
  %26 = icmp ugt i32 %.09, 1
  br i1 %26, label %.lr.ph, label %._crit_edge, !llvm.loop !19

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %4
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9}
!9 = distinct !{!9, !10}
!10 = distinct !{!10, !"LVerDomain"}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !6, i64 0}
!13 = !{!14}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !16, !17, !18}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!"llvm.loop.isvectorized", i32 1}
!18 = !{!"llvm.loop.unroll.runtime.disable"}
!19 = distinct !{!19, !16, !17}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass