; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (SetDeviceAddress)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CEC_HandleTypeDef = type { ptr, %struct.CEC_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32 }
%struct.CEC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i16, ptr }
%struct.CEC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CEC_SetDeviceAddress(ptr noundef %0, i16 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  %6 = load ptr, ptr %4, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %6, i32 0, i32 6
  %8 = load i32, ptr %7, align 8, !tbaa !11
  %9 = icmp eq i32 %8, 32
  br i1 %9, label %10, label %76

10:                                               ; preds = %2
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %11, i32 0, i32 7
  %13 = load i32, ptr %12, align 4, !tbaa !15
  %14 = icmp eq i32 %13, 32
  br i1 %14, label %15, label %76

15:                                               ; preds = %10
  br label %16

16:                                               ; preds = %15
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %17, i32 0, i32 5
  %19 = load i32, ptr %18, align 4, !tbaa !16
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 2, ptr %3, align 4
  br label %77

22:                                               ; preds = %16
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %23, i32 0, i32 5
  store i32 1, ptr %24, align 4, !tbaa !16
  br label %25

25:                                               ; preds = %22
  br label %26

26:                                               ; preds = %25
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %27, i32 0, i32 6
  store i32 36, ptr %28, align 8, !tbaa !11
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !17
  %32 = getelementptr inbounds %struct.CEC_TypeDef, ptr %31, i32 0, i32 0
  %33 = load volatile i32, ptr %32, align 4, !tbaa !18
  %34 = zext i32 %33 to i64
  %35 = and i64 %34, -2
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr %32, align 4, !tbaa !18
  %37 = load i16, ptr %5, align 2, !tbaa !9
  %38 = zext i16 %37 to i32
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %50

40:                                               ; preds = %26
  %41 = load i16, ptr %5, align 2, !tbaa !9
  %42 = zext i16 %41 to i32
  %43 = shl i32 %42, 16
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %44, i32 0, i32 0
  %46 = load ptr, ptr %45, align 8, !tbaa !17
  %47 = getelementptr inbounds %struct.CEC_TypeDef, ptr %46, i32 0, i32 1
  %48 = load volatile i32, ptr %47, align 4, !tbaa !20
  %49 = or i32 %48, %43
  store volatile i32 %49, ptr %47, align 4, !tbaa !20
  br label %59

50:                                               ; preds = %26
  %51 = load ptr, ptr %4, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %51, i32 0, i32 0
  %53 = load ptr, ptr %52, align 8, !tbaa !17
  %54 = getelementptr inbounds %struct.CEC_TypeDef, ptr %53, i32 0, i32 1
  %55 = load volatile i32, ptr %54, align 4, !tbaa !20
  %56 = zext i32 %55 to i64
  %57 = and i64 %56, -2147418113
  %58 = trunc i64 %57 to i32
  store volatile i32 %58, ptr %54, align 4, !tbaa !20
  br label %59

59:                                               ; preds = %50, %40
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %60, i32 0, i32 6
  store i32 32, ptr %61, align 8, !tbaa !11
  %62 = load ptr, ptr %4, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %62, i32 0, i32 8
  store i32 0, ptr %63, align 8, !tbaa !21
  br label %64

64:                                               ; preds = %59
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %65, i32 0, i32 5
  store i32 0, ptr %66, align 4, !tbaa !16
  br label %67

67:                                               ; preds = %64
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.CEC_HandleTypeDef, ptr %68, i32 0, i32 0
  %70 = load ptr, ptr %69, align 8, !tbaa !17
  %71 = getelementptr inbounds %struct.CEC_TypeDef, ptr %70, i32 0, i32 0
  %72 = load volatile i32, ptr %71, align 4, !tbaa !18
  %73 = zext i32 %72 to i64
  %74 = or i64 %73, 1
  %75 = trunc i64 %74 to i32
  store volatile i32 %75, ptr %71, align 4, !tbaa !18
  store i32 0, ptr %3, align 4
  br label %77

76:                                               ; preds = %10, %2
  store i32 2, ptr %3, align 4
  br label %77

77:                                               ; preds = %76, %67, %21
  %78 = load i32, ptr %3, align 4
  ret i32 %78
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !14, i64 72}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 56, !10, i64 64, !10, i64 66, !14, i64 68, !14, i64 72, !14, i64 76, !14, i64 80}
!13 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !10, i64 32, !6, i64 40}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !14, i64 76}
!16 = !{!12, !14, i64 68}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !14, i64 0}
!19 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20}
!20 = !{!19, !14, i64 4}
!21 = !{!12, !14, i64 80}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_CEC_SetDeviceAddress(ptr nocapture noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 72
  %4 = load i32, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i32 %4, 32
  br i1 %5, label %6, label %32

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 76
  %8 = load i32, ptr %7, align 4, !tbaa !13
  %9 = icmp eq i32 %8, 32
  br i1 %9, label %10, label %32

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %0, i64 68
  %12 = load i32, ptr %11, align 4, !tbaa !14
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %32, label %14

14:                                               ; preds = %10
  %15 = load ptr, ptr %0, align 8, !tbaa !15
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = and i32 %16, -2
  store volatile i32 %17, ptr %15, align 4, !tbaa !16
  %.not = icmp eq i16 %1, 0
  br i1 %.not, label %24, label %18

18:                                               ; preds = %14
  %19 = zext i16 %1 to i32
  %20 = shl nuw i32 %19, 16
  %21 = getelementptr inbounds i8, ptr %15, i64 4
  %22 = load volatile i32, ptr %21, align 4, !tbaa !18
  %23 = or i32 %22, %20
  store volatile i32 %23, ptr %21, align 4, !tbaa !18
  br label %28

24:                                               ; preds = %14
  %25 = getelementptr inbounds i8, ptr %15, i64 4
  %26 = load volatile i32, ptr %25, align 4, !tbaa !18
  %27 = and i32 %26, -2147418113
  store volatile i32 %27, ptr %25, align 4, !tbaa !18
  br label %28

28:                                               ; preds = %24, %18
  store i32 32, ptr %3, align 8, !tbaa !5
  %29 = getelementptr inbounds i8, ptr %0, i64 80
  store i32 0, ptr %29, align 8, !tbaa !19
  store i32 0, ptr %11, align 4, !tbaa !14
  %30 = load volatile i32, ptr %15, align 4, !tbaa !16
  %31 = or i32 %30, 1
  store volatile i32 %31, ptr %15, align 4, !tbaa !16
  br label %32

32:                                               ; preds = %2, %6, %10, %28
  %.0 = phi i32 [ 0, %28 ], [ 2, %10 ], [ 2, %6 ], [ 2, %2 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 72}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !12, i64 32, !7, i64 40}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 76}
!14 = !{!6, !11, i64 68}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!18 = !{!17, !11, i64 4}
!19 = !{!6, !11, i64 80}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass