; LLVM IR from lzyrapx/Competitive-Programming :: LibreOJ/6165（线性筛）.ll (Z5Sievei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@prime = external dso_local global [6000005 x i64], align 16
@vis = external dso_local global [100000005 x i8], align 16
@cnt = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5Sievei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 2, ptr %3, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %67, %1
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = icmp sle i32 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %70

11:                                               ; preds = %6
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [100000005 x i8], ptr @vis, i64 0, i64 %13
  %15 = load i8, ptr %14, align 1, !tbaa !9, !range !11, !noundef !12
  %16 = trunc i8 %15 to i1
  br i1 %16, label %23, label %17

17:                                               ; preds = %11
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = load i64, ptr @cnt, align 8, !tbaa !13
  %21 = add nsw i64 %20, 1
  store i64 %21, ptr @cnt, align 8, !tbaa !13
  %22 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %21
  store i64 %19, ptr %22, align 8, !tbaa !13
  br label %23

23:                                               ; preds = %17, %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %62, %23
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = load i64, ptr @cnt, align 8, !tbaa !13
  %28 = icmp sle i64 %26, %27
  br i1 %28, label %29, label %40

29:                                               ; preds = %24
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %33
  %35 = load i64, ptr %34, align 8, !tbaa !13
  %36 = mul nsw i64 %31, %35
  %37 = load i32, ptr %2, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = icmp sle i64 %36, %38
  br label %40

40:                                               ; preds = %29, %24
  %41 = phi i1 [ false, %24 ], [ %39, %29 ]
  br i1 %41, label %43, label %42

42:                                               ; preds = %40
  store i32 5, ptr %4, align 4
  br label %65

43:                                               ; preds = %40
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %47
  %49 = load i64, ptr %48, align 8, !tbaa !13
  %50 = mul nsw i64 %45, %49
  %51 = getelementptr inbounds [100000005 x i8], ptr @vis, i64 0, i64 %50
  store i8 1, ptr %51, align 1, !tbaa !9
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %55
  %57 = load i64, ptr %56, align 8, !tbaa !13
  %58 = srem i64 %53, %57
  %59 = icmp eq i64 %58, 0
  br i1 %59, label %60, label %61

60:                                               ; preds = %43
  store i32 5, ptr %4, align 4
  br label %65

61:                                               ; preds = %43
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %5, align 4, !tbaa !5
  br label %24, !llvm.loop !15

65:                                               ; preds = %60, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %66

66:                                               ; preds = %65
  br label %67

67:                                               ; preds = %66
  %68 = load i32, ptr %3, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %3, align 4, !tbaa !5
  br label %6, !llvm.loop !17

70:                                               ; preds = %10
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"long long", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@prime = external dso_local local_unnamed_addr global [6000005 x i64], align 16
@vis = external dso_local local_unnamed_addr global [100000005 x i8], align 16
@cnt = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z5Sievei(i32 noundef %0) local_unnamed_addr #0 {
  %.not24 = icmp slt i32 %0, 2
  br i1 %.not24, label %._crit_edge, label %.lr.ph26

.lr.ph26:                                         ; preds = %1
  %cnt.promoted = load i64, ptr @cnt, align 8, !tbaa !5
  %2 = zext nneg i32 %0 to i64
  %3 = add nuw i32 %0, 1
  %wide.trip.count = zext i32 %3 to i64
  br label %4

._crit_edge:                                      ; preds = %.critedge, %1
  ret void

4:                                                ; preds = %.lr.ph26, %.critedge
  %indvars.iv28 = phi i64 [ 2, %.lr.ph26 ], [ %indvars.iv.next29, %.critedge ]
  %5 = phi i64 [ %cnt.promoted, %.lr.ph26 ], [ %13, %.critedge ]
  %6 = getelementptr inbounds [100000005 x i8], ptr @vis, i64 0, i64 %indvars.iv28
  %7 = load i8, ptr %6, align 1, !tbaa !9, !range !11, !noundef !12
  %8 = trunc nuw i8 %7 to i1
  br i1 %8, label %12, label %9

9:                                                ; preds = %4
  %10 = add nsw i64 %5, 1
  store i64 %10, ptr @cnt, align 8, !tbaa !5
  %11 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %10
  store i64 %indvars.iv28, ptr %11, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %9, %4
  %13 = phi i64 [ %10, %9 ], [ %5, %4 ]
  %.not1820 = icmp slt i64 %13, 1
  br i1 %.not1820, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %12, %17
  %indvars.iv = phi i64 [ %indvars.iv.next, %17 ], [ 1, %12 ]
  %14 = getelementptr inbounds [6000005 x i64], ptr @prime, i64 0, i64 %indvars.iv
  %15 = load i64, ptr %14, align 8, !tbaa !5
  %16 = mul nsw i64 %15, %indvars.iv28
  %.not19 = icmp sgt i64 %16, %2
  br i1 %.not19, label %.critedge, label %17

17:                                               ; preds = %.lr.ph
  %18 = getelementptr inbounds [100000005 x i8], ptr @vis, i64 0, i64 %16
  store i8 1, ptr %18, align 1, !tbaa !9
  %19 = srem i64 %indvars.iv28, %15
  %20 = icmp eq i64 %19, 0
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not18 = icmp sle i64 %13, %indvars.iv
  %or.cond = or i1 %20, %.not18
  br i1 %or.cond, label %.critedge, label %.lr.ph, !llvm.loop !13

.critedge:                                        ; preds = %.lr.ph, %17, %12
  %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next29, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %4, !llvm.loop !15
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass