; LLVM IR from artfulbytes/bots2d :: src/controllers/components (Microcontroller)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Microcontroller = type <{ %class.ControllerComponent, %"struct.std::array", %"class.std::thread", %"struct.std::atomic", i8, i8, [5 x i8], %"class.std::mutex", [16 x float], %"class.std::condition_variable", i32, i32, %"class.std::mutex", float, [4 x i8] }>
%class.ControllerComponent = type { %class.Component }
%class.Component = type { ptr }
%"struct.std::array" = type { [16 x %"struct.Microcontroller::VoltageLine"] }
%"struct.Microcontroller::VoltageLine" = type { i32, ptr }
%"class.std::thread" = type { %"class.std::thread::id" }
%"class.std::thread::id" = type { i64 }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i8 }
%"class.std::condition_variable" = type { %"class.std::__condvar" }
%"class.std::__condvar" = type { %union.pthread_cond_t }
%union.pthread_cond_t = type { %struct.__pthread_cond_s }
%struct.__pthread_cond_s = type { %union.__atomic_wide_counter, %union.__atomic_wide_counter, [2 x i32], [2 x i32], i32, i32, [2 x i32] }
%union.__atomic_wide_counter = type { i64 }
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }

@_ZTV15Microcontroller = external dso_local unnamed_addr constant { [9 x ptr] }, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN15MicrocontrollerC2ERSt5arrayINS_11VoltageLineELm16EE(ptr noundef nonnull align 8 dereferenceable(484) %0, ptr noundef nonnull align 8 dereferenceable(256) %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8
  call void @_ZN19ControllerComponentC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  store ptr getelementptr inbounds inrange(-16, 56) ({ [9 x ptr] }, ptr @_ZTV15Microcontroller, i32 0, i32 0, i32 2), ptr %5, align 8, !tbaa !9
  %6 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 1
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %6, ptr align 8 %7, i64 256, i1 false), !tbaa.struct !11
  %8 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 2
  call void @_ZNSt6threadC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %8) #4
  %9 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 3
  call void @_ZNSt6atomicIbEC2Eb(ptr noundef nonnull align 1 dereferenceable(1) %9, i1 noundef zeroext true) #4
  %10 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 4
  store i8 0, ptr %10, align 1, !tbaa !13
  %11 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 5
  store i8 0, ptr %11, align 2, !tbaa !30
  %12 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 7
  call void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %12) #4
  %13 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 8
  store float 0.000000e+00, ptr %13, align 4, !tbaa !31
  %14 = getelementptr inbounds float, ptr %13, i64 1
  %15 = getelementptr inbounds float, ptr %13, i64 16
  br label %16

16:                                               ; preds = %16, %2
  %17 = phi ptr [ %14, %2 ], [ %18, %16 ]
  store float 0.000000e+00, ptr %17, align 4, !tbaa !31
  %18 = getelementptr inbounds float, ptr %17, i64 1
  %19 = icmp eq ptr %18, %15
  br i1 %19, label %20, label %16

20:                                               ; preds = %16
  %21 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 9
  call void @_ZNSt18condition_variableC1Ev(ptr noundef nonnull align 8 dereferenceable(48) %21) #4
  %22 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 10
  store i32 0, ptr %22, align 8, !tbaa !32
  %23 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 11
  store i32 0, ptr %23, align 4, !tbaa !33
  %24 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 12
  call void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %24) #4
  %25 = getelementptr inbounds %class.Microcontroller, ptr %5, i32 0, i32 13
  store float 0.000000e+00, ptr %25, align 8, !tbaa !34
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN19ControllerComponentC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6threadC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6atomicIbEC2Eb(ptr noundef nonnull align 1 dereferenceable(1), i1 noundef zeroext) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZNSt18condition_variableC1Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{i64 0, i64 256, !12}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !23, i64 273}
!14 = !{!"_ZTS15Microcontroller", !15, i64 0, !17, i64 8, !18, i64 264, !21, i64 272, !23, i64 273, !23, i64 274, !24, i64 280, !7, i64 320, !26, i64 384, !28, i64 432, !28, i64 436, !24, i64 440, !29, i64 480}
!15 = !{!"_ZTS19ControllerComponent", !16, i64 0}
!16 = !{!"_ZTS9Component"}
!17 = !{!"_ZTSSt5arrayIN15Microcontroller11VoltageLineELm16EE", !7, i64 0}
!18 = !{!"_ZTSSt6thread", !19, i64 0}
!19 = !{!"_ZTSNSt6thread2idE", !20, i64 0}
!20 = !{!"long", !7, i64 0}
!21 = !{!"_ZTSSt6atomicIbE", !22, i64 0}
!22 = !{!"_ZTSSt13__atomic_baseIbE", !23, i64 0}
!23 = !{!"bool", !7, i64 0}
!24 = !{!"_ZTSSt5mutex", !25, i64 0}
!25 = !{!"_ZTSSt12__mutex_base", !7, i64 0}
!26 = !{!"_ZTSSt18condition_variable", !27, i64 0}
!27 = !{!"_ZTSSt9__condvar", !7, i64 0}
!28 = !{!"int", !7, i64 0}
!29 = !{!"float", !7, i64 0}
!30 = !{!14, !23, i64 274}
!31 = !{!29, !29, i64 0}
!32 = !{!14, !28, i64 432}
!33 = !{!14, !28, i64 436}
!34 = !{!14, !29, i64 480}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV15Microcontroller = external dso_local unnamed_addr constant { [9 x ptr] }, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN15MicrocontrollerC2ERSt5arrayINS_11VoltageLineELm16EE(ptr noundef nonnull align 8 dereferenceable(484) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(256) %1) unnamed_addr #0 align 2 {
  tail call void @_ZN19ControllerComponentC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #5
  store ptr getelementptr inbounds inrange(-16, 56) (i8, ptr @_ZTV15Microcontroller, i64 16), ptr %0, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(256) %3, ptr noundef nonnull align 8 dereferenceable(256) %1, i64 256, i1 false), !tbaa.struct !8
  %4 = getelementptr inbounds i8, ptr %0, i64 264
  tail call void @_ZNSt6threadC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %4) #5
  %5 = getelementptr inbounds i8, ptr %0, i64 272
  tail call void @_ZNSt6atomicIbEC2Eb(ptr noundef nonnull align 1 dereferenceable(1) %5, i1 noundef zeroext true) #5
  %6 = getelementptr inbounds i8, ptr %0, i64 273
  store i8 0, ptr %6, align 1, !tbaa !11
  %7 = getelementptr inbounds i8, ptr %0, i64 274
  store i8 0, ptr %7, align 2, !tbaa !28
  %8 = getelementptr inbounds i8, ptr %0, i64 280
  tail call void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %8) #5
  %9 = getelementptr inbounds i8, ptr %0, i64 320
  %10 = getelementptr inbounds i8, ptr %0, i64 384
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(64) %9, i8 0, i64 64, i1 false)
  tail call void @_ZNSt18condition_variableC1Ev(ptr noundef nonnull align 8 dereferenceable(48) %10) #5
  %11 = getelementptr inbounds i8, ptr %0, i64 432
  store i32 0, ptr %11, align 8, !tbaa !29
  %12 = getelementptr inbounds i8, ptr %0, i64 436
  store i32 0, ptr %12, align 4, !tbaa !30
  %13 = getelementptr inbounds i8, ptr %0, i64 440
  tail call void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %13) #5
  %14 = getelementptr inbounds i8, ptr %0, i64 480
  store float 0.000000e+00, ptr %14, align 8, !tbaa !31
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN19ControllerComponentC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6threadC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6atomicIbEC2Eb(ptr noundef nonnull align 1 dereferenceable(1), i1 noundef zeroext) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt5mutexC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZNSt18condition_variableC1Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{i64 0, i64 256, !9}
!9 = !{!10, !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = !{!12, !21, i64 273}
!12 = !{!"_ZTS15Microcontroller", !13, i64 0, !15, i64 8, !16, i64 264, !19, i64 272, !21, i64 273, !21, i64 274, !22, i64 280, !10, i64 320, !24, i64 384, !26, i64 432, !26, i64 436, !22, i64 440, !27, i64 480}
!13 = !{!"_ZTS19ControllerComponent", !14, i64 0}
!14 = !{!"_ZTS9Component"}
!15 = !{!"_ZTSSt5arrayIN15Microcontroller11VoltageLineELm16EE", !10, i64 0}
!16 = !{!"_ZTSSt6thread", !17, i64 0}
!17 = !{!"_ZTSNSt6thread2idE", !18, i64 0}
!18 = !{!"long", !10, i64 0}
!19 = !{!"_ZTSSt6atomicIbE", !20, i64 0}
!20 = !{!"_ZTSSt13__atomic_baseIbE", !21, i64 0}
!21 = !{!"bool", !10, i64 0}
!22 = !{!"_ZTSSt5mutex", !23, i64 0}
!23 = !{!"_ZTSSt12__mutex_base", !10, i64 0}
!24 = !{!"_ZTSSt18condition_variable", !25, i64 0}
!25 = !{!"_ZTSSt9__condvar", !10, i64 0}
!26 = !{!"int", !10, i64 0}
!27 = !{!"float", !10, i64 0}
!28 = !{!12, !21, i64 274}
!29 = !{!12, !26, i64 432}
!30 = !{!12, !26, i64 436}
!31 = !{!12, !27, i64 480}


; Effective O3 passes: GVNPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopIdiomRecognizePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass