; LLVM IR from plainNet/plainNet :: src/IntelHexParser.ll (ZN4kvpr5proto14IntelHexParser18getByteFromHexCharEh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i8 @_ZN4kvpr5proto14IntelHexParser18getByteFromHexCharEh(ptr noundef nonnull align 8 dereferenceable(72) %0, i8 noundef zeroext %1) #0 align 2 {
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %6 = load ptr, ptr %4, align 8
  %7 = load i8, ptr %5, align 1, !tbaa !9
  %8 = zext i8 %7 to i32
  %9 = icmp sge i32 %8, 48
  br i1 %9, label %10, label %19

10:                                               ; preds = %2
  %11 = load i8, ptr %5, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = icmp sle i32 %12, 57
  br i1 %13, label %14, label %19

14:                                               ; preds = %10
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = sub nsw i32 %16, 48
  %18 = trunc i32 %17 to i8
  store i8 %18, ptr %3, align 1
  br label %50

19:                                               ; preds = %10, %2
  %20 = load i8, ptr %5, align 1, !tbaa !9
  %21 = zext i8 %20 to i32
  %22 = icmp sge i32 %21, 65
  br i1 %22, label %23, label %33

23:                                               ; preds = %19
  %24 = load i8, ptr %5, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = icmp sle i32 %25, 70
  br i1 %26, label %27, label %33

27:                                               ; preds = %23
  %28 = load i8, ptr %5, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = sub nsw i32 %29, 65
  %31 = add nsw i32 %30, 10
  %32 = trunc i32 %31 to i8
  store i8 %32, ptr %3, align 1
  br label %50

33:                                               ; preds = %23, %19
  %34 = load i8, ptr %5, align 1, !tbaa !9
  %35 = zext i8 %34 to i32
  %36 = icmp sge i32 %35, 97
  br i1 %36, label %37, label %47

37:                                               ; preds = %33
  %38 = load i8, ptr %5, align 1, !tbaa !9
  %39 = zext i8 %38 to i32
  %40 = icmp sle i32 %39, 102
  br i1 %40, label %41, label %47

41:                                               ; preds = %37
  %42 = load i8, ptr %5, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  %44 = sub nsw i32 %43, 97
  %45 = add nsw i32 %44, 10
  %46 = trunc i32 %45 to i8
  store i8 %46, ptr %3, align 1
  br label %50

47:                                               ; preds = %37, %33
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  store i8 0, ptr %3, align 1
  br label %50

50:                                               ; preds = %49, %41, %27, %14
  %51 = load i8, ptr %3, align 1
  ret i8 %51
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef zeroext range(i8 0, 16) i8 @_ZN4kvpr5proto14IntelHexParser18getByteFromHexCharEh(ptr nocapture noundef nonnull readnone align 8 dereferenceable(72) %0, i8 noundef zeroext %1) local_unnamed_addr #0 align 2 {
  %3 = add i8 %1, -48
  %or.cond = icmp ult i8 %3, 10
  br i1 %or.cond, label %11, label %4

4:                                                ; preds = %2
  %5 = add i8 %1, -65
  %or.cond5 = icmp ult i8 %5, 6
  br i1 %or.cond5, label %6, label %8

6:                                                ; preds = %4
  %7 = add nsw i8 %1, -55
  br label %11

8:                                                ; preds = %4
  %9 = add i8 %1, -97
  %or.cond8 = icmp ult i8 %9, 6
  %10 = add nsw i8 %1, -87
  %spec.select = select i1 %or.cond8, i8 %10, i8 0
  br label %11

11:                                               ; preds = %2, %8, %6
  %.0 = phi i8 [ %7, %6 ], [ %spec.select, %8 ], [ %3, %2 ]
  ret i8 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass