; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/5726.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@tr = external dso_local global [400028 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = load i32, ptr %9, align 4, !tbaa !5
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %17, label %26

17:                                               ; preds = %5
  %18 = load i32, ptr %10, align 4, !tbaa !5
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = icmp sle i32 %18, %19
  br i1 %20, label %21, label %26

21:                                               ; preds = %17
  %22 = load i32, ptr %11, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [400028 x i32], ptr @tr, i64 0, i64 %23
  %25 = load i32, ptr %24, align 4, !tbaa !5
  store i32 %25, ptr %6, align 4
  br label %75

26:                                               ; preds = %17, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = load i32, ptr %10, align 4, !tbaa !5
  %29 = add nsw i32 %27, %28
  %30 = ashr i32 %29, 1
  store i32 %30, ptr %12, align 4, !tbaa !5
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %12, align 4, !tbaa !5
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %34, label %42

34:                                               ; preds = %26
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = load i32, ptr %11, align 4, !tbaa !5
  %40 = shl i32 %39, 1
  %41 = call noundef i32 @_Z5queryiiiii(i32 noundef %35, i32 noundef %36, i32 noundef %37, i32 noundef %38, i32 noundef %40)
  store i32 %41, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %74

42:                                               ; preds = %26
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = load i32, ptr %12, align 4, !tbaa !5
  %45 = icmp sgt i32 %43, %44
  br i1 %45, label %46, label %56

46:                                               ; preds = %42
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = load i32, ptr %12, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  %51 = load i32, ptr %10, align 4, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = shl i32 %52, 1
  %54 = or i32 %53, 1
  %55 = call noundef i32 @_Z5queryiiiii(i32 noundef %47, i32 noundef %48, i32 noundef %50, i32 noundef %51, i32 noundef %54)
  store i32 %55, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %74

56:                                               ; preds = %42
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load i32, ptr %9, align 4, !tbaa !5
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = load i32, ptr %11, align 4, !tbaa !5
  %62 = shl i32 %61, 1
  %63 = call noundef i32 @_Z5queryiiiii(i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %60, i32 noundef %62)
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr %12, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = load i32, ptr %11, align 4, !tbaa !5
  %70 = shl i32 %69, 1
  %71 = or i32 %70, 1
  %72 = call noundef i32 @_Z5queryiiiii(i32 noundef %64, i32 noundef %65, i32 noundef %67, i32 noundef %68, i32 noundef %71)
  %73 = call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %63, i32 noundef %72)
  store i32 %73, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %74

74:                                               ; preds = %56, %46, %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %75

75:                                               ; preds = %74, %21
  %76 = load i32, ptr %6, align 4
  ret i32 %76
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@tr = external dso_local local_unnamed_addr global [400028 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %.not54 = icmp sgt i32 %0, %2
  %.not384755 = icmp sgt i32 %3, %1
  %or.cond4856 = or i1 %.not54, %.not384755
  br i1 %or.cond4856, label %.lr.ph, label %tailrecurse.outer._crit_edge

.lr.ph:                                           ; preds = %5, %tailrecurse.outer
  %.not60 = phi i1 [ %.not, %tailrecurse.outer ], [ %.not54, %5 ]
  %.tr43.ph59 = phi i32 [ %18, %tailrecurse.outer ], [ %4, %5 ]
  %.tr42.ph58 = phi i32 [ %.us-phi52, %tailrecurse.outer ], [ %3, %5 ]
  %.tr41.ph57 = phi i32 [ %16, %tailrecurse.outer ], [ %2, %5 ]
  br i1 %.not60, label %tailrecurse.us, label %.lr.ph.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr4350.us = phi i32 [ %8, %tailrecurse.us ], [ %.tr43.ph59, %.lr.ph ]
  %.tr4249.us = phi i32 [ %7, %tailrecurse.us ], [ %.tr42.ph58, %.lr.ph ]
  %6 = add i32 %.tr4249.us, %.tr41.ph57
  %7 = ashr i32 %6, 1
  %.not39.us = icmp slt i32 %7, %1
  %8 = shl i32 %.tr4350.us, 1
  br i1 %.not39.us, label %.split.us, label %tailrecurse.us

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %5
  %.tr43.lcssa = phi i32 [ %4, %5 ], [ %14, %tailrecurse ], [ %18, %tailrecurse.outer ]
  %9 = sext i32 %.tr43.lcssa to i64
  %10 = getelementptr inbounds [400028 x i32], ptr @tr, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  br label %common.ret125

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr4350 = phi i32 [ %14, %tailrecurse ], [ %.tr43.ph59, %.lr.ph ]
  %.tr4249 = phi i32 [ %13, %tailrecurse ], [ %.tr42.ph58, %.lr.ph ]
  %12 = add i32 %.tr4249, %.tr41.ph57
  %13 = ashr i32 %12, 1
  %.not39 = icmp slt i32 %13, %1
  br i1 %.not39, label %.split.us, label %tailrecurse

tailrecurse:                                      ; preds = %.lr.ph.split
  %14 = shl i32 %.tr4350, 1
  %.not38 = icmp sgt i32 %13, %1
  br i1 %.not38, label %.lr.ph.split, label %tailrecurse.outer._crit_edge

.split.us:                                        ; preds = %.lr.ph.split, %tailrecurse.us
  %.us-phi = phi i32 [ %7, %tailrecurse.us ], [ %13, %.lr.ph.split ]
  %.us-phi52 = phi i32 [ %.tr4249.us, %tailrecurse.us ], [ %.tr4249, %.lr.ph.split ]
  %.us-phi53 = phi i32 [ %.tr4350.us, %tailrecurse.us ], [ %.tr4350, %.lr.ph.split ]
  %15 = icmp slt i32 %.us-phi, %0
  br i1 %15, label %tailrecurse.outer, label %19

tailrecurse.outer:                                ; preds = %.split.us
  %16 = add nsw i32 %.us-phi, 1
  %17 = shl i32 %.us-phi53, 1
  %18 = or disjoint i32 %17, 1
  %.not = icmp slt i32 %16, %0
  %.not3847 = icmp sgt i32 %.us-phi52, %1
  %or.cond48 = or i1 %.not, %.not3847
  br i1 %or.cond48, label %.lr.ph, label %tailrecurse.outer._crit_edge

common.ret125:                                    ; preds = %19, %tailrecurse.outer._crit_edge
  %common.ret125.op = phi i32 [ %11, %tailrecurse.outer._crit_edge ], [ %25, %19 ]
  ret i32 %common.ret125.op

19:                                               ; preds = %.split.us
  %20 = shl i32 %.us-phi53, 1
  %21 = tail call noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %.tr41.ph57, i32 noundef %.us-phi, i32 noundef %20)
  %22 = add nsw i32 %.us-phi, 1
  %23 = or disjoint i32 %20, 1
  %24 = tail call noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %22, i32 noundef %.us-phi52, i32 noundef %23)
  %25 = tail call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %21, i32 noundef %24)
  br label %common.ret125
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass