; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SAI_HandleTypeDef = type { ptr, %struct.SAI_InitTypeDef, %struct.SAI_FrameInitTypeDef, %struct.SAI_SlotInitTypeDef, ptr, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SAI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.SAI_PdmInitTypeDef, i32, i32, i32, i32 }
%struct.SAI_PdmInitTypeDef = type { i32, i32, i32 }
%struct.SAI_FrameInitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.SAI_SlotInitTypeDef = type { i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SAI_Block_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_InterruptFlag(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SAI_Transmit_DMA(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %10 = call i32 @HAL_GetTick()
  store i32 %10, ptr %8, align 4, !tbaa !11
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %17, label %13

13:                                               ; preds = %3
  %14 = load i16, ptr %7, align 2, !tbaa !9
  %15 = zext i16 %14 to i32
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %13, %3
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

18:                                               ; preds = %13
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %19, i32 0, i32 12
  %21 = load volatile i32, ptr %20, align 4, !tbaa !13
  %22 = icmp eq i32 %21, 1
  br i1 %22, label %23, label %155

23:                                               ; preds = %18
  br label %24

24:                                               ; preds = %23
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %25, i32 0, i32 11
  %27 = load i32, ptr %26, align 8, !tbaa !19
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %30

29:                                               ; preds = %24
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

30:                                               ; preds = %24
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %31, i32 0, i32 11
  store i32 1, ptr %32, align 8, !tbaa !19
  br label %33

33:                                               ; preds = %30
  br label %34

34:                                               ; preds = %33
  br label %35

35:                                               ; preds = %34
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %37, i32 0, i32 4
  store ptr %36, ptr %38, align 8, !tbaa !20
  %39 = load i16, ptr %7, align 2, !tbaa !9
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %40, i32 0, i32 5
  store i16 %39, ptr %41, align 8, !tbaa !21
  %42 = load i16, ptr %7, align 2, !tbaa !9
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %43, i32 0, i32 6
  store i16 %42, ptr %44, align 2, !tbaa !22
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %45, i32 0, i32 13
  store volatile i32 0, ptr %46, align 8, !tbaa !23
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %47, i32 0, i32 12
  store volatile i32 18, ptr %48, align 4, !tbaa !13
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %49, i32 0, i32 7
  %51 = load ptr, ptr %50, align 8, !tbaa !24
  %52 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %51, i32 0, i32 6
  store ptr @SAI_DMATxHalfCplt, ptr %52, align 8, !tbaa !25
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %53, i32 0, i32 7
  %55 = load ptr, ptr %54, align 8, !tbaa !24
  %56 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %55, i32 0, i32 5
  store ptr @SAI_DMATxCplt, ptr %56, align 8, !tbaa !28
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %57, i32 0, i32 7
  %59 = load ptr, ptr %58, align 8, !tbaa !24
  %60 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %59, i32 0, i32 9
  store ptr @SAI_DMAError, ptr %60, align 8, !tbaa !29
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %61, i32 0, i32 7
  %63 = load ptr, ptr %62, align 8, !tbaa !24
  %64 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %63, i32 0, i32 10
  store ptr null, ptr %64, align 8, !tbaa !30
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %65, i32 0, i32 7
  %67 = load ptr, ptr %66, align 8, !tbaa !24
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %68, i32 0, i32 4
  %70 = load ptr, ptr %69, align 8, !tbaa !20
  %71 = ptrtoint ptr %70 to i32
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %72, i32 0, i32 0
  %74 = load ptr, ptr %73, align 8, !tbaa !31
  %75 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %74, i32 0, i32 7
  %76 = ptrtoint ptr %75 to i32
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %77, i32 0, i32 5
  %79 = load i16, ptr %78, align 8, !tbaa !21
  %80 = zext i16 %79 to i32
  %81 = call i32 @HAL_DMA_Start_IT(ptr noundef %67, i32 noundef %71, i32 noundef %76, i32 noundef %80)
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %89

83:                                               ; preds = %35
  br label %84

84:                                               ; preds = %83
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %85, i32 0, i32 11
  store i32 0, ptr %86, align 8, !tbaa !19
  br label %87

87:                                               ; preds = %84
  br label %88

88:                                               ; preds = %87
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

89:                                               ; preds = %35
  %90 = load ptr, ptr %5, align 8, !tbaa !5
  %91 = call i32 @SAI_InterruptFlag(ptr noundef %90, i32 noundef 0)
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %92, i32 0, i32 0
  %94 = load ptr, ptr %93, align 8, !tbaa !31
  %95 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %94, i32 0, i32 4
  %96 = load volatile i32, ptr %95, align 4, !tbaa !32
  %97 = or i32 %96, %91
  store volatile i32 %97, ptr %95, align 4, !tbaa !32
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %98, i32 0, i32 0
  %100 = load ptr, ptr %99, align 8, !tbaa !31
  %101 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %100, i32 0, i32 0
  %102 = load volatile i32, ptr %101, align 4, !tbaa !34
  %103 = zext i32 %102 to i64
  %104 = or i64 %103, 131072
  %105 = trunc i64 %104 to i32
  store volatile i32 %105, ptr %101, align 4, !tbaa !34
  br label %106

106:                                              ; preds = %130, %89
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %107, i32 0, i32 0
  %109 = load ptr, ptr %108, align 8, !tbaa !31
  %110 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %109, i32 0, i32 5
  %111 = load volatile i32, ptr %110, align 4, !tbaa !35
  %112 = zext i32 %111 to i64
  %113 = and i64 %112, 458752
  %114 = icmp eq i64 %113, 0
  br i1 %114, label %115, label %131

115:                                              ; preds = %106
  %116 = call i32 @HAL_GetTick()
  %117 = load i32, ptr %8, align 4, !tbaa !11
  %118 = sub i32 %116, %117
  %119 = icmp ugt i32 %118, 1000
  br i1 %119, label %120, label %130

120:                                              ; preds = %115
  %121 = load ptr, ptr %5, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %121, i32 0, i32 13
  %123 = load volatile i32, ptr %122, align 8, !tbaa !23
  %124 = or i32 %123, 64
  store volatile i32 %124, ptr %122, align 8, !tbaa !23
  br label %125

125:                                              ; preds = %120
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %126, i32 0, i32 11
  store i32 0, ptr %127, align 8, !tbaa !19
  br label %128

128:                                              ; preds = %125
  br label %129

129:                                              ; preds = %128
  store i32 3, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

130:                                              ; preds = %115
  br label %106, !llvm.loop !36

131:                                              ; preds = %106
  %132 = load ptr, ptr %5, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %132, i32 0, i32 0
  %134 = load ptr, ptr %133, align 8, !tbaa !31
  %135 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %134, i32 0, i32 0
  %136 = load volatile i32, ptr %135, align 4, !tbaa !34
  %137 = zext i32 %136 to i64
  %138 = and i64 %137, 65536
  %139 = icmp eq i64 %138, 0
  br i1 %139, label %140, label %149

140:                                              ; preds = %131
  %141 = load ptr, ptr %5, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %141, i32 0, i32 0
  %143 = load ptr, ptr %142, align 8, !tbaa !31
  %144 = getelementptr inbounds %struct.SAI_Block_TypeDef, ptr %143, i32 0, i32 0
  %145 = load volatile i32, ptr %144, align 4, !tbaa !34
  %146 = zext i32 %145 to i64
  %147 = or i64 %146, 65536
  %148 = trunc i64 %147 to i32
  store volatile i32 %148, ptr %144, align 4, !tbaa !34
  br label %149

149:                                              ; preds = %140, %131
  br label %150

150:                                              ; preds = %149
  %151 = load ptr, ptr %5, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.__SAI_HandleTypeDef, ptr %151, i32 0, i32 11
  store i32 0, ptr %152, align 8, !tbaa !19
  br label %153

153:                                              ; preds = %150
  br label %154

154:                                              ; preds = %153
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

155:                                              ; preds = %18
  store i32 2, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %156

156:                                              ; preds = %155, %154, %129, %88, %29, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %157 = load i32, ptr %4, align 4
  ret i32 %157
}

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMATxHalfCplt(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMATxCplt(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMAError(ptr noundef) #2

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 180}
!14 = !{!"__SAI_HandleTypeDef", !6, i64 0, !15, i64 8, !17, i64 88, !18, i64 108, !6, i64 128, !10, i64 136, !10, i64 138, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !12, i64 176, !12, i64 180, !12, i64 184}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !16, i64 52, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76}
!16 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!19 = !{!14, !12, i64 176}
!20 = !{!14, !6, i64 128}
!21 = !{!14, !10, i64 136}
!22 = !{!14, !10, i64 138}
!23 = !{!14, !12, i64 184}
!24 = !{!14, !6, i64 144}
!25 = !{!26, !6, i64 80}
!26 = !{!"__DMA_HandleTypeDef", !6, i64 0, !27, i64 8, !12, i64 56, !12, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !6, i64 160, !6, i64 168, !12, i64 176}
!27 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!28 = !{!26, !6, i64 72}
!29 = !{!26, !6, i64 104}
!30 = !{!26, !6, i64 112}
!31 = !{!14, !6, i64 0}
!32 = !{!33, !12, i64 16}
!33 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!34 = !{!33, !12, i64 0}
!35 = !{!33, !12, i64 20}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @SAI_InterruptFlag(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_SAI_Transmit_DMA(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = tail call i32 @HAL_GetTick() #2
  %5 = icmp eq ptr %1, null
  %6 = icmp eq i16 %2, 0
  %or.cond = or i1 %5, %6
  br i1 %or.cond, label %62, label %7

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 180
  %9 = load volatile i32, ptr %8, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %62

11:                                               ; preds = %7
  %12 = getelementptr inbounds i8, ptr %0, i64 176
  %13 = load i32, ptr %12, align 8, !tbaa !16
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %62, label %15

15:                                               ; preds = %11
  store i32 1, ptr %12, align 8, !tbaa !16
  %16 = getelementptr inbounds i8, ptr %0, i64 128
  store ptr %1, ptr %16, align 8, !tbaa !17
  %17 = getelementptr inbounds i8, ptr %0, i64 136
  store i16 %2, ptr %17, align 8, !tbaa !18
  %18 = getelementptr inbounds i8, ptr %0, i64 138
  store i16 %2, ptr %18, align 2, !tbaa !19
  %19 = getelementptr inbounds i8, ptr %0, i64 184
  store volatile i32 0, ptr %19, align 8, !tbaa !20
  store volatile i32 18, ptr %8, align 4, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %0, i64 144
  %21 = load ptr, ptr %20, align 8, !tbaa !21
  %22 = getelementptr inbounds i8, ptr %21, i64 80
  store ptr @SAI_DMATxHalfCplt, ptr %22, align 8, !tbaa !22
  %23 = getelementptr inbounds i8, ptr %21, i64 72
  store ptr @SAI_DMATxCplt, ptr %23, align 8, !tbaa !25
  %24 = getelementptr inbounds i8, ptr %21, i64 104
  store ptr @SAI_DMAError, ptr %24, align 8, !tbaa !26
  %25 = getelementptr inbounds i8, ptr %21, i64 112
  store ptr null, ptr %25, align 8, !tbaa !27
  %26 = ptrtoint ptr %1 to i64
  %27 = trunc i64 %26 to i32
  %28 = load ptr, ptr %0, align 8, !tbaa !28
  %29 = getelementptr inbounds i8, ptr %28, i64 28
  %30 = ptrtoint ptr %29 to i64
  %31 = trunc i64 %30 to i32
  %32 = zext i16 %2 to i32
  %33 = tail call i32 @HAL_DMA_Start_IT(ptr noundef %21, i32 noundef %27, i32 noundef %31, i32 noundef %32) #2
  %.not = icmp eq i32 %33, 0
  br i1 %.not, label %34, label %.sink.split

34:                                               ; preds = %15
  %35 = tail call i32 @SAI_InterruptFlag(ptr noundef nonnull %0, i32 noundef 0)
  %36 = load ptr, ptr %0, align 8, !tbaa !28
  %37 = getelementptr inbounds i8, ptr %36, i64 16
  %38 = load volatile i32, ptr %37, align 4, !tbaa !29
  %39 = or i32 %38, %35
  store volatile i32 %39, ptr %37, align 4, !tbaa !29
  %40 = load volatile i32, ptr %36, align 4, !tbaa !31
  %41 = or i32 %40, 131072
  store volatile i32 %41, ptr %36, align 4, !tbaa !31
  br label %42

42:                                               ; preds = %48, %34
  %43 = load ptr, ptr %0, align 8, !tbaa !28
  %44 = getelementptr inbounds i8, ptr %43, i64 20
  %45 = load volatile i32, ptr %44, align 4, !tbaa !32
  %46 = and i32 %45, 458752
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %55

48:                                               ; preds = %42
  %49 = tail call i32 @HAL_GetTick() #2
  %50 = sub i32 %49, %4
  %51 = icmp ugt i32 %50, 1000
  br i1 %51, label %52, label %42, !llvm.loop !33

52:                                               ; preds = %48
  %53 = load volatile i32, ptr %19, align 8, !tbaa !20
  %54 = or i32 %53, 64
  store volatile i32 %54, ptr %19, align 8, !tbaa !20
  br label %.sink.split

55:                                               ; preds = %42
  %56 = load volatile i32, ptr %43, align 4, !tbaa !31
  %57 = and i32 %56, 65536
  %58 = icmp eq i32 %57, 0
  br i1 %58, label %59, label %.sink.split

59:                                               ; preds = %55
  %60 = load volatile i32, ptr %43, align 4, !tbaa !31
  %61 = or i32 %60, 65536
  store volatile i32 %61, ptr %43, align 4, !tbaa !31
  br label %.sink.split

.sink.split:                                      ; preds = %59, %55, %15, %52
  %.0.ph = phi i32 [ 3, %52 ], [ 1, %15 ], [ 0, %55 ], [ 0, %59 ]
  store i32 0, ptr %12, align 8, !tbaa !16
  br label %62

62:                                               ; preds = %.sink.split, %7, %11, %3
  %.0 = phi i32 [ 1, %3 ], [ 2, %11 ], [ 2, %7 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMATxHalfCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMATxCplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @SAI_DMAError(ptr noundef) #1

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 180}
!6 = !{!"__SAI_HandleTypeDef", !7, i64 0, !10, i64 8, !13, i64 88, !14, i64 108, !7, i64 128, !15, i64 136, !15, i64 138, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !11, i64 176, !11, i64 180, !11, i64 184}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !11, i64 176}
!17 = !{!6, !7, i64 128}
!18 = !{!6, !15, i64 136}
!19 = !{!6, !15, i64 138}
!20 = !{!6, !11, i64 184}
!21 = !{!6, !7, i64 144}
!22 = !{!23, !7, i64 80}
!23 = !{!"__DMA_HandleTypeDef", !7, i64 0, !24, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!24 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!25 = !{!23, !7, i64 72}
!26 = !{!23, !7, i64 104}
!27 = !{!23, !7, i64 112}
!28 = !{!6, !7, i64 0}
!29 = !{!30, !11, i64 16}
!30 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!31 = !{!30, !11, i64 0}
!32 = !{!30, !11, i64 20}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass