; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IRQHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.COMP_HandleTypeDef = type { ptr, %struct.COMP_InitTypeDef, i32, i32, i32 }
%struct.COMP_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.EXTI_Core_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.COMP_TypeDef = type { i32 }
%struct.COMPOPT_TypeDef = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_COMP_IRQHandler(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %4, i32 0, i32 0
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  %7 = icmp eq ptr %6, inttoptr (i64 1476409356 to ptr)
  %8 = zext i1 %7 to i64
  %9 = select i1 %7, i64 1048576, i64 2097152
  %10 = trunc i64 %9 to i32
  store i32 %10, ptr %3, align 4, !tbaa !13
  %11 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 2), align 4, !tbaa !14
  %12 = load i32, ptr %3, align 4, !tbaa !13
  %13 = and i32 %11, %12
  %14 = zext i32 %13 to i64
  %15 = icmp ne i64 %14, 0
  br i1 %15, label %16, label %26

16:                                               ; preds = %1
  %17 = load volatile i32, ptr inttoptr (i64 1476409360 to ptr), align 4, !tbaa !16
  %18 = zext i32 %17 to i64
  %19 = and i64 %18, 16
  %20 = icmp ne i64 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store volatile i32 3145728, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 2), align 4, !tbaa !14
  br label %24

22:                                               ; preds = %16
  %23 = load i32, ptr %3, align 4, !tbaa !13
  store volatile i32 %23, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 2), align 4, !tbaa !14
  br label %24

24:                                               ; preds = %22, %21
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_COMP_TriggerCallback(ptr noundef %25)
  br label %26

26:                                               ; preds = %24, %1
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !9
  %30 = getelementptr inbounds %struct.COMP_TypeDef, ptr %29, i32 0, i32 0
  %31 = load volatile i32, ptr %30, align 4, !tbaa !16
  %32 = zext i32 %31 to i64
  %33 = and i64 %32, 64
  %34 = icmp eq i64 %33, 64
  %35 = zext i1 %34 to i64
  %36 = select i1 %34, i32 1, i32 0
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %76

38:                                               ; preds = %26
  %39 = load volatile i32, ptr inttoptr (i64 1476409344 to ptr), align 4, !tbaa !18
  %40 = zext i32 %39 to i64
  %41 = and i64 %40, 65536
  %42 = icmp eq i64 %41, 65536
  %43 = zext i1 %42 to i32
  %44 = sext i32 %43 to i64
  %45 = icmp ne i64 %44, 0
  br i1 %45, label %46, label %55

46:                                               ; preds = %38
  store volatile i32 65536, ptr getelementptr inbounds (%struct.COMPOPT_TypeDef, ptr inttoptr (i64 1476409344 to ptr), i32 0, i32 1), align 4, !tbaa !20
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %47, i32 0, i32 0
  %49 = load ptr, ptr %48, align 8, !tbaa !9
  %50 = getelementptr inbounds %struct.COMP_TypeDef, ptr %49, i32 0, i32 0
  %51 = load volatile i32, ptr %50, align 4, !tbaa !16
  %52 = zext i32 %51 to i64
  %53 = and i64 %52, -65
  %54 = trunc i64 %53 to i32
  store volatile i32 %54, ptr %50, align 4, !tbaa !16
  br label %55

55:                                               ; preds = %46, %38
  %56 = load volatile i32, ptr inttoptr (i64 1476409344 to ptr), align 4, !tbaa !18
  %57 = zext i32 %56 to i64
  %58 = and i64 %57, 131072
  %59 = icmp eq i64 %58, 131072
  %60 = zext i1 %59 to i32
  %61 = sext i32 %60 to i64
  %62 = icmp ne i64 %61, 0
  br i1 %62, label %63, label %72

63:                                               ; preds = %55
  store volatile i32 131072, ptr getelementptr inbounds (%struct.COMPOPT_TypeDef, ptr inttoptr (i64 1476409344 to ptr), i32 0, i32 1), align 4, !tbaa !20
  %64 = load ptr, ptr %2, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !9
  %67 = getelementptr inbounds %struct.COMP_TypeDef, ptr %66, i32 0, i32 0
  %68 = load volatile i32, ptr %67, align 4, !tbaa !16
  %69 = zext i32 %68 to i64
  %70 = and i64 %69, -65
  %71 = trunc i64 %70 to i32
  store volatile i32 %71, ptr %67, align 4, !tbaa !16
  br label %72

72:                                               ; preds = %63, %55
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %73, i32 0, i32 3
  store volatile i32 1, ptr %74, align 4, !tbaa !21
  %75 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_COMP_TriggerCallback(ptr noundef %75)
  br label %76

76:                                               ; preds = %72, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_COMP_TriggerCallback(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 40, !12, i64 44, !12, i64 48}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !12, i64 8}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!16 = !{!17, !12, i64 0}
!17 = !{!"", !12, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!20 = !{!19, !12, i64 4}
!21 = !{!10, !12, i64 44}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_COMP_IRQHandler(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = icmp eq ptr %2, inttoptr (i64 1476409356 to ptr)
  %4 = select i1 %3, i32 1048576, i32 2097152
  %5 = load volatile i32, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !12
  %6 = and i32 %4, %5
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %10, label %7

7:                                                ; preds = %1
  %8 = load volatile i32, ptr inttoptr (i64 1476409360 to ptr), align 16, !tbaa !14
  %9 = and i32 %8, 16
  %.not8 = icmp eq i32 %9, 0
  %. = select i1 %.not8, i32 %4, i32 3145728
  store volatile i32 %., ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !12
  tail call void @HAL_COMP_TriggerCallback(ptr noundef nonnull %0)
  %.pre = load ptr, ptr %0, align 8, !tbaa !5
  br label %10

10:                                               ; preds = %7, %1
  %11 = phi ptr [ %.pre, %7 ], [ %2, %1 ]
  %12 = load volatile i32, ptr %11, align 4, !tbaa !14
  %13 = and i32 %12, 64
  %.not9 = icmp eq i32 %13, 0
  br i1 %.not9, label %28, label %14

14:                                               ; preds = %10
  %15 = load volatile i32, ptr inttoptr (i64 1476409344 to ptr), align 2048, !tbaa !16
  %16 = and i32 %15, 65536
  %.not10 = icmp eq i32 %16, 0
  br i1 %.not10, label %20, label %17

17:                                               ; preds = %14
  store volatile i32 65536, ptr inttoptr (i64 1476409348 to ptr), align 4, !tbaa !18
  %18 = load volatile i32, ptr %11, align 4, !tbaa !14
  %19 = and i32 %18, -65
  store volatile i32 %19, ptr %11, align 4, !tbaa !14
  br label %20

20:                                               ; preds = %17, %14
  %21 = load volatile i32, ptr inttoptr (i64 1476409344 to ptr), align 2048, !tbaa !16
  %22 = and i32 %21, 131072
  %.not11 = icmp eq i32 %22, 0
  br i1 %.not11, label %26, label %23

23:                                               ; preds = %20
  store volatile i32 131072, ptr inttoptr (i64 1476409348 to ptr), align 4, !tbaa !18
  %24 = load volatile i32, ptr %11, align 4, !tbaa !14
  %25 = and i32 %24, -65
  store volatile i32 %25, ptr %11, align 4, !tbaa !14
  br label %26

26:                                               ; preds = %23, %20
  %27 = getelementptr inbounds i8, ptr %0, i64 44
  store volatile i32 1, ptr %27, align 4, !tbaa !19
  tail call void @HAL_COMP_TriggerCallback(ptr noundef nonnull %0)
  br label %28

28:                                               ; preds = %26, %10
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_COMP_TriggerCallback(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 40, !11, i64 44, !11, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!14 = !{!15, !11, i64 0}
!15 = !{!"", !11, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!18 = !{!17, !11, i64 4}
!19 = !{!6, !11, i64 44}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass