; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src/CompilerART.ll (ZN11CompilerART27generate_art_signals_sparseEj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair.46" = type { i32, i32 }
%class.CompilerComponent = type <{ ptr, ptr, %"class.std::vector.23", ptr, i32, i8, [3 x i8], i32, [4 x i8] }>
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.CompilerART = type { %class.CompilerComponent.base, %"class.std::map", %"class.std::map.31", %"class.std::map.36", %"class.std::map.41" }
%class.CompilerComponent.base = type <{ ptr, ptr, %"class.std::vector.23", ptr, i32, i8, [3 x i8], i32 }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, adderconfig_t>, std::_Select1st<std::pair<const std::pair<int, int>, adderconfig_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, adderconfig_t>, std::_Select1st<std::pair<const std::pair<int, int>, adderconfig_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.31" = type { %"class.std::_Rb_tree.32" }
%"class.std::_Rb_tree.32" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, fl_t>, std::_Select1st<std::pair<const std::pair<int, int>, fl_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, fl_t>, std::_Select1st<std::pair<const std::pair<int, int>, fl_t>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::map.36" = type { %"class.std::_Rb_tree.37" }
%"class.std::_Rb_tree.37" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, std::pair<bool, bool>>, std::_Select1st<std::pair<const std::pair<int, int>, std::pair<bool, bool>>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, std::pair<bool, bool>>, std::_Select1st<std::pair<const std::pair<int, int>, std::pair<bool, bool>>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::map.41" = type { %"class.std::_Rb_tree.42" }
%"class.std::_Rb_tree.42" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, bool>, std::_Select1st<std::pair<const std::pair<int, int>, bool>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<const std::pair<int, int>, bool>, std::_Select1st<std::pair<const std::pair<int, int>, bool>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }

@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj = external hidden unnamed_addr constant [60 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CompilerART27generate_art_signals_sparseEj(ptr noundef nonnull align 8 dereferenceable(256) %0, i32 noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"struct.std::pair.46", align 4
  %19 = alloca i8, align 1
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca %"struct.std::pair.46", align 4
  %32 = alloca %"struct.std::pair.46", align 4
  %33 = alloca %"struct.std::pair.46", align 4
  %34 = alloca %"struct.std::pair.46", align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca %"struct.std::pair.46", align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %40 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = call noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %41)
  %43 = call noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef 2)
  %44 = fdiv double %42, %43
  %45 = fptosi double %44 to i32
  store i32 %45, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = call noalias noundef nonnull ptr @_Znam(i64 noundef %47) #8
  store ptr %48, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %49 = load i32, ptr %4, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = call noalias noundef nonnull ptr @_Znam(i64 noundef %50) #8
  store ptr %51, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %537, %2
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 2
  %56 = call noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %55) #7
  %57 = icmp ult i64 %54, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %52
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  br label %540

59:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %74, %59
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = load i32, ptr %4, align 4, !tbaa !9
  %63 = icmp ult i32 %61, %62
  br i1 %63, label %65, label %64

64:                                               ; preds = %60
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %77

65:                                               ; preds = %60
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i8, ptr %66, i64 %68
  store i8 0, ptr %69, align 1, !tbaa !11
  %70 = load ptr, ptr %8, align 8, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds i8, ptr %70, i64 %72
  store i8 0, ptr %73, align 1, !tbaa !11
  br label %74

74:                                               ; preds = %65
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %12, align 4, !tbaa !9
  br label %60, !llvm.loop !13

77:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  %78 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %78, ptr %13, align 4, !tbaa !9
  br label %79

79:                                               ; preds = %95, %77
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 2
  %83 = load i32, ptr %10, align 4, !tbaa !9
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %84) #7
  %86 = call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %85)
  %87 = add i32 %81, %86
  %88 = icmp ult i32 %80, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %79
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %98

90:                                               ; preds = %79
  %91 = load ptr, ptr %7, align 8, !tbaa !5
  %92 = load i32, ptr %13, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds i8, ptr %91, i64 %93
  store i8 1, ptr %94, align 1, !tbaa !11
  br label %95

95:                                               ; preds = %90
  %96 = load i32, ptr %13, align 4, !tbaa !9
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %13, align 4, !tbaa !9
  br label %79, !llvm.loop !15

98:                                               ; preds = %89
  %99 = getelementptr inbounds %class.CompilerComponent, ptr %40, i32 0, i32 2
  %100 = load i32, ptr %10, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %99, i64 noundef %101) #7
  %103 = call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %102)
  %104 = load i32, ptr %6, align 4, !tbaa !9
  %105 = add i32 %104, %103
  store i32 %105, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  %106 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %106, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %107 = load i32, ptr %5, align 4, !tbaa !9
  %108 = sub nsw i32 %107, 1
  store i32 %108, ptr %15, align 4, !tbaa !9
  br label %109

109:                                              ; preds = %533, %98
  %110 = load i32, ptr %15, align 4, !tbaa !9
  %111 = icmp sge i32 %110, 0
  br i1 %111, label %113, label %112

112:                                              ; preds = %109
  store i32 11, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  br label %536

113:                                              ; preds = %109
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = sdiv i32 %114, 2
  store i32 %115, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %116

116:                                              ; preds = %485, %113
  %117 = load i32, ptr %16, align 4, !tbaa !9
  %118 = load i32, ptr %14, align 4, !tbaa !9
  %119 = icmp slt i32 %117, %118
  br i1 %119, label %121, label %120

120:                                              ; preds = %116
  store i32 14, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  br label %488

121:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  %122 = load i32, ptr %16, align 4, !tbaa !9
  %123 = mul nsw i32 %122, 2
  store i32 %123, ptr %17, align 4, !tbaa !9
  %124 = load i32, ptr %16, align 4, !tbaa !9
  %125 = icmp eq i32 %124, 0
  br i1 %125, label %131, label %126

126:                                              ; preds = %121
  %127 = load i32, ptr %16, align 4, !tbaa !9
  %128 = load i32, ptr %14, align 4, !tbaa !9
  %129 = sub nsw i32 %128, 1
  %130 = icmp eq i32 %127, %129
  br i1 %130, label %131, label %167

131:                                              ; preds = %126, %121
  %132 = load ptr, ptr %7, align 8, !tbaa !5
  %133 = load i32, ptr %17, align 4, !tbaa !9
  %134 = sext i32 %133 to i64
  %135 = getelementptr inbounds i8, ptr %132, i64 %134
  %136 = load i8, ptr %135, align 1, !tbaa !11, !range !16, !noundef !17
  %137 = trunc i8 %136 to i1
  br i1 %137, label %146, label %138

138:                                              ; preds = %131
  %139 = load ptr, ptr %7, align 8, !tbaa !5
  %140 = load i32, ptr %17, align 4, !tbaa !9
  %141 = add nsw i32 %140, 1
  %142 = sext i32 %141 to i64
  %143 = getelementptr inbounds i8, ptr %139, i64 %142
  %144 = load i8, ptr %143, align 1, !tbaa !11, !range !16, !noundef !17
  %145 = trunc i8 %144 to i1
  br i1 %145, label %146, label %161

146:                                              ; preds = %138, %131
  %147 = load ptr, ptr %8, align 8, !tbaa !5
  %148 = load i32, ptr %16, align 4, !tbaa !9
  %149 = sext i32 %148 to i64
  %150 = getelementptr inbounds i8, ptr %147, i64 %149
  store i8 1, ptr %150, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %18, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16)
  %151 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %152 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %151, ptr noundef nonnull align 4 dereferenceable(8) %18)
  %153 = icmp ugt i64 %152, 0
  br i1 %153, label %154, label %157

154:                                              ; preds = %146
  %155 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %156 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %155, ptr noundef nonnull align 4 dereferenceable(8) %18)
  store i32 3, ptr %156, align 4, !tbaa !18
  br label %160

157:                                              ; preds = %146
  %158 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %158, ptr noundef nonnull align 4 dereferenceable(8) %18)
  store i32 0, ptr %159, align 4, !tbaa !18
  br label %160

160:                                              ; preds = %157, %154
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  br label %166

161:                                              ; preds = %138
  %162 = load ptr, ptr %8, align 8, !tbaa !5
  %163 = load i32, ptr %16, align 4, !tbaa !9
  %164 = sext i32 %163 to i64
  %165 = getelementptr inbounds i8, ptr %162, i64 %164
  store i8 0, ptr %165, align 1, !tbaa !11
  br label %166

166:                                              ; preds = %161, %160
  br label %484

167:                                              ; preds = %126
  %168 = load i32, ptr %16, align 4, !tbaa !9
  %169 = srem i32 %168, 2
  %170 = icmp ne i32 %169, 0
  br i1 %170, label %171, label %483

171:                                              ; preds = %167
  call void @llvm.lifetime.start.p0(i64 1, ptr %19) #7
  store i8 0, ptr %19, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #7
  %172 = load i32, ptr %17, align 4, !tbaa !9
  %173 = add nsw i32 %172, 1
  store i32 %173, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  %174 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %174, ptr %22, align 4, !tbaa !9
  %175 = load ptr, ptr %7, align 8, !tbaa !5
  %176 = load i32, ptr %21, align 4, !tbaa !9
  %177 = sext i32 %176 to i64
  %178 = getelementptr inbounds i8, ptr %175, i64 %177
  %179 = load i8, ptr %178, align 1, !tbaa !11, !range !16, !noundef !17
  %180 = trunc i8 %179 to i1
  br i1 %180, label %181, label %183

181:                                              ; preds = %171
  %182 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %182, ptr %22, align 4, !tbaa !9
  br label %183

183:                                              ; preds = %181, %171
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #7
  %184 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %184, ptr %23, align 4, !tbaa !9
  br label %185

185:                                              ; preds = %201, %183
  %186 = load i32, ptr %23, align 4, !tbaa !9
  %187 = icmp sge i32 %186, 0
  br i1 %187, label %189, label %188

188:                                              ; preds = %185
  store i32 17, ptr %11, align 4
  br label %204

189:                                              ; preds = %185
  %190 = load ptr, ptr %7, align 8, !tbaa !5
  %191 = load i32, ptr %23, align 4, !tbaa !9
  %192 = sext i32 %191 to i64
  %193 = getelementptr inbounds i8, ptr %190, i64 %192
  %194 = load i8, ptr %193, align 1, !tbaa !11, !range !16, !noundef !17
  %195 = trunc i8 %194 to i1
  br i1 %195, label %196, label %199

196:                                              ; preds = %189
  %197 = load i32, ptr %20, align 4, !tbaa !9
  %198 = add nsw i32 %197, 1
  store i32 %198, ptr %20, align 4, !tbaa !9
  br label %200

199:                                              ; preds = %189
  store i32 17, ptr %11, align 4
  br label %204

200:                                              ; preds = %196
  br label %201

201:                                              ; preds = %200
  %202 = load i32, ptr %23, align 4, !tbaa !9
  %203 = add nsw i32 %202, -1
  store i32 %203, ptr %23, align 4, !tbaa !9
  br label %185, !llvm.loop !20

204:                                              ; preds = %199, %188
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #7
  br label %205

205:                                              ; preds = %204
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #7
  store i32 0, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #7
  %206 = load i32, ptr %21, align 4, !tbaa !9
  %207 = add nsw i32 %206, 1
  store i32 %207, ptr %25, align 4, !tbaa !9
  %208 = load ptr, ptr %7, align 8, !tbaa !5
  %209 = load i32, ptr %25, align 4, !tbaa !9
  %210 = sext i32 %209 to i64
  %211 = getelementptr inbounds i8, ptr %208, i64 %210
  %212 = load i8, ptr %211, align 1, !tbaa !11, !range !16, !noundef !17
  %213 = trunc i8 %212 to i1
  br i1 %213, label %217, label %214

214:                                              ; preds = %205
  %215 = load i32, ptr %25, align 4, !tbaa !9
  %216 = add nsw i32 %215, 1
  store i32 %216, ptr %25, align 4, !tbaa !9
  br label %217

217:                                              ; preds = %214, %205
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #7
  %218 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %218, ptr %26, align 4, !tbaa !9
  br label %219

219:                                              ; preds = %236, %217
  %220 = load i32, ptr %26, align 4, !tbaa !9
  %221 = load i32, ptr %4, align 4, !tbaa !9
  %222 = icmp ult i32 %220, %221
  br i1 %222, label %224, label %223

223:                                              ; preds = %219
  store i32 20, ptr %11, align 4
  br label %239

224:                                              ; preds = %219
  %225 = load ptr, ptr %7, align 8, !tbaa !5
  %226 = load i32, ptr %26, align 4, !tbaa !9
  %227 = sext i32 %226 to i64
  %228 = getelementptr inbounds i8, ptr %225, i64 %227
  %229 = load i8, ptr %228, align 1, !tbaa !11, !range !16, !noundef !17
  %230 = trunc i8 %229 to i1
  br i1 %230, label %231, label %234

231:                                              ; preds = %224
  %232 = load i32, ptr %24, align 4, !tbaa !9
  %233 = add nsw i32 %232, 1
  store i32 %233, ptr %24, align 4, !tbaa !9
  br label %235

234:                                              ; preds = %224
  store i32 20, ptr %11, align 4
  br label %239

235:                                              ; preds = %231
  br label %236

236:                                              ; preds = %235
  %237 = load i32, ptr %26, align 4, !tbaa !9
  %238 = add nsw i32 %237, 1
  store i32 %238, ptr %26, align 4, !tbaa !9
  br label %219, !llvm.loop !21

239:                                              ; preds = %234, %223
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #7
  br label %240

240:                                              ; preds = %239
  %241 = load i32, ptr %20, align 4, !tbaa !9
  %242 = icmp eq i32 %241, 0
  br i1 %242, label %246, label %243

243:                                              ; preds = %240
  %244 = load i32, ptr %24, align 4, !tbaa !9
  %245 = icmp eq i32 %244, 0
  br i1 %245, label %246, label %273

246:                                              ; preds = %243, %240
  store i8 0, ptr %19, align 1, !tbaa !11
  %247 = load ptr, ptr %8, align 8, !tbaa !5
  %248 = load i32, ptr %16, align 4, !tbaa !9
  %249 = sext i32 %248 to i64
  %250 = getelementptr inbounds i8, ptr %247, i64 %249
  store i8 0, ptr %250, align 1, !tbaa !11
  %251 = load ptr, ptr %8, align 8, !tbaa !5
  %252 = load i32, ptr %16, align 4, !tbaa !9
  %253 = add nsw i32 %252, 1
  %254 = sext i32 %253 to i64
  %255 = getelementptr inbounds i8, ptr %251, i64 %254
  store i8 0, ptr %255, align 1, !tbaa !11
  %256 = load i32, ptr %20, align 4, !tbaa !9
  %257 = icmp sgt i32 %256, 0
  br i1 %257, label %258, label %263

258:                                              ; preds = %246
  %259 = load ptr, ptr %8, align 8, !tbaa !5
  %260 = load i32, ptr %16, align 4, !tbaa !9
  %261 = sext i32 %260 to i64
  %262 = getelementptr inbounds i8, ptr %259, i64 %261
  store i8 1, ptr %262, align 1, !tbaa !11
  br label %263

263:                                              ; preds = %258, %246
  %264 = load i32, ptr %24, align 4, !tbaa !9
  %265 = icmp sgt i32 %264, 0
  br i1 %265, label %266, label %272

266:                                              ; preds = %263
  %267 = load ptr, ptr %8, align 8, !tbaa !5
  %268 = load i32, ptr %16, align 4, !tbaa !9
  %269 = add nsw i32 %268, 1
  %270 = sext i32 %269 to i64
  %271 = getelementptr inbounds i8, ptr %267, i64 %270
  store i8 1, ptr %271, align 1, !tbaa !11
  br label %272

272:                                              ; preds = %266, %263
  br label %388

273:                                              ; preds = %243
  %274 = load i32, ptr %20, align 4, !tbaa !9
  %275 = load i32, ptr %24, align 4, !tbaa !9
  %276 = icmp sge i32 %274, %275
  br i1 %276, label %277, label %278

277:                                              ; preds = %273
  store i32 0, ptr %9, align 4, !tbaa !22
  br label %279

278:                                              ; preds = %273
  store i32 1, ptr %9, align 4, !tbaa !22
  br label %279

279:                                              ; preds = %278, %277
  %280 = load i32, ptr %9, align 4, !tbaa !22
  %281 = icmp eq i32 %280, 0
  br i1 %281, label %282, label %335

282:                                              ; preds = %279
  %283 = load ptr, ptr %7, align 8, !tbaa !5
  %284 = load i32, ptr %21, align 4, !tbaa !9
  %285 = add nsw i32 %284, 3
  %286 = sext i32 %285 to i64
  %287 = getelementptr inbounds i8, ptr %283, i64 %286
  %288 = load i8, ptr %287, align 1, !tbaa !11, !range !16, !noundef !17
  %289 = trunc i8 %288 to i1
  br i1 %289, label %298, label %290

290:                                              ; preds = %282
  %291 = load ptr, ptr %7, align 8, !tbaa !5
  %292 = load i32, ptr %21, align 4, !tbaa !9
  %293 = add nsw i32 %292, 4
  %294 = sext i32 %293 to i64
  %295 = getelementptr inbounds i8, ptr %291, i64 %294
  %296 = load i8, ptr %295, align 1, !tbaa !11, !range !16, !noundef !17
  %297 = trunc i8 %296 to i1
  br i1 %297, label %298, label %308

298:                                              ; preds = %290, %282
  store i8 0, ptr %19, align 1, !tbaa !11
  %299 = load ptr, ptr %8, align 8, !tbaa !5
  %300 = load i32, ptr %16, align 4, !tbaa !9
  %301 = sext i32 %300 to i64
  %302 = getelementptr inbounds i8, ptr %299, i64 %301
  store i8 1, ptr %302, align 1, !tbaa !11
  %303 = load ptr, ptr %8, align 8, !tbaa !5
  %304 = load i32, ptr %16, align 4, !tbaa !9
  %305 = add nsw i32 %304, 1
  %306 = sext i32 %305 to i64
  %307 = getelementptr inbounds i8, ptr %303, i64 %306
  store i8 1, ptr %307, align 1, !tbaa !11
  br label %334

308:                                              ; preds = %290
  store i8 1, ptr %19, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #7
  %309 = load i32, ptr %17, align 4, !tbaa !9
  %310 = add nsw i32 %309, 2
  store i32 %310, ptr %27, align 4, !tbaa !9
  br label %311

311:                                              ; preds = %321, %308
  %312 = load i32, ptr %27, align 4, !tbaa !9
  %313 = load i32, ptr %4, align 4, !tbaa !9
  %314 = icmp ult i32 %312, %313
  br i1 %314, label %316, label %315

315:                                              ; preds = %311
  store i32 23, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #7
  br label %324

316:                                              ; preds = %311
  %317 = load ptr, ptr %7, align 8, !tbaa !5
  %318 = load i32, ptr %27, align 4, !tbaa !9
  %319 = sext i32 %318 to i64
  %320 = getelementptr inbounds i8, ptr %317, i64 %319
  store i8 0, ptr %320, align 1, !tbaa !11
  br label %321

321:                                              ; preds = %316
  %322 = load i32, ptr %27, align 4, !tbaa !9
  %323 = add nsw i32 %322, 1
  store i32 %323, ptr %27, align 4, !tbaa !9
  br label %311, !llvm.loop !24

324:                                              ; preds = %315
  %325 = load ptr, ptr %8, align 8, !tbaa !5
  %326 = load i32, ptr %16, align 4, !tbaa !9
  %327 = sext i32 %326 to i64
  %328 = getelementptr inbounds i8, ptr %325, i64 %327
  store i8 1, ptr %328, align 1, !tbaa !11
  %329 = load ptr, ptr %8, align 8, !tbaa !5
  %330 = load i32, ptr %16, align 4, !tbaa !9
  %331 = add nsw i32 %330, 1
  %332 = sext i32 %331 to i64
  %333 = getelementptr inbounds i8, ptr %329, i64 %332
  store i8 0, ptr %333, align 1, !tbaa !11
  br label %334

334:                                              ; preds = %324, %298
  br label %387

335:                                              ; preds = %279
  %336 = load ptr, ptr %7, align 8, !tbaa !5
  %337 = load i32, ptr %21, align 4, !tbaa !9
  %338 = sub nsw i32 %337, 2
  %339 = sext i32 %338 to i64
  %340 = getelementptr inbounds i8, ptr %336, i64 %339
  %341 = load i8, ptr %340, align 1, !tbaa !11, !range !16, !noundef !17
  %342 = trunc i8 %341 to i1
  br i1 %342, label %351, label %343

343:                                              ; preds = %335
  %344 = load ptr, ptr %7, align 8, !tbaa !5
  %345 = load i32, ptr %21, align 4, !tbaa !9
  %346 = sub nsw i32 %345, 3
  %347 = sext i32 %346 to i64
  %348 = getelementptr inbounds i8, ptr %344, i64 %347
  %349 = load i8, ptr %348, align 1, !tbaa !11, !range !16, !noundef !17
  %350 = trunc i8 %349 to i1
  br i1 %350, label %351, label %361

351:                                              ; preds = %343, %335
  store i8 0, ptr %19, align 1, !tbaa !11
  %352 = load ptr, ptr %8, align 8, !tbaa !5
  %353 = load i32, ptr %16, align 4, !tbaa !9
  %354 = sext i32 %353 to i64
  %355 = getelementptr inbounds i8, ptr %352, i64 %354
  store i8 1, ptr %355, align 1, !tbaa !11
  %356 = load ptr, ptr %8, align 8, !tbaa !5
  %357 = load i32, ptr %16, align 4, !tbaa !9
  %358 = add nsw i32 %357, 1
  %359 = sext i32 %358 to i64
  %360 = getelementptr inbounds i8, ptr %356, i64 %359
  store i8 1, ptr %360, align 1, !tbaa !11
  br label %386

361:                                              ; preds = %343
  store i8 1, ptr %19, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #7
  store i32 0, ptr %28, align 4, !tbaa !9
  br label %362

362:                                              ; preds = %373, %361
  %363 = load i32, ptr %28, align 4, !tbaa !9
  %364 = load i32, ptr %17, align 4, !tbaa !9
  %365 = add nsw i32 %364, 1
  %366 = icmp sle i32 %363, %365
  br i1 %366, label %368, label %367

367:                                              ; preds = %362
  store i32 26, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #7
  br label %376

368:                                              ; preds = %362
  %369 = load ptr, ptr %7, align 8, !tbaa !5
  %370 = load i32, ptr %28, align 4, !tbaa !9
  %371 = sext i32 %370 to i64
  %372 = getelementptr inbounds i8, ptr %369, i64 %371
  store i8 0, ptr %372, align 1, !tbaa !11
  br label %373

373:                                              ; preds = %368
  %374 = load i32, ptr %28, align 4, !tbaa !9
  %375 = add nsw i32 %374, 1
  store i32 %375, ptr %28, align 4, !tbaa !9
  br label %362, !llvm.loop !25

376:                                              ; preds = %367
  %377 = load ptr, ptr %8, align 8, !tbaa !5
  %378 = load i32, ptr %16, align 4, !tbaa !9
  %379 = add nsw i32 %378, 1
  %380 = sext i32 %379 to i64
  %381 = getelementptr inbounds i8, ptr %377, i64 %380
  store i8 1, ptr %381, align 1, !tbaa !11
  %382 = load ptr, ptr %8, align 8, !tbaa !5
  %383 = load i32, ptr %16, align 4, !tbaa !9
  %384 = sext i32 %383 to i64
  %385 = getelementptr inbounds i8, ptr %382, i64 %384
  store i8 0, ptr %385, align 1, !tbaa !11
  br label %386

386:                                              ; preds = %376, %351
  br label %387

387:                                              ; preds = %386, %334
  br label %388

388:                                              ; preds = %387, %272
  %389 = load i8, ptr %19, align 1, !tbaa !11, !range !16, !noundef !17
  %390 = trunc i8 %389 to i1
  br i1 %390, label %391, label %419

391:                                              ; preds = %388
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #7
  %392 = load i32, ptr %9, align 4, !tbaa !22
  %393 = icmp eq i32 %392, 0
  br i1 %393, label %394, label %398

394:                                              ; preds = %391
  %395 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %395, ptr %29, align 4, !tbaa !9
  %396 = load i32, ptr %16, align 4, !tbaa !9
  %397 = add nsw i32 %396, 1
  store i32 %397, ptr %30, align 4, !tbaa !9
  br label %402

398:                                              ; preds = %391
  %399 = load i32, ptr %16, align 4, !tbaa !9
  %400 = add nsw i32 %399, 1
  store i32 %400, ptr %29, align 4, !tbaa !9
  %401 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %401, ptr %30, align 4, !tbaa !9
  br label %402

402:                                              ; preds = %398, %394
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %31, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %29)
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %32, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %30)
  %403 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %404 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %403, ptr noundef nonnull align 4 dereferenceable(8) %31)
  store i32 0, ptr %404, align 4, !tbaa !26
  %405 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %406 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %405, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 1, ptr %406, align 4, !tbaa !26
  %407 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %408 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %407, ptr noundef nonnull align 4 dereferenceable(8) %31)
  store i32 1, ptr %408, align 4, !tbaa !18
  %409 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %410 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %409, ptr noundef nonnull align 4 dereferenceable(8) %32)
  %411 = icmp ugt i64 %410, 0
  br i1 %411, label %412, label %415

412:                                              ; preds = %402
  %413 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %414 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %413, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 2, ptr %414, align 4, !tbaa !18
  br label %418

415:                                              ; preds = %402
  %416 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %417 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %416, ptr noundef nonnull align 4 dereferenceable(8) %32)
  store i32 0, ptr %417, align 4, !tbaa !18
  br label %418

418:                                              ; preds = %415, %412
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #7
  br label %482

419:                                              ; preds = %388
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #7
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %33, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16)
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #7
  %420 = load i32, ptr %16, align 4, !tbaa !9
  %421 = add nsw i32 %420, 1
  store i32 %421, ptr %35, align 4, !tbaa !9
  call void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %34, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %35)
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #7
  %422 = load i32, ptr %20, align 4, !tbaa !9
  %423 = icmp sgt i32 %422, 0
  br i1 %423, label %424, label %451

424:                                              ; preds = %419
  %425 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %426 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %425, ptr noundef nonnull align 4 dereferenceable(8) %33)
  %427 = icmp ugt i64 %426, 0
  br i1 %427, label %428, label %447

428:                                              ; preds = %424
  %429 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %430 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %429, ptr noundef nonnull align 4 dereferenceable(8) %33)
  %431 = icmp ugt i64 %430, 0
  br i1 %431, label %432, label %443

432:                                              ; preds = %428
  %433 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %434 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %433, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 2, ptr %434, align 4, !tbaa !18
  %435 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %436 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %435, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %437 = load i32, ptr %436, align 4, !tbaa !26
  %438 = icmp eq i32 %437, 1
  br i1 %438, label %439, label %440

439:                                              ; preds = %432
  br label %442

440:                                              ; preds = %432
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 778, ptr noundef @__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj) #9
  unreachable

441:                                              ; No predecessors!
  br label %442

442:                                              ; preds = %441, %439
  br label %446

443:                                              ; preds = %428
  %444 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %445 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %444, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 3, ptr %445, align 4, !tbaa !18
  br label %446

446:                                              ; preds = %443, %442
  br label %450

447:                                              ; preds = %424
  %448 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %449 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %448, ptr noundef nonnull align 4 dereferenceable(8) %33)
  store i32 0, ptr %449, align 4, !tbaa !18
  br label %450

450:                                              ; preds = %447, %446
  br label %451

451:                                              ; preds = %450, %419
  %452 = load i32, ptr %24, align 4, !tbaa !9
  %453 = icmp sgt i32 %452, 0
  br i1 %453, label %454, label %481

454:                                              ; preds = %451
  %455 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %456 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %455, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %457 = icmp ugt i64 %456, 0
  br i1 %457, label %458, label %477

458:                                              ; preds = %454
  %459 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %460 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %459, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %461 = icmp ugt i64 %460, 0
  br i1 %461, label %462, label %473

462:                                              ; preds = %458
  %463 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 2
  %464 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %463, ptr noundef nonnull align 4 dereferenceable(8) %34)
  %465 = load i32, ptr %464, align 4, !tbaa !26
  %466 = icmp eq i32 %465, 1
  br i1 %466, label %467, label %468

467:                                              ; preds = %462
  br label %470

468:                                              ; preds = %462
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 793, ptr noundef @__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj) #9
  unreachable

469:                                              ; No predecessors!
  br label %470

470:                                              ; preds = %469, %467
  %471 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %472 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %471, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 2, ptr %472, align 4, !tbaa !18
  br label %476

473:                                              ; preds = %458
  %474 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %475 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %474, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 3, ptr %475, align 4, !tbaa !18
  br label %476

476:                                              ; preds = %473, %470
  br label %480

477:                                              ; preds = %454
  %478 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 1
  %479 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %478, ptr noundef nonnull align 4 dereferenceable(8) %34)
  store i32 0, ptr %479, align 4, !tbaa !18
  br label %480

480:                                              ; preds = %477, %476
  br label %481

481:                                              ; preds = %480, %451
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #7
  br label %482

482:                                              ; preds = %481, %418
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr %19) #7
  br label %483

483:                                              ; preds = %482, %167
  br label %484

484:                                              ; preds = %483, %166
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  br label %485

485:                                              ; preds = %484
  %486 = load i32, ptr %16, align 4, !tbaa !9
  %487 = add nsw i32 %486, 1
  store i32 %487, ptr %16, align 4, !tbaa !9
  br label %116, !llvm.loop !28

488:                                              ; preds = %120
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #7
  store i32 0, ptr %36, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #7
  store i32 0, ptr %38, align 4, !tbaa !9
  br label %489

489:                                              ; preds = %523, %488
  %490 = load i32, ptr %38, align 4, !tbaa !9
  %491 = load i32, ptr %4, align 4, !tbaa !9
  %492 = icmp ult i32 %490, %491
  br i1 %492, label %494, label %493

493:                                              ; preds = %489
  store i32 29, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #7
  br label %526

494:                                              ; preds = %489
  %495 = load ptr, ptr %8, align 8, !tbaa !5
  %496 = load i32, ptr %38, align 4, !tbaa !9
  %497 = sext i32 %496 to i64
  %498 = getelementptr inbounds i8, ptr %495, i64 %497
  %499 = load i8, ptr %498, align 1, !tbaa !11, !range !16, !noundef !17
  %500 = trunc i8 %499 to i1
  %501 = zext i1 %500 to i32
  %502 = icmp eq i32 %501, 1
  br i1 %502, label %503, label %507

503:                                              ; preds = %494
  %504 = load i32, ptr %36, align 4, !tbaa !9
  %505 = add i32 %504, 1
  store i32 %505, ptr %36, align 4, !tbaa !9
  %506 = load i32, ptr %38, align 4, !tbaa !9
  store i32 %506, ptr %37, align 4, !tbaa !9
  br label %507

507:                                              ; preds = %503, %494
  %508 = load ptr, ptr %8, align 8, !tbaa !5
  %509 = load i32, ptr %38, align 4, !tbaa !9
  %510 = sext i32 %509 to i64
  %511 = getelementptr inbounds i8, ptr %508, i64 %510
  %512 = load i8, ptr %511, align 1, !tbaa !11, !range !16, !noundef !17
  %513 = trunc i8 %512 to i1
  %514 = load ptr, ptr %7, align 8, !tbaa !5
  %515 = load i32, ptr %38, align 4, !tbaa !9
  %516 = sext i32 %515 to i64
  %517 = getelementptr inbounds i8, ptr %514, i64 %516
  %518 = zext i1 %513 to i8
  store i8 %518, ptr %517, align 1, !tbaa !11
  %519 = load ptr, ptr %8, align 8, !tbaa !5
  %520 = load i32, ptr %38, align 4, !tbaa !9
  %521 = sext i32 %520 to i64
  %522 = getelementptr inbounds i8, ptr %519, i64 %521
  store i8 0, ptr %522, align 1, !tbaa !11
  br label %523

523:                                              ; preds = %507
  %524 = load i32, ptr %38, align 4, !tbaa !9
  %525 = add nsw i32 %524, 1
  store i32 %525, ptr %38, align 4, !tbaa !9
  br label %489, !llvm.loop !29

526:                                              ; preds = %493
  %527 = load i32, ptr %36, align 4, !tbaa !9
  %528 = icmp eq i32 %527, 1
  br i1 %528, label %529, label %532

529:                                              ; preds = %526
  call void @llvm.lifetime.start.p0(i64 8, ptr %39) #7
  call void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8) %39, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %37)
  %530 = getelementptr inbounds %class.CompilerART, ptr %40, i32 0, i32 4
  %531 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %530, ptr noundef nonnull align 4 dereferenceable(8) %39)
  store i8 1, ptr %531, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %39) #7
  br label %532

532:                                              ; preds = %529, %526
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #7
  br label %533

533:                                              ; preds = %532
  %534 = load i32, ptr %15, align 4, !tbaa !9
  %535 = add nsw i32 %534, -1
  store i32 %535, ptr %15, align 4, !tbaa !9
  br label %109, !llvm.loop !30

536:                                              ; preds = %112
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  br label %537

537:                                              ; preds = %536
  %538 = load i32, ptr %10, align 4, !tbaa !9
  %539 = add nsw i32 %538, 1
  store i32 %539, ptr %10, align 4, !tbaa !9
  br label %52, !llvm.loop !31

540:                                              ; preds = %58
  %541 = load ptr, ptr %7, align 8, !tbaa !5
  %542 = icmp eq ptr %541, null
  br i1 %542, label %544, label %543

543:                                              ; preds = %540
  call void @_ZdaPv(ptr noundef %541) #10
  br label %544

544:                                              ; preds = %543, %540
  %545 = load ptr, ptr %8, align 8, !tbaa !5
  %546 = icmp eq ptr %545, null
  br i1 %546, label %548, label %547

547:                                              ; preds = %544
  call void @_ZdaPv(ptr noundef %545) #10
  br label %548

548:                                              ; preds = %547, %544
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5)) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { noreturn nounwind }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!19, !19, i64 0}
!19 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS11direction_t", !7, i64 0}
!24 = distinct !{!24, !14}
!25 = distinct !{!25, !14}
!26 = !{!27, !27, i64 0}
!27 = !{!"_ZTS4fl_t", !7, i64 0}
!28 = distinct !{!28, !14}
!29 = distinct !{!29, !14}
!30 = distinct !{!30, !14}
!31 = distinct !{!31, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair.46" = type { i32, i32 }

@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1
@__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj = external hidden unnamed_addr constant [60 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CompilerART27generate_art_signals_sparseEj(ptr noundef nonnull align 8 dereferenceable(256) %0, i32 noundef %1) local_unnamed_addr #2 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %"struct.std::pair.46", align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"struct.std::pair.46", align 4
  %9 = alloca %"struct.std::pair.46", align 4
  %10 = alloca %"struct.std::pair.46", align 4
  %11 = alloca %"struct.std::pair.46", align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"struct.std::pair.46", align 4
  %15 = tail call noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %1)
  %16 = tail call noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef 2)
  %17 = zext i32 %1 to i64
  %18 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %17) #9
  %19 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %17) #9
  %20 = getelementptr inbounds i8, ptr %0, i64 16
  %21 = tail call noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #10
  %.not = icmp eq i64 %21, 0
  br i1 %.not, label %._crit_edge213, label %.preheader161.lr.ph

.preheader161.lr.ph:                              ; preds = %2
  %22 = fdiv double %15, %16
  %23 = fptosi double %22 to i32
  %.fr228 = freeze i32 %23
  %.not226 = icmp eq i32 %1, 0
  %storemerge203 = add nsw i32 %.fr228, -1
  %24 = icmp sgt i32 %.fr228, 0
  %25 = getelementptr inbounds i8, ptr %0, i64 112
  %26 = getelementptr inbounds i8, ptr %0, i64 64
  %27 = getelementptr inbounds i8, ptr %0, i64 208
  br i1 %24, label %.preheader161.us.preheader, label %.preheader161.lr.ph.split

.preheader161.us.preheader:                       ; preds = %.preheader161.lr.ph
  %28 = add i32 %1, -3
  %min.iters.check = icmp ult i32 %1, 8
  %n.vec = and i64 %17, 4294967288
  %cmp.n = icmp eq i64 %n.vec, %17
  br label %.preheader161.us

.preheader161.us:                                 ; preds = %.preheader161.us.preheader, %._crit_edge208.us
  %indvars.iv265 = phi i64 [ 0, %.preheader161.us.preheader ], [ %indvars.iv.next266, %._crit_edge208.us ]
  %.0121212.us = phi i32 [ 0, %.preheader161.us.preheader ], [ %31, %._crit_edge208.us ]
  br i1 %.not226, label %.preheader160.us, label %.lr.ph.us.preheader

.lr.ph.us.preheader:                              ; preds = %.preheader161.us
  call void @llvm.memset.p0.i64(ptr nonnull align 1 %18, i8 0, i64 %17, i1 false), !tbaa !5
  call void @llvm.memset.p0.i64(ptr nonnull align 1 %19, i8 0, i64 %17, i1 false), !tbaa !5
  br label %.preheader160.us

.lr.ph207.us:                                     ; preds = %.lr.ph168.us, %.preheader160.us
  %29 = call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv265) #10
  %30 = call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %29)
  %31 = add i32 %30, %.0121212.us
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #10
  store i32 %storemerge203, ptr %3, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %.lr.ph207.us, %._crit_edge201.us.thread
  %.0126204.us = phi i32 [ %1, %.lr.ph207.us ], [ %33, %._crit_edge201.us.thread ]
  %33 = sdiv i32 %.0126204.us, 2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #10
  store i32 0, ptr %4, align 4, !tbaa !9
  %34 = icmp sgt i32 %.0126204.us, 1
  br i1 %34, label %.lr.ph194.us, label %._crit_edge195.us

._crit_edge195.us:                                ; preds = %206, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %13) #10
  br i1 %.not226, label %._crit_edge201.us.thread, label %.lr.ph200.us.preheader

.lr.ph200.us.preheader:                           ; preds = %._crit_edge195.us
  br i1 %min.iters.check, label %.lr.ph200.us.preheader319, label %vector.body

.lr.ph200.us.preheader319:                        ; preds = %middle.block, %.lr.ph200.us.preheader
  %indvars.iv261.ph = phi i64 [ 0, %.lr.ph200.us.preheader ], [ %n.vec, %middle.block ]
  %.0113197.us.ph = phi i32 [ 0, %.lr.ph200.us.preheader ], [ %64, %middle.block ]
  br label %.lr.ph200.us

vector.body:                                      ; preds = %.lr.ph200.us.preheader, %57
  %index = phi i64 [ %index.next, %57 ], [ 0, %.lr.ph200.us.preheader ]
  %vec.phi = phi <4 x i32> [ %predphi, %57 ], [ zeroinitializer, %.lr.ph200.us.preheader ]
  %vec.phi284 = phi <4 x i32> [ %predphi300, %57 ], [ zeroinitializer, %.lr.ph200.us.preheader ]
  %35 = getelementptr inbounds i8, ptr %19, i64 %index
  %36 = getelementptr inbounds i8, ptr %35, i64 4
  %wide.load = load <4 x i8>, ptr %35, align 1, !tbaa !5
  %wide.load285 = load <4 x i8>, ptr %36, align 1, !tbaa !5
  %37 = trunc <4 x i8> %wide.load to <4 x i1>
  %38 = trunc <4 x i8> %wide.load285 to <4 x i1>
  %39 = extractelement <4 x i1> %37, i64 0
  %40 = extractelement <4 x i1> %37, i64 1
  %41 = or i1 %39, %40
  %42 = extractelement <4 x i1> %37, i64 2
  %43 = or i1 %41, %42
  %44 = extractelement <4 x i1> %37, i64 3
  %45 = or i1 %43, %44
  %46 = extractelement <4 x i1> %38, i64 0
  %47 = or i1 %45, %46
  %48 = extractelement <4 x i1> %38, i64 1
  %49 = or i1 %47, %48
  %50 = extractelement <4 x i1> %38, i64 2
  %51 = or i1 %49, %50
  %52 = extractelement <4 x i1> %38, i64 3
  %53 = or i1 %51, %52
  br i1 %53, label %54, label %57

54:                                               ; preds = %vector.body
  %55 = trunc i64 %index to i32
  %56 = zext i1 %40 to i32
  %spec.select302.v = select i1 %42, i32 2, i32 %56
  %spec.select303.v = select i1 %44, i32 3, i32 %spec.select302.v
  %spec.select304.v = select i1 %46, i32 4, i32 %spec.select303.v
  %spec.select305.v = select i1 %48, i32 5, i32 %spec.select304.v
  %spec.select306.v = select i1 %50, i32 6, i32 %spec.select305.v
  %spec.select307.v = select i1 %52, i32 7, i32 %spec.select306.v
  %spec.select307 = or disjoint i32 %spec.select307.v, %55
  store i32 %spec.select307, ptr %13, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %vector.body, %54
  %.mask = and <4 x i8> %wide.load, <i8 1, i8 1, i8 1, i8 1>
  %58 = zext nneg <4 x i8> %.mask to <4 x i32>
  %predphi = add <4 x i32> %vec.phi, %58
  %.mask301 = and <4 x i8> %wide.load285, <i8 1, i8 1, i8 1, i8 1>
  %59 = zext nneg <4 x i8> %.mask301 to <4 x i32>
  %predphi300 = add <4 x i32> %vec.phi284, %59
  %60 = getelementptr inbounds i8, ptr %18, i64 %index
  %61 = getelementptr inbounds i8, ptr %60, i64 4
  store <4 x i8> %wide.load, ptr %60, align 1, !tbaa !5
  store <4 x i8> %wide.load285, ptr %61, align 1, !tbaa !5
  %62 = getelementptr inbounds i8, ptr %35, i64 4
  store <4 x i8> zeroinitializer, ptr %35, align 1, !tbaa !5
  store <4 x i8> zeroinitializer, ptr %62, align 1, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %63 = icmp eq i64 %index.next, %n.vec
  br i1 %63, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %57
  %bin.rdx = add <4 x i32> %predphi300, %predphi
  %64 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge201.us, label %.lr.ph200.us.preheader319

._crit_edge201.us:                                ; preds = %76, %middle.block
  %.1.us.lcssa = phi i32 [ %64, %middle.block ], [ %.1.us, %76 ]
  %65 = icmp eq i32 %.1.us.lcssa, 1
  br i1 %65, label %66, label %._crit_edge201.us.thread

66:                                               ; preds = %._crit_edge201.us
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %14) #10
  call void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8) %14, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %67 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %27, ptr noundef nonnull align 4 dereferenceable(8) %14)
  store i8 1, ptr %67, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %14) #10
  br label %._crit_edge201.us.thread

._crit_edge201.us.thread:                         ; preds = %._crit_edge195.us, %66, %._crit_edge201.us
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %13) #10
  %68 = load i32, ptr %3, align 4, !tbaa !9
  %storemerge.us = add nsw i32 %68, -1
  store i32 %storemerge.us, ptr %3, align 4, !tbaa !9
  %69 = icmp sgt i32 %68, 0
  br i1 %69, label %32, label %._crit_edge208.us, !llvm.loop !15

.lr.ph200.us:                                     ; preds = %.lr.ph200.us.preheader319, %76
  %indvars.iv261 = phi i64 [ %indvars.iv.next262, %76 ], [ %indvars.iv261.ph, %.lr.ph200.us.preheader319 ]
  %.0113197.us = phi i32 [ %.1.us, %76 ], [ %.0113197.us.ph, %.lr.ph200.us.preheader319 ]
  %70 = getelementptr inbounds i8, ptr %19, i64 %indvars.iv261
  %71 = load i8, ptr %70, align 1, !tbaa !5, !range !16, !noundef !17
  %72 = trunc nuw i8 %71 to i1
  br i1 %72, label %73, label %76

73:                                               ; preds = %.lr.ph200.us
  %74 = add i32 %.0113197.us, 1
  %75 = trunc nuw nsw i64 %indvars.iv261 to i32
  store i32 %75, ptr %13, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %73, %.lr.ph200.us
  %.1.us = phi i32 [ %74, %73 ], [ %.0113197.us, %.lr.ph200.us ]
  %77 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv261
  store i8 %71, ptr %77, align 1, !tbaa !5
  store i8 0, ptr %70, align 1, !tbaa !5
  %indvars.iv.next262 = add nuw nsw i64 %indvars.iv261, 1
  %exitcond264.not = icmp eq i64 %indvars.iv.next262, %17
  br i1 %exitcond264.not, label %._crit_edge201.us, label %.lr.ph200.us, !llvm.loop !18

78:                                               ; preds = %.lr.ph194.us, %206
  %storemerge135191.us = phi i32 [ 0, %.lr.ph194.us ], [ %208, %206 ]
  %79 = shl i32 %storemerge135191.us, 1
  %80 = icmp eq i32 %storemerge135191.us, 0
  %81 = icmp eq i32 %storemerge135191.us, %226
  %or.cond150.us = select i1 %80, i1 true, i1 %81
  br i1 %or.cond150.us, label %187, label %82

82:                                               ; preds = %78
  %83 = and i32 %storemerge135191.us, 1
  %.not.us = icmp eq i32 %83, 0
  br i1 %.not.us, label %206, label %84

84:                                               ; preds = %82
  %85 = or disjoint i32 %79, 1
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds i8, ptr %18, i64 %86
  %88 = load i8, ptr %87, align 1, !tbaa !5, !range !16, !noundef !17
  %89 = trunc nuw i8 %88 to i1
  %spec.select.us = select i1 %89, i32 %85, i32 %79
  %90 = icmp sgt i32 %spec.select.us, -1
  br i1 %90, label %.lr.ph172.us.preheader, label %._crit_edge173.us

.lr.ph172.us.preheader:                           ; preds = %84
  %91 = zext nneg i32 %spec.select.us to i64
  %92 = add nuw i32 %spec.select.us, 1
  br label %.lr.ph172.us

.lr.ph172.us:                                     ; preds = %.lr.ph172.us.preheader, %185
  %indvars.iv248 = phi i64 [ %91, %.lr.ph172.us.preheader ], [ %indvars.iv.next249, %185 ]
  %.0122169.us = phi i32 [ 0, %.lr.ph172.us.preheader ], [ %186, %185 ]
  %93 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv248
  %94 = load i8, ptr %93, align 1, !tbaa !5, !range !16, !noundef !17
  %95 = trunc nuw i8 %94 to i1
  br i1 %95, label %185, label %._crit_edge173.us

._crit_edge173.us:                                ; preds = %185, %.lr.ph172.us, %84
  %.0122.lcssa.us = phi i32 [ 0, %84 ], [ %.0122169.us, %.lr.ph172.us ], [ %92, %185 ]
  %96 = add nsw i32 %79, 2
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds i8, ptr %18, i64 %97
  %99 = load i8, ptr %98, align 1, !tbaa !5, !range !16, !noundef !17
  %100 = trunc nuw i8 %99 to i1
  %101 = add nsw i32 %79, 3
  %spec.select151.us = select i1 %100, i32 %96, i32 %101
  %102 = icmp ult i32 %spec.select151.us, %1
  br i1 %102, label %.lr.ph179.us.preheader, label %._crit_edge180.us.thread

._crit_edge180.us.thread:                         ; preds = %._crit_edge173.us
  %103 = icmp eq i32 %.0122.lcssa.us, 0
  %104 = sext i32 %storemerge135191.us to i64
  %105 = getelementptr inbounds i8, ptr %19, i64 %104
  store i8 0, ptr %105, align 1, !tbaa !5
  %106 = getelementptr i8, ptr %105, i64 1
  store i8 0, ptr %106, align 1, !tbaa !5
  br i1 %103, label %.thread, label %.thread.sink.split

.lr.ph179.us.preheader:                           ; preds = %._crit_edge173.us
  %107 = sext i32 %spec.select151.us to i64
  %108 = sub i32 %1, %spec.select151.us
  br label %.lr.ph179.us

.lr.ph179.us:                                     ; preds = %.lr.ph179.us.preheader, %183
  %indvars.iv251 = phi i64 [ %107, %.lr.ph179.us.preheader ], [ %indvars.iv.next252, %183 ]
  %.0118176.us = phi i32 [ 0, %.lr.ph179.us.preheader ], [ %184, %183 ]
  %109 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv251
  %110 = load i8, ptr %109, align 1, !tbaa !5, !range !16, !noundef !17
  %111 = trunc nuw i8 %110 to i1
  br i1 %111, label %183, label %._crit_edge180.us

._crit_edge180.us:                                ; preds = %183, %.lr.ph179.us
  %.0118.lcssa.us = phi i32 [ %108, %183 ], [ %.0118176.us, %.lr.ph179.us ]
  %112 = icmp eq i32 %.0122.lcssa.us, 0
  %113 = icmp eq i32 %.0118.lcssa.us, 0
  %or.cond.us = or i1 %112, %113
  br i1 %or.cond.us, label %147, label %114

114:                                              ; preds = %._crit_edge180.us
  %.not136.not.us = icmp ult i32 %.0122.lcssa.us, %.0118.lcssa.us
  %115 = sext i32 %79 to i64
  %116 = getelementptr i8, ptr %18, i64 %115
  br i1 %.not136.not.us, label %129, label %117

117:                                              ; preds = %114
  %118 = getelementptr i8, ptr %116, i64 4
  %119 = load i8, ptr %118, align 1, !tbaa !5, !range !16, !noundef !17
  %120 = trunc nuw i8 %119 to i1
  br i1 %120, label %.thread.sink.split.sink.split, label %121

121:                                              ; preds = %117
  %122 = getelementptr i8, ptr %116, i64 5
  %123 = load i8, ptr %122, align 1, !tbaa !5, !range !16, !noundef !17
  %124 = trunc nuw i8 %123 to i1
  br i1 %124, label %.thread.sink.split.sink.split, label %.preheader159.us

._crit_edge186.us:                                ; preds = %.lr.ph185.us.preheader, %.preheader159.us
  %125 = sext i32 %storemerge135191.us to i64
  %126 = getelementptr inbounds i8, ptr %19, i64 %125
  store i8 1, ptr %126, align 1, !tbaa !5
  %127 = getelementptr i8, ptr %126, i64 1
  store i8 0, ptr %127, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #10
  store i32 %storemerge135191.us, ptr %6, align 4, !tbaa !9
  %128 = add nsw i32 %storemerge135191.us, 1
  br label %141

129:                                              ; preds = %114
  %130 = getelementptr i8, ptr %116, i64 -1
  %131 = load i8, ptr %130, align 1, !tbaa !5, !range !16, !noundef !17
  %132 = trunc nuw i8 %131 to i1
  br i1 %132, label %.thread.sink.split.sink.split, label %133

133:                                              ; preds = %129
  %134 = getelementptr i8, ptr %116, i64 -2
  %135 = load i8, ptr %134, align 1, !tbaa !5, !range !16, !noundef !17
  %136 = trunc nuw i8 %135 to i1
  br i1 %136, label %.thread.sink.split.sink.split, label %.preheader.us

._crit_edge190.us:                                ; preds = %.lr.ph189.us.preheader, %.preheader.us
  %137 = sext i32 %storemerge135191.us to i64
  %138 = getelementptr i8, ptr %19, i64 %137
  %139 = getelementptr i8, ptr %138, i64 1
  store i8 1, ptr %139, align 1, !tbaa !5
  store i8 0, ptr %138, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #10
  %140 = add nsw i32 %storemerge135191.us, 1
  store i32 %140, ptr %6, align 4, !tbaa !9
  br label %141

141:                                              ; preds = %._crit_edge190.us, %._crit_edge186.us
  %storemerge146.us = phi i32 [ %storemerge135191.us, %._crit_edge190.us ], [ %128, %._crit_edge186.us ]
  store i32 %storemerge146.us, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %9, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %8)
  store i32 0, ptr %142, align 4, !tbaa !19
  %143 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %9)
  store i32 1, ptr %143, align 4, !tbaa !19
  %144 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %8)
  store i32 1, ptr %144, align 4, !tbaa !21
  %145 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %9)
  %.not147.us = icmp eq i64 %145, 0
  %146 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %9)
  %. = select i1 %.not147.us, i32 0, i32 2
  store i32 %., ptr %146, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #10
  br label %206

147:                                              ; preds = %._crit_edge180.us
  %148 = sext i32 %storemerge135191.us to i64
  %149 = getelementptr inbounds i8, ptr %19, i64 %148
  store i8 0, ptr %149, align 1, !tbaa !5
  %150 = getelementptr i8, ptr %149, i64 1
  store i8 0, ptr %150, align 1, !tbaa !5
  br i1 %112, label %152, label %151

151:                                              ; preds = %147
  store i8 1, ptr %149, align 1, !tbaa !5
  br i1 %113, label %.thread, label %.thread.sink.split

152:                                              ; preds = %147
  br i1 %113, label %.thread, label %.thread.sink.split

.thread.sink.split.sink.split:                    ; preds = %129, %133, %117, %121
  %153 = sext i32 %storemerge135191.us to i64
  %154 = getelementptr inbounds i8, ptr %19, i64 %153
  store i8 1, ptr %154, align 1, !tbaa !5
  %155 = getelementptr i8, ptr %154, i64 1
  br label %.thread.sink.split

.thread.sink.split:                               ; preds = %.thread.sink.split.sink.split, %152, %151, %._crit_edge180.us.thread
  %.sink275 = phi ptr [ %105, %._crit_edge180.us.thread ], [ %150, %151 ], [ %150, %152 ], [ %155, %.thread.sink.split.sink.split ]
  %.ph = phi i1 [ true, %._crit_edge180.us.thread ], [ false, %151 ], [ false, %152 ], [ %113, %.thread.sink.split.sink.split ]
  %.ph274 = phi i1 [ false, %._crit_edge180.us.thread ], [ false, %151 ], [ true, %152 ], [ %112, %.thread.sink.split.sink.split ]
  store i8 1, ptr %.sink275, align 1, !tbaa !5
  br label %.thread

.thread:                                          ; preds = %.thread.sink.split, %._crit_edge180.us.thread, %151, %152
  %156 = phi i1 [ true, %152 ], [ true, %151 ], [ true, %._crit_edge180.us.thread ], [ %.ph, %.thread.sink.split ]
  %157 = phi i1 [ true, %152 ], [ false, %151 ], [ true, %._crit_edge180.us.thread ], [ %.ph274, %.thread.sink.split ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %10, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #10
  %158 = load i32, ptr %4, align 4, !tbaa !9
  %159 = add nsw i32 %158, 1
  store i32 %159, ptr %12, align 4, !tbaa !9
  call void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %11, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %12)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #10
  br i1 %157, label %172, label %160

160:                                              ; preds = %.thread
  %161 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %10)
  %.not141.us = icmp eq i64 %161, 0
  br i1 %.not141.us, label %170, label %162

162:                                              ; preds = %160
  %163 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %10)
  %.not142.us = icmp eq i64 %163, 0
  %164 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %10)
  br i1 %.not142.us, label %169, label %165

165:                                              ; preds = %162
  store i32 2, ptr %164, align 4, !tbaa !21
  %166 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %167 = load i32, ptr %166, align 4, !tbaa !19
  %168 = icmp eq i32 %167, 1
  br i1 %168, label %172, label %.split.us

169:                                              ; preds = %162
  store i32 3, ptr %164, align 4, !tbaa !21
  br label %172

170:                                              ; preds = %160
  %171 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %10)
  store i32 0, ptr %171, align 4, !tbaa !21
  br label %172

172:                                              ; preds = %170, %169, %165, %.thread
  br i1 %156, label %182, label %173

173:                                              ; preds = %172
  %174 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %.not144.us = icmp eq i64 %174, 0
  br i1 %.not144.us, label %.sink.split, label %175

175:                                              ; preds = %173
  %176 = call noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %.not145.us = icmp eq i64 %176, 0
  br i1 %.not145.us, label %.sink.split, label %177

177:                                              ; preds = %175
  %178 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %25, ptr noundef nonnull align 4 dereferenceable(8) %11)
  %179 = load i32, ptr %178, align 4, !tbaa !19
  %180 = icmp eq i32 %179, 1
  br i1 %180, label %.sink.split, label %.split215.us

.sink.split:                                      ; preds = %173, %175, %177
  %.sink276 = phi i32 [ 2, %177 ], [ 3, %175 ], [ 0, %173 ]
  %181 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %11)
  store i32 %.sink276, ptr %181, align 4, !tbaa !21
  br label %182

182:                                              ; preds = %.sink.split, %172
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #10
  br label %206

183:                                              ; preds = %.lr.ph179.us
  %184 = add nuw i32 %.0118176.us, 1
  %indvars.iv.next252 = add nuw nsw i64 %indvars.iv251, 1
  %exitcond254.not = icmp eq i32 %184, %108
  br i1 %exitcond254.not, label %._crit_edge180.us, label %.lr.ph179.us, !llvm.loop !23

185:                                              ; preds = %.lr.ph172.us
  %186 = add nuw i32 %.0122169.us, 1
  %indvars.iv.next249 = add nsw i64 %indvars.iv248, -1
  %exitcond.not = icmp eq i32 %.0122169.us, %spec.select.us
  br i1 %exitcond.not, label %._crit_edge173.us, label %.lr.ph172.us, !llvm.loop !24

187:                                              ; preds = %78
  %188 = sext i32 %79 to i64
  %189 = getelementptr inbounds i8, ptr %18, i64 %188
  %190 = load i8, ptr %189, align 1, !tbaa !5, !range !16, !noundef !17
  %191 = trunc nuw i8 %190 to i1
  br i1 %191, label %201, label %192

192:                                              ; preds = %187
  %193 = or disjoint i32 %79, 1
  %194 = sext i32 %193 to i64
  %195 = getelementptr inbounds i8, ptr %18, i64 %194
  %196 = load i8, ptr %195, align 1, !tbaa !5, !range !16, !noundef !17
  %197 = trunc nuw i8 %196 to i1
  br i1 %197, label %201, label %198

198:                                              ; preds = %192
  %199 = sext i32 %storemerge135191.us to i64
  %200 = getelementptr inbounds i8, ptr %19, i64 %199
  store i8 0, ptr %200, align 1, !tbaa !5
  br label %206

201:                                              ; preds = %192, %187
  %202 = sext i32 %storemerge135191.us to i64
  %203 = getelementptr inbounds i8, ptr %19, i64 %202
  store i8 1, ptr %203, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #10
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %5, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %204 = call noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.not148.us = icmp eq i64 %204, 0
  %205 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48) %26, ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.281 = select i1 %.not148.us, i32 0, i32 3
  store i32 %.281, ptr %205, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #10
  br label %206

206:                                              ; preds = %201, %198, %182, %141, %82
  %207 = load i32, ptr %4, align 4, !tbaa !9
  %208 = add nsw i32 %207, 1
  store i32 %208, ptr %4, align 4, !tbaa !9
  %209 = icmp slt i32 %208, %33
  br i1 %209, label %78, label %._crit_edge195.us, !llvm.loop !25

.lr.ph168.us:                                     ; preds = %.lr.ph168.us.preheader, %.lr.ph168.us
  %indvars.iv245 = phi i64 [ %225, %.lr.ph168.us.preheader ], [ %indvars.iv.next246, %.lr.ph168.us ]
  %210 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv245
  store i8 1, ptr %210, align 1, !tbaa !5
  %indvars.iv.next246 = add nuw nsw i64 %indvars.iv245, 1
  %211 = call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv265) #10
  %212 = call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %211)
  %213 = add i32 %212, %.0121212.us
  %214 = trunc nsw i64 %indvars.iv.next246 to i32
  %215 = icmp ugt i32 %213, %214
  br i1 %215, label %.lr.ph168.us, label %.lr.ph207.us, !llvm.loop !26

.preheader.us:                                    ; preds = %133
  %.not137187.us = icmp slt i32 %storemerge135191.us, 0
  br i1 %.not137187.us, label %._crit_edge190.us, label %.lr.ph189.us.preheader

.lr.ph189.us.preheader:                           ; preds = %.preheader.us
  %smax = call i32 @llvm.smax.i32(i32 %85, i32 0)
  %narrow = add nuw i32 %smax, 1
  %216 = zext i32 %narrow to i64
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %18, i8 0, i64 %216, i1 false), !tbaa !5
  br label %._crit_edge190.us

.preheader159.us:                                 ; preds = %121
  %217 = icmp ult i32 %96, %1
  br i1 %217, label %.lr.ph185.us.preheader, label %._crit_edge186.us

.lr.ph185.us.preheader:                           ; preds = %.preheader159.us
  %218 = sub i32 %28, %79
  %219 = zext i32 %218 to i64
  %220 = add nuw nsw i64 %219, 1
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %98, i8 0, i64 %220, i1 false), !tbaa !5
  br label %._crit_edge186.us

.preheader160.us:                                 ; preds = %.lr.ph.us.preheader, %.preheader161.us
  %221 = call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv265) #10
  %222 = call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %221)
  %223 = add i32 %222, %.0121212.us
  %224 = icmp ult i32 %.0121212.us, %223
  br i1 %224, label %.lr.ph168.us.preheader, label %.lr.ph207.us

.lr.ph168.us.preheader:                           ; preds = %.preheader160.us
  %225 = sext i32 %.0121212.us to i64
  br label %.lr.ph168.us

.lr.ph194.us:                                     ; preds = %32
  %226 = add nsw i32 %33, -1
  br label %78

._crit_edge208.us:                                ; preds = %._crit_edge201.us.thread
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #10
  %indvars.iv.next266 = add nuw nsw i64 %indvars.iv265, 1
  %227 = call noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #10
  %228 = icmp ugt i64 %227, %indvars.iv.next266
  br i1 %228, label %.preheader161.us, label %._crit_edge213, !llvm.loop !27

.preheader161.lr.ph.split:                        ; preds = %.preheader161.lr.ph
  br i1 %.not226, label %.preheader161, label %.preheader161.us216

.preheader161.us216:                              ; preds = %.preheader161.lr.ph.split, %._crit_edge.us225
  %indvars.iv233 = phi i64 [ %indvars.iv.next234, %._crit_edge.us225 ], [ 0, %.preheader161.lr.ph.split ]
  %.0121212.us217 = phi i32 [ %235, %._crit_edge.us225 ], [ 0, %.preheader161.lr.ph.split ]
  tail call void @llvm.memset.p0.i64(ptr nonnull align 1 %18, i8 0, i64 %17, i1 false), !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 1 %19, i8 0, i64 %17, i1 false), !tbaa !5
  %229 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv233) #10
  %230 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %229)
  %231 = add i32 %230, %.0121212.us217
  %232 = icmp ult i32 %.0121212.us217, %231
  br i1 %232, label %.lr.ph168.us224.preheader, label %._crit_edge.us225

._crit_edge.us225:                                ; preds = %.lr.ph168.us224, %.preheader161.us216
  %233 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv233) #10
  %234 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %233)
  %235 = add i32 %234, %.0121212.us217
  %indvars.iv.next234 = add nuw nsw i64 %indvars.iv233, 1
  %236 = tail call noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #10
  %237 = icmp ugt i64 %236, %indvars.iv.next234
  br i1 %237, label %.preheader161.us216, label %._crit_edge213, !llvm.loop !27

.lr.ph168.us224:                                  ; preds = %.lr.ph168.us224.preheader, %.lr.ph168.us224
  %indvars.iv = phi i64 [ %244, %.lr.ph168.us224.preheader ], [ %indvars.iv.next, %.lr.ph168.us224 ]
  %238 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv
  store i8 1, ptr %238, align 1, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %239 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv233) #10
  %240 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %239)
  %241 = add i32 %240, %.0121212.us217
  %242 = trunc nsw i64 %indvars.iv.next to i32
  %243 = icmp ugt i32 %241, %242
  br i1 %243, label %.lr.ph168.us224, label %._crit_edge.us225, !llvm.loop !26

.lr.ph168.us224.preheader:                        ; preds = %.preheader161.us216
  %244 = sext i32 %.0121212.us217 to i64
  br label %.lr.ph168.us224

.preheader161:                                    ; preds = %.preheader161.lr.ph.split, %._crit_edge
  %indvars.iv239 = phi i64 [ %indvars.iv.next240, %._crit_edge ], [ 0, %.preheader161.lr.ph.split ]
  %.0121212 = phi i32 [ %252, %._crit_edge ], [ 0, %.preheader161.lr.ph.split ]
  %245 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv239) #10
  %246 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %245)
  %247 = add i32 %246, %.0121212
  %248 = icmp ult i32 %.0121212, %247
  br i1 %248, label %.lr.ph168.preheader, label %._crit_edge

.lr.ph168.preheader:                              ; preds = %.preheader161
  %249 = sext i32 %.0121212 to i64
  br label %.lr.ph168

._crit_edge:                                      ; preds = %.lr.ph168, %.preheader161
  %250 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv239) #10
  %251 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %250)
  %252 = add i32 %251, %.0121212
  %indvars.iv.next240 = add nuw nsw i64 %indvars.iv239, 1
  %253 = tail call noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #10
  %254 = icmp ugt i64 %253, %indvars.iv.next240
  br i1 %254, label %.preheader161, label %._crit_edge213, !llvm.loop !27

.lr.ph168:                                        ; preds = %.lr.ph168.preheader, %.lr.ph168
  %indvars.iv236 = phi i64 [ %249, %.lr.ph168.preheader ], [ %indvars.iv.next237, %.lr.ph168 ]
  %255 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv236
  store i8 1, ptr %255, align 1, !tbaa !5
  %indvars.iv.next237 = add nuw nsw i64 %indvars.iv236, 1
  %256 = tail call noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv239) #10
  %257 = tail call noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5) %256)
  %258 = add i32 %257, %.0121212
  %259 = trunc nsw i64 %indvars.iv.next237 to i32
  %260 = icmp ugt i32 %258, %259
  br i1 %260, label %.lr.ph168, label %._crit_edge, !llvm.loop !26

.split.us:                                        ; preds = %165
  call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 778, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj) #11
  unreachable

.split215.us:                                     ; preds = %177
  call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 793, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN11CompilerART27generate_art_signals_sparseEj) #11
  unreachable

._crit_edge213:                                   ; preds = %._crit_edge.us225, %._crit_edge, %._crit_edge208.us, %2
  call void @_ZdaPv(ptr noundef nonnull %18) #12
  call void @_ZdaPv(ptr noundef nonnull %19) #12
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IjEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt5log10IiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiRjTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS5_S6_EEEbE4typeELb1EEEOS5_OS6_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE13adderconfig_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNKSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEE5countERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapISt4pairIiiE4fl_tSt4lessIS1_ESaIS0_IKS1_S2_EEEixERS5_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt3mapISt4pairIiiEbSt4lessIS1_ESaIS0_IKS1_bEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI8SparseVNSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(5) ptr @_ZNSt6vectorI8SparseVNSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN8SparseVN11get_VN_SizeEv(ptr noundef nonnull align 4 dereferenceable(5)) local_unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #7

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #8

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #8

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #8 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { nounwind }
attributes #11 = { noreturn nounwind }
attributes #12 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12, !13, !14}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !12}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !12, !14, !13}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS4fl_t", !7, i64 0}
!21 = !{!22, !22, i64 0}
!22 = !{!"_ZTS13adderconfig_t", !7, i64 0}
!23 = distinct !{!23, !12}
!24 = distinct !{!24, !12}
!25 = distinct !{!25, !12}
!26 = distinct !{!26, !12}
!27 = distinct !{!27, !12}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass