; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (GetOscConfig)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RCC_OscInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.RCC_PLLInitTypeDef }
%struct.RCC_PLLInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

declare i32 @HAL_GetREVID() #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RCC_GetOscConfig(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %3, i32 0, i32 0
  store i32 63, ptr %4, align 4, !tbaa !9
  %5 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %6 = zext i32 %5 to i64
  %7 = and i64 %6, 262144
  %8 = icmp eq i64 %7, 262144
  br i1 %8, label %9, label %12

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %10, i32 0, i32 1
  store i32 327680, ptr %11, align 4, !tbaa !15
  br label %24

12:                                               ; preds = %1
  %13 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %14 = zext i32 %13 to i64
  %15 = and i64 %14, 65536
  %16 = icmp eq i64 %15, 65536
  br i1 %16, label %17, label %20

17:                                               ; preds = %12
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %18, i32 0, i32 1
  store i32 65536, ptr %19, align 4, !tbaa !15
  br label %23

20:                                               ; preds = %12
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %21, i32 0, i32 1
  store i32 0, ptr %22, align 4, !tbaa !15
  br label %23

23:                                               ; preds = %20, %17
  br label %24

24:                                               ; preds = %23, %9
  %25 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %26 = zext i32 %25 to i64
  %27 = and i64 %26, 128
  %28 = icmp eq i64 %27, 128
  br i1 %28, label %29, label %32

29:                                               ; preds = %24
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %30, i32 0, i32 7
  store i32 128, ptr %31, align 4, !tbaa !16
  br label %35

32:                                               ; preds = %24
  %33 = load ptr, ptr %2, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %33, i32 0, i32 7
  store i32 0, ptr %34, align 4, !tbaa !16
  br label %35

35:                                               ; preds = %32, %29
  %36 = call i32 @HAL_GetREVID()
  %37 = icmp ule i32 %36, 4099
  br i1 %37, label %38, label %44

38:                                               ; preds = %35
  %39 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 1), align 4, !tbaa !17
  %40 = and i32 %39, 2080374784
  %41 = lshr i32 %40, 26
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %42, i32 0, i32 8
  store i32 %41, ptr %43, align 4, !tbaa !18
  br label %52

44:                                               ; preds = %35
  %45 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 3), align 4, !tbaa !19
  %46 = zext i32 %45 to i64
  %47 = and i64 %46, 1056964608
  %48 = lshr i64 %47, 24
  %49 = trunc i64 %48 to i32
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %50, i32 0, i32 8
  store i32 %49, ptr %51, align 4, !tbaa !18
  br label %52

52:                                               ; preds = %44, %38
  %53 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %54 = zext i32 %53 to i64
  %55 = and i64 %54, 1
  %56 = icmp eq i64 %55, 1
  br i1 %56, label %57, label %60

57:                                               ; preds = %52
  %58 = load ptr, ptr %2, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %58, i32 0, i32 3
  store i32 1, ptr %59, align 4, !tbaa !20
  br label %63

60:                                               ; preds = %52
  %61 = load ptr, ptr %2, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %61, i32 0, i32 3
  store i32 0, ptr %62, align 4, !tbaa !20
  br label %63

63:                                               ; preds = %60, %57
  %64 = call i32 @HAL_GetREVID()
  %65 = icmp ule i32 %64, 4099
  br i1 %65, label %66, label %72

66:                                               ; preds = %63
  %67 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 1), align 4, !tbaa !17
  %68 = and i32 %67, 258048
  %69 = lshr i32 %68, 12
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %70, i32 0, i32 4
  store i32 %69, ptr %71, align 4, !tbaa !21
  br label %80

72:                                               ; preds = %63
  %73 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 1), align 4, !tbaa !17
  %74 = zext i32 %73 to i64
  %75 = and i64 %74, 2130706432
  %76 = lshr i64 %75, 24
  %77 = trunc i64 %76 to i32
  %78 = load ptr, ptr %2, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %78, i32 0, i32 4
  store i32 %77, ptr %79, align 4, !tbaa !21
  br label %80

80:                                               ; preds = %72, %66
  %81 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 28), align 4, !tbaa !22
  %82 = zext i32 %81 to i64
  %83 = and i64 %82, 4
  %84 = icmp eq i64 %83, 4
  br i1 %84, label %85, label %88

85:                                               ; preds = %80
  %86 = load ptr, ptr %2, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %86, i32 0, i32 2
  store i32 5, ptr %87, align 4, !tbaa !23
  br label %100

88:                                               ; preds = %80
  %89 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 28), align 4, !tbaa !22
  %90 = zext i32 %89 to i64
  %91 = and i64 %90, 1
  %92 = icmp eq i64 %91, 1
  br i1 %92, label %93, label %96

93:                                               ; preds = %88
  %94 = load ptr, ptr %2, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %94, i32 0, i32 2
  store i32 1, ptr %95, align 4, !tbaa !23
  br label %99

96:                                               ; preds = %88
  %97 = load ptr, ptr %2, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %97, i32 0, i32 2
  store i32 0, ptr %98, align 4, !tbaa !23
  br label %99

99:                                               ; preds = %96, %93
  br label %100

100:                                              ; preds = %99, %85
  %101 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 29), align 4, !tbaa !24
  %102 = zext i32 %101 to i64
  %103 = and i64 %102, 1
  %104 = icmp eq i64 %103, 1
  br i1 %104, label %105, label %108

105:                                              ; preds = %100
  %106 = load ptr, ptr %2, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %106, i32 0, i32 5
  store i32 1, ptr %107, align 4, !tbaa !25
  br label %111

108:                                              ; preds = %100
  %109 = load ptr, ptr %2, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %109, i32 0, i32 5
  store i32 0, ptr %110, align 4, !tbaa !25
  br label %111

111:                                              ; preds = %108, %105
  %112 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %113 = zext i32 %112 to i64
  %114 = and i64 %113, 4096
  %115 = icmp eq i64 %114, 4096
  br i1 %115, label %116, label %119

116:                                              ; preds = %111
  %117 = load ptr, ptr %2, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %117, i32 0, i32 6
  store i32 1, ptr %118, align 4, !tbaa !26
  br label %122

119:                                              ; preds = %111
  %120 = load ptr, ptr %2, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %120, i32 0, i32 6
  store i32 0, ptr %121, align 4, !tbaa !26
  br label %122

122:                                              ; preds = %119, %116
  %123 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 4, !tbaa !13
  %124 = zext i32 %123 to i64
  %125 = and i64 %124, 16777216
  %126 = icmp eq i64 %125, 16777216
  br i1 %126, label %127, label %131

127:                                              ; preds = %122
  %128 = load ptr, ptr %2, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %128, i32 0, i32 9
  %130 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %129, i32 0, i32 0
  store i32 2, ptr %130, align 4, !tbaa !27
  br label %135

131:                                              ; preds = %122
  %132 = load ptr, ptr %2, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %132, i32 0, i32 9
  %134 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %133, i32 0, i32 0
  store i32 1, ptr %134, align 4, !tbaa !27
  br label %135

135:                                              ; preds = %131, %127
  %136 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 10), align 4, !tbaa !28
  %137 = zext i32 %136 to i64
  %138 = and i64 %137, 3
  %139 = trunc i64 %138 to i32
  %140 = load ptr, ptr %2, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %140, i32 0, i32 9
  %142 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %141, i32 0, i32 1
  store i32 %139, ptr %142, align 4, !tbaa !29
  %143 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 10), align 4, !tbaa !28
  %144 = zext i32 %143 to i64
  %145 = and i64 %144, 1008
  %146 = lshr i64 %145, 4
  %147 = trunc i64 %146 to i32
  %148 = load ptr, ptr %2, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %148, i32 0, i32 9
  %150 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %149, i32 0, i32 2
  store i32 %147, ptr %150, align 4, !tbaa !30
  %151 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 12), align 4, !tbaa !31
  %152 = zext i32 %151 to i64
  %153 = and i64 %152, 511
  %154 = lshr i64 %153, 0
  %155 = trunc i64 %154 to i32
  %156 = add i32 %155, 1
  %157 = load ptr, ptr %2, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %157, i32 0, i32 9
  %159 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %158, i32 0, i32 3
  store i32 %156, ptr %159, align 4, !tbaa !32
  %160 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 12), align 4, !tbaa !31
  %161 = zext i32 %160 to i64
  %162 = and i64 %161, 2130706432
  %163 = lshr i64 %162, 24
  %164 = trunc i64 %163 to i32
  %165 = add i32 %164, 1
  %166 = load ptr, ptr %2, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %166, i32 0, i32 9
  %168 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %167, i32 0, i32 6
  store i32 %165, ptr %168, align 4, !tbaa !33
  %169 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 12), align 4, !tbaa !31
  %170 = zext i32 %169 to i64
  %171 = and i64 %170, 65024
  %172 = lshr i64 %171, 9
  %173 = trunc i64 %172 to i32
  %174 = add i32 %173, 1
  %175 = load ptr, ptr %2, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %175, i32 0, i32 9
  %177 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %176, i32 0, i32 4
  store i32 %174, ptr %177, align 4, !tbaa !34
  %178 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 12), align 4, !tbaa !31
  %179 = zext i32 %178 to i64
  %180 = and i64 %179, 8323072
  %181 = lshr i64 %180, 16
  %182 = trunc i64 %181 to i32
  %183 = add i32 %182, 1
  %184 = load ptr, ptr %2, align 8, !tbaa !5
  %185 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %184, i32 0, i32 9
  %186 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %185, i32 0, i32 5
  store i32 %183, ptr %186, align 4, !tbaa !35
  %187 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 11), align 4, !tbaa !36
  %188 = zext i32 %187 to i64
  %189 = and i64 %188, 12
  %190 = trunc i64 %189 to i32
  %191 = load ptr, ptr %2, align 8, !tbaa !5
  %192 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %191, i32 0, i32 9
  %193 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %192, i32 0, i32 7
  store i32 %190, ptr %193, align 4, !tbaa !37
  %194 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 11), align 4, !tbaa !36
  %195 = zext i32 %194 to i64
  %196 = and i64 %195, 2
  %197 = lshr i64 %196, 1
  %198 = trunc i64 %197 to i32
  %199 = load ptr, ptr %2, align 8, !tbaa !5
  %200 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %199, i32 0, i32 9
  %201 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %200, i32 0, i32 8
  store i32 %198, ptr %201, align 4, !tbaa !38
  %202 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 13), align 4, !tbaa !39
  %203 = zext i32 %202 to i64
  %204 = and i64 %203, 65528
  %205 = lshr i64 %204, 3
  %206 = trunc i64 %205 to i32
  %207 = load ptr, ptr %2, align 8, !tbaa !5
  %208 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %207, i32 0, i32 9
  %209 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %208, i32 0, i32 9
  store i32 %206, ptr %209, align 4, !tbaa !40
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !12, i64 36}
!11 = !{!"int", !7, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !7, i64 172, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !11, i64 232, !11, i64 236, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !11, i64 284, !7, i64 288}
!15 = !{!10, !11, i64 4}
!16 = !{!10, !11, i64 28}
!17 = !{!14, !11, i64 4}
!18 = !{!10, !11, i64 32}
!19 = !{!14, !11, i64 12}
!20 = !{!10, !11, i64 12}
!21 = !{!10, !11, i64 16}
!22 = !{!14, !11, i64 112}
!23 = !{!10, !11, i64 8}
!24 = !{!14, !11, i64 116}
!25 = !{!10, !11, i64 20}
!26 = !{!10, !11, i64 24}
!27 = !{!10, !11, i64 36}
!28 = !{!14, !11, i64 40}
!29 = !{!10, !11, i64 40}
!30 = !{!10, !11, i64 44}
!31 = !{!14, !11, i64 48}
!32 = !{!10, !11, i64 48}
!33 = !{!10, !11, i64 60}
!34 = !{!10, !11, i64 52}
!35 = !{!10, !11, i64 56}
!36 = !{!14, !11, i64 44}
!37 = !{!10, !11, i64 64}
!38 = !{!10, !11, i64 68}
!39 = !{!14, !11, i64 52}
!40 = !{!10, !11, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetREVID() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_RCC_GetOscConfig(ptr nocapture noundef writeonly %0) local_unnamed_addr #1 {
  store i32 63, ptr %0, align 4, !tbaa !5
  %2 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %3 = and i32 %2, 262144
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %6, label %4

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 327680, ptr %5, align 4, !tbaa !13
  br label %12

6:                                                ; preds = %1
  %7 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %8 = and i32 %7, 65536
  %.not30 = icmp eq i32 %8, 0
  %9 = getelementptr inbounds i8, ptr %0, i64 4
  br i1 %.not30, label %11, label %10

10:                                               ; preds = %6
  store i32 65536, ptr %9, align 4, !tbaa !13
  br label %12

11:                                               ; preds = %6
  store i32 0, ptr %9, align 4, !tbaa !13
  br label %12

12:                                               ; preds = %10, %11, %4
  %13 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %14 = and i32 %13, 128
  %15 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %14, ptr %15, align 4
  %16 = tail call i32 @HAL_GetREVID() #2
  %17 = icmp ult i32 %16, 4100
  %. = select i1 %17, ptr inttoptr (i64 1476543492 to ptr), ptr inttoptr (i64 1476543500 to ptr)
  %.52 = select i1 %17, i32 26, i32 24
  %.53 = select i1 %17, i32 31, i32 63
  %18 = load volatile i32, ptr %., align 4, !tbaa !14
  %19 = lshr i32 %18, %.52
  %20 = and i32 %19, %.53
  %21 = getelementptr inbounds i8, ptr %0, i64 32
  store i32 %20, ptr %21, align 4
  %22 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %23 = and i32 %22, 1
  %24 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 %23, ptr %24, align 4
  %25 = tail call i32 @HAL_GetREVID() #2
  %26 = icmp ult i32 %25, 4100
  %.sink50 = select i1 %26, i32 12, i32 24
  %.sink48 = select i1 %26, i32 63, i32 127
  %27 = load volatile i32, ptr inttoptr (i64 1476543492 to ptr), align 4, !tbaa !15
  %28 = lshr i32 %27, %.sink50
  %29 = and i32 %28, %.sink48
  %30 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 %29, ptr %30, align 4
  %31 = load volatile i32, ptr inttoptr (i64 1476543600 to ptr), align 16, !tbaa !16
  %32 = and i32 %31, 4
  %.not33 = icmp eq i32 %32, 0
  br i1 %.not33, label %35, label %33

33:                                               ; preds = %12
  %34 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 5, ptr %34, align 4, !tbaa !17
  br label %41

35:                                               ; preds = %12
  %36 = load volatile i32, ptr inttoptr (i64 1476543600 to ptr), align 16, !tbaa !16
  %37 = and i32 %36, 1
  %.not34 = icmp eq i32 %37, 0
  %38 = getelementptr inbounds i8, ptr %0, i64 8
  br i1 %.not34, label %40, label %39

39:                                               ; preds = %35
  store i32 1, ptr %38, align 4, !tbaa !17
  br label %41

40:                                               ; preds = %35
  store i32 0, ptr %38, align 4, !tbaa !17
  br label %41

41:                                               ; preds = %39, %40, %33
  %42 = load volatile i32, ptr inttoptr (i64 1476543604 to ptr), align 4, !tbaa !18
  %43 = and i32 %42, 1
  %44 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %43, ptr %44, align 4
  %45 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %46 = lshr i32 %45, 12
  %.lobit = and i32 %46, 1
  %47 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 %.lobit, ptr %47, align 4
  %48 = load volatile i32, ptr inttoptr (i64 1476543488 to ptr), align 1024, !tbaa !11
  %49 = and i32 %48, 16777216
  %.not37 = icmp eq i32 %49, 0
  %.sink43 = select i1 %.not37, i32 1, i32 2
  %50 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 %.sink43, ptr %50, align 4
  %51 = load volatile i32, ptr inttoptr (i64 1476543528 to ptr), align 8, !tbaa !19
  %52 = and i32 %51, 3
  %53 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 %52, ptr %53, align 4, !tbaa !20
  %54 = load volatile i32, ptr inttoptr (i64 1476543528 to ptr), align 8, !tbaa !19
  %55 = lshr i32 %54, 4
  %56 = and i32 %55, 63
  %57 = getelementptr inbounds i8, ptr %0, i64 44
  store i32 %56, ptr %57, align 4, !tbaa !21
  %58 = load volatile i32, ptr inttoptr (i64 1476543536 to ptr), align 16, !tbaa !22
  %59 = and i32 %58, 511
  %60 = add nuw nsw i32 %59, 1
  %61 = getelementptr inbounds i8, ptr %0, i64 48
  store i32 %60, ptr %61, align 4, !tbaa !23
  %62 = load volatile i32, ptr inttoptr (i64 1476543536 to ptr), align 16, !tbaa !22
  %63 = lshr i32 %62, 24
  %64 = and i32 %63, 127
  %65 = add nuw nsw i32 %64, 1
  %66 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 %65, ptr %66, align 4, !tbaa !24
  %67 = load volatile i32, ptr inttoptr (i64 1476543536 to ptr), align 16, !tbaa !22
  %68 = lshr i32 %67, 9
  %69 = and i32 %68, 127
  %70 = add nuw nsw i32 %69, 1
  %71 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %70, ptr %71, align 4, !tbaa !25
  %72 = load volatile i32, ptr inttoptr (i64 1476543536 to ptr), align 16, !tbaa !22
  %73 = lshr i32 %72, 16
  %74 = and i32 %73, 127
  %75 = add nuw nsw i32 %74, 1
  %76 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %75, ptr %76, align 4, !tbaa !26
  %77 = load volatile i32, ptr inttoptr (i64 1476543532 to ptr), align 4, !tbaa !27
  %78 = and i32 %77, 12
  %79 = getelementptr inbounds i8, ptr %0, i64 64
  store i32 %78, ptr %79, align 4, !tbaa !28
  %80 = load volatile i32, ptr inttoptr (i64 1476543532 to ptr), align 4, !tbaa !27
  %81 = lshr i32 %80, 1
  %82 = and i32 %81, 1
  %83 = getelementptr inbounds i8, ptr %0, i64 68
  store i32 %82, ptr %83, align 4, !tbaa !29
  %84 = load volatile i32, ptr inttoptr (i64 1476543540 to ptr), align 4, !tbaa !30
  %85 = lshr i32 %84, 3
  %86 = and i32 %85, 8191
  %87 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 %86, ptr %87, align 4, !tbaa !31
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !10, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36}
!11 = !{!12, !7, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!13 = !{!6, !7, i64 4}
!14 = !{!7, !7, i64 0}
!15 = !{!12, !7, i64 4}
!16 = !{!12, !7, i64 112}
!17 = !{!6, !7, i64 8}
!18 = !{!12, !7, i64 116}
!19 = !{!12, !7, i64 40}
!20 = !{!6, !7, i64 40}
!21 = !{!6, !7, i64 44}
!22 = !{!12, !7, i64 48}
!23 = !{!6, !7, i64 48}
!24 = !{!6, !7, i64 60}
!25 = !{!6, !7, i64 52}
!26 = !{!6, !7, i64 56}
!27 = !{!12, !7, i64 44}
!28 = !{!6, !7, i64 64}
!29 = !{!6, !7, i64 68}
!30 = !{!12, !7, i64 52}
!31 = !{!6, !7, i64 72}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass