; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (fmc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FMC_Bank3_TypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.FMC_NAND_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @FMC_NAND_Init(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.FMC_Bank3_TypeDef, ptr %5, i32 0, i32 0
  %7 = load volatile i32, ptr %6, align 4, !tbaa !9
  %8 = and i32 %7, -1048183
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %9, i32 0, i32 1
  %11 = load i32, ptr %10, align 4, !tbaa !12
  %12 = or i32 %11, 8
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %13, i32 0, i32 2
  %15 = load i32, ptr %14, align 4, !tbaa !14
  %16 = or i32 %12, %15
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %17, i32 0, i32 3
  %19 = load i32, ptr %18, align 4, !tbaa !15
  %20 = or i32 %16, %19
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %21, i32 0, i32 4
  %23 = load i32, ptr %22, align 4, !tbaa !16
  %24 = or i32 %20, %23
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %25, i32 0, i32 5
  %27 = load i32, ptr %26, align 4, !tbaa !17
  %28 = shl i32 %27, 9
  %29 = or i32 %24, %28
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %30, i32 0, i32 6
  %32 = load i32, ptr %31, align 4, !tbaa !18
  %33 = shl i32 %32, 13
  %34 = or i32 %29, %33
  %35 = or i32 %8, %34
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.FMC_Bank3_TypeDef, ptr %36, i32 0, i32 0
  store volatile i32 %35, ptr %37, align 4, !tbaa !9
  ret i32 0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 4}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!14 = !{!13, !11, i64 8}
!15 = !{!13, !11, i64 12}
!16 = !{!13, !11, i64 16}
!17 = !{!13, !11, i64 20}
!18 = !{!13, !11, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable
define dso_local noundef i32 @FMC_NAND_Init(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = load volatile i32, ptr %0, align 4, !tbaa !5
  %4 = and i32 %3, -1048191
  %5 = getelementptr inbounds i8, ptr %1, i64 4
  %6 = load <4 x i32>, ptr %5, align 4, !tbaa !10
  %7 = getelementptr inbounds i8, ptr %1, i64 20
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = shl i32 %8, 9
  %10 = getelementptr inbounds i8, ptr %1, i64 24
  %11 = load i32, ptr %10, align 4, !tbaa !13
  %12 = shl i32 %11, 13
  %13 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %6)
  %op.rdx = or i32 %13, %9
  %op.rdx8 = or disjoint i32 %12, 8
  %op.rdx9 = or i32 %op.rdx, %op.rdx8
  %op.rdx10 = or i32 %op.rdx9, %4
  store volatile i32 %op.rdx10, ptr %0, align 4, !tbaa !5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #1

attributes #0 = { nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 20}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24}
!13 = !{!12, !7, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,TailCallElimPass