; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NAND_HandleTypeDef = type { ptr, %struct.FMC_NAND_InitTypeDef, i32, i32, %struct.NAND_DeviceConfigTypeDef }
%struct.FMC_NAND_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.NAND_DeviceConfigTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.FMC_Bank3_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_NAND_Init(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %3
  store i32 1, ptr %4, align 4
  br label %59

11:                                               ; preds = %3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %12, i32 0, i32 3
  %14 = load volatile i32, ptr %13, align 8, !tbaa !9
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %20

16:                                               ; preds = %11
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %17, i32 0, i32 2
  store i32 0, ptr %18, align 4, !tbaa !13
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  call void @HAL_NAND_MspInit(ptr noundef %19)
  br label %20

20:                                               ; preds = %16, %11
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %21, i32 0, i32 0
  %23 = load ptr, ptr %22, align 8, !tbaa !14
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %24, i32 0, i32 1
  %26 = call i32 @FMC_NAND_Init(ptr noundef %23, ptr noundef %25)
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !14
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %31, i32 0, i32 1
  %33 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %32, i32 0, i32 0
  %34 = load i32, ptr %33, align 8, !tbaa !15
  %35 = call i32 @FMC_NAND_CommonSpace_Timing_Init(ptr noundef %29, ptr noundef %30, i32 noundef %34)
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %36, i32 0, i32 0
  %38 = load ptr, ptr %37, align 8, !tbaa !14
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %40, i32 0, i32 1
  %42 = getelementptr inbounds %struct.FMC_NAND_InitTypeDef, ptr %41, i32 0, i32 0
  %43 = load i32, ptr %42, align 8, !tbaa !15
  %44 = call i32 @FMC_NAND_AttributeSpace_Timing_Init(ptr noundef %38, ptr noundef %39, i32 noundef %43)
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !14
  %48 = getelementptr inbounds %struct.FMC_Bank3_TypeDef, ptr %47, i32 0, i32 0
  %49 = load volatile i32, ptr %48, align 4, !tbaa !16
  %50 = zext i32 %49 to i64
  %51 = or i64 %50, 4
  %52 = trunc i64 %51 to i32
  store volatile i32 %52, ptr %48, align 4, !tbaa !16
  %53 = load volatile i32, ptr inttoptr (i64 1375748096 to ptr), align 4, !tbaa !18
  %54 = zext i32 %53 to i64
  %55 = or i64 %54, 2147483648
  %56 = trunc i64 %55 to i32
  store volatile i32 %56, ptr inttoptr (i64 1375748096 to ptr), align 4, !tbaa !18
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.NAND_HandleTypeDef, ptr %57, i32 0, i32 3
  store volatile i32 1, ptr %58, align 8, !tbaa !9
  store i32 0, ptr %4, align 4
  br label %59

59:                                               ; preds = %20, %10
  %60 = load i32, ptr %4, align 4
  ret i32 %60
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_NAND_MspInit(ptr noundef) #0

declare i32 @FMC_NAND_Init(ptr noundef, ptr noundef) #1

declare i32 @FMC_NAND_CommonSpace_Timing_Init(ptr noundef, ptr noundef, i32 noundef) #1

declare i32 @FMC_NAND_AttributeSpace_Timing_Init(ptr noundef, ptr noundef, i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 40}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 36, !12, i64 40, !11, i64 44}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !12, i64 36}
!14 = !{!10, !6, i64 0}
!15 = !{!10, !12, i64 8}
!16 = !{!17, !12, i64 0}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!18 = !{!12, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_NAND_Init(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq ptr %0, null
  br i1 %4, label %26, label %5

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 40
  %7 = load volatile i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %11

9:                                                ; preds = %5
  %10 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 0, ptr %10, align 4, !tbaa !12
  tail call void @HAL_NAND_MspInit(ptr noundef nonnull %0)
  br label %11

11:                                               ; preds = %9, %5
  %12 = load ptr, ptr %0, align 8, !tbaa !13
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  %14 = tail call i32 @FMC_NAND_Init(ptr noundef %12, ptr noundef nonnull %13) #2
  %15 = load ptr, ptr %0, align 8, !tbaa !13
  %16 = load i32, ptr %13, align 8, !tbaa !14
  %17 = tail call i32 @FMC_NAND_CommonSpace_Timing_Init(ptr noundef %15, ptr noundef %1, i32 noundef %16) #2
  %18 = load ptr, ptr %0, align 8, !tbaa !13
  %19 = load i32, ptr %13, align 8, !tbaa !14
  %20 = tail call i32 @FMC_NAND_AttributeSpace_Timing_Init(ptr noundef %18, ptr noundef %2, i32 noundef %19) #2
  %21 = load ptr, ptr %0, align 8, !tbaa !13
  %22 = load volatile i32, ptr %21, align 4, !tbaa !15
  %23 = or i32 %22, 4
  store volatile i32 %23, ptr %21, align 4, !tbaa !15
  %24 = load volatile i32, ptr inttoptr (i64 1375748096 to ptr), align 16384, !tbaa !17
  %25 = or i32 %24, -2147483648
  store volatile i32 %25, ptr inttoptr (i64 1375748096 to ptr), align 16384, !tbaa !17
  store volatile i32 1, ptr %6, align 8, !tbaa !5
  br label %26

26:                                               ; preds = %3, %11
  %.0 = phi i32 [ 0, %11 ], [ 1, %3 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_NAND_MspInit(ptr noundef) local_unnamed_addr #0

declare i32 @FMC_NAND_Init(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @FMC_NAND_CommonSpace_Timing_Init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @FMC_NAND_AttributeSpace_Timing_Init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 40}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 36, !11, i64 40, !10, i64 44}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 36}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !11, i64 8}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!17 = !{!11, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass