; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (LockPin)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPIO_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_GPIO_LockPin(ptr noundef %0, i16 noundef zeroext %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store volatile i32 65536, ptr %6, align 4, !tbaa !11
  %8 = load i16, ptr %5, align 2, !tbaa !9
  %9 = zext i16 %8 to i32
  %10 = load volatile i32, ptr %6, align 4, !tbaa !11
  %11 = or i32 %10, %9
  store volatile i32 %11, ptr %6, align 4, !tbaa !11
  %12 = load volatile i32, ptr %6, align 4, !tbaa !11
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.GPIO_TypeDef, ptr %13, i32 0, i32 7
  store volatile i32 %12, ptr %14, align 4, !tbaa !13
  %15 = load i16, ptr %5, align 2, !tbaa !9
  %16 = zext i16 %15 to i32
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.GPIO_TypeDef, ptr %17, i32 0, i32 7
  store volatile i32 %16, ptr %18, align 4, !tbaa !13
  %19 = load volatile i32, ptr %6, align 4, !tbaa !11
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.GPIO_TypeDef, ptr %20, i32 0, i32 7
  store volatile i32 %19, ptr %21, align 4, !tbaa !13
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.GPIO_TypeDef, ptr %22, i32 0, i32 7
  %24 = load volatile i32, ptr %23, align 4, !tbaa !13
  store volatile i32 %24, ptr %6, align 4, !tbaa !11
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.GPIO_TypeDef, ptr %25, i32 0, i32 7
  %27 = load volatile i32, ptr %26, align 4, !tbaa !13
  %28 = zext i32 %27 to i64
  %29 = and i64 %28, 65536
  %30 = icmp ne i64 %29, 0
  br i1 %30, label %31, label %32

31:                                               ; preds = %2
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %33

32:                                               ; preds = %2
  store i32 1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %33

33:                                               ; preds = %32, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %34 = load i32, ptr %3, align 4
  ret i32 %34
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 28}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !7, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable
define dso_local range(i32 0, 2) i32 @HAL_GPIO_LockPin(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 65536, ptr %3, align 4, !tbaa !5
  %4 = zext i16 %1 to i32
  %.0..0..0..0. = load volatile i32, ptr %3, align 4, !tbaa !5
  %5 = or i32 %.0..0..0..0., %4
  store volatile i32 %5, ptr %3, align 4, !tbaa !5
  %.0..0..0..0.1 = load volatile i32, ptr %3, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 28
  store volatile i32 %.0..0..0..0.1, ptr %6, align 4, !tbaa !9
  store volatile i32 %4, ptr %6, align 4, !tbaa !9
  %.0..0..0..0.2 = load volatile i32, ptr %3, align 4, !tbaa !5
  store volatile i32 %.0..0..0..0.2, ptr %6, align 4, !tbaa !9
  %7 = load volatile i32, ptr %6, align 4, !tbaa !9
  store volatile i32 %7, ptr %3, align 4, !tbaa !5
  %8 = load volatile i32, ptr %6, align 4, !tbaa !9
  %9 = lshr i32 %8, 16
  %.lobit = and i32 %9, 1
  %. = xor i32 %.lobit, 1
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  ret i32 %.
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 28}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass