; LLVM IR from ravireddy07/cpp-book :: src/Subsequences/ChefAndInterestingSubsequences.ll (Z8generateRSt6vectorIxSaIxEES2_iixx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z11is_safe_mulxRx(i64 noundef, ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5) #1 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i64 %4, ptr %11, align 8, !tbaa !11
  store i64 %5, ptr %12, align 8, !tbaa !11
  %13 = load i32, ptr %9, align 4, !tbaa !9
  %14 = load i32, ptr %10, align 4, !tbaa !9
  %15 = icmp eq i32 %13, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %6
  br label %60

17:                                               ; preds = %6
  %18 = load i64, ptr %12, align 8, !tbaa !11
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %21) #2
  %23 = call noundef zeroext i1 @_Z11is_safe_mulxRx(i64 noundef %18, ptr noundef nonnull align 8 dereferenceable(8) %22)
  br i1 %23, label %24, label %52

24:                                               ; preds = %17
  %25 = load ptr, ptr %8, align 8, !tbaa !5
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #2
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %30 = load i64, ptr %12, align 8, !tbaa !11
  %31 = mul nsw i64 %30, %29
  store i64 %31, ptr %12, align 8, !tbaa !11
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load ptr, ptr %8, align 8, !tbaa !5
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = add nsw i32 %34, 1
  %36 = load i32, ptr %10, align 4, !tbaa !9
  %37 = load i64, ptr %11, align 8, !tbaa !11
  %38 = load i64, ptr %12, align 8, !tbaa !11
  call void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %32, ptr noundef nonnull align 8 dereferenceable(24) %33, i32 noundef %35, i32 noundef %36, i64 noundef %37, i64 noundef %38)
  %39 = load i64, ptr %12, align 8, !tbaa !11
  %40 = load i64, ptr %11, align 8, !tbaa !11
  %41 = icmp sle i64 %39, %40
  br i1 %41, label %42, label %44

42:                                               ; preds = %24
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) %43, ptr noundef nonnull align 8 dereferenceable(8) %12)
  br label %44

44:                                               ; preds = %42, %24
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #2
  %49 = load i64, ptr %48, align 8, !tbaa !11
  %50 = load i64, ptr %12, align 8, !tbaa !11
  %51 = sdiv i64 %50, %49
  store i64 %51, ptr %12, align 8, !tbaa !11
  br label %52

52:                                               ; preds = %44, %17
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = load i64, ptr %11, align 8, !tbaa !11
  %59 = load i64, ptr %12, align 8, !tbaa !11
  call void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %53, ptr noundef nonnull align 8 dereferenceable(24) %54, i32 noundef %56, i32 noundef %57, i64 noundef %58, i64 noundef %59)
  br label %60

60:                                               ; preds = %52, %16
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z11is_safe_mulxRx(i64 noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5) local_unnamed_addr #1 {
  %7 = alloca i64, align 8
  store i64 %5, ptr %7, align 8, !tbaa !5
  %8 = icmp eq i32 %2, %3
  br i1 %8, label %26, label %9

9:                                                ; preds = %6
  %10 = sext i32 %2 to i64
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #2
  %12 = tail call noundef zeroext i1 @_Z11is_safe_mulxRx(i64 noundef %5, ptr noundef nonnull align 8 dereferenceable(8) %11)
  br i1 %12, label %13, label %._crit_edge

._crit_edge:                                      ; preds = %9
  %.pre = add nsw i32 %2, 1
  br label %24

13:                                               ; preds = %9
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #2
  %15 = load i64, ptr %14, align 8, !tbaa !5
  %16 = mul nsw i64 %15, %5
  store i64 %16, ptr %7, align 8, !tbaa !5
  %17 = add nsw i32 %2, 1
  tail call void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %17, i32 noundef %3, i64 noundef %4, i64 noundef %16)
  %.not = icmp sgt i64 %16, %4
  br i1 %.not, label %19, label %18

18:                                               ; preds = %13
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(8) %7)
  br label %19

19:                                               ; preds = %18, %13
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #2
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = load i64, ptr %7, align 8, !tbaa !5
  %23 = sdiv i64 %22, %21
  store i64 %23, ptr %7, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %._crit_edge, %19
  %.pre-phi = phi i32 [ %.pre, %._crit_edge ], [ %17, %19 ]
  %25 = phi i64 [ %5, %._crit_edge ], [ %23, %19 ]
  call void @_Z8generateRSt6vectorIxSaIxEES2_iixx(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.pre-phi, i32 noundef %3, i64 noundef %4, i64 noundef %25)
  br label %26

26:                                               ; preds = %6, %24
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass