; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd (WriteBlocksDMAMultiBuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_DataInitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.SD_HandleTypeDef = type { ptr, %struct.SDMMC_InitTypeDef, i32, ptr, i32, ptr, i32, i32, i32, i32, %struct.HAL_SD_CardInfoTypeDef, [4 x i32], [4 x i32] }
%struct.SDMMC_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HAL_SD_CardInfoTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SDMMC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, [8 x i32], i32, [222 x i32], i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_CmdBlockLength(ptr noundef, i32 noundef) #1

declare i32 @SDMMC_ConfigData(ptr noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SDEx_WriteBlocksDMAMultiBuffer(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %struct.SDMMC_DataInitTypeDef, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %14 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %14, ptr %12, align 4, !tbaa !9
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %15, i32 0, i32 8
  %17 = load volatile i32, ptr %16, align 8, !tbaa !11
  %18 = icmp eq i32 %17, 1
  br i1 %18, label %19, label %146

19:                                               ; preds = %3
  %20 = load i32, ptr %12, align 4, !tbaa !9
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = add i32 %20, %21
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %23, i32 0, i32 10
  %25 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %24, i32 0, i32 6
  %26 = load i32, ptr %25, align 8, !tbaa !15
  %27 = icmp ugt i32 %22, %26
  br i1 %27, label %28, label %33

28:                                               ; preds = %19
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %29, i32 0, i32 9
  %31 = load volatile i32, ptr %30, align 4, !tbaa !16
  %32 = or i32 %31, 33554432
  store volatile i32 %32, ptr %30, align 4, !tbaa !16
  store i32 1, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

33:                                               ; preds = %19
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %34, i32 0, i32 0
  %36 = load ptr, ptr %35, align 8, !tbaa !17
  %37 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %36, i32 0, i32 20
  %38 = load volatile i32, ptr %37, align 4, !tbaa !18
  store i32 %38, ptr %10, align 4, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %39, i32 0, i32 0
  %41 = load ptr, ptr %40, align 8, !tbaa !17
  %42 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %41, i32 0, i32 21
  %43 = load volatile i32, ptr %42, align 4, !tbaa !20
  store i32 %43, ptr %11, align 4, !tbaa !9
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %44, i32 0, i32 0
  %46 = load ptr, ptr %45, align 8, !tbaa !17
  %47 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %46, i32 0, i32 19
  %48 = load volatile i32, ptr %47, align 4, !tbaa !21
  %49 = icmp eq i32 %48, 0
  br i1 %49, label %56, label %50

50:                                               ; preds = %33
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = icmp eq i32 %51, 0
  br i1 %52, label %56, label %53

53:                                               ; preds = %50
  %54 = load i32, ptr %11, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %59

56:                                               ; preds = %53, %50, %33
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %57, i32 0, i32 9
  store volatile i32 33554432, ptr %58, align 4, !tbaa !16
  store i32 1, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

59:                                               ; preds = %53
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !17
  %63 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %62, i32 0, i32 11
  store volatile i32 0, ptr %63, align 4, !tbaa !22
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %64, i32 0, i32 9
  store volatile i32 0, ptr %65, align 4, !tbaa !16
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %66, i32 0, i32 8
  store volatile i32 3, ptr %67, align 8, !tbaa !11
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %68, i32 0, i32 10
  %70 = getelementptr inbounds %struct.HAL_SD_CardInfoTypeDef, ptr %69, i32 0, i32 0
  %71 = load i32, ptr %70, align 8, !tbaa !23
  %72 = icmp ne i32 %71, 1
  br i1 %72, label %73, label %76

73:                                               ; preds = %59
  %74 = load i32, ptr %12, align 4, !tbaa !9
  %75 = mul i32 %74, 512
  store i32 %75, ptr %12, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %73, %59
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %77, i32 0, i32 0
  %79 = load ptr, ptr %78, align 8, !tbaa !17
  %80 = call i32 @SDMMC_CmdBlockLength(ptr noundef %79, i32 noundef 512)
  store i32 %80, ptr %9, align 4, !tbaa !9
  %81 = load i32, ptr %9, align 4, !tbaa !9
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %95

83:                                               ; preds = %76
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %84, i32 0, i32 0
  %86 = load ptr, ptr %85, align 8, !tbaa !17
  %87 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %86, i32 0, i32 14
  store volatile i32 534777855, ptr %87, align 4, !tbaa !24
  %88 = load i32, ptr %9, align 4, !tbaa !9
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %89, i32 0, i32 9
  %91 = load volatile i32, ptr %90, align 4, !tbaa !16
  %92 = or i32 %91, %88
  store volatile i32 %92, ptr %90, align 4, !tbaa !16
  %93 = load ptr, ptr %5, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %93, i32 0, i32 8
  store volatile i32 1, ptr %94, align 8, !tbaa !11
  store i32 1, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

95:                                               ; preds = %76
  %96 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 0
  store i32 -1, ptr %96, align 4, !tbaa !25
  %97 = load i32, ptr %7, align 4, !tbaa !9
  %98 = mul i32 512, %97
  %99 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 1
  store i32 %98, ptr %99, align 4, !tbaa !27
  %100 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 2
  store i32 144, ptr %100, align 4, !tbaa !28
  %101 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 3
  store i32 0, ptr %101, align 4, !tbaa !29
  %102 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 4
  store i32 0, ptr %102, align 4, !tbaa !30
  %103 = getelementptr inbounds %struct.SDMMC_DataInitTypeDef, ptr %8, i32 0, i32 5
  store i32 0, ptr %103, align 4, !tbaa !31
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %104, i32 0, i32 0
  %106 = load ptr, ptr %105, align 8, !tbaa !17
  %107 = call i32 @SDMMC_ConfigData(ptr noundef %106, ptr noundef %8)
  %108 = load ptr, ptr %5, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %108, i32 0, i32 0
  %110 = load ptr, ptr %109, align 8, !tbaa !17
  %111 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %110, i32 0, i32 3
  %112 = load volatile i32, ptr %111, align 4, !tbaa !32
  %113 = zext i32 %112 to i64
  %114 = or i64 %113, 64
  %115 = trunc i64 %114 to i32
  store volatile i32 %115, ptr %111, align 4, !tbaa !32
  %116 = load ptr, ptr %5, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %116, i32 0, i32 0
  %118 = load ptr, ptr %117, align 8, !tbaa !17
  %119 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %118, i32 0, i32 18
  store volatile i32 3, ptr %119, align 4, !tbaa !33
  %120 = load ptr, ptr %5, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %120, i32 0, i32 0
  %122 = load ptr, ptr %121, align 8, !tbaa !17
  %123 = getelementptr inbounds %struct.SDMMC_TypeDef, ptr %122, i32 0, i32 15
  %124 = load volatile i32, ptr %123, align 4, !tbaa !34
  %125 = zext i32 %124 to i64
  %126 = or i64 %125, 268435738
  %127 = trunc i64 %126 to i32
  store volatile i32 %127, ptr %123, align 4, !tbaa !34
  %128 = load ptr, ptr %5, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %128, i32 0, i32 7
  store volatile i32 160, ptr %129, align 4, !tbaa !35
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !17
  %133 = load i32, ptr %12, align 4, !tbaa !9
  %134 = call i32 @SDMMC_CmdWriteMultiBlock(ptr noundef %132, i32 noundef %133)
  store i32 %134, ptr %9, align 4, !tbaa !9
  %135 = load i32, ptr %9, align 4, !tbaa !9
  %136 = icmp ne i32 %135, 0
  br i1 %136, label %137, label %145

137:                                              ; preds = %95
  %138 = load ptr, ptr %5, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %138, i32 0, i32 8
  store volatile i32 1, ptr %139, align 8, !tbaa !11
  %140 = load i32, ptr %9, align 4, !tbaa !9
  %141 = load ptr, ptr %5, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.SD_HandleTypeDef, ptr %141, i32 0, i32 9
  %143 = load volatile i32, ptr %142, align 4, !tbaa !16
  %144 = or i32 %143, %140
  store volatile i32 %144, ptr %142, align 4, !tbaa !16
  store i32 1, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

145:                                              ; preds = %95
  store i32 0, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

146:                                              ; preds = %3
  store i32 2, ptr %4, align 4
  store i32 1, ptr %13, align 4
  br label %147

147:                                              ; preds = %146, %145, %137, %83, %56, %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %8) #3
  %148 = load i32, ptr %4, align 4
  ret i32 %148
}

declare i32 @SDMMC_CmdWriteMultiBlock(ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 28, !6, i64 32, !10, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !14, i64 72, !7, i64 108, !7, i64 124}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!12, !10, i64 96}
!16 = !{!12, !10, i64 68}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !10, i64 88}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !7, i64 68, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !7, i64 132, !10, i64 1020}
!20 = !{!19, !10, i64 92}
!21 = !{!19, !10, i64 84}
!22 = !{!19, !10, i64 44}
!23 = !{!12, !10, i64 72}
!24 = !{!19, !10, i64 56}
!25 = !{!26, !10, i64 0}
!26 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!27 = !{!26, !10, i64 4}
!28 = !{!26, !10, i64 8}
!29 = !{!26, !10, i64 12}
!30 = !{!26, !10, i64 16}
!31 = !{!26, !10, i64 20}
!32 = !{!19, !10, i64 12}
!33 = !{!19, !10, i64 80}
!34 = !{!19, !10, i64 60}
!35 = !{!12, !10, i64 60}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SDMMC_DataInitTypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @SDMMC_CmdBlockLength(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @SDMMC_ConfigData(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SDEx_WriteBlocksDMAMultiBuffer(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #2 {
  %4 = alloca %struct.SDMMC_DataInitTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
  %5 = getelementptr inbounds i8, ptr %0, i64 64
  %6 = load volatile i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %8, label %61

8:                                                ; preds = %3
  %9 = add i32 %2, %1
  %10 = getelementptr inbounds i8, ptr %0, i64 72
  %11 = getelementptr inbounds i8, ptr %0, i64 96
  %12 = load i32, ptr %11, align 8, !tbaa !13
  %13 = icmp ugt i32 %9, %12
  br i1 %13, label %14, label %18

14:                                               ; preds = %8
  %15 = getelementptr inbounds i8, ptr %0, i64 68
  %16 = load volatile i32, ptr %15, align 4, !tbaa !14
  %17 = or i32 %16, 33554432
  store volatile i32 %17, ptr %15, align 4, !tbaa !14
  br label %61

18:                                               ; preds = %8
  %19 = load ptr, ptr %0, align 8, !tbaa !15
  %20 = getelementptr inbounds i8, ptr %19, i64 88
  %21 = load volatile i32, ptr %20, align 4, !tbaa !16
  %22 = getelementptr inbounds i8, ptr %19, i64 92
  %23 = load volatile i32, ptr %22, align 4, !tbaa !18
  %24 = getelementptr inbounds i8, ptr %19, i64 84
  %25 = load volatile i32, ptr %24, align 4, !tbaa !19
  %26 = icmp eq i32 %25, 0
  %27 = icmp eq i32 %21, 0
  %or.cond = select i1 %26, i1 true, i1 %27
  %28 = icmp eq i32 %23, 0
  %or.cond3 = select i1 %or.cond, i1 true, i1 %28
  br i1 %or.cond3, label %29, label %31

29:                                               ; preds = %18
  %30 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 33554432, ptr %30, align 4, !tbaa !14
  br label %61

31:                                               ; preds = %18
  %32 = getelementptr inbounds i8, ptr %19, i64 44
  store volatile i32 0, ptr %32, align 4, !tbaa !20
  %33 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 0, ptr %33, align 4, !tbaa !14
  store volatile i32 3, ptr %5, align 8, !tbaa !5
  %34 = load i32, ptr %10, align 8, !tbaa !21
  %35 = tail call i32 @SDMMC_CmdBlockLength(ptr noundef nonnull %19, i32 noundef 512) #3
  %.not41 = icmp eq i32 %35, 0
  br i1 %.not41, label %41, label %36

36:                                               ; preds = %31
  %37 = load ptr, ptr %0, align 8, !tbaa !15
  %38 = getelementptr inbounds i8, ptr %37, i64 56
  store volatile i32 534777855, ptr %38, align 4, !tbaa !22
  %39 = load volatile i32, ptr %33, align 4, !tbaa !14
  %40 = or i32 %39, %35
  store volatile i32 %40, ptr %33, align 4, !tbaa !14
  store volatile i32 1, ptr %5, align 8, !tbaa !5
  br label %61

41:                                               ; preds = %31
  %.not = icmp eq i32 %34, 1
  %42 = shl i32 %1, 9
  %spec.select = select i1 %.not, i32 %1, i32 %42
  store i32 -1, ptr %4, align 4, !tbaa !23
  %43 = shl i32 %2, 9
  %44 = getelementptr inbounds i8, ptr %4, i64 4
  store i32 %43, ptr %44, align 4, !tbaa !25
  %45 = getelementptr inbounds i8, ptr %4, i64 8
  store <4 x i32> <i32 144, i32 0, i32 0, i32 0>, ptr %45, align 4, !tbaa !26
  %46 = load ptr, ptr %0, align 8, !tbaa !15
  %47 = call i32 @SDMMC_ConfigData(ptr noundef %46, ptr noundef nonnull %4) #3
  %48 = load ptr, ptr %0, align 8, !tbaa !15
  %49 = getelementptr inbounds i8, ptr %48, i64 12
  %50 = load volatile i32, ptr %49, align 4, !tbaa !27
  %51 = or i32 %50, 64
  store volatile i32 %51, ptr %49, align 4, !tbaa !27
  %52 = getelementptr inbounds i8, ptr %48, i64 80
  store volatile i32 3, ptr %52, align 4, !tbaa !28
  %53 = getelementptr inbounds i8, ptr %48, i64 60
  %54 = load volatile i32, ptr %53, align 4, !tbaa !29
  %55 = or i32 %54, 268435738
  store volatile i32 %55, ptr %53, align 4, !tbaa !29
  %56 = getelementptr inbounds i8, ptr %0, i64 60
  store volatile i32 160, ptr %56, align 4, !tbaa !30
  %57 = call i32 @SDMMC_CmdWriteMultiBlock(ptr noundef %48, i32 noundef %spec.select) #3
  %.not42 = icmp eq i32 %57, 0
  br i1 %.not42, label %61, label %58

58:                                               ; preds = %41
  store volatile i32 1, ptr %5, align 8, !tbaa !5
  %59 = load volatile i32, ptr %33, align 4, !tbaa !14
  %60 = or i32 %59, %57
  store volatile i32 %60, ptr %33, align 4, !tbaa !14
  br label %61

61:                                               ; preds = %3, %41, %58, %36, %29, %14
  %.038 = phi i32 [ 1, %14 ], [ 1, %29 ], [ 1, %36 ], [ 1, %58 ], [ 0, %41 ], [ 2, %3 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
  ret i32 %.038
}

declare i32 @SDMMC_CmdWriteMultiBlock(ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 64}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 28, !7, i64 32, !11, i64 40, !7, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !12, i64 72, !8, i64 108, !8, i64 124}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!13 = !{!6, !11, i64 96}
!14 = !{!6, !11, i64 68}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 88}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !8, i64 68, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !8, i64 132, !11, i64 1020}
!18 = !{!17, !11, i64 92}
!19 = !{!17, !11, i64 84}
!20 = !{!17, !11, i64 44}
!21 = !{!6, !11, i64 72}
!22 = !{!17, !11, i64 56}
!23 = !{!24, !11, i64 0}
!24 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!25 = !{!24, !11, i64 4}
!26 = !{!11, !11, i64 0}
!27 = !{!17, !11, i64 12}
!28 = !{!17, !11, i64 80}
!29 = !{!17, !11, i64 60}
!30 = !{!6, !11, i64 60}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass