; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Receive)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__UART_HandleTypeDef = type { ptr, %struct.UART_InitTypeDef, %struct.UART_AdvFeatureInitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i32, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
%struct.UART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.UART_AdvFeatureInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @UART_WaitOnFlagUntilTimeout(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_UART_Receive(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i16, align 2
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i16 %2, ptr %8, align 2, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %15, i32 0, i32 19
  %17 = load volatile i32, ptr %16, align 8, !tbaa !13
  %18 = icmp eq i32 %17, 32
  br i1 %18, label %19, label %194

19:                                               ; preds = %4
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = icmp eq ptr %20, null
  br i1 %21, label %26, label %22

22:                                               ; preds = %19
  %23 = load i16, ptr %8, align 2, !tbaa !9
  %24 = zext i16 %23 to i32
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %22, %19
  store i32 1, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %195

27:                                               ; preds = %22
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %29, i32 0, i32 17
  %31 = load i32, ptr %30, align 8, !tbaa !17
  %32 = icmp eq i32 %31, 1
  br i1 %32, label %33, label %34

33:                                               ; preds = %28
  store i32 2, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %195

34:                                               ; preds = %28
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %35, i32 0, i32 17
  store i32 1, ptr %36, align 8, !tbaa !17
  br label %37

37:                                               ; preds = %34
  br label %38

38:                                               ; preds = %37
  br label %39

39:                                               ; preds = %38
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %40, i32 0, i32 20
  store volatile i32 0, ptr %41, align 4, !tbaa !18
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %42, i32 0, i32 19
  store volatile i32 34, ptr %43, align 8, !tbaa !13
  %44 = call i32 @HAL_GetTick()
  store i32 %44, ptr %13, align 4, !tbaa !11
  %45 = load i16, ptr %8, align 2, !tbaa !9
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %46, i32 0, i32 7
  store i16 %45, ptr %47, align 8, !tbaa !19
  %48 = load i16, ptr %8, align 2, !tbaa !9
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %49, i32 0, i32 8
  store volatile i16 %48, ptr %50, align 2, !tbaa !20
  br label %51

51:                                               ; preds = %39
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %52, i32 0, i32 1
  %54 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %53, i32 0, i32 1
  %55 = load i32, ptr %54, align 4, !tbaa !21
  %56 = zext i32 %55 to i64
  %57 = icmp eq i64 %56, 4096
  br i1 %57, label %58, label %71

58:                                               ; preds = %51
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %59, i32 0, i32 1
  %61 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %60, i32 0, i32 3
  %62 = load i32, ptr %61, align 4, !tbaa !22
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %64, label %67

64:                                               ; preds = %58
  %65 = load ptr, ptr %6, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %65, i32 0, i32 9
  store i16 511, ptr %66, align 4, !tbaa !23
  br label %70

67:                                               ; preds = %58
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %68, i32 0, i32 9
  store i16 255, ptr %69, align 4, !tbaa !23
  br label %70

70:                                               ; preds = %67, %64
  br label %115

71:                                               ; preds = %51
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %72, i32 0, i32 1
  %74 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %73, i32 0, i32 1
  %75 = load i32, ptr %74, align 4, !tbaa !21
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %90

77:                                               ; preds = %71
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %78, i32 0, i32 1
  %80 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %79, i32 0, i32 3
  %81 = load i32, ptr %80, align 4, !tbaa !22
  %82 = icmp eq i32 %81, 0
  br i1 %82, label %83, label %86

83:                                               ; preds = %77
  %84 = load ptr, ptr %6, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %84, i32 0, i32 9
  store i16 255, ptr %85, align 4, !tbaa !23
  br label %89

86:                                               ; preds = %77
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %87, i32 0, i32 9
  store i16 127, ptr %88, align 4, !tbaa !23
  br label %89

89:                                               ; preds = %86, %83
  br label %114

90:                                               ; preds = %71
  %91 = load ptr, ptr %6, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %91, i32 0, i32 1
  %93 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %92, i32 0, i32 1
  %94 = load i32, ptr %93, align 4, !tbaa !21
  %95 = zext i32 %94 to i64
  %96 = icmp eq i64 %95, 268435456
  br i1 %96, label %97, label %110

97:                                               ; preds = %90
  %98 = load ptr, ptr %6, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %98, i32 0, i32 1
  %100 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %99, i32 0, i32 3
  %101 = load i32, ptr %100, align 4, !tbaa !22
  %102 = icmp eq i32 %101, 0
  br i1 %102, label %103, label %106

103:                                              ; preds = %97
  %104 = load ptr, ptr %6, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %104, i32 0, i32 9
  store i16 127, ptr %105, align 4, !tbaa !23
  br label %109

106:                                              ; preds = %97
  %107 = load ptr, ptr %6, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %107, i32 0, i32 9
  store i16 63, ptr %108, align 4, !tbaa !23
  br label %109

109:                                              ; preds = %106, %103
  br label %113

110:                                              ; preds = %90
  %111 = load ptr, ptr %6, align 8, !tbaa !5
  %112 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %111, i32 0, i32 9
  store i16 0, ptr %112, align 4, !tbaa !23
  br label %113

113:                                              ; preds = %110, %109
  br label %114

114:                                              ; preds = %113, %89
  br label %115

115:                                              ; preds = %114, %70
  br label %116

116:                                              ; preds = %115
  br label %117

117:                                              ; preds = %116
  %118 = load ptr, ptr %6, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %118, i32 0, i32 9
  %120 = load i16, ptr %119, align 4, !tbaa !23
  store i16 %120, ptr %12, align 2, !tbaa !9
  %121 = load ptr, ptr %6, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %121, i32 0, i32 1
  %123 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %122, i32 0, i32 1
  %124 = load i32, ptr %123, align 4, !tbaa !21
  %125 = zext i32 %124 to i64
  %126 = icmp eq i64 %125, 4096
  br i1 %126, label %127, label %135

127:                                              ; preds = %117
  %128 = load ptr, ptr %6, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %128, i32 0, i32 1
  %130 = getelementptr inbounds %struct.UART_InitTypeDef, ptr %129, i32 0, i32 3
  %131 = load i32, ptr %130, align 4, !tbaa !22
  %132 = icmp eq i32 %131, 0
  br i1 %132, label %133, label %135

133:                                              ; preds = %127
  store ptr null, ptr %10, align 8, !tbaa !5
  %134 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %134, ptr %11, align 8, !tbaa !5
  br label %137

135:                                              ; preds = %127, %117
  %136 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %136, ptr %10, align 8, !tbaa !5
  store ptr null, ptr %11, align 8, !tbaa !5
  br label %137

137:                                              ; preds = %135, %133
  br label %138

138:                                              ; preds = %181, %137
  %139 = load ptr, ptr %6, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %139, i32 0, i32 8
  %141 = load volatile i16, ptr %140, align 2, !tbaa !20
  %142 = zext i16 %141 to i32
  %143 = icmp ugt i32 %142, 0
  br i1 %143, label %144, label %186

144:                                              ; preds = %138
  %145 = load ptr, ptr %6, align 8, !tbaa !5
  %146 = load i32, ptr %13, align 4, !tbaa !11
  %147 = load i32, ptr %9, align 4, !tbaa !11
  %148 = call i32 @UART_WaitOnFlagUntilTimeout(ptr noundef %145, i32 noundef 32, i32 noundef 0, i32 noundef %146, i32 noundef %147)
  %149 = icmp ne i32 %148, 0
  br i1 %149, label %150, label %151

150:                                              ; preds = %144
  store i32 3, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %195

151:                                              ; preds = %144
  %152 = load ptr, ptr %10, align 8, !tbaa !5
  %153 = icmp eq ptr %152, null
  br i1 %153, label %154, label %167

154:                                              ; preds = %151
  %155 = load ptr, ptr %6, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %155, i32 0, i32 0
  %157 = load ptr, ptr %156, align 8, !tbaa !24
  %158 = getelementptr inbounds %struct.USART_TypeDef, ptr %157, i32 0, i32 9
  %159 = load volatile i32, ptr %158, align 4, !tbaa !25
  %160 = load i16, ptr %12, align 2, !tbaa !9
  %161 = zext i16 %160 to i32
  %162 = and i32 %159, %161
  %163 = trunc i32 %162 to i16
  %164 = load ptr, ptr %11, align 8, !tbaa !5
  store i16 %163, ptr %164, align 2, !tbaa !9
  %165 = load ptr, ptr %11, align 8, !tbaa !5
  %166 = getelementptr inbounds i16, ptr %165, i32 1
  store ptr %166, ptr %11, align 8, !tbaa !5
  br label %181

167:                                              ; preds = %151
  %168 = load ptr, ptr %6, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %168, i32 0, i32 0
  %170 = load ptr, ptr %169, align 8, !tbaa !24
  %171 = getelementptr inbounds %struct.USART_TypeDef, ptr %170, i32 0, i32 9
  %172 = load volatile i32, ptr %171, align 4, !tbaa !25
  %173 = load i16, ptr %12, align 2, !tbaa !9
  %174 = trunc i16 %173 to i8
  %175 = zext i8 %174 to i32
  %176 = and i32 %172, %175
  %177 = trunc i32 %176 to i8
  %178 = load ptr, ptr %10, align 8, !tbaa !5
  store i8 %177, ptr %178, align 1, !tbaa !27
  %179 = load ptr, ptr %10, align 8, !tbaa !5
  %180 = getelementptr inbounds i8, ptr %179, i32 1
  store ptr %180, ptr %10, align 8, !tbaa !5
  br label %181

181:                                              ; preds = %167, %154
  %182 = load ptr, ptr %6, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %182, i32 0, i32 8
  %184 = load volatile i16, ptr %183, align 2, !tbaa !20
  %185 = add i16 %184, -1
  store volatile i16 %185, ptr %183, align 2, !tbaa !20
  br label %138, !llvm.loop !28

186:                                              ; preds = %138
  %187 = load ptr, ptr %6, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %187, i32 0, i32 19
  store volatile i32 32, ptr %188, align 8, !tbaa !13
  br label %189

189:                                              ; preds = %186
  %190 = load ptr, ptr %6, align 8, !tbaa !5
  %191 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %190, i32 0, i32 17
  store i32 0, ptr %191, align 8, !tbaa !17
  br label %192

192:                                              ; preds = %189
  br label %193

193:                                              ; preds = %192
  store i32 0, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %195

194:                                              ; preds = %4
  store i32 2, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %195

195:                                              ; preds = %194, %193, %150, %33, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %196 = load i32, ptr %5, align 4
  ret i32 %196
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 168}
!14 = !{!"__UART_HandleTypeDef", !6, i64 0, !15, i64 8, !16, i64 44, !6, i64 88, !10, i64 96, !10, i64 98, !6, i64 104, !10, i64 112, !10, i64 114, !10, i64 116, !12, i64 120, !10, i64 124, !10, i64 126, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32}
!16 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!17 = !{!14, !12, i64 160}
!18 = !{!14, !12, i64 172}
!19 = !{!14, !10, i64 112}
!20 = !{!14, !10, i64 114}
!21 = !{!14, !12, i64 12}
!22 = !{!14, !12, i64 20}
!23 = !{!14, !10, i64 116}
!24 = !{!14, !6, i64 0}
!25 = !{!26, !12, i64 36}
!26 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!27 = !{!7, !7, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @UART_WaitOnFlagUntilTimeout(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_UART_Receive(ptr noundef %0, ptr noundef writeonly %1, i16 noundef zeroext %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = getelementptr inbounds i8, ptr %0, i64 168
  %6 = load volatile i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 32
  br i1 %7, label %8, label %.loopexit

8:                                                ; preds = %4
  %9 = icmp eq ptr %1, null
  %10 = icmp eq i16 %2, 0
  %or.cond = or i1 %9, %10
  br i1 %or.cond, label %.loopexit, label %11

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 160
  %13 = load i32, ptr %12, align 8, !tbaa !14
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %.loopexit, label %15

15:                                               ; preds = %11
  store i32 1, ptr %12, align 8, !tbaa !14
  %16 = getelementptr inbounds i8, ptr %0, i64 172
  store volatile i32 0, ptr %16, align 4, !tbaa !15
  store volatile i32 34, ptr %5, align 8, !tbaa !5
  %17 = tail call i32 @HAL_GetTick() #2
  %18 = getelementptr inbounds i8, ptr %0, i64 112
  store i16 %2, ptr %18, align 8, !tbaa !16
  %19 = getelementptr inbounds i8, ptr %0, i64 114
  store volatile i16 %2, ptr %19, align 2, !tbaa !17
  %20 = getelementptr inbounds i8, ptr %0, i64 12
  %21 = load i32, ptr %20, align 4, !tbaa !18
  switch i32 %21, label %40 [
    i32 4096, label %.thread55
    i32 0, label %26
    i32 268435456, label %33
  ]

.thread55:                                        ; preds = %15
  %22 = getelementptr inbounds i8, ptr %0, i64 20
  %23 = load i32, ptr %22, align 4, !tbaa !19
  %24 = icmp eq i32 %23, 0
  %spec.select56 = select i1 %24, ptr null, ptr %1
  %spec.select = select i1 %24, ptr %1, ptr null
  %.sink = select i1 %24, i16 511, i16 255
  %25 = getelementptr inbounds i8, ptr %0, i64 116
  store i16 %.sink, ptr %25, align 4
  br label %.thread

26:                                               ; preds = %15
  %27 = getelementptr inbounds i8, ptr %0, i64 20
  %28 = load i32, ptr %27, align 4, !tbaa !19
  %29 = icmp eq i32 %28, 0
  %30 = getelementptr inbounds i8, ptr %0, i64 116
  br i1 %29, label %31, label %32

31:                                               ; preds = %26
  store i16 255, ptr %30, align 4, !tbaa !20
  br label %.thread

32:                                               ; preds = %26
  store i16 127, ptr %30, align 4, !tbaa !20
  br label %.thread

33:                                               ; preds = %15
  %34 = getelementptr inbounds i8, ptr %0, i64 20
  %35 = load i32, ptr %34, align 4, !tbaa !19
  %36 = icmp eq i32 %35, 0
  %37 = getelementptr inbounds i8, ptr %0, i64 116
  br i1 %36, label %38, label %39

38:                                               ; preds = %33
  store i16 127, ptr %37, align 4, !tbaa !20
  br label %.thread

39:                                               ; preds = %33
  store i16 63, ptr %37, align 4, !tbaa !20
  br label %.thread

40:                                               ; preds = %15
  %41 = getelementptr inbounds i8, ptr %0, i64 116
  store i16 0, ptr %41, align 4, !tbaa !20
  br label %.thread

.thread:                                          ; preds = %39, %38, %31, %32, %.thread55, %40
  %42 = phi i16 [ 0, %40 ], [ %.sink, %.thread55 ], [ 127, %32 ], [ 255, %31 ], [ 127, %38 ], [ 63, %39 ]
  %.048 = phi ptr [ null, %40 ], [ %spec.select, %.thread55 ], [ null, %32 ], [ null, %31 ], [ null, %38 ], [ null, %39 ]
  %.047 = phi ptr [ %1, %40 ], [ %spec.select56, %.thread55 ], [ %1, %32 ], [ %1, %31 ], [ %1, %38 ], [ %1, %39 ]
  %43 = load volatile i16, ptr %19, align 2, !tbaa !17
  %.not57 = icmp eq i16 %43, 0
  br i1 %.not57, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.thread
  %44 = zext nneg i16 %42 to i32
  br label %45

45:                                               ; preds = %.lr.ph, %60
  %.159 = phi ptr [ %.047, %.lr.ph ], [ %.2, %60 ]
  %.14958 = phi ptr [ %.048, %.lr.ph ], [ %.250, %60 ]
  %46 = tail call i32 @UART_WaitOnFlagUntilTimeout(ptr noundef nonnull %0, i32 noundef 32, i32 noundef 0, i32 noundef %17, i32 noundef %3)
  %.not53 = icmp eq i32 %46, 0
  br i1 %.not53, label %47, label %.loopexit

47:                                               ; preds = %45
  %48 = icmp eq ptr %.159, null
  %49 = load ptr, ptr %0, align 8, !tbaa !21
  %50 = getelementptr inbounds i8, ptr %49, i64 36
  %51 = load volatile i32, ptr %50, align 4, !tbaa !22
  br i1 %48, label %52, label %56

52:                                               ; preds = %47
  %53 = trunc i32 %51 to i16
  %54 = and i16 %42, %53
  store i16 %54, ptr %.14958, align 2, !tbaa !24
  %55 = getelementptr inbounds i8, ptr %.14958, i64 2
  br label %60

56:                                               ; preds = %47
  %57 = and i32 %51, %44
  %58 = trunc i32 %57 to i8
  store i8 %58, ptr %.159, align 1, !tbaa !25
  %59 = getelementptr inbounds i8, ptr %.159, i64 1
  br label %60

60:                                               ; preds = %56, %52
  %.250 = phi ptr [ %55, %52 ], [ %.14958, %56 ]
  %.2 = phi ptr [ null, %52 ], [ %59, %56 ]
  %61 = load volatile i16, ptr %19, align 2, !tbaa !17
  %62 = add i16 %61, -1
  store volatile i16 %62, ptr %19, align 2, !tbaa !17
  %63 = load volatile i16, ptr %19, align 2, !tbaa !17
  %.not = icmp eq i16 %63, 0
  br i1 %.not, label %._crit_edge, label %45, !llvm.loop !26

._crit_edge:                                      ; preds = %60, %.thread
  store volatile i32 32, ptr %5, align 8, !tbaa !5
  store i32 0, ptr %12, align 8, !tbaa !14
  br label %.loopexit

.loopexit:                                        ; preds = %45, %4, %11, %8, %._crit_edge
  %.0 = phi i32 [ 0, %._crit_edge ], [ 1, %8 ], [ 2, %11 ], [ 2, %4 ], [ 3, %45 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 168}
!6 = !{!"__UART_HandleTypeDef", !7, i64 0, !10, i64 8, !12, i64 44, !7, i64 88, !13, i64 96, !13, i64 98, !7, i64 104, !13, i64 112, !13, i64 114, !13, i64 116, !11, i64 120, !13, i64 124, !13, i64 126, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!"short", !8, i64 0}
!14 = !{!6, !11, i64 160}
!15 = !{!6, !11, i64 172}
!16 = !{!6, !13, i64 112}
!17 = !{!6, !13, i64 114}
!18 = !{!6, !11, i64 12}
!19 = !{!6, !11, i64 20}
!20 = !{!6, !13, i64 116}
!21 = !{!6, !7, i64 0}
!22 = !{!23, !11, i64 36}
!23 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!24 = !{!13, !13, i64 0}
!25 = !{!8, !8, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass