; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SMBUS_HandleTypeDef = type { ptr, %struct.SMBUS_InitTypeDef, ptr, i16, i16, i32, i32, i32, i32, i32 }
%struct.SMBUS_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.I2C_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_ConvertOtherXferOptions(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Disable_IRQ(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_SMBUS_Slave_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i16 %2, ptr %8, align 2, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !11
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %10, i32 0, i32 8
  %12 = load volatile i32, ptr %11, align 8, !tbaa !13
  %13 = and i32 %12, 8
  %14 = icmp eq i32 %13, 8
  br i1 %14, label %15, label %118

15:                                               ; preds = %4
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = icmp eq ptr %16, null
  br i1 %17, label %22, label %18

18:                                               ; preds = %15
  %19 = load i16, ptr %8, align 2, !tbaa !9
  %20 = zext i16 %19 to i64
  %21 = icmp eq i64 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %18, %15
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %23, i32 0, i32 9
  store volatile i32 512, ptr %24, align 4, !tbaa !16
  store i32 1, ptr %5, align 4
  br label %119

25:                                               ; preds = %18
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  call void @SMBUS_Disable_IRQ(ptr noundef %26, i32 noundef 252)
  br label %27

27:                                               ; preds = %25
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %28, i32 0, i32 7
  %30 = load i32, ptr %29, align 4, !tbaa !17
  %31 = icmp eq i32 %30, 1
  br i1 %31, label %32, label %33

32:                                               ; preds = %27
  store i32 2, ptr %5, align 4
  br label %119

33:                                               ; preds = %27
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %34, i32 0, i32 7
  store i32 1, ptr %35, align 4, !tbaa !17
  br label %36

36:                                               ; preds = %33
  br label %37

37:                                               ; preds = %36
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %38, i32 0, i32 8
  store volatile i32 74, ptr %39, align 8, !tbaa !13
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %40, i32 0, i32 9
  store volatile i32 0, ptr %41, align 4, !tbaa !16
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %43, align 8, !tbaa !18
  %45 = getelementptr inbounds %struct.I2C_TypeDef, ptr %44, i32 0, i32 0
  %46 = load volatile i32, ptr %45, align 4, !tbaa !19
  %47 = zext i32 %46 to i64
  %48 = or i64 %47, 65536
  %49 = trunc i64 %48 to i32
  store volatile i32 %49, ptr %45, align 4, !tbaa !19
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %50, i32 0, i32 0
  %52 = load ptr, ptr %51, align 8, !tbaa !18
  %53 = getelementptr inbounds %struct.I2C_TypeDef, ptr %52, i32 0, i32 1
  %54 = load volatile i32, ptr %53, align 4, !tbaa !21
  %55 = zext i32 %54 to i64
  %56 = and i64 %55, -32769
  %57 = trunc i64 %56 to i32
  store volatile i32 %57, ptr %53, align 4, !tbaa !21
  %58 = load ptr, ptr %7, align 8, !tbaa !5
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %59, i32 0, i32 2
  store ptr %58, ptr %60, align 8, !tbaa !22
  %61 = load i16, ptr %8, align 2, !tbaa !9
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %62, i32 0, i32 3
  store i16 %61, ptr %63, align 8, !tbaa !23
  %64 = load i16, ptr %8, align 2, !tbaa !9
  %65 = load ptr, ptr %6, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %65, i32 0, i32 4
  store volatile i16 %64, ptr %66, align 2, !tbaa !24
  %67 = load i32, ptr %9, align 4, !tbaa !11
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %68, i32 0, i32 5
  store volatile i32 %67, ptr %69, align 4, !tbaa !25
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  call void @SMBUS_ConvertOtherXferOptions(ptr noundef %70)
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !18
  %74 = getelementptr inbounds %struct.I2C_TypeDef, ptr %73, i32 0, i32 1
  %75 = load volatile i32, ptr %74, align 4, !tbaa !21
  %76 = zext i32 %75 to i64
  %77 = and i64 %76, 67108864
  %78 = icmp ne i64 %77, 0
  br i1 %78, label %79, label %85

79:                                               ; preds = %37
  %80 = load ptr, ptr %6, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %80, i32 0, i32 3
  %82 = load i16, ptr %81, align 8, !tbaa !23
  %83 = zext i16 %82 to i32
  %84 = icmp eq i32 %83, 2
  br i1 %84, label %91, label %85

85:                                               ; preds = %79, %37
  %86 = load ptr, ptr %6, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %86, i32 0, i32 3
  %88 = load i16, ptr %87, align 8, !tbaa !23
  %89 = zext i16 %88 to i32
  %90 = icmp eq i32 %89, 1
  br i1 %90, label %91, label %100

91:                                               ; preds = %85, %79
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = load ptr, ptr %6, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %93, i32 0, i32 3
  %95 = load i16, ptr %94, align 8, !tbaa !23
  %96 = trunc i16 %95 to i8
  %97 = load ptr, ptr %6, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %97, i32 0, i32 5
  %99 = load volatile i32, ptr %98, align 4, !tbaa !25
  call void @SMBUS_TransferConfig(ptr noundef %92, i16 noundef zeroext 0, i8 noundef zeroext %96, i32 noundef %99, i32 noundef 0)
  br label %108

100:                                              ; preds = %85
  %101 = load ptr, ptr %6, align 8, !tbaa !5
  %102 = load ptr, ptr %6, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %102, i32 0, i32 5
  %104 = load volatile i32, ptr %103, align 4, !tbaa !25
  %105 = zext i32 %104 to i64
  %106 = or i64 %105, 16777216
  %107 = trunc i64 %106 to i32
  call void @SMBUS_TransferConfig(ptr noundef %101, i16 noundef zeroext 0, i8 noundef zeroext 1, i32 noundef %107, i32 noundef 0)
  br label %108

108:                                              ; preds = %100, %91
  %109 = load ptr, ptr %6, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %109, i32 0, i32 0
  %111 = load ptr, ptr %110, align 8, !tbaa !18
  %112 = getelementptr inbounds %struct.I2C_TypeDef, ptr %111, i32 0, i32 7
  store volatile i32 8, ptr %112, align 4, !tbaa !26
  br label %113

113:                                              ; preds = %108
  %114 = load ptr, ptr %6, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.__SMBUS_HandleTypeDef, ptr %114, i32 0, i32 7
  store i32 0, ptr %115, align 4, !tbaa !17
  br label %116

116:                                              ; preds = %113
  %117 = load ptr, ptr %6, align 8, !tbaa !5
  call void @SMBUS_Enable_IRQ(ptr noundef %117, i32 noundef 252)
  store i32 0, ptr %5, align 4
  br label %119

118:                                              ; preds = %4
  store i32 2, ptr %5, align 4
  br label %119

119:                                              ; preds = %118, %116, %32, %22
  %120 = load i32, ptr %5, align 4
  ret i32 %120
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 80}
!14 = !{!"__SMBUS_HandleTypeDef", !6, i64 0, !15, i64 8, !6, i64 56, !10, i64 64, !10, i64 66, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84}
!15 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!16 = !{!14, !12, i64 84}
!17 = !{!14, !12, i64 76}
!18 = !{!14, !6, i64 0}
!19 = !{!20, !12, i64 0}
!20 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!21 = !{!20, !12, i64 4}
!22 = !{!14, !6, i64 56}
!23 = !{!14, !10, i64 64}
!24 = !{!14, !10, i64 66}
!25 = !{!14, !12, i64 68}
!26 = !{!20, !12, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_TransferConfig(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_ConvertOtherXferOptions(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Enable_IRQ(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @SMBUS_Disable_IRQ(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_SMBUS_Slave_Receive_IT(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %0, i64 80
  %6 = load volatile i32, ptr %5, align 8, !tbaa !5
  %7 = and i32 %6, 8
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %44, label %8

8:                                                ; preds = %4
  %9 = icmp eq ptr %1, null
  %10 = icmp eq i16 %2, 0
  %or.cond = or i1 %9, %10
  br i1 %or.cond, label %11, label %13

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 84
  store volatile i32 512, ptr %12, align 4, !tbaa !13
  br label %44

13:                                               ; preds = %8
  tail call void @SMBUS_Disable_IRQ(ptr noundef nonnull %0, i32 noundef 252)
  %14 = getelementptr inbounds i8, ptr %0, i64 76
  %15 = load i32, ptr %14, align 4, !tbaa !14
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %44, label %17

17:                                               ; preds = %13
  store i32 1, ptr %14, align 4, !tbaa !14
  store volatile i32 74, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds i8, ptr %0, i64 84
  store volatile i32 0, ptr %18, align 4, !tbaa !13
  %19 = load ptr, ptr %0, align 8, !tbaa !15
  %20 = load volatile i32, ptr %19, align 4, !tbaa !16
  %21 = or i32 %20, 65536
  store volatile i32 %21, ptr %19, align 4, !tbaa !16
  %22 = getelementptr inbounds i8, ptr %19, i64 4
  %23 = load volatile i32, ptr %22, align 4, !tbaa !18
  %24 = and i32 %23, -32769
  store volatile i32 %24, ptr %22, align 4, !tbaa !18
  %25 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %1, ptr %25, align 8, !tbaa !19
  %26 = getelementptr inbounds i8, ptr %0, i64 64
  store i16 %2, ptr %26, align 8, !tbaa !20
  %27 = getelementptr inbounds i8, ptr %0, i64 66
  store volatile i16 %2, ptr %27, align 2, !tbaa !21
  %28 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 %3, ptr %28, align 4, !tbaa !22
  tail call void @SMBUS_ConvertOtherXferOptions(ptr noundef nonnull %0)
  %29 = load ptr, ptr %0, align 8, !tbaa !15
  %30 = getelementptr inbounds i8, ptr %29, i64 4
  %31 = load volatile i32, ptr %30, align 4, !tbaa !18
  %32 = and i32 %31, 67108864
  %.not34 = icmp ne i32 %32, 0
  %.pr = load i16, ptr %26, align 8, !tbaa !20
  %33 = icmp eq i16 %.pr, 2
  %or.cond35 = select i1 %.not34, i1 %33, i1 false
  br i1 %or.cond35, label %35, label %thread-pre-split

thread-pre-split:                                 ; preds = %17
  %34 = icmp eq i16 %.pr, 1
  br i1 %34, label %35, label %38

35:                                               ; preds = %17, %thread-pre-split
  %36 = phi i8 [ 1, %thread-pre-split ], [ 2, %17 ]
  %37 = load volatile i32, ptr %28, align 4, !tbaa !22
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext 0, i8 noundef zeroext %36, i32 noundef %37, i32 noundef 0)
  br label %41

38:                                               ; preds = %thread-pre-split
  %39 = load volatile i32, ptr %28, align 4, !tbaa !22
  %40 = or i32 %39, 16777216
  tail call void @SMBUS_TransferConfig(ptr noundef nonnull %0, i16 noundef zeroext 0, i8 noundef zeroext 1, i32 noundef %40, i32 noundef 0)
  br label %41

41:                                               ; preds = %38, %35
  %42 = load ptr, ptr %0, align 8, !tbaa !15
  %43 = getelementptr inbounds i8, ptr %42, i64 28
  store volatile i32 8, ptr %43, align 4, !tbaa !23
  store i32 0, ptr %14, align 4, !tbaa !14
  tail call void @SMBUS_Enable_IRQ(ptr noundef nonnull %0, i32 noundef 252)
  br label %44

44:                                               ; preds = %4, %13, %41, %11
  %.0 = phi i32 [ 1, %11 ], [ 0, %41 ], [ 2, %13 ], [ 2, %4 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 80}
!6 = !{!"__SMBUS_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 56, !12, i64 64, !12, i64 66, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !11, i64 84}
!14 = !{!6, !11, i64 76}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!18 = !{!17, !11, i64 4}
!19 = !{!6, !7, i64 56}
!20 = !{!6, !12, i64 64}
!21 = !{!6, !12, i64 66}
!22 = !{!6, !11, i64 68}
!23 = !{!17, !11, i64 28}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass