; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LTDC_HandleTypeDef = type { ptr, %struct.LTDC_InitTypeDef, [2 x %struct.LTDC_LayerCfgTypeDef], i32, i32, i32 }
%struct.LTDC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.LTDC_ColorTypeDef }
%struct.LTDC_ColorTypeDef = type { i8, i8, i8, i8 }
%struct.LTDC_LayerCfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.LTDC_ColorTypeDef }
%struct.LTDC_TypeDef = type { [2 x i32], i32, i32, i32, i32, i32, [2 x i32], i32, [1 x i32], i32, [1 x i32], i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_LTDC_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %213

10:                                               ; preds = %1
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %11, i32 0, i32 4
  %13 = load volatile i32, ptr %12, align 8, !tbaa !9
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %19

15:                                               ; preds = %10
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %16, i32 0, i32 3
  store i32 0, ptr %17, align 4, !tbaa !14
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_LTDC_MspInit(ptr noundef %18)
  br label %19

19:                                               ; preds = %15, %10
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %20, i32 0, i32 4
  store volatile i32 2, ptr %21, align 8, !tbaa !9
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %22, i32 0, i32 0
  %24 = load ptr, ptr %23, align 8, !tbaa !15
  %25 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %24, i32 0, i32 5
  %26 = load volatile i32, ptr %25, align 4, !tbaa !16
  %27 = zext i32 %26 to i64
  %28 = and i64 %27, -4026531841
  %29 = trunc i64 %28 to i32
  store volatile i32 %29, ptr %25, align 4, !tbaa !16
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %30, i32 0, i32 1
  %32 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %31, i32 0, i32 0
  %33 = load i32, ptr %32, align 8, !tbaa !18
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %34, i32 0, i32 1
  %36 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 4, !tbaa !19
  %38 = or i32 %33, %37
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %39, i32 0, i32 1
  %41 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %40, i32 0, i32 2
  %42 = load i32, ptr %41, align 8, !tbaa !20
  %43 = or i32 %38, %42
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %44, i32 0, i32 1
  %46 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %45, i32 0, i32 3
  %47 = load i32, ptr %46, align 4, !tbaa !21
  %48 = or i32 %43, %47
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %49, i32 0, i32 0
  %51 = load ptr, ptr %50, align 8, !tbaa !15
  %52 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %51, i32 0, i32 5
  %53 = load volatile i32, ptr %52, align 4, !tbaa !16
  %54 = or i32 %53, %48
  store volatile i32 %54, ptr %52, align 4, !tbaa !16
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !15
  %58 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %57, i32 0, i32 1
  %59 = load volatile i32, ptr %58, align 4, !tbaa !22
  %60 = zext i32 %59 to i64
  %61 = and i64 %60, -268371968
  %62 = trunc i64 %61 to i32
  store volatile i32 %62, ptr %58, align 4, !tbaa !22
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %63, i32 0, i32 1
  %65 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %64, i32 0, i32 4
  %66 = load i32, ptr %65, align 8, !tbaa !23
  %67 = shl i32 %66, 16
  store i32 %67, ptr %4, align 4, !tbaa !24
  %68 = load i32, ptr %4, align 4, !tbaa !24
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %69, i32 0, i32 1
  %71 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %70, i32 0, i32 5
  %72 = load i32, ptr %71, align 4, !tbaa !25
  %73 = or i32 %68, %72
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %74, i32 0, i32 0
  %76 = load ptr, ptr %75, align 8, !tbaa !15
  %77 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %76, i32 0, i32 1
  %78 = load volatile i32, ptr %77, align 4, !tbaa !22
  %79 = or i32 %78, %73
  store volatile i32 %79, ptr %77, align 4, !tbaa !22
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %80, i32 0, i32 0
  %82 = load ptr, ptr %81, align 8, !tbaa !15
  %83 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %82, i32 0, i32 2
  %84 = load volatile i32, ptr %83, align 4, !tbaa !26
  %85 = zext i32 %84 to i64
  %86 = and i64 %85, -268371968
  %87 = trunc i64 %86 to i32
  store volatile i32 %87, ptr %83, align 4, !tbaa !26
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %88, i32 0, i32 1
  %90 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %89, i32 0, i32 6
  %91 = load i32, ptr %90, align 8, !tbaa !27
  %92 = shl i32 %91, 16
  store i32 %92, ptr %4, align 4, !tbaa !24
  %93 = load i32, ptr %4, align 4, !tbaa !24
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %94, i32 0, i32 1
  %96 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %95, i32 0, i32 7
  %97 = load i32, ptr %96, align 4, !tbaa !28
  %98 = or i32 %93, %97
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %99, i32 0, i32 0
  %101 = load ptr, ptr %100, align 8, !tbaa !15
  %102 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %101, i32 0, i32 2
  %103 = load volatile i32, ptr %102, align 4, !tbaa !26
  %104 = or i32 %103, %98
  store volatile i32 %104, ptr %102, align 4, !tbaa !26
  %105 = load ptr, ptr %3, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %105, i32 0, i32 0
  %107 = load ptr, ptr %106, align 8, !tbaa !15
  %108 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %107, i32 0, i32 3
  %109 = load volatile i32, ptr %108, align 4, !tbaa !29
  %110 = zext i32 %109 to i64
  %111 = and i64 %110, -268371968
  %112 = trunc i64 %111 to i32
  store volatile i32 %112, ptr %108, align 4, !tbaa !29
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %113, i32 0, i32 1
  %115 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %114, i32 0, i32 8
  %116 = load i32, ptr %115, align 8, !tbaa !30
  %117 = shl i32 %116, 16
  store i32 %117, ptr %4, align 4, !tbaa !24
  %118 = load i32, ptr %4, align 4, !tbaa !24
  %119 = load ptr, ptr %3, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %119, i32 0, i32 1
  %121 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %120, i32 0, i32 9
  %122 = load i32, ptr %121, align 4, !tbaa !31
  %123 = or i32 %118, %122
  %124 = load ptr, ptr %3, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %124, i32 0, i32 0
  %126 = load ptr, ptr %125, align 8, !tbaa !15
  %127 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %126, i32 0, i32 3
  %128 = load volatile i32, ptr %127, align 4, !tbaa !29
  %129 = or i32 %128, %123
  store volatile i32 %129, ptr %127, align 4, !tbaa !29
  %130 = load ptr, ptr %3, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !15
  %133 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %132, i32 0, i32 4
  %134 = load volatile i32, ptr %133, align 4, !tbaa !32
  %135 = zext i32 %134 to i64
  %136 = and i64 %135, -268371968
  %137 = trunc i64 %136 to i32
  store volatile i32 %137, ptr %133, align 4, !tbaa !32
  %138 = load ptr, ptr %3, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %138, i32 0, i32 1
  %140 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %139, i32 0, i32 10
  %141 = load i32, ptr %140, align 8, !tbaa !33
  %142 = shl i32 %141, 16
  store i32 %142, ptr %4, align 4, !tbaa !24
  %143 = load i32, ptr %4, align 4, !tbaa !24
  %144 = load ptr, ptr %3, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %144, i32 0, i32 1
  %146 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %145, i32 0, i32 11
  %147 = load i32, ptr %146, align 4, !tbaa !34
  %148 = or i32 %143, %147
  %149 = load ptr, ptr %3, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %149, i32 0, i32 0
  %151 = load ptr, ptr %150, align 8, !tbaa !15
  %152 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %151, i32 0, i32 4
  %153 = load volatile i32, ptr %152, align 4, !tbaa !32
  %154 = or i32 %153, %148
  store volatile i32 %154, ptr %152, align 4, !tbaa !32
  %155 = load ptr, ptr %3, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %155, i32 0, i32 1
  %157 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %156, i32 0, i32 12
  %158 = getelementptr inbounds %struct.LTDC_ColorTypeDef, ptr %157, i32 0, i32 1
  %159 = load i8, ptr %158, align 1, !tbaa !35
  %160 = zext i8 %159 to i32
  %161 = shl i32 %160, 8
  store i32 %161, ptr %4, align 4, !tbaa !24
  %162 = load ptr, ptr %3, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %162, i32 0, i32 1
  %164 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %163, i32 0, i32 12
  %165 = getelementptr inbounds %struct.LTDC_ColorTypeDef, ptr %164, i32 0, i32 2
  %166 = load i8, ptr %165, align 2, !tbaa !36
  %167 = zext i8 %166 to i32
  %168 = shl i32 %167, 16
  store i32 %168, ptr %5, align 4, !tbaa !24
  %169 = load ptr, ptr %3, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %169, i32 0, i32 0
  %171 = load ptr, ptr %170, align 8, !tbaa !15
  %172 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %171, i32 0, i32 9
  %173 = load volatile i32, ptr %172, align 4, !tbaa !37
  %174 = zext i32 %173 to i64
  %175 = and i64 %174, -16777216
  %176 = trunc i64 %175 to i32
  store volatile i32 %176, ptr %172, align 4, !tbaa !37
  %177 = load i32, ptr %5, align 4, !tbaa !24
  %178 = load i32, ptr %4, align 4, !tbaa !24
  %179 = or i32 %177, %178
  %180 = load ptr, ptr %3, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %180, i32 0, i32 1
  %182 = getelementptr inbounds %struct.LTDC_InitTypeDef, ptr %181, i32 0, i32 12
  %183 = getelementptr inbounds %struct.LTDC_ColorTypeDef, ptr %182, i32 0, i32 0
  %184 = load i8, ptr %183, align 8, !tbaa !38
  %185 = zext i8 %184 to i32
  %186 = or i32 %179, %185
  %187 = load ptr, ptr %3, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %187, i32 0, i32 0
  %189 = load ptr, ptr %188, align 8, !tbaa !15
  %190 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %189, i32 0, i32 9
  %191 = load volatile i32, ptr %190, align 4, !tbaa !37
  %192 = or i32 %191, %186
  store volatile i32 %192, ptr %190, align 4, !tbaa !37
  %193 = load ptr, ptr %3, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %193, i32 0, i32 0
  %195 = load ptr, ptr %194, align 8, !tbaa !15
  %196 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %195, i32 0, i32 11
  %197 = load volatile i32, ptr %196, align 4, !tbaa !39
  %198 = zext i32 %197 to i64
  %199 = or i64 %198, 6
  %200 = trunc i64 %199 to i32
  store volatile i32 %200, ptr %196, align 4, !tbaa !39
  %201 = load ptr, ptr %3, align 8, !tbaa !5
  %202 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %201, i32 0, i32 0
  %203 = load ptr, ptr %202, align 8, !tbaa !15
  %204 = getelementptr inbounds %struct.LTDC_TypeDef, ptr %203, i32 0, i32 5
  %205 = load volatile i32, ptr %204, align 4, !tbaa !16
  %206 = zext i32 %205 to i64
  %207 = or i64 %206, 1
  %208 = trunc i64 %207 to i32
  store volatile i32 %208, ptr %204, align 4, !tbaa !16
  %209 = load ptr, ptr %3, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %209, i32 0, i32 5
  store volatile i32 0, ptr %210, align 4, !tbaa !40
  %211 = load ptr, ptr %3, align 8, !tbaa !5
  %212 = getelementptr inbounds %struct.LTDC_HandleTypeDef, ptr %211, i32 0, i32 4
  store volatile i32 1, ptr %212, align 8, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %213

213:                                              ; preds = %19, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %214 = load i32, ptr %2, align 4
  ret i32 %214
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_MspInit(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 168}
!10 = !{!"", !6, i64 0, !11, i64 8, !7, i64 60, !12, i64 164, !12, i64 168, !12, i64 172}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !13, i64 48}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!14 = !{!10, !12, i64 164}
!15 = !{!10, !6, i64 0}
!16 = !{!17, !12, i64 24}
!17 = !{!"", !7, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !7, i64 28, !12, i64 36, !7, i64 40, !12, i64 44, !7, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72}
!18 = !{!10, !12, i64 8}
!19 = !{!10, !12, i64 12}
!20 = !{!10, !12, i64 16}
!21 = !{!10, !12, i64 20}
!22 = !{!17, !12, i64 8}
!23 = !{!10, !12, i64 24}
!24 = !{!12, !12, i64 0}
!25 = !{!10, !12, i64 28}
!26 = !{!17, !12, i64 12}
!27 = !{!10, !12, i64 32}
!28 = !{!10, !12, i64 36}
!29 = !{!17, !12, i64 16}
!30 = !{!10, !12, i64 40}
!31 = !{!10, !12, i64 44}
!32 = !{!17, !12, i64 20}
!33 = !{!10, !12, i64 48}
!34 = !{!10, !12, i64 52}
!35 = !{!10, !7, i64 57}
!36 = !{!10, !7, i64 58}
!37 = !{!17, !12, i64 44}
!38 = !{!10, !7, i64 56}
!39 = !{!17, !12, i64 52}
!40 = !{!10, !12, i64 172}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_LTDC_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %81, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 168
  %5 = load volatile i32, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %9

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 0, ptr %8, align 4, !tbaa !13
  tail call void @HAL_LTDC_MspInit(ptr noundef nonnull %0)
  br label %9

9:                                                ; preds = %7, %3
  store volatile i32 2, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %0, align 8, !tbaa !14
  %11 = getelementptr inbounds i8, ptr %10, i64 24
  %12 = load volatile i32, ptr %11, align 4, !tbaa !15
  %13 = and i32 %12, 268435455
  store volatile i32 %13, ptr %11, align 4, !tbaa !15
  %14 = getelementptr inbounds i8, ptr %0, i64 8
  %15 = load <4 x i32>, ptr %14, align 8, !tbaa !17
  %16 = load volatile i32, ptr %11, align 4, !tbaa !15
  %17 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %15)
  %op.rdx = or i32 %17, %16
  store volatile i32 %op.rdx, ptr %11, align 4, !tbaa !15
  %18 = getelementptr inbounds i8, ptr %10, i64 8
  %19 = load volatile i32, ptr %18, align 4, !tbaa !18
  %20 = and i32 %19, -268371968
  store volatile i32 %20, ptr %18, align 4, !tbaa !18
  %21 = getelementptr inbounds i8, ptr %0, i64 24
  %22 = load i32, ptr %21, align 8, !tbaa !19
  %23 = shl i32 %22, 16
  %24 = getelementptr inbounds i8, ptr %0, i64 28
  %25 = load i32, ptr %24, align 4, !tbaa !20
  %26 = or i32 %23, %25
  %27 = load volatile i32, ptr %18, align 4, !tbaa !18
  %28 = or i32 %26, %27
  store volatile i32 %28, ptr %18, align 4, !tbaa !18
  %29 = getelementptr inbounds i8, ptr %10, i64 12
  %30 = load volatile i32, ptr %29, align 4, !tbaa !21
  %31 = and i32 %30, -268371968
  store volatile i32 %31, ptr %29, align 4, !tbaa !21
  %32 = getelementptr inbounds i8, ptr %0, i64 32
  %33 = load i32, ptr %32, align 8, !tbaa !22
  %34 = shl i32 %33, 16
  %35 = getelementptr inbounds i8, ptr %0, i64 36
  %36 = load i32, ptr %35, align 4, !tbaa !23
  %37 = or i32 %34, %36
  %38 = load volatile i32, ptr %29, align 4, !tbaa !21
  %39 = or i32 %37, %38
  store volatile i32 %39, ptr %29, align 4, !tbaa !21
  %40 = getelementptr inbounds i8, ptr %10, i64 16
  %41 = load volatile i32, ptr %40, align 4, !tbaa !24
  %42 = and i32 %41, -268371968
  store volatile i32 %42, ptr %40, align 4, !tbaa !24
  %43 = getelementptr inbounds i8, ptr %0, i64 40
  %44 = load i32, ptr %43, align 8, !tbaa !25
  %45 = shl i32 %44, 16
  %46 = getelementptr inbounds i8, ptr %0, i64 44
  %47 = load i32, ptr %46, align 4, !tbaa !26
  %48 = or i32 %45, %47
  %49 = load volatile i32, ptr %40, align 4, !tbaa !24
  %50 = or i32 %48, %49
  store volatile i32 %50, ptr %40, align 4, !tbaa !24
  %51 = getelementptr inbounds i8, ptr %10, i64 20
  %52 = load volatile i32, ptr %51, align 4, !tbaa !27
  %53 = and i32 %52, -268371968
  store volatile i32 %53, ptr %51, align 4, !tbaa !27
  %54 = getelementptr inbounds i8, ptr %0, i64 48
  %55 = load i32, ptr %54, align 8, !tbaa !28
  %56 = shl i32 %55, 16
  %57 = getelementptr inbounds i8, ptr %0, i64 52
  %58 = load i32, ptr %57, align 4, !tbaa !29
  %59 = or i32 %56, %58
  %60 = load volatile i32, ptr %51, align 4, !tbaa !27
  %61 = or i32 %59, %60
  store volatile i32 %61, ptr %51, align 4, !tbaa !27
  %62 = getelementptr inbounds i8, ptr %0, i64 56
  %63 = getelementptr inbounds i8, ptr %0, i64 57
  %64 = load i16, ptr %63, align 1
  %65 = zext i16 %64 to i32
  %66 = shl nuw nsw i32 %65, 8
  %67 = getelementptr inbounds i8, ptr %10, i64 44
  %68 = load volatile i32, ptr %67, align 4, !tbaa !30
  %69 = and i32 %68, -16777216
  store volatile i32 %69, ptr %67, align 4, !tbaa !30
  %70 = load i8, ptr %62, align 8, !tbaa !31
  %71 = zext i8 %70 to i32
  %72 = or disjoint i32 %66, %71
  %73 = load volatile i32, ptr %67, align 4, !tbaa !30
  %74 = or i32 %72, %73
  store volatile i32 %74, ptr %67, align 4, !tbaa !30
  %75 = getelementptr inbounds i8, ptr %10, i64 52
  %76 = load volatile i32, ptr %75, align 4, !tbaa !32
  %77 = or i32 %76, 6
  store volatile i32 %77, ptr %75, align 4, !tbaa !32
  %78 = load volatile i32, ptr %11, align 4, !tbaa !15
  %79 = or i32 %78, 1
  store volatile i32 %79, ptr %11, align 4, !tbaa !15
  %80 = getelementptr inbounds i8, ptr %0, i64 172
  store volatile i32 0, ptr %80, align 4, !tbaa !33
  store volatile i32 1, ptr %4, align 8, !tbaa !5
  br label %81

81:                                               ; preds = %1, %9
  %.0 = phi i32 [ 0, %9 ], [ 1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_LTDC_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 168}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 60, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !12, i64 48}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!13 = !{!6, !11, i64 164}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 24}
!16 = !{!"", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !8, i64 28, !11, i64 36, !8, i64 40, !11, i64 44, !8, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72}
!17 = !{!11, !11, i64 0}
!18 = !{!16, !11, i64 8}
!19 = !{!6, !11, i64 24}
!20 = !{!6, !11, i64 28}
!21 = !{!16, !11, i64 12}
!22 = !{!6, !11, i64 32}
!23 = !{!6, !11, i64 36}
!24 = !{!16, !11, i64 16}
!25 = !{!6, !11, i64 40}
!26 = !{!6, !11, i64 44}
!27 = !{!16, !11, i64 20}
!28 = !{!6, !11, i64 48}
!29 = !{!6, !11, i64 52}
!30 = !{!16, !11, i64 44}
!31 = !{!6, !8, i64 56}
!32 = !{!16, !11, i64 52}
!33 = !{!6, !11, i64 172}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass