; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.COMP_HandleTypeDef = type { ptr, %struct.COMP_InitTypeDef, i32, i32, i32 }
%struct.COMP_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.COMP_TypeDef = type { i32 }
%struct.EXTI_TypeDef = type { i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.EXTI_Core_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@SystemCoreClock = external global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_COMP_Init(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store volatile i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %240

11:                                               ; preds = %1
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  %15 = getelementptr inbounds %struct.COMP_TypeDef, ptr %14, i32 0, i32 0
  %16 = load volatile i32, ptr %15, align 4, !tbaa !14
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, 2147483648
  %19 = icmp eq i64 %18, 2147483648
  br i1 %19, label %20, label %21

20:                                               ; preds = %11
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %239

21:                                               ; preds = %11
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %22, i32 0, i32 3
  %24 = load volatile i32, ptr %23, align 4, !tbaa !16
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %32

26:                                               ; preds = %21
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %27, i32 0, i32 2
  store i32 0, ptr %28, align 8, !tbaa !17
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %29, i32 0, i32 4
  store volatile i32 0, ptr %30, align 8, !tbaa !18
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_COMP_MspInit(ptr noundef %31)
  br label %32

32:                                               ; preds = %26, %21
  %33 = load ptr, ptr %2, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !11
  %36 = getelementptr inbounds %struct.COMP_TypeDef, ptr %35, i32 0, i32 0
  %37 = load volatile i32, ptr %36, align 4, !tbaa !14
  %38 = zext i32 %37 to i64
  %39 = and i64 %38, 4
  %40 = trunc i64 %39 to i32
  store i32 %40, ptr %5, align 4, !tbaa !9
  %41 = load ptr, ptr %2, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %41, i32 0, i32 1
  %43 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %42, i32 0, i32 3
  %44 = load i32, ptr %43, align 4, !tbaa !19
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %45, i32 0, i32 1
  %47 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %46, i32 0, i32 2
  %48 = load i32, ptr %47, align 8, !tbaa !20
  %49 = or i32 %44, %48
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %50, i32 0, i32 1
  %52 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %51, i32 0, i32 6
  %53 = load i32, ptr %52, align 8, !tbaa !21
  %54 = or i32 %49, %53
  %55 = load ptr, ptr %2, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %55, i32 0, i32 1
  %57 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %56, i32 0, i32 4
  %58 = load i32, ptr %57, align 8, !tbaa !22
  %59 = or i32 %54, %58
  %60 = load ptr, ptr %2, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %60, i32 0, i32 1
  %62 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %61, i32 0, i32 5
  %63 = load i32, ptr %62, align 4, !tbaa !23
  %64 = or i32 %59, %63
  %65 = load ptr, ptr %2, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %65, i32 0, i32 1
  %67 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %66, i32 0, i32 1
  %68 = load i32, ptr %67, align 4, !tbaa !24
  %69 = or i32 %64, %68
  store i32 %69, ptr %3, align 4, !tbaa !9
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !11
  %73 = getelementptr inbounds %struct.COMP_TypeDef, ptr %72, i32 0, i32 0
  %74 = load volatile i32, ptr %73, align 4, !tbaa !14
  %75 = zext i32 %74 to i64
  %76 = and i64 %75, -253178655
  %77 = load i32, ptr %3, align 4, !tbaa !9
  %78 = zext i32 %77 to i64
  %79 = or i64 %76, %78
  %80 = trunc i64 %79 to i32
  %81 = load ptr, ptr %2, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %81, i32 0, i32 0
  %83 = load ptr, ptr %82, align 8, !tbaa !11
  %84 = getelementptr inbounds %struct.COMP_TypeDef, ptr %83, i32 0, i32 0
  store volatile i32 %80, ptr %84, align 4, !tbaa !14
  %85 = load ptr, ptr %2, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %85, i32 0, i32 1
  %87 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %86, i32 0, i32 0
  %88 = load i32, ptr %87, align 8, !tbaa !25
  %89 = zext i32 %88 to i64
  %90 = icmp eq i64 %89, 16
  br i1 %90, label %91, label %100

91:                                               ; preds = %32
  %92 = load ptr, ptr %2, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %92, i32 0, i32 0
  %94 = load ptr, ptr %93, align 8, !tbaa !11
  %95 = getelementptr inbounds %struct.COMP_TypeDef, ptr %94, i32 0, i32 0
  %96 = load volatile i32, ptr %95, align 4, !tbaa !14
  %97 = zext i32 %96 to i64
  %98 = or i64 %97, 16
  %99 = trunc i64 %98 to i32
  store volatile i32 %99, ptr %95, align 4, !tbaa !14
  br label %109

100:                                              ; preds = %32
  %101 = load ptr, ptr %2, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %101, i32 0, i32 0
  %103 = load ptr, ptr %102, align 8, !tbaa !11
  %104 = getelementptr inbounds %struct.COMP_TypeDef, ptr %103, i32 0, i32 0
  %105 = load volatile i32, ptr %104, align 4, !tbaa !14
  %106 = zext i32 %105 to i64
  %107 = and i64 %106, -17
  %108 = trunc i64 %107 to i32
  store volatile i32 %108, ptr %104, align 4, !tbaa !14
  br label %109

109:                                              ; preds = %100, %91
  %110 = load ptr, ptr %2, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %110, i32 0, i32 0
  %112 = load ptr, ptr %111, align 8, !tbaa !11
  %113 = getelementptr inbounds %struct.COMP_TypeDef, ptr %112, i32 0, i32 0
  %114 = load volatile i32, ptr %113, align 4, !tbaa !14
  %115 = zext i32 %114 to i64
  %116 = and i64 %115, 4
  %117 = icmp ne i64 %116, 0
  br i1 %117, label %118, label %136

118:                                              ; preds = %109
  %119 = load i32, ptr %5, align 4, !tbaa !9
  %120 = zext i32 %119 to i64
  %121 = icmp ne i64 %120, 0
  br i1 %121, label %122, label %136

122:                                              ; preds = %118
  %123 = load i32, ptr @SystemCoreClock, align 4, !tbaa !9
  %124 = zext i32 %123 to i64
  %125 = udiv i64 %124, 2000000
  %126 = mul i64 200, %125
  %127 = trunc i64 %126 to i32
  store volatile i32 %127, ptr %6, align 4, !tbaa !9
  br label %128

128:                                              ; preds = %132, %122
  %129 = load volatile i32, ptr %6, align 4, !tbaa !9
  %130 = zext i32 %129 to i64
  %131 = icmp ne i64 %130, 0
  br i1 %131, label %132, label %135

132:                                              ; preds = %128
  %133 = load volatile i32, ptr %6, align 4, !tbaa !9
  %134 = add i32 %133, -1
  store volatile i32 %134, ptr %6, align 4, !tbaa !9
  br label %128, !llvm.loop !26

135:                                              ; preds = %128
  br label %136

136:                                              ; preds = %135, %118, %109
  %137 = load ptr, ptr %2, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %137, i32 0, i32 0
  %139 = load ptr, ptr %138, align 8, !tbaa !11
  %140 = icmp eq ptr %139, inttoptr (i64 1476409356 to ptr)
  %141 = zext i1 %140 to i64
  %142 = select i1 %140, i64 1048576, i64 2097152
  %143 = trunc i64 %142 to i32
  store i32 %143, ptr %4, align 4, !tbaa !9
  %144 = load ptr, ptr %2, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %144, i32 0, i32 1
  %146 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %145, i32 0, i32 7
  %147 = load i32, ptr %146, align 4, !tbaa !28
  %148 = and i32 %147, 3
  %149 = zext i32 %148 to i64
  %150 = icmp ne i64 %149, 0
  br i1 %150, label %151, label %221

151:                                              ; preds = %136
  %152 = load ptr, ptr %2, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %152, i32 0, i32 1
  %154 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %153, i32 0, i32 7
  %155 = load i32, ptr %154, align 4, !tbaa !28
  %156 = and i32 %155, 16
  %157 = zext i32 %156 to i64
  %158 = icmp ne i64 %157, 0
  br i1 %158, label %159, label %163

159:                                              ; preds = %151
  %160 = load i32, ptr %4, align 4, !tbaa !9
  %161 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !29
  %162 = or i32 %161, %160
  store volatile i32 %162, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !29
  br label %168

163:                                              ; preds = %151
  %164 = load i32, ptr %4, align 4, !tbaa !9
  %165 = xor i32 %164, -1
  %166 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !29
  %167 = and i32 %166, %165
  store volatile i32 %167, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !29
  br label %168

168:                                              ; preds = %163, %159
  %169 = load ptr, ptr %2, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %169, i32 0, i32 1
  %171 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %170, i32 0, i32 7
  %172 = load i32, ptr %171, align 4, !tbaa !28
  %173 = and i32 %172, 32
  %174 = zext i32 %173 to i64
  %175 = icmp ne i64 %174, 0
  br i1 %175, label %176, label %180

176:                                              ; preds = %168
  %177 = load i32, ptr %4, align 4, !tbaa !9
  %178 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !31
  %179 = or i32 %178, %177
  store volatile i32 %179, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !31
  br label %185

180:                                              ; preds = %168
  %181 = load i32, ptr %4, align 4, !tbaa !9
  %182 = xor i32 %181, -1
  %183 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !31
  %184 = and i32 %183, %182
  store volatile i32 %184, ptr getelementptr inbounds (%struct.EXTI_TypeDef, ptr inttoptr (i64 1476395008 to ptr), i32 0, i32 1), align 4, !tbaa !31
  br label %185

185:                                              ; preds = %180, %176
  %186 = load i32, ptr %4, align 4, !tbaa !9
  store volatile i32 %186, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 2), align 4, !tbaa !32
  %187 = load ptr, ptr %2, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %187, i32 0, i32 1
  %189 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %188, i32 0, i32 7
  %190 = load i32, ptr %189, align 4, !tbaa !28
  %191 = and i32 %190, 2
  %192 = zext i32 %191 to i64
  %193 = icmp ne i64 %192, 0
  br i1 %193, label %194, label %198

194:                                              ; preds = %185
  %195 = load i32, ptr %4, align 4, !tbaa !9
  %196 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  %197 = or i32 %196, %195
  store volatile i32 %197, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  br label %203

198:                                              ; preds = %185
  %199 = load i32, ptr %4, align 4, !tbaa !9
  %200 = xor i32 %199, -1
  %201 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  %202 = and i32 %201, %200
  store volatile i32 %202, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  br label %203

203:                                              ; preds = %198, %194
  %204 = load ptr, ptr %2, align 8, !tbaa !5
  %205 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %204, i32 0, i32 1
  %206 = getelementptr inbounds %struct.COMP_InitTypeDef, ptr %205, i32 0, i32 7
  %207 = load i32, ptr %206, align 4, !tbaa !28
  %208 = and i32 %207, 1
  %209 = zext i32 %208 to i64
  %210 = icmp ne i64 %209, 0
  br i1 %210, label %211, label %215

211:                                              ; preds = %203
  %212 = load i32, ptr %4, align 4, !tbaa !9
  %213 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  %214 = or i32 %213, %212
  store volatile i32 %214, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  br label %220

215:                                              ; preds = %203
  %216 = load i32, ptr %4, align 4, !tbaa !9
  %217 = xor i32 %216, -1
  %218 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  %219 = and i32 %218, %217
  store volatile i32 %219, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  br label %220

220:                                              ; preds = %215, %211
  br label %230

221:                                              ; preds = %136
  %222 = load i32, ptr %4, align 4, !tbaa !9
  %223 = xor i32 %222, -1
  %224 = load volatile i32, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  %225 = and i32 %224, %223
  store volatile i32 %225, ptr getelementptr inbounds (%struct.EXTI_Core_TypeDef, ptr inttoptr (i64 1476395136 to ptr), i32 0, i32 1), align 4, !tbaa !34
  %226 = load i32, ptr %4, align 4, !tbaa !9
  %227 = xor i32 %226, -1
  %228 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  %229 = and i32 %228, %227
  store volatile i32 %229, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !35
  br label %230

230:                                              ; preds = %221, %220
  %231 = load ptr, ptr %2, align 8, !tbaa !5
  %232 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %231, i32 0, i32 3
  %233 = load volatile i32, ptr %232, align 4, !tbaa !16
  %234 = icmp eq i32 %233, 0
  br i1 %234, label %235, label %238

235:                                              ; preds = %230
  %236 = load ptr, ptr %2, align 8, !tbaa !5
  %237 = getelementptr inbounds %struct.COMP_HandleTypeDef, ptr %236, i32 0, i32 3
  store volatile i32 1, ptr %237, align 4, !tbaa !16
  br label %238

238:                                              ; preds = %235, %230
  br label %239

239:                                              ; preds = %238, %20
  br label %240

240:                                              ; preds = %239, %10
  %241 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %241
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_COMP_MspInit(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 40, !10, i64 44, !10, i64 48}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0}
!16 = !{!12, !10, i64 44}
!17 = !{!12, !10, i64 40}
!18 = !{!12, !10, i64 48}
!19 = !{!12, !10, i64 20}
!20 = !{!12, !10, i64 16}
!21 = !{!12, !10, i64 32}
!22 = !{!12, !10, i64 24}
!23 = !{!12, !10, i64 28}
!24 = !{!12, !10, i64 12}
!25 = !{!12, !10, i64 8}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!12, !10, i64 36}
!29 = !{!30, !10, i64 0}
!30 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !7, i64 56, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !7, i64 88, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168}
!31 = !{!30, !10, i64 4}
!32 = !{!33, !10, i64 8}
!33 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40}
!34 = !{!33, !10, i64 4}
!35 = !{!33, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_COMP_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  %3 = icmp eq ptr %0, null
  br i1 %3, label %91, label %4

4:                                                ; preds = %1
  %5 = load ptr, ptr %0, align 8, !tbaa !9
  %6 = load volatile i32, ptr %5, align 4, !tbaa !13
  %.not = icmp sgt i32 %6, -1
  br i1 %.not, label %7, label %91

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 44
  %9 = load volatile i32, ptr %8, align 4, !tbaa !15
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %11, label %14

11:                                               ; preds = %7
  %12 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 0, ptr %12, align 8, !tbaa !16
  %13 = getelementptr inbounds i8, ptr %0, i64 48
  store volatile i32 0, ptr %13, align 8, !tbaa !17
  tail call void @HAL_COMP_MspInit(ptr noundef nonnull %0)
  %.pre = load ptr, ptr %0, align 8, !tbaa !9
  br label %14

14:                                               ; preds = %11, %7
  %15 = phi ptr [ %.pre, %11 ], [ %5, %7 ]
  %16 = load volatile i32, ptr %15, align 4, !tbaa !13
  %17 = and i32 %16, 4
  %18 = getelementptr inbounds i8, ptr %0, i64 8
  %19 = getelementptr inbounds i8, ptr %0, i64 20
  %20 = getelementptr inbounds i8, ptr %0, i64 16
  %21 = load i32, ptr %20, align 8, !tbaa !18
  %22 = load <4 x i32>, ptr %19, align 4, !tbaa !5
  %23 = getelementptr inbounds i8, ptr %0, i64 12
  %24 = load i32, ptr %23, align 4, !tbaa !19
  %25 = load volatile i32, ptr %15, align 4, !tbaa !13
  %26 = and i32 %25, -253178655
  %27 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %22)
  %op.rdx = or i32 %27, %21
  %op.rdx57 = or i32 %24, %26
  %op.rdx58 = or i32 %op.rdx, %op.rdx57
  store volatile i32 %op.rdx58, ptr %15, align 4, !tbaa !13
  %28 = load i32, ptr %18, align 8, !tbaa !20
  %29 = icmp eq i32 %28, 16
  %30 = load volatile i32, ptr %15, align 4, !tbaa !13
  %31 = and i32 %30, -17
  %masksel = select i1 %29, i32 16, i32 0
  %.sink = or disjoint i32 %31, %masksel
  store volatile i32 %.sink, ptr %15, align 4, !tbaa !13
  %32 = load volatile i32, ptr %15, align 4, !tbaa !13
  %33 = and i32 %32, 4
  %34 = icmp ne i32 %33, 0
  %35 = icmp ne i32 %17, 0
  %or.cond = select i1 %34, i1 %35, i1 false
  br i1 %or.cond, label %36, label %.loopexit

36:                                               ; preds = %14
  %37 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %38 = udiv i32 %37, 2000000
  %narrow = mul nuw nsw i32 %38, 200
  store volatile i32 %narrow, ptr %2, align 4, !tbaa !5
  %.0..0..0..0.51 = load volatile i32, ptr %2, align 4, !tbaa !5
  %.not4552 = icmp eq i32 %.0..0..0..0.51, 0
  br i1 %.not4552, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %36, %.lr.ph
  %.0..0..0..0.3 = load volatile i32, ptr %2, align 4, !tbaa !5
  %39 = add i32 %.0..0..0..0.3, -1
  store volatile i32 %39, ptr %2, align 4, !tbaa !5
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !5
  %.not45 = icmp eq i32 %.0..0..0..0., 0
  br i1 %.not45, label %.loopexit, label %.lr.ph, !llvm.loop !21

.loopexit:                                        ; preds = %.lr.ph, %36, %14
  %40 = icmp eq ptr %15, inttoptr (i64 1476409356 to ptr)
  %41 = select i1 %40, i32 1048576, i32 2097152
  %42 = getelementptr inbounds i8, ptr %0, i64 36
  %43 = load i32, ptr %42, align 4, !tbaa !23
  %44 = and i32 %43, 3
  %.not46 = icmp eq i32 %44, 0
  br i1 %.not46, label %81, label %45

45:                                               ; preds = %.loopexit
  %46 = and i32 %43, 16
  %.not47 = icmp eq i32 %46, 0
  br i1 %.not47, label %50, label %47

47:                                               ; preds = %45
  %48 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !24
  %49 = or i32 %48, %41
  br label %54

50:                                               ; preds = %45
  %51 = xor i32 %41, -1
  %52 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !24
  %53 = and i32 %52, %51
  br label %54

54:                                               ; preds = %50, %47
  %.sink53 = phi i32 [ %53, %50 ], [ %49, %47 ]
  store volatile i32 %.sink53, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !24
  %55 = and i32 %43, 32
  %.not48 = icmp eq i32 %55, 0
  br i1 %.not48, label %59, label %56

56:                                               ; preds = %54
  %57 = load volatile i32, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !26
  %58 = or i32 %57, %41
  br label %63

59:                                               ; preds = %54
  %60 = xor i32 %41, -1
  %61 = load volatile i32, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !26
  %62 = and i32 %61, %60
  br label %63

63:                                               ; preds = %59, %56
  %.sink54 = phi i32 [ %62, %59 ], [ %58, %56 ]
  store volatile i32 %.sink54, ptr inttoptr (i64 1476395012 to ptr), align 4, !tbaa !26
  store volatile i32 %41, ptr inttoptr (i64 1476395144 to ptr), align 8, !tbaa !27
  %64 = and i32 %43, 2
  %.not49 = icmp eq i32 %64, 0
  br i1 %.not49, label %68, label %65

65:                                               ; preds = %63
  %66 = load volatile i32, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !29
  %67 = or i32 %66, %41
  br label %72

68:                                               ; preds = %63
  %69 = xor i32 %41, -1
  %70 = load volatile i32, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !29
  %71 = and i32 %70, %69
  br label %72

72:                                               ; preds = %68, %65
  %.sink55 = phi i32 [ %71, %68 ], [ %67, %65 ]
  store volatile i32 %.sink55, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !29
  %73 = and i32 %43, 1
  %.not50 = icmp eq i32 %73, 0
  br i1 %.not50, label %77, label %74

74:                                               ; preds = %72
  %75 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !30
  %76 = or i32 %75, %41
  br label %87

77:                                               ; preds = %72
  %78 = xor i32 %41, -1
  %79 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !30
  %80 = and i32 %79, %78
  br label %87

81:                                               ; preds = %.loopexit
  %82 = xor i32 %41, -1
  %83 = load volatile i32, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !29
  %84 = and i32 %83, %82
  store volatile i32 %84, ptr inttoptr (i64 1476395140 to ptr), align 4, !tbaa !29
  %85 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !30
  %86 = and i32 %85, %82
  br label %87

87:                                               ; preds = %74, %77, %81
  %.sink56 = phi i32 [ %76, %74 ], [ %80, %77 ], [ %86, %81 ]
  store volatile i32 %.sink56, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !30
  %88 = load volatile i32, ptr %8, align 4, !tbaa !15
  %89 = icmp eq i32 %88, 0
  br i1 %89, label %90, label %91

90:                                               ; preds = %87
  store volatile i32 1, ptr %8, align 4, !tbaa !15
  br label %91

91:                                               ; preds = %4, %1, %90, %87
  %.0 = phi i32 [ 0, %90 ], [ 0, %87 ], [ 1, %1 ], [ 1, %4 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_COMP_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !12, i64 8, !6, i64 40, !6, i64 44, !6, i64 48}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!13 = !{!14, !6, i64 0}
!14 = !{!"", !6, i64 0}
!15 = !{!10, !6, i64 44}
!16 = !{!10, !6, i64 40}
!17 = !{!10, !6, i64 48}
!18 = !{!10, !6, i64 16}
!19 = !{!10, !6, i64 12}
!20 = !{!10, !6, i64 8}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!10, !6, i64 36}
!24 = !{!25, !6, i64 0}
!25 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !7, i64 24, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !7, i64 56, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !7, i64 88, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168}
!26 = !{!25, !6, i64 4}
!27 = !{!28, !6, i64 8}
!28 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40}
!29 = !{!28, !6, i64 4}
!30 = !{!28, !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass