; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (GetTxVLANConfig)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ETH_HandleTypeDef = type { ptr, %struct.ETH_InitTypeDef, %struct.ETH_TxDescListTypeDef, %struct.ETH_RxDescListTypeDef, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.ETH_InitTypeDef = type { ptr, i32, ptr, ptr, i32 }
%struct.ETH_TxDescListTypeDef = type { [4 x i32], i32 }
%struct.ETH_RxDescListTypeDef = type { [4 x i32], i32, i32, i32, i32, i32 }
%struct.ETH_TypeDef = type { i32, i32, i32, i32, i32, i32, [14 x i32], i32, i32, i32, i32, i32, i32, [2 x i32], i32, [7 x i32], i32, [7 x i32], i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, [12 x i32], i32, i32, i32, i32, i32, i32, [54 x i32], i32, i32, [2 x i32], i32, [59 x i32], i32, i32, i32, i32, i32, i32, i32, i32, [248 x i32], i32, i32, i32, i32, i32, [14 x i32], i32, i32, [5 x i32], i32, [10 x i32], i32, i32, [10 x i32], i32, [9 x i32], i32, i32, i32, i32, [65 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, [108 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, [3 x i32], i32, i32, i32, i32, [12 x i32], i32, i32, i32, i32, i32, [11 x i32], i32, [7 x i32], i32, [55 x i32], i32, i32, i32, [8 x i32], i32, i32, i32, i32, [177 x i32], i32, i32, i32, i32, [60 x i32], i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32 }
%struct.ETH_TxVLANConfigTypeDef = type { i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_ETHEx_GetTxVLANConfig(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %3
  store i32 1, ptr %4, align 4
  br label %89

11:                                               ; preds = %3
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %14, label %51

14:                                               ; preds = %11
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %15, i32 0, i32 0
  %17 = load ptr, ptr %16, align 8, !tbaa !11
  %18 = getelementptr inbounds %struct.ETH_TypeDef, ptr %17, i32 0, i32 12
  %19 = load volatile i32, ptr %18, align 4, !tbaa !16
  %20 = zext i32 %19 to i64
  %21 = and i64 %20, 1048576
  %22 = lshr i64 %21, 20
  %23 = icmp eq i64 %22, 0
  %24 = zext i1 %23 to i64
  %25 = select i1 %23, i32 0, i32 1
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %26, i32 0, i32 0
  store i32 %25, ptr %27, align 4, !tbaa !18
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !11
  %31 = getelementptr inbounds %struct.ETH_TypeDef, ptr %30, i32 0, i32 12
  %32 = load volatile i32, ptr %31, align 4, !tbaa !16
  %33 = zext i32 %32 to i64
  %34 = and i64 %33, 524288
  %35 = lshr i64 %34, 19
  %36 = icmp eq i64 %35, 0
  %37 = zext i1 %36 to i64
  %38 = select i1 %36, i32 0, i32 1
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %39, i32 0, i32 1
  store i32 %38, ptr %40, align 4, !tbaa !20
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %41, i32 0, i32 0
  %43 = load ptr, ptr %42, align 8, !tbaa !11
  %44 = getelementptr inbounds %struct.ETH_TypeDef, ptr %43, i32 0, i32 12
  %45 = load volatile i32, ptr %44, align 4, !tbaa !16
  %46 = zext i32 %45 to i64
  %47 = and i64 %46, 458752
  %48 = trunc i64 %47 to i32
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %49, i32 0, i32 2
  store i32 %48, ptr %50, align 4, !tbaa !21
  br label %88

51:                                               ; preds = %11
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %52, i32 0, i32 0
  %54 = load ptr, ptr %53, align 8, !tbaa !11
  %55 = getelementptr inbounds %struct.ETH_TypeDef, ptr %54, i32 0, i32 11
  %56 = load volatile i32, ptr %55, align 4, !tbaa !22
  %57 = zext i32 %56 to i64
  %58 = and i64 %57, 1048576
  %59 = lshr i64 %58, 20
  %60 = icmp eq i64 %59, 0
  %61 = zext i1 %60 to i64
  %62 = select i1 %60, i32 0, i32 1
  %63 = load ptr, ptr %7, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %63, i32 0, i32 0
  store i32 %62, ptr %64, align 4, !tbaa !18
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %65, i32 0, i32 0
  %67 = load ptr, ptr %66, align 8, !tbaa !11
  %68 = getelementptr inbounds %struct.ETH_TypeDef, ptr %67, i32 0, i32 11
  %69 = load volatile i32, ptr %68, align 4, !tbaa !22
  %70 = zext i32 %69 to i64
  %71 = and i64 %70, 524288
  %72 = lshr i64 %71, 19
  %73 = icmp eq i64 %72, 0
  %74 = zext i1 %73 to i64
  %75 = select i1 %73, i32 0, i32 1
  %76 = load ptr, ptr %7, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %76, i32 0, i32 1
  store i32 %75, ptr %77, align 4, !tbaa !20
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.ETH_HandleTypeDef, ptr %78, i32 0, i32 0
  %80 = load ptr, ptr %79, align 8, !tbaa !11
  %81 = getelementptr inbounds %struct.ETH_TypeDef, ptr %80, i32 0, i32 11
  %82 = load volatile i32, ptr %81, align 4, !tbaa !22
  %83 = zext i32 %82 to i64
  %84 = and i64 %83, 458752
  %85 = trunc i64 %84 to i32
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.ETH_TxVLANConfigTypeDef, ptr %86, i32 0, i32 2
  store i32 %85, ptr %87, align 4, !tbaa !21
  br label %88

88:                                               ; preds = %51, %14
  store i32 0, ptr %4, align 4
  br label %89

89:                                               ; preds = %88, %10
  %90 = load i32, ptr %4, align 4
  ret i32 %90
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !14, i64 48, !15, i64 68, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132}
!13 = !{!"", !6, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !10, i64 32}
!14 = !{!"", !7, i64 0, !10, i64 16}
!15 = !{!"", !7, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!16 = !{!17, !10, i64 100}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !7, i64 104, !10, i64 112, !7, i64 116, !10, i64 144, !7, i64 148, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !7, i64 200, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !7, i64 224, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !7, i64 296, !10, i64 512, !10, i64 516, !7, i64 520, !10, i64 528, !7, i64 532, !10, i64 768, !10, i64 772, !10, i64 776, !10, i64 780, !10, i64 784, !10, i64 788, !10, i64 792, !10, i64 796, !7, i64 800, !10, i64 1792, !10, i64 1796, !10, i64 1800, !10, i64 1804, !10, i64 1808, !7, i64 1812, !10, i64 1868, !10, i64 1872, !7, i64 1876, !10, i64 1896, !7, i64 1900, !10, i64 1940, !10, i64 1944, !7, i64 1948, !10, i64 1988, !7, i64 1992, !10, i64 2028, !10, i64 2032, !10, i64 2036, !10, i64 2040, !7, i64 2044, !10, i64 2304, !10, i64 2308, !7, i64 2312, !10, i64 2320, !10, i64 2324, !10, i64 2328, !10, i64 2332, !7, i64 2336, !10, i64 2352, !10, i64 2356, !7, i64 2360, !10, i64 2368, !10, i64 2372, !10, i64 2376, !10, i64 2380, !7, i64 2384, !10, i64 2816, !10, i64 2820, !10, i64 2824, !10, i64 2828, !10, i64 2832, !10, i64 2836, !10, i64 2840, !10, i64 2844, !10, i64 2848, !7, i64 2852, !10, i64 2864, !10, i64 2868, !7, i64 2872, !10, i64 2880, !10, i64 2884, !10, i64 2888, !10, i64 2892, !10, i64 2896, !10, i64 2900, !10, i64 2904, !10, i64 2908, !7, i64 2912, !10, i64 2928, !7, i64 2932, !10, i64 2944, !10, i64 2948, !10, i64 2952, !10, i64 2956, !7, i64 2960, !10, i64 3008, !10, i64 3012, !10, i64 3016, !10, i64 3020, !10, i64 3024, !7, i64 3028, !10, i64 3072, !7, i64 3076, !10, i64 3104, !7, i64 3108, !10, i64 3328, !10, i64 3332, !10, i64 3336, !7, i64 3340, !10, i64 3372, !10, i64 3376, !10, i64 3380, !10, i64 3384, !7, i64 3388, !10, i64 4096, !10, i64 4100, !10, i64 4104, !10, i64 4108, !7, i64 4112, !10, i64 4352, !10, i64 4356, !10, i64 4360, !7, i64 4364, !10, i64 4372, !10, i64 4376, !10, i64 4380, !10, i64 4384, !10, i64 4388, !10, i64 4392, !10, i64 4396, !10, i64 4400, !10, i64 4404, !10, i64 4408, !10, i64 4412, !10, i64 4416, !10, i64 4420, !10, i64 4424, !10, i64 4428, !10, i64 4432, !10, i64 4436, !10, i64 4440, !10, i64 4444, !10, i64 4448, !7, i64 4452, !10, i64 4460}
!18 = !{!19, !10, i64 0}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8}
!20 = !{!19, !10, i64 4}
!21 = !{!19, !10, i64 8}
!22 = !{!17, !10, i64 96}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local range(i32 0, 2) i32 @HAL_ETHEx_GetTxVLANConfig(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef writeonly %2) local_unnamed_addr #0 {
  %4 = icmp eq ptr %2, null
  br i1 %4, label %16, label %.sink.split

.sink.split:                                      ; preds = %3
  %5 = icmp eq i32 %1, 1
  %6 = load ptr, ptr %0, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %2, i64 4
  %8 = getelementptr inbounds i8, ptr %2, i64 8
  %. = select i1 %5, i64 100, i64 96
  %9 = getelementptr inbounds i8, ptr %6, i64 %.
  %10 = load volatile i32, ptr %9, align 4, !tbaa !14
  %11 = lshr i32 %10, 20
  %.lobit16 = and i32 %11, 1
  store i32 %.lobit16, ptr %2, align 4, !tbaa !15
  %12 = load volatile i32, ptr %9, align 4, !tbaa !14
  %13 = lshr i32 %12, 19
  %.lobit17 = and i32 %13, 1
  store i32 %.lobit17, ptr %7, align 4, !tbaa !17
  %14 = load volatile i32, ptr %9, align 4, !tbaa !14
  %15 = and i32 %14, 458752
  store i32 %15, ptr %8, align 4, !tbaa !18
  br label %16

16:                                               ; preds = %.sink.split, %3
  %.0 = phi i32 [ 1, %3 ], [ 0, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !12, i64 48, !13, i64 68, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !7, i64 0, !11, i64 8, !7, i64 16, !7, i64 24, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !8, i64 0, !11, i64 16}
!13 = !{!"", !8, i64 0, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!17 = !{!16, !11, i64 4}
!18 = !{!16, !11, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass