; LLVM IR from trabucayre/openFPGALoader :: src/anlogic.ll (ZN7Anlogic6idCodeEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Device = type <{ ptr, ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i8, i8, i8, i8 }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef i32 @_ZN4Jtag7shiftDREPKhPhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7Anlogic6idCodeEv(ptr noundef nonnull align 8 dereferenceable(144) %0) unnamed_addr #3 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca [4 x i8], align 1
  %4 = alloca [4 x i8], align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %6 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  store i8 6, ptr %6, align 1, !tbaa !9
  %7 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %8 = load ptr, ptr %7, align 8, !tbaa !10
  call void @_ZN4Jtag19go_test_logic_resetEv(ptr noundef nonnull align 8 dereferenceable(193) %8)
  %9 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %10 = load ptr, ptr %9, align 8, !tbaa !10
  %11 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  %12 = call noundef i32 @_ZN4Jtag7shiftIREPhS0_iNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %10, ptr noundef %11, ptr noundef null, i32 noundef 8, i32 noundef 1)
  %13 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 1 %13, i8 0, i64 4, i1 false)
  %14 = getelementptr inbounds %class.Device, ptr %5, i32 0, i32 1
  %15 = load ptr, ptr %14, align 8, !tbaa !10
  %16 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 0
  %17 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 0
  %18 = call noundef i32 @_ZN4Jtag7shiftDREPKhPhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %15, ptr noundef %16, ptr noundef %17, i32 noundef 32, i32 noundef 1)
  %19 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 0
  %20 = load i8, ptr %19, align 1, !tbaa !9
  %21 = zext i8 %20 to i32
  %22 = and i32 %21, 255
  %23 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 1
  %24 = load i8, ptr %23, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = shl i32 %25, 8
  %27 = and i32 %26, 65280
  %28 = or i32 %22, %27
  %29 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 2
  %30 = load i8, ptr %29, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = shl i32 %31, 16
  %33 = and i32 %32, 16711680
  %34 = or i32 %28, %33
  %35 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 3
  %36 = load i8, ptr %35, align 1, !tbaa !9
  %37 = zext i8 %36 to i32
  %38 = shl i32 %37, 24
  %39 = and i32 %38, -16777216
  %40 = or i32 %34, %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i32 %40
}

declare void @_ZN4Jtag19go_test_logic_resetEv(ptr noundef nonnull align 8 dereferenceable(193)) #2

declare noundef i32 @_ZN4Jtag7shiftIREPhS0_iNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 8}
!11 = !{!"_ZTS6Device", !6, i64 8, !12, i64 16, !12, i64 48, !15, i64 80, !16, i64 84, !16, i64 85, !16, i64 86}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !14, i64 8, !7, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"_ZTSN6Device9prog_modeE", !7, i64 0}
!16 = !{!"bool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef i32 @_ZN4Jtag7shiftDREPKhPhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7Anlogic6idCodeEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(144) %0) unnamed_addr #2 align 2 {
  %2 = alloca [4 x i8], align 4
  %3 = alloca [4 x i8], align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i8 6, ptr %2, align 4, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load ptr, ptr %4, align 8, !tbaa !8
  tail call void @_ZN4Jtag19go_test_logic_resetEv(ptr noundef nonnull align 8 dereferenceable(193) %5)
  %6 = load ptr, ptr %4, align 8, !tbaa !8
  %7 = call noundef i32 @_ZN4Jtag7shiftIREPhS0_iNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %6, ptr noundef nonnull %2, ptr noundef null, i32 noundef 8, i32 noundef 1)
  store i32 0, ptr %2, align 4
  %8 = load ptr, ptr %4, align 8, !tbaa !8
  %9 = call noundef i32 @_ZN4Jtag7shiftDREPKhPhiNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193) %8, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef 32, i32 noundef 1)
  %10 = load i32, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret i32 %10
}

declare void @_ZN4Jtag19go_test_logic_resetEv(ptr noundef nonnull align 8 dereferenceable(193)) local_unnamed_addr #1

declare noundef i32 @_ZN4Jtag7shiftIREPhS0_iNS_10tapState_tE(ptr noundef nonnull align 8 dereferenceable(193), ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTS6Device", !10, i64 8, !11, i64 16, !11, i64 48, !14, i64 80, !15, i64 84, !15, i64 85, !15, i64 86}
!10 = !{!"any pointer", !6, i64 0}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !13, i64 8, !6, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!13 = !{!"long", !6, i64 0}
!14 = !{!"_ZTSN6Device9prog_modeE", !6, i64 0}
!15 = !{!"bool", !6, i64 0}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass