; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/5909（树形dp+FWT）.ll (Z3FWTPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3FWTPii(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %80, %2
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %83

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = shl i32 %18, 1
  store i32 %19, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %75, %17
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %79

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %71, %25
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %5, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %74

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = add nsw i32 %33, %34
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds i32, ptr %32, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !9
  store i32 %38, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  %43 = load i32, ptr %5, align 4, !tbaa !9
  %44 = add nsw i32 %42, %43
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %39, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !9
  store i32 %47, ptr %11, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = load i32, ptr %11, align 4, !tbaa !9
  %50 = add nsw i32 %48, %49
  %51 = srem i32 %50, 1000000007
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = load i32, ptr %8, align 4, !tbaa !9
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = add nsw i32 %53, %54
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds i32, ptr %52, i64 %56
  store i32 %51, ptr %57, align 4, !tbaa !9
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = sub nsw i32 %58, %59
  %61 = add nsw i32 %60, 1000000007
  %62 = srem i32 %61, 1000000007
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = load i32, ptr %8, align 4, !tbaa !9
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = add nsw i32 %64, %65
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = add nsw i32 %66, %67
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds i32, ptr %63, i64 %69
  store i32 %62, ptr %70, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %71

71:                                               ; preds = %31
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %9, align 4, !tbaa !9
  br label %26, !llvm.loop !11

74:                                               ; preds = %30
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %7, align 4, !tbaa !9
  %77 = load i32, ptr %8, align 4, !tbaa !9
  %78 = add nsw i32 %77, %76
  store i32 %78, ptr %8, align 4, !tbaa !9
  br label %20, !llvm.loop !13

79:                                               ; preds = %24
  br label %80

80:                                               ; preds = %79
  %81 = load i32, ptr %5, align 4, !tbaa !9
  %82 = shl i32 %81, 1
  store i32 %82, ptr %5, align 4, !tbaa !9
  br label %12, !llvm.loop !14

83:                                               ; preds = %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_Z3FWTPii(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.preheader.lr.ph.us.preheader, label %._crit_edge

.preheader.lr.ph.us.preheader:                    ; preds = %2
  %4 = zext nneg i32 %1 to i64
  br label %.preheader.lr.ph.us

.preheader.lr.ph.us:                              ; preds = %.preheader.lr.ph.us.preheader, %..loopexit_crit_edge.us
  %.033.us = phi i32 [ %5, %..loopexit_crit_edge.us ], [ 1, %.preheader.lr.ph.us.preheader ]
  %5 = shl i32 %.033.us, 1
  %6 = icmp sgt i32 %.033.us, 0
  br i1 %6, label %.preheader.us.us.preheader, label %..loopexit_crit_edge.us

.preheader.us.us.preheader:                       ; preds = %.preheader.lr.ph.us
  %7 = zext nneg i32 %.033.us to i64
  %8 = sext i32 %5 to i64
  %wide.trip.count = zext nneg i32 %.033.us to i64
  %invariant.gep = getelementptr i32, ptr %0, i64 %7
  %min.iters.check = icmp ult i32 %.033.us, 4
  %n.vec = and i64 %wide.trip.count, 2147483644
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br label %.preheader.us.us

..loopexit_crit_edge.us:                          ; preds = %._crit_edge.us.us, %.preheader.lr.ph.us
  %9 = icmp slt i32 %5, %1
  br i1 %9, label %.preheader.lr.ph.us, label %._crit_edge, !llvm.loop !5

.preheader.us.us:                                 ; preds = %.preheader.us.us.preheader, %._crit_edge.us.us
  %indvars.iv40 = phi i64 [ 0, %.preheader.us.us.preheader ], [ %indvars.iv.next41, %._crit_edge.us.us ]
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader.us.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader.us.us ]
  %10 = add nsw i64 %index, %indvars.iv40
  %11 = getelementptr inbounds i32, ptr %0, i64 %10
  %wide.load = load <4 x i32>, ptr %11, align 4, !tbaa !7
  %12 = getelementptr i32, ptr %invariant.gep, i64 %10
  %wide.load43 = load <4 x i32>, ptr %12, align 4, !tbaa !7
  %13 = add nsw <4 x i32> %wide.load43, %wide.load
  %14 = srem <4 x i32> %13, <i32 1000000007, i32 1000000007, i32 1000000007, i32 1000000007>
  store <4 x i32> %14, ptr %11, align 4, !tbaa !7
  %15 = add <4 x i32> %wide.load, <i32 1000000007, i32 1000000007, i32 1000000007, i32 1000000007>
  %16 = sub <4 x i32> %15, %wide.load43
  %17 = srem <4 x i32> %16, <i32 1000000007, i32 1000000007, i32 1000000007, i32 1000000007>
  store <4 x i32> %17, ptr %12, align 4, !tbaa !7
  %index.next = add nuw i64 %index, 4
  %18 = icmp eq i64 %index.next, %n.vec
  br i1 %18, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %._crit_edge.us.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us.us
  %indvars.iv.ph = phi i64 [ 0, %.preheader.us.us ], [ %n.vec, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %19 = add nsw i64 %indvars.iv, %indvars.iv40
  %20 = getelementptr inbounds i32, ptr %0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !7
  %gep = getelementptr i32, ptr %invariant.gep, i64 %19
  %22 = load i32, ptr %gep, align 4, !tbaa !7
  %23 = add nsw i32 %22, %21
  %24 = srem i32 %23, 1000000007
  store i32 %24, ptr %20, align 4, !tbaa !7
  %25 = add i32 %21, 1000000007
  %26 = sub i32 %25, %22
  %27 = srem i32 %26, 1000000007
  store i32 %27, ptr %gep, align 4, !tbaa !7
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.us.us, label %scalar.ph, !llvm.loop !14

._crit_edge.us.us:                                ; preds = %scalar.ph, %middle.block
  %indvars.iv.next41 = add nsw i64 %indvars.iv40, %8
  %28 = icmp slt i64 %indvars.iv.next41, %4
  br i1 %28, label %.preheader.us.us, label %..loopexit_crit_edge.us, !llvm.loop !15

._crit_edge:                                      ; preds = %..loopexit_crit_edge.us, %2
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6, !12, !13}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !6, !13, !12}
!15 = distinct !{!15, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass