; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QSPI_HandleTypeDef = type { ptr, %struct.QSPI_InitTypeDef, ptr, i32, i32, ptr, i32, i32, ptr, i32, i32, i32, i32 }
%struct.QSPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.QUADSPI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_QSPI_Receive_IT(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %9, i32 0, i32 0
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  %12 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %11, i32 0, i32 6
  %13 = load volatile i32, ptr %12, align 4, !tbaa !14
  store i32 %13, ptr %7, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %2
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %15, i32 0, i32 9
  %17 = load volatile i32, ptr %16, align 8, !tbaa !16
  %18 = icmp eq i32 %17, 1
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  store i32 2, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %111

20:                                               ; preds = %14
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %21, i32 0, i32 9
  store volatile i32 1, ptr %22, align 8, !tbaa !16
  br label %23

23:                                               ; preds = %20
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %26, i32 0, i32 10
  %28 = load volatile i32, ptr %27, align 4, !tbaa !17
  %29 = icmp eq i32 %28, 1
  br i1 %29, label %30, label %103

30:                                               ; preds = %25
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %31, i32 0, i32 11
  store volatile i32 0, ptr %32, align 8, !tbaa !18
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = icmp ne ptr %33, null
  br i1 %34, label %35, label %92

35:                                               ; preds = %30
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %36, i32 0, i32 10
  store volatile i32 34, ptr %37, align 4, !tbaa !17
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !11
  %41 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %40, i32 0, i32 4
  %42 = load volatile i32, ptr %41, align 4, !tbaa !19
  %43 = add i32 %42, 1
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %44, i32 0, i32 7
  store volatile i32 %43, ptr %45, align 4, !tbaa !20
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %46, i32 0, i32 0
  %48 = load ptr, ptr %47, align 8, !tbaa !11
  %49 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %48, i32 0, i32 4
  %50 = load volatile i32, ptr %49, align 4, !tbaa !19
  %51 = add i32 %50, 1
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %52, i32 0, i32 6
  store volatile i32 %51, ptr %53, align 8, !tbaa !21
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %55, i32 0, i32 5
  store ptr %54, ptr %56, align 8, !tbaa !22
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %57, i32 0, i32 0
  %59 = load ptr, ptr %58, align 8, !tbaa !11
  %60 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %59, i32 0, i32 3
  store volatile i32 3, ptr %60, align 4, !tbaa !23
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !11
  %64 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %63, i32 0, i32 5
  %65 = load volatile i32, ptr %64, align 4, !tbaa !24
  %66 = zext i32 %65 to i64
  %67 = and i64 %66, -201326593
  %68 = or i64 %67, 67108864
  %69 = trunc i64 %68 to i32
  %70 = load ptr, ptr %4, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !11
  %73 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %72, i32 0, i32 5
  store volatile i32 %69, ptr %73, align 4, !tbaa !24
  %74 = load i32, ptr %7, align 4, !tbaa !9
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %75, i32 0, i32 0
  %77 = load ptr, ptr %76, align 8, !tbaa !11
  %78 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %77, i32 0, i32 6
  store volatile i32 %74, ptr %78, align 4, !tbaa !14
  br label %79

79:                                               ; preds = %35
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %80, i32 0, i32 9
  store volatile i32 0, ptr %81, align 8, !tbaa !16
  br label %82

82:                                               ; preds = %79
  br label %83

83:                                               ; preds = %82
  %84 = load ptr, ptr %4, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %84, i32 0, i32 0
  %86 = load ptr, ptr %85, align 8, !tbaa !11
  %87 = getelementptr inbounds %struct.QUADSPI_TypeDef, ptr %86, i32 0, i32 0
  %88 = load volatile i32, ptr %87, align 4, !tbaa !25
  %89 = zext i32 %88 to i64
  %90 = or i64 %89, 458752
  %91 = trunc i64 %90 to i32
  store volatile i32 %91, ptr %87, align 4, !tbaa !25
  br label %102

92:                                               ; preds = %30
  %93 = load ptr, ptr %4, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %93, i32 0, i32 11
  %95 = load volatile i32, ptr %94, align 8, !tbaa !18
  %96 = or i32 %95, 8
  store volatile i32 %96, ptr %94, align 8, !tbaa !18
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %97

97:                                               ; preds = %92
  %98 = load ptr, ptr %4, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %98, i32 0, i32 9
  store volatile i32 0, ptr %99, align 8, !tbaa !16
  br label %100

100:                                              ; preds = %97
  br label %101

101:                                              ; preds = %100
  br label %102

102:                                              ; preds = %101, %83
  br label %109

103:                                              ; preds = %25
  store i32 2, ptr %6, align 4, !tbaa !9
  br label %104

104:                                              ; preds = %103
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.QSPI_HandleTypeDef, ptr %105, i32 0, i32 9
  store volatile i32 0, ptr %106, align 8, !tbaa !16
  br label %107

107:                                              ; preds = %104
  br label %108

108:                                              ; preds = %107
  br label %109

109:                                              ; preds = %108, %102
  %110 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %110, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %111

111:                                              ; preds = %109, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %112 = load i32, ptr %3, align 4
  ret i32 %112
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 40, !10, i64 48, !10, i64 52, !6, i64 56, !10, i64 64, !10, i64 68, !6, i64 72, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!15, !10, i64 24}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48}
!16 = !{!12, !10, i64 80}
!17 = !{!12, !10, i64 84}
!18 = !{!12, !10, i64 88}
!19 = !{!15, !10, i64 16}
!20 = !{!12, !10, i64 68}
!21 = !{!12, !10, i64 64}
!22 = !{!12, !6, i64 56}
!23 = !{!15, !10, i64 12}
!24 = !{!15, !10, i64 20}
!25 = !{!15, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_QSPI_Receive_IT(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 24
  %5 = load volatile i32, ptr %4, align 4, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %0, i64 80
  %7 = load volatile i32, ptr %6, align 8, !tbaa !14
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %35, label %9

9:                                                ; preds = %2
  store volatile i32 1, ptr %6, align 8, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 84
  %11 = load volatile i32, ptr %10, align 4, !tbaa !15
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %34

13:                                               ; preds = %9
  %14 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 0, ptr %14, align 8, !tbaa !16
  %.not = icmp eq ptr %1, null
  br i1 %.not, label %31, label %15

15:                                               ; preds = %13
  store volatile i32 34, ptr %10, align 4, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %3, i64 16
  %17 = load volatile i32, ptr %16, align 4, !tbaa !17
  %18 = add i32 %17, 1
  %19 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 %18, ptr %19, align 4, !tbaa !18
  %20 = load volatile i32, ptr %16, align 4, !tbaa !17
  %21 = add i32 %20, 1
  %22 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 %21, ptr %22, align 8, !tbaa !19
  %23 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %1, ptr %23, align 8, !tbaa !20
  %24 = getelementptr inbounds i8, ptr %3, i64 12
  store volatile i32 3, ptr %24, align 4, !tbaa !21
  %25 = getelementptr inbounds i8, ptr %3, i64 20
  %26 = load volatile i32, ptr %25, align 4, !tbaa !22
  %27 = and i32 %26, -201326593
  %28 = or disjoint i32 %27, 67108864
  store volatile i32 %28, ptr %25, align 4, !tbaa !22
  store volatile i32 %5, ptr %4, align 4, !tbaa !12
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  %29 = load volatile i32, ptr %3, align 4, !tbaa !23
  %30 = or i32 %29, 458752
  store volatile i32 %30, ptr %3, align 4, !tbaa !23
  br label %35

31:                                               ; preds = %13
  %32 = load volatile i32, ptr %14, align 8, !tbaa !16
  %33 = or i32 %32, 8
  store volatile i32 %33, ptr %14, align 8, !tbaa !16
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  br label %35

34:                                               ; preds = %9
  store volatile i32 0, ptr %6, align 8, !tbaa !14
  br label %35

35:                                               ; preds = %34, %31, %15, %2
  %.0 = phi i32 [ 2, %2 ], [ 0, %15 ], [ 1, %31 ], [ 2, %34 ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 40, !11, i64 48, !11, i64 52, !7, i64 56, !11, i64 64, !11, i64 68, !7, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 24}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48}
!14 = !{!6, !11, i64 80}
!15 = !{!6, !11, i64 84}
!16 = !{!6, !11, i64 88}
!17 = !{!13, !11, i64 16}
!18 = !{!6, !11, i64 68}
!19 = !{!6, !11, i64 64}
!20 = !{!6, !7, i64 56}
!21 = !{!13, !11, i64 12}
!22 = !{!13, !11, i64 20}
!23 = !{!13, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass