; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (SetTxFiFo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PCD_HandleTypeDef = type { ptr, %struct.USB_OTG_CfgTypeDef, i8, [16 x %struct.USB_OTG_EPTypeDef], [16 x %struct.USB_OTG_EPTypeDef], i32, i32, i32, [12 x i32], i32, i32, i32, i32, ptr }
%struct.USB_OTG_CfgTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USB_OTG_EPTypeDef = type { i8, i8, i8, i8, i8, i8, i16, i32, ptr, i32, i32, i32 }
%struct.USB_OTG_GlobalTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [39 x i32], i32, [15 x i32] }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_PCDEx_SetTxFiFo(ptr noundef %0, i8 noundef zeroext %1, i16 noundef zeroext %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i16, align 2
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store i16 %2, ptr %6, align 2, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.PCD_HandleTypeDef, ptr %9, i32 0, i32 0
  %11 = load ptr, ptr %10, align 8, !tbaa !12
  %12 = getelementptr inbounds %struct.USB_OTG_GlobalTypeDef, ptr %11, i32 0, i32 9
  %13 = load volatile i32, ptr %12, align 4, !tbaa !16
  store i32 %13, ptr %8, align 4, !tbaa !18
  %14 = load i8, ptr %5, align 1, !tbaa !9
  %15 = zext i8 %14 to i32
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %27

17:                                               ; preds = %3
  %18 = load i16, ptr %6, align 2, !tbaa !10
  %19 = zext i16 %18 to i32
  %20 = shl i32 %19, 16
  %21 = load i32, ptr %8, align 4, !tbaa !18
  %22 = or i32 %20, %21
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.PCD_HandleTypeDef, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !12
  %26 = getelementptr inbounds %struct.USB_OTG_GlobalTypeDef, ptr %25, i32 0, i32 10
  store volatile i32 %22, ptr %26, align 4, !tbaa !19
  br label %73

27:                                               ; preds = %3
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.PCD_HandleTypeDef, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !12
  %31 = getelementptr inbounds %struct.USB_OTG_GlobalTypeDef, ptr %30, i32 0, i32 10
  %32 = load volatile i32, ptr %31, align 4, !tbaa !19
  %33 = lshr i32 %32, 16
  %34 = load i32, ptr %8, align 4, !tbaa !18
  %35 = add i32 %34, %33
  store i32 %35, ptr %8, align 4, !tbaa !18
  store i8 0, ptr %7, align 1, !tbaa !9
  br label %36

36:                                               ; preds = %55, %27
  %37 = load i8, ptr %7, align 1, !tbaa !9
  %38 = zext i8 %37 to i32
  %39 = load i8, ptr %5, align 1, !tbaa !9
  %40 = zext i8 %39 to i32
  %41 = sub i32 %40, 1
  %42 = icmp ult i32 %38, %41
  br i1 %42, label %43, label %58

43:                                               ; preds = %36
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.PCD_HandleTypeDef, ptr %44, i32 0, i32 0
  %46 = load ptr, ptr %45, align 8, !tbaa !12
  %47 = getelementptr inbounds %struct.USB_OTG_GlobalTypeDef, ptr %46, i32 0, i32 26
  %48 = load i8, ptr %7, align 1, !tbaa !9
  %49 = zext i8 %48 to i64
  %50 = getelementptr inbounds [15 x i32], ptr %47, i64 0, i64 %49
  %51 = load volatile i32, ptr %50, align 4, !tbaa !18
  %52 = lshr i32 %51, 16
  %53 = load i32, ptr %8, align 4, !tbaa !18
  %54 = add i32 %53, %52
  store i32 %54, ptr %8, align 4, !tbaa !18
  br label %55

55:                                               ; preds = %43
  %56 = load i8, ptr %7, align 1, !tbaa !9
  %57 = add i8 %56, 1
  store i8 %57, ptr %7, align 1, !tbaa !9
  br label %36, !llvm.loop !20

58:                                               ; preds = %36
  %59 = load i16, ptr %6, align 2, !tbaa !10
  %60 = zext i16 %59 to i32
  %61 = shl i32 %60, 16
  %62 = load i32, ptr %8, align 4, !tbaa !18
  %63 = or i32 %61, %62
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.PCD_HandleTypeDef, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !12
  %67 = getelementptr inbounds %struct.USB_OTG_GlobalTypeDef, ptr %66, i32 0, i32 26
  %68 = load i8, ptr %5, align 1, !tbaa !9
  %69 = zext i8 %68 to i32
  %70 = sub i32 %69, 1
  %71 = zext i32 %70 to i64
  %72 = getelementptr inbounds [15 x i32], ptr %67, i64 0, i64 %71
  store volatile i32 %63, ptr %72, align 4, !tbaa !18
  br label %73

73:                                               ; preds = %58, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"", !6, i64 0, !14, i64 8, !7, i64 60, !7, i64 64, !7, i64 704, !15, i64 1344, !15, i64 1348, !15, i64 1352, !7, i64 1356, !15, i64 1404, !15, i64 1408, !15, i64 1412, !15, i64 1416, !6, i64 1424}
!14 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !15, i64 48}
!15 = !{!"int", !7, i64 0}
!16 = !{!17, !15, i64 36}
!17 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !7, i64 48, !15, i64 56, !15, i64 60, !15, i64 64, !15, i64 68, !15, i64 72, !15, i64 76, !15, i64 80, !15, i64 84, !15, i64 88, !15, i64 92, !15, i64 96, !7, i64 100, !15, i64 256, !7, i64 260}
!18 = !{!15, !15, i64 0}
!19 = !{!17, !15, i64 40}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local noundef i32 @HAL_PCDEx_SetTxFiFo(ptr nocapture noundef readonly %0, i8 noundef zeroext %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = load ptr, ptr %0, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 36
  %6 = load volatile i32, ptr %5, align 4, !tbaa !12
  %7 = icmp eq i8 %1, 0
  br i1 %7, label %8, label %13

8:                                                ; preds = %3
  %9 = zext i16 %2 to i32
  %10 = shl nuw i32 %9, 16
  %11 = or i32 %6, %10
  %12 = getelementptr inbounds i8, ptr %4, i64 40
  store volatile i32 %11, ptr %12, align 4, !tbaa !14
  br label %60

13:                                               ; preds = %3
  %14 = zext i8 %1 to i32
  %15 = getelementptr inbounds i8, ptr %4, i64 40
  %16 = load volatile i32, ptr %15, align 4, !tbaa !14
  %17 = lshr i32 %16, 16
  %18 = add i32 %17, %6
  %19 = add nsw i32 %14, -1
  %.not = icmp eq i32 %19, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %13
  %20 = getelementptr inbounds i8, ptr %4, i64 260
  %21 = trunc i32 %19 to i8
  %umax = tail call i8 @llvm.umax.i8(i8 %21, i8 1)
  %xtraiter = and i8 %umax, 3
  %22 = icmp ult i8 %21, 4
  br i1 %22, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i8 %umax, -4
  br label %23

23:                                               ; preds = %23, %.lr.ph.new
  %.020 = phi i32 [ %18, %.lr.ph.new ], [ %46, %23 ]
  %.01619 = phi i8 [ 0, %.lr.ph.new ], [ %47, %23 ]
  %niter = phi i8 [ 0, %.lr.ph.new ], [ %niter.next.3, %23 ]
  %24 = zext i8 %.01619 to i64
  %25 = getelementptr inbounds [15 x i32], ptr %20, i64 0, i64 %24
  %26 = load volatile i32, ptr %25, align 4, !tbaa !15
  %27 = lshr i32 %26, 16
  %28 = add i32 %27, %.020
  %29 = or disjoint i8 %.01619, 1
  %30 = zext i8 %29 to i64
  %31 = getelementptr inbounds [15 x i32], ptr %20, i64 0, i64 %30
  %32 = load volatile i32, ptr %31, align 4, !tbaa !15
  %33 = lshr i32 %32, 16
  %34 = add i32 %33, %28
  %35 = or disjoint i8 %.01619, 2
  %36 = zext i8 %35 to i64
  %37 = getelementptr inbounds [15 x i32], ptr %20, i64 0, i64 %36
  %38 = load volatile i32, ptr %37, align 4, !tbaa !15
  %39 = lshr i32 %38, 16
  %40 = add i32 %39, %34
  %41 = or disjoint i8 %.01619, 3
  %42 = zext i8 %41 to i64
  %43 = getelementptr inbounds [15 x i32], ptr %20, i64 0, i64 %42
  %44 = load volatile i32, ptr %43, align 4, !tbaa !15
  %45 = lshr i32 %44, 16
  %46 = add i32 %45, %40
  %47 = add nuw i8 %.01619, 4
  %niter.next.3 = add i8 %niter, 4
  %niter.ncmp.3.not = icmp eq i8 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3.not, label %._crit_edge.loopexit.unr-lcssa, label %23, !llvm.loop !16

._crit_edge.loopexit.unr-lcssa:                   ; preds = %23, %.lr.ph
  %.lcssa.ph = phi i32 [ poison, %.lr.ph ], [ %46, %23 ]
  %.020.unr = phi i32 [ %18, %.lr.ph ], [ %46, %23 ]
  %.01619.unr = phi i8 [ 0, %.lr.ph ], [ %47, %23 ]
  %lcmp.mod.not = icmp eq i8 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader
  %.020.epil = phi i32 [ %52, %.epil.preheader ], [ %.020.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.01619.epil = phi i8 [ %53, %.epil.preheader ], [ %.01619.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i8 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %48 = zext i8 %.01619.epil to i64
  %49 = getelementptr inbounds [15 x i32], ptr %20, i64 0, i64 %48
  %50 = load volatile i32, ptr %49, align 4, !tbaa !15
  %51 = lshr i32 %50, 16
  %52 = add i32 %51, %.020.epil
  %53 = add nuw i8 %.01619.epil, 1
  %epil.iter.next = add i8 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i8 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.epil.preheader, !llvm.loop !18

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader, %13
  %.0.lcssa = phi i32 [ %18, %13 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %52, %.epil.preheader ]
  %54 = zext i16 %2 to i32
  %55 = shl nuw i32 %54, 16
  %56 = or i32 %.0.lcssa, %55
  %57 = getelementptr inbounds i8, ptr %4, i64 260
  %58 = zext nneg i32 %19 to i64
  %59 = getelementptr inbounds [15 x i32], ptr %57, i64 0, i64 %58
  store volatile i32 %56, ptr %59, align 4, !tbaa !15
  br label %60

60:                                               ; preds = %._crit_edge, %8
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.umax.i8(i8, i8) #1

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 60, !8, i64 64, !8, i64 704, !11, i64 1344, !11, i64 1348, !11, i64 1352, !8, i64 1356, !11, i64 1404, !11, i64 1408, !11, i64 1412, !11, i64 1416, !7, i64 1424}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 36}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !8, i64 100, !11, i64 256, !8, i64 260}
!14 = !{!13, !11, i64 40}
!15 = !{!11, !11, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass