; LLVM IR from vertver/Fresponze-old :: modules/opus/silk/fixed (vector_ops_FIX)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @silk_inner_prod16_aligned_64_c(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !11
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %30, %3
  %10 = load i32, ptr %7, align 4, !tbaa !9
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %13, label %33

13:                                               ; preds = %9
  %14 = load i64, ptr %8, align 8, !tbaa !11
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds i16, ptr %15, i64 %17
  %19 = load i16, ptr %18, align 2, !tbaa !13
  %20 = sext i16 %19 to i32
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds i16, ptr %21, i64 %23
  %25 = load i16, ptr %24, align 2, !tbaa !13
  %26 = sext i16 %25 to i32
  %27 = mul nsw i32 %20, %26
  %28 = sext i32 %27 to i64
  %29 = add nsw i64 %14, %28
  store i64 %29, ptr %8, align 8, !tbaa !11
  br label %30

30:                                               ; preds = %13
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %7, align 4, !tbaa !9
  br label %9, !llvm.loop !15

33:                                               ; preds = %9
  %34 = load i64, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i64 %34
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local i64 @silk_inner_prod16_aligned_64_c(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %2, 0
  br i1 %4, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext nneg i32 %2 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %5 = icmp ult i32 %2, 4
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 2147483644
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %.010 = phi i64 [ 0, %.lr.ph.preheader.new ], [ %37, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %6 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv
  %7 = load i16, ptr %6, align 2, !tbaa !5
  %8 = sext i16 %7 to i64
  %9 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv
  %10 = load i16, ptr %9, align 2, !tbaa !5
  %11 = sext i16 %10 to i64
  %12 = mul nsw i64 %11, %8
  %13 = add nsw i64 %12, %.010
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %14 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.next
  %15 = load i16, ptr %14, align 2, !tbaa !5
  %16 = sext i16 %15 to i64
  %17 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.next
  %18 = load i16, ptr %17, align 2, !tbaa !5
  %19 = sext i16 %18 to i64
  %20 = mul nsw i64 %19, %16
  %21 = add nsw i64 %20, %13
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %22 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.next.1
  %23 = load i16, ptr %22, align 2, !tbaa !5
  %24 = sext i16 %23 to i64
  %25 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.next.1
  %26 = load i16, ptr %25, align 2, !tbaa !5
  %27 = sext i16 %26 to i64
  %28 = mul nsw i64 %27, %24
  %29 = add nsw i64 %28, %21
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %30 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.next.2
  %31 = load i16, ptr %30, align 2, !tbaa !5
  %32 = sext i16 %31 to i64
  %33 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.next.2
  %34 = load i16, ptr %33, align 2, !tbaa !5
  %35 = sext i16 %34 to i64
  %36 = mul nsw i64 %35, %32
  %37 = add nsw i64 %36, %29
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.lcssa.ph = phi i64 [ poison, %.lr.ph.preheader ], [ %37, %.lr.ph ]
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %.010.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %37, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.010.epil = phi i64 [ %45, %.lr.ph.epil ], [ %.010.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %38 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.epil
  %39 = load i16, ptr %38, align 2, !tbaa !5
  %40 = sext i16 %39 to i64
  %41 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.epil
  %42 = load i16, ptr %41, align 2, !tbaa !5
  %43 = sext i16 %42 to i64
  %44 = mul nsw i64 %43, %40
  %45 = add nsw i64 %44, %.010.epil
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !11

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %3
  %.0.lcssa = phi i64 [ 0, %3 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %45, %.lr.ph.epil ]
  ret i64 %.0.lcssa
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass