; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (DMA)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DCMI_HandleTypeDef = type { ptr, %struct.DCMI_InitTypeDef, i32, i32, i32, i32, i32, i32, ptr, i32 }
%struct.DCMI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, %struct.DCMI_CodesInitTypeDef, i32, i32, i32, i32, i32 }
%struct.DCMI_CodesInitTypeDef = type { i8, i8, i8, i8 }
%struct.DCMI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_DCMI_Start_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  br label %12

12:                                               ; preds = %4
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %13, i32 0, i32 2
  %15 = load i32, ptr %14, align 8, !tbaa !11
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %17, label %18

17:                                               ; preds = %12
  store i32 2, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %180

18:                                               ; preds = %12
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %19, i32 0, i32 2
  store i32 1, ptr %20, align 8, !tbaa !11
  br label %21

21:                                               ; preds = %18
  br label %22

22:                                               ; preds = %21
  br label %23

23:                                               ; preds = %22
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %24, i32 0, i32 3
  store volatile i32 2, ptr %25, align 4, !tbaa !15
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %26, i32 0, i32 0
  %28 = load ptr, ptr %27, align 8, !tbaa !16
  %29 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %28, i32 0, i32 0
  %30 = load volatile i32, ptr %29, align 4, !tbaa !17
  %31 = zext i32 %30 to i64
  %32 = or i64 %31, 16384
  %33 = trunc i64 %32 to i32
  store volatile i32 %33, ptr %29, align 4, !tbaa !17
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %34, i32 0, i32 0
  %36 = load ptr, ptr %35, align 8, !tbaa !16
  %37 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %36, i32 0, i32 0
  %38 = load volatile i32, ptr %37, align 4, !tbaa !17
  %39 = zext i32 %38 to i64
  %40 = and i64 %39, -3
  %41 = trunc i64 %40 to i32
  store volatile i32 %41, ptr %37, align 4, !tbaa !17
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !16
  %46 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %45, i32 0, i32 0
  %47 = load volatile i32, ptr %46, align 4, !tbaa !17
  %48 = or i32 %47, %42
  store volatile i32 %48, ptr %46, align 4, !tbaa !17
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %49, i32 0, i32 8
  %51 = load ptr, ptr %50, align 8, !tbaa !19
  %52 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %51, i32 0, i32 5
  store ptr @DCMI_DMAXferCplt, ptr %52, align 8, !tbaa !20
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %53, i32 0, i32 8
  %55 = load ptr, ptr %54, align 8, !tbaa !19
  %56 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %55, i32 0, i32 9
  store ptr @DCMI_DMAError, ptr %56, align 8, !tbaa !23
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %57, i32 0, i32 8
  %59 = load ptr, ptr %58, align 8, !tbaa !19
  %60 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %59, i32 0, i32 10
  store ptr null, ptr %60, align 8, !tbaa !24
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %61, i32 0, i32 4
  store volatile i32 0, ptr %62, align 8, !tbaa !25
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %63, i32 0, i32 6
  store i32 0, ptr %64, align 8, !tbaa !26
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = icmp ule i32 %65, 65535
  br i1 %66, label %67, label %91

67:                                               ; preds = %23
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %68, i32 0, i32 8
  %70 = load ptr, ptr %69, align 8, !tbaa !19
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !16
  %74 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %73, i32 0, i32 10
  %75 = ptrtoint ptr %74 to i32
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = load i32, ptr %9, align 4, !tbaa !9
  %78 = call i32 @HAL_DMA_Start_IT(ptr noundef %70, i32 noundef %75, i32 noundef %76, i32 noundef %77)
  %79 = icmp ne i32 %78, 0
  br i1 %79, label %80, label %90

80:                                               ; preds = %67
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %81, i32 0, i32 9
  store volatile i32 64, ptr %82, align 8, !tbaa !27
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %83, i32 0, i32 3
  store volatile i32 1, ptr %84, align 4, !tbaa !15
  br label %85

85:                                               ; preds = %80
  %86 = load ptr, ptr %6, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %86, i32 0, i32 2
  store i32 0, ptr %87, align 8, !tbaa !11
  br label %88

88:                                               ; preds = %85
  br label %89

89:                                               ; preds = %88
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %180

90:                                               ; preds = %67
  br label %166

91:                                               ; preds = %23
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %92, i32 0, i32 8
  %94 = load ptr, ptr %93, align 8, !tbaa !19
  %95 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %94, i32 0, i32 7
  store ptr @DCMI_DMAXferCplt, ptr %95, align 8, !tbaa !28
  %96 = load ptr, ptr %6, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %96, i32 0, i32 4
  store volatile i32 1, ptr %97, align 8, !tbaa !25
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = load ptr, ptr %6, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %99, i32 0, i32 5
  store volatile i32 %98, ptr %100, align 4, !tbaa !29
  %101 = load i32, ptr %8, align 4, !tbaa !9
  %102 = load ptr, ptr %6, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %102, i32 0, i32 7
  store i32 %101, ptr %103, align 4, !tbaa !30
  br label %104

104:                                              ; preds = %109, %91
  %105 = load ptr, ptr %6, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %105, i32 0, i32 5
  %107 = load volatile i32, ptr %106, align 4, !tbaa !29
  %108 = icmp ugt i32 %107, 65535
  br i1 %108, label %109, label %122

109:                                              ; preds = %104
  %110 = load ptr, ptr %6, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %110, i32 0, i32 5
  %112 = load volatile i32, ptr %111, align 4, !tbaa !29
  %113 = udiv i32 %112, 2
  %114 = load ptr, ptr %6, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %114, i32 0, i32 5
  store volatile i32 %113, ptr %115, align 4, !tbaa !29
  %116 = load ptr, ptr %6, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %116, i32 0, i32 4
  %118 = load volatile i32, ptr %117, align 8, !tbaa !25
  %119 = mul i32 %118, 2
  %120 = load ptr, ptr %6, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %120, i32 0, i32 4
  store volatile i32 %119, ptr %121, align 8, !tbaa !25
  br label %104, !llvm.loop !31

122:                                              ; preds = %104
  %123 = load ptr, ptr %6, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %123, i32 0, i32 4
  %125 = load volatile i32, ptr %124, align 8, !tbaa !25
  %126 = sub i32 %125, 2
  %127 = load ptr, ptr %6, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %127, i32 0, i32 4
  store volatile i32 %126, ptr %128, align 8, !tbaa !25
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %129, i32 0, i32 4
  %131 = load volatile i32, ptr %130, align 8, !tbaa !25
  %132 = load ptr, ptr %6, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %132, i32 0, i32 6
  store i32 %131, ptr %133, align 8, !tbaa !26
  %134 = load i32, ptr %8, align 4, !tbaa !9
  %135 = load ptr, ptr %6, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %135, i32 0, i32 5
  %137 = load volatile i32, ptr %136, align 4, !tbaa !29
  %138 = mul i32 4, %137
  %139 = add i32 %134, %138
  store i32 %139, ptr %10, align 4, !tbaa !9
  %140 = load ptr, ptr %6, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %140, i32 0, i32 8
  %142 = load ptr, ptr %141, align 8, !tbaa !19
  %143 = load ptr, ptr %6, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %143, i32 0, i32 0
  %145 = load ptr, ptr %144, align 8, !tbaa !16
  %146 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %145, i32 0, i32 10
  %147 = ptrtoint ptr %146 to i32
  %148 = load i32, ptr %8, align 4, !tbaa !9
  %149 = load i32, ptr %10, align 4, !tbaa !9
  %150 = load ptr, ptr %6, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %150, i32 0, i32 5
  %152 = load volatile i32, ptr %151, align 4, !tbaa !29
  %153 = call i32 @HAL_DMAEx_MultiBufferStart_IT(ptr noundef %142, i32 noundef %147, i32 noundef %148, i32 noundef %149, i32 noundef %152)
  %154 = icmp ne i32 %153, 0
  br i1 %154, label %155, label %165

155:                                              ; preds = %122
  %156 = load ptr, ptr %6, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %156, i32 0, i32 9
  store volatile i32 64, ptr %157, align 8, !tbaa !27
  %158 = load ptr, ptr %6, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %158, i32 0, i32 3
  store volatile i32 1, ptr %159, align 4, !tbaa !15
  br label %160

160:                                              ; preds = %155
  %161 = load ptr, ptr %6, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %161, i32 0, i32 2
  store i32 0, ptr %162, align 8, !tbaa !11
  br label %163

163:                                              ; preds = %160
  br label %164

164:                                              ; preds = %163
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %180

165:                                              ; preds = %122
  br label %166

166:                                              ; preds = %165, %90
  %167 = load ptr, ptr %6, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %167, i32 0, i32 0
  %169 = load ptr, ptr %168, align 8, !tbaa !16
  %170 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %169, i32 0, i32 0
  %171 = load volatile i32, ptr %170, align 4, !tbaa !17
  %172 = zext i32 %171 to i64
  %173 = or i64 %172, 1
  %174 = trunc i64 %173 to i32
  store volatile i32 %174, ptr %170, align 4, !tbaa !17
  br label %175

175:                                              ; preds = %166
  %176 = load ptr, ptr %6, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %176, i32 0, i32 2
  store i32 0, ptr %177, align 8, !tbaa !11
  br label %178

178:                                              ; preds = %175
  br label %179

179:                                              ; preds = %178
  store i32 0, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %180

180:                                              ; preds = %179, %164, %89, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %181 = load i32, ptr %5, align 4
  ret i32 %181
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden void @DCMI_DMAXferCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @DCMI_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare i32 @HAL_DMAEx_MultiBufferStart_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 56}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !6, i64 80, !10, i64 88}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !14, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!14 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!15 = !{!12, !10, i64 60}
!16 = !{!12, !6, i64 0}
!17 = !{!18, !10, i64 0}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40}
!19 = !{!12, !6, i64 80}
!20 = !{!21, !6, i64 72}
!21 = !{!"__DMA_HandleTypeDef", !6, i64 0, !22, i64 8, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !10, i64 176}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!23 = !{!21, !6, i64 104}
!24 = !{!21, !6, i64 112}
!25 = !{!12, !10, i64 64}
!26 = !{!12, !10, i64 72}
!27 = !{!12, !10, i64 88}
!28 = !{!21, !6, i64 88}
!29 = !{!12, !10, i64 68}
!30 = !{!12, !10, i64 76}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_DCMI_Start_DMA(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %0, i64 56
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %61, label %8

8:                                                ; preds = %4
  store i32 1, ptr %5, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 60
  store volatile i32 2, ptr %9, align 4, !tbaa !13
  %10 = load ptr, ptr %0, align 8, !tbaa !14
  %11 = load volatile i32, ptr %10, align 4, !tbaa !15
  %12 = or i32 %11, 16384
  store volatile i32 %12, ptr %10, align 4, !tbaa !15
  %13 = load volatile i32, ptr %10, align 4, !tbaa !15
  %14 = and i32 %13, -3
  store volatile i32 %14, ptr %10, align 4, !tbaa !15
  %15 = load volatile i32, ptr %10, align 4, !tbaa !15
  %16 = or i32 %15, %1
  store volatile i32 %16, ptr %10, align 4, !tbaa !15
  %17 = getelementptr inbounds i8, ptr %0, i64 80
  %18 = load ptr, ptr %17, align 8, !tbaa !17
  %19 = getelementptr inbounds i8, ptr %18, i64 72
  store ptr @DCMI_DMAXferCplt, ptr %19, align 8, !tbaa !18
  %20 = getelementptr inbounds i8, ptr %18, i64 104
  store ptr @DCMI_DMAError, ptr %20, align 8, !tbaa !21
  %21 = getelementptr inbounds i8, ptr %18, i64 112
  store ptr null, ptr %21, align 8, !tbaa !22
  %22 = getelementptr inbounds i8, ptr %0, i64 64
  store volatile i32 0, ptr %22, align 8, !tbaa !23
  %23 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 0, ptr %23, align 8, !tbaa !24
  %24 = icmp ult i32 %3, 65536
  br i1 %24, label %25, label %32

25:                                               ; preds = %8
  %26 = getelementptr inbounds i8, ptr %10, i64 40
  %27 = ptrtoint ptr %26 to i64
  %28 = trunc i64 %27 to i32
  %29 = tail call i32 @HAL_DMA_Start_IT(ptr noundef nonnull %18, i32 noundef %28, i32 noundef %2, i32 noundef %3) #2
  %.not48 = icmp eq i32 %29, 0
  br i1 %.not48, label %57, label %30

30:                                               ; preds = %25
  %31 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 64, ptr %31, align 8, !tbaa !25
  store volatile i32 1, ptr %9, align 4, !tbaa !13
  br label %.sink.split

32:                                               ; preds = %8
  %33 = getelementptr inbounds i8, ptr %18, i64 88
  store ptr @DCMI_DMAXferCplt, ptr %33, align 8, !tbaa !26
  store volatile i32 1, ptr %22, align 8, !tbaa !23
  %34 = getelementptr inbounds i8, ptr %0, i64 68
  store volatile i32 %3, ptr %34, align 4, !tbaa !27
  %35 = getelementptr inbounds i8, ptr %0, i64 76
  store i32 %2, ptr %35, align 4, !tbaa !28
  %36 = load volatile i32, ptr %34, align 4, !tbaa !27
  %37 = icmp ugt i32 %36, 65535
  br i1 %37, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %32, %.lr.ph
  %38 = load volatile i32, ptr %34, align 4, !tbaa !27
  %39 = lshr i32 %38, 1
  store volatile i32 %39, ptr %34, align 4, !tbaa !27
  %40 = load volatile i32, ptr %22, align 8, !tbaa !23
  %41 = shl i32 %40, 1
  store volatile i32 %41, ptr %22, align 8, !tbaa !23
  %42 = load volatile i32, ptr %34, align 4, !tbaa !27
  %43 = icmp ugt i32 %42, 65535
  br i1 %43, label %.lr.ph, label %._crit_edge, !llvm.loop !29

._crit_edge:                                      ; preds = %.lr.ph, %32
  %44 = load volatile i32, ptr %22, align 8, !tbaa !23
  %45 = add i32 %44, -2
  store volatile i32 %45, ptr %22, align 8, !tbaa !23
  %46 = load volatile i32, ptr %22, align 8, !tbaa !23
  store i32 %46, ptr %23, align 8, !tbaa !24
  %47 = load volatile i32, ptr %34, align 4, !tbaa !27
  %48 = shl i32 %47, 2
  %49 = add i32 %48, %2
  %50 = getelementptr inbounds i8, ptr %10, i64 40
  %51 = ptrtoint ptr %50 to i64
  %52 = trunc i64 %51 to i32
  %53 = load volatile i32, ptr %34, align 4, !tbaa !27
  %54 = tail call i32 @HAL_DMAEx_MultiBufferStart_IT(ptr noundef %18, i32 noundef %52, i32 noundef %2, i32 noundef %49, i32 noundef %53) #2
  %.not = icmp eq i32 %54, 0
  br i1 %.not, label %57, label %55

55:                                               ; preds = %._crit_edge
  %56 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 64, ptr %56, align 8, !tbaa !25
  store volatile i32 1, ptr %9, align 4, !tbaa !13
  br label %.sink.split

57:                                               ; preds = %._crit_edge, %25
  %58 = load ptr, ptr %0, align 8, !tbaa !14
  %59 = load volatile i32, ptr %58, align 4, !tbaa !15
  %60 = or i32 %59, 1
  store volatile i32 %60, ptr %58, align 4, !tbaa !15
  br label %.sink.split

.sink.split:                                      ; preds = %30, %55, %57
  %.0.ph = phi i32 [ 1, %55 ], [ 0, %57 ], [ 1, %30 ]
  store i32 0, ptr %5, align 8, !tbaa !5
  br label %61

61:                                               ; preds = %.sink.split, %4
  %.0 = phi i32 [ 2, %4 ], [ %.0.ph, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @DCMI_DMAXferCplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @DCMI_DMAError(ptr noundef) #0

declare i32 @HAL_DMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare i32 @HAL_DMAEx_MultiBufferStart_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 56}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !7, i64 80, !11, i64 88}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !12, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!13 = !{!6, !11, i64 60}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!17 = !{!6, !7, i64 80}
!18 = !{!19, !7, i64 72}
!19 = !{!"__DMA_HandleTypeDef", !7, i64 0, !20, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!21 = !{!19, !7, i64 104}
!22 = !{!19, !7, i64 112}
!23 = !{!6, !11, i64 64}
!24 = !{!6, !11, i64 72}
!25 = !{!6, !11, i64 88}
!26 = !{!19, !7, i64 88}
!27 = !{!6, !11, i64 68}
!28 = !{!6, !11, i64 76}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass