; LLVM IR from ravireddy07/cpp-book :: src/Code-Chef/OCT2020-Long/SEGCOMPR.ll (Z4calcRKSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ4calcRKSt6vectorIiSaIiEEiE4pref = external hidden global [2 x i32], align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4calcRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.memset.p0.i64(ptr align 4 @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, i8 0, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  store i64 0, ptr %6, align 8, !tbaa !11
  store i32 1, ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %45, %2
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #3
  %17 = trunc i64 %16 to i32
  %18 = icmp slt i32 %14, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %48

20:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %21 = load i32, ptr %5, align 4, !tbaa !9
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %24) #3
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = ashr i32 %26, %27
  %29 = and i32 %28, 1
  %30 = xor i32 %21, %29
  store i32 %30, ptr %8, align 4, !tbaa !9
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = xor i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [2 x i32], ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = load i64, ptr %6, align 8, !tbaa !11
  %38 = add nsw i64 %37, %36
  store i64 %38, ptr %6, align 8, !tbaa !11
  %39 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %39, ptr %5, align 4, !tbaa !9
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [2 x i32], ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %42, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %45

45:                                               ; preds = %20
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %7, align 4, !tbaa !9
  br label %13, !llvm.loop !13

48:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %49

49:                                               ; preds = %94, %48
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %51) #3
  %53 = trunc i64 %52 to i32
  %54 = icmp slt i32 %50, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %49
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %97

56:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %57 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %57, ptr %12, align 4, !tbaa !9
  br label %58

58:                                               ; preds = %90, %56
  %59 = load i32, ptr %12, align 4, !tbaa !9
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %60) #3
  %62 = trunc i64 %61 to i32
  %63 = icmp slt i32 %59, %62
  br i1 %63, label %64, label %70

64:                                               ; preds = %58
  %65 = load i32, ptr %12, align 4, !tbaa !9
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = sub nsw i32 %65, %66
  %68 = add nsw i32 %67, 1
  %69 = icmp sle i32 %68, 4
  br label %70

70:                                               ; preds = %64, %58
  %71 = phi i1 [ false, %58 ], [ %69, %64 ]
  br i1 %71, label %73, label %72

72:                                               ; preds = %70
  store i32 8, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %93

73:                                               ; preds = %70
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #3
  %78 = load i32, ptr %77, align 4, !tbaa !9
  %79 = load i32, ptr %4, align 4, !tbaa !9
  %80 = ashr i32 %78, %79
  %81 = and i32 %80, 1
  %82 = load i32, ptr %11, align 4, !tbaa !9
  %83 = xor i32 %82, %81
  store i32 %83, ptr %11, align 4, !tbaa !9
  %84 = load i32, ptr %11, align 4, !tbaa !9
  %85 = icmp ne i32 %84, 0
  br i1 %85, label %86, label %89

86:                                               ; preds = %73
  %87 = load i64, ptr %6, align 8, !tbaa !11
  %88 = sub nsw i64 %87, 1
  store i64 %88, ptr %6, align 8, !tbaa !11
  br label %89

89:                                               ; preds = %86, %73
  br label %90

90:                                               ; preds = %89
  %91 = load i32, ptr %12, align 4, !tbaa !9
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %12, align 4, !tbaa !9
  br label %58, !llvm.loop !15

93:                                               ; preds = %72
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %9, align 4, !tbaa !9
  br label %49, !llvm.loop !16

97:                                               ; preds = %55
  %98 = load i64, ptr %6, align 8, !tbaa !11
  %99 = srem i64 %98, 998244353
  %100 = load i32, ptr %4, align 4, !tbaa !9
  %101 = zext i32 %100 to i64
  %102 = shl i64 1, %101
  %103 = mul nsw i64 %99, %102
  %104 = srem i64 %103, 998244353
  %105 = trunc i64 %104 to i32
  store i32 1, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %105
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ4calcRKSt6vectorIiSaIiEEiE4pref = external hidden local_unnamed_addr global [2 x i32], align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 -998244352, 998244353) i32 @_Z4calcRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  store i64 1, ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, align 4
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = trunc i64 %3 to i32
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.lr.ph, label %.preheader33

.preheader33:                                     ; preds = %.lr.ph, %2
  %.031.lcssa = phi i64 [ 0, %2 ], [ %19, %.lr.ph ]
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %7 = trunc i64 %6 to i32
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.preheader, label %._crit_edge

.lr.ph:                                           ; preds = %2, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %2 ]
  %.02936 = phi i32 [ %13, %.lr.ph ], [ 0, %2 ]
  %.03134 = phi i64 [ %19, %.lr.ph ], [ 0, %2 ]
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = lshr i32 %10, %1
  %12 = and i32 %11, 1
  %13 = xor i32 %12, %.02936
  %14 = xor i32 %13, 1
  %15 = zext nneg i32 %14 to i64
  %16 = getelementptr inbounds [2 x i32], ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = add nsw i64 %.03134, %18
  %20 = zext nneg i32 %13 to i64
  %21 = getelementptr inbounds [2 x i32], ptr @_ZZ4calcRKSt6vectorIiSaIiEEiE4pref, i64 0, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %21, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %24 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %sext = shl i64 %24, 32
  %25 = ashr exact i64 %sext, 32
  %26 = icmp slt i64 %indvars.iv.next, %25
  br i1 %26, label %.lr.ph, label %.preheader33, !llvm.loop !9

.preheader:                                       ; preds = %.preheader33, %.critedge
  %indvars.iv46 = phi i64 [ %indvars.iv.next47, %.critedge ], [ 0, %.preheader33 ]
  %.142 = phi i64 [ %.2.lcssa, %.critedge ], [ %.031.lcssa, %.preheader33 ]
  %27 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %sext52 = shl i64 %27, 32
  %28 = ashr exact i64 %sext52, 32
  %29 = icmp slt i64 %indvars.iv46, %28
  br i1 %29, label %.lr.ph40, label %.critedge

._crit_edge:                                      ; preds = %.critedge, %.preheader33
  %.1.lcssa = phi i64 [ %.031.lcssa, %.preheader33 ], [ %.2.lcssa, %.critedge ]
  %30 = srem i64 %.1.lcssa, 998244353
  %31 = zext nneg i32 %1 to i64
  %32 = shl i64 %30, %31
  %33 = srem i64 %32, 998244353
  %34 = trunc nsw i64 %33 to i32
  ret i32 %34

.critedge:                                        ; preds = %.lr.ph40, %.preheader
  %.2.lcssa = phi i64 [ %.142, %.preheader ], [ %spec.select, %.lr.ph40 ]
  %indvars.iv.next47 = add nuw nsw i64 %indvars.iv46, 1
  %35 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %sext53 = shl i64 %35, 32
  %36 = ashr exact i64 %sext53, 32
  %37 = icmp slt i64 %indvars.iv.next47, %36
  br i1 %37, label %.preheader, label %._crit_edge, !llvm.loop !11

.lr.ph40:                                         ; preds = %.preheader, %.lr.ph40
  %indvars.iv48 = phi i64 [ %indvars.iv.next49, %.lr.ph40 ], [ %indvars.iv46, %.preheader ]
  %.02738 = phi i32 [ %42, %.lr.ph40 ], [ 0, %.preheader ]
  %.237 = phi i64 [ %spec.select, %.lr.ph40 ], [ %.142, %.preheader ]
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv48) #1
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = lshr i32 %39, %1
  %41 = and i32 %40, 1
  %42 = xor i32 %41, %.02738
  %.not = icmp ne i32 %.02738, %41
  %43 = sext i1 %.not to i64
  %spec.select = add nsw i64 %.237, %43
  %indvars.iv.next49 = add nuw nsw i64 %indvars.iv48, 1
  %44 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %45 = trunc i64 %44 to i32
  %46 = trunc nuw i64 %indvars.iv.next49 to i32
  %47 = icmp slt i32 %46, %45
  %48 = sub nuw nsw i64 %indvars.iv.next49, %indvars.iv46
  %49 = icmp ult i64 %48, 4
  %or.cond = select i1 %47, i1 %49, i1 false
  br i1 %or.cond, label %.lr.ph40, label %.critedge, !llvm.loop !12
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: DSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass