; LLVM IR from lzyrapx/Competitive-Programming :: HDUOJ/1165.ll (Z1Axx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z1Axx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %8, label %12

8:                                                ; preds = %2
  %9 = load i64, ptr %4, align 8, !tbaa !5
  %10 = sub nsw i64 %9, 1
  %11 = call noundef i64 @_Z1Axx(i64 noundef %10, i64 noundef 1)
  store i64 %11, ptr %3, align 8
  br label %48

12:                                               ; preds = %2
  %13 = load i64, ptr %4, align 8, !tbaa !5
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %15, label %18

15:                                               ; preds = %12
  %16 = load i64, ptr %5, align 8, !tbaa !5
  %17 = add nsw i64 %16, 1
  store i64 %17, ptr %3, align 8
  br label %48

18:                                               ; preds = %12
  %19 = load i64, ptr %4, align 8, !tbaa !5
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %21, label %24

21:                                               ; preds = %18
  %22 = load i64, ptr %5, align 8, !tbaa !5
  %23 = add nsw i64 %22, 2
  store i64 %23, ptr %3, align 8
  br label %48

24:                                               ; preds = %18
  %25 = load i64, ptr %4, align 8, !tbaa !5
  %26 = icmp eq i64 %25, 2
  br i1 %26, label %27, label %33

27:                                               ; preds = %24
  %28 = load i64, ptr %4, align 8, !tbaa !5
  %29 = load i64, ptr %5, align 8, !tbaa !5
  %30 = sub nsw i64 %29, 1
  %31 = call noundef i64 @_Z1Axx(i64 noundef %28, i64 noundef %30)
  %32 = add nsw i64 %31, 2
  store i64 %32, ptr %3, align 8
  br label %48

33:                                               ; preds = %24
  %34 = load i64, ptr %4, align 8, !tbaa !5
  %35 = icmp eq i64 %34, 3
  br i1 %35, label %36, label %43

36:                                               ; preds = %33
  %37 = load i64, ptr %4, align 8, !tbaa !5
  %38 = load i64, ptr %5, align 8, !tbaa !5
  %39 = sub nsw i64 %38, 1
  %40 = call noundef i64 @_Z1Axx(i64 noundef %37, i64 noundef %39)
  %41 = mul nsw i64 %40, 2
  %42 = add nsw i64 %41, 3
  store i64 %42, ptr %3, align 8
  br label %48

43:                                               ; preds = %33
  br label %44

44:                                               ; preds = %43
  br label %45

45:                                               ; preds = %44
  br label %46

46:                                               ; preds = %45
  br label %47

47:                                               ; preds = %46
  unreachable

48:                                               ; preds = %36, %27, %21, %15, %8
  %49 = load i64, ptr %3, align 8
  ret i64 %49
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree nosync nounwind memory(inaccessiblemem: write) uwtable
define dso_local noundef range(i64 -9223372036854775807, -9223372036854775808) i64 @_Z1Axx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
tailrecurse.outer.peel.begin:
  %2 = icmp eq i64 %1, 0
  %3 = sext i1 %2 to i64
  %spec.select.peel = add nsw i64 %3, %0
  %spec.select39.peel = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
  switch i64 %spec.select.peel, label %7 [
    i64 0, label %.loopexit
    i64 1, label %.loopexit57
    i64 2, label %tailrecurse.outer
  ]

tailrecurse.outer:                                ; preds = %tailrecurse.outer.peel.begin, %5
  %accumulator.tr.ph = phi i64 [ %6, %5 ], [ 2, %tailrecurse.outer.peel.begin ]
  %.tr15.ph.in = phi i64 [ %spec.select39, %5 ], [ %spec.select39.peel, %tailrecurse.outer.peel.begin ]
  %.tr15.ph = add nsw i64 %.tr15.ph.in, -1
  %4 = icmp eq i64 %.tr15.ph, 0
  %spec.select = select i1 %4, i64 1, i64 2
  %spec.select39 = tail call i64 @llvm.umax.i64(i64 %.tr15.ph, i64 1)
  br i1 %4, label %.loopexit57, label %5

5:                                                ; preds = %tailrecurse.outer
  %6 = add nuw nsw i64 %accumulator.tr.ph, 2
  br label %tailrecurse.outer, !llvm.loop !5

common.ret67:                                     ; preds = %7, %.loopexit57
  %common.ret67.op = phi i64 [ %accumulator.ret.tr16, %.loopexit57 ], [ %accumulator.ret.tr, %7 ]
  ret i64 %common.ret67.op

7:                                                ; preds = %tailrecurse.outer.peel.begin
  %8 = icmp eq i64 %spec.select.peel, 3
  tail call void @llvm.assume(i1 %8)
  %9 = add nsw i64 %spec.select39.peel, -1
  %10 = tail call noundef i64 @_Z1Axx(i64 noundef 3, i64 noundef %9)
  %11 = shl nsw i64 %10, 1
  %accumulator.ret.tr = add i64 3, %11
  br label %common.ret67

.loopexit:                                        ; preds = %tailrecurse.outer.peel.begin
  br label %.loopexit57

.loopexit57:                                      ; preds = %tailrecurse.outer.peel.begin, %tailrecurse.outer, %.loopexit
  %accumulator.tr.ph54 = phi i64 [ 0, %.loopexit ], [ 0, %tailrecurse.outer.peel.begin ], [ %accumulator.tr.ph, %tailrecurse.outer ]
  %spec.select3949 = phi i64 [ %spec.select39.peel, %.loopexit ], [ %spec.select39.peel, %tailrecurse.outer.peel.begin ], [ %spec.select39, %tailrecurse.outer ]
  %.sink = phi i64 [ 1, %.loopexit ], [ 2, %tailrecurse.outer ], [ 2, %tailrecurse.outer.peel.begin ]
  %12 = add nsw i64 %spec.select3949, %.sink
  %accumulator.ret.tr16 = add nsw i64 %12, %accumulator.tr.ph54
  br label %common.ret67
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #2

attributes #0 = { mustprogress nofree nosync nounwind memory(inaccessiblemem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: BDCEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass