; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (IT)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HRTIM_HandleTypeDef = type { ptr, %struct.HRTIM_InitTypeDef, [6 x %struct.HRTIM_TimerParamTypeDef], i32, i32, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.HRTIM_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.HRTIM_TimerParamTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.HRTIM_TypeDef = type { %struct.HRTIM_Master_TypeDef, [5 x %struct.HRTIM_Timerx_TypeDef], [32 x i32], %struct.HRTIM_Common_TypeDef }
%struct.HRTIM_Master_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x i32] }
%struct.HRTIM_Timerx_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i32] }
%struct.HRTIM_Common_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@TimerIdxToTimerId = external hidden global [6 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_HRTIM_WaveformCountStart_IT(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  br label %8

8:                                                ; preds = %2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %9, i32 0, i32 3
  %11 = load i32, ptr %10, align 4, !tbaa !11
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %14

13:                                               ; preds = %8
  store i32 2, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %101

14:                                               ; preds = %8
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %15, i32 0, i32 3
  store i32 1, ptr %16, align 4, !tbaa !11
  br label %17

17:                                               ; preds = %14
  br label %18

18:                                               ; preds = %17
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %20, i32 0, i32 4
  store volatile i32 2, ptr %21, align 8, !tbaa !14
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %22, i32 0, i32 1
  %24 = getelementptr inbounds %struct.HRTIM_InitTypeDef, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 8, !tbaa !15
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %26, i32 0, i32 0
  %28 = load ptr, ptr %27, align 8, !tbaa !16
  %29 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %28, i32 0, i32 3
  %30 = getelementptr inbounds %struct.HRTIM_Common_TypeDef, ptr %29, i32 0, i32 4
  %31 = load volatile i32, ptr %30, align 4, !tbaa !17
  %32 = or i32 %31, %25
  store volatile i32 %32, ptr %30, align 4, !tbaa !17
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = and i64 %34, 65536
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %50

37:                                               ; preds = %19
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %38, i32 0, i32 2
  %40 = getelementptr inbounds [6 x %struct.HRTIM_TimerParamTypeDef], ptr %39, i64 0, i64 5
  %41 = getelementptr inbounds %struct.HRTIM_TimerParamTypeDef, ptr %40, i32 0, i32 2
  %42 = load i32, ptr %41, align 4, !tbaa !21
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %44, align 8, !tbaa !16
  %46 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %45, i32 0, i32 0
  %47 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %46, i32 0, i32 3
  %48 = load volatile i32, ptr %47, align 4, !tbaa !23
  %49 = or i32 %48, %42
  store volatile i32 %49, ptr %47, align 4, !tbaa !23
  br label %50

50:                                               ; preds = %37, %19
  store i8 0, ptr %6, align 1, !tbaa !24
  br label %51

51:                                               ; preds = %82, %50
  %52 = load i8, ptr %6, align 1, !tbaa !24
  %53 = zext i8 %52 to i32
  %54 = icmp ult i32 %53, 5
  br i1 %54, label %55, label %85

55:                                               ; preds = %51
  %56 = load i32, ptr %5, align 4, !tbaa !9
  %57 = load i8, ptr %6, align 1, !tbaa !24
  %58 = zext i8 %57 to i64
  %59 = getelementptr inbounds [6 x i32], ptr @TimerIdxToTimerId, i64 0, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = and i32 %56, %60
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %81

63:                                               ; preds = %55
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %64, i32 0, i32 2
  %66 = load i8, ptr %6, align 1, !tbaa !24
  %67 = zext i8 %66 to i64
  %68 = getelementptr inbounds [6 x %struct.HRTIM_TimerParamTypeDef], ptr %65, i64 0, i64 %67
  %69 = getelementptr inbounds %struct.HRTIM_TimerParamTypeDef, ptr %68, i32 0, i32 2
  %70 = load i32, ptr %69, align 4, !tbaa !21
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !16
  %74 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %73, i32 0, i32 1
  %75 = load i8, ptr %6, align 1, !tbaa !24
  %76 = zext i8 %75 to i64
  %77 = getelementptr inbounds [5 x %struct.HRTIM_Timerx_TypeDef], ptr %74, i64 0, i64 %76
  %78 = getelementptr inbounds %struct.HRTIM_Timerx_TypeDef, ptr %77, i32 0, i32 3
  %79 = load volatile i32, ptr %78, align 4, !tbaa !25
  %80 = or i32 %79, %70
  store volatile i32 %80, ptr %78, align 4, !tbaa !25
  br label %81

81:                                               ; preds = %63, %55
  br label %82

82:                                               ; preds = %81
  %83 = load i8, ptr %6, align 1, !tbaa !24
  %84 = add i8 %83, 1
  store i8 %84, ptr %6, align 1, !tbaa !24
  br label %51, !llvm.loop !27

85:                                               ; preds = %51
  %86 = load i32, ptr %5, align 4, !tbaa !9
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %87, i32 0, i32 0
  %89 = load ptr, ptr %88, align 8, !tbaa !16
  %90 = getelementptr inbounds %struct.HRTIM_TypeDef, ptr %89, i32 0, i32 0
  %91 = getelementptr inbounds %struct.HRTIM_Master_TypeDef, ptr %90, i32 0, i32 0
  %92 = load volatile i32, ptr %91, align 4, !tbaa !29
  %93 = or i32 %92, %86
  store volatile i32 %93, ptr %91, align 4, !tbaa !29
  %94 = load ptr, ptr %4, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %94, i32 0, i32 4
  store volatile i32 1, ptr %95, align 8, !tbaa !14
  br label %96

96:                                               ; preds = %85
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.HRTIM_HandleTypeDef, ptr %97, i32 0, i32 3
  store i32 0, ptr %98, align 4, !tbaa !11
  br label %99

99:                                               ; preds = %96
  br label %100

100:                                              ; preds = %99
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %101

101:                                              ; preds = %100, %13
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  %102 = load i32, ptr %3, align 4
  ret i32 %102
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 196}
!12 = !{!"", !6, i64 0, !13, i64 8, !7, i64 28, !10, i64 196, !10, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!12, !10, i64 200}
!15 = !{!12, !10, i64 8}
!16 = !{!12, !6, i64 0}
!17 = !{!18, !10, i64 912}
!18 = !{!"", !19, i64 0, !7, i64 128, !7, i64 768, !20, i64 896}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48}
!20 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!21 = !{!22, !10, i64 8}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!23 = !{!18, !10, i64 12}
!24 = !{!7, !7, i64 0}
!25 = !{!26, !10, i64 12}
!26 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !7, i64 108}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = !{!18, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@TimerIdxToTimerId = external hidden local_unnamed_addr global [6 x i32], align 16

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 3) i32 @HAL_HRTIM_WaveformCountStart_IT(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 196
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %69, label %6

6:                                                ; preds = %2
  store i32 1, ptr %3, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 200
  store volatile i32 2, ptr %7, align 8, !tbaa !12
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = load i32, ptr %8, align 8, !tbaa !13
  %10 = load ptr, ptr %0, align 8, !tbaa !14
  %11 = getelementptr inbounds i8, ptr %10, i64 912
  %12 = load volatile i32, ptr %11, align 4, !tbaa !15
  %13 = or i32 %12, %9
  store volatile i32 %13, ptr %11, align 4, !tbaa !15
  %14 = and i32 %1, 65536
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %21, label %15

15:                                               ; preds = %6
  %16 = getelementptr inbounds i8, ptr %0, i64 176
  %17 = load i32, ptr %16, align 4, !tbaa !19
  %18 = getelementptr inbounds i8, ptr %10, i64 12
  %19 = load volatile i32, ptr %18, align 4, !tbaa !21
  %20 = or i32 %19, %17
  store volatile i32 %20, ptr %18, align 4, !tbaa !21
  br label %21

21:                                               ; preds = %15, %6
  %22 = load i32, ptr @TimerIdxToTimerId, align 16, !tbaa !22
  %23 = and i32 %22, %1
  %.not21 = icmp eq i32 %23, 0
  br i1 %.not21, label %30, label %24

24:                                               ; preds = %21
  %25 = getelementptr inbounds i8, ptr %0, i64 36
  %26 = load i32, ptr %25, align 4, !tbaa !19
  %27 = getelementptr inbounds i8, ptr %10, i64 140
  %28 = load volatile i32, ptr %27, align 4, !tbaa !23
  %29 = or i32 %28, %26
  store volatile i32 %29, ptr %27, align 4, !tbaa !23
  br label %30

30:                                               ; preds = %21, %24
  %31 = load i32, ptr getelementptr inbounds (i8, ptr @TimerIdxToTimerId, i64 4), align 4, !tbaa !22
  %32 = and i32 %31, %1
  %.not21.1 = icmp eq i32 %32, 0
  br i1 %.not21.1, label %39, label %33

33:                                               ; preds = %30
  %34 = getelementptr inbounds i8, ptr %0, i64 64
  %35 = load i32, ptr %34, align 4, !tbaa !19
  %36 = getelementptr inbounds i8, ptr %10, i64 268
  %37 = load volatile i32, ptr %36, align 4, !tbaa !23
  %38 = or i32 %37, %35
  store volatile i32 %38, ptr %36, align 4, !tbaa !23
  br label %39

39:                                               ; preds = %33, %30
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @TimerIdxToTimerId, i64 8), align 8, !tbaa !22
  %41 = and i32 %40, %1
  %.not21.2 = icmp eq i32 %41, 0
  br i1 %.not21.2, label %48, label %42

42:                                               ; preds = %39
  %43 = getelementptr inbounds i8, ptr %0, i64 92
  %44 = load i32, ptr %43, align 4, !tbaa !19
  %45 = getelementptr inbounds i8, ptr %10, i64 396
  %46 = load volatile i32, ptr %45, align 4, !tbaa !23
  %47 = or i32 %46, %44
  store volatile i32 %47, ptr %45, align 4, !tbaa !23
  br label %48

48:                                               ; preds = %42, %39
  %49 = load i32, ptr getelementptr inbounds (i8, ptr @TimerIdxToTimerId, i64 12), align 4, !tbaa !22
  %50 = and i32 %49, %1
  %.not21.3 = icmp eq i32 %50, 0
  br i1 %.not21.3, label %57, label %51

51:                                               ; preds = %48
  %52 = getelementptr inbounds i8, ptr %0, i64 120
  %53 = load i32, ptr %52, align 4, !tbaa !19
  %54 = getelementptr inbounds i8, ptr %10, i64 524
  %55 = load volatile i32, ptr %54, align 4, !tbaa !23
  %56 = or i32 %55, %53
  store volatile i32 %56, ptr %54, align 4, !tbaa !23
  br label %57

57:                                               ; preds = %51, %48
  %58 = load i32, ptr getelementptr inbounds (i8, ptr @TimerIdxToTimerId, i64 16), align 16, !tbaa !22
  %59 = and i32 %58, %1
  %.not21.4 = icmp eq i32 %59, 0
  br i1 %.not21.4, label %66, label %60

60:                                               ; preds = %57
  %61 = getelementptr inbounds i8, ptr %0, i64 148
  %62 = load i32, ptr %61, align 4, !tbaa !19
  %63 = getelementptr inbounds i8, ptr %10, i64 652
  %64 = load volatile i32, ptr %63, align 4, !tbaa !23
  %65 = or i32 %64, %62
  store volatile i32 %65, ptr %63, align 4, !tbaa !23
  br label %66

66:                                               ; preds = %60, %57
  %67 = load volatile i32, ptr %10, align 4, !tbaa !25
  %68 = or i32 %67, %1
  store volatile i32 %68, ptr %10, align 4, !tbaa !25
  store volatile i32 1, ptr %7, align 8, !tbaa !12
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %69

69:                                               ; preds = %2, %66
  %.020 = phi i32 [ 0, %66 ], [ 2, %2 ]
  ret i32 %.020
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 196}
!6 = !{!"", !7, i64 0, !10, i64 8, !8, i64 28, !11, i64 196, !11, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 200}
!13 = !{!6, !11, i64 8}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !11, i64 912}
!16 = !{!"", !17, i64 0, !8, i64 128, !8, i64 768, !18, i64 896}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!19 = !{!20, !11, i64 8}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!21 = !{!16, !11, i64 12}
!22 = !{!11, !11, i64 0}
!23 = !{!24, !11, i64 12}
!24 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !8, i64 108}
!25 = !{!16, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass