; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Abort)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__UART_HandleTypeDef = type { ptr, %struct.UART_InitTypeDef, %struct.UART_AdvFeatureInitTypeDef, ptr, i16, i16, ptr, i16, i16, i16, i32, i16, i16, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
%struct.UART_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.UART_AdvFeatureInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.USART_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__DMA_HandleTypeDef = type { ptr, %struct.DMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, i32, ptr, ptr, i32 }
%struct.DMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

declare i32 @HAL_DMA_Abort(ptr noundef) #0

declare i32 @HAL_DMA_GetError(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_UART_Abort(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %4, i32 0, i32 0
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  %7 = getelementptr inbounds %struct.USART_TypeDef, ptr %6, i32 0, i32 0
  %8 = load volatile i32, ptr %7, align 4, !tbaa !15
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, -481
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr %7, align 4, !tbaa !15
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !9
  %15 = getelementptr inbounds %struct.USART_TypeDef, ptr %14, i32 0, i32 2
  %16 = load volatile i32, ptr %15, align 4, !tbaa !17
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, -276824066
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr %15, align 4, !tbaa !17
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %20, i32 0, i32 0
  %22 = load ptr, ptr %21, align 8, !tbaa !9
  %23 = getelementptr inbounds %struct.USART_TypeDef, ptr %22, i32 0, i32 2
  %24 = load volatile i32, ptr %23, align 4, !tbaa !17
  %25 = zext i32 %24 to i64
  %26 = and i64 %25, 128
  %27 = icmp eq i64 %26, 128
  br i1 %27, label %28, label %63

28:                                               ; preds = %1
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !9
  %32 = getelementptr inbounds %struct.USART_TypeDef, ptr %31, i32 0, i32 2
  %33 = load volatile i32, ptr %32, align 4, !tbaa !17
  %34 = zext i32 %33 to i64
  %35 = and i64 %34, -129
  %36 = trunc i64 %35 to i32
  store volatile i32 %36, ptr %32, align 4, !tbaa !17
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %37, i32 0, i32 15
  %39 = load ptr, ptr %38, align 8, !tbaa !18
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %62

41:                                               ; preds = %28
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %42, i32 0, i32 15
  %44 = load ptr, ptr %43, align 8, !tbaa !18
  %45 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %44, i32 0, i32 10
  store ptr null, ptr %45, align 8, !tbaa !19
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %46, i32 0, i32 15
  %48 = load ptr, ptr %47, align 8, !tbaa !18
  %49 = call i32 @HAL_DMA_Abort(ptr noundef %48)
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %51, label %61

51:                                               ; preds = %41
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %52, i32 0, i32 15
  %54 = load ptr, ptr %53, align 8, !tbaa !18
  %55 = call i32 @HAL_DMA_GetError(ptr noundef %54)
  %56 = icmp eq i32 %55, 32
  br i1 %56, label %57, label %60

57:                                               ; preds = %51
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %58, i32 0, i32 20
  store volatile i32 16, ptr %59, align 4, !tbaa !21
  store i32 3, ptr %2, align 4
  br label %141

60:                                               ; preds = %51
  br label %61

61:                                               ; preds = %60, %41
  br label %62

62:                                               ; preds = %61, %28
  br label %63

63:                                               ; preds = %62, %1
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !9
  %67 = getelementptr inbounds %struct.USART_TypeDef, ptr %66, i32 0, i32 2
  %68 = load volatile i32, ptr %67, align 4, !tbaa !17
  %69 = zext i32 %68 to i64
  %70 = and i64 %69, 64
  %71 = icmp eq i64 %70, 64
  br i1 %71, label %72, label %107

72:                                               ; preds = %63
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %73, i32 0, i32 0
  %75 = load ptr, ptr %74, align 8, !tbaa !9
  %76 = getelementptr inbounds %struct.USART_TypeDef, ptr %75, i32 0, i32 2
  %77 = load volatile i32, ptr %76, align 4, !tbaa !17
  %78 = zext i32 %77 to i64
  %79 = and i64 %78, -65
  %80 = trunc i64 %79 to i32
  store volatile i32 %80, ptr %76, align 4, !tbaa !17
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %81, i32 0, i32 16
  %83 = load ptr, ptr %82, align 8, !tbaa !22
  %84 = icmp ne ptr %83, null
  br i1 %84, label %85, label %106

85:                                               ; preds = %72
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %86, i32 0, i32 16
  %88 = load ptr, ptr %87, align 8, !tbaa !22
  %89 = getelementptr inbounds %struct.__DMA_HandleTypeDef, ptr %88, i32 0, i32 10
  store ptr null, ptr %89, align 8, !tbaa !19
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %90, i32 0, i32 16
  %92 = load ptr, ptr %91, align 8, !tbaa !22
  %93 = call i32 @HAL_DMA_Abort(ptr noundef %92)
  %94 = icmp ne i32 %93, 0
  br i1 %94, label %95, label %105

95:                                               ; preds = %85
  %96 = load ptr, ptr %3, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %96, i32 0, i32 16
  %98 = load ptr, ptr %97, align 8, !tbaa !22
  %99 = call i32 @HAL_DMA_GetError(ptr noundef %98)
  %100 = icmp eq i32 %99, 32
  br i1 %100, label %101, label %104

101:                                              ; preds = %95
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %102, i32 0, i32 20
  store volatile i32 16, ptr %103, align 4, !tbaa !21
  store i32 3, ptr %2, align 4
  br label %141

104:                                              ; preds = %95
  br label %105

105:                                              ; preds = %104, %85
  br label %106

106:                                              ; preds = %105, %72
  br label %107

107:                                              ; preds = %106, %63
  %108 = load ptr, ptr %3, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %108, i32 0, i32 5
  store volatile i16 0, ptr %109, align 2, !tbaa !23
  %110 = load ptr, ptr %3, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %110, i32 0, i32 8
  store volatile i16 0, ptr %111, align 2, !tbaa !24
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %112, i32 0, i32 0
  %114 = load ptr, ptr %113, align 8, !tbaa !9
  %115 = getelementptr inbounds %struct.USART_TypeDef, ptr %114, i32 0, i32 8
  store volatile i32 15, ptr %115, align 4, !tbaa !25
  %116 = load ptr, ptr %3, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %116, i32 0, i32 10
  %118 = load i32, ptr %117, align 8, !tbaa !26
  %119 = zext i32 %118 to i64
  %120 = icmp eq i64 %119, 536870912
  br i1 %120, label %121, label %128

121:                                              ; preds = %107
  %122 = load ptr, ptr %3, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %122, i32 0, i32 0
  %124 = load ptr, ptr %123, align 8, !tbaa !9
  %125 = getelementptr inbounds %struct.USART_TypeDef, ptr %124, i32 0, i32 6
  %126 = load volatile i32, ptr %125, align 4, !tbaa !27
  %127 = or i32 %126, 16
  store volatile i32 %127, ptr %125, align 4, !tbaa !27
  br label %128

128:                                              ; preds = %121, %107
  %129 = load ptr, ptr %3, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %129, i32 0, i32 0
  %131 = load ptr, ptr %130, align 8, !tbaa !9
  %132 = getelementptr inbounds %struct.USART_TypeDef, ptr %131, i32 0, i32 6
  %133 = load volatile i32, ptr %132, align 4, !tbaa !27
  %134 = or i32 %133, 8
  store volatile i32 %134, ptr %132, align 4, !tbaa !27
  %135 = load ptr, ptr %3, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %135, i32 0, i32 18
  store volatile i32 32, ptr %136, align 4, !tbaa !28
  %137 = load ptr, ptr %3, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %137, i32 0, i32 19
  store volatile i32 32, ptr %138, align 8, !tbaa !29
  %139 = load ptr, ptr %3, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.__UART_HandleTypeDef, ptr %139, i32 0, i32 20
  store volatile i32 0, ptr %140, align 4, !tbaa !21
  store i32 0, ptr %2, align 4
  br label %141

141:                                              ; preds = %128, %101, %57
  %142 = load i32, ptr %2, align 4
  ret i32 %142
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"__UART_HandleTypeDef", !6, i64 0, !11, i64 8, !13, i64 44, !6, i64 88, !14, i64 96, !14, i64 98, !6, i64 104, !14, i64 112, !14, i64 114, !14, i64 116, !12, i64 120, !14, i64 124, !14, i64 126, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!17 = !{!16, !12, i64 8}
!18 = !{!10, !6, i64 144}
!19 = !{!20, !6, i64 112}
!20 = !{!"__DMA_HandleTypeDef", !6, i64 0, !16, i64 8, !12, i64 56, !12, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !12, i64 120, !12, i64 124, !12, i64 128, !6, i64 136, !6, i64 144, !12, i64 152, !6, i64 160, !6, i64 168, !12, i64 176}
!21 = !{!10, !12, i64 172}
!22 = !{!10, !6, i64 152}
!23 = !{!10, !14, i64 98}
!24 = !{!10, !14, i64 114}
!25 = !{!16, !12, i64 32}
!26 = !{!10, !12, i64 120}
!27 = !{!16, !12, i64 24}
!28 = !{!10, !12, i64 164}
!29 = !{!10, !12, i64 168}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_DMA_Abort(ptr noundef) local_unnamed_addr #0

declare i32 @HAL_DMA_GetError(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 4) i32 @HAL_UART_Abort(ptr noundef %0) local_unnamed_addr #1 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = load volatile i32, ptr %2, align 4, !tbaa !14
  %4 = and i32 %3, -481
  store volatile i32 %4, ptr %2, align 4, !tbaa !14
  %5 = getelementptr inbounds i8, ptr %2, i64 8
  %6 = load volatile i32, ptr %5, align 4, !tbaa !16
  %7 = and i32 %6, -276824066
  store volatile i32 %7, ptr %5, align 4, !tbaa !16
  %8 = load volatile i32, ptr %5, align 4, !tbaa !16
  %9 = and i32 %8, 128
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %22, label %10

10:                                               ; preds = %1
  %11 = load volatile i32, ptr %5, align 4, !tbaa !16
  %12 = and i32 %11, -129
  store volatile i32 %12, ptr %5, align 4, !tbaa !16
  %13 = getelementptr inbounds i8, ptr %0, i64 144
  %14 = load ptr, ptr %13, align 8, !tbaa !17
  %.not27 = icmp eq ptr %14, null
  br i1 %.not27, label %22, label %15

15:                                               ; preds = %10
  %16 = getelementptr inbounds i8, ptr %14, i64 112
  store ptr null, ptr %16, align 8, !tbaa !18
  %17 = tail call i32 @HAL_DMA_Abort(ptr noundef nonnull %14) #2
  %.not28 = icmp eq i32 %17, 0
  br i1 %.not28, label %22, label %18

18:                                               ; preds = %15
  %19 = load ptr, ptr %13, align 8, !tbaa !17
  %20 = tail call i32 @HAL_DMA_GetError(ptr noundef %19) #2
  %21 = icmp eq i32 %20, 32
  br i1 %21, label %57, label %22

22:                                               ; preds = %10, %18, %15, %1
  %23 = load ptr, ptr %0, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %23, i64 8
  %25 = load volatile i32, ptr %24, align 4, !tbaa !16
  %26 = and i32 %25, 64
  %.not29 = icmp eq i32 %26, 0
  br i1 %.not29, label %39, label %27

27:                                               ; preds = %22
  %28 = load volatile i32, ptr %24, align 4, !tbaa !16
  %29 = and i32 %28, -65
  store volatile i32 %29, ptr %24, align 4, !tbaa !16
  %30 = getelementptr inbounds i8, ptr %0, i64 152
  %31 = load ptr, ptr %30, align 8, !tbaa !20
  %.not30 = icmp eq ptr %31, null
  br i1 %.not30, label %39, label %32

32:                                               ; preds = %27
  %33 = getelementptr inbounds i8, ptr %31, i64 112
  store ptr null, ptr %33, align 8, !tbaa !18
  %34 = tail call i32 @HAL_DMA_Abort(ptr noundef nonnull %31) #2
  %.not31 = icmp eq i32 %34, 0
  br i1 %.not31, label %39, label %35

35:                                               ; preds = %32
  %36 = load ptr, ptr %30, align 8, !tbaa !20
  %37 = tail call i32 @HAL_DMA_GetError(ptr noundef %36) #2
  %38 = icmp eq i32 %37, 32
  br i1 %38, label %57, label %39

39:                                               ; preds = %27, %35, %32, %22
  %40 = getelementptr inbounds i8, ptr %0, i64 98
  store volatile i16 0, ptr %40, align 2, !tbaa !21
  %41 = getelementptr inbounds i8, ptr %0, i64 114
  store volatile i16 0, ptr %41, align 2, !tbaa !22
  %42 = load ptr, ptr %0, align 8, !tbaa !5
  %43 = getelementptr inbounds i8, ptr %42, i64 32
  store volatile i32 15, ptr %43, align 4, !tbaa !23
  %44 = getelementptr inbounds i8, ptr %0, i64 120
  %45 = load i32, ptr %44, align 8, !tbaa !24
  %46 = icmp eq i32 %45, 536870912
  br i1 %46, label %47, label %51

47:                                               ; preds = %39
  %48 = getelementptr inbounds i8, ptr %42, i64 24
  %49 = load volatile i32, ptr %48, align 4, !tbaa !25
  %50 = or i32 %49, 16
  store volatile i32 %50, ptr %48, align 4, !tbaa !25
  br label %51

51:                                               ; preds = %47, %39
  %52 = getelementptr inbounds i8, ptr %42, i64 24
  %53 = load volatile i32, ptr %52, align 4, !tbaa !25
  %54 = or i32 %53, 8
  store volatile i32 %54, ptr %52, align 4, !tbaa !25
  %55 = getelementptr inbounds i8, ptr %0, i64 164
  store volatile i32 32, ptr %55, align 4, !tbaa !26
  %56 = getelementptr inbounds i8, ptr %0, i64 168
  store volatile i32 32, ptr %56, align 8, !tbaa !27
  br label %57

57:                                               ; preds = %35, %18, %51
  %.sink = phi i32 [ 0, %51 ], [ 16, %18 ], [ 16, %35 ]
  %.0 = phi i32 [ 0, %51 ], [ 3, %18 ], [ 3, %35 ]
  %58 = getelementptr inbounds i8, ptr %0, i64 172
  store volatile i32 %.sink, ptr %58, align 4, !tbaa !28
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__UART_HandleTypeDef", !7, i64 0, !10, i64 8, !12, i64 44, !7, i64 88, !13, i64 96, !13, i64 98, !7, i64 104, !13, i64 112, !13, i64 114, !13, i64 116, !11, i64 120, !13, i64 124, !13, i64 126, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!"short", !8, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!16 = !{!15, !11, i64 8}
!17 = !{!6, !7, i64 144}
!18 = !{!19, !7, i64 112}
!19 = !{!"__DMA_HandleTypeDef", !7, i64 0, !15, i64 8, !11, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !11, i64 120, !11, i64 124, !11, i64 128, !7, i64 136, !7, i64 144, !11, i64 152, !7, i64 160, !7, i64 168, !11, i64 176}
!20 = !{!6, !7, i64 152}
!21 = !{!6, !13, i64 98}
!22 = !{!6, !13, i64 114}
!23 = !{!15, !11, i64 32}
!24 = !{!6, !11, i64 120}
!25 = !{!15, !11, i64 24}
!26 = !{!6, !11, i64 164}
!27 = !{!6, !11, i64 168}
!28 = !{!6, !11, i64 172}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass