; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (InitTick)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_OscInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.RCC_PLLInitTypeDef }
%struct.RCC_PLLInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PeriphCLKInitTypeDef = type { i32, %struct.RCC_PLL2InitTypeDef, %struct.RCC_PLL3InitTypeDef, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL2InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL3InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }
%struct.RTC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@hRTC_Handle = external hidden global %struct.RTC_HandleTypeDef, align 8
@SystemCoreClock = external global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_InitTick(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %struct.RCC_OscInitTypeDef, align 4
  %6 = alloca %struct.RCC_PeriphCLKInitTypeDef, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 76, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 188, ptr %6) #3
  %8 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %5, i32 0, i32 0
  store i32 1, ptr %8, align 4, !tbaa !9
  %9 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %5, i32 0, i32 9
  %10 = getelementptr inbounds %struct.RCC_PLLInitTypeDef, ptr %9, i32 0, i32 0
  store i32 0, ptr %10, align 4, !tbaa !12
  %11 = getelementptr inbounds %struct.RCC_OscInitTypeDef, ptr %5, i32 0, i32 1
  store i32 65536, ptr %11, align 4, !tbaa !13
  %12 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %6, i32 0, i32 30
  store i32 66304, ptr %12, align 4, !tbaa !14
  %13 = call i32 @HAL_RCC_OscConfig(ptr noundef %5)
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %132

15:                                               ; preds = %1
  %16 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %6, i32 0, i32 0
  store i32 4194304, ptr %16, align 4, !tbaa !17
  %17 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef %6)
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %131

19:                                               ; preds = %15
  %20 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 28), align 4, !tbaa !18
  %21 = zext i32 %20 to i64
  %22 = or i64 %21, 32768
  %23 = trunc i64 %22 to i32
  store volatile i32 %23, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 28), align 4, !tbaa !18
  store ptr inttoptr (i64 1476411392 to ptr), ptr @hRTC_Handle, align 8, !tbaa !20
  store i32 0, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), align 8, !tbaa !24
  store i32 99, ptr getelementptr inbounds (%struct.RTC_InitTypeDef, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), i32 0, i32 1), align 4, !tbaa !25
  store i32 9, ptr getelementptr inbounds (%struct.RTC_InitTypeDef, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), i32 0, i32 2), align 8, !tbaa !26
  store i32 0, ptr getelementptr inbounds (%struct.RTC_InitTypeDef, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), i32 0, i32 3), align 4, !tbaa !27
  store i32 0, ptr getelementptr inbounds (%struct.RTC_InitTypeDef, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), i32 0, i32 5), align 4, !tbaa !28
  store i32 0, ptr getelementptr inbounds (%struct.RTC_InitTypeDef, ptr getelementptr inbounds (%struct.RTC_HandleTypeDef, ptr @hRTC_Handle, i32 0, i32 1), i32 0, i32 6), align 8, !tbaa !29
  %24 = call i32 @HAL_RTC_Init(ptr noundef @hRTC_Handle)
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %19
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %133

27:                                               ; preds = %19
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %30 = getelementptr inbounds %struct.RTC_TypeDef, ptr %29, i32 0, i32 9
  store volatile i32 202, ptr %30, align 4, !tbaa !30
  %31 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %32 = getelementptr inbounds %struct.RTC_TypeDef, ptr %31, i32 0, i32 9
  store volatile i32 83, ptr %32, align 4, !tbaa !30
  br label %33

33:                                               ; preds = %28
  br label %34

34:                                               ; preds = %33
  %35 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %36 = getelementptr inbounds %struct.RTC_TypeDef, ptr %35, i32 0, i32 2
  %37 = load volatile i32, ptr %36, align 4, !tbaa !32
  %38 = zext i32 %37 to i64
  %39 = and i64 %38, -257
  %40 = trunc i64 %39 to i32
  store volatile i32 %40, ptr %36, align 4, !tbaa !32
  %41 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %42 = getelementptr inbounds %struct.RTC_TypeDef, ptr %41, i32 0, i32 3
  %43 = load volatile i32, ptr %42, align 4, !tbaa !33
  %44 = zext i32 %43 to i64
  %45 = and i64 %44, 128
  %46 = or i64 -385, %45
  %47 = trunc i64 %46 to i32
  %48 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %49 = getelementptr inbounds %struct.RTC_TypeDef, ptr %48, i32 0, i32 3
  store volatile i32 %47, ptr %49, align 4, !tbaa !33
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %67, %34
  %51 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %52 = getelementptr inbounds %struct.RTC_TypeDef, ptr %51, i32 0, i32 3
  %53 = load volatile i32, ptr %52, align 4, !tbaa !33
  %54 = zext i32 %53 to i64
  %55 = and i64 %54, 1
  %56 = icmp ne i64 %55, 0
  %57 = zext i1 %56 to i64
  %58 = select i1 %56, i32 1, i32 0
  %59 = icmp eq i32 %58, 0
  br i1 %59, label %60, label %68

60:                                               ; preds = %50
  %61 = load volatile i32, ptr %4, align 4, !tbaa !5
  %62 = add i32 %61, 1
  store volatile i32 %62, ptr %4, align 4, !tbaa !5
  %63 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %64 = udiv i32 %63, 48
  %65 = icmp eq i32 %61, %64
  br i1 %65, label %66, label %67

66:                                               ; preds = %60
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %133

67:                                               ; preds = %60
  br label %50, !llvm.loop !34

68:                                               ; preds = %50
  %69 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %70 = getelementptr inbounds %struct.RTC_TypeDef, ptr %69, i32 0, i32 7
  store volatile i32 1, ptr %70, align 4, !tbaa !36
  %71 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %72 = getelementptr inbounds %struct.RTC_TypeDef, ptr %71, i32 0, i32 2
  %73 = load volatile i32, ptr %72, align 4, !tbaa !32
  %74 = zext i32 %73 to i64
  %75 = or i64 %74, 256
  %76 = trunc i64 %75 to i32
  store volatile i32 %76, ptr %72, align 4, !tbaa !32
  %77 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %78 = getelementptr inbounds %struct.RTC_TypeDef, ptr %77, i32 0, i32 2
  %79 = load volatile i32, ptr %78, align 4, !tbaa !32
  %80 = zext i32 %79 to i64
  %81 = or i64 %80, 4096
  %82 = trunc i64 %81 to i32
  store volatile i32 %82, ptr %78, align 4, !tbaa !32
  %83 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !37
  %84 = zext i32 %83 to i64
  %85 = or i64 %84, 131072
  %86 = trunc i64 %85 to i32
  store volatile i32 %86, ptr inttoptr (i64 1476395136 to ptr), align 4, !tbaa !37
  %87 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !39
  %88 = zext i32 %87 to i64
  %89 = or i64 %88, 131072
  %90 = trunc i64 %89 to i32
  store volatile i32 %90, ptr inttoptr (i64 1476395008 to ptr), align 4, !tbaa !39
  %91 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %92 = getelementptr inbounds %struct.RTC_TypeDef, ptr %91, i32 0, i32 3
  %93 = load volatile i32, ptr %92, align 4, !tbaa !33
  %94 = zext i32 %93 to i64
  %95 = and i64 %94, 64
  %96 = icmp eq i64 %95, 0
  br i1 %96, label %97, label %116

97:                                               ; preds = %68
  %98 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %99 = getelementptr inbounds %struct.RTC_TypeDef, ptr %98, i32 0, i32 3
  store volatile i32 -1, ptr %99, align 4, !tbaa !33
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  br label %100

100:                                              ; preds = %114, %97
  %101 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %102 = getelementptr inbounds %struct.RTC_TypeDef, ptr %101, i32 0, i32 3
  %103 = load volatile i32, ptr %102, align 4, !tbaa !33
  %104 = zext i32 %103 to i64
  %105 = and i64 %104, 64
  %106 = icmp eq i64 %105, 0
  br i1 %106, label %107, label %115

107:                                              ; preds = %100
  %108 = load volatile i32, ptr %4, align 4, !tbaa !5
  %109 = add i32 %108, 1
  store volatile i32 %109, ptr %4, align 4, !tbaa !5
  %110 = load i32, ptr @SystemCoreClock, align 4, !tbaa !5
  %111 = udiv i32 %110, 48
  %112 = icmp eq i32 %108, %111
  br i1 %112, label %113, label %114

113:                                              ; preds = %107
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %133

114:                                              ; preds = %107
  br label %100, !llvm.loop !41

115:                                              ; preds = %100
  br label %116

116:                                              ; preds = %115, %68
  %117 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %118 = getelementptr inbounds %struct.RTC_TypeDef, ptr %117, i32 0, i32 1
  store volatile i32 0, ptr %118, align 4, !tbaa !42
  %119 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %120 = getelementptr inbounds %struct.RTC_TypeDef, ptr %119, i32 0, i32 0
  store volatile i32 0, ptr %120, align 4, !tbaa !43
  %121 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %122 = getelementptr inbounds %struct.RTC_TypeDef, ptr %121, i32 0, i32 3
  %123 = load volatile i32, ptr %122, align 4, !tbaa !33
  %124 = and i32 %123, -129
  store volatile i32 %124, ptr %122, align 4, !tbaa !33
  br label %125

125:                                              ; preds = %116
  %126 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %127 = getelementptr inbounds %struct.RTC_TypeDef, ptr %126, i32 0, i32 9
  store volatile i32 255, ptr %127, align 4, !tbaa !30
  br label %128

128:                                              ; preds = %125
  br label %129

129:                                              ; preds = %128
  %130 = load i32, ptr %3, align 4, !tbaa !5
  call void @HAL_NVIC_SetPriority(i32 noundef 41, i32 noundef %130, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 41)
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %133

131:                                              ; preds = %15
  br label %132

132:                                              ; preds = %131, %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %133

133:                                              ; preds = %132, %129, %113, %66, %26
  call void @llvm.lifetime.end.p0(i64 188, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 76, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %134 = load i32, ptr %2, align 4
  ret i32 %134
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @HAL_RCC_OscConfig(ptr noundef) #2

declare i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef) #2

declare i32 @HAL_RTC_Init(ptr noundef) #2

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !11, i64 36}
!11 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36}
!12 = !{!10, !6, i64 36}
!13 = !{!10, !6, i64 4}
!14 = !{!15, !6, i64 176}
!15 = !{!"", !6, i64 0, !16, i64 4, !16, i64 36, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !6, i64 172, !6, i64 176, !6, i64 180, !6, i64 184}
!16 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!17 = !{!15, !6, i64 0}
!18 = !{!19, !6, i64 112}
!19 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !7, i64 172, !6, i64 208, !6, i64 212, !6, i64 216, !6, i64 220, !6, i64 224, !6, i64 228, !6, i64 232, !6, i64 236, !6, i64 240, !6, i64 244, !6, i64 248, !6, i64 252, !6, i64 256, !6, i64 260, !6, i64 264, !6, i64 268, !6, i64 272, !6, i64 276, !6, i64 280, !6, i64 284, !7, i64 288}
!20 = !{!21, !22, i64 0}
!21 = !{!"", !22, i64 0, !23, i64 8, !6, i64 36, !6, i64 40}
!22 = !{!"any pointer", !7, i64 0}
!23 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24}
!24 = !{!21, !6, i64 8}
!25 = !{!21, !6, i64 12}
!26 = !{!21, !6, i64 16}
!27 = !{!21, !6, i64 20}
!28 = !{!21, !6, i64 28}
!29 = !{!21, !6, i64 32}
!30 = !{!31, !6, i64 36}
!31 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !6, i64 172, !6, i64 176, !6, i64 180, !6, i64 184, !6, i64 188, !6, i64 192, !6, i64 196, !6, i64 200, !6, i64 204}
!32 = !{!31, !6, i64 8}
!33 = !{!31, !6, i64 12}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!31, !6, i64 28}
!37 = !{!38, !6, i64 0}
!38 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40}
!39 = !{!40, !6, i64 0}
!40 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !7, i64 24, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !7, i64 56, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !7, i64 88, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168}
!41 = distinct !{!41, !35}
!42 = !{!31, !6, i64 4}
!43 = !{!31, !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RTC_HandleTypeDef = type { ptr, %struct.RTC_InitTypeDef, i32, i32 }
%struct.RTC_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_OscInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.RCC_PLLInitTypeDef }
%struct.RCC_PLLInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PeriphCLKInitTypeDef = type { i32, %struct.RCC_PLL2InitTypeDef, %struct.RCC_PLL3InitTypeDef, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL2InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL3InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

@hRTC_Handle = external hidden global %struct.RTC_HandleTypeDef, align 8
@SystemCoreClock = external local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_InitTick(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = alloca %struct.RCC_OscInitTypeDef, align 4
  %4 = alloca %struct.RCC_PeriphCLKInitTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 76, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 188, ptr nonnull %4) #3
  store i32 1, ptr %3, align 4, !tbaa !9
  %5 = getelementptr inbounds i8, ptr %3, i64 36
  store i32 0, ptr %5, align 4, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %3, i64 4
  store i32 65536, ptr %6, align 4, !tbaa !13
  %7 = getelementptr inbounds i8, ptr %4, i64 176
  store i32 66304, ptr %7, align 4, !tbaa !14
  %8 = call i32 @HAL_RCC_OscConfig(ptr noundef nonnull %3) #3
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %.loopexit4

10:                                               ; preds = %1
  store i32 4194304, ptr %4, align 4, !tbaa !17
  %11 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef nonnull %4) #3
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %.loopexit4

13:                                               ; preds = %10
  %14 = load volatile i32, ptr inttoptr (i64 1476543600 to ptr), align 16, !tbaa !18
  %15 = or i32 %14, 32768
  store volatile i32 %15, ptr inttoptr (i64 1476543600 to ptr), align 16, !tbaa !18
  store ptr inttoptr (i64 1476411392 to ptr), ptr @hRTC_Handle, align 8, !tbaa !20
  store <4 x i32> <i32 0, i32 99, i32 9, i32 0>, ptr getelementptr inbounds (i8, ptr @hRTC_Handle, i64 8), align 8, !tbaa !5
  store i32 0, ptr getelementptr inbounds (i8, ptr @hRTC_Handle, i64 28), align 4, !tbaa !24
  store i32 0, ptr getelementptr inbounds (i8, ptr @hRTC_Handle, i64 32), align 8, !tbaa !25
  %16 = call i32 @HAL_RTC_Init(ptr noundef nonnull @hRTC_Handle) #3
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %17, label %.loopexit4

17:                                               ; preds = %13
  %18 = load ptr, ptr @hRTC_Handle, align 8, !tbaa !20
  %19 = getelementptr inbounds i8, ptr %18, i64 36
  store volatile i32 202, ptr %19, align 4, !tbaa !26
  store volatile i32 83, ptr %19, align 4, !tbaa !26
  %20 = getelementptr inbounds i8, ptr %18, i64 8
  %21 = load volatile i32, ptr %20, align 4, !tbaa !28
  %22 = and i32 %21, -257
  store volatile i32 %22, ptr %20, align 4, !tbaa !28
  %23 = getelementptr inbounds i8, ptr %18, i64 12
  %24 = load volatile i32, ptr %23, align 4, !tbaa !29
  %25 = and i32 %24, 128
  %26 = or disjoint i32 %25, -385
  store volatile i32 %26, ptr %23, align 4, !tbaa !29
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  %27 = load i32, ptr @SystemCoreClock, align 4
  %28 = udiv i32 %27, 48
  br label %29

29:                                               ; preds = %33, %17
  %30 = load volatile i32, ptr %23, align 4, !tbaa !29
  %31 = and i32 %30, 1
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %29
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !5
  %34 = add i32 %.0..0..0..0., 1
  store volatile i32 %34, ptr %2, align 4, !tbaa !5
  %35 = icmp eq i32 %.0..0..0..0., %28
  br i1 %35, label %.loopexit4, label %29, !llvm.loop !30

36:                                               ; preds = %29
  %37 = getelementptr inbounds i8, ptr %18, i64 28
  store volatile i32 1, ptr %37, align 4, !tbaa !32
  %38 = load volatile i32, ptr %20, align 4, !tbaa !28
  %39 = or i32 %38, 256
  store volatile i32 %39, ptr %20, align 4, !tbaa !28
  %40 = load volatile i32, ptr %20, align 4, !tbaa !28
  %41 = or i32 %40, 4096
  store volatile i32 %41, ptr %20, align 4, !tbaa !28
  %42 = load volatile i32, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !33
  %43 = or i32 %42, 131072
  store volatile i32 %43, ptr inttoptr (i64 1476395136 to ptr), align 128, !tbaa !33
  %44 = load volatile i32, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !35
  %45 = or i32 %44, 131072
  store volatile i32 %45, ptr inttoptr (i64 1476395008 to ptr), align 134217728, !tbaa !35
  %46 = load volatile i32, ptr %23, align 4, !tbaa !29
  %47 = and i32 %46, 64
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %.loopexit

49:                                               ; preds = %36
  store volatile i32 -1, ptr %23, align 4, !tbaa !29
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  %50 = load i32, ptr @SystemCoreClock, align 4
  %51 = udiv i32 %50, 48
  br label %52

52:                                               ; preds = %56, %49
  %53 = load volatile i32, ptr %23, align 4, !tbaa !29
  %54 = and i32 %53, 64
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %.loopexit

56:                                               ; preds = %52
  %.0..0..0..0.1 = load volatile i32, ptr %2, align 4, !tbaa !5
  %57 = add i32 %.0..0..0..0.1, 1
  store volatile i32 %57, ptr %2, align 4, !tbaa !5
  %58 = icmp eq i32 %.0..0..0..0.1, %51
  br i1 %58, label %.loopexit4, label %52, !llvm.loop !37

.loopexit:                                        ; preds = %52, %36
  %59 = getelementptr inbounds i8, ptr %18, i64 4
  store volatile i32 0, ptr %59, align 4, !tbaa !38
  store volatile i32 0, ptr %18, align 4, !tbaa !39
  %60 = load volatile i32, ptr %23, align 4, !tbaa !29
  %61 = and i32 %60, -129
  store volatile i32 %61, ptr %23, align 4, !tbaa !29
  store volatile i32 255, ptr %19, align 4, !tbaa !26
  call void @HAL_NVIC_SetPriority(i32 noundef 41, i32 noundef %0, i32 noundef 0) #3
  call void @HAL_NVIC_EnableIRQ(i32 noundef 41) #3
  br label %.loopexit4

.loopexit4:                                       ; preds = %33, %56, %1, %10, %13, %.loopexit
  %.0 = phi i32 [ 0, %.loopexit ], [ 1, %13 ], [ 1, %10 ], [ 1, %1 ], [ 1, %56 ], [ 1, %33 ]
  call void @llvm.lifetime.end.p0(i64 188, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 76, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @HAL_RCC_OscConfig(ptr noundef) local_unnamed_addr #2

declare i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef) local_unnamed_addr #2

declare i32 @HAL_RTC_Init(ptr noundef) local_unnamed_addr #2

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !11, i64 36}
!11 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36}
!12 = !{!10, !6, i64 36}
!13 = !{!10, !6, i64 4}
!14 = !{!15, !6, i64 176}
!15 = !{!"", !6, i64 0, !16, i64 4, !16, i64 36, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !6, i64 172, !6, i64 176, !6, i64 180, !6, i64 184}
!16 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!17 = !{!15, !6, i64 0}
!18 = !{!19, !6, i64 112}
!19 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !7, i64 172, !6, i64 208, !6, i64 212, !6, i64 216, !6, i64 220, !6, i64 224, !6, i64 228, !6, i64 232, !6, i64 236, !6, i64 240, !6, i64 244, !6, i64 248, !6, i64 252, !6, i64 256, !6, i64 260, !6, i64 264, !6, i64 268, !6, i64 272, !6, i64 276, !6, i64 280, !6, i64 284, !7, i64 288}
!20 = !{!21, !22, i64 0}
!21 = !{!"", !22, i64 0, !23, i64 8, !6, i64 36, !6, i64 40}
!22 = !{!"any pointer", !7, i64 0}
!23 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24}
!24 = !{!21, !6, i64 28}
!25 = !{!21, !6, i64 32}
!26 = !{!27, !6, i64 36}
!27 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !6, i64 172, !6, i64 176, !6, i64 180, !6, i64 184, !6, i64 188, !6, i64 192, !6, i64 196, !6, i64 200, !6, i64 204}
!28 = !{!27, !6, i64 8}
!29 = !{!27, !6, i64 12}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!27, !6, i64 28}
!33 = !{!34, !6, i64 0}
!34 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40}
!35 = !{!36, !6, i64 0}
!36 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !7, i64 24, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !7, i64 56, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !7, i64 88, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168}
!37 = distinct !{!37, !31}
!38 = !{!27, !6, i64 4}
!39 = !{!27, !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass