; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (Calculate)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRC_HandleTypeDef = type { ptr, %struct.CRC_InitTypeDef, i32, i32, i32 }
%struct.CRC_InitTypeDef = type { i8, i8, i32, i32, i32, i32, i32 }
%struct.CRC_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @CRC_Handle_8(ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @CRC_Handle_16(ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CRC_Calculate(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %9, i32 0, i32 3
  store volatile i32 2, ptr %10, align 4, !tbaa !11
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %11, i32 0, i32 0
  %13 = load ptr, ptr %12, align 8, !tbaa !14
  %14 = getelementptr inbounds %struct.CRC_TypeDef, ptr %13, i32 0, i32 2
  %15 = load volatile i32, ptr %14, align 4, !tbaa !15
  %16 = zext i32 %15 to i64
  %17 = or i64 %16, 1
  %18 = trunc i64 %17 to i32
  store volatile i32 %18, ptr %14, align 4, !tbaa !15
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %19, i32 0, i32 4
  %21 = load i32, ptr %20, align 8, !tbaa !17
  switch i32 %21, label %56 [
    i32 3, label %22
    i32 1, label %46
    i32 2, label %51
  ]

22:                                               ; preds = %3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %37, %22
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = icmp ult i32 %24, %25
  br i1 %26, label %27, label %40

27:                                               ; preds = %23
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = zext i32 %29 to i64
  %31 = getelementptr inbounds i32, ptr %28, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !14
  %36 = getelementptr inbounds %struct.CRC_TypeDef, ptr %35, i32 0, i32 0
  store volatile i32 %32, ptr %36, align 4, !tbaa !18
  br label %37

37:                                               ; preds = %27
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = add i32 %38, 1
  store i32 %39, ptr %7, align 4, !tbaa !9
  br label %23, !llvm.loop !19

40:                                               ; preds = %23
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %41, i32 0, i32 0
  %43 = load ptr, ptr %42, align 8, !tbaa !14
  %44 = getelementptr inbounds %struct.CRC_TypeDef, ptr %43, i32 0, i32 0
  %45 = load volatile i32, ptr %44, align 4, !tbaa !18
  store i32 %45, ptr %8, align 4, !tbaa !9
  br label %57

46:                                               ; preds = %3
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = load i32, ptr %6, align 4, !tbaa !9
  %50 = call i32 @CRC_Handle_8(ptr noundef %47, ptr noundef %48, i32 noundef %49)
  store i32 %50, ptr %8, align 4, !tbaa !9
  br label %57

51:                                               ; preds = %3
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = call i32 @CRC_Handle_16(ptr noundef %52, ptr noundef %53, i32 noundef %54)
  store i32 %55, ptr %8, align 4, !tbaa !9
  br label %57

56:                                               ; preds = %3
  br label %57

57:                                               ; preds = %56, %51, %46, %40
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.CRC_HandleTypeDef, ptr %58, i32 0, i32 3
  store volatile i32 1, ptr %59, align 4, !tbaa !11
  %60 = load i32, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %60
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !6, i64 0, !13, i64 8, !10, i64 32, !10, i64 36, !10, i64 40}
!13 = !{!"", !7, i64 0, !7, i64 1, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!14 = !{!12, !6, i64 0}
!15 = !{!16, !10, i64 8}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!17 = !{!12, !10, i64 40}
!18 = !{!16, !10, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden i32 @CRC_Handle_8(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @CRC_Handle_16(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_CRC_Calculate(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 36
  store volatile i32 2, ptr %4, align 4, !tbaa !5
  %5 = load ptr, ptr %0, align 8, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %5, i64 8
  %7 = load volatile i32, ptr %6, align 4, !tbaa !13
  %8 = or i32 %7, 1
  store volatile i32 %8, ptr %6, align 4, !tbaa !13
  %9 = getelementptr inbounds i8, ptr %0, i64 40
  %10 = load i32, ptr %9, align 8, !tbaa !15
  switch i32 %10, label %35 [
    i32 3, label %.preheader
    i32 1, label %31
    i32 2, label %33
  ]

.preheader:                                       ; preds = %3
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader
  %wide.trip.count = zext i32 %2 to i64
  %xtraiter = and i64 %wide.trip.count, 7
  %11 = icmp ult i32 %2, 8
  br i1 %11, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 4294967288
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.7, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.7, %.lr.ph ]
  %12 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %13 = load i32, ptr %12, align 4, !tbaa !16
  store volatile i32 %13, ptr %5, align 4, !tbaa !17
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %14 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next
  %15 = load i32, ptr %14, align 4, !tbaa !16
  store volatile i32 %15, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %16 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.1
  %17 = load i32, ptr %16, align 4, !tbaa !16
  store volatile i32 %17, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %18 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.2
  %19 = load i32, ptr %18, align 4, !tbaa !16
  store volatile i32 %19, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.3 = or disjoint i64 %indvars.iv, 4
  %20 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.3
  %21 = load i32, ptr %20, align 4, !tbaa !16
  store volatile i32 %21, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.4 = or disjoint i64 %indvars.iv, 5
  %22 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.4
  %23 = load i32, ptr %22, align 4, !tbaa !16
  store volatile i32 %23, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.5 = or disjoint i64 %indvars.iv, 6
  %24 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.5
  %25 = load i32, ptr %24, align 4, !tbaa !16
  store volatile i32 %25, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.6 = or disjoint i64 %indvars.iv, 7
  %26 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.6
  %27 = load i32, ptr %26, align 4, !tbaa !16
  store volatile i32 %27, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.7 = add nuw nsw i64 %indvars.iv, 8
  %niter.next.7 = add i64 %niter, 8
  %niter.ncmp.7 = icmp eq i64 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !18

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.7, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %28 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.epil
  %29 = load i32, ptr %28, align 4, !tbaa !16
  store volatile i32 %29, ptr %5, align 4, !tbaa !17
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !20

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %.preheader
  %30 = load volatile i32, ptr %5, align 4, !tbaa !17
  br label %35

31:                                               ; preds = %3
  %32 = tail call i32 @CRC_Handle_8(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %2)
  br label %35

33:                                               ; preds = %3
  %34 = tail call i32 @CRC_Handle_16(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %2)
  br label %35

35:                                               ; preds = %3, %33, %31, %._crit_edge
  %.0 = phi i32 [ 0, %3 ], [ %34, %33 ], [ %32, %31 ], [ %30, %._crit_edge ]
  store volatile i32 1, ptr %4, align 4, !tbaa !5
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 36}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !11, i64 36, !11, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !8, i64 0, !8, i64 1, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !11, i64 8}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!15 = !{!6, !11, i64 40}
!16 = !{!11, !11, i64 0}
!17 = !{!14, !11, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass