; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (InitTick)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.RCC_ClkInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

@TimHandle = external hidden global %struct.TIM_HandleTypeDef, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_InitTick(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %struct.RCC_ClkInitTypeDef, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %11 = load i32, ptr %3, align 4, !tbaa !5
  call void @HAL_NVIC_SetPriority(i32 noundef 54, i32 noundef %11, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 54)
  br label %12

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %13 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !9
  %14 = zext i32 %13 to i64
  %15 = or i64 %14, 16
  %16 = trunc i64 %15 to i32
  store volatile i32 %16, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !9
  %17 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !9
  %18 = zext i32 %17 to i64
  %19 = and i64 %18, 16
  %20 = trunc i64 %19 to i32
  store volatile i32 %20, ptr %9, align 4, !tbaa !5
  %21 = load volatile i32, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %22

22:                                               ; preds = %12
  br label %23

23:                                               ; preds = %22
  call void @HAL_RCC_GetClockConfig(ptr noundef %4, ptr noundef %8)
  %24 = getelementptr inbounds %struct.RCC_ClkInitTypeDef, ptr %4, i32 0, i32 5
  %25 = load i32, ptr %24, align 4, !tbaa !11
  store i32 %25, ptr %6, align 4, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %30

28:                                               ; preds = %23
  %29 = call i32 @HAL_RCC_GetPCLK1Freq()
  store i32 %29, ptr %5, align 4, !tbaa !5
  br label %35

30:                                               ; preds = %23
  %31 = call i32 @HAL_RCC_GetPCLK1Freq()
  %32 = zext i32 %31 to i64
  %33 = mul i64 2, %32
  %34 = trunc i64 %33 to i32
  store i32 %34, ptr %5, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %30, %28
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = udiv i32 %36, 1000000
  %38 = sub i32 %37, 1
  store i32 %38, ptr %7, align 4, !tbaa !5
  store ptr inttoptr (i64 1073745920 to ptr), ptr @TimHandle, align 8, !tbaa !13
  store i32 999, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @TimHandle, i32 0, i32 1), i32 0, i32 2), align 8, !tbaa !17
  %39 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %39, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @TimHandle, i32 0, i32 1), align 8, !tbaa !18
  store i32 0, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @TimHandle, i32 0, i32 1), i32 0, i32 3), align 4, !tbaa !19
  store i32 0, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @TimHandle, i32 0, i32 1), i32 0, i32 1), align 4, !tbaa !20
  %40 = call i32 @HAL_TIM_Base_Init(ptr noundef @TimHandle)
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %44

42:                                               ; preds = %35
  %43 = call i32 @HAL_TIM_Base_Start_IT(ptr noundef @TimHandle)
  store i32 %43, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %45

44:                                               ; preds = %35
  store i32 1, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %45

45:                                               ; preds = %44, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 32, ptr %4) #3
  %46 = load i32, ptr %2, align 4
  ret i32 %46
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_RCC_GetClockConfig(ptr noundef, ptr noundef) #2

declare i32 @HAL_RCC_GetPCLK1Freq() #2

declare i32 @HAL_TIM_Base_Init(ptr noundef) #2

declare i32 @HAL_TIM_Base_Start_IT(ptr noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 232}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !6, i64 168, !7, i64 172, !6, i64 208, !6, i64 212, !6, i64 216, !6, i64 220, !6, i64 224, !6, i64 228, !6, i64 232, !6, i64 236, !6, i64 240, !6, i64 244, !6, i64 248, !6, i64 252, !6, i64 256, !6, i64 260, !6, i64 264, !6, i64 268, !6, i64 272, !6, i64 276, !6, i64 280, !6, i64 284, !7, i64 288}
!11 = !{!12, !6, i64 20}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!13 = !{!14, !15, i64 0}
!14 = !{!"", !15, i64 0, !16, i64 8, !6, i64 32, !7, i64 40, !6, i64 96, !6, i64 100}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20}
!17 = !{!14, !6, i64 16}
!18 = !{!14, !6, i64 8}
!19 = !{!14, !6, i64 20}
!20 = !{!14, !6, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.RCC_ClkInitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

@TimHandle = external hidden global %struct.TIM_HandleTypeDef, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_InitTick(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %struct.RCC_ClkInitTypeDef, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  tail call void @HAL_NVIC_SetPriority(i32 noundef 54, i32 noundef %0, i32 noundef 0) #3
  tail call void @HAL_NVIC_EnableIRQ(i32 noundef 54) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4)
  %5 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !5
  %6 = or i32 %5, 16
  store volatile i32 %6, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !5
  %7 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !5
  %8 = and i32 %7, 16
  store volatile i32 %8, ptr %4, align 4, !tbaa !10
  %.0..0..0..0. = load volatile i32, ptr %4, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4)
  call void @HAL_RCC_GetClockConfig(ptr noundef nonnull %2, ptr noundef nonnull %3) #3
  %9 = getelementptr inbounds i8, ptr %2, i64 20
  %10 = load i32, ptr %9, align 4, !tbaa !11
  %11 = icmp ne i32 %10, 0
  %12 = call i32 @HAL_RCC_GetPCLK1Freq() #3
  %13 = zext i1 %11 to i32
  %.05 = shl i32 %12, %13
  %14 = udiv i32 %.05, 1000000
  %15 = add nsw i32 %14, -1
  store ptr inttoptr (i64 1073745920 to ptr), ptr @TimHandle, align 8, !tbaa !13
  store i32 999, ptr getelementptr inbounds (i8, ptr @TimHandle, i64 16), align 8, !tbaa !17
  store i32 %15, ptr getelementptr inbounds (i8, ptr @TimHandle, i64 8), align 8, !tbaa !18
  store i32 0, ptr getelementptr inbounds (i8, ptr @TimHandle, i64 20), align 4, !tbaa !19
  store i32 0, ptr getelementptr inbounds (i8, ptr @TimHandle, i64 12), align 4, !tbaa !20
  %16 = call i32 @HAL_TIM_Base_Init(ptr noundef nonnull @TimHandle) #3
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %20

18:                                               ; preds = %1
  %19 = call i32 @HAL_TIM_Base_Start_IT(ptr noundef nonnull @TimHandle) #3
  br label %20

20:                                               ; preds = %1, %18
  %.0 = phi i32 [ %19, %18 ], [ 1, %1 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %2) #3
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @HAL_RCC_GetClockConfig(ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @HAL_RCC_GetPCLK1Freq() local_unnamed_addr #2

declare i32 @HAL_TIM_Base_Init(ptr noundef) local_unnamed_addr #2

declare i32 @HAL_TIM_Base_Start_IT(ptr noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 232}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !8, i64 172, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !8, i64 288}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 20}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!13 = !{!14, !15, i64 0}
!14 = !{!"", !15, i64 0, !16, i64 8, !7, i64 32, !8, i64 40, !7, i64 96, !7, i64 100}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!17 = !{!14, !7, i64 16}
!18 = !{!14, !7, i64 8}
!19 = !{!14, !7, i64 20}
!20 = !{!14, !7, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass