; LLVM IR from stonne-simulator/omega :: omega-code/stonne/src (SparseDenseSDMemory)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SparseDenseSDMemory = type { %class.MemoryController, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.8", i32, i32, i32, i32, i32, i32, ptr, %"class.std::vector.13", %"class.std::vector.13", ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, %"class.std::vector.8", i32, %class.SDMemoryStats }
%class.MemoryController = type { %class.Unit }
%class.Unit = type { ptr, i32, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl" = type { %"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SparseVN, std::allocator<SparseVN>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Fifo *, std::allocator<Fifo *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.SDMemoryStats = type { %class.Stats, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.3" }
%class.Stats = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN19SparseDenseSDMemory19setDenseSpatialDataEjj(ptr noundef nonnull align 8 dereferenceable(672) %0, i32 noundef %1, i32 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %10 = load ptr, ptr %4, align 8
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 38
  store i32 %11, ptr %12, align 4, !tbaa !11
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 36
  store i32 %13, ptr %14, align 4, !tbaa !39
  %15 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 5
  %16 = load i32, ptr %15, align 4, !tbaa !40
  %17 = uitofp i32 %16 to float
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = uitofp i32 %18 to float
  %20 = fdiv float %17, %19
  %21 = call noundef float @_ZSt4ceilf(float noundef %20)
  %22 = fptoui float %21 to i32
  %23 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 39
  store i32 %22, ptr %23, align 8, !tbaa !41
  %24 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 4
  %25 = load i32, ptr %24, align 8, !tbaa !42
  %26 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 41
  store i32 %25, ptr %26, align 8, !tbaa !43
  %27 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 72
  %28 = getelementptr inbounds %class.SDMemoryStats, ptr %27, i32 0, i32 10
  %29 = load i32, ptr %28, align 4, !tbaa !44
  %30 = add i32 %29, 1
  store i32 %30, ptr %28, align 4, !tbaa !44
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %39, %3
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = icmp ult i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %42

36:                                               ; preds = %31
  %37 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 19
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %37, ptr noundef nonnull align 4 dereferenceable(4) %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %38 = getelementptr inbounds %class.SparseDenseSDMemory, ptr %10, i32 0, i32 18
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %38, ptr noundef nonnull align 4 dereferenceable(4) %9)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %39

39:                                               ; preds = %36
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %7, align 4, !tbaa !9
  br label %31, !llvm.loop !45

42:                                               ; preds = %35
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4ceilf(float noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 364}
!12 = !{!"_ZTS19SparseDenseSDMemory", !13, i64 0, !6, i64 48, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !6, i64 120, !18, i64 128, !19, i64 136, !23, i64 160, !23, i64 184, !27, i64 208, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !6, i64 256, !31, i64 264, !31, i64 288, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !6, i64 384, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !6, i64 408, !6, i64 416, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !35, i64 448, !35, i64 449, !35, i64 450, !35, i64 451, !35, i64 452, !35, i64 453, !35, i64 454, !35, i64 455, !35, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !27, i64 488, !10, i64 512, !36, i64 520}
!13 = !{!"_ZTS16MemoryController", !14, i64 0}
!14 = !{!"_ZTS4Unit", !10, i64 8, !15, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !16, i64 0, !17, i64 8, !7, i64 16}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTS23SparsityControllerState", !7, i64 0}
!19 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSSt6vectorIjSaIjEE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"bool", !7, i64 0}
!36 = !{!"_ZTS13SDMemoryStats", !37, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !38, i64 48, !23, i64 56, !23, i64 80, !23, i64 104, !23, i64 128}
!37 = !{!"_ZTS5Stats"}
!38 = !{!"_ZTS8Dataflow", !7, i64 0}
!39 = !{!12, !10, i64 356}
!40 = !{!12, !10, i64 76}
!41 = !{!12, !10, i64 368}
!42 = !{!12, !10, i64 72}
!43 = !{!12, !10, i64 376}
!44 = !{!12, !10, i64 564}
!45 = distinct !{!45, !46}
!46 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN19SparseDenseSDMemory19setDenseSpatialDataEjj(ptr noundef nonnull align 8 dereferenceable(672) %0, i32 noundef %1, i32 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = getelementptr inbounds i8, ptr %0, i64 364
  store i32 %2, ptr %6, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 356
  store i32 %1, ptr %7, align 4, !tbaa !37
  %8 = getelementptr inbounds i8, ptr %0, i64 76
  %9 = load i32, ptr %8, align 4, !tbaa !38
  %10 = uitofp i32 %9 to float
  %11 = uitofp i32 %1 to float
  %12 = fdiv float %10, %11
  %13 = tail call noundef float @_ZSt4ceilf(float noundef %12)
  %14 = fptoui float %13 to i32
  %15 = getelementptr inbounds i8, ptr %0, i64 368
  store i32 %14, ptr %15, align 8, !tbaa !39
  %16 = getelementptr inbounds i8, ptr %0, i64 72
  %17 = load i32, ptr %16, align 8, !tbaa !40
  %18 = getelementptr inbounds i8, ptr %0, i64 376
  store i32 %17, ptr %18, align 8, !tbaa !41
  %19 = getelementptr inbounds i8, ptr %0, i64 564
  %20 = load i32, ptr %19, align 4, !tbaa !42
  %21 = add i32 %20, 1
  store i32 %21, ptr %19, align 4, !tbaa !42
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %22 = getelementptr inbounds i8, ptr %0, i64 184
  %23 = getelementptr inbounds i8, ptr %0, i64 160
  br label %24

._crit_edge:                                      ; preds = %24, %3
  ret void

24:                                               ; preds = %.lr.ph, %24
  %.06 = phi i32 [ 0, %.lr.ph ], [ %25, %24 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store i32 0, ptr %4, align 4, !tbaa !43
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %22, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  store i32 0, ptr %5, align 4, !tbaa !43
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %23, ptr noundef nonnull align 4 dereferenceable(4) %5)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  %25 = add nuw i32 %.06, 1
  %exitcond.not = icmp eq i32 %25, %1
  br i1 %exitcond.not, label %._crit_edge, label %24, !llvm.loop !44
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4ceilf(float noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 364}
!6 = !{!"_ZTS19SparseDenseSDMemory", !7, i64 0, !14, i64 48, !14, i64 56, !14, i64 64, !9, i64 72, !9, i64 76, !9, i64 80, !9, i64 84, !9, i64 88, !9, i64 92, !9, i64 96, !9, i64 100, !9, i64 104, !9, i64 108, !9, i64 112, !14, i64 120, !16, i64 128, !17, i64 136, !21, i64 160, !21, i64 184, !25, i64 208, !9, i64 232, !9, i64 236, !9, i64 240, !9, i64 244, !9, i64 248, !9, i64 252, !14, i64 256, !29, i64 264, !29, i64 288, !14, i64 312, !14, i64 320, !14, i64 328, !14, i64 336, !14, i64 344, !9, i64 352, !9, i64 356, !9, i64 360, !9, i64 364, !9, i64 368, !9, i64 372, !9, i64 376, !14, i64 384, !9, i64 392, !9, i64 396, !9, i64 400, !9, i64 404, !14, i64 408, !14, i64 416, !9, i64 424, !9, i64 428, !9, i64 432, !9, i64 436, !9, i64 440, !9, i64 444, !33, i64 448, !33, i64 449, !33, i64 450, !33, i64 451, !33, i64 452, !33, i64 453, !33, i64 454, !33, i64 455, !33, i64 456, !9, i64 460, !9, i64 464, !9, i64 468, !9, i64 472, !9, i64 476, !9, i64 480, !25, i64 488, !9, i64 512, !34, i64 520}
!7 = !{!"_ZTS16MemoryController", !8, i64 0}
!8 = !{!"_ZTS4Unit", !9, i64 8, !12, i64 16}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !15, i64 8, !10, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!"long", !10, i64 0}
!16 = !{!"_ZTS23SparsityControllerState", !10, i64 0}
!17 = !{!"_ZTSSt6vectorI8SparseVNSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseI8SparseVNSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI8SparseVNSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!"_ZTSSt6vectorIjSaIjEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!25 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!29 = !{!"_ZTSSt6vectorIP4FifoSaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIP4FifoSaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIP4FifoSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!33 = !{!"bool", !10, i64 0}
!34 = !{!"_ZTS13SDMemoryStats", !35, i64 0, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44, !36, i64 48, !21, i64 56, !21, i64 80, !21, i64 104, !21, i64 128}
!35 = !{!"_ZTS5Stats"}
!36 = !{!"_ZTS8Dataflow", !10, i64 0}
!37 = !{!6, !9, i64 356}
!38 = !{!6, !9, i64 76}
!39 = !{!6, !9, i64 368}
!40 = !{!6, !9, i64 72}
!41 = !{!6, !9, i64 376}
!42 = !{!6, !9, i64 564}
!43 = !{!9, !9, i64 0}
!44 = distinct !{!44, !45}
!45 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass