; LLVM IR from Seeed-Studio/Seeed_Arduino_edgeimpulse :: src/edge-impulse-sdk/tensorflow/lite/micro (micro_utils)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5roundf(float noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef signext i8 @_ZN6tflite30FloatToAsymmetricQuantizedInt8Effi(float noundef %0, float noundef %1, i32 noundef %2) #2 {
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store float %0, ptr %4, align 4, !tbaa !5
  store float %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %8 = load float, ptr %4, align 4, !tbaa !5
  %9 = load float, ptr %5, align 4, !tbaa !5
  %10 = fdiv float %8, %9
  %11 = call noundef float @_ZSt5roundf(float noundef %10)
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = sitofp i32 %12 to float
  %14 = fadd float %11, %13
  %15 = fptosi float %14 to i32
  store i32 %15, ptr %7, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp slt i32 %16, -128
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  store i32 -128, ptr %7, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %18, %3
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = icmp sgt i32 %20, 127
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  store i32 127, ptr %7, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %22, %19
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = trunc i32 %24 to i8
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret i8 %25
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5roundf(float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef signext i8 @_ZN6tflite30FloatToAsymmetricQuantizedInt8Effi(float noundef %0, float noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = fdiv float %0, %1
  %5 = tail call noundef float @_ZSt5roundf(float noundef %4)
  %6 = sitofp i32 %2 to float
  %7 = fadd float %5, %6
  %8 = fptosi float %7 to i32
  %spec.store.select = tail call i32 @llvm.smax.i32(i32 %8, i32 -128)
  %spec.store.select1 = tail call i32 @llvm.smin.i32(i32 %spec.store.select, i32 127)
  %9 = trunc nsw i32 %spec.store.select1 to i8
  ret i8 %9
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass