; LLVM IR from lichen-community-systems/signaletic :: hosts/daisy/vendor/libDaisy/Drivers/STM32H7xx_HAL_Driver/Src (GetClockCalibrationCounter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FDCAN_ClockCalibrationUnit_TypeDef = type { i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_FDCAN_GetClockCalibrationCounter(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %6 = load ptr, ptr %4, align 8, !tbaa !5
  %7 = load i32, ptr %5, align 4, !tbaa !9
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %15

9:                                                ; preds = %2
  %10 = load volatile i32, ptr getelementptr inbounds (%struct.FDCAN_ClockCalibrationUnit_TypeDef, ptr inttoptr (i64 1073784832 to ptr), i32 0, i32 2), align 4, !tbaa !11
  %11 = zext i32 %10 to i64
  %12 = and i64 %11, 536608768
  %13 = lshr i64 %12, 18
  %14 = trunc i64 %13 to i32
  store i32 %14, ptr %3, align 4
  br label %29

15:                                               ; preds = %2
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %23

18:                                               ; preds = %15
  %19 = load volatile i32, ptr getelementptr inbounds (%struct.FDCAN_ClockCalibrationUnit_TypeDef, ptr inttoptr (i64 1073784832 to ptr), i32 0, i32 2), align 4, !tbaa !11
  %20 = zext i32 %19 to i64
  %21 = and i64 %20, 262143
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %3, align 4
  br label %29

23:                                               ; preds = %15
  %24 = load volatile i32, ptr getelementptr inbounds (%struct.FDCAN_ClockCalibrationUnit_TypeDef, ptr inttoptr (i64 1073784832 to ptr), i32 0, i32 3), align 4, !tbaa !13
  %25 = zext i32 %24 to i64
  %26 = and i64 %25, 4294901760
  %27 = lshr i64 %26, 16
  %28 = trunc i64 %27 to i32
  store i32 %28, ptr %3, align 4
  br label %29

29:                                               ; preds = %23, %18, %9
  %30 = load i32, ptr %3, align 4
  ret i32 %30
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20}
!13 = !{!12, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local range(i32 0, 262144) i32 @HAL_FDCAN_GetClockCalibrationCounter(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
  switch i32 %1, label %10 [
    i32 0, label %3
    i32 1, label %7
  ]

3:                                                ; preds = %2
  %4 = load volatile i32, ptr inttoptr (i64 1073784840 to ptr), align 8, !tbaa !5
  %5 = lshr i32 %4, 18
  %6 = and i32 %5, 2047
  br label %13

7:                                                ; preds = %2
  %8 = load volatile i32, ptr inttoptr (i64 1073784840 to ptr), align 8, !tbaa !5
  %9 = and i32 %8, 262143
  br label %13

10:                                               ; preds = %2
  %11 = load volatile i32, ptr inttoptr (i64 1073784844 to ptr), align 4, !tbaa !10
  %12 = lshr i32 %11, 16
  br label %13

13:                                               ; preds = %10, %7, %3
  %.0 = phi i32 [ %6, %3 ], [ %9, %7 ], [ %12, %10 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 12}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass