; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetScale16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Scale16bParam" = type <{ i64, i64, i32, i32, i32, i32, i32, [4 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base13SynetScale16b10PreferableERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(36)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base17SynetScale16bInitEmm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(i64 noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #1 personality ptr @__gxx_personality_v0 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca %"struct.Simd::Scale16bParam", align 8
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  store i64 %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !5
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store i32 %4, ptr %13, align 4, !tbaa !11
  store i32 %5, ptr %14, align 4, !tbaa !13
  store i32 %6, ptr %15, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 40, ptr %16) #5
  %20 = load i64, ptr %9, align 8, !tbaa !5
  %21 = load i64, ptr %10, align 8, !tbaa !5
  %22 = load i32, ptr %11, align 4, !tbaa !9
  %23 = load i32, ptr %12, align 4, !tbaa !9
  %24 = load i32, ptr %13, align 4, !tbaa !11
  %25 = load i32, ptr %14, align 4, !tbaa !13
  %26 = load i32, ptr %15, align 4, !tbaa !13
  call void @_ZN4Simd13Scale16bParamC2Emm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(ptr noundef nonnull align 8 dereferenceable(36) %16, i64 noundef %20, i64 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26)
  %27 = call noundef zeroext i1 @_ZN4Simd13Scale16bParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(36) %16)
  br i1 %27, label %29, label %28

28:                                               ; preds = %7
  store ptr null, ptr %8, align 8
  store i32 1, ptr %17, align 4
  br label %39

29:                                               ; preds = %7
  %30 = call noundef zeroext i1 @_ZN4Simd4Base13SynetScale16b10PreferableERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(36) %16)
  br i1 %30, label %31, label %38

31:                                               ; preds = %29
  %32 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 56) #6
  invoke void @_ZN4Simd4Base13SynetScale16bC1ERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(56) %32, ptr noundef nonnull align 8 dereferenceable(36) %16)
          to label %33 unwind label %34

33:                                               ; preds = %31
  store ptr %32, ptr %8, align 8
  store i32 1, ptr %17, align 4
  br label %39

34:                                               ; preds = %31
  %35 = landingpad { ptr, i32 }
          cleanup
  %36 = extractvalue { ptr, i32 } %35, 0
  store ptr %36, ptr %18, align 8
  %37 = extractvalue { ptr, i32 } %35, 1
  store i32 %37, ptr %19, align 4
  call void @_ZdlPvm(ptr noundef %32, i64 noundef 56) #7
  call void @llvm.lifetime.end.p0(i64 40, ptr %16) #5
  br label %41

38:                                               ; preds = %29
  store ptr null, ptr %8, align 8
  store i32 1, ptr %17, align 4
  br label %39

39:                                               ; preds = %38, %33, %28
  call void @llvm.lifetime.end.p0(i64 40, ptr %16) #5
  %40 = load ptr, ptr %8, align 8
  ret ptr %40

41:                                               ; preds = %34
  %42 = load ptr, ptr %18, align 8
  %43 = load i32, ptr %19, align 4
  %44 = insertvalue { ptr, i32 } poison, ptr %42, 0
  %45 = insertvalue { ptr, i32 } %44, i32 %43, 1
  resume { ptr, i32 } %45
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd13Scale16bParamC2Emm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(ptr noundef nonnull align 8 dereferenceable(36), i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd13Scale16bParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(36)) #0 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @_ZN4Simd4Base13SynetScale16bC1ERKNS_13Scale16bParamE(ptr, ptr)

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS8SimdBool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Scale16bParam" = type <{ i64, i64, i32, i32, i32, i32, i32, [4 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base13SynetScale16b10PreferableERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base17SynetScale16bInitEmm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(i64 noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %8 = alloca %"struct.Simd::Scale16bParam", align 8
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %8) #5
  call void @_ZN4Simd13Scale16bParamC2Emm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(ptr noundef nonnull align 8 dereferenceable(36) %8, i64 noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6)
  %9 = call noundef zeroext i1 @_ZN4Simd13Scale16bParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(36) %8)
  br i1 %9, label %10, label %16

10:                                               ; preds = %7
  %11 = call noundef zeroext i1 @_ZN4Simd4Base13SynetScale16b10PreferableERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(36) %8)
  br i1 %11, label %12, label %16

12:                                               ; preds = %10
  %13 = call noalias noundef nonnull dereferenceable(56) ptr @_Znwm(i64 noundef 56) #6
  invoke void @_ZN4Simd4Base13SynetScale16bC1ERKNS_13Scale16bParamE(ptr noundef nonnull align 8 dereferenceable(56) %13, ptr noundef nonnull align 8 dereferenceable(36) %8)
          to label %16 unwind label %14

14:                                               ; preds = %12
  %15 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %13, i64 noundef 56) #7
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %8) #5
  resume { ptr, i32 } %15

16:                                               ; preds = %10, %12, %7
  %.0 = phi ptr [ null, %7 ], [ %13, %12 ], [ null, %10 ]
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %8) #5
  ret ptr %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd13Scale16bParamC2Emm18SimdTensorDataTypeS1_20SimdTensorFormatType8SimdBoolS3_(ptr noundef nonnull align 8 dereferenceable(36), i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd13Scale16bParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #0 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @_ZN4Simd4Base13SynetScale16bC1ERKNS_13Scale16bParamE(ptr, ptr) local_unnamed_addr

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass