; LLVM IR from mlcommons/tiny :: benchmark/interface/Drivers/BSP/Components/cs42l51 (cs42l51)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CS42L51_Object_t = type { %struct.CS42L51_IO_t, %struct.cs42l51_ctx_t, i8 }
%struct.CS42L51_IO_t = type { ptr, ptr, i16, ptr, ptr, ptr }
%struct.cs42l51_ctx_t = type { ptr, ptr, ptr }

@CS42L51_CurrentDevices = external hidden global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Play(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #3
  %5 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !9
  %6 = and i32 %5, 1
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %8, label %32

8:                                                ; preds = %1
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = call i32 @CS42L51_SetMute(ptr noundef %9, i32 noundef 0)
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = add nsw i32 %11, %10
  store i32 %12, ptr %3, align 4, !tbaa !9
  store i8 66, ptr %4, align 1, !tbaa !11
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %13, i32 0, i32 1
  %15 = call i32 @cs42l51_write_reg(ptr noundef %14, i16 noundef zeroext 9, ptr noundef %4, i16 noundef zeroext 1)
  %16 = load i32, ptr %3, align 4, !tbaa !9
  %17 = add nsw i32 %16, %15
  store i32 %17, ptr %3, align 4, !tbaa !9
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %18, i32 0, i32 1
  %20 = call i32 @cs42l51_read_reg(ptr noundef %19, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %21 = load i32, ptr %3, align 4, !tbaa !9
  %22 = add nsw i32 %21, %20
  store i32 %22, ptr %3, align 4, !tbaa !9
  %23 = load i8, ptr %4, align 1, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = and i32 %24, 159
  %26 = trunc i32 %25 to i8
  store i8 %26, ptr %4, align 1, !tbaa !11
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %27, i32 0, i32 1
  %29 = call i32 @cs42l51_write_reg(ptr noundef %28, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = add nsw i32 %30, %29
  store i32 %31, ptr %3, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %8, %1
  %33 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !9
  %34 = and i32 %33, 1024
  %35 = icmp eq i32 %34, 1024
  br i1 %35, label %36, label %70

36:                                               ; preds = %32
  store i8 0, ptr %4, align 1, !tbaa !11
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %37, i32 0, i32 1
  %39 = call i32 @cs42l51_write_reg(ptr noundef %38, i16 noundef zeroext 7, ptr noundef %4, i16 noundef zeroext 1)
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = add nsw i32 %40, %39
  store i32 %41, ptr %3, align 4, !tbaa !9
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %42, i32 0, i32 1
  %44 = call i32 @cs42l51_read_reg(ptr noundef %43, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %45 = load i32, ptr %3, align 4, !tbaa !9
  %46 = add nsw i32 %45, %44
  store i32 %46, ptr %3, align 4, !tbaa !9
  %47 = load i8, ptr %4, align 1, !tbaa !11
  %48 = zext i8 %47 to i32
  %49 = and i32 %48, 249
  %50 = trunc i32 %49 to i8
  store i8 %50, ptr %4, align 1, !tbaa !11
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %51, i32 0, i32 1
  %53 = call i32 @cs42l51_write_reg(ptr noundef %52, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %54 = load i32, ptr %3, align 4, !tbaa !9
  %55 = add nsw i32 %54, %53
  store i32 %55, ptr %3, align 4, !tbaa !9
  %56 = load ptr, ptr %2, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %56, i32 0, i32 1
  %58 = call i32 @cs42l51_read_reg(ptr noundef %57, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %59 = load i32, ptr %3, align 4, !tbaa !9
  %60 = add nsw i32 %59, %58
  store i32 %60, ptr %3, align 4, !tbaa !9
  %61 = load i8, ptr %4, align 1, !tbaa !11
  %62 = zext i8 %61 to i32
  %63 = and i32 %62, 255
  %64 = trunc i32 %63 to i8
  store i8 %64, ptr %4, align 1, !tbaa !11
  %65 = load ptr, ptr %2, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %65, i32 0, i32 1
  %67 = call i32 @cs42l51_write_reg(ptr noundef %66, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %68 = load i32, ptr %3, align 4, !tbaa !9
  %69 = add nsw i32 %68, %67
  store i32 %69, ptr %3, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %36, %32
  %71 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !9
  %72 = and i32 %71, 256
  %73 = icmp eq i32 %72, 256
  br i1 %73, label %74, label %108

74:                                               ; preds = %70
  store i8 50, ptr %4, align 1, !tbaa !11
  %75 = load ptr, ptr %2, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %75, i32 0, i32 1
  %77 = call i32 @cs42l51_write_reg(ptr noundef %76, i16 noundef zeroext 7, ptr noundef %4, i16 noundef zeroext 1)
  %78 = load i32, ptr %3, align 4, !tbaa !9
  %79 = add nsw i32 %78, %77
  store i32 %79, ptr %3, align 4, !tbaa !9
  %80 = load ptr, ptr %2, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %80, i32 0, i32 1
  %82 = call i32 @cs42l51_read_reg(ptr noundef %81, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %83 = load i32, ptr %3, align 4, !tbaa !9
  %84 = add nsw i32 %83, %82
  store i32 %84, ptr %3, align 4, !tbaa !9
  %85 = load i8, ptr %4, align 1, !tbaa !11
  %86 = zext i8 %85 to i32
  %87 = and i32 %86, 245
  %88 = trunc i32 %87 to i8
  store i8 %88, ptr %4, align 1, !tbaa !11
  %89 = load ptr, ptr %2, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %89, i32 0, i32 1
  %91 = call i32 @cs42l51_write_reg(ptr noundef %90, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %92 = load i32, ptr %3, align 4, !tbaa !9
  %93 = add nsw i32 %92, %91
  store i32 %93, ptr %3, align 4, !tbaa !9
  %94 = load ptr, ptr %2, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %94, i32 0, i32 1
  %96 = call i32 @cs42l51_read_reg(ptr noundef %95, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %97 = load i32, ptr %3, align 4, !tbaa !9
  %98 = add nsw i32 %97, %96
  store i32 %98, ptr %3, align 4, !tbaa !9
  %99 = load i8, ptr %4, align 1, !tbaa !11
  %100 = zext i8 %99 to i32
  %101 = and i32 %100, 249
  %102 = trunc i32 %101 to i8
  store i8 %102, ptr %4, align 1, !tbaa !11
  %103 = load ptr, ptr %2, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %103, i32 0, i32 1
  %105 = call i32 @cs42l51_write_reg(ptr noundef %104, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %106 = load i32, ptr %3, align 4, !tbaa !9
  %107 = add nsw i32 %106, %105
  store i32 %107, ptr %3, align 4, !tbaa !9
  br label %108

108:                                              ; preds = %74, %70
  %109 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !9
  %110 = and i32 %109, 512
  %111 = icmp eq i32 %110, 512
  br i1 %111, label %112, label %141

112:                                              ; preds = %108
  %113 = load ptr, ptr %2, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %113, i32 0, i32 1
  %115 = call i32 @cs42l51_read_reg(ptr noundef %114, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %116 = load i32, ptr %3, align 4, !tbaa !9
  %117 = add nsw i32 %116, %115
  store i32 %117, ptr %3, align 4, !tbaa !9
  %118 = load i8, ptr %4, align 1, !tbaa !11
  %119 = zext i8 %118 to i32
  %120 = and i32 %119, 235
  %121 = trunc i32 %120 to i8
  store i8 %121, ptr %4, align 1, !tbaa !11
  %122 = load ptr, ptr %2, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %122, i32 0, i32 1
  %124 = call i32 @cs42l51_write_reg(ptr noundef %123, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %125 = load i32, ptr %3, align 4, !tbaa !9
  %126 = add nsw i32 %125, %124
  store i32 %126, ptr %3, align 4, !tbaa !9
  %127 = load ptr, ptr %2, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %127, i32 0, i32 1
  %129 = call i32 @cs42l51_read_reg(ptr noundef %128, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %130 = load i32, ptr %3, align 4, !tbaa !9
  %131 = add nsw i32 %130, %129
  store i32 %131, ptr %3, align 4, !tbaa !9
  %132 = load i8, ptr %4, align 1, !tbaa !11
  %133 = zext i8 %132 to i32
  %134 = and i32 %133, 245
  %135 = trunc i32 %134 to i8
  store i8 %135, ptr %4, align 1, !tbaa !11
  %136 = load ptr, ptr %2, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %136, i32 0, i32 1
  %138 = call i32 @cs42l51_write_reg(ptr noundef %137, i16 noundef zeroext 3, ptr noundef %4, i16 noundef zeroext 1)
  %139 = load i32, ptr %3, align 4, !tbaa !9
  %140 = add nsw i32 %139, %138
  store i32 %140, ptr %3, align 4, !tbaa !9
  br label %141

141:                                              ; preds = %112, %108
  %142 = load ptr, ptr %2, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %142, i32 0, i32 1
  %144 = call i32 @cs42l51_read_reg(ptr noundef %143, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %145 = load i32, ptr %3, align 4, !tbaa !9
  %146 = add nsw i32 %145, %144
  store i32 %146, ptr %3, align 4, !tbaa !9
  %147 = load i8, ptr %4, align 1, !tbaa !11
  %148 = zext i8 %147 to i32
  %149 = and i32 %148, 254
  %150 = trunc i32 %149 to i8
  store i8 %150, ptr %4, align 1, !tbaa !11
  %151 = load ptr, ptr %2, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %151, i32 0, i32 1
  %153 = call i32 @cs42l51_write_reg(ptr noundef %152, i16 noundef zeroext 2, ptr noundef %4, i16 noundef zeroext 1)
  %154 = load i32, ptr %3, align 4, !tbaa !9
  %155 = add nsw i32 %154, %153
  store i32 %155, ptr %3, align 4, !tbaa !9
  %156 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %156
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @CS42L51_SetMute(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@CS42L51_CurrentDevices = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Play(ptr noundef %0) local_unnamed_addr #0 {
  %2 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #3
  %3 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !5
  %4 = and i32 %3, 1
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %16, label %5

5:                                                ; preds = %1
  %6 = tail call i32 @CS42L51_SetMute(ptr noundef %0, i32 noundef 0)
  store i8 66, ptr %2, align 1, !tbaa !9
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  %8 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 9, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %9 = add nsw i32 %8, %6
  %10 = call i32 @cs42l51_read_reg(ptr noundef nonnull %7, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %11 = add nsw i32 %9, %10
  %12 = load i8, ptr %2, align 1, !tbaa !9
  %13 = and i8 %12, -97
  store i8 %13, ptr %2, align 1, !tbaa !9
  %14 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %15 = add nsw i32 %11, %14
  %.pre = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %5, %1
  %17 = phi i32 [ %.pre, %5 ], [ %3, %1 ]
  %.0 = phi i32 [ %15, %5 ], [ 0, %1 ]
  %18 = and i32 %17, 1024
  %.not40 = icmp eq i32 %18, 0
  br i1 %.not40, label %33, label %19

19:                                               ; preds = %16
  store i8 0, ptr %2, align 1, !tbaa !9
  %20 = getelementptr inbounds i8, ptr %0, i64 48
  %21 = call i32 @cs42l51_write_reg(ptr noundef nonnull %20, i16 noundef zeroext 7, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %22 = add nsw i32 %21, %.0
  %23 = call i32 @cs42l51_read_reg(ptr noundef nonnull %20, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %24 = add nsw i32 %22, %23
  %25 = load i8, ptr %2, align 1, !tbaa !9
  %26 = and i8 %25, -7
  store i8 %26, ptr %2, align 1, !tbaa !9
  %27 = call i32 @cs42l51_write_reg(ptr noundef nonnull %20, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %28 = add nsw i32 %24, %27
  %29 = call i32 @cs42l51_read_reg(ptr noundef nonnull %20, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %30 = add nsw i32 %28, %29
  %31 = call i32 @cs42l51_write_reg(ptr noundef nonnull %20, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %32 = add nsw i32 %30, %31
  %.pre43 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %19, %16
  %34 = phi i32 [ %.pre43, %19 ], [ %17, %16 ]
  %.1 = phi i32 [ %32, %19 ], [ %.0, %16 ]
  %35 = and i32 %34, 256
  %.not41 = icmp eq i32 %35, 0
  br i1 %.not41, label %52, label %36

36:                                               ; preds = %33
  store i8 50, ptr %2, align 1, !tbaa !9
  %37 = getelementptr inbounds i8, ptr %0, i64 48
  %38 = call i32 @cs42l51_write_reg(ptr noundef nonnull %37, i16 noundef zeroext 7, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %39 = add nsw i32 %38, %.1
  %40 = call i32 @cs42l51_read_reg(ptr noundef nonnull %37, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %41 = add nsw i32 %39, %40
  %42 = load i8, ptr %2, align 1, !tbaa !9
  %43 = and i8 %42, -11
  store i8 %43, ptr %2, align 1, !tbaa !9
  %44 = call i32 @cs42l51_write_reg(ptr noundef nonnull %37, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %45 = add nsw i32 %41, %44
  %46 = call i32 @cs42l51_read_reg(ptr noundef nonnull %37, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %47 = add nsw i32 %45, %46
  %48 = load i8, ptr %2, align 1, !tbaa !9
  %49 = and i8 %48, -7
  store i8 %49, ptr %2, align 1, !tbaa !9
  %50 = call i32 @cs42l51_write_reg(ptr noundef nonnull %37, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %51 = add nsw i32 %47, %50
  %.pre44 = load i32, ptr @CS42L51_CurrentDevices, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %36, %33
  %53 = phi i32 [ %.pre44, %36 ], [ %34, %33 ]
  %.2 = phi i32 [ %51, %36 ], [ %.1, %33 ]
  %54 = and i32 %53, 512
  %.not42 = icmp eq i32 %54, 0
  br i1 %.not42, label %69, label %55

55:                                               ; preds = %52
  %56 = getelementptr inbounds i8, ptr %0, i64 48
  %57 = call i32 @cs42l51_read_reg(ptr noundef nonnull %56, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %58 = add nsw i32 %57, %.2
  %59 = load i8, ptr %2, align 1, !tbaa !9
  %60 = and i8 %59, -21
  store i8 %60, ptr %2, align 1, !tbaa !9
  %61 = call i32 @cs42l51_write_reg(ptr noundef nonnull %56, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %62 = add nsw i32 %58, %61
  %63 = call i32 @cs42l51_read_reg(ptr noundef nonnull %56, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %64 = add nsw i32 %62, %63
  %65 = load i8, ptr %2, align 1, !tbaa !9
  %66 = and i8 %65, -11
  store i8 %66, ptr %2, align 1, !tbaa !9
  %67 = call i32 @cs42l51_write_reg(ptr noundef nonnull %56, i16 noundef zeroext 3, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %68 = add nsw i32 %64, %67
  br label %69

69:                                               ; preds = %55, %52
  %.3 = phi i32 [ %68, %55 ], [ %.2, %52 ]
  %70 = getelementptr inbounds i8, ptr %0, i64 48
  %71 = call i32 @cs42l51_read_reg(ptr noundef nonnull %70, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %72 = add nsw i32 %71, %.3
  %73 = load i8, ptr %2, align 1, !tbaa !9
  %74 = and i8 %73, -2
  store i8 %74, ptr %2, align 1, !tbaa !9
  %75 = call i32 @cs42l51_write_reg(ptr noundef nonnull %70, i16 noundef zeroext 2, ptr noundef nonnull %2, i16 noundef zeroext 1) #3
  %76 = add nsw i32 %72, %75
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #3
  ret i32 %76
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @CS42L51_SetMute(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass