; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetConvolution8i.ll (ZNK4Simd18SynetConvolution8i18ExternalBufferSizeEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution8i" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", ptr, %"struct.Simd::CvtParam", %"struct.Simd::CvtParam", %"struct.Simd::Array.1", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, i8, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZNK4Simd18SynetConvolution8i18ExternalBufferSizeEv(ptr noundef nonnull align 8 dereferenceable(552) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 8, ptr %3, align 8, !tbaa !9
  %5 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %4, i32 0, i32 11
  %6 = load i8, ptr %5, align 8, !tbaa !11, !range !29, !noundef !30
  %7 = trunc i8 %6 to i1
  br i1 %7, label %18, label %8

8:                                                ; preds = %1
  %9 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %4, i32 0, i32 14
  %10 = load i64, ptr %9, align 8, !tbaa !31
  %11 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %4, i32 0, i32 13
  %12 = load i64, ptr %11, align 8, !tbaa !32
  %13 = mul i64 %10, %12
  %14 = mul i64 %13, 1
  %15 = call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %14, i64 noundef 8)
  %16 = load i64, ptr %3, align 8, !tbaa !9
  %17 = add i64 %16, %15
  store i64 %17, ptr %3, align 8, !tbaa !9
  br label %18

18:                                               ; preds = %8, %1
  %19 = load i64, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret i64 %19
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !26, i64 520}
!12 = !{!"_ZTSN4Simd18SynetConvolution8iE", !13, i64 0, !14, i64 8, !21, i64 192, !22, i64 208, !6, i64 240, !24, i64 248, !24, i64 352, !28, i64 456, !25, i64 472, !25, i64 488, !25, i64 504, !26, i64 520, !26, i64 521, !10, i64 528, !10, i64 536, !10, i64 544}
!13 = !{!"_ZTSN4Simd9DeletableE"}
!14 = !{!"_ZTSN4Simd9ConvParamE", !15, i64 0, !19, i64 160, !10, i64 168, !20, i64 176}
!15 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !16, i64 24, !17, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !16, i64 56, !17, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !18, i64 152}
!16 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!17 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!18 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !10, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"_ZTSN4Simd8CvtParamE", !21, i64 0, !25, i64 16, !25, i64 32, !25, i64 48, !25, i64 64, !26, i64 80, !27, i64 84, !27, i64 88, !27, i64 92, !27, i64 96}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"int", !7, i64 0}
!28 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !10, i64 8}
!29 = !{i8 0, i8 2}
!30 = !{}
!31 = !{!12, !10, i64 536}
!32 = !{!12, !10, i64 528}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK4Simd18SynetConvolution8i18ExternalBufferSizeEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(552) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 520
  %3 = load i8, ptr %2, align 8, !tbaa !5, !range !27, !noundef !28
  %4 = trunc nuw i8 %3 to i1
  br i1 %4, label %13, label %5

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 536
  %7 = load i64, ptr %6, align 8, !tbaa !29
  %8 = getelementptr inbounds i8, ptr %0, i64 528
  %9 = load i64, ptr %8, align 8, !tbaa !30
  %10 = mul i64 %9, %7
  %11 = tail call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %10, i64 noundef 8)
  %12 = add i64 %11, 8
  br label %13

13:                                               ; preds = %5, %1
  %.0 = phi i64 [ 8, %1 ], [ %12, %5 ]
  ret i64 %.0
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !24, i64 520}
!6 = !{!"_ZTSN4Simd18SynetConvolution8iE", !7, i64 0, !8, i64 8, !18, i64 192, !20, i64 208, !19, i64 240, !22, i64 248, !22, i64 352, !26, i64 456, !23, i64 472, !23, i64 488, !23, i64 504, !24, i64 520, !24, i64 521, !10, i64 528, !10, i64 536, !10, i64 544}
!7 = !{!"_ZTSN4Simd9DeletableE"}
!8 = !{!"_ZTSN4Simd9ConvParamE", !9, i64 0, !16, i64 160, !10, i64 168, !17, i64 176}
!9 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !13, i64 24, !14, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !13, i64 56, !14, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !15, i64 152}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS18SimdTensorDataType", !11, i64 0}
!14 = !{!"_ZTS20SimdTensorFormatType", !11, i64 0}
!15 = !{!"_ZTS29SimdConvolutionActivationType", !11, i64 0}
!16 = !{!"_ZTS8SimdBool", !11, i64 0}
!17 = !{!"_ZTS26SimdSynetCompatibilityType", !11, i64 0}
!18 = !{!"_ZTSN4Simd5ArrayIhEE", !19, i64 0, !10, i64 8}
!19 = !{!"any pointer", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !10, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !19, i64 0}
!22 = !{!"_ZTSN4Simd8CvtParamE", !18, i64 0, !23, i64 16, !23, i64 32, !23, i64 48, !23, i64 64, !24, i64 80, !25, i64 84, !25, i64 88, !25, i64 92, !25, i64 96}
!23 = !{!"_ZTSN4Simd5ArrayIfEE", !19, i64 0, !10, i64 8}
!24 = !{!"bool", !11, i64 0}
!25 = !{!"int", !11, i64 0}
!26 = !{!"_ZTSN4Simd5ArrayIaEE", !19, i64 0, !10, i64 8}
!27 = !{i8 0, i8 2}
!28 = !{}
!29 = !{!6, !10, i64 536}
!30 = !{!6, !10, i64 528}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass