; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvthf8_to_f32_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #1 {
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i8 %1, ptr %10, align 1, !tbaa !9
  store i32 %2, ptr %11, align 4, !tbaa !10
  store i32 %3, ptr %12, align 4, !tbaa !10
  store i32 %4, ptr %13, align 4, !tbaa !10
  store i32 %5, ptr %14, align 4, !tbaa !10
  store i32 %6, ptr %15, align 4, !tbaa !10
  store i32 %7, ptr %16, align 4, !tbaa !10
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = load i8, ptr %10, align 1, !tbaa !9
  %19 = load i32, ptr %11, align 4, !tbaa !10
  %20 = load i32, ptr %11, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %17, i32 noundef 537207841, i8 noundef signext %18, i32 noundef %19, i32 noundef %20)
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  %22 = load i8, ptr %10, align 1, !tbaa !9
  %23 = load i32, ptr %11, align 4, !tbaa !10
  %24 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %21, i32 noundef 805639899, i8 noundef signext %22, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef 1, i32 noundef %23, i32 noundef %24)
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = load i8, ptr %10, align 1, !tbaa !9
  %27 = load i32, ptr %13, align 4, !tbaa !10
  %28 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %25, i32 noundef 805639798, i8 noundef signext %26, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef 1, i32 noundef %27, i32 noundef %28)
  %29 = load ptr, ptr %9, align 8, !tbaa !5
  %30 = load i8, ptr %10, align 1, !tbaa !9
  %31 = load i32, ptr %11, align 4, !tbaa !10
  %32 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %29, i32 noundef 805639899, i8 noundef signext %30, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 104, i32 noundef 1, i32 noundef %31, i32 noundef %32)
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = load i8, ptr %10, align 1, !tbaa !9
  %35 = load i32, ptr %13, align 4, !tbaa !10
  %36 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %33, i32 noundef 606934642, i8 noundef signext %34, i32 noundef %35, i32 noundef %36, i32 noundef 3)
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = load i8, ptr %10, align 1, !tbaa !9
  %39 = load i32, ptr %13, align 4, !tbaa !10
  %40 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %37, i32 noundef 805639798, i8 noundef signext %38, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 72, i32 noundef 1, i32 noundef %39, i32 noundef %40)
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = load i32, ptr %16, align 4, !tbaa !10
  %43 = load i32, ptr %15, align 4, !tbaa !10
  %44 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %41, i32 noundef -1341910203, i32 noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef 0)
  %45 = load ptr, ptr %9, align 8, !tbaa !5
  %46 = load i8, ptr %10, align 1, !tbaa !9
  %47 = load i32, ptr %13, align 4, !tbaa !10
  %48 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %45, i32 noundef 805639934, i8 noundef signext %46, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 104, i32 noundef 1, i32 noundef %47, i32 noundef %48)
  %49 = load ptr, ptr %9, align 8, !tbaa !5
  %50 = load i8, ptr %10, align 1, !tbaa !9
  %51 = load i32, ptr %13, align 4, !tbaa !10
  %52 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %49, i32 noundef 611128946, i8 noundef signext %50, i32 noundef %51, i32 noundef %52, i32 noundef 23)
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = load i8, ptr %10, align 1, !tbaa !9
  %55 = load i32, ptr %11, align 4, !tbaa !10
  %56 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %53, i32 noundef 805639899, i8 noundef signext %54, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 88, i32 noundef 1, i32 noundef %55, i32 noundef %56)
  %57 = load ptr, ptr %9, align 8, !tbaa !5
  %58 = load i8, ptr %10, align 1, !tbaa !9
  %59 = load i32, ptr %14, align 4, !tbaa !10
  %60 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %57, i32 noundef 611128946, i8 noundef signext %58, i32 noundef %59, i32 noundef %60, i32 noundef 20)
  %61 = load ptr, ptr %9, align 8, !tbaa !5
  %62 = load i8, ptr %10, align 1, !tbaa !9
  %63 = load i32, ptr %13, align 4, !tbaa !10
  %64 = load i32, ptr %14, align 4, !tbaa !10
  %65 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %61, i32 noundef 805639915, i8 noundef signext %62, i32 noundef %63, i32 noundef %64, i32 noundef %65)
  %66 = load ptr, ptr %9, align 8, !tbaa !5
  %67 = load i8, ptr %10, align 1, !tbaa !9
  %68 = load i32, ptr %11, align 4, !tbaa !10
  %69 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %66, i32 noundef 805639899, i8 noundef signext %67, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 64, i32 noundef 1, i32 noundef %68, i32 noundef %69)
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  %71 = load i8, ptr %10, align 1, !tbaa !9
  %72 = load i32, ptr %14, align 4, !tbaa !10
  %73 = load i32, ptr %13, align 4, !tbaa !10
  %74 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %70, i32 noundef 805643830, i8 noundef signext %71, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %72, i32 noundef %73, i32 noundef %74, i32 noundef 0, i32 noundef 0)
  %75 = load ptr, ptr %9, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %75, i32 0, i32 6
  %77 = load i32, ptr %76, align 4, !tbaa !12
  %78 = icmp ult i32 %77, 1101
  br i1 %78, label %79, label %95

79:                                               ; preds = %8
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = load i8, ptr %10, align 1, !tbaa !9
  %82 = load i32, ptr %14, align 4, !tbaa !10
  %83 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %80, i32 noundef 805639782, i8 noundef signext %81, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 88, i32 noundef 1, i32 noundef %82, i32 noundef %83)
  %84 = load ptr, ptr %9, align 8, !tbaa !5
  %85 = load i32, ptr %16, align 4, !tbaa !10
  %86 = load i32, ptr %15, align 4, !tbaa !10
  %87 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %84, i32 noundef -1341910207, i32 noundef %85, i32 noundef %86, i32 noundef %87, i32 noundef 0)
  %88 = load ptr, ptr %9, align 8, !tbaa !5
  %89 = load ptr, ptr %9, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %89, i32 0, i32 6
  %91 = load i32, ptr %90, align 4, !tbaa !12
  %92 = load i8, ptr %10, align 1, !tbaa !9
  %93 = load i32, ptr %13, align 4, !tbaa !10
  %94 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %88, i32 noundef %91, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 32, i8 noundef signext %92, i32 noundef %93, i32 noundef %94, i32 noundef 0, i32 noundef 0)
  br label %95

95:                                               ; preds = %79, %8
  %96 = load ptr, ptr %9, align 8, !tbaa !5
  %97 = load i8, ptr %10, align 1, !tbaa !9
  %98 = load i32, ptr %11, align 4, !tbaa !10
  %99 = load i32, ptr %12, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %96, i32 noundef 805639899, i8 noundef signext %97, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 96, i32 noundef 1, i32 noundef %98, i32 noundef %99)
  %100 = load ptr, ptr %9, align 8, !tbaa !5
  %101 = load i8, ptr %10, align 1, !tbaa !9
  %102 = load i32, ptr %12, align 4, !tbaa !10
  %103 = load i32, ptr %12, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %100, i32 noundef 611128946, i8 noundef signext %101, i32 noundef %102, i32 noundef %103, i32 noundef 24)
  %104 = load ptr, ptr %9, align 8, !tbaa !5
  %105 = load i8, ptr %10, align 1, !tbaa !9
  %106 = load i32, ptr %12, align 4, !tbaa !10
  %107 = load i32, ptr %13, align 4, !tbaa !10
  %108 = load i32, ptr %12, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %104, i32 noundef 805639915, i8 noundef signext %105, i32 noundef %106, i32 noundef %107, i32 noundef %108)
  ret void
}

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvthf8_to_f32_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #1 {
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %0, i32 noundef 537207841, i8 noundef signext %1, i32 noundef %2, i32 noundef %2) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef 1, i32 noundef %2, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639798, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef 1, i32 noundef %4, i32 noundef %6) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 104, i32 noundef 1, i32 noundef %2, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %0, i32 noundef 606934642, i8 noundef signext %1, i32 noundef %4, i32 noundef %4, i32 noundef 3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639798, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 72, i32 noundef 1, i32 noundef %4, i32 noundef %7) #2
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %7, i32 noundef %6, i32 noundef %6, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639934, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 104, i32 noundef 1, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %0, i32 noundef 611128946, i8 noundef signext %1, i32 noundef %4, i32 noundef %4, i32 noundef 23) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 88, i32 noundef 1, i32 noundef %2, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %0, i32 noundef 611128946, i8 noundef signext %1, i32 noundef %5, i32 noundef %5, i32 noundef 20) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %0, i32 noundef 805639915, i8 noundef signext %1, i32 noundef %4, i32 noundef %5, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 64, i32 noundef 1, i32 noundef %2, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %0, i32 noundef 805643830, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %5, i32 noundef %4, i32 noundef %6, i32 noundef 0, i32 noundef 0) #2
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp ult i32 %10, 1101
  br i1 %11, label %12, label %14

12:                                               ; preds = %8
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639782, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 88, i32 noundef 1, i32 noundef %5, i32 noundef %7) #2
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910207, i32 noundef %7, i32 noundef %6, i32 noundef %7, i32 noundef 0) #2
  %13 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 32, i8 noundef signext %1, i32 noundef %4, i32 noundef %7, i32 noundef 0, i32 noundef 0) #2
  br label %14

14:                                               ; preds = %12, %8
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 96, i32 noundef 1, i32 noundef %2, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 611128946, i8 noundef signext %1, i32 noundef %3, i32 noundef %3, i32 noundef 24) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639915, i8 noundef signext %1, i32 noundef %3, i32 noundef %4, i32 noundef %3) #2
  ret void
}

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass