; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_maskedload_8bit_avx2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2 {
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !9
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store i32 %4, ptr %13, align 4, !tbaa !9
  store i32 %5, ptr %14, align 4, !tbaa !9
  store i32 %6, ptr %15, align 4, !tbaa !9
  store i32 %7, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %19 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %19, ptr %18, align 4, !tbaa !9
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %20, i32 noundef 30008, i32 noundef 4, i64 noundef 32)
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  %22 = load i32, ptr %15, align 4, !tbaa !9
  %23 = load i32, ptr %15, align 4, !tbaa !9
  %24 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %21, i32 noundef 805639919, i8 noundef signext 121, i32 noundef %22, i32 noundef %23, i32 noundef %24)
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %26, i32 0, i32 6
  %28 = load i32, ptr %27, align 4, !tbaa !11
  %29 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %25, i32 noundef %28, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %29, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  %30 = load i32, ptr %18, align 4, !tbaa !9
  %31 = icmp uge i32 %30, 16
  br i1 %31, label %32, label %54

32:                                               ; preds = %8
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %34, i32 0, i32 6
  %36 = load i32, ptr %35, align 4, !tbaa !11
  %37 = load i32, ptr %11, align 4, !tbaa !9
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = load i32, ptr %13, align 4, !tbaa !9
  %40 = load i32, ptr %14, align 4, !tbaa !9
  %41 = load i32, ptr %17, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  %43 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %33, i32 noundef %36, i32 noundef 537138704, i32 noundef %37, i32 noundef %38, i32 noundef %39, i32 noundef %42, i8 noundef signext 120, i32 noundef %43, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = load ptr, ptr %9, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %45, i32 0, i32 6
  %47 = load i32, ptr %46, align 4, !tbaa !11
  %48 = load i32, ptr %17, align 4, !tbaa !9
  %49 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %44, i32 noundef %47, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %48, i8 noundef signext 120, i32 noundef %49, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  %50 = load i32, ptr %17, align 4, !tbaa !9
  %51 = add nsw i32 %50, 16
  store i32 %51, ptr %17, align 4, !tbaa !9
  %52 = load i32, ptr %18, align 4, !tbaa !9
  %53 = sub i32 %52, 16
  store i32 %53, ptr %18, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %32, %8
  %55 = load i32, ptr %18, align 4, !tbaa !9
  %56 = icmp uge i32 %55, 8
  br i1 %56, label %57, label %73

57:                                               ; preds = %54
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = load i32, ptr %12, align 4, !tbaa !9
  %61 = load i32, ptr %13, align 4, !tbaa !9
  %62 = load i32, ptr %14, align 4, !tbaa !9
  %63 = load i32, ptr %17, align 4, !tbaa !9
  %64 = add nsw i32 %62, %63
  %65 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %58, i32 noundef -1568407413, i32 noundef %59, i32 noundef %60, i32 noundef %61, i32 noundef %64, i32 noundef %65, i32 noundef 0)
  %66 = load ptr, ptr %9, align 8, !tbaa !5
  %67 = load i32, ptr %17, align 4, !tbaa !9
  %68 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %66, i32 noundef -1568407413, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %67, i32 noundef %68, i32 noundef 1)
  %69 = load i32, ptr %17, align 4, !tbaa !9
  %70 = add nsw i32 %69, 8
  store i32 %70, ptr %17, align 4, !tbaa !9
  %71 = load i32, ptr %18, align 4, !tbaa !9
  %72 = sub i32 %71, 8
  store i32 %72, ptr %18, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %57, %54
  %74 = load i32, ptr %18, align 4, !tbaa !9
  %75 = icmp uge i32 %74, 4
  br i1 %75, label %76, label %92

76:                                               ; preds = %73
  %77 = load ptr, ptr %9, align 8, !tbaa !5
  %78 = load i32, ptr %11, align 4, !tbaa !9
  %79 = load i32, ptr %12, align 4, !tbaa !9
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = load i32, ptr %14, align 4, !tbaa !9
  %82 = load i32, ptr %17, align 4, !tbaa !9
  %83 = add nsw i32 %81, %82
  %84 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %77, i32 noundef -1610350453, i32 noundef %78, i32 noundef %79, i32 noundef %80, i32 noundef %83, i32 noundef %84, i32 noundef 0)
  %85 = load ptr, ptr %9, align 8, !tbaa !5
  %86 = load i32, ptr %17, align 4, !tbaa !9
  %87 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %85, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %86, i32 noundef %87, i32 noundef 1)
  %88 = load i32, ptr %17, align 4, !tbaa !9
  %89 = add nsw i32 %88, 4
  store i32 %89, ptr %17, align 4, !tbaa !9
  %90 = load i32, ptr %18, align 4, !tbaa !9
  %91 = sub i32 %90, 4
  store i32 %91, ptr %18, align 4, !tbaa !9
  br label %92

92:                                               ; preds = %76, %73
  %93 = load i32, ptr %18, align 4, !tbaa !9
  %94 = icmp uge i32 %93, 2
  br i1 %94, label %95, label %111

95:                                               ; preds = %92
  %96 = load ptr, ptr %9, align 8, !tbaa !5
  %97 = load i32, ptr %11, align 4, !tbaa !9
  %98 = load i32, ptr %12, align 4, !tbaa !9
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = load i32, ptr %14, align 4, !tbaa !9
  %101 = load i32, ptr %17, align 4, !tbaa !9
  %102 = add nsw i32 %100, %101
  %103 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %96, i32 noundef -1610334069, i32 noundef %97, i32 noundef %98, i32 noundef %99, i32 noundef %102, i32 noundef %103, i32 noundef 0)
  %104 = load ptr, ptr %9, align 8, !tbaa !5
  %105 = load i32, ptr %17, align 4, !tbaa !9
  %106 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %104, i32 noundef -1610334069, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %105, i32 noundef %106, i32 noundef 1)
  %107 = load i32, ptr %17, align 4, !tbaa !9
  %108 = add nsw i32 %107, 2
  store i32 %108, ptr %17, align 4, !tbaa !9
  %109 = load i32, ptr %18, align 4, !tbaa !9
  %110 = sub i32 %109, 2
  store i32 %110, ptr %18, align 4, !tbaa !9
  br label %111

111:                                              ; preds = %95, %92
  %112 = load i32, ptr %18, align 4, !tbaa !9
  %113 = icmp eq i32 %112, 1
  br i1 %113, label %114, label %130

114:                                              ; preds = %111
  %115 = load ptr, ptr %9, align 8, !tbaa !5
  %116 = load i32, ptr %11, align 4, !tbaa !9
  %117 = load i32, ptr %12, align 4, !tbaa !9
  %118 = load i32, ptr %13, align 4, !tbaa !9
  %119 = load i32, ptr %14, align 4, !tbaa !9
  %120 = load i32, ptr %17, align 4, !tbaa !9
  %121 = add nsw i32 %119, %120
  %122 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %115, i32 noundef -1610350454, i32 noundef %116, i32 noundef %117, i32 noundef %118, i32 noundef %121, i32 noundef %122, i32 noundef 0)
  %123 = load ptr, ptr %9, align 8, !tbaa !5
  %124 = load i32, ptr %17, align 4, !tbaa !9
  %125 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %123, i32 noundef -1610350454, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %124, i32 noundef %125, i32 noundef 1)
  %126 = load i32, ptr %17, align 4, !tbaa !9
  %127 = add nsw i32 %126, 1
  store i32 %127, ptr %17, align 4, !tbaa !9
  %128 = load i32, ptr %18, align 4, !tbaa !9
  %129 = sub i32 %128, 1
  store i32 %129, ptr %18, align 4, !tbaa !9
  br label %130

130:                                              ; preds = %114, %111
  %131 = load ptr, ptr %9, align 8, !tbaa !5
  %132 = load ptr, ptr %9, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %132, i32 0, i32 6
  %134 = load i32, ptr %133, align 4, !tbaa !11
  %135 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %131, i32 noundef %134, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %135, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  %136 = load ptr, ptr %9, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %136, i32 noundef 30000, i32 noundef 4, i64 noundef 32)
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  ret void
}

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_maskedload_8bit_avx2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #1 {
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30008, i32 noundef 4, i64 noundef 32) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %0, i32 noundef 805639919, i8 noundef signext 121, i32 noundef %6, i32 noundef %6, i32 noundef %6) #2
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %0, i32 noundef %10, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %6, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %11 = icmp ugt i32 %7, 15
  br i1 %11, label %12, label %16

12:                                               ; preds = %8
  %13 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 537138704, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext 120, i32 noundef %6, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %14 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %14, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 120, i32 noundef %6, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %15 = add i32 %7, -16
  br label %16

16:                                               ; preds = %12, %8
  %.079 = phi i32 [ 16, %12 ], [ 0, %8 ]
  %.0 = phi i32 [ %15, %12 ], [ %7, %8 ]
  %17 = icmp ugt i32 %.0, 7
  br i1 %17, label %18, label %22

18:                                               ; preds = %16
  %19 = add nsw i32 %.079, %5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %19, i32 noundef %1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.079, i32 noundef %1, i32 noundef 1) #2
  %20 = or disjoint i32 %.079, 8
  %21 = add i32 %.0, -8
  br label %22

22:                                               ; preds = %18, %16
  %.180 = phi i32 [ %20, %18 ], [ %.079, %16 ]
  %.1 = phi i32 [ %21, %18 ], [ %.0, %16 ]
  %23 = icmp ugt i32 %.1, 3
  br i1 %23, label %24, label %28

24:                                               ; preds = %22
  %25 = add nsw i32 %.180, %5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350453, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %25, i32 noundef %1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.180, i32 noundef %1, i32 noundef 1) #2
  %26 = add nuw nsw i32 %.180, 4
  %27 = add i32 %.1, -4
  br label %28

28:                                               ; preds = %24, %22
  %.281 = phi i32 [ %26, %24 ], [ %.180, %22 ]
  %.2 = phi i32 [ %27, %24 ], [ %.1, %22 ]
  %29 = icmp ugt i32 %.2, 1
  br i1 %29, label %30, label %34

30:                                               ; preds = %28
  %31 = add nsw i32 %.281, %5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610334069, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %31, i32 noundef %1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610334069, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.281, i32 noundef %1, i32 noundef 1) #2
  %32 = add nuw nsw i32 %.281, 2
  %33 = add i32 %.2, -2
  br label %34

34:                                               ; preds = %30, %28
  %.382 = phi i32 [ %32, %30 ], [ %.281, %28 ]
  %.3 = phi i32 [ %33, %30 ], [ %.2, %28 ]
  %35 = icmp eq i32 %.3, 1
  br i1 %35, label %36, label %38

36:                                               ; preds = %34
  %37 = add nsw i32 %.382, %5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %37, i32 noundef %1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.382, i32 noundef %1, i32 noundef 1) #2
  br label %38

38:                                               ; preds = %36, %34
  %39 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %39, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %6, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef 30000, i32 noundef 4, i64 noundef 32) #2
  ret void
}

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass