; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src/tx_thread_system_suspend_5438d3e5 (suspend)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_current_ptr = external global ptr, align 8
@_tx_timer_time_slice = external global i64, align 8
@_tx_thread_preempt_disable = external global i32, align 4
@_tx_thread_priority_list = external global [32 x ptr], align 16
@_tx_thread_preempted_maps = external global [1 x i64], align 8
@_tx_thread_priority_maps = external global [1 x i64], align 8
@_tx_thread_highest_priority = external global i32, align 4
@_tx_thread_execute_ptr = external global ptr, align 8

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @_tx_thread_system_return_inline() #0

; Function Attrs: nounwind uwtable
define dso_local void @_tx_thread_system_suspend(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %14 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  store ptr %14, ptr %11, align 8, !tbaa !5
  %15 = call i32 @__disable_interrupts()
  store i32 %15, ptr %3, align 4, !tbaa !9
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = load ptr, ptr %11, align 8, !tbaa !5
  %18 = icmp eq ptr %16, %17
  br i1 %18, label %19, label %37

19:                                               ; preds = %1
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %20, i32 0, i32 19
  %22 = getelementptr inbounds %struct.TX_TIMER_INTERNAL_STRUCT, ptr %21, i32 0, i32 0
  %23 = load i64, ptr %22, align 8, !tbaa !11
  store i64 %23, ptr %12, align 8, !tbaa !15
  %24 = load i64, ptr %12, align 8, !tbaa !15
  %25 = icmp ne i64 %24, 0
  br i1 %25, label %26, label %33

26:                                               ; preds = %19
  %27 = load i64, ptr %12, align 8, !tbaa !15
  %28 = icmp ne i64 %27, 4294967295
  br i1 %28, label %29, label %32

29:                                               ; preds = %26
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %30, i32 0, i32 19
  call void @_tx_timer_system_activate(ptr noundef %31)
  br label %32

32:                                               ; preds = %29, %26
  br label %33

33:                                               ; preds = %32, %19
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %34, i32 0, i32 7
  %36 = load i64, ptr %35, align 8, !tbaa !16
  store i64 %36, ptr @_tx_timer_time_slice, align 8, !tbaa !15
  br label %37

37:                                               ; preds = %33, %1
  %38 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %39 = add i32 %38, -1
  store volatile i32 %39, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %40, i32 0, i32 14
  %42 = load i32, ptr %41, align 4, !tbaa !17
  %43 = icmp eq i32 %42, 1
  br i1 %43, label %44, label %189

44:                                               ; preds = %37
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %45, i32 0, i32 14
  store i32 0, ptr %46, align 4, !tbaa !17
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %47, i32 0, i32 11
  %49 = load i32, ptr %48, align 8, !tbaa !18
  store i32 %49, ptr %4, align 4, !tbaa !9
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %50, i32 0, i32 8
  %52 = load ptr, ptr %51, align 8, !tbaa !19
  store ptr %52, ptr %9, align 8, !tbaa !5
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = load ptr, ptr %2, align 8, !tbaa !5
  %55 = icmp ne ptr %53, %54
  br i1 %55, label %56, label %89

56:                                               ; preds = %44
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %57, i32 0, i32 9
  %59 = load ptr, ptr %58, align 8, !tbaa !20
  store ptr %59, ptr %10, align 8, !tbaa !5
  %60 = load ptr, ptr %10, align 8, !tbaa !5
  %61 = load ptr, ptr %9, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %61, i32 0, i32 9
  store ptr %60, ptr %62, align 8, !tbaa !20
  %63 = load ptr, ptr %9, align 8, !tbaa !5
  %64 = load ptr, ptr %10, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %64, i32 0, i32 8
  store ptr %63, ptr %65, align 8, !tbaa !19
  %66 = load i32, ptr %4, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  %68 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %67
  %69 = load ptr, ptr %68, align 8, !tbaa !5
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = icmp eq ptr %69, %70
  br i1 %71, label %72, label %88

72:                                               ; preds = %56
  %73 = load ptr, ptr %9, align 8, !tbaa !5
  %74 = load i32, ptr %4, align 4, !tbaa !9
  %75 = zext i32 %74 to i64
  %76 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %75
  store ptr %73, ptr %76, align 8, !tbaa !5
  %77 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %78 = icmp ne i64 %77, 0
  br i1 %78, label %79, label %87

79:                                               ; preds = %72
  %80 = load i32, ptr %4, align 4, !tbaa !9
  %81 = zext i32 %80 to i64
  %82 = shl i64 1, %81
  store i64 %82, ptr %7, align 8, !tbaa !15
  %83 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %84 = load i64, ptr %7, align 8, !tbaa !15
  %85 = xor i64 %84, -1
  %86 = and i64 %83, %85
  store i64 %86, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %87

87:                                               ; preds = %79, %72
  br label %88

88:                                               ; preds = %87, %56
  br label %132

89:                                               ; preds = %44
  %90 = load i32, ptr %4, align 4, !tbaa !9
  %91 = zext i32 %90 to i64
  %92 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %91
  store ptr null, ptr %92, align 8, !tbaa !5
  %93 = load i32, ptr %4, align 4, !tbaa !9
  %94 = zext i32 %93 to i64
  %95 = shl i64 1, %94
  store i64 %95, ptr %7, align 8, !tbaa !15
  %96 = load i64, ptr @_tx_thread_priority_maps, align 8, !tbaa !15
  %97 = load i64, ptr %7, align 8, !tbaa !15
  %98 = xor i64 %97, -1
  %99 = and i64 %96, %98
  store i64 %99, ptr @_tx_thread_priority_maps, align 8, !tbaa !15
  %100 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %101 = icmp ne i64 %100, 0
  br i1 %101, label %102, label %110

102:                                              ; preds = %89
  %103 = load i32, ptr %4, align 4, !tbaa !9
  %104 = zext i32 %103 to i64
  %105 = shl i64 1, %104
  store i64 %105, ptr %7, align 8, !tbaa !15
  %106 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %107 = load i64, ptr %7, align 8, !tbaa !15
  %108 = xor i64 %107, -1
  %109 = and i64 %106, %108
  store i64 %109, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %110

110:                                              ; preds = %102, %89
  store i32 0, ptr %5, align 4, !tbaa !9
  %111 = load i64, ptr @_tx_thread_priority_maps, align 8, !tbaa !15
  store i64 %111, ptr %6, align 8, !tbaa !15
  %112 = load i64, ptr %6, align 8, !tbaa !15
  %113 = icmp eq i64 %112, 0
  br i1 %113, label %114, label %122

114:                                              ; preds = %110
  store i32 32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  store ptr null, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %115 = load i32, ptr %3, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %115)
  %116 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %117 = zext i32 %116 to i64
  store i64 %117, ptr %8, align 8, !tbaa !15
  %118 = load i64, ptr %8, align 8, !tbaa !15
  %119 = icmp eq i64 %118, 0
  br i1 %119, label %120, label %121

120:                                              ; preds = %114
  call void @_tx_thread_system_return_inline()
  br label %121

121:                                              ; preds = %120, %114
  store i32 1, ptr %13, align 4
  br label %202

122:                                              ; preds = %110
  %123 = load i64, ptr %6, align 8, !tbaa !15
  %124 = call i64 asm sideeffect " RBIT $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %123) #4, !srcloc !21
  store i64 %124, ptr %6, align 8, !tbaa !15
  %125 = load i64, ptr %6, align 8, !tbaa !15
  %126 = call i64 asm sideeffect " CLZ  $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %125) #4, !srcloc !22
  store i64 %126, ptr %7, align 8, !tbaa !15
  %127 = load i32, ptr %5, align 4, !tbaa !9
  %128 = load i64, ptr %7, align 8, !tbaa !15
  %129 = trunc i64 %128 to i32
  %130 = add i32 %127, %129
  store i32 %130, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  br label %131

131:                                              ; preds = %122
  br label %132

132:                                              ; preds = %131, %88
  %133 = load ptr, ptr %2, align 8, !tbaa !5
  %134 = load ptr, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %135 = icmp eq ptr %133, %134
  br i1 %135, label %136, label %188

136:                                              ; preds = %132
  %137 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  %138 = zext i32 %137 to i64
  %139 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %138
  %140 = load ptr, ptr %139, align 8, !tbaa !5
  store ptr %140, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %141 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %142 = icmp ne i64 %141, 0
  br i1 %142, label %143, label %180

143:                                              ; preds = %136
  %144 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %145 = add i32 %144, 1
  store volatile i32 %145, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %146 = load i32, ptr %3, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %146)
  %147 = call i32 @__disable_interrupts()
  store i32 %147, ptr %3, align 4, !tbaa !9
  %148 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %149 = add i32 %148, -1
  store volatile i32 %149, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  store i32 0, ptr %5, align 4, !tbaa !9
  %150 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  store i64 %150, ptr %6, align 8, !tbaa !15
  %151 = load i64, ptr %6, align 8, !tbaa !15
  %152 = call i64 asm sideeffect " RBIT $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %151) #4, !srcloc !23
  store i64 %152, ptr %6, align 8, !tbaa !15
  %153 = load i64, ptr %6, align 8, !tbaa !15
  %154 = call i64 asm sideeffect " CLZ  $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %153) #4, !srcloc !24
  store i64 %154, ptr %7, align 8, !tbaa !15
  %155 = load i32, ptr %5, align 4, !tbaa !9
  %156 = load i64, ptr %7, align 8, !tbaa !15
  %157 = trunc i64 %156 to i32
  %158 = add i32 %155, %157
  store i32 %158, ptr %4, align 4, !tbaa !9
  %159 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  %160 = load i32, ptr %4, align 4, !tbaa !9
  %161 = zext i32 %160 to i64
  %162 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %161
  %163 = load ptr, ptr %162, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %163, i32 0, i32 15
  %165 = load i32, ptr %164, align 8, !tbaa !25
  %166 = icmp uge i32 %159, %165
  br i1 %166, label %167, label %179

167:                                              ; preds = %143
  %168 = load i32, ptr %4, align 4, !tbaa !9
  %169 = zext i32 %168 to i64
  %170 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %169
  %171 = load ptr, ptr %170, align 8, !tbaa !5
  store ptr %171, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %172 = load i32, ptr %4, align 4, !tbaa !9
  %173 = zext i32 %172 to i64
  %174 = shl i64 1, %173
  store i64 %174, ptr %7, align 8, !tbaa !15
  %175 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %176 = load i64, ptr %7, align 8, !tbaa !15
  %177 = xor i64 %176, -1
  %178 = and i64 %175, %177
  store i64 %178, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %179

179:                                              ; preds = %167, %143
  br label %180

180:                                              ; preds = %179, %136
  %181 = load i32, ptr %3, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %181)
  %182 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %183 = zext i32 %182 to i64
  store i64 %183, ptr %8, align 8, !tbaa !15
  %184 = load i64, ptr %8, align 8, !tbaa !15
  %185 = icmp eq i64 %184, 0
  br i1 %185, label %186, label %187

186:                                              ; preds = %180
  call void @_tx_thread_system_return_inline()
  br label %187

187:                                              ; preds = %186, %180
  store i32 1, ptr %13, align 4
  br label %202

188:                                              ; preds = %132
  br label %189

189:                                              ; preds = %188, %37
  %190 = load i32, ptr %3, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %190)
  %191 = load ptr, ptr %11, align 8, !tbaa !5
  %192 = load ptr, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %193 = icmp ne ptr %191, %192
  br i1 %193, label %194, label %201

194:                                              ; preds = %189
  %195 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %196 = zext i32 %195 to i64
  store i64 %196, ptr %8, align 8, !tbaa !15
  %197 = load i64, ptr %8, align 8, !tbaa !15
  %198 = icmp eq i64 %197, 0
  br i1 %198, label %199, label %200

199:                                              ; preds = %194
  call void @_tx_thread_system_return_inline()
  br label %200

200:                                              ; preds = %199, %194
  br label %201

201:                                              ; preds = %200, %189
  store i32 1, ptr %13, align 4
  br label %202

202:                                              ; preds = %201, %187, %121
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() #0

declare void @_tx_timer_system_activate(ptr noundef) #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 136}
!12 = !{!"TX_THREAD_STRUCT", !13, i64 0, !13, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !6, i64 112, !6, i64 120, !13, i64 128, !14, i64 136, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !13, i64 224, !6, i64 232, !10, i64 240, !10, i64 244, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !6, i64 296, !6, i64 304, !6, i64 312, !13, i64 320}
!13 = !{!"long", !7, i64 0}
!14 = !{!"TX_TIMER_INTERNAL_STRUCT", !13, i64 0, !13, i64 8, !6, i64 16, !13, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !13, i64 56}
!17 = !{!12, !10, i64 100}
!18 = !{!12, !10, i64 88}
!19 = !{!12, !6, i64 64}
!20 = !{!12, !6, i64 72}
!21 = !{i64 2148034447}
!22 = !{i64 2148034553}
!23 = !{i64 2148034754}
!24 = !{i64 2148034860}
!25 = !{!12, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_tx_thread_current_ptr = external local_unnamed_addr global ptr, align 8
@_tx_timer_time_slice = external local_unnamed_addr global i64, align 8
@_tx_thread_preempt_disable = external global i32, align 4
@_tx_thread_priority_list = external local_unnamed_addr global [32 x ptr], align 16
@_tx_thread_preempted_maps = external local_unnamed_addr global [1 x i64], align 8
@_tx_thread_priority_maps = external local_unnamed_addr global [1 x i64], align 8
@_tx_thread_highest_priority = external local_unnamed_addr global i32, align 4
@_tx_thread_execute_ptr = external local_unnamed_addr global ptr, align 8

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @_tx_thread_system_return_inline() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @_tx_thread_system_suspend(ptr noundef %0) local_unnamed_addr #1 {
  %2 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  %3 = tail call i32 @__disable_interrupts()
  %4 = icmp eq ptr %2, %0
  br i1 %4, label %5, label %12

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 136
  %7 = load i64, ptr %6, align 8, !tbaa !9
  switch i64 %7, label %8 [
    i64 4294967295, label %9
    i64 0, label %9
  ]

8:                                                ; preds = %5
  tail call void @_tx_timer_system_activate(ptr noundef nonnull %6) #3
  br label %9

9:                                                ; preds = %5, %5, %8
  %10 = getelementptr inbounds i8, ptr %0, i64 56
  %11 = load i64, ptr %10, align 8, !tbaa !14
  store i64 %11, ptr @_tx_timer_time_slice, align 8, !tbaa !15
  br label %12

12:                                               ; preds = %9, %1
  %13 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %14 = add i32 %13, -1
  store volatile i32 %14, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %15 = getelementptr inbounds i8, ptr %0, i64 100
  %16 = load i32, ptr %15, align 4, !tbaa !17
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %89

18:                                               ; preds = %12
  store i32 0, ptr %15, align 4, !tbaa !17
  %19 = getelementptr inbounds i8, ptr %0, i64 88
  %20 = load i32, ptr %19, align 8, !tbaa !18
  %21 = getelementptr inbounds i8, ptr %0, i64 64
  %22 = load ptr, ptr %21, align 8, !tbaa !19
  %.not = icmp eq ptr %22, %0
  br i1 %.not, label %38, label %23

23:                                               ; preds = %18
  %24 = getelementptr inbounds i8, ptr %0, i64 72
  %25 = load ptr, ptr %24, align 8, !tbaa !20
  %26 = getelementptr inbounds i8, ptr %22, i64 72
  store ptr %25, ptr %26, align 8, !tbaa !20
  %27 = getelementptr inbounds i8, ptr %25, i64 64
  store ptr %22, ptr %27, align 8, !tbaa !19
  %28 = zext i32 %20 to i64
  %29 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %28
  %30 = load ptr, ptr %29, align 8, !tbaa !5
  %31 = icmp eq ptr %30, %0
  br i1 %31, label %32, label %57

32:                                               ; preds = %23
  store ptr %22, ptr %29, align 8, !tbaa !5
  %33 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %.not57 = icmp eq i64 %33, 0
  br i1 %.not57, label %57, label %34

34:                                               ; preds = %32
  %35 = shl nuw i64 1, %28
  %36 = xor i64 %35, -1
  %37 = and i64 %33, %36
  store i64 %37, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %57

38:                                               ; preds = %18
  %39 = zext i32 %20 to i64
  %40 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %39
  store ptr null, ptr %40, align 8, !tbaa !5
  %41 = shl nuw i64 1, %39
  %42 = load i64, ptr @_tx_thread_priority_maps, align 8, !tbaa !15
  %43 = xor i64 %41, -1
  %44 = and i64 %42, %43
  store i64 %44, ptr @_tx_thread_priority_maps, align 8, !tbaa !15
  %45 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %.not56 = icmp eq i64 %45, 0
  br i1 %.not56, label %48, label %46

46:                                               ; preds = %38
  %47 = and i64 %45, %43
  store i64 %47, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %48

48:                                               ; preds = %46, %38
  %49 = icmp eq i64 %44, 0
  br i1 %49, label %50, label %53

50:                                               ; preds = %48
  store i32 32, ptr @_tx_thread_highest_priority, align 4, !tbaa !16
  store ptr null, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  tail call void @__restore_interrupt(i32 noundef %3)
  %51 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %52 = icmp eq i32 %51, 0
  br i1 %52, label %.sink.split, label %94

53:                                               ; preds = %48
  %54 = tail call i64 asm sideeffect " RBIT $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %44) #3, !srcloc !21
  %55 = tail call i64 asm sideeffect " CLZ  $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %54) #3, !srcloc !22
  %56 = trunc i64 %55 to i32
  store i32 %56, ptr @_tx_thread_highest_priority, align 4, !tbaa !16
  br label %57

57:                                               ; preds = %23, %34, %32, %53
  %58 = load ptr, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %59 = icmp eq ptr %58, %0
  br i1 %59, label %60, label %89

60:                                               ; preds = %57
  %61 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !16
  %62 = zext i32 %61 to i64
  %63 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %62
  %64 = load ptr, ptr %63, align 8, !tbaa !5
  store ptr %64, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %65 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %.not59 = icmp eq i64 %65, 0
  br i1 %.not59, label %86, label %66

66:                                               ; preds = %60
  %67 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %68 = add i32 %67, 1
  store volatile i32 %68, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  tail call void @__restore_interrupt(i32 noundef %3)
  %69 = tail call i32 @__disable_interrupts()
  %70 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %71 = add i32 %70, -1
  store volatile i32 %71, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %72 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %73 = tail call i64 asm sideeffect " RBIT $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %72) #3, !srcloc !23
  %74 = tail call i64 asm sideeffect " CLZ  $0,$1 ", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %73) #3, !srcloc !24
  %75 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !16
  %76 = and i64 %74, 4294967295
  %77 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %76
  %78 = load ptr, ptr %77, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 104
  %80 = load i32, ptr %79, align 8, !tbaa !25
  %.not60 = icmp ult i32 %75, %80
  br i1 %.not60, label %86, label %81

81:                                               ; preds = %66
  store ptr %78, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %82 = shl nuw i64 1, %76
  %83 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %84 = xor i64 %82, -1
  %85 = and i64 %83, %84
  store i64 %85, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %86

86:                                               ; preds = %66, %81, %60
  %.0 = phi i32 [ %69, %81 ], [ %69, %66 ], [ %3, %60 ]
  tail call void @__restore_interrupt(i32 noundef %.0)
  %87 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %88 = icmp eq i32 %87, 0
  br i1 %88, label %.sink.split, label %94

89:                                               ; preds = %57, %12
  tail call void @__restore_interrupt(i32 noundef %3)
  %90 = load ptr, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %.not58 = icmp eq ptr %2, %90
  br i1 %.not58, label %94, label %91

91:                                               ; preds = %89
  %92 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !16
  %93 = icmp eq i32 %92, 0
  br i1 %93, label %.sink.split, label %94

.sink.split:                                      ; preds = %91, %86, %50
  tail call void @_tx_thread_system_return_inline()
  br label %94

94:                                               ; preds = %.sink.split, %89, %91, %86, %50
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() local_unnamed_addr #0

declare void @_tx_timer_system_activate(ptr noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) local_unnamed_addr #0

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 136}
!10 = !{!"TX_THREAD_STRUCT", !11, i64 0, !11, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !6, i64 112, !6, i64 120, !11, i64 128, !13, i64 136, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !11, i64 224, !6, i64 232, !12, i64 240, !12, i64 244, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !12, i64 280, !12, i64 284, !12, i64 288, !12, i64 292, !6, i64 296, !6, i64 304, !6, i64 312, !11, i64 320}
!11 = !{!"long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"TX_TIMER_INTERNAL_STRUCT", !11, i64 0, !11, i64 8, !6, i64 16, !11, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!14 = !{!10, !11, i64 56}
!15 = !{!11, !11, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!10, !12, i64 100}
!18 = !{!10, !12, i64 88}
!19 = !{!10, !6, i64 64}
!20 = !{!10, !6, i64 72}
!21 = !{i64 2148034447}
!22 = !{i64 2148034553}
!23 = !{i64 2148034754}
!24 = !{i64 2148034860}
!25 = !{!10, !12, i64 104}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass