; LLVM IR from specinfo-ua/UAPKI :: library/uapkic/src (ec-cache)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@default_opt_level = external dso_local global i32, align 4
@.str = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @stacktrace_create(ptr noundef, i64 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @ec_cache_set_default_opt_level(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = lshr i32 %8, 12
  %10 = and i32 %9, 15
  store i32 %10, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = lshr i32 %11, 8
  %13 = and i32 %12, 15
  store i32 %13, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = lshr i32 %14, 4
  %16 = and i32 %15, 15
  store i32 %16, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = and i32 %17, 15
  store i32 %18, ptr %7, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %1
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %27, label %22

22:                                               ; preds = %19
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %27, label %25

25:                                               ; preds = %22
  store i32 2, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr %3, align 4, !tbaa !5
  call void @stacktrace_create(ptr noundef @.str, i64 noundef 459, i32 noundef %26, ptr noundef null)
  br label %66

27:                                               ; preds = %22, %19
  br label %28

28:                                               ; preds = %27
  br label %29

29:                                               ; preds = %28
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %39, label %33

33:                                               ; preds = %30
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = and i32 %34, 1
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %39, label %37

37:                                               ; preds = %33
  store i32 2, ptr %3, align 4, !tbaa !5
  %38 = load i32, ptr %3, align 4, !tbaa !5
  call void @stacktrace_create(ptr noundef @.str, i64 noundef 460, i32 noundef %38, ptr noundef null)
  br label %66

39:                                               ; preds = %33, %30
  br label %40

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = icmp eq i32 %43, 0
  br i1 %44, label %50, label %45

45:                                               ; preds = %42
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %50, label %48

48:                                               ; preds = %45
  store i32 2, ptr %3, align 4, !tbaa !5
  %49 = load i32, ptr %3, align 4, !tbaa !5
  call void @stacktrace_create(ptr noundef @.str, i64 noundef 461, i32 noundef %49, ptr noundef null)
  br label %66

50:                                               ; preds = %45, %42
  br label %51

51:                                               ; preds = %50
  br label %52

52:                                               ; preds = %51
  br label %53

53:                                               ; preds = %52
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %62, label %56

56:                                               ; preds = %53
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = and i32 %57, 1
  %59 = icmp eq i32 %58, 1
  br i1 %59, label %62, label %60

60:                                               ; preds = %56
  store i32 2, ptr %3, align 4, !tbaa !5
  %61 = load i32, ptr %3, align 4, !tbaa !5
  call void @stacktrace_create(ptr noundef @.str, i64 noundef 462, i32 noundef %61, ptr noundef null)
  br label %66

62:                                               ; preds = %56, %53
  br label %63

63:                                               ; preds = %62
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %2, align 4, !tbaa !5
  store i32 %65, ptr @default_opt_level, align 4, !tbaa !5
  br label %66

66:                                               ; preds = %64, %60, %48, %37, %25
  %67 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %67
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@default_opt_level = external dso_local local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [18 x i8], align 1

declare void @stacktrace_create(ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @ec_cache_set_default_opt_level(i32 noundef %0) local_unnamed_addr #1 {
  %2 = and i32 %0, 15
  %3 = and i32 %0, 61440
  %4 = icmp eq i32 %3, 0
  %5 = and i32 %0, 3840
  %6 = icmp eq i32 %5, 0
  %or.cond = or i1 %4, %6
  br i1 %or.cond, label %8, label %7

7:                                                ; preds = %1
  tail call void @stacktrace_create(ptr noundef nonnull @.str, i64 noundef 459, i32 noundef 2, ptr noundef null) #2
  br label %20

8:                                                ; preds = %1
  %9 = and i32 %0, 256
  %.not = icmp ne i32 %9, 0
  %or.cond25.not = or i1 %.not, %6
  br i1 %or.cond25.not, label %11, label %10

10:                                               ; preds = %8
  tail call void @stacktrace_create(ptr noundef nonnull @.str, i64 noundef 460, i32 noundef 2, ptr noundef null) #2
  br label %20

11:                                               ; preds = %8
  %12 = and i32 %0, 240
  %13 = icmp eq i32 %12, 0
  %14 = icmp eq i32 %2, 0
  %or.cond3 = or i1 %13, %14
  br i1 %or.cond3, label %16, label %15

15:                                               ; preds = %11
  tail call void @stacktrace_create(ptr noundef nonnull @.str, i64 noundef 461, i32 noundef 2, ptr noundef null) #2
  br label %20

16:                                               ; preds = %11
  %17 = and i32 %0, 1
  %.not23 = icmp ne i32 %17, 0
  %or.cond27.not = or i1 %.not23, %14
  br i1 %or.cond27.not, label %19, label %18

18:                                               ; preds = %16
  tail call void @stacktrace_create(ptr noundef nonnull @.str, i64 noundef 462, i32 noundef 2, ptr noundef null) #2
  br label %20

19:                                               ; preds = %16
  store i32 %0, ptr @default_opt_level, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %19, %18, %15, %10, %7
  %.0 = phi i32 [ 0, %19 ], [ 2, %18 ], [ 2, %15 ], [ 2, %10 ], [ 2, %7 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass