; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src (txe_byte_allocate)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }
%struct.TX_BYTE_POOL_STRUCT = type { i64, ptr, i64, i32, ptr, ptr, ptr, i64, ptr, ptr, i32, ptr, ptr }

@_tx_thread_system_state = external global i64, align 8
@_tx_thread_current_ptr = external global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_byte_allocate(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !9
  store i64 %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store i32 0, ptr %9, align 4, !tbaa !11
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %4
  store i32 2, ptr %9, align 4, !tbaa !11
  br label %51

14:                                               ; preds = %4
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.TX_BYTE_POOL_STRUCT, ptr %15, i32 0, i32 0
  %17 = load i64, ptr %16, align 8, !tbaa !13
  %18 = icmp ne i64 %17, 1113150533
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  store i32 2, ptr %9, align 4, !tbaa !11
  br label %50

20:                                               ; preds = %14
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = icmp eq ptr %21, null
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i32 3, ptr %9, align 4, !tbaa !11
  br label %49

24:                                               ; preds = %20
  %25 = load i64, ptr %7, align 8, !tbaa !9
  %26 = icmp eq i64 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  store i32 5, ptr %9, align 4, !tbaa !11
  br label %48

28:                                               ; preds = %24
  %29 = load i64, ptr %7, align 8, !tbaa !9
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.TX_BYTE_POOL_STRUCT, ptr %30, i32 0, i32 7
  %32 = load i64, ptr %31, align 8, !tbaa !15
  %33 = icmp ugt i64 %29, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %28
  store i32 5, ptr %9, align 4, !tbaa !11
  br label %47

35:                                               ; preds = %28
  %36 = load i64, ptr %8, align 8, !tbaa !9
  %37 = icmp ne i64 %36, 0
  br i1 %37, label %38, label %46

38:                                               ; preds = %35
  %39 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %40 = call i32 @_tx_ipsr_get()
  %41 = zext i32 %40 to i64
  %42 = or i64 %39, %41
  %43 = icmp ne i64 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %38
  store i32 4, ptr %9, align 4, !tbaa !11
  br label %45

45:                                               ; preds = %44, %38
  br label %46

46:                                               ; preds = %45, %35
  br label %47

47:                                               ; preds = %46, %34
  br label %48

48:                                               ; preds = %47, %27
  br label %49

49:                                               ; preds = %48, %23
  br label %50

50:                                               ; preds = %49, %19
  br label %51

51:                                               ; preds = %50, %13
  %52 = load i32, ptr %9, align 4, !tbaa !11
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %60

54:                                               ; preds = %51
  %55 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  store ptr %55, ptr %10, align 8, !tbaa !5
  %56 = load ptr, ptr %10, align 8, !tbaa !5
  %57 = icmp eq ptr %56, @_tx_timer_thread
  br i1 %57, label %58, label %59

58:                                               ; preds = %54
  store i32 19, ptr %9, align 4, !tbaa !11
  br label %59

59:                                               ; preds = %58, %54
  br label %60

60:                                               ; preds = %59, %51
  %61 = load i32, ptr %9, align 4, !tbaa !11
  %62 = icmp eq i32 %61, 0
  br i1 %62, label %63, label %78

63:                                               ; preds = %60
  %64 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %65 = call i32 @_tx_ipsr_get()
  %66 = zext i32 %65 to i64
  %67 = or i64 %64, %66
  %68 = icmp ne i64 %67, 0
  br i1 %68, label %69, label %77

69:                                               ; preds = %63
  %70 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %71 = call i32 @_tx_ipsr_get()
  %72 = zext i32 %71 to i64
  %73 = or i64 %70, %72
  %74 = icmp ult i64 %73, 4042322160
  br i1 %74, label %75, label %76

75:                                               ; preds = %69
  store i32 19, ptr %9, align 4, !tbaa !11
  br label %76

76:                                               ; preds = %75, %69
  br label %77

77:                                               ; preds = %76, %63
  br label %78

78:                                               ; preds = %77, %60
  %79 = load i32, ptr %9, align 4, !tbaa !11
  %80 = icmp eq i32 %79, 0
  br i1 %80, label %81, label %87

81:                                               ; preds = %78
  %82 = load ptr, ptr %5, align 8, !tbaa !5
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = load i64, ptr %7, align 8, !tbaa !9
  %85 = load i64, ptr %8, align 8, !tbaa !9
  %86 = call i32 @_tx_byte_allocate(ptr noundef %82, ptr noundef %83, i64 noundef %84, i64 noundef %85)
  store i32 %86, ptr %9, align 4, !tbaa !11
  br label %87

87:                                               ; preds = %81, %78
  %88 = load i32, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %88
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() #2

declare i32 @_tx_byte_allocate(ptr noundef, ptr noundef, i64 noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TX_BYTE_POOL_STRUCT", !10, i64 0, !6, i64 8, !10, i64 16, !12, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !6, i64 64, !6, i64 72, !12, i64 80, !6, i64 88, !6, i64 96}
!15 = !{!14, !10, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_system_state = external global i64, align 8
@_tx_thread_current_ptr = external local_unnamed_addr global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_byte_allocate(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
  %5 = icmp eq ptr %0, null
  br i1 %5, label %.thread36, label %6

6:                                                ; preds = %4
  %7 = load i64, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i64 %7, 1113150533
  br i1 %.not, label %8, label %.thread36

8:                                                ; preds = %6
  %9 = icmp eq ptr %1, null
  br i1 %9, label %.thread36, label %10

10:                                               ; preds = %8
  %11 = icmp eq i64 %2, 0
  br i1 %11, label %.thread36, label %12

12:                                               ; preds = %10
  %13 = getelementptr inbounds i8, ptr %0, i64 56
  %14 = load i64, ptr %13, align 8, !tbaa !12
  %15 = icmp ult i64 %14, %2
  br i1 %15, label %.thread36, label %16

16:                                               ; preds = %12
  %.not17 = icmp eq i64 %3, 0
  br i1 %.not17, label %.thread26, label %19

.thread26:                                        ; preds = %16
  %17 = load ptr, ptr @_tx_thread_current_ptr, align 8
  %18 = icmp eq ptr %17, @_tx_timer_thread
  br i1 %18, label %.thread36, label %.thread33

19:                                               ; preds = %16
  %20 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !13
  %21 = tail call i32 @_tx_ipsr_get()
  %22 = zext i32 %21 to i64
  %23 = or i64 %20, %22
  %.fr = freeze i64 %23
  %.not18 = icmp eq i64 %.fr, 0
  %24 = load ptr, ptr @_tx_thread_current_ptr, align 8
  %25 = icmp eq ptr %24, @_tx_timer_thread
  %spec.select21 = select i1 %25, i32 19, i32 0
  %spec.select = select i1 %.not18, i32 %spec.select21, i32 4
  %26 = icmp eq i32 %spec.select, 0
  br i1 %26, label %.thread33, label %.thread36

.thread33:                                        ; preds = %.thread26, %19
  %27 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !13
  %28 = tail call i32 @_tx_ipsr_get()
  %29 = zext i32 %28 to i64
  %30 = or i64 %27, %29
  %.not19 = icmp eq i64 %30, 0
  br i1 %.not19, label %37, label %31

31:                                               ; preds = %.thread33
  %32 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !13
  %33 = tail call i32 @_tx_ipsr_get()
  %34 = zext i32 %33 to i64
  %35 = or i64 %32, %34
  %36 = icmp ult i64 %35, 4042322160
  br i1 %36, label %.thread36, label %37

37:                                               ; preds = %.thread33, %31
  %38 = tail call i32 @_tx_byte_allocate(ptr noundef nonnull %0, ptr noundef nonnull %1, i64 noundef %2, i64 noundef %3) #3
  br label %.thread36

.thread36:                                        ; preds = %31, %.thread26, %12, %10, %8, %6, %4, %19, %37
  %.3 = phi i32 [ %38, %37 ], [ %spec.select, %19 ], [ 5, %12 ], [ 5, %10 ], [ 3, %8 ], [ 2, %6 ], [ 2, %4 ], [ 19, %.thread26 ], [ 19, %31 ]
  ret i32 %.3
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() local_unnamed_addr #1

declare i32 @_tx_byte_allocate(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TX_BYTE_POOL_STRUCT", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !7, i64 56, !10, i64 64, !10, i64 72, !11, i64 80, !10, i64 88, !10, i64 96}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 56}
!13 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass