; LLVM IR from kazunetakahashi/atcoder :: 2019/0817_AGC037/C.ll (Z6updatei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::queue" = type { %"class.std::deque" }
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl" }
%"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl" = type { %"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl_data" }
%"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl_data" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }

@ans = external dso_local global i64, align 8
@N = external dso_local global i64, align 8
@A = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8
@B_sum = external dso_local global i64, align 8
@Q = external dso_local global %"class.std::queue", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z2Nov() #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updatei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = load i64, ptr @N, align 8, !tbaa !9
  %12 = add nsw i64 %10, %11
  %13 = sub nsw i64 %12, 1
  %14 = load i64, ptr @N, align 8, !tbaa !9
  %15 = srem i64 %13, %14
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  %19 = sext i32 %18 to i64
  %20 = load i64, ptr @N, align 8, !tbaa !9
  %21 = srem i64 %19, %20
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %24) #3
  %26 = load i64, ptr %25, align 8, !tbaa !9
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %28) #3
  %30 = load i64, ptr %29, align 8, !tbaa !9
  %31 = add nsw i64 %26, %30
  store i64 %31, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %33) #3
  %35 = load i64, ptr %34, align 8, !tbaa !9
  %36 = load i64, ptr %5, align 8, !tbaa !9
  %37 = sdiv i64 %35, %36
  store i64 %37, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %39) #3
  %41 = load i64, ptr %40, align 8, !tbaa !9
  %42 = load i64, ptr %5, align 8, !tbaa !9
  %43 = srem i64 %41, %42
  store i64 %43, ptr %7, align 8, !tbaa !9
  %44 = load i64, ptr %6, align 8, !tbaa !9
  %45 = icmp eq i64 %44, 0
  br i1 %45, label %46, label %47

46:                                               ; preds = %1
  store i32 1, ptr %8, align 4
  br label %106

47:                                               ; preds = %1
  %48 = load i64, ptr %7, align 8, !tbaa !9
  %49 = load i32, ptr %2, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %50) #3
  %52 = load i64, ptr %51, align 8, !tbaa !9
  %53 = icmp sge i64 %48, %52
  br i1 %53, label %54, label %67

54:                                               ; preds = %47
  %55 = load i64, ptr %7, align 8, !tbaa !9
  %56 = load i32, ptr %2, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %57) #3
  store i64 %55, ptr %58, align 8, !tbaa !9
  %59 = load i64, ptr %6, align 8, !tbaa !9
  %60 = load i64, ptr @ans, align 8, !tbaa !9
  %61 = add nsw i64 %60, %59
  store i64 %61, ptr @ans, align 8, !tbaa !9
  %62 = load i64, ptr %5, align 8, !tbaa !9
  %63 = load i64, ptr %6, align 8, !tbaa !9
  %64 = mul nsw i64 %62, %63
  %65 = load i64, ptr @B_sum, align 8, !tbaa !9
  %66 = sub nsw i64 %65, %64
  store i64 %66, ptr @B_sum, align 8, !tbaa !9
  call void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80) @Q, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80) @Q, ptr noundef nonnull align 4 dereferenceable(4) %4)
  br label %105

67:                                               ; preds = %47
  %68 = load i32, ptr %2, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %69) #3
  %71 = load i64, ptr %70, align 8, !tbaa !9
  %72 = load i64, ptr %7, align 8, !tbaa !9
  %73 = sub nsw i64 %71, %72
  %74 = load i64, ptr %5, align 8, !tbaa !9
  %75 = srem i64 %73, %74
  %76 = icmp eq i64 %75, 0
  br i1 %76, label %77, label %103

77:                                               ; preds = %67
  %78 = load i32, ptr %2, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %79) #3
  %81 = load i64, ptr %80, align 8, !tbaa !9
  %82 = load i32, ptr %2, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %83) #3
  store i64 %81, ptr %84, align 8, !tbaa !9
  %85 = load i32, ptr %2, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %86) #3
  %88 = load i64, ptr %87, align 8, !tbaa !9
  %89 = load i64, ptr %7, align 8, !tbaa !9
  %90 = sub nsw i64 %88, %89
  %91 = load i64, ptr %5, align 8, !tbaa !9
  %92 = sdiv i64 %90, %91
  %93 = load i64, ptr %6, align 8, !tbaa !9
  %94 = sub nsw i64 %93, %92
  store i64 %94, ptr %6, align 8, !tbaa !9
  %95 = load i64, ptr %6, align 8, !tbaa !9
  %96 = load i64, ptr @ans, align 8, !tbaa !9
  %97 = add nsw i64 %96, %95
  store i64 %97, ptr @ans, align 8, !tbaa !9
  %98 = load i64, ptr %5, align 8, !tbaa !9
  %99 = load i64, ptr %6, align 8, !tbaa !9
  %100 = mul nsw i64 %98, %99
  %101 = load i64, ptr @B_sum, align 8, !tbaa !9
  %102 = sub nsw i64 %101, %100
  store i64 %102, ptr @B_sum, align 8, !tbaa !9
  br label %104

103:                                              ; preds = %67
  call void @_Z2Nov()
  br label %104

104:                                              ; preds = %103, %77
  br label %105

105:                                              ; preds = %104, %54
  store i32 0, ptr %8, align 4
  br label %106

106:                                              ; preds = %105, %46
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  %107 = load i32, ptr %8, align 4
  switch i32 %107, label %109 [
    i32 0, label %108
    i32 1, label %108
  ]

108:                                              ; preds = %106, %106
  ret void

109:                                              ; preds = %106
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::queue" = type { %"class.std::deque" }
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl" }
%"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl" = type { %"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl_data" }
%"struct.std::_Deque_base<int, std::allocator<int>>::_Deque_impl_data" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }

@ans = external dso_local local_unnamed_addr global i64, align 8
@N = external dso_local local_unnamed_addr global i64, align 8
@A = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8
@B_sum = external dso_local local_unnamed_addr global i64, align 8
@Q = external dso_local global %"class.std::queue", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z2Nov() local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updatei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  %4 = sext i32 %0 to i64
  %5 = load i64, ptr @N, align 8, !tbaa !5
  %6 = add nsw i64 %4, -1
  %7 = add i64 %6, %5
  %8 = srem i64 %7, %5
  %9 = trunc i64 %8 to i32
  store i32 %9, ptr %2, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %10 = add nsw i32 %0, 1
  %11 = sext i32 %10 to i64
  %12 = srem i64 %11, %5
  %13 = trunc nsw i64 %12 to i32
  store i32 %13, ptr %3, align 4, !tbaa !9
  %sext = shl i64 %8, 32
  %14 = ashr exact i64 %sext, 32
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %14) #3
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %12) #3
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = add nsw i64 %18, %16
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %4) #3
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = sdiv i64 %21, %19
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %4) #3
  %24 = load i64, ptr %23, align 8, !tbaa !5
  %25 = srem i64 %24, %19
  %26 = icmp eq i64 %22, 0
  br i1 %26, label %58, label %27

27:                                               ; preds = %1
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %4) #3
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %.not = icmp slt i64 %25, %29
  br i1 %.not, label %37, label %30

30:                                               ; preds = %27
  %31 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %4) #3
  store i64 %25, ptr %31, align 8, !tbaa !5
  %32 = load i64, ptr @ans, align 8, !tbaa !5
  %33 = add nsw i64 %32, %22
  store i64 %33, ptr @ans, align 8, !tbaa !5
  %34 = mul nsw i64 %22, %19
  %35 = load i64, ptr @B_sum, align 8, !tbaa !5
  %36 = sub nsw i64 %35, %34
  store i64 %36, ptr @B_sum, align 8, !tbaa !5
  call void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80) @Q, ptr noundef nonnull align 4 dereferenceable(4) %2)
  call void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80) @Q, ptr noundef nonnull align 4 dereferenceable(4) %3)
  br label %58

37:                                               ; preds = %27
  %38 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %4) #3
  %39 = load i64, ptr %38, align 8, !tbaa !5
  %40 = sub nsw i64 %39, %25
  %41 = srem i64 %40, %19
  %42 = icmp eq i64 %41, 0
  br i1 %42, label %43, label %57

43:                                               ; preds = %37
  %44 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %4) #3
  %45 = load i64, ptr %44, align 8, !tbaa !5
  %46 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %4) #3
  store i64 %45, ptr %46, align 8, !tbaa !5
  %47 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %4) #3
  %48 = load i64, ptr %47, align 8, !tbaa !5
  %49 = sub nsw i64 %48, %25
  %50 = sdiv i64 %49, %19
  %51 = sub nsw i64 %22, %50
  %52 = load i64, ptr @ans, align 8, !tbaa !5
  %53 = add nsw i64 %52, %51
  store i64 %53, ptr @ans, align 8, !tbaa !5
  %54 = mul nsw i64 %51, %19
  %55 = load i64, ptr @B_sum, align 8, !tbaa !5
  %56 = sub nsw i64 %55, %54
  store i64 %56, ptr @B_sum, align 8, !tbaa !5
  br label %58

57:                                               ; preds = %37
  tail call void @_Z2Nov()
  br label %58

58:                                               ; preds = %30, %57, %43, %1
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt5queueIiSt5dequeIiSaIiEEE4pushERKi(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass