; LLVM IR from ANL-CESAR/XSBench :: opencl (io)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.45 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.47 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.48 = external hidden unnamed_addr constant [23 x i8], align 1

declare i32 @printf(ptr noundef, ...) #0

; Function Attrs: nounwind uwtable
define dso_local void @fancy_int(i64 noundef %0) #1 {
  %2 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  %3 = load i64, ptr %2, align 8, !tbaa !5
  %4 = icmp slt i64 %3, 1000
  br i1 %4, label %5, label %8

5:                                                ; preds = %1
  %6 = load i64, ptr %2, align 8, !tbaa !5
  %7 = call i32 (ptr, ...) @printf(ptr noundef @.str.45, i64 noundef %6)
  br label %56

8:                                                ; preds = %1
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = icmp sge i64 %9, 1000
  br i1 %10, label %11, label %20

11:                                               ; preds = %8
  %12 = load i64, ptr %2, align 8, !tbaa !5
  %13 = icmp slt i64 %12, 1000000
  br i1 %13, label %14, label %20

14:                                               ; preds = %11
  %15 = load i64, ptr %2, align 8, !tbaa !5
  %16 = sdiv i64 %15, 1000
  %17 = load i64, ptr %2, align 8, !tbaa !5
  %18 = srem i64 %17, 1000
  %19 = call i32 (ptr, ...) @printf(ptr noundef @.str.46, i64 noundef %16, i64 noundef %18)
  br label %55

20:                                               ; preds = %11, %8
  %21 = load i64, ptr %2, align 8, !tbaa !5
  %22 = icmp sge i64 %21, 1000000
  br i1 %22, label %23, label %35

23:                                               ; preds = %20
  %24 = load i64, ptr %2, align 8, !tbaa !5
  %25 = icmp slt i64 %24, 1000000000
  br i1 %25, label %26, label %35

26:                                               ; preds = %23
  %27 = load i64, ptr %2, align 8, !tbaa !5
  %28 = sdiv i64 %27, 1000000
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = srem i64 %29, 1000000
  %31 = sdiv i64 %30, 1000
  %32 = load i64, ptr %2, align 8, !tbaa !5
  %33 = srem i64 %32, 1000
  %34 = call i32 (ptr, ...) @printf(ptr noundef @.str.47, i64 noundef %28, i64 noundef %31, i64 noundef %33)
  br label %54

35:                                               ; preds = %23, %20
  %36 = load i64, ptr %2, align 8, !tbaa !5
  %37 = icmp sge i64 %36, 1000000000
  br i1 %37, label %38, label %50

38:                                               ; preds = %35
  %39 = load i64, ptr %2, align 8, !tbaa !5
  %40 = sdiv i64 %39, 1000000000
  %41 = load i64, ptr %2, align 8, !tbaa !5
  %42 = srem i64 %41, 1000000000
  %43 = sdiv i64 %42, 1000000
  %44 = load i64, ptr %2, align 8, !tbaa !5
  %45 = srem i64 %44, 1000000
  %46 = sdiv i64 %45, 1000
  %47 = load i64, ptr %2, align 8, !tbaa !5
  %48 = srem i64 %47, 1000
  %49 = call i32 (ptr, ...) @printf(ptr noundef @.str.48, i64 noundef %40, i64 noundef %43, i64 noundef %46, i64 noundef %48)
  br label %53

50:                                               ; preds = %35
  %51 = load i64, ptr %2, align 8, !tbaa !5
  %52 = call i32 (ptr, ...) @printf(ptr noundef @.str.45, i64 noundef %51)
  br label %53

53:                                               ; preds = %50, %38
  br label %54

54:                                               ; preds = %53, %26
  br label %55

55:                                               ; preds = %54, %14
  br label %56

56:                                               ; preds = %55, %5
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.45 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.47 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.48 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: nofree nounwind uwtable
define dso_local void @fancy_int(i64 noundef %0) local_unnamed_addr #1 {
  %2 = icmp slt i64 %0, 1000
  br i1 %2, label %3, label %5

3:                                                ; preds = %1
  %4 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.45, i64 noundef %0)
  br label %27

5:                                                ; preds = %1
  %6 = icmp ult i64 %0, 1000000
  br i1 %6, label %7, label %11

7:                                                ; preds = %5
  %.lhs.trunc = trunc nuw i64 %0 to i32
  %8 = udiv i32 %.lhs.trunc, 1000
  %.zext = zext nneg i32 %8 to i64
  %9 = urem i32 %.lhs.trunc, 1000
  %.zext21 = zext nneg i32 %9 to i64
  %10 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.46, i64 noundef %.zext, i64 noundef %.zext21)
  br label %27

11:                                               ; preds = %5
  %12 = icmp ult i64 %0, 1000000000
  br i1 %12, label %13, label %19

13:                                               ; preds = %11
  %.lhs.trunc22 = trunc nuw i64 %0 to i32
  %14 = udiv i32 %.lhs.trunc22, 1000000
  %.zext23 = zext nneg i32 %14 to i64
  %15 = urem i32 %.lhs.trunc22, 1000000
  %16 = udiv i32 %15, 1000
  %.zext27 = zext nneg i32 %16 to i64
  %17 = urem i32 %.lhs.trunc22, 1000
  %.zext29 = zext nneg i32 %17 to i64
  %18 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.47, i64 noundef %.zext23, i64 noundef %.zext27, i64 noundef %.zext29)
  br label %27

19:                                               ; preds = %11
  %20 = udiv i64 %0, 1000000000
  %21 = urem i64 %0, 1000000000
  %.lhs.trunc30 = trunc nuw nsw i64 %21 to i32
  %22 = udiv i32 %.lhs.trunc30, 1000000
  %.zext31 = zext nneg i32 %22 to i64
  %23 = urem i64 %0, 1000000
  %.lhs.trunc32 = trunc nuw nsw i64 %23 to i32
  %24 = udiv i32 %.lhs.trunc32, 1000
  %.zext33 = zext nneg i32 %24 to i64
  %25 = urem i64 %0, 1000
  %26 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.48, i64 noundef %20, i64 noundef %.zext31, i64 noundef %.zext33, i64 noundef %25)
  br label %27

27:                                               ; preds = %7, %19, %13, %3
  ret void
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass