; LLVM IR from Py-Contributors/AlgorithmsAndDataStructure :: C++/Backtracking/sodukoSolver.ll (Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i8 noundef signext %3) #0 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i8 %3, ptr %9, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %69, %4
  %13 = load i32, ptr %10, align 4, !tbaa !9
  %14 = icmp slt i32 %13, 9
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  store i32 2, ptr %11, align 4
  br label %72

16:                                               ; preds = %12
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = load i32, ptr %10, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %19) #2
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %22) #2
  %24 = load i8, ptr %23, align 1, !tbaa !11
  %25 = sext i8 %24 to i32
  %26 = load i8, ptr %9, align 1, !tbaa !11
  %27 = sext i8 %26 to i32
  %28 = icmp eq i32 %25, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %16
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %72

30:                                               ; preds = %16
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33) #2
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #2
  %38 = load i8, ptr %37, align 1, !tbaa !11
  %39 = sext i8 %38 to i32
  %40 = load i8, ptr %9, align 1, !tbaa !11
  %41 = sext i8 %40 to i32
  %42 = icmp eq i32 %39, %41
  br i1 %42, label %43, label %44

43:                                               ; preds = %30
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %72

44:                                               ; preds = %30
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = sdiv i32 %46, 3
  %48 = mul nsw i32 3, %47
  %49 = load i32, ptr %10, align 4, !tbaa !9
  %50 = sdiv i32 %49, 3
  %51 = add nsw i32 %48, %50
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %52) #2
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = sdiv i32 %54, 3
  %56 = mul nsw i32 3, %55
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = srem i32 %57, 3
  %59 = add nsw i32 %56, %58
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %60) #2
  %62 = load i8, ptr %61, align 1, !tbaa !11
  %63 = sext i8 %62 to i32
  %64 = load i8, ptr %9, align 1, !tbaa !11
  %65 = sext i8 %64 to i32
  %66 = icmp eq i32 %63, %65
  br i1 %66, label %67, label %68

67:                                               ; preds = %44
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %72

68:                                               ; preds = %44
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %10, align 4, !tbaa !9
  br label %12, !llvm.loop !12

72:                                               ; preds = %67, %43, %29, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %73 = load i32, ptr %11, align 4
  switch i32 %73, label %77 [
    i32 2, label %74
    i32 1, label %75
  ]

74:                                               ; preds = %72
  store i1 true, ptr %5, align 1
  br label %75

75:                                               ; preds = %74, %72
  %76 = load i1, ptr %5, align 1
  ret i1 %76

77:                                               ; preds = %72
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i8 noundef signext %3) local_unnamed_addr #0 {
  %5 = sext i32 %1 to i64
  %6 = srem i32 %1, 3
  %7 = sub nsw i32 %1, %6
  %8 = sext i32 %2 to i64
  %9 = srem i32 %2, 3
  %10 = sub nsw i32 %2, %9
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %12 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %8) #1
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp eq i8 %13, %3
  br i1 %14, label %._crit_edge, label %.lr.ph

15:                                               ; preds = %27
  %indvars.iv.next = add nuw nsw i64 %indvars.iv24, 1
  %16 = icmp ugt i64 %indvars.iv24, 7
  %exitcond = icmp eq i64 %indvars.iv.next, 9
  br i1 %exitcond, label %._crit_edge, label %17, !llvm.loop !8

17:                                               ; preds = %15
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #1
  %19 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %8) #1
  %20 = load i8, ptr %19, align 1, !tbaa !5
  %21 = icmp eq i8 %20, %3
  br i1 %21, label %._crit_edge, label %.lr.ph, !llvm.loop !8

.lr.ph:                                           ; preds = %4, %17
  %22 = phi i1 [ %16, %17 ], [ false, %4 ]
  %indvars.iv24 = phi i64 [ %indvars.iv.next, %17 ], [ 0, %4 ]
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %5) #1
  %24 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %indvars.iv24) #1
  %25 = load i8, ptr %24, align 1, !tbaa !5
  %26 = icmp eq i8 %25, %3
  br i1 %26, label %._crit_edge, label %27

27:                                               ; preds = %.lr.ph
  %.lhs.trunc = trunc i64 %indvars.iv24 to i8
  %28 = udiv i8 %.lhs.trunc, 3
  %.zext = zext nneg i8 %28 to i32
  %29 = add nsw i32 %7, %.zext
  %30 = sext i32 %29 to i64
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #1
  %32 = urem i8 %.lhs.trunc, 3
  %.zext21 = zext nneg i8 %32 to i32
  %33 = add nsw i32 %10, %.zext21
  %34 = sext i32 %33 to i64
  %35 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %34) #1
  %36 = load i8, ptr %35, align 1, !tbaa !5
  %37 = icmp eq i8 %36, %3
  br i1 %37, label %._crit_edge, label %15

._crit_edge:                                      ; preds = %15, %17, %.lr.ph, %27, %4
  %.lcssa = phi i1 [ false, %4 ], [ %16, %15 ], [ %16, %17 ], [ %22, %.lr.ph ], [ %22, %27 ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass