; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_common)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_descriptor_blob = type { [96 x i8] }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

@.str = external hidden unnamed_addr constant [27 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack = external hidden unnamed_addr constant [653 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [299 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [304 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %28, i32 noundef %29) #1 {
  %31 = alloca ptr, align 8
  %32 = alloca ptr, align 8
  %33 = alloca ptr, align 8
  %34 = alloca ptr, align 8
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  %44 = alloca i32, align 4
  %45 = alloca i32, align 4
  %46 = alloca i32, align 4
  %47 = alloca i32, align 4
  %48 = alloca i32, align 4
  %49 = alloca i32, align 4
  %50 = alloca i32, align 4
  %51 = alloca i32, align 4
  %52 = alloca i32, align 4
  %53 = alloca i32, align 4
  %54 = alloca i32, align 4
  %55 = alloca i32, align 4
  %56 = alloca i32, align 4
  %57 = alloca i32, align 4
  %58 = alloca i32, align 4
  %59 = alloca i32, align 4
  %60 = alloca i32, align 4
  %61 = alloca %struct.libxsmm_descriptor_blob, align 1
  %62 = alloca %struct.libxsmm_mateltwise_kernel_config_struct, align 4
  %63 = alloca %struct.libxsmm_mateltwise_gp_reg_mapping_struct, align 4
  %64 = alloca ptr, align 8
  %65 = alloca i32, align 4
  %66 = alloca i32, align 4
  %67 = alloca i32, align 4
  %68 = alloca i32, align 4
  %69 = alloca i32, align 4
  %70 = alloca i32, align 4
  store ptr %0, ptr %31, align 8, !tbaa !5
  store ptr %1, ptr %32, align 8, !tbaa !5
  store ptr %2, ptr %33, align 8, !tbaa !5
  store ptr %3, ptr %34, align 8, !tbaa !5
  store i32 %4, ptr %35, align 4, !tbaa !9
  store i32 %5, ptr %36, align 4, !tbaa !9
  store i32 %6, ptr %37, align 4, !tbaa !9
  store i32 %7, ptr %38, align 4, !tbaa !9
  store i32 %8, ptr %39, align 4, !tbaa !9
  store i32 %9, ptr %40, align 4, !tbaa !9
  store i32 %10, ptr %41, align 4, !tbaa !9
  store i32 %11, ptr %42, align 4, !tbaa !9
  store i32 %12, ptr %43, align 4, !tbaa !9
  store i32 %13, ptr %44, align 4, !tbaa !9
  store i32 %14, ptr %45, align 4, !tbaa !9
  store i32 %15, ptr %46, align 4, !tbaa !9
  store i32 %16, ptr %47, align 4, !tbaa !9
  store i32 %17, ptr %48, align 4, !tbaa !9
  store i32 %18, ptr %49, align 4, !tbaa !9
  store i32 %19, ptr %50, align 4, !tbaa !9
  store i32 %20, ptr %51, align 4, !tbaa !9
  store i32 %21, ptr %52, align 4, !tbaa !9
  store i32 %22, ptr %53, align 4, !tbaa !9
  store i32 %23, ptr %54, align 4, !tbaa !9
  store i32 %24, ptr %55, align 4, !tbaa !9
  store i32 %25, ptr %56, align 4, !tbaa !9
  store i32 %26, ptr %57, align 4, !tbaa !9
  store i32 %27, ptr %58, align 4, !tbaa !9
  store i32 %28, ptr %59, align 4, !tbaa !9
  store i32 %29, ptr %60, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 96, ptr %61) #4
  call void @llvm.lifetime.start.p0(i64 516, ptr %62) #4
  call void @llvm.lifetime.start.p0(i64 148, ptr %63) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %64) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %65) #4
  %71 = load ptr, ptr %34, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %71, i32 0, i32 6
  %73 = load i32, ptr %72, align 1, !tbaa !11
  %74 = and i32 %73, 262144
  %75 = icmp ugt i32 %74, 0
  %76 = zext i1 %75 to i64
  %77 = select i1 %75, i32 1, i32 0
  store i32 %77, ptr %65, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %66) #4
  %78 = load ptr, ptr %34, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %78, i32 0, i32 6
  %80 = load i32, ptr %79, align 1, !tbaa !11
  %81 = and i32 %80, 131072
  %82 = icmp ugt i32 %81, 0
  %83 = zext i1 %82 to i64
  %84 = select i1 %82, i32 1, i32 0
  store i32 %84, ptr %66, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %67) #4
  %85 = load ptr, ptr %34, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %85, i32 0, i32 6
  %87 = load i32, ptr %86, align 1, !tbaa !11
  %88 = and i32 %87, 65536
  %89 = icmp ugt i32 %88, 0
  %90 = zext i1 %89 to i64
  %91 = select i1 %89, i32 1, i32 0
  store i32 %91, ptr %67, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %68) #4
  %92 = load i32, ptr %65, align 4, !tbaa !9
  %93 = icmp eq i32 %92, 1
  br i1 %93, label %100, label %94

94:                                               ; preds = %30
  %95 = load i32, ptr %66, align 4, !tbaa !9
  %96 = icmp eq i32 %95, 1
  br i1 %96, label %100, label %97

97:                                               ; preds = %94
  %98 = load i32, ptr %67, align 4, !tbaa !9
  %99 = icmp eq i32 %98, 1
  br label %100

100:                                              ; preds = %97, %94, %30
  %101 = phi i1 [ true, %94 ], [ true, %30 ], [ %99, %97 ]
  %102 = zext i1 %101 to i64
  %103 = select i1 %101, i32 1, i32 0
  store i32 %103, ptr %68, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %69) #4
  store i32 32, ptr %69, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %70) #4
  store i32 80, ptr %70, align 4, !tbaa !9
  %104 = load i32, ptr %36, align 4, !tbaa !9
  %105 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %63, i32 0, i32 0
  store i32 %104, ptr %105, align 4, !tbaa !15
  %106 = load ptr, ptr %31, align 8, !tbaa !5
  %107 = load ptr, ptr %33, align 8, !tbaa !5
  %108 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %106, ptr noundef %107, i32 noundef 26, i32 noundef %108)
  %109 = load i32, ptr %68, align 4, !tbaa !9
  %110 = icmp sgt i32 %109, 0
  br i1 %110, label %111, label %118

111:                                              ; preds = %100
  %112 = load ptr, ptr %31, align 8, !tbaa !5
  %113 = load ptr, ptr %33, align 8, !tbaa !5
  %114 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %112, ptr noundef %113, i32 noundef 20, i32 noundef %114)
  %115 = load ptr, ptr %31, align 8, !tbaa !5
  %116 = load ptr, ptr %32, align 8, !tbaa !5
  %117 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_generic_loop_header_no_idx_inc(ptr noundef %115, ptr noundef %116, i32 noundef %117, i32 noundef 0)
  br label %118

118:                                              ; preds = %111, %100
  %119 = load i32, ptr %66, align 4, !tbaa !9
  %120 = icmp sgt i32 %119, 0
  br i1 %120, label %121, label %145

121:                                              ; preds = %118
  %122 = load ptr, ptr %31, align 8, !tbaa !5
  %123 = load ptr, ptr %33, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %123, i32 0, i32 20
  %125 = load i32, ptr %124, align 8, !tbaa !17
  %126 = load i32, ptr %35, align 4, !tbaa !9
  %127 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %122, i32 noundef %125, i32 noundef %126, i32 noundef %127)
  %128 = load ptr, ptr %31, align 8, !tbaa !5
  %129 = load ptr, ptr %33, align 8, !tbaa !5
  %130 = load i32, ptr %50, align 4, !tbaa !9
  %131 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %128, ptr noundef %129, i32 noundef %130, i32 noundef %131)
  %132 = load ptr, ptr %31, align 8, !tbaa !5
  %133 = load ptr, ptr %33, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %133, i32 0, i32 20
  %135 = load i32, ptr %134, align 8, !tbaa !17
  %136 = load i32, ptr %37, align 4, !tbaa !9
  %137 = load i32, ptr %38, align 4, !tbaa !9
  %138 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %132, i32 noundef %135, i32 noundef %136, i32 noundef %137, i32 noundef 8, i32 noundef 0, i32 noundef %138, i32 noundef 0)
  %139 = load ptr, ptr %31, align 8, !tbaa !5
  %140 = load ptr, ptr %33, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %140, i32 0, i32 16
  %142 = load i32, ptr %141, align 8, !tbaa !20
  %143 = load i32, ptr %37, align 4, !tbaa !9
  %144 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %139, i32 noundef %142, i32 noundef %143, i32 noundef %144)
  br label %145

145:                                              ; preds = %121, %118
  %146 = load i32, ptr %67, align 4, !tbaa !9
  %147 = icmp sgt i32 %146, 0
  br i1 %147, label %148, label %162

148:                                              ; preds = %145
  %149 = load ptr, ptr %31, align 8, !tbaa !5
  %150 = load ptr, ptr %33, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %150, i32 0, i32 20
  %152 = load i32, ptr %151, align 8, !tbaa !17
  %153 = load i32, ptr %35, align 4, !tbaa !9
  %154 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %149, i32 noundef %152, i32 noundef %153, i32 noundef %154)
  %155 = load ptr, ptr %31, align 8, !tbaa !5
  %156 = load ptr, ptr %33, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %156, i32 0, i32 20
  %158 = load i32, ptr %157, align 8, !tbaa !17
  %159 = load i32, ptr %35, align 4, !tbaa !9
  %160 = load i32, ptr %38, align 4, !tbaa !9
  %161 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %155, i32 noundef %158, i32 noundef %159, i32 noundef %160, i32 noundef 8, i32 noundef 0, i32 noundef %161, i32 noundef 0)
  br label %162

162:                                              ; preds = %148, %145
  %163 = load ptr, ptr %31, align 8, !tbaa !5
  %164 = load i32, ptr %36, align 4, !tbaa !9
  %165 = load i32, ptr %69, align 4, !tbaa !9
  %166 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %163, i32 noundef -1568407413, i32 noundef %164, i32 noundef 127, i32 noundef 0, i32 noundef %165, i32 noundef %166, i32 noundef 1)
  %167 = load i32, ptr %66, align 4, !tbaa !9
  %168 = icmp sgt i32 %167, 0
  br i1 %168, label %172, label %169

169:                                              ; preds = %162
  %170 = load i32, ptr %67, align 4, !tbaa !9
  %171 = icmp sgt i32 %170, 0
  br i1 %171, label %172, label %179

172:                                              ; preds = %169, %162
  %173 = load ptr, ptr %31, align 8, !tbaa !5
  %174 = load ptr, ptr %33, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %174, i32 0, i32 20
  %176 = load i32, ptr %175, align 8, !tbaa !17
  %177 = load i32, ptr %40, align 4, !tbaa !9
  %178 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %173, i32 noundef %176, i32 noundef %177, i32 noundef %178)
  br label %179

179:                                              ; preds = %172, %169
  %180 = load i32, ptr %53, align 4, !tbaa !9
  %181 = icmp ne i32 %180, 0
  br i1 %181, label %182, label %191

182:                                              ; preds = %179
  %183 = load ptr, ptr %31, align 8, !tbaa !5
  %184 = load ptr, ptr %33, align 8, !tbaa !5
  %185 = load i32, ptr %51, align 4, !tbaa !9
  %186 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %183, ptr noundef %184, i32 noundef %185, i32 noundef %186)
  %187 = load ptr, ptr %31, align 8, !tbaa !5
  %188 = load i32, ptr %36, align 4, !tbaa !9
  %189 = load i32, ptr %70, align 4, !tbaa !9
  %190 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %187, i32 noundef -1568407413, i32 noundef %188, i32 noundef 127, i32 noundef 0, i32 noundef %189, i32 noundef %190, i32 noundef 1)
  br label %310

191:                                              ; preds = %179
  %192 = load ptr, ptr %31, align 8, !tbaa !5
  %193 = load ptr, ptr %33, align 8, !tbaa !5
  %194 = load i32, ptr %52, align 4, !tbaa !9
  %195 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %192, ptr noundef %193, i32 noundef %194, i32 noundef %195)
  %196 = load i32, ptr %68, align 4, !tbaa !9
  %197 = icmp sgt i32 %196, 0
  br i1 %197, label %198, label %305

198:                                              ; preds = %191
  %199 = load ptr, ptr %31, align 8, !tbaa !5
  %200 = load ptr, ptr %33, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %200, i32 0, i32 20
  %202 = load i32, ptr %201, align 8, !tbaa !17
  %203 = load i32, ptr %38, align 4, !tbaa !9
  %204 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %199, i32 noundef %202, i32 noundef %203, i32 noundef %204)
  %205 = load ptr, ptr %31, align 8, !tbaa !5
  %206 = load i32, ptr %40, align 4, !tbaa !9
  %207 = load i32, ptr %49, align 4, !tbaa !9
  %208 = icmp eq i32 0, %207
  br i1 %208, label %209, label %210

209:                                              ; preds = %198
  br label %290

210:                                              ; preds = %198
  %211 = load i32, ptr %49, align 4, !tbaa !9
  %212 = icmp eq i32 1, %211
  br i1 %212, label %213, label %214

213:                                              ; preds = %210
  br label %288

214:                                              ; preds = %210
  %215 = load i32, ptr %49, align 4, !tbaa !9
  %216 = icmp eq i32 2, %215
  br i1 %216, label %217, label %218

217:                                              ; preds = %214
  br label %286

218:                                              ; preds = %214
  %219 = load i32, ptr %49, align 4, !tbaa !9
  %220 = icmp eq i32 3, %219
  br i1 %220, label %221, label %222

221:                                              ; preds = %218
  br label %284

222:                                              ; preds = %218
  %223 = load i32, ptr %49, align 4, !tbaa !9
  %224 = icmp eq i32 4, %223
  br i1 %224, label %225, label %226

225:                                              ; preds = %222
  br label %282

226:                                              ; preds = %222
  %227 = load i32, ptr %49, align 4, !tbaa !9
  %228 = icmp eq i32 5, %227
  br i1 %228, label %229, label %230

229:                                              ; preds = %226
  br label %280

230:                                              ; preds = %226
  %231 = load i32, ptr %49, align 4, !tbaa !9
  %232 = icmp eq i32 6, %231
  br i1 %232, label %233, label %234

233:                                              ; preds = %230
  br label %278

234:                                              ; preds = %230
  %235 = load i32, ptr %49, align 4, !tbaa !9
  %236 = icmp eq i32 7, %235
  br i1 %236, label %237, label %238

237:                                              ; preds = %234
  br label %276

238:                                              ; preds = %234
  %239 = load i32, ptr %49, align 4, !tbaa !9
  %240 = icmp eq i32 8, %239
  br i1 %240, label %241, label %242

241:                                              ; preds = %238
  br label %274

242:                                              ; preds = %238
  %243 = load i32, ptr %49, align 4, !tbaa !9
  %244 = icmp eq i32 9, %243
  br i1 %244, label %245, label %246

245:                                              ; preds = %242
  br label %272

246:                                              ; preds = %242
  %247 = load i32, ptr %49, align 4, !tbaa !9
  %248 = icmp eq i32 10, %247
  br i1 %248, label %249, label %250

249:                                              ; preds = %246
  br label %270

250:                                              ; preds = %246
  %251 = load i32, ptr %49, align 4, !tbaa !9
  %252 = icmp eq i32 11, %251
  br i1 %252, label %253, label %254

253:                                              ; preds = %250
  br label %268

254:                                              ; preds = %250
  %255 = load i32, ptr %49, align 4, !tbaa !9
  %256 = icmp eq i32 12, %255
  br i1 %256, label %257, label %258

257:                                              ; preds = %254
  br label %266

258:                                              ; preds = %254
  %259 = load i32, ptr %49, align 4, !tbaa !9
  %260 = icmp eq i32 13, %259
  br i1 %260, label %261, label %262

261:                                              ; preds = %258
  br label %264

262:                                              ; preds = %258
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 158, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

263:                                              ; No predecessors!
  br label %264

264:                                              ; preds = %263, %261
  %265 = phi i32 [ 1, %261 ], [ 0, %263 ]
  br label %266

266:                                              ; preds = %264, %257
  %267 = phi i32 [ 1, %257 ], [ %265, %264 ]
  br label %268

268:                                              ; preds = %266, %253
  %269 = phi i32 [ 2, %253 ], [ %267, %266 ]
  br label %270

270:                                              ; preds = %268, %249
  %271 = phi i32 [ 2, %249 ], [ %269, %268 ]
  br label %272

272:                                              ; preds = %270, %245
  %273 = phi i32 [ 4, %245 ], [ %271, %270 ]
  br label %274

274:                                              ; preds = %272, %241
  %275 = phi i32 [ 4, %241 ], [ %273, %272 ]
  br label %276

276:                                              ; preds = %274, %237
  %277 = phi i32 [ 8, %237 ], [ %275, %274 ]
  br label %278

278:                                              ; preds = %276, %233
  %279 = phi i32 [ 8, %233 ], [ %277, %276 ]
  br label %280

280:                                              ; preds = %278, %229
  %281 = phi i32 [ 1, %229 ], [ %279, %278 ]
  br label %282

282:                                              ; preds = %280, %225
  %283 = phi i32 [ 1, %225 ], [ %281, %280 ]
  br label %284

284:                                              ; preds = %282, %221
  %285 = phi i32 [ 2, %221 ], [ %283, %282 ]
  br label %286

286:                                              ; preds = %284, %217
  %287 = phi i32 [ 2, %217 ], [ %285, %284 ]
  br label %288

288:                                              ; preds = %286, %213
  %289 = phi i32 [ 4, %213 ], [ %287, %286 ]
  br label %290

290:                                              ; preds = %288, %209
  %291 = phi i32 [ 8, %209 ], [ %289, %288 ]
  %292 = sext i32 %291 to i64
  %293 = load i32, ptr %42, align 4, !tbaa !9
  %294 = sext i32 %293 to i64
  %295 = mul nsw i64 %292, %294
  %296 = load i32, ptr %43, align 4, !tbaa !9
  %297 = sext i32 %296 to i64
  %298 = mul nsw i64 %295, %297
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %205, i32 noundef 30003, i32 noundef %206, i64 noundef %298)
  %299 = load ptr, ptr %31, align 8, !tbaa !5
  %300 = load ptr, ptr %33, align 8, !tbaa !5
  %301 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %300, i32 0, i32 16
  %302 = load i32, ptr %301, align 8, !tbaa !20
  %303 = load i32, ptr %40, align 4, !tbaa !9
  %304 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %299, i32 noundef %302, i32 noundef %303, i32 noundef %304)
  br label %305

305:                                              ; preds = %290, %191
  %306 = load ptr, ptr %31, align 8, !tbaa !5
  %307 = load i32, ptr %36, align 4, !tbaa !9
  %308 = load i32, ptr %70, align 4, !tbaa !9
  %309 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %306, i32 noundef -1568407413, i32 noundef %307, i32 noundef 127, i32 noundef 0, i32 noundef %308, i32 noundef %309, i32 noundef 1)
  br label %310

310:                                              ; preds = %305, %182
  %311 = load i32, ptr %47, align 4, !tbaa !9
  %312 = load i32, ptr %48, align 4, !tbaa !9
  %313 = load i32, ptr %49, align 4, !tbaa !9
  %314 = load i32, ptr %42, align 4, !tbaa !9
  %315 = load i32, ptr %43, align 4, !tbaa !9
  %316 = load i32, ptr %44, align 4, !tbaa !9
  %317 = load i32, ptr %45, align 4, !tbaa !9
  %318 = load i32, ptr %41, align 4, !tbaa !9
  %319 = trunc i32 %318 to i16
  %320 = zext i16 %319 to i32
  %321 = icmp eq i32 0, %320
  br i1 %321, label %327, label %322

322:                                              ; preds = %310
  %323 = load i32, ptr %41, align 4, !tbaa !9
  %324 = trunc i32 %323 to i16
  %325 = zext i16 %324 to i32
  %326 = icmp slt i32 0, %325
  br i1 %326, label %327, label %345

327:                                              ; preds = %322, %310
  %328 = load i32, ptr %41, align 4, !tbaa !9
  %329 = zext i32 %328 to i64
  %330 = mul i64 1, %329
  %331 = icmp ult i64 %330, 65535
  br i1 %331, label %332, label %336

332:                                              ; preds = %327
  %333 = load i32, ptr %41, align 4, !tbaa !9
  %334 = zext i32 %333 to i64
  %335 = mul i64 1, %334
  br label %337

336:                                              ; preds = %327
  br label %337

337:                                              ; preds = %336, %332
  %338 = phi i64 [ %335, %332 ], [ 65535, %336 ]
  %339 = icmp ule i64 %338, 65535
  br i1 %339, label %340, label %345

340:                                              ; preds = %337
  %341 = load i32, ptr %41, align 4, !tbaa !9
  %342 = uitofp i32 %341 to double
  %343 = fcmp ole double 0.000000e+00, %342
  br i1 %343, label %344, label %345

344:                                              ; preds = %340
  br label %346

345:                                              ; preds = %340, %337, %322
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 171, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

346:                                              ; preds = %344
  %347 = load i32, ptr %41, align 4, !tbaa !9
  %348 = trunc i32 %347 to i16
  %349 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef %61, i32 noundef %311, i32 noundef 15, i32 noundef 15, i32 noundef %312, i32 noundef %313, i32 noundef %314, i32 noundef %315, i32 noundef %316, i32 noundef %317, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %348, i8 noundef zeroext 1)
  store ptr %349, ptr %64, align 8, !tbaa !5
  %350 = load ptr, ptr %31, align 8, !tbaa !5
  %351 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef %350, ptr noundef %62, ptr noundef %351)
  %352 = load i32, ptr %41, align 4, !tbaa !9
  %353 = trunc i32 %352 to i16
  %354 = zext i16 %353 to i32
  %355 = icmp eq i32 0, %354
  br i1 %355, label %361, label %356

356:                                              ; preds = %346
  %357 = load i32, ptr %41, align 4, !tbaa !9
  %358 = trunc i32 %357 to i16
  %359 = zext i16 %358 to i32
  %360 = icmp slt i32 0, %359
  br i1 %360, label %361, label %379

361:                                              ; preds = %356, %346
  %362 = load i32, ptr %41, align 4, !tbaa !9
  %363 = zext i32 %362 to i64
  %364 = mul i64 1, %363
  %365 = icmp ult i64 %364, 65535
  br i1 %365, label %366, label %370

366:                                              ; preds = %361
  %367 = load i32, ptr %41, align 4, !tbaa !9
  %368 = zext i32 %367 to i64
  %369 = mul i64 1, %368
  br label %371

370:                                              ; preds = %361
  br label %371

371:                                              ; preds = %370, %366
  %372 = phi i64 [ %369, %366 ], [ 65535, %370 ]
  %373 = icmp ule i64 %372, 65535
  br i1 %373, label %374, label %379

374:                                              ; preds = %371
  %375 = load i32, ptr %41, align 4, !tbaa !9
  %376 = uitofp i32 %375 to double
  %377 = fcmp ole double 0.000000e+00, %376
  br i1 %377, label %378, label %379

378:                                              ; preds = %374
  br label %380

379:                                              ; preds = %374, %371, %356
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 173, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

380:                                              ; preds = %378
  %381 = load i32, ptr %41, align 4, !tbaa !9
  %382 = trunc i32 %381 to i16
  %383 = zext i16 %382 to i32
  %384 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %383)
  %385 = icmp sgt i32 %384, 0
  br i1 %385, label %386, label %390

386:                                              ; preds = %380
  %387 = load ptr, ptr %31, align 8, !tbaa !5
  %388 = load ptr, ptr %32, align 8, !tbaa !5
  %389 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_transform_x86_microkernel(ptr noundef %387, ptr noundef %388, ptr noundef %63, ptr noundef %62, ptr noundef %389)
  br label %394

390:                                              ; preds = %380
  %391 = load ptr, ptr %31, align 8, !tbaa !5
  %392 = load ptr, ptr %32, align 8, !tbaa !5
  %393 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef %391, ptr noundef %392, ptr noundef %63, ptr noundef %62, ptr noundef %393)
  br label %394

394:                                              ; preds = %390, %386
  %395 = load i32, ptr %53, align 4, !tbaa !9
  %396 = icmp ne i32 %395, 0
  br i1 %396, label %397, label %608

397:                                              ; preds = %394
  %398 = load ptr, ptr %31, align 8, !tbaa !5
  %399 = load ptr, ptr %33, align 8, !tbaa !5
  %400 = load i32, ptr %51, align 4, !tbaa !9
  %401 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %398, ptr noundef %399, i32 noundef %400, i32 noundef %401)
  %402 = load ptr, ptr %31, align 8, !tbaa !5
  %403 = load i32, ptr %36, align 4, !tbaa !9
  %404 = load i32, ptr %69, align 4, !tbaa !9
  %405 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %402, i32 noundef -1568407413, i32 noundef %403, i32 noundef 127, i32 noundef 0, i32 noundef %404, i32 noundef %405, i32 noundef 1)
  %406 = load ptr, ptr %31, align 8, !tbaa !5
  %407 = load ptr, ptr %33, align 8, !tbaa !5
  %408 = load i32, ptr %52, align 4, !tbaa !9
  %409 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %406, ptr noundef %407, i32 noundef %408, i32 noundef %409)
  %410 = load i32, ptr %68, align 4, !tbaa !9
  %411 = icmp sgt i32 %410, 0
  br i1 %411, label %412, label %519

412:                                              ; preds = %397
  %413 = load ptr, ptr %31, align 8, !tbaa !5
  %414 = load ptr, ptr %33, align 8, !tbaa !5
  %415 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %414, i32 0, i32 20
  %416 = load i32, ptr %415, align 8, !tbaa !17
  %417 = load i32, ptr %38, align 4, !tbaa !9
  %418 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %413, i32 noundef %416, i32 noundef %417, i32 noundef %418)
  %419 = load ptr, ptr %31, align 8, !tbaa !5
  %420 = load i32, ptr %40, align 4, !tbaa !9
  %421 = load i32, ptr %60, align 4, !tbaa !9
  %422 = icmp eq i32 0, %421
  br i1 %422, label %423, label %424

423:                                              ; preds = %412
  br label %504

424:                                              ; preds = %412
  %425 = load i32, ptr %60, align 4, !tbaa !9
  %426 = icmp eq i32 1, %425
  br i1 %426, label %427, label %428

427:                                              ; preds = %424
  br label %502

428:                                              ; preds = %424
  %429 = load i32, ptr %60, align 4, !tbaa !9
  %430 = icmp eq i32 2, %429
  br i1 %430, label %431, label %432

431:                                              ; preds = %428
  br label %500

432:                                              ; preds = %428
  %433 = load i32, ptr %60, align 4, !tbaa !9
  %434 = icmp eq i32 3, %433
  br i1 %434, label %435, label %436

435:                                              ; preds = %432
  br label %498

436:                                              ; preds = %432
  %437 = load i32, ptr %60, align 4, !tbaa !9
  %438 = icmp eq i32 4, %437
  br i1 %438, label %439, label %440

439:                                              ; preds = %436
  br label %496

440:                                              ; preds = %436
  %441 = load i32, ptr %60, align 4, !tbaa !9
  %442 = icmp eq i32 5, %441
  br i1 %442, label %443, label %444

443:                                              ; preds = %440
  br label %494

444:                                              ; preds = %440
  %445 = load i32, ptr %60, align 4, !tbaa !9
  %446 = icmp eq i32 6, %445
  br i1 %446, label %447, label %448

447:                                              ; preds = %444
  br label %492

448:                                              ; preds = %444
  %449 = load i32, ptr %60, align 4, !tbaa !9
  %450 = icmp eq i32 7, %449
  br i1 %450, label %451, label %452

451:                                              ; preds = %448
  br label %490

452:                                              ; preds = %448
  %453 = load i32, ptr %60, align 4, !tbaa !9
  %454 = icmp eq i32 8, %453
  br i1 %454, label %455, label %456

455:                                              ; preds = %452
  br label %488

456:                                              ; preds = %452
  %457 = load i32, ptr %60, align 4, !tbaa !9
  %458 = icmp eq i32 9, %457
  br i1 %458, label %459, label %460

459:                                              ; preds = %456
  br label %486

460:                                              ; preds = %456
  %461 = load i32, ptr %60, align 4, !tbaa !9
  %462 = icmp eq i32 10, %461
  br i1 %462, label %463, label %464

463:                                              ; preds = %460
  br label %484

464:                                              ; preds = %460
  %465 = load i32, ptr %60, align 4, !tbaa !9
  %466 = icmp eq i32 11, %465
  br i1 %466, label %467, label %468

467:                                              ; preds = %464
  br label %482

468:                                              ; preds = %464
  %469 = load i32, ptr %60, align 4, !tbaa !9
  %470 = icmp eq i32 12, %469
  br i1 %470, label %471, label %472

471:                                              ; preds = %468
  br label %480

472:                                              ; preds = %468
  %473 = load i32, ptr %60, align 4, !tbaa !9
  %474 = icmp eq i32 13, %473
  br i1 %474, label %475, label %476

475:                                              ; preds = %472
  br label %478

476:                                              ; preds = %472
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 191, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

477:                                              ; No predecessors!
  br label %478

478:                                              ; preds = %477, %475
  %479 = phi i32 [ 1, %475 ], [ 0, %477 ]
  br label %480

480:                                              ; preds = %478, %471
  %481 = phi i32 [ 1, %471 ], [ %479, %478 ]
  br label %482

482:                                              ; preds = %480, %467
  %483 = phi i32 [ 2, %467 ], [ %481, %480 ]
  br label %484

484:                                              ; preds = %482, %463
  %485 = phi i32 [ 2, %463 ], [ %483, %482 ]
  br label %486

486:                                              ; preds = %484, %459
  %487 = phi i32 [ 4, %459 ], [ %485, %484 ]
  br label %488

488:                                              ; preds = %486, %455
  %489 = phi i32 [ 4, %455 ], [ %487, %486 ]
  br label %490

490:                                              ; preds = %488, %451
  %491 = phi i32 [ 8, %451 ], [ %489, %488 ]
  br label %492

492:                                              ; preds = %490, %447
  %493 = phi i32 [ 8, %447 ], [ %491, %490 ]
  br label %494

494:                                              ; preds = %492, %443
  %495 = phi i32 [ 1, %443 ], [ %493, %492 ]
  br label %496

496:                                              ; preds = %494, %439
  %497 = phi i32 [ 1, %439 ], [ %495, %494 ]
  br label %498

498:                                              ; preds = %496, %435
  %499 = phi i32 [ 2, %435 ], [ %497, %496 ]
  br label %500

500:                                              ; preds = %498, %431
  %501 = phi i32 [ 2, %431 ], [ %499, %498 ]
  br label %502

502:                                              ; preds = %500, %427
  %503 = phi i32 [ 4, %427 ], [ %501, %500 ]
  br label %504

504:                                              ; preds = %502, %423
  %505 = phi i32 [ 8, %423 ], [ %503, %502 ]
  %506 = sext i32 %505 to i64
  %507 = load i32, ptr %54, align 4, !tbaa !9
  %508 = sext i32 %507 to i64
  %509 = mul nsw i64 %506, %508
  %510 = load i32, ptr %55, align 4, !tbaa !9
  %511 = sext i32 %510 to i64
  %512 = mul nsw i64 %509, %511
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %419, i32 noundef 30003, i32 noundef %420, i64 noundef %512)
  %513 = load ptr, ptr %31, align 8, !tbaa !5
  %514 = load ptr, ptr %33, align 8, !tbaa !5
  %515 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %514, i32 0, i32 16
  %516 = load i32, ptr %515, align 8, !tbaa !20
  %517 = load i32, ptr %40, align 4, !tbaa !9
  %518 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %513, i32 noundef %516, i32 noundef %517, i32 noundef %518)
  br label %519

519:                                              ; preds = %504, %397
  %520 = load ptr, ptr %31, align 8, !tbaa !5
  %521 = load i32, ptr %36, align 4, !tbaa !9
  %522 = load i32, ptr %70, align 4, !tbaa !9
  %523 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %520, i32 noundef -1568407413, i32 noundef %521, i32 noundef 127, i32 noundef 0, i32 noundef %522, i32 noundef %523, i32 noundef 1)
  %524 = load i32, ptr %58, align 4, !tbaa !9
  %525 = load i32, ptr %59, align 4, !tbaa !9
  %526 = load i32, ptr %60, align 4, !tbaa !9
  %527 = load i32, ptr %54, align 4, !tbaa !9
  %528 = load i32, ptr %55, align 4, !tbaa !9
  %529 = load i32, ptr %56, align 4, !tbaa !9
  %530 = load i32, ptr %57, align 4, !tbaa !9
  %531 = load i32, ptr %53, align 4, !tbaa !9
  %532 = trunc i32 %531 to i16
  %533 = zext i16 %532 to i32
  %534 = icmp eq i32 0, %533
  br i1 %534, label %540, label %535

535:                                              ; preds = %519
  %536 = load i32, ptr %53, align 4, !tbaa !9
  %537 = trunc i32 %536 to i16
  %538 = zext i16 %537 to i32
  %539 = icmp slt i32 0, %538
  br i1 %539, label %540, label %558

540:                                              ; preds = %535, %519
  %541 = load i32, ptr %53, align 4, !tbaa !9
  %542 = zext i32 %541 to i64
  %543 = mul i64 1, %542
  %544 = icmp ult i64 %543, 65535
  br i1 %544, label %545, label %549

545:                                              ; preds = %540
  %546 = load i32, ptr %53, align 4, !tbaa !9
  %547 = zext i32 %546 to i64
  %548 = mul i64 1, %547
  br label %550

549:                                              ; preds = %540
  br label %550

550:                                              ; preds = %549, %545
  %551 = phi i64 [ %548, %545 ], [ 65535, %549 ]
  %552 = icmp ule i64 %551, 65535
  br i1 %552, label %553, label %558

553:                                              ; preds = %550
  %554 = load i32, ptr %53, align 4, !tbaa !9
  %555 = uitofp i32 %554 to double
  %556 = fcmp ole double 0.000000e+00, %555
  br i1 %556, label %557, label %558

557:                                              ; preds = %553
  br label %559

558:                                              ; preds = %553, %550, %535
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 203, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

559:                                              ; preds = %557
  %560 = load i32, ptr %53, align 4, !tbaa !9
  %561 = trunc i32 %560 to i16
  %562 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef %61, i32 noundef %524, i32 noundef 15, i32 noundef 15, i32 noundef %525, i32 noundef %526, i32 noundef %527, i32 noundef %528, i32 noundef %529, i32 noundef %530, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %561, i8 noundef zeroext 1)
  store ptr %562, ptr %64, align 8, !tbaa !5
  %563 = load ptr, ptr %31, align 8, !tbaa !5
  %564 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef %563, ptr noundef %62, ptr noundef %564)
  %565 = load i32, ptr %53, align 4, !tbaa !9
  %566 = trunc i32 %565 to i16
  %567 = zext i16 %566 to i32
  %568 = icmp eq i32 0, %567
  br i1 %568, label %574, label %569

569:                                              ; preds = %559
  %570 = load i32, ptr %53, align 4, !tbaa !9
  %571 = trunc i32 %570 to i16
  %572 = zext i16 %571 to i32
  %573 = icmp slt i32 0, %572
  br i1 %573, label %574, label %592

574:                                              ; preds = %569, %559
  %575 = load i32, ptr %53, align 4, !tbaa !9
  %576 = zext i32 %575 to i64
  %577 = mul i64 1, %576
  %578 = icmp ult i64 %577, 65535
  br i1 %578, label %579, label %583

579:                                              ; preds = %574
  %580 = load i32, ptr %53, align 4, !tbaa !9
  %581 = zext i32 %580 to i64
  %582 = mul i64 1, %581
  br label %584

583:                                              ; preds = %574
  br label %584

584:                                              ; preds = %583, %579
  %585 = phi i64 [ %582, %579 ], [ 65535, %583 ]
  %586 = icmp ule i64 %585, 65535
  br i1 %586, label %587, label %592

587:                                              ; preds = %584
  %588 = load i32, ptr %53, align 4, !tbaa !9
  %589 = uitofp i32 %588 to double
  %590 = fcmp ole double 0.000000e+00, %589
  br i1 %590, label %591, label %592

591:                                              ; preds = %587
  br label %593

592:                                              ; preds = %587, %584, %569
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 205, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

593:                                              ; preds = %591
  %594 = load i32, ptr %53, align 4, !tbaa !9
  %595 = trunc i32 %594 to i16
  %596 = zext i16 %595 to i32
  %597 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %596)
  %598 = icmp sgt i32 %597, 0
  br i1 %598, label %599, label %603

599:                                              ; preds = %593
  %600 = load ptr, ptr %31, align 8, !tbaa !5
  %601 = load ptr, ptr %32, align 8, !tbaa !5
  %602 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_transform_x86_microkernel(ptr noundef %600, ptr noundef %601, ptr noundef %63, ptr noundef %62, ptr noundef %602)
  br label %607

603:                                              ; preds = %593
  %604 = load ptr, ptr %31, align 8, !tbaa !5
  %605 = load ptr, ptr %32, align 8, !tbaa !5
  %606 = load ptr, ptr %64, align 8, !tbaa !5
  call void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef %604, ptr noundef %605, ptr noundef %63, ptr noundef %62, ptr noundef %606)
  br label %607

607:                                              ; preds = %603, %599
  br label %608

608:                                              ; preds = %607, %394
  %609 = load i32, ptr %68, align 4, !tbaa !9
  %610 = icmp sgt i32 %609, 0
  br i1 %610, label %611, label %624

611:                                              ; preds = %608
  %612 = load i32, ptr %65, align 4, !tbaa !9
  %613 = icmp sgt i32 %612, 0
  br i1 %613, label %614, label %619

614:                                              ; preds = %611
  %615 = load ptr, ptr %31, align 8, !tbaa !5
  %616 = load i32, ptr %35, align 4, !tbaa !9
  %617 = load i32, ptr %46, align 4, !tbaa !9
  %618 = sext i32 %617 to i64
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %615, i32 noundef 30000, i32 noundef %616, i64 noundef %618)
  br label %619

619:                                              ; preds = %614, %611
  %620 = load ptr, ptr %31, align 8, !tbaa !5
  %621 = load ptr, ptr %32, align 8, !tbaa !5
  %622 = load i32, ptr %38, align 4, !tbaa !9
  %623 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_generator_generic_loop_footer_with_idx_inc_reg_bound(ptr noundef %620, ptr noundef %621, i32 noundef %622, i32 noundef 1, i32 noundef %623)
  br label %624

624:                                              ; preds = %619, %608
  call void @llvm.lifetime.end.p0(i64 4, ptr %70) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %69) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %68) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %67) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %66) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %65) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %64) #4
  call void @llvm.lifetime.end.p0(i64 148, ptr %63) #4
  call void @llvm.lifetime.end.p0(i64 516, ptr %62) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr %61) #4
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_generic_loop_header_no_idx_inc(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare ptr @libxsmm_meltw_descriptor_init2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext) #2

declare void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef) #2

declare void @libxsmm_generator_transform_x86_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare void @libxsmm_generator_generic_loop_footer_with_idx_inc_reg_bound(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !13, i64 33, !13, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!13 = !{!"long long", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}
!17 = !{!18, !10, i64 80}
!18 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !19, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!19 = !{!"libxsmm_tile_config", !7, i64 0, !14, i64 2, !7, i64 4, !14, i64 6, !7, i64 8, !14, i64 10, !7, i64 12, !14, i64 14, !7, i64 16, !14, i64 18, !7, i64 20, !14, i64 22, !7, i64 24, !14, i64 26, !7, i64 28, !14, i64 30, !7, i64 32}
!20 = !{!18, !10, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_descriptor_blob = type { [96 x i8] }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [27 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack = external hidden unnamed_addr constant [653 x i8], align 1
@switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack.1 = private unnamed_addr constant [11 x i64] [i64 2, i64 2, i64 1, i64 2, i64 8, i64 2, i64 4, i64 2, i64 2, i64 2, i64 1], align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %28, i32 noundef %29) local_unnamed_addr #1 {
  %31 = alloca %struct.libxsmm_descriptor_blob, align 1
  %32 = alloca %struct.libxsmm_mateltwise_kernel_config_struct, align 4
  %33 = alloca %struct.libxsmm_mateltwise_gp_reg_mapping_struct, align 4
  call void @llvm.lifetime.start.p0(i64 96, ptr nonnull %31) #4
  call void @llvm.lifetime.start.p0(i64 516, ptr nonnull %32) #4
  call void @llvm.lifetime.start.p0(i64 148, ptr nonnull %33) #4
  %34 = getelementptr inbounds i8, ptr %3, i64 24
  %35 = load i32, ptr %34, align 1, !tbaa !5
  %36 = insertelement <4 x i32> poison, i32 %35, i64 0
  %37 = shufflevector <4 x i32> %36, <4 x i32> poison, <4 x i32> zeroinitializer
  %38 = and <4 x i32> %37, <i32 458752, i32 65536, i32 131072, i32 262144>
  %39 = icmp eq <4 x i32> %38, zeroinitializer
  store i32 %5, ptr %33, align 4, !tbaa !12
  tail call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef 26, i32 noundef %5)
  %40 = extractelement <4 x i1> %39, i64 0
  br i1 %40, label %42, label %41

41:                                               ; preds = %30
  tail call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef 20, i32 noundef %8)
  tail call void @libxsmm_generator_generic_loop_header_no_idx_inc(ptr noundef %0, ptr noundef %1, i32 noundef %7, i32 noundef 0) #4
  br label %42

42:                                               ; preds = %41, %30
  %43 = extractelement <4 x i1> %39, i64 2
  br i1 %43, label %50, label %44

44:                                               ; preds = %42
  %45 = getelementptr inbounds i8, ptr %2, i64 80
  %46 = load i32, ptr %45, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %46, i32 noundef %4, i32 noundef %9) #4
  tail call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef %19, i32 noundef %6)
  %47 = load i32, ptr %45, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef %47, i32 noundef %6, i32 noundef %7, i32 noundef 8, i32 noundef 0, i32 noundef %6, i32 noundef 0) #4
  %48 = getelementptr inbounds i8, ptr %2, i64 64
  %49 = load i32, ptr %48, align 8, !tbaa !18
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %49, i32 noundef %6, i32 noundef %4) #4
  br label %50

50:                                               ; preds = %44, %42
  %51 = extractelement <4 x i1> %39, i64 1
  br i1 %51, label %56, label %52

52:                                               ; preds = %50
  %53 = getelementptr inbounds i8, ptr %2, i64 80
  %54 = load i32, ptr %53, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %54, i32 noundef %4, i32 noundef %9) #4
  %55 = load i32, ptr %53, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef %55, i32 noundef %4, i32 noundef %7, i32 noundef 8, i32 noundef 0, i32 noundef %4, i32 noundef 0) #4
  br label %56

56:                                               ; preds = %52, %50
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1568407413, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef 32, i32 noundef %4, i32 noundef 1) #4
  %57 = and i32 %35, 196608
  %or.cond3.not = icmp eq i32 %57, 0
  br i1 %or.cond3.not, label %61, label %58

58:                                               ; preds = %56
  %59 = getelementptr inbounds i8, ptr %2, i64 80
  %60 = load i32, ptr %59, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %60, i32 noundef %9, i32 noundef %4) #4
  br label %61

61:                                               ; preds = %56, %58
  %.not235 = icmp eq i32 %22, 0
  br i1 %.not235, label %63, label %62

62:                                               ; preds = %61
  tail call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef %20, i32 noundef %6)
  br label %80

63:                                               ; preds = %61
  tail call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef %21, i32 noundef %6)
  br i1 %40, label %80, label %64

64:                                               ; preds = %63
  %65 = getelementptr inbounds i8, ptr %2, i64 80
  %66 = load i32, ptr %65, align 8, !tbaa !14
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %66, i32 noundef %7, i32 noundef %9) #4
  switch i32 %18, label %67 [
    i32 0, label %72
    i32 1, label %.fold.split
  ]

67:                                               ; preds = %64
  %68 = and i32 %18, -2
  %switch.tableidx = add i32 %68, -2
  %69 = icmp ult i32 %switch.tableidx, 11
  br i1 %69, label %switch.hole_check, label %70

70:                                               ; preds = %switch.hole_check, %67
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 158, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

.fold.split:                                      ; preds = %64
  br label %72

switch.hole_check:                                ; preds = %67
  %switch.maskindex = trunc nuw i32 %switch.tableidx to i16
  %switch.shifted = lshr i16 1365, %switch.maskindex
  %switch.lobit = trunc i16 %switch.shifted to i1
  br i1 %switch.lobit, label %switch.lookup, label %70

switch.lookup:                                    ; preds = %switch.hole_check
  %71 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [11 x i64], ptr @switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack.1, i64 0, i64 %71
  %switch.load = load i64, ptr %switch.gep, align 8
  br label %72

72:                                               ; preds = %switch.lookup, %64, %.fold.split
  %73 = phi i64 [ 8, %64 ], [ 4, %.fold.split ], [ %switch.load, %switch.lookup ]
  %74 = sext i32 %11 to i64
  %75 = sext i32 %12 to i64
  %76 = mul nsw i64 %75, %74
  %77 = mul i64 %76, %73
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30003, i32 noundef %9, i64 noundef %77) #4
  %78 = getelementptr inbounds i8, ptr %2, i64 64
  %79 = load i32, ptr %78, align 8, !tbaa !18
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %79, i32 noundef %9, i32 noundef %6) #4
  br label %80

80:                                               ; preds = %63, %72, %62
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1568407413, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef %6, i32 noundef 1) #4
  %81 = trunc i32 %10 to i16
  %82 = and i32 %10, 65535
  %83 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef nonnull %31, i32 noundef %16, i32 noundef 15, i32 noundef 15, i32 noundef %17, i32 noundef %18, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %81, i8 noundef zeroext 1) #4
  call void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef %0, ptr noundef nonnull %32, ptr noundef %83) #4
  %84 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %82) #4
  %85 = icmp sgt i32 %84, 0
  br i1 %85, label %86, label %87

86:                                               ; preds = %80
  call void @libxsmm_generator_transform_x86_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %33, ptr noundef nonnull %32, ptr noundef %83) #4
  br label %88

87:                                               ; preds = %80
  call void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %33, ptr noundef nonnull %32, ptr noundef %83) #4
  br label %88

88:                                               ; preds = %87, %86
  br i1 %.not235, label %114, label %89

89:                                               ; preds = %88
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef %20, i32 noundef %6)
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1568407413, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef 32, i32 noundef %6, i32 noundef 1) #4
  call void @libxsmm_generator_gemm_getval_stack_var(ptr noundef %0, ptr noundef %2, i32 noundef %21, i32 noundef %6)
  br i1 %40, label %106, label %90

90:                                               ; preds = %89
  %91 = getelementptr inbounds i8, ptr %2, i64 80
  %92 = load i32, ptr %91, align 8, !tbaa !14
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %92, i32 noundef %7, i32 noundef %9) #4
  switch i32 %29, label %93 [
    i32 0, label %98
    i32 1, label %.fold.split236
  ]

93:                                               ; preds = %90
  %94 = and i32 %29, -2
  %switch.tableidx247 = add i32 %94, -2
  %95 = icmp ult i32 %switch.tableidx247, 11
  br i1 %95, label %switch.hole_check248, label %96

96:                                               ; preds = %switch.hole_check248, %93
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 191, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack) #5
  unreachable

.fold.split236:                                   ; preds = %90
  br label %98

switch.hole_check248:                             ; preds = %93
  %switch.maskindex250 = trunc nuw i32 %switch.tableidx247 to i16
  %switch.shifted251 = lshr i16 1365, %switch.maskindex250
  %switch.lobit252 = trunc i16 %switch.shifted251 to i1
  br i1 %switch.lobit252, label %switch.lookup249, label %96

switch.lookup249:                                 ; preds = %switch.hole_check248
  %97 = zext nneg i32 %switch.tableidx247 to i64
  %switch.gep253 = getelementptr inbounds [11 x i64], ptr @switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack.1, i64 0, i64 %97
  %switch.load254 = load i64, ptr %switch.gep253, align 8
  br label %98

98:                                               ; preds = %switch.lookup249, %90, %.fold.split236
  %99 = phi i64 [ 8, %90 ], [ 4, %.fold.split236 ], [ %switch.load254, %switch.lookup249 ]
  %100 = sext i32 %23 to i64
  %101 = sext i32 %24 to i64
  %102 = mul nsw i64 %101, %100
  %103 = mul i64 %102, %99
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30003, i32 noundef %9, i64 noundef %103) #4
  %104 = getelementptr inbounds i8, ptr %2, i64 64
  %105 = load i32, ptr %104, align 8, !tbaa !18
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %0, i32 noundef %105, i32 noundef %9, i32 noundef %6) #4
  br label %106

106:                                              ; preds = %98, %89
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1568407413, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef 80, i32 noundef %6, i32 noundef 1) #4
  %107 = trunc i32 %22 to i16
  %108 = and i32 %22, 65535
  %109 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef nonnull %31, i32 noundef %27, i32 noundef 15, i32 noundef 15, i32 noundef %28, i32 noundef %29, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %107, i8 noundef zeroext 1) #4
  call void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef %0, ptr noundef nonnull %32, ptr noundef %109) #4
  %110 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %108) #4
  %111 = icmp sgt i32 %110, 0
  br i1 %111, label %112, label %113

112:                                              ; preds = %106
  call void @libxsmm_generator_transform_x86_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %33, ptr noundef nonnull %32, ptr noundef %109) #4
  br label %114

113:                                              ; preds = %106
  call void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %33, ptr noundef nonnull %32, ptr noundef %109) #4
  br label %114

114:                                              ; preds = %112, %113, %88
  br i1 %40, label %120, label %115

115:                                              ; preds = %114
  %116 = extractelement <4 x i1> %39, i64 3
  br i1 %116, label %119, label %117

117:                                              ; preds = %115
  %118 = sext i32 %15 to i64
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30000, i32 noundef %4, i64 noundef %118) #4
  br label %119

119:                                              ; preds = %117, %115
  call void @libxsmm_generator_generic_loop_footer_with_idx_inc_reg_bound(ptr noundef %0, ptr noundef %1, i32 noundef %7, i32 noundef 1, i32 noundef %8) #4
  br label %120

120:                                              ; preds = %119, %114
  call void @llvm.lifetime.end.p0(i64 148, ptr nonnull %33) #4
  call void @llvm.lifetime.end.p0(i64 516, ptr nonnull %32) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr nonnull %31) #4
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_generic_loop_header_no_idx_inc(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

declare ptr @libxsmm_meltw_descriptor_init2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_generator_mateltwise_init_micro_kernel_config_fullvector(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_transform_x86_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_generator_unary_binary_avx512_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_generator_generic_loop_footer_with_idx_inc_reg_bound(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !10, i64 33, !10, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144}
!14 = !{!15, !7, i64 80}
!15 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !16, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !17, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !17, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!16 = !{!"libxsmm_tile_config", !8, i64 0, !11, i64 2, !8, i64 4, !11, i64 6, !8, i64 8, !11, i64 10, !8, i64 12, !11, i64 14, !8, i64 16, !11, i64 18, !8, i64 20, !11, i64 22, !8, i64 24, !11, i64 26, !8, i64 28, !11, i64 30, !8, i64 32}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!15, !7, i64 64}


; Effective O3 passes: ConstantMergePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass