; LLVM IR from NVIDIA/DALI :: dali/pipeline/workspace (sample_workspace)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CPUBackend" = type { i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE9NumOutputEv(ptr noundef nonnull align 8 dereferenceable(664)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali29FixBatchPropertiesConsistencyERNS_9WorkspaceEb(ptr noundef nonnull align 8 dereferenceable(664) %0, i1 noundef zeroext %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca %"class.dali::CPUBackend", align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  %7 = zext i1 %1 to i8
  store i8 %7, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !11
  br label %8

8:                                                ; preds = %20, %2
  %9 = load i32, ptr %5, align 4, !tbaa !11
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = call noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE9NumOutputEv(ptr noundef nonnull align 8 dereferenceable(664) %10)
  %12 = icmp slt i32 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %23

14:                                               ; preds = %8
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !11
  %17 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %15, i32 noundef %16)
  %18 = load i8, ptr %4, align 1, !tbaa !9, !range !13, !noundef !14
  %19 = trunc i8 %18 to i1
  call void @_ZN4dali10TensorListINS_10CPUBackendEE27UpdatePropertiesFromSamplesEb(ptr noundef nonnull align 8 dereferenceable(304) %17, i1 noundef zeroext %19)
  br label %20

20:                                               ; preds = %14
  %21 = load i32, ptr %5, align 4, !tbaa !11
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %5, align 4, !tbaa !11
  br label %8, !llvm.loop !15

23:                                               ; preds = %13
  ret void
}

declare void @_ZN4dali10TensorListINS_10CPUBackendEE27UpdatePropertiesFromSamplesEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE9NumOutputEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali29FixBatchPropertiesConsistencyERNS_9WorkspaceEb(ptr noundef nonnull align 8 dereferenceable(664) %0, i1 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = tail call noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE9NumOutputEv(ptr noundef nonnull align 8 dereferenceable(664) %0)
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %2
  ret void

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.05 = phi i32 [ %6, %.lr.ph ], [ 0, %2 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %0, i32 noundef %.05)
  tail call void @_ZN4dali10TensorListINS_10CPUBackendEE27UpdatePropertiesFromSamplesEb(ptr noundef nonnull align 8 dereferenceable(304) %5, i1 noundef zeroext %1)
  %6 = add nuw nsw i32 %.05, 1
  %7 = tail call noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE9NumOutputEv(ptr noundef nonnull align 8 dereferenceable(664) %0)
  %8 = icmp slt i32 %6, %7
  br i1 %8, label %.lr.ph, label %._crit_edge, !llvm.loop !5
}

declare void @_ZN4dali10TensorListINS_10CPUBackendEE27UpdatePropertiesFromSamplesEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) local_unnamed_addr #2

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass