; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fGemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.9" = type { %"struct.std::_Vector_base.10" }
%"struct.std::_Vector_base.10" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::allocator.0" = type { i8 }
%"class.Simd::Base::SynetConvolution32fWinograd" = type { %"class.Simd::SynetConvolution32f", i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, %"struct.Simd::Array", ptr, ptr, ptr }
%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZTVN4Simd4Base27SynetConvolution32fWinogradE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8
@__PRETTY_FUNCTION__._ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE = external hidden unnamed_addr constant [88 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef nonnull align 8 dereferenceable(180)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.9") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32)) #3

declare void @_ZN4Simd4Base9Gemm32fNNEmmmPKfS2_mS2_mS2_Pfm(i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(624) %0, ptr noundef nonnull align 8 dereferenceable(180) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::vector.9", align 8
  %8 = alloca ptr, align 8
  %9 = alloca %"class.std::__cxx11::basic_string", align 8
  %10 = alloca %"class.std::allocator.0", align 1
  %11 = alloca ptr, align 8
  %12 = alloca %"class.std::__cxx11::basic_string", align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %13 = load ptr, ptr %3, align 8
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440) %13, ptr noundef nonnull align 8 dereferenceable(180) %14)
  store ptr getelementptr inbounds inrange(-16, 64) ({ [10 x ptr] }, ptr @_ZTVN4Simd4Base27SynetConvolution32fWinogradE, i32 0, i32 0, i32 2), ptr %13, align 8, !tbaa !9
  %15 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 19
  invoke void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %15, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %16 unwind label %31

16:                                               ; preds = %2
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %17, i32 0, i32 10
  %19 = load i64, ptr %18, align 8, !tbaa !11
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %21, label %39

21:                                               ; preds = %16
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %22, i32 0, i32 11
  %24 = load i64, ptr %23, align 8, !tbaa !17
  %25 = icmp eq i64 %24, 3
  br i1 %25, label %26, label %39

26:                                               ; preds = %21
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 1, i64 noundef 4)
          to label %27 unwind label %35

27:                                               ; preds = %26
  %28 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetFilterEPKfmPf8SimdBool, ptr %28, align 8, !tbaa !18
  %29 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel1x3Block1x4SetInputEPKfmmmmmmmPfm8SimdBool, ptr %29, align 8, !tbaa !39
  %30 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetOutputEPKfmPfmmm8SimdBool, ptr %30, align 8, !tbaa !40
  br label %202

31:                                               ; preds = %2
  %32 = landingpad { ptr, i32 }
          cleanup
  %33 = extractvalue { ptr, i32 } %32, 0
  store ptr %33, ptr %5, align 8
  %34 = extractvalue { ptr, i32 } %32, 1
  store i32 %34, ptr %6, align 4
  br label %223

35:                                               ; preds = %191, %186, %141, %97, %92, %49, %26
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %5, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %6, align 4
  br label %222

39:                                               ; preds = %21, %16
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %40, i32 0, i32 10
  %42 = load i64, ptr %41, align 8, !tbaa !11
  %43 = icmp eq i64 %42, 1
  br i1 %43, label %44, label %54

44:                                               ; preds = %39
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %45, i32 0, i32 11
  %47 = load i64, ptr %46, align 8, !tbaa !17
  %48 = icmp eq i64 %47, 5
  br i1 %48, label %49, label %54

49:                                               ; preds = %44
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 1, i64 noundef 4)
          to label %50 unwind label %35

50:                                               ; preds = %49
  %51 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool, ptr %51, align 8, !tbaa !18
  %52 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool, ptr %52, align 8, !tbaa !39
  %53 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool, ptr %53, align 8, !tbaa !40
  br label %201

54:                                               ; preds = %44, %39
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %55, i32 0, i32 10
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = icmp eq i64 %57, 2
  br i1 %58, label %59, label %103

59:                                               ; preds = %54
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %60, i32 0, i32 11
  %62 = load i64, ptr %61, align 8, !tbaa !17
  %63 = icmp eq i64 %62, 2
  br i1 %63, label %64, label %103

64:                                               ; preds = %59
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %65, i32 0, i32 1
  %67 = load i32, ptr %66, align 8, !tbaa !41
  %68 = icmp ne i32 %67, 0
  br i1 %68, label %69, label %97

69:                                               ; preds = %64
  %70 = load ptr, ptr %4, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %70, i32 0, i32 1
  %72 = load i64, ptr %71, align 8, !tbaa !42
  %73 = icmp uge i64 %72, 8
  br i1 %73, label %74, label %97

74:                                               ; preds = %69
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %75, i32 0, i32 2
  %77 = load i64, ptr %76, align 8, !tbaa !43
  %78 = icmp uge i64 %77, 8
  br i1 %78, label %79, label %97

79:                                               ; preds = %74
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %80, i32 0, i32 1
  %82 = load i64, ptr %81, align 8, !tbaa !42
  %83 = load ptr, ptr %4, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %83, i32 0, i32 2
  %85 = load i64, ptr %84, align 8, !tbaa !43
  %86 = mul i64 %82, %85
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %87, i32 0, i32 3
  %89 = load i64, ptr %88, align 8, !tbaa !44
  %90 = mul i64 %86, %89
  %91 = icmp uge i64 %90, 144
  br i1 %91, label %92, label %97

92:                                               ; preds = %79
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 4, i64 noundef 4)
          to label %93 unwind label %35

93:                                               ; preds = %92
  %94 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetFilterEPKfmPf8SimdBool, ptr %94, align 8, !tbaa !18
  %95 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel2x2Block4x4SetInputEPKfmmmmmmmPfm8SimdBool, ptr %95, align 8, !tbaa !39
  %96 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetOutputEPKfmPfmmm8SimdBool, ptr %96, align 8, !tbaa !40
  br label %102

97:                                               ; preds = %79, %74, %69, %64
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 2, i64 noundef 2)
          to label %98 unwind label %35

98:                                               ; preds = %97
  %99 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetFilterEPKfmPf8SimdBool, ptr %99, align 8, !tbaa !18
  %100 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel2x2Block2x2SetInputEPKfmmmmmmmPfm8SimdBool, ptr %100, align 8, !tbaa !39
  %101 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetOutputEPKfmPfmmm8SimdBool, ptr %101, align 8, !tbaa !40
  br label %102

102:                                              ; preds = %98, %93
  br label %200

103:                                              ; preds = %59, %54
  %104 = load ptr, ptr %4, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %104, i32 0, i32 10
  %106 = load i64, ptr %105, align 8, !tbaa !11
  %107 = icmp eq i64 %106, 3
  br i1 %107, label %108, label %198

108:                                              ; preds = %103
  %109 = load ptr, ptr %4, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %109, i32 0, i32 11
  %111 = load i64, ptr %110, align 8, !tbaa !17
  %112 = icmp eq i64 %111, 3
  br i1 %112, label %113, label %198

113:                                              ; preds = %108
  %114 = load ptr, ptr %4, align 8, !tbaa !5
  %115 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %114, i32 0, i32 1
  %116 = load i32, ptr %115, align 8, !tbaa !41
  %117 = icmp ne i32 %116, 0
  br i1 %117, label %118, label %146

118:                                              ; preds = %113
  %119 = load ptr, ptr %4, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %119, i32 0, i32 1
  %121 = load i64, ptr %120, align 8, !tbaa !42
  %122 = icmp uge i64 %121, 8
  br i1 %122, label %123, label %146

123:                                              ; preds = %118
  %124 = load ptr, ptr %4, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %124, i32 0, i32 2
  %126 = load i64, ptr %125, align 8, !tbaa !43
  %127 = icmp uge i64 %126, 8
  br i1 %127, label %128, label %146

128:                                              ; preds = %123
  %129 = load ptr, ptr %4, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %129, i32 0, i32 1
  %131 = load i64, ptr %130, align 8, !tbaa !42
  %132 = load ptr, ptr %4, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %132, i32 0, i32 2
  %134 = load i64, ptr %133, align 8, !tbaa !43
  %135 = mul i64 %131, %134
  %136 = load ptr, ptr %4, align 8, !tbaa !5
  %137 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %136, i32 0, i32 3
  %138 = load i64, ptr %137, align 8, !tbaa !44
  %139 = mul i64 %135, %138
  %140 = icmp uge i64 %139, 144
  br i1 %140, label %141, label %146

141:                                              ; preds = %128
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 4, i64 noundef 4)
          to label %142 unwind label %35

142:                                              ; preds = %141
  %143 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetFilterEPKfmPf8SimdBool, ptr %143, align 8, !tbaa !18
  %144 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel3x3Block4x4SetInputEPKfmmmmmmmPfm8SimdBool, ptr %144, align 8, !tbaa !39
  %145 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetOutputEPKfmPfmmm8SimdBool, ptr %145, align 8, !tbaa !40
  br label %197

146:                                              ; preds = %128, %123, %118, %113
  %147 = load ptr, ptr %4, align 8, !tbaa !5
  %148 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %147, i32 0, i32 1
  %149 = load i32, ptr %148, align 8, !tbaa !41
  %150 = icmp ne i32 %149, 0
  br i1 %150, label %151, label %191

151:                                              ; preds = %146
  %152 = load ptr, ptr %4, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %152, i32 0, i32 1
  %154 = load i64, ptr %153, align 8, !tbaa !42
  %155 = icmp uge i64 %154, 6
  br i1 %155, label %156, label %191

156:                                              ; preds = %151
  %157 = load ptr, ptr %4, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %157, i32 0, i32 2
  %159 = load i64, ptr %158, align 8, !tbaa !43
  %160 = icmp uge i64 %159, 6
  br i1 %160, label %161, label %191

161:                                              ; preds = %156
  %162 = load ptr, ptr %4, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %162, i32 0, i32 1
  %164 = load i64, ptr %163, align 8, !tbaa !42
  %165 = load ptr, ptr %4, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %165, i32 0, i32 2
  %167 = load i64, ptr %166, align 8, !tbaa !43
  %168 = mul i64 %164, %167
  %169 = load ptr, ptr %4, align 8, !tbaa !5
  %170 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %169, i32 0, i32 3
  %171 = load i64, ptr %170, align 8, !tbaa !44
  %172 = mul i64 %168, %171
  %173 = icmp uge i64 %172, 81
  br i1 %173, label %174, label %191

174:                                              ; preds = %161
  %175 = load ptr, ptr %4, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %175, i32 0, i32 6
  %177 = load i64, ptr %176, align 8, !tbaa !45
  %178 = urem i64 %177, 3
  %179 = icmp eq i64 %178, 0
  br i1 %179, label %180, label %191

180:                                              ; preds = %174
  %181 = load ptr, ptr %4, align 8, !tbaa !5
  %182 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %181, i32 0, i32 7
  %183 = load i64, ptr %182, align 8, !tbaa !46
  %184 = urem i64 %183, 3
  %185 = icmp eq i64 %184, 0
  br i1 %185, label %186, label %191

186:                                              ; preds = %180
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 3, i64 noundef 3)
          to label %187 unwind label %35

187:                                              ; preds = %186
  %188 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetFilterEPKfmPf8SimdBool, ptr %188, align 8, !tbaa !18
  %189 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel3x3Block3x3SetInputEPKfmmmmmmmPfm8SimdBool, ptr %189, align 8, !tbaa !39
  %190 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetOutputEPKfmPfmmm8SimdBool, ptr %190, align 8, !tbaa !40
  br label %196

191:                                              ; preds = %180, %174, %161, %156, %151, %146
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %13, i64 noundef 2, i64 noundef 2)
          to label %192 unwind label %35

192:                                              ; preds = %191
  %193 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 20
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetFilterEPKfmPf8SimdBool, ptr %193, align 8, !tbaa !18
  %194 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 21
  store ptr @_ZN4Simd4Base33WinogradKernel3x3Block2x2SetInputEPKfmmmmmmmPfm8SimdBool, ptr %194, align 8, !tbaa !39
  %195 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fWinograd", ptr %13, i32 0, i32 22
  store ptr @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetOutputEPKfmPfmmm8SimdBool, ptr %195, align 8, !tbaa !40
  br label %196

196:                                              ; preds = %192, %187
  br label %197

197:                                              ; preds = %196, %142
  br label %199

198:                                              ; preds = %108, %103
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 803, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE) #8
  unreachable

199:                                              ; preds = %197
  br label %200

200:                                              ; preds = %199, %102
  br label %201

201:                                              ; preds = %200, %50
  br label %202

202:                                              ; preds = %201, %27
  %203 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %13, i32 0, i32 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #9
  store ptr @_ZN4Simd4Base9Gemm32fNNEmmmPKfS2_mS2_mS2_Pfm, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #9
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #9
  call void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #9
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32) %9, ptr noundef @.str.2, ptr noundef nonnull align 1 dereferenceable(1) %10)
          to label %204 unwind label %208

204:                                              ; preds = %202
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #9
  store ptr null, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %12) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #9
  invoke void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind writable sret(%"class.std::vector.9") align 8 %7, ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(32) %9, ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(32) %12)
          to label %205 unwind label %212

205:                                              ; preds = %204
  invoke void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %203, ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %206 unwind label %216

206:                                              ; preds = %205
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #9
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #9
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #9
  %207 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %13, i32 0, i32 13
  store ptr @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf, ptr %207, align 8, !tbaa !47
  ret void

208:                                              ; preds = %202
  %209 = landingpad { ptr, i32 }
          cleanup
  %210 = extractvalue { ptr, i32 } %209, 0
  store ptr %210, ptr %5, align 8
  %211 = extractvalue { ptr, i32 } %209, 1
  store i32 %211, ptr %6, align 4
  br label %221

212:                                              ; preds = %204
  %213 = landingpad { ptr, i32 }
          cleanup
  %214 = extractvalue { ptr, i32 } %213, 0
  store ptr %214, ptr %5, align 8
  %215 = extractvalue { ptr, i32 } %213, 1
  store i32 %215, ptr %6, align 4
  br label %220

216:                                              ; preds = %205
  %217 = landingpad { ptr, i32 }
          cleanup
  %218 = extractvalue { ptr, i32 } %217, 0
  store ptr %218, ptr %5, align 8
  %219 = extractvalue { ptr, i32 } %217, 1
  store i32 %219, ptr %6, align 4
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #9
  br label %220

220:                                              ; preds = %216, %212
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #9
  br label %221

221:                                              ; preds = %220, %208
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #9
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #9
  br label %222

222:                                              ; preds = %221, %35
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %15) #9
  br label %223

223:                                              ; preds = %222, %31
  call void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440) %13) #9
  br label %224

224:                                              ; preds = %223
  %225 = load ptr, ptr %5, align 8
  %226 = load i32, ptr %6, align 4
  %227 = insertvalue { ptr, i32 } poison, ptr %225, 0
  %228 = insertvalue { ptr, i32 } %227, i32 %226, 1
  resume { ptr, i32 } %228
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624), i64 noundef, i64 noundef) #0 align 2

declare void @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel1x3Block1x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel2x2Block4x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel2x2Block2x2SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block4x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block3x3SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block2x2SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440)) unnamed_addr #7 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { noreturn nounwind }
attributes #9 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 64}
!12 = !{!"_ZTS25SimdConvolutionParameters", !13, i64 0, !13, i64 8, !13, i64 16, !14, i64 24, !15, i64 28, !13, i64 32, !13, i64 40, !13, i64 48, !14, i64 56, !15, i64 60, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !16, i64 152}
!13 = !{!"long", !7, i64 0}
!14 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!17 = !{!12, !13, i64 72}
!18 = !{!19, !6, i64 600}
!19 = !{!"_ZTSN4Simd4Base27SynetConvolution32fWinogradE", !20, i64 0, !13, i64 440, !13, i64 448, !13, i64 456, !13, i64 464, !13, i64 472, !13, i64 480, !13, i64 488, !13, i64 496, !13, i64 504, !13, i64 512, !13, i64 520, !13, i64 528, !13, i64 536, !13, i64 544, !13, i64 552, !13, i64 560, !13, i64 568, !13, i64 576, !25, i64 584, !6, i64 600, !6, i64 608, !6, i64 616}
!20 = !{!"_ZTSN4Simd19SynetConvolution32fE", !21, i64 0, !22, i64 8, !25, i64 192, !26, i64 208, !26, i64 212, !6, i64 216, !6, i64 224, !6, i64 232, !27, i64 240, !34, i64 304, !25, i64 368, !6, i64 384, !6, i64 392, !6, i64 400, !32, i64 408}
!21 = !{!"_ZTSN4Simd9DeletableE"}
!22 = !{!"_ZTSN4Simd9ConvParamE", !12, i64 0, !23, i64 160, !13, i64 168, !24, i64 176}
!23 = !{!"_ZTS8SimdBool", !7, i64 0}
!24 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !13, i64 8}
!26 = !{!"float", !7, i64 0}
!27 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !6, i64 0, !28, i64 8, !32, i64 32}
!28 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !33, i64 0, !13, i64 8, !7, i64 16}
!33 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!34 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !6, i64 0, !35, i64 8, !32, i64 32}
!35 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!39 = !{!19, !6, i64 608}
!40 = !{!19, !6, i64 616}
!41 = !{!22, !23, i64 160}
!42 = !{!12, !13, i64 8}
!43 = !{!12, !13, i64 16}
!44 = !{!22, !13, i64 168}
!45 = !{!12, !13, i64 40}
!46 = !{!12, !13, i64 48}
!47 = !{!20, !6, i64 400}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.9" = type { %"struct.std::_Vector_base.10" }
%"struct.std::_Vector_base.10" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::allocator.0" = type { i8 }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZTVN4Simd4Base27SynetConvolution32fWinogradE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8
@__PRETTY_FUNCTION__._ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE = external hidden unnamed_addr constant [88 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef nonnull align 8 dereferenceable(180)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.9") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #3

declare void @_ZN4Simd4Base9Gemm32fNNEmmmPKfS2_mS2_mS2_Pfm(i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(624) %0, ptr noundef nonnull align 8 dereferenceable(180) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector.9", align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.std::__cxx11::basic_string", align 8
  %6 = alloca %"class.std::allocator.0", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.std::__cxx11::basic_string", align 8
  tail call void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440) %0, ptr noundef nonnull align 8 dereferenceable(180) %1)
  store ptr getelementptr inbounds inrange(-16, 64) (i8, ptr @_ZTVN4Simd4Base27SynetConvolution32fWinogradE, i64 16), ptr %0, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 584
  invoke void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %10 unwind label %18

10:                                               ; preds = %2
  %11 = getelementptr inbounds i8, ptr %1, i64 64
  %12 = load i64, ptr %11, align 8, !tbaa !8
  %13 = icmp eq i64 %12, 1
  %14 = getelementptr inbounds i8, ptr %1, i64 72
  %15 = load i64, ptr %14, align 8
  %16 = icmp eq i64 %15, 3
  %or.cond = select i1 %13, i1 %16, i1 false
  br i1 %or.cond, label %17, label %22

17:                                               ; preds = %10
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 1, i64 noundef 4)
          to label %91 unwind label %20

18:                                               ; preds = %2
  %19 = landingpad { ptr, i32 }
          cleanup
  br label %109

20:                                               ; preds = %89, %88, %66, %46, %45, %24, %17
  %21 = landingpad { ptr, i32 }
          cleanup
  br label %108

22:                                               ; preds = %10
  %23 = icmp eq i64 %15, 5
  %or.cond51 = select i1 %13, i1 %23, i1 false
  br i1 %or.cond51, label %24, label %25

24:                                               ; preds = %22
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 1, i64 noundef 4)
          to label %91 unwind label %20

25:                                               ; preds = %22
  %26 = icmp eq i64 %12, 2
  %27 = icmp eq i64 %15, 2
  %or.cond54 = select i1 %26, i1 %27, i1 false
  br i1 %or.cond54, label %28, label %47

28:                                               ; preds = %25
  %29 = getelementptr inbounds i8, ptr %1, i64 160
  %30 = load i32, ptr %29, align 8, !tbaa !15
  %.not42 = icmp eq i32 %30, 0
  br i1 %.not42, label %46, label %31

31:                                               ; preds = %28
  %32 = getelementptr inbounds i8, ptr %1, i64 8
  %33 = load i64, ptr %32, align 8, !tbaa !19
  %34 = icmp ugt i64 %33, 7
  br i1 %34, label %35, label %46

35:                                               ; preds = %31
  %36 = getelementptr inbounds i8, ptr %1, i64 16
  %37 = load i64, ptr %36, align 8, !tbaa !20
  %38 = icmp ugt i64 %37, 7
  br i1 %38, label %39, label %46

39:                                               ; preds = %35
  %40 = mul i64 %37, %33
  %41 = getelementptr inbounds i8, ptr %1, i64 168
  %42 = load i64, ptr %41, align 8, !tbaa !21
  %43 = mul i64 %40, %42
  %44 = icmp ugt i64 %43, 143
  br i1 %44, label %45, label %46

45:                                               ; preds = %39
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 4, i64 noundef 4)
          to label %91 unwind label %20

46:                                               ; preds = %39, %35, %31, %28
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 2, i64 noundef 2)
          to label %91 unwind label %20

47:                                               ; preds = %25
  %48 = icmp eq i64 %12, 3
  %or.cond57 = select i1 %48, i1 %16, i1 false
  br i1 %or.cond57, label %49, label %90

49:                                               ; preds = %47
  %50 = getelementptr inbounds i8, ptr %1, i64 160
  %51 = load i32, ptr %50, align 8, !tbaa !15
  %.not = icmp eq i32 %51, 0
  br i1 %.not, label %89, label %52

52:                                               ; preds = %49
  %53 = getelementptr inbounds i8, ptr %1, i64 8
  %54 = load i64, ptr %53, align 8, !tbaa !19
  %55 = icmp ugt i64 %54, 7
  br i1 %55, label %56, label %67

56:                                               ; preds = %52
  %57 = getelementptr inbounds i8, ptr %1, i64 16
  %58 = load i64, ptr %57, align 8, !tbaa !20
  %59 = icmp ugt i64 %58, 7
  br i1 %59, label %60, label %.thread

60:                                               ; preds = %56
  %61 = mul i64 %58, %54
  %62 = getelementptr inbounds i8, ptr %1, i64 168
  %63 = load i64, ptr %62, align 8, !tbaa !21
  %64 = mul i64 %61, %63
  %65 = icmp ugt i64 %64, 143
  br i1 %65, label %66, label %.thread

66:                                               ; preds = %60
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 4, i64 noundef 4)
          to label %91 unwind label %20

67:                                               ; preds = %52
  %68 = icmp ugt i64 %54, 5
  br i1 %68, label %.thread, label %89

.thread:                                          ; preds = %56, %60, %67
  %69 = getelementptr inbounds i8, ptr %1, i64 16
  %70 = load i64, ptr %69, align 8, !tbaa !20
  %71 = icmp ugt i64 %70, 5
  br i1 %71, label %72, label %89

72:                                               ; preds = %.thread
  %73 = mul i64 %70, %54
  %74 = getelementptr inbounds i8, ptr %1, i64 168
  %75 = load i64, ptr %74, align 8, !tbaa !21
  %76 = mul i64 %73, %75
  %77 = icmp ugt i64 %76, 80
  br i1 %77, label %78, label %89

78:                                               ; preds = %72
  %79 = getelementptr inbounds i8, ptr %1, i64 40
  %80 = load i64, ptr %79, align 8, !tbaa !22
  %81 = urem i64 %80, 3
  %82 = icmp eq i64 %81, 0
  br i1 %82, label %83, label %89

83:                                               ; preds = %78
  %84 = getelementptr inbounds i8, ptr %1, i64 48
  %85 = load i64, ptr %84, align 8, !tbaa !23
  %86 = urem i64 %85, 3
  %87 = icmp eq i64 %86, 0
  br i1 %87, label %88, label %89

88:                                               ; preds = %83
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 3, i64 noundef 3)
          to label %91 unwind label %20

89:                                               ; preds = %49, %83, %78, %72, %.thread, %67
  invoke void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624) %0, i64 noundef 2, i64 noundef 2)
          to label %91 unwind label %20

90:                                               ; preds = %47
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 803, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base27SynetConvolution32fWinogradC2ERKNS_9ConvParamE) #8
  unreachable

91:                                               ; preds = %89, %88, %66, %46, %45, %24, %17
  %_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool.sink = phi ptr [ @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetFilterEPKfmPf8SimdBool, %17 ], [ @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool, %24 ], [ @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetFilterEPKfmPf8SimdBool, %45 ], [ @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetFilterEPKfmPf8SimdBool, %46 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetFilterEPKfmPf8SimdBool, %66 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetFilterEPKfmPf8SimdBool, %88 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetFilterEPKfmPf8SimdBool, %89 ]
  %_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool.sink = phi ptr [ @_ZN4Simd4Base33WinogradKernel1x3Block1x4SetInputEPKfmmmmmmmPfm8SimdBool, %17 ], [ @_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool, %24 ], [ @_ZN4Simd4Base33WinogradKernel2x2Block4x4SetInputEPKfmmmmmmmPfm8SimdBool, %45 ], [ @_ZN4Simd4Base33WinogradKernel2x2Block2x2SetInputEPKfmmmmmmmPfm8SimdBool, %46 ], [ @_ZN4Simd4Base33WinogradKernel3x3Block4x4SetInputEPKfmmmmmmmPfm8SimdBool, %66 ], [ @_ZN4Simd4Base33WinogradKernel3x3Block3x3SetInputEPKfmmmmmmmPfm8SimdBool, %88 ], [ @_ZN4Simd4Base33WinogradKernel3x3Block2x2SetInputEPKfmmmmmmmPfm8SimdBool, %89 ]
  %_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool.sink = phi ptr [ @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetOutputEPKfmPfmmm8SimdBool, %17 ], [ @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool, %24 ], [ @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetOutputEPKfmPfmmm8SimdBool, %45 ], [ @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetOutputEPKfmPfmmm8SimdBool, %46 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetOutputEPKfmPfmmm8SimdBool, %66 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetOutputEPKfmPfmmm8SimdBool, %88 ], [ @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetOutputEPKfmPfmmm8SimdBool, %89 ]
  %92 = getelementptr inbounds i8, ptr %0, i64 600
  store ptr %_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool.sink, ptr %92, align 8, !tbaa !24
  %93 = getelementptr inbounds i8, ptr %0, i64 608
  store ptr %_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool.sink, ptr %93, align 8, !tbaa !43
  %94 = getelementptr inbounds i8, ptr %0, i64 616
  store ptr %_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool.sink, ptr %94, align 8, !tbaa !44
  %95 = getelementptr inbounds i8, ptr %0, i64 240
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #9
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #9
  store ptr @_ZN4Simd4Base9Gemm32fNNEmmmPKfS2_mS2_mS2_Pfm, ptr %4, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #9
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #9
  call void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #9
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull @.str.2, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %96 unwind label %100

96:                                               ; preds = %91
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #9
  store ptr null, ptr %7, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %8) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #9
  invoke void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.9") align 8 %3, ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(32) %8)
          to label %97 unwind label %102

97:                                               ; preds = %96
  invoke void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %95, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %98 unwind label %104

98:                                               ; preds = %97
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #9
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #9
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #9
  %99 = getelementptr inbounds i8, ptr %0, i64 400
  store ptr @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf, ptr %99, align 8, !tbaa !46
  ret void

100:                                              ; preds = %91
  %101 = landingpad { ptr, i32 }
          cleanup
  br label %107

102:                                              ; preds = %96
  %103 = landingpad { ptr, i32 }
          cleanup
  br label %106

104:                                              ; preds = %97
  %105 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #9
  br label %106

106:                                              ; preds = %104, %102
  %.pn = phi { ptr, i32 } [ %105, %104 ], [ %103, %102 ]
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #9
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #9
  br label %107

107:                                              ; preds = %106, %100
  %.pn.pn = phi { ptr, i32 } [ %.pn, %106 ], [ %101, %100 ]
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #9
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #9
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #9
  br label %108

108:                                              ; preds = %107, %20
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %107 ], [ %21, %20 ]
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %9) #9
  br label %109

109:                                              ; preds = %108, %18
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %108 ], [ %19, %18 ]
  call void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440) %0) #9
  resume { ptr, i32 } %.pn.pn.pn.pn
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base27SynetConvolution32fWinograd8SetBlockEmm(ptr noundef nonnull align 8 dereferenceable(624), i64 noundef, i64 noundef) local_unnamed_addr #0 align 2

declare void @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel1x3Block1x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x3Block1x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel1x5Block1x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel1x5Block1x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel2x2Block4x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block4x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel2x2Block2x2SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel2x2Block2x2SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block4x4SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block4x4SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block3x3SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block3x3SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetFilterEPKfmPf8SimdBool(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #4

declare void @_ZN4Simd4Base33WinogradKernel3x3Block2x2SetInputEPKfmmmmmmmPfm8SimdBool(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) #4

declare void @_ZN4Simd4Base34WinogradKernel3x3Block2x2SetOutputEPKfmPfmmm8SimdBool(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440)) unnamed_addr #7 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { noreturn nounwind }
attributes #9 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 64}
!9 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !12, i64 24, !13, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !12, i64 56, !13, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !14, i64 152}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !11, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !11, i64 0}
!14 = !{!"_ZTS29SimdConvolutionActivationType", !11, i64 0}
!15 = !{!16, !17, i64 160}
!16 = !{!"_ZTSN4Simd9ConvParamE", !9, i64 0, !17, i64 160, !10, i64 168, !18, i64 176}
!17 = !{!"_ZTS8SimdBool", !11, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !11, i64 0}
!19 = !{!9, !10, i64 8}
!20 = !{!9, !10, i64 16}
!21 = !{!16, !10, i64 168}
!22 = !{!9, !10, i64 40}
!23 = !{!9, !10, i64 48}
!24 = !{!25, !29, i64 600}
!25 = !{!"_ZTSN4Simd4Base27SynetConvolution32fWinogradE", !26, i64 0, !10, i64 440, !10, i64 448, !10, i64 456, !10, i64 464, !10, i64 472, !10, i64 480, !10, i64 488, !10, i64 496, !10, i64 504, !10, i64 512, !10, i64 520, !10, i64 528, !10, i64 536, !10, i64 544, !10, i64 552, !10, i64 560, !10, i64 568, !10, i64 576, !28, i64 584, !29, i64 600, !29, i64 608, !29, i64 616}
!26 = !{!"_ZTSN4Simd19SynetConvolution32fE", !27, i64 0, !16, i64 8, !28, i64 192, !30, i64 208, !30, i64 212, !29, i64 216, !29, i64 224, !29, i64 232, !31, i64 240, !38, i64 304, !28, i64 368, !29, i64 384, !29, i64 392, !29, i64 400, !36, i64 408}
!27 = !{!"_ZTSN4Simd9DeletableE"}
!28 = !{!"_ZTSN4Simd5ArrayIfEE", !29, i64 0, !10, i64 8}
!29 = !{!"any pointer", !11, i64 0}
!30 = !{!"float", !11, i64 0}
!31 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !29, i64 0, !32, i64 8, !36, i64 32}
!32 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !29, i64 0, !29, i64 8, !29, i64 16}
!36 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !37, i64 0, !10, i64 8, !11, i64 16}
!37 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !29, i64 0}
!38 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !29, i64 0, !39, i64 8, !36, i64 32}
!39 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !40, i64 0}
!40 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !29, i64 0, !29, i64 8, !29, i64 16}
!43 = !{!25, !29, i64 608}
!44 = !{!25, !29, i64 616}
!45 = !{!29, !29, i64 0}
!46 = !{!26, !29, i64 400}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass