; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseStatistic.ll (ZN4Simd4Base15GetAbsDyRowSumsEPKhmmmPj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base15GetAbsDyRowSumsEPKhmmmPj(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %17, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = load i64, ptr %7, align 8, !tbaa !9
  %20 = getelementptr inbounds i8, ptr %18, i64 %19
  store ptr %20, ptr %12, align 8, !tbaa !5
  %21 = load i64, ptr %9, align 8, !tbaa !9
  %22 = add i64 %21, -1
  store i64 %22, ptr %9, align 8, !tbaa !9
  %23 = load ptr, ptr %10, align 8, !tbaa !5
  %24 = load i64, ptr %9, align 8, !tbaa !9
  %25 = getelementptr inbounds i32, ptr %23, i64 %24
  store i32 0, ptr %25, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store i64 0, ptr %13, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %65, %5
  %27 = load i64, ptr %13, align 8, !tbaa !9
  %28 = load i64, ptr %9, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %68

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  store i64 0, ptr %16, align 8, !tbaa !9
  br label %32

32:                                               ; preds = %51, %31
  %33 = load i64, ptr %16, align 8, !tbaa !9
  %34 = load i64, ptr %8, align 8, !tbaa !9
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  br label %54

37:                                               ; preds = %32
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = load i64, ptr %16, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %38, i64 %39
  %41 = load i8, ptr %40, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = load ptr, ptr %12, align 8, !tbaa !5
  %44 = load i64, ptr %16, align 8, !tbaa !9
  %45 = getelementptr inbounds i8, ptr %43, i64 %44
  %46 = load i8, ptr %45, align 1, !tbaa !13
  %47 = zext i8 %46 to i32
  %48 = call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %42, i32 noundef %47)
  %49 = load i32, ptr %15, align 4, !tbaa !11
  %50 = add i32 %49, %48
  store i32 %50, ptr %15, align 4, !tbaa !11
  br label %51

51:                                               ; preds = %37
  %52 = load i64, ptr %16, align 8, !tbaa !9
  %53 = add i64 %52, 1
  store i64 %53, ptr %16, align 8, !tbaa !9
  br label %32, !llvm.loop !14

54:                                               ; preds = %36
  %55 = load i32, ptr %15, align 4, !tbaa !11
  %56 = load ptr, ptr %10, align 8, !tbaa !5
  %57 = load i64, ptr %13, align 8, !tbaa !9
  %58 = getelementptr inbounds i32, ptr %56, i64 %57
  store i32 %55, ptr %58, align 4, !tbaa !11
  %59 = load i64, ptr %7, align 8, !tbaa !9
  %60 = load ptr, ptr %11, align 8, !tbaa !5
  %61 = getelementptr inbounds i8, ptr %60, i64 %59
  store ptr %61, ptr %11, align 8, !tbaa !5
  %62 = load i64, ptr %7, align 8, !tbaa !9
  %63 = load ptr, ptr %12, align 8, !tbaa !5
  %64 = getelementptr inbounds i8, ptr %63, i64 %62
  store ptr %64, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %65

65:                                               ; preds = %54
  %66 = load i64, ptr %13, align 8, !tbaa !9
  %67 = add i64 %66, 1
  store i64 %67, ptr %13, align 8, !tbaa !9
  br label %26, !llvm.loop !16

68:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base15GetAbsDyRowSumsEPKhmmmPj(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 {
  %6 = add i64 %3, -1
  %7 = getelementptr inbounds i32, ptr %4, i64 %6
  store i32 0, ptr %7, align 4, !tbaa !5
  %.not = icmp eq i64 %6, 0
  br i1 %.not, label %._crit_edge33, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %5
  %.not34 = icmp eq i64 %2, 0
  br i1 %.not34, label %.preheader.preheader, label %.preheader.us

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %8 = shl i64 %3, 2
  %9 = add i64 %8, -4
  tail call void @llvm.memset.p0.i64(ptr nonnull align 4 %4, i8 0, i64 %9, i1 false), !tbaa !5
  br label %._crit_edge33

.preheader.us:                                    ; preds = %.preheader.lr.ph, %._crit_edge.us
  %.02532.us.pn = phi ptr [ %.02532.us, %._crit_edge.us ], [ %0, %.preheader.lr.ph ]
  %.02431.us = phi i64 [ %21, %._crit_edge.us ], [ 0, %.preheader.lr.ph ]
  %.02532.us = getelementptr i8, ptr %.02532.us.pn, i64 %1
  br label %10

10:                                               ; preds = %.preheader.us, %10
  %.028.us = phi i64 [ 0, %.preheader.us ], [ %19, %10 ]
  %.02327.us = phi i32 [ 0, %.preheader.us ], [ %18, %10 ]
  %11 = getelementptr inbounds i8, ptr %.02532.us.pn, i64 %.028.us
  %12 = load i8, ptr %11, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = getelementptr inbounds i8, ptr %.02532.us, i64 %.028.us
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = tail call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %13, i32 noundef %16)
  %18 = add i32 %17, %.02327.us
  %19 = add nuw i64 %.028.us, 1
  %exitcond.not = icmp eq i64 %19, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %10, !llvm.loop !10

._crit_edge.us:                                   ; preds = %10
  %20 = getelementptr inbounds i32, ptr %4, i64 %.02431.us
  store i32 %18, ptr %20, align 4, !tbaa !5
  %21 = add nuw i64 %.02431.us, 1
  %exitcond36.not = icmp eq i64 %21, %6
  br i1 %exitcond36.not, label %._crit_edge33, label %.preheader.us, !llvm.loop !12

._crit_edge33:                                    ; preds = %._crit_edge.us, %.preheader.preheader, %5
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass