; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseTexture.ll (ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [30 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm = external hidden unnamed_addr constant [109 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5, i64 noundef %6) #2 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !11
  store ptr %5, ptr %13, align 8, !tbaa !5
  store i64 %6, ptr %14, align 8, !tbaa !9
  %20 = load i32, ptr %12, align 4, !tbaa !11
  %21 = icmp sgt i32 %20, -255
  br i1 %21, label %22, label %25

22:                                               ; preds = %7
  %23 = load i32, ptr %12, align 4, !tbaa !11
  %24 = icmp slt i32 %23, 255
  br label %25

25:                                               ; preds = %22, %7
  %26 = phi i1 [ false, %7 ], [ %24, %22 ]
  br i1 %26, label %27, label %28

27:                                               ; preds = %25
  br label %30

28:                                               ; preds = %25
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 104, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm) #5
  unreachable

29:                                               ; No predecessors!
  br label %30

30:                                               ; preds = %29, %27
  %31 = load i32, ptr %12, align 4, !tbaa !11
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %45

33:                                               ; preds = %30
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = load ptr, ptr %13, align 8, !tbaa !5
  %36 = icmp ne ptr %34, %35
  br i1 %36, label %37, label %44

37:                                               ; preds = %33
  %38 = load ptr, ptr %8, align 8, !tbaa !5
  %39 = load i64, ptr %9, align 8, !tbaa !9
  %40 = load i64, ptr %10, align 8, !tbaa !9
  %41 = load i64, ptr %11, align 8, !tbaa !9
  %42 = load ptr, ptr %13, align 8, !tbaa !5
  %43 = load i64, ptr %14, align 8, !tbaa !9
  call void @_ZN4Simd4Base4CopyEPKhmmmmPhm(ptr noundef %38, i64 noundef %39, i64 noundef %40, i64 noundef %41, i64 noundef 1, ptr noundef %42, i64 noundef %43)
  br label %44

44:                                               ; preds = %37, %33
  br label %131

45:                                               ; preds = %30
  %46 = load i32, ptr %12, align 4, !tbaa !11
  %47 = icmp sgt i32 %46, 0
  br i1 %47, label %48, label %87

48:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  store i64 0, ptr %15, align 8, !tbaa !9
  br label %49

49:                                               ; preds = %83, %48
  %50 = load i64, ptr %15, align 8, !tbaa !9
  %51 = load i64, ptr %11, align 8, !tbaa !9
  %52 = icmp ult i64 %50, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %49
  store i32 2, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  br label %86

54:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #6
  store i64 0, ptr %17, align 8, !tbaa !9
  br label %55

55:                                               ; preds = %73, %54
  %56 = load i64, ptr %17, align 8, !tbaa !9
  %57 = load i64, ptr %10, align 8, !tbaa !9
  %58 = icmp ult i64 %56, %57
  br i1 %58, label %60, label %59

59:                                               ; preds = %55
  store i32 5, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #6
  br label %76

60:                                               ; preds = %55
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = load i64, ptr %17, align 8, !tbaa !9
  %63 = getelementptr inbounds i8, ptr %61, i64 %62
  %64 = load i8, ptr %63, align 1, !tbaa !13
  %65 = zext i8 %64 to i32
  %66 = load i32, ptr %12, align 4, !tbaa !11
  %67 = add nsw i32 %65, %66
  %68 = call noundef i32 @_ZN4Simd4Base3MinEii(i32 noundef %67, i32 noundef 255)
  %69 = trunc i32 %68 to i8
  %70 = load ptr, ptr %13, align 8, !tbaa !5
  %71 = load i64, ptr %17, align 8, !tbaa !9
  %72 = getelementptr inbounds i8, ptr %70, i64 %71
  store i8 %69, ptr %72, align 1, !tbaa !13
  br label %73

73:                                               ; preds = %60
  %74 = load i64, ptr %17, align 8, !tbaa !9
  %75 = add i64 %74, 1
  store i64 %75, ptr %17, align 8, !tbaa !9
  br label %55, !llvm.loop !14

76:                                               ; preds = %59
  %77 = load i64, ptr %9, align 8, !tbaa !9
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 %77
  store ptr %79, ptr %8, align 8, !tbaa !5
  %80 = load i64, ptr %14, align 8, !tbaa !9
  %81 = load ptr, ptr %13, align 8, !tbaa !5
  %82 = getelementptr inbounds i8, ptr %81, i64 %80
  store ptr %82, ptr %13, align 8, !tbaa !5
  br label %83

83:                                               ; preds = %76
  %84 = load i64, ptr %15, align 8, !tbaa !9
  %85 = add i64 %84, 1
  store i64 %85, ptr %15, align 8, !tbaa !9
  br label %49, !llvm.loop !16

86:                                               ; preds = %53
  br label %130

87:                                               ; preds = %45
  %88 = load i32, ptr %12, align 4, !tbaa !11
  %89 = icmp slt i32 %88, 0
  br i1 %89, label %90, label %129

90:                                               ; preds = %87
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #6
  store i64 0, ptr %18, align 8, !tbaa !9
  br label %91

91:                                               ; preds = %125, %90
  %92 = load i64, ptr %18, align 8, !tbaa !9
  %93 = load i64, ptr %11, align 8, !tbaa !9
  %94 = icmp ult i64 %92, %93
  br i1 %94, label %96, label %95

95:                                               ; preds = %91
  store i32 8, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #6
  br label %128

96:                                               ; preds = %91
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #6
  store i64 0, ptr %19, align 8, !tbaa !9
  br label %97

97:                                               ; preds = %115, %96
  %98 = load i64, ptr %19, align 8, !tbaa !9
  %99 = load i64, ptr %10, align 8, !tbaa !9
  %100 = icmp ult i64 %98, %99
  br i1 %100, label %102, label %101

101:                                              ; preds = %97
  store i32 11, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #6
  br label %118

102:                                              ; preds = %97
  %103 = load ptr, ptr %8, align 8, !tbaa !5
  %104 = load i64, ptr %19, align 8, !tbaa !9
  %105 = getelementptr inbounds i8, ptr %103, i64 %104
  %106 = load i8, ptr %105, align 1, !tbaa !13
  %107 = zext i8 %106 to i32
  %108 = load i32, ptr %12, align 4, !tbaa !11
  %109 = add nsw i32 %107, %108
  %110 = call noundef i32 @_ZN4Simd4Base3MaxEii(i32 noundef %109, i32 noundef 0)
  %111 = trunc i32 %110 to i8
  %112 = load ptr, ptr %13, align 8, !tbaa !5
  %113 = load i64, ptr %19, align 8, !tbaa !9
  %114 = getelementptr inbounds i8, ptr %112, i64 %113
  store i8 %111, ptr %114, align 1, !tbaa !13
  br label %115

115:                                              ; preds = %102
  %116 = load i64, ptr %19, align 8, !tbaa !9
  %117 = add i64 %116, 1
  store i64 %117, ptr %19, align 8, !tbaa !9
  br label %97, !llvm.loop !17

118:                                              ; preds = %101
  %119 = load i64, ptr %9, align 8, !tbaa !9
  %120 = load ptr, ptr %8, align 8, !tbaa !5
  %121 = getelementptr inbounds i8, ptr %120, i64 %119
  store ptr %121, ptr %8, align 8, !tbaa !5
  %122 = load i64, ptr %14, align 8, !tbaa !9
  %123 = load ptr, ptr %13, align 8, !tbaa !5
  %124 = getelementptr inbounds i8, ptr %123, i64 %122
  store ptr %124, ptr %13, align 8, !tbaa !5
  br label %125

125:                                              ; preds = %118
  %126 = load i64, ptr %18, align 8, !tbaa !9
  %127 = add i64 %126, 1
  store i64 %127, ptr %18, align 8, !tbaa !9
  br label %91, !llvm.loop !18

128:                                              ; preds = %95
  br label %129

129:                                              ; preds = %128, %87
  br label %130

130:                                              ; preds = %129, %86
  br label %131

131:                                              ; preds = %130, %44
  ret void
}

declare void @_ZN4Simd4Base4CopyEPKhmmmmPhm(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MinEii(i32 noundef, i32 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MaxEii(i32 noundef, i32 noundef) #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [30 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm = external hidden unnamed_addr constant [109 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5, i64 noundef %6) local_unnamed_addr #1 {
  %8 = add i32 %4, 254
  %9 = icmp ult i32 %8, 509
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 104, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base26TexturePerformCompensationEPKhmmmiPhm) #4
  unreachable

11:                                               ; preds = %7
  %12 = icmp eq i32 %4, 0
  br i1 %12, label %13, label %15

13:                                               ; preds = %11
  %.not = icmp eq ptr %0, %5
  br i1 %.not, label %.loopexit, label %14

14:                                               ; preds = %13
  tail call void @_ZN4Simd4Base4CopyEPKhmmmmPhm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef 1, ptr noundef %5, i64 noundef %6)
  br label %.loopexit

15:                                               ; preds = %11
  %16 = icmp sgt i32 %4, 0
  %.not66 = icmp eq i64 %3, 0
  %.not67 = icmp eq i64 %2, 0
  %or.cond = or i1 %.not66, %.not67
  br i1 %16, label %.preheader51, label %29

.preheader51:                                     ; preds = %15
  br i1 %or.cond, label %.loopexit, label %.preheader.us

.preheader.us:                                    ; preds = %.preheader51, %._crit_edge.us63
  %.04462.us = phi i64 [ %28, %._crit_edge.us63 ], [ 0, %.preheader51 ]
  %.04561.us = phi ptr [ %26, %._crit_edge.us63 ], [ %0, %.preheader51 ]
  %.04660.us = phi ptr [ %27, %._crit_edge.us63 ], [ %5, %.preheader51 ]
  br label %17

17:                                               ; preds = %.preheader.us, %17
  %.04359.us = phi i64 [ 0, %.preheader.us ], [ %25, %17 ]
  %18 = getelementptr inbounds i8, ptr %.04561.us, i64 %.04359.us
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = add nuw nsw i32 %20, %4
  %22 = tail call noundef i32 @_ZN4Simd4Base3MinEii(i32 noundef %21, i32 noundef 255)
  %23 = trunc i32 %22 to i8
  %24 = getelementptr inbounds i8, ptr %.04660.us, i64 %.04359.us
  store i8 %23, ptr %24, align 1, !tbaa !5
  %25 = add nuw i64 %.04359.us, 1
  %exitcond72.not = icmp eq i64 %25, %2
  br i1 %exitcond72.not, label %._crit_edge.us63, label %17, !llvm.loop !8

._crit_edge.us63:                                 ; preds = %17
  %26 = getelementptr inbounds i8, ptr %.04561.us, i64 %1
  %27 = getelementptr inbounds i8, ptr %.04660.us, i64 %6
  %28 = add nuw i64 %.04462.us, 1
  %exitcond73.not = icmp eq i64 %28, %3
  br i1 %exitcond73.not, label %.loopexit, label %.preheader.us, !llvm.loop !10

29:                                               ; preds = %15
  br i1 %or.cond, label %.loopexit, label %.preheader52.us

.preheader52.us:                                  ; preds = %29, %._crit_edge.us
  %.04258.us = phi i64 [ %41, %._crit_edge.us ], [ 0, %29 ]
  %.157.us = phi ptr [ %39, %._crit_edge.us ], [ %0, %29 ]
  %.14756.us = phi ptr [ %40, %._crit_edge.us ], [ %5, %29 ]
  br label %30

30:                                               ; preds = %.preheader52.us, %30
  %.055.us = phi i64 [ 0, %.preheader52.us ], [ %38, %30 ]
  %31 = getelementptr inbounds i8, ptr %.157.us, i64 %.055.us
  %32 = load i8, ptr %31, align 1, !tbaa !5
  %33 = zext i8 %32 to i32
  %34 = add nsw i32 %33, %4
  %35 = tail call noundef i32 @_ZN4Simd4Base3MaxEii(i32 noundef %34, i32 noundef 0)
  %36 = trunc i32 %35 to i8
  %37 = getelementptr inbounds i8, ptr %.14756.us, i64 %.055.us
  store i8 %36, ptr %37, align 1, !tbaa !5
  %38 = add nuw i64 %.055.us, 1
  %exitcond.not = icmp eq i64 %38, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %30, !llvm.loop !11

._crit_edge.us:                                   ; preds = %30
  %39 = getelementptr inbounds i8, ptr %.157.us, i64 %1
  %40 = getelementptr inbounds i8, ptr %.14756.us, i64 %6
  %41 = add nuw i64 %.04258.us, 1
  %exitcond71.not = icmp eq i64 %41, %3
  br i1 %exitcond71.not, label %.loopexit, label %.preheader52.us, !llvm.loop !12

.loopexit:                                        ; preds = %._crit_edge.us, %._crit_edge.us63, %.preheader51, %29, %13, %14
  ret void
}

declare void @_ZN4Simd4Base4CopyEPKhmmmmPhm(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MinEii(i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MaxEii(i32 noundef, i32 noundef) local_unnamed_addr #3

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !9}
!12 = distinct !{!12, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass