; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_evex_compute_mem_2reg_general.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_evex_compute_mem_2reg_general(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i16 noundef zeroext %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i16, align 2
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca [3 x i32], align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i8, align 1
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store i16 %4, ptr %13, align 2, !tbaa !11
  store i32 %5, ptr %14, align 4, !tbaa !9
  store i32 %6, ptr %15, align 4, !tbaa !9
  store i32 %7, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 2, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %21) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 4 @__const.test_evex_compute_mem_2reg_general.displ, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %29 = load i32, ptr %14, align 4, !tbaa !9
  %30 = icmp eq i32 %29, 8
  %31 = zext i1 %30 to i64
  %32 = select i1 %30, i32 1, i32 0
  store i32 %32, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  %33 = load i32, ptr %15, align 4, !tbaa !9
  %34 = icmp eq i32 %33, 0
  %35 = zext i1 %34 to i64
  %36 = select i1 %34, i32 8, i32 1
  store i32 %36, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  %37 = load i32, ptr %16, align 4, !tbaa !9
  %38 = icmp ne i32 %37, 0
  %39 = zext i1 %38 to i64
  %40 = select i1 %38, i32 1, i32 2
  store i32 %40, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %28) #4
  store i8 122, ptr %28, align 1, !tbaa !13
  %41 = load ptr, ptr %10, align 8, !tbaa !5
  %42 = load ptr, ptr %9, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %41, ptr noundef %42)
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %144, %8
  %44 = load i32, ptr %19, align 4, !tbaa !9
  %45 = icmp ult i32 %44, 16
  br i1 %45, label %46, label %147

46:                                               ; preds = %43
  %47 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %47, ptr %23, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %140, %46
  %49 = load i32, ptr %23, align 4, !tbaa !9
  %50 = load i32, ptr %14, align 4, !tbaa !9
  %51 = icmp ult i32 %49, %50
  br i1 %51, label %52, label %143

52:                                               ; preds = %48
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %136, %52
  %54 = load i32, ptr %18, align 4, !tbaa !9
  %55 = load i32, ptr %26, align 4, !tbaa !9
  %56 = icmp ult i32 %54, %55
  br i1 %56, label %57, label %139

57:                                               ; preds = %53
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %58

58:                                               ; preds = %132, %57
  %59 = load i32, ptr %22, align 4, !tbaa !9
  %60 = icmp ult i32 %59, 3
  br i1 %60, label %61, label %135

61:                                               ; preds = %58
  store i32 0, ptr %24, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %128, %61
  %63 = load i32, ptr %24, align 4, !tbaa !9
  %64 = load i32, ptr %27, align 4, !tbaa !9
  %65 = icmp ult i32 %63, %64
  br i1 %65, label %66, label %131

66:                                               ; preds = %62
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %82

69:                                               ; preds = %66
  %70 = load ptr, ptr %10, align 8, !tbaa !5
  %71 = load i32, ptr %11, align 4, !tbaa !9
  %72 = load i8, ptr %28, align 1, !tbaa !13
  %73 = load i32, ptr %19, align 4, !tbaa !9
  %74 = load i32, ptr %22, align 4, !tbaa !9
  %75 = zext i32 %74 to i64
  %76 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %75
  %77 = load i32, ptr %76, align 4, !tbaa !9
  %78 = load i32, ptr %24, align 4, !tbaa !9
  %79 = load i32, ptr %18, align 4, !tbaa !9
  %80 = load i16, ptr %13, align 2, !tbaa !11
  %81 = zext i16 %80 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %70, i32 noundef %71, i8 noundef signext %72, i32 noundef %73, i32 noundef 127, i32 noundef 0, i32 noundef %77, i32 noundef %78, i32 noundef 255, i32 noundef 255, i32 noundef %79, i32 noundef 0, i32 noundef %81)
  br label %127

82:                                               ; preds = %66
  %83 = load i32, ptr %12, align 4, !tbaa !9
  %84 = icmp eq i32 %83, 1
  br i1 %84, label %85, label %99

85:                                               ; preds = %82
  %86 = load ptr, ptr %10, align 8, !tbaa !5
  %87 = load i32, ptr %11, align 4, !tbaa !9
  %88 = load i8, ptr %28, align 1, !tbaa !13
  %89 = load i32, ptr %19, align 4, !tbaa !9
  %90 = load i32, ptr %22, align 4, !tbaa !9
  %91 = zext i32 %90 to i64
  %92 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %91
  %93 = load i32, ptr %92, align 4, !tbaa !9
  %94 = load i32, ptr %24, align 4, !tbaa !9
  %95 = load i32, ptr %23, align 4, !tbaa !9
  %96 = load i32, ptr %18, align 4, !tbaa !9
  %97 = load i16, ptr %13, align 2, !tbaa !11
  %98 = zext i16 %97 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %86, i32 noundef %87, i8 noundef signext %88, i32 noundef %89, i32 noundef 127, i32 noundef 0, i32 noundef %93, i32 noundef %94, i32 noundef 255, i32 noundef %95, i32 noundef %96, i32 noundef 0, i32 noundef %98)
  br label %126

99:                                               ; preds = %82
  %100 = load ptr, ptr %10, align 8, !tbaa !5
  %101 = load i32, ptr %11, align 4, !tbaa !9
  %102 = load i8, ptr %28, align 1, !tbaa !13
  %103 = load i32, ptr %19, align 4, !tbaa !9
  %104 = load i32, ptr %22, align 4, !tbaa !9
  %105 = zext i32 %104 to i64
  %106 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %105
  %107 = load i32, ptr %106, align 4, !tbaa !9
  %108 = load i32, ptr %24, align 4, !tbaa !9
  %109 = load i32, ptr %23, align 4, !tbaa !9
  %110 = load i32, ptr %18, align 4, !tbaa !9
  %111 = load i16, ptr %13, align 2, !tbaa !11
  %112 = zext i16 %111 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %100, i32 noundef %101, i8 noundef signext %102, i32 noundef %103, i32 noundef 127, i32 noundef 0, i32 noundef %107, i32 noundef %108, i32 noundef %109, i32 noundef 0, i32 noundef %110, i32 noundef 0, i32 noundef %112)
  %113 = load ptr, ptr %10, align 8, !tbaa !5
  %114 = load i32, ptr %11, align 4, !tbaa !9
  %115 = load i8, ptr %28, align 1, !tbaa !13
  %116 = load i32, ptr %19, align 4, !tbaa !9
  %117 = load i32, ptr %22, align 4, !tbaa !9
  %118 = zext i32 %117 to i64
  %119 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !9
  %121 = load i32, ptr %24, align 4, !tbaa !9
  %122 = load i32, ptr %23, align 4, !tbaa !9
  %123 = load i32, ptr %18, align 4, !tbaa !9
  %124 = load i16, ptr %13, align 2, !tbaa !11
  %125 = zext i16 %124 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %113, i32 noundef %114, i8 noundef signext %115, i32 noundef %116, i32 noundef 127, i32 noundef 0, i32 noundef %120, i32 noundef %121, i32 noundef 0, i32 noundef %122, i32 noundef %123, i32 noundef 0, i32 noundef %125)
  br label %126

126:                                              ; preds = %99, %85
  br label %127

127:                                              ; preds = %126, %69
  br label %128

128:                                              ; preds = %127
  %129 = load i32, ptr %24, align 4, !tbaa !9
  %130 = add i32 %129, 1
  store i32 %130, ptr %24, align 4, !tbaa !9
  br label %62, !llvm.loop !14

131:                                              ; preds = %62
  br label %132

132:                                              ; preds = %131
  %133 = load i32, ptr %22, align 4, !tbaa !9
  %134 = add i32 %133, 1
  store i32 %134, ptr %22, align 4, !tbaa !9
  br label %58, !llvm.loop !16

135:                                              ; preds = %58
  br label %136

136:                                              ; preds = %135
  %137 = load i32, ptr %18, align 4, !tbaa !9
  %138 = add i32 %137, 1
  store i32 %138, ptr %18, align 4, !tbaa !9
  br label %53, !llvm.loop !17

139:                                              ; preds = %53
  br label %140

140:                                              ; preds = %139
  %141 = load i32, ptr %23, align 4, !tbaa !9
  %142 = add i32 %141, 1
  store i32 %142, ptr %23, align 4, !tbaa !9
  br label %48, !llvm.loop !18

143:                                              ; preds = %48
  br label %144

144:                                              ; preds = %143
  %145 = load i32, ptr %19, align 4, !tbaa !9
  %146 = add i32 %145, 1
  store i32 %146, ptr %19, align 4, !tbaa !9
  br label %43, !llvm.loop !19

147:                                              ; preds = %43
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %148

148:                                              ; preds = %265, %147
  %149 = load i32, ptr %19, align 4, !tbaa !9
  %150 = icmp ult i32 %149, 16
  br i1 %150, label %151, label %268

151:                                              ; preds = %148
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %152

152:                                              ; preds = %261, %151
  %153 = load i32, ptr %17, align 4, !tbaa !9
  %154 = icmp ult i32 %153, 16
  br i1 %154, label %155, label %264

155:                                              ; preds = %152
  %156 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %156, ptr %23, align 4, !tbaa !9
  br label %157

157:                                              ; preds = %257, %155
  %158 = load i32, ptr %23, align 4, !tbaa !9
  %159 = load i32, ptr %14, align 4, !tbaa !9
  %160 = icmp ult i32 %158, %159
  br i1 %160, label %161, label %260

161:                                              ; preds = %157
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %162

162:                                              ; preds = %253, %161
  %163 = load i32, ptr %18, align 4, !tbaa !9
  %164 = load i32, ptr %26, align 4, !tbaa !9
  %165 = icmp ult i32 %163, %164
  br i1 %165, label %166, label %256

166:                                              ; preds = %162
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %167

167:                                              ; preds = %249, %166
  %168 = load i32, ptr %22, align 4, !tbaa !9
  %169 = icmp ult i32 %168, 3
  br i1 %169, label %170, label %252

170:                                              ; preds = %167
  store i32 0, ptr %24, align 4, !tbaa !9
  br label %171

171:                                              ; preds = %245, %170
  %172 = load i32, ptr %24, align 4, !tbaa !9
  %173 = load i32, ptr %27, align 4, !tbaa !9
  %174 = icmp ult i32 %172, %173
  br i1 %174, label %175, label %248

175:                                              ; preds = %171
  %176 = load i32, ptr %12, align 4, !tbaa !9
  %177 = icmp eq i32 %176, 0
  br i1 %177, label %178, label %193

178:                                              ; preds = %175
  %179 = load ptr, ptr %10, align 8, !tbaa !5
  %180 = load i32, ptr %11, align 4, !tbaa !9
  %181 = load i8, ptr %28, align 1, !tbaa !13
  %182 = load i32, ptr %19, align 4, !tbaa !9
  %183 = load i32, ptr %17, align 4, !tbaa !9
  %184 = load i32, ptr %20, align 4, !tbaa !9
  %185 = load i32, ptr %22, align 4, !tbaa !9
  %186 = zext i32 %185 to i64
  %187 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %186
  %188 = load i32, ptr %187, align 4, !tbaa !9
  %189 = load i32, ptr %24, align 4, !tbaa !9
  %190 = load i32, ptr %18, align 4, !tbaa !9
  %191 = load i16, ptr %13, align 2, !tbaa !11
  %192 = zext i16 %191 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %179, i32 noundef %180, i8 noundef signext %181, i32 noundef %182, i32 noundef %183, i32 noundef %184, i32 noundef %188, i32 noundef %189, i32 noundef 255, i32 noundef 255, i32 noundef %190, i32 noundef 0, i32 noundef %192)
  br label %244

193:                                              ; preds = %175
  %194 = load i32, ptr %12, align 4, !tbaa !9
  %195 = icmp eq i32 %194, 1
  br i1 %195, label %196, label %212

196:                                              ; preds = %193
  %197 = load ptr, ptr %10, align 8, !tbaa !5
  %198 = load i32, ptr %11, align 4, !tbaa !9
  %199 = load i8, ptr %28, align 1, !tbaa !13
  %200 = load i32, ptr %19, align 4, !tbaa !9
  %201 = load i32, ptr %17, align 4, !tbaa !9
  %202 = load i32, ptr %20, align 4, !tbaa !9
  %203 = load i32, ptr %22, align 4, !tbaa !9
  %204 = zext i32 %203 to i64
  %205 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %204
  %206 = load i32, ptr %205, align 4, !tbaa !9
  %207 = load i32, ptr %24, align 4, !tbaa !9
  %208 = load i32, ptr %23, align 4, !tbaa !9
  %209 = load i32, ptr %18, align 4, !tbaa !9
  %210 = load i16, ptr %13, align 2, !tbaa !11
  %211 = zext i16 %210 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %197, i32 noundef %198, i8 noundef signext %199, i32 noundef %200, i32 noundef %201, i32 noundef %202, i32 noundef %206, i32 noundef %207, i32 noundef 255, i32 noundef %208, i32 noundef %209, i32 noundef 0, i32 noundef %211)
  br label %243

212:                                              ; preds = %193
  %213 = load ptr, ptr %10, align 8, !tbaa !5
  %214 = load i32, ptr %11, align 4, !tbaa !9
  %215 = load i8, ptr %28, align 1, !tbaa !13
  %216 = load i32, ptr %19, align 4, !tbaa !9
  %217 = load i32, ptr %17, align 4, !tbaa !9
  %218 = load i32, ptr %20, align 4, !tbaa !9
  %219 = load i32, ptr %22, align 4, !tbaa !9
  %220 = zext i32 %219 to i64
  %221 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %220
  %222 = load i32, ptr %221, align 4, !tbaa !9
  %223 = load i32, ptr %24, align 4, !tbaa !9
  %224 = load i32, ptr %23, align 4, !tbaa !9
  %225 = load i32, ptr %18, align 4, !tbaa !9
  %226 = load i16, ptr %13, align 2, !tbaa !11
  %227 = zext i16 %226 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %213, i32 noundef %214, i8 noundef signext %215, i32 noundef %216, i32 noundef %217, i32 noundef %218, i32 noundef %222, i32 noundef %223, i32 noundef %224, i32 noundef 0, i32 noundef %225, i32 noundef 0, i32 noundef %227)
  %228 = load ptr, ptr %10, align 8, !tbaa !5
  %229 = load i32, ptr %11, align 4, !tbaa !9
  %230 = load i8, ptr %28, align 1, !tbaa !13
  %231 = load i32, ptr %19, align 4, !tbaa !9
  %232 = load i32, ptr %17, align 4, !tbaa !9
  %233 = load i32, ptr %20, align 4, !tbaa !9
  %234 = load i32, ptr %22, align 4, !tbaa !9
  %235 = zext i32 %234 to i64
  %236 = getelementptr inbounds [3 x i32], ptr %21, i64 0, i64 %235
  %237 = load i32, ptr %236, align 4, !tbaa !9
  %238 = load i32, ptr %24, align 4, !tbaa !9
  %239 = load i32, ptr %23, align 4, !tbaa !9
  %240 = load i32, ptr %18, align 4, !tbaa !9
  %241 = load i16, ptr %13, align 2, !tbaa !11
  %242 = zext i16 %241 to i32
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %228, i32 noundef %229, i8 noundef signext %230, i32 noundef %231, i32 noundef %232, i32 noundef %233, i32 noundef %237, i32 noundef %238, i32 noundef 0, i32 noundef %239, i32 noundef %240, i32 noundef 0, i32 noundef %242)
  br label %243

243:                                              ; preds = %212, %196
  br label %244

244:                                              ; preds = %243, %178
  br label %245

245:                                              ; preds = %244
  %246 = load i32, ptr %24, align 4, !tbaa !9
  %247 = add i32 %246, 1
  store i32 %247, ptr %24, align 4, !tbaa !9
  br label %171, !llvm.loop !20

248:                                              ; preds = %171
  br label %249

249:                                              ; preds = %248
  %250 = load i32, ptr %22, align 4, !tbaa !9
  %251 = add i32 %250, 1
  store i32 %251, ptr %22, align 4, !tbaa !9
  br label %167, !llvm.loop !21

252:                                              ; preds = %167
  br label %253

253:                                              ; preds = %252
  %254 = load i32, ptr %18, align 4, !tbaa !9
  %255 = add i32 %254, 1
  store i32 %255, ptr %18, align 4, !tbaa !9
  br label %162, !llvm.loop !22

256:                                              ; preds = %162
  br label %257

257:                                              ; preds = %256
  %258 = load i32, ptr %23, align 4, !tbaa !9
  %259 = add i32 %258, 1
  store i32 %259, ptr %23, align 4, !tbaa !9
  br label %157, !llvm.loop !23

260:                                              ; preds = %157
  br label %261

261:                                              ; preds = %260
  %262 = load i32, ptr %17, align 4, !tbaa !9
  %263 = add i32 %262, 1
  store i32 %263, ptr %17, align 4, !tbaa !9
  br label %152, !llvm.loop !24

264:                                              ; preds = %152
  br label %265

265:                                              ; preds = %264
  %266 = load i32, ptr %19, align 4, !tbaa !9
  %267 = add i32 %266, 1
  store i32 %267, ptr %19, align 4, !tbaa !9
  br label %148, !llvm.loop !25

268:                                              ; preds = %148
  %269 = load ptr, ptr %10, align 8, !tbaa !5
  %270 = load ptr, ptr %9, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %269, ptr noundef %270)
  call void @llvm.lifetime.end.p0(i64 1, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}
!19 = distinct !{!19, !15}
!20 = distinct !{!20, !15}
!21 = distinct !{!21, !15}
!22 = distinct !{!22, !15}
!23 = distinct !{!23, !15}
!24 = distinct !{!24, !15}
!25 = distinct !{!25, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_evex_compute_mem_2reg_general.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_evex_compute_mem_2reg_general(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i16 noundef zeroext %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #0 {
  %9 = icmp eq i32 %5, 8
  %10 = zext i1 %9 to i32
  %11 = icmp eq i32 %6, 0
  %12 = select i1 %11, i32 8, i32 1
  %.not = icmp eq i32 %7, 0
  %13 = select i1 %.not, i32 2, i32 1
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %14 = icmp ult i32 %10, %5
  %15 = zext i16 %4 to i32
  br i1 %14, label %.split.us, label %.split238.us

.split.us:                                        ; preds = %8
  %.pre300.pre.pre = load i32, ptr @__const.test_evex_compute_mem_2reg_general.displ, align 4, !tbaa !5
  %16 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_compute_mem_2reg_general.displ, i64 4), align 4
  %17 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_compute_mem_2reg_general.displ, i64 8), align 4
  switch i32 %3, label %.preheader137.us [
    i32 0, label %.preheader137.us.us
    i32 1, label %.preheader137.us.us176
  ]

.preheader137.us.us:                              ; preds = %.split.us, %._crit_edge.split.us.us.us
  %.0119167.us.us = phi i32 [ %24, %._crit_edge.split.us.us.us ], [ %3, %.split.us ]
  br label %.preheader136.us.us.us

.preheader136.us.us.us:                           ; preds = %.split.us.us.us.us, %.preheader137.us.us
  %.0125159.us.us.us = phi i32 [ %10, %.preheader137.us.us ], [ %23, %.split.us.us.us.us ]
  br label %.preheader135.us.us.us.us

.preheader135.us.us.us.us:                        ; preds = %.split.us.us.us.us.us.us.2, %.preheader136.us.us.us
  %.0118149.us.us.us.us = phi i32 [ 0, %.preheader136.us.us.us ], [ %22, %.split.us.us.us.us.us.us.2 ]
  br label %18

18:                                               ; preds = %18, %.preheader135.us.us.us.us
  %.0123138.us.us.us.us.us.us = phi i32 [ 0, %.preheader135.us.us.us.us ], [ %19, %18 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre300.pre.pre, i32 noundef %.0123138.us.us.us.us.us.us, i32 noundef 255, i32 noundef 255, i32 noundef %.0118149.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %19 = add nuw nsw i32 %.0123138.us.us.us.us.us.us, 1
  %exitcond257.not = icmp eq i32 %19, %13
  br i1 %exitcond257.not, label %.split.us.us.us.us.us.us, label %18, !llvm.loop !9

.split.us.us.us.us.us.us:                         ; preds = %18, %.split.us.us.us.us.us.us
  %.0123138.us.us.us.us.us.us.1 = phi i32 [ %20, %.split.us.us.us.us.us.us ], [ 0, %18 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us, i32 noundef 127, i32 noundef 0, i32 noundef %16, i32 noundef %.0123138.us.us.us.us.us.us.1, i32 noundef 255, i32 noundef 255, i32 noundef %.0118149.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %20 = add nuw nsw i32 %.0123138.us.us.us.us.us.us.1, 1
  %exitcond257.1.not = icmp eq i32 %20, %13
  br i1 %exitcond257.1.not, label %.split.us.us.us.us.us.us.1, label %.split.us.us.us.us.us.us, !llvm.loop !9

.split.us.us.us.us.us.us.1:                       ; preds = %.split.us.us.us.us.us.us, %.split.us.us.us.us.us.us.1
  %.0123138.us.us.us.us.us.us.2 = phi i32 [ %21, %.split.us.us.us.us.us.us.1 ], [ 0, %.split.us.us.us.us.us.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us, i32 noundef 127, i32 noundef 0, i32 noundef %17, i32 noundef %.0123138.us.us.us.us.us.us.2, i32 noundef 255, i32 noundef 255, i32 noundef %.0118149.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %21 = add nuw nsw i32 %.0123138.us.us.us.us.us.us.2, 1
  %exitcond257.2.not = icmp eq i32 %21, %13
  br i1 %exitcond257.2.not, label %.split.us.us.us.us.us.us.2, label %.split.us.us.us.us.us.us.1, !llvm.loop !9

.split.us.us.us.us.us.us.2:                       ; preds = %.split.us.us.us.us.us.us.1
  %22 = add nuw nsw i32 %.0118149.us.us.us.us, 1
  %exitcond261.not = icmp eq i32 %22, %12
  br i1 %exitcond261.not, label %.split.us.us.us.us, label %.preheader135.us.us.us.us, !llvm.loop !11

.split.us.us.us.us:                               ; preds = %.split.us.us.us.us.us.us.2
  %23 = add nuw i32 %.0125159.us.us.us, 1
  %exitcond262.not = icmp eq i32 %23, %5
  br i1 %exitcond262.not, label %._crit_edge.split.us.us.us, label %.preheader136.us.us.us, !llvm.loop !12

._crit_edge.split.us.us.us:                       ; preds = %.split.us.us.us.us
  %24 = add nuw nsw i32 %.0119167.us.us, 1
  %exitcond263.not = icmp eq i32 %24, 16
  br i1 %exitcond263.not, label %.preheader133, label %.preheader137.us.us, !llvm.loop !13

.preheader137.us.us176:                           ; preds = %.split.us, %._crit_edge.split.split.us.us.us
  %.0119167.us.us177 = phi i32 [ %31, %._crit_edge.split.split.us.us.us ], [ 0, %.split.us ]
  br label %.preheader136.us163.us.us

.preheader136.us163.us.us:                        ; preds = %.split.split158.us.us.us.us, %.preheader137.us.us176
  %.0125159.us164.us.us = phi i32 [ %10, %.preheader137.us.us176 ], [ %30, %.split.split158.us.us.us.us ]
  br label %.preheader135.us153.us.us.us

.preheader135.us153.us.us.us:                     ; preds = %.split.split.us.us.us.us.us.us.2, %.preheader136.us163.us.us
  %.0118149.us154.us.us.us = phi i32 [ 0, %.preheader136.us163.us.us ], [ %29, %.split.split.us.us.us.us.us.us.2 ]
  br label %25

25:                                               ; preds = %25, %.preheader135.us153.us.us.us
  %.0123138.us140.us.us.us.us.us = phi i32 [ 0, %.preheader135.us153.us.us.us ], [ %26, %25 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us177, i32 noundef 127, i32 noundef 0, i32 noundef %.pre300.pre.pre, i32 noundef %.0123138.us140.us.us.us.us.us, i32 noundef 255, i32 noundef %.0125159.us164.us.us, i32 noundef %.0118149.us154.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %26 = add nuw nsw i32 %.0123138.us140.us.us.us.us.us, 1
  %exitcond.not = icmp eq i32 %26, %13
  br i1 %exitcond.not, label %.split.split.us.us.us.us.us.us, label %25, !llvm.loop !9

.split.split.us.us.us.us.us.us:                   ; preds = %25, %.split.split.us.us.us.us.us.us
  %.0123138.us140.us.us.us.us.us.1 = phi i32 [ %27, %.split.split.us.us.us.us.us.us ], [ 0, %25 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us177, i32 noundef 127, i32 noundef 0, i32 noundef %16, i32 noundef %.0123138.us140.us.us.us.us.us.1, i32 noundef 255, i32 noundef %.0125159.us164.us.us, i32 noundef %.0118149.us154.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %27 = add nuw nsw i32 %.0123138.us140.us.us.us.us.us.1, 1
  %exitcond.1.not = icmp eq i32 %27, %13
  br i1 %exitcond.1.not, label %.split.split.us.us.us.us.us.us.1, label %.split.split.us.us.us.us.us.us, !llvm.loop !9

.split.split.us.us.us.us.us.us.1:                 ; preds = %.split.split.us.us.us.us.us.us, %.split.split.us.us.us.us.us.us.1
  %.0123138.us140.us.us.us.us.us.2 = phi i32 [ %28, %.split.split.us.us.us.us.us.us.1 ], [ 0, %.split.split.us.us.us.us.us.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us.us177, i32 noundef 127, i32 noundef 0, i32 noundef %17, i32 noundef %.0123138.us140.us.us.us.us.us.2, i32 noundef 255, i32 noundef %.0125159.us164.us.us, i32 noundef %.0118149.us154.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %28 = add nuw nsw i32 %.0123138.us140.us.us.us.us.us.2, 1
  %exitcond.2.not = icmp eq i32 %28, %13
  br i1 %exitcond.2.not, label %.split.split.us.us.us.us.us.us.2, label %.split.split.us.us.us.us.us.us.1, !llvm.loop !9

.split.split.us.us.us.us.us.us.2:                 ; preds = %.split.split.us.us.us.us.us.us.1
  %29 = add nuw nsw i32 %.0118149.us154.us.us.us, 1
  %exitcond253.not = icmp eq i32 %29, %12
  br i1 %exitcond253.not, label %.split.split158.us.us.us.us, label %.preheader135.us153.us.us.us, !llvm.loop !11

.split.split158.us.us.us.us:                      ; preds = %.split.split.us.us.us.us.us.us.2
  %30 = add nuw i32 %.0125159.us164.us.us, 1
  %exitcond254.not = icmp eq i32 %30, %5
  br i1 %exitcond254.not, label %._crit_edge.split.split.us.us.us, label %.preheader136.us163.us.us, !llvm.loop !12

._crit_edge.split.split.us.us.us:                 ; preds = %.split.split158.us.us.us.us
  %31 = add nuw nsw i32 %.0119167.us.us177, 1
  %exitcond255.not = icmp eq i32 %31, 16
  br i1 %exitcond255.not, label %.preheader133, label %.preheader137.us.us176, !llvm.loop !13

.preheader137.us:                                 ; preds = %.split.us, %._crit_edge.split.split.us172
  %.0119167.us = phi i32 [ %38, %._crit_edge.split.split.us172 ], [ 0, %.split.us ]
  br label %.preheader136.us170

.split.split158.us:                               ; preds = %.split.split.us.2
  %32 = add nuw i32 %.0125159.us171, 1
  %exitcond270.not = icmp eq i32 %32, %5
  br i1 %exitcond270.not, label %._crit_edge.split.split.us172, label %.preheader136.us170, !llvm.loop !12

.split.split.us:                                  ; preds = %36, %.split.split.us
  %.0123138.us.1 = phi i32 [ %33, %.split.split.us ], [ 0, %36 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %16, i32 noundef %.0123138.us.1, i32 noundef %.0125159.us171, i32 noundef 0, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %16, i32 noundef %.0123138.us.1, i32 noundef 0, i32 noundef %.0125159.us171, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  %33 = add nuw nsw i32 %.0123138.us.1, 1
  %exitcond265.1.not = icmp eq i32 %33, %13
  br i1 %exitcond265.1.not, label %.split.split.us.1, label %.split.split.us, !llvm.loop !9

.split.split.us.1:                                ; preds = %.split.split.us, %.split.split.us.1
  %.0123138.us.2 = phi i32 [ %34, %.split.split.us.1 ], [ 0, %.split.split.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %17, i32 noundef %.0123138.us.2, i32 noundef %.0125159.us171, i32 noundef 0, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %17, i32 noundef %.0123138.us.2, i32 noundef 0, i32 noundef %.0125159.us171, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  %34 = add nuw nsw i32 %.0123138.us.2, 1
  %exitcond265.2.not = icmp eq i32 %34, %13
  br i1 %exitcond265.2.not, label %.split.split.us.2, label %.split.split.us.1, !llvm.loop !9

.split.split.us.2:                                ; preds = %.split.split.us.1
  %35 = add nuw nsw i32 %.0118149.us, 1
  %exitcond269.not = icmp eq i32 %35, %12
  br i1 %exitcond269.not, label %.split.split158.us, label %.preheader135.us, !llvm.loop !11

36:                                               ; preds = %.preheader135.us, %36
  %.0123138.us = phi i32 [ 0, %.preheader135.us ], [ %37, %36 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre300.pre.pre, i32 noundef %.0123138.us, i32 noundef %.0125159.us171, i32 noundef 0, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.0119167.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre300.pre.pre, i32 noundef %.0123138.us, i32 noundef 0, i32 noundef %.0125159.us171, i32 noundef %.0118149.us, i32 noundef 0, i32 noundef %15) #2
  %37 = add nuw nsw i32 %.0123138.us, 1
  %exitcond265.not = icmp eq i32 %37, %13
  br i1 %exitcond265.not, label %.split.split.us, label %36, !llvm.loop !9

.preheader135.us:                                 ; preds = %.preheader136.us170, %.split.split.us.2
  %.0118149.us = phi i32 [ 0, %.preheader136.us170 ], [ %35, %.split.split.us.2 ]
  br label %36

.preheader136.us170:                              ; preds = %.preheader137.us, %.split.split158.us
  %.0125159.us171 = phi i32 [ %10, %.preheader137.us ], [ %32, %.split.split158.us ]
  br label %.preheader135.us

._crit_edge.split.split.us172:                    ; preds = %.split.split158.us
  %38 = add nuw nsw i32 %.0119167.us, 1
  %exitcond271.not = icmp eq i32 %38, 16
  br i1 %exitcond271.not, label %.preheader133, label %.preheader137.us, !llvm.loop !13

.preheader133:                                    ; preds = %._crit_edge.split.split.us.us.us, %._crit_edge.split.us.us.us, %._crit_edge.split.split.us172
  br i1 %14, label %.preheader133.split231.us, label %.split238.us

.preheader133.split231.us:                        ; preds = %.preheader133
  %.pre303.pre.pre.pre = load i32, ptr @__const.test_evex_compute_mem_2reg_general.displ, align 4, !tbaa !5
  %39 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_compute_mem_2reg_general.displ, i64 4), align 4
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_compute_mem_2reg_general.displ, i64 8), align 4
  switch i32 %3, label %.preheader132.us [
    i32 0, label %.preheader132.us.us
    i32 1, label %.preheader132.us.us240
  ]

.preheader132.us.us:                              ; preds = %.preheader133.split231.us, %.split220.us.split.us.us.us
  %.1120228.us.us = phi i32 [ %48, %.split220.us.split.us.us.us ], [ %3, %.preheader133.split231.us ]
  br label %.preheader131.us.us.us.us

.preheader131.us.us.us.us:                        ; preds = %._crit_edge.split.us.us.us221.us.us, %.preheader132.us.us
  %.0211.us.us.us.us = phi i32 [ 0, %.preheader132.us.us ], [ %47, %._crit_edge.split.us.us.us221.us.us ]
  br label %.preheader130.us.us.us.us.us

.preheader130.us.us.us.us.us:                     ; preds = %.split197.us.us.us.us.us.us, %.preheader131.us.us.us.us
  %.1126203.us.us.us.us.us = phi i32 [ %10, %.preheader131.us.us.us.us ], [ %46, %.split197.us.us.us.us.us.us ]
  br label %.preheader129.us.us.us.us.us.us

.preheader129.us.us.us.us.us.us:                  ; preds = %.split182.us.us.us.us.us.us.us.us.2, %.preheader130.us.us.us.us.us
  %.1193.us.us.us.us.us.us = phi i32 [ 0, %.preheader130.us.us.us.us.us ], [ %45, %.split182.us.us.us.us.us.us.us.us.2 ]
  br label %41

41:                                               ; preds = %41, %.preheader129.us.us.us.us.us.us
  %.1124180.us.us.us.us.us.us.us.us = phi i32 [ 0, %.preheader129.us.us.us.us.us.us ], [ %42, %41 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us, i32 noundef %.0211.us.us.us.us, i32 noundef 2, i32 noundef %.pre303.pre.pre.pre, i32 noundef %.1124180.us.us.us.us.us.us.us.us, i32 noundef 255, i32 noundef 255, i32 noundef %.1193.us.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %42 = add nuw nsw i32 %.1124180.us.us.us.us.us.us.us.us, 1
  %exitcond282.not = icmp eq i32 %42, %13
  br i1 %exitcond282.not, label %.split182.us.us.us.us.us.us.us.us, label %41, !llvm.loop !14

.split182.us.us.us.us.us.us.us.us:                ; preds = %41, %.split182.us.us.us.us.us.us.us.us
  %.1124180.us.us.us.us.us.us.us.us.1 = phi i32 [ %43, %.split182.us.us.us.us.us.us.us.us ], [ 0, %41 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us, i32 noundef %.0211.us.us.us.us, i32 noundef 2, i32 noundef %39, i32 noundef %.1124180.us.us.us.us.us.us.us.us.1, i32 noundef 255, i32 noundef 255, i32 noundef %.1193.us.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %43 = add nuw nsw i32 %.1124180.us.us.us.us.us.us.us.us.1, 1
  %exitcond282.1.not = icmp eq i32 %43, %13
  br i1 %exitcond282.1.not, label %.split182.us.us.us.us.us.us.us.us.1, label %.split182.us.us.us.us.us.us.us.us, !llvm.loop !14

.split182.us.us.us.us.us.us.us.us.1:              ; preds = %.split182.us.us.us.us.us.us.us.us, %.split182.us.us.us.us.us.us.us.us.1
  %.1124180.us.us.us.us.us.us.us.us.2 = phi i32 [ %44, %.split182.us.us.us.us.us.us.us.us.1 ], [ 0, %.split182.us.us.us.us.us.us.us.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us, i32 noundef %.0211.us.us.us.us, i32 noundef 2, i32 noundef %40, i32 noundef %.1124180.us.us.us.us.us.us.us.us.2, i32 noundef 255, i32 noundef 255, i32 noundef %.1193.us.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %44 = add nuw nsw i32 %.1124180.us.us.us.us.us.us.us.us.2, 1
  %exitcond282.2.not = icmp eq i32 %44, %13
  br i1 %exitcond282.2.not, label %.split182.us.us.us.us.us.us.us.us.2, label %.split182.us.us.us.us.us.us.us.us.1, !llvm.loop !14

.split182.us.us.us.us.us.us.us.us.2:              ; preds = %.split182.us.us.us.us.us.us.us.us.1
  %45 = add nuw nsw i32 %.1193.us.us.us.us.us.us, 1
  %exitcond286.not = icmp eq i32 %45, %12
  br i1 %exitcond286.not, label %.split197.us.us.us.us.us.us, label %.preheader129.us.us.us.us.us.us, !llvm.loop !15

.split197.us.us.us.us.us.us:                      ; preds = %.split182.us.us.us.us.us.us.us.us.2
  %46 = add nuw i32 %.1126203.us.us.us.us.us, 1
  %exitcond287.not = icmp eq i32 %46, %5
  br i1 %exitcond287.not, label %._crit_edge.split.us.us.us221.us.us, label %.preheader130.us.us.us.us.us, !llvm.loop !16

._crit_edge.split.us.us.us221.us.us:              ; preds = %.split197.us.us.us.us.us.us
  %47 = add nuw nsw i32 %.0211.us.us.us.us, 1
  %exitcond288.not = icmp eq i32 %47, 16
  br i1 %exitcond288.not, label %.split220.us.split.us.us.us, label %.preheader131.us.us.us.us, !llvm.loop !17

.split220.us.split.us.us.us:                      ; preds = %._crit_edge.split.us.us.us221.us.us
  %48 = add nuw nsw i32 %.1120228.us.us, 1
  %exitcond289.not = icmp eq i32 %48, 16
  br i1 %exitcond289.not, label %.split238.us, label %.preheader132.us.us, !llvm.loop !18

.preheader132.us.us240:                           ; preds = %.preheader133.split231.us, %.split220.us.split.split.us.us.us
  %.1120228.us.us241 = phi i32 [ %56, %.split220.us.split.split.us.us.us ], [ 0, %.preheader133.split231.us ]
  br label %.preheader131.us.us223.us.us

.preheader131.us.us223.us.us:                     ; preds = %._crit_edge.split.split.us.us.us227.us.us, %.preheader132.us.us240
  %.0211.us.us224.us.us = phi i32 [ 0, %.preheader132.us.us240 ], [ %55, %._crit_edge.split.split.us.us.us227.us.us ]
  br label %.preheader130.us207.us.us.us.us

.preheader130.us207.us.us.us.us:                  ; preds = %.split197.split.us.us.us.us.us.us, %.preheader131.us.us223.us.us
  %.1126203.us208.us.us.us.us = phi i32 [ %10, %.preheader131.us.us223.us.us ], [ %54, %.split197.split.us.us.us.us.us.us ]
  br label %.preheader129.us199.us.us.us.us.us

.preheader129.us199.us.us.us.us.us:               ; preds = %.split182.split.us.us.us.us.us.us.us.us.2, %.preheader130.us207.us.us.us.us
  %.1193.us200.us.us.us.us.us = phi i32 [ 0, %.preheader130.us207.us.us.us.us ], [ %53, %.split182.split.us.us.us.us.us.us.us.us.2 ]
  br label %49

49:                                               ; preds = %49, %.preheader129.us199.us.us.us.us.us
  %.1124180.us184.us.us.us.us.us.us.us = phi i32 [ 0, %.preheader129.us199.us.us.us.us.us ], [ %50, %49 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us241, i32 noundef %.0211.us.us224.us.us, i32 noundef 2, i32 noundef %.pre303.pre.pre.pre, i32 noundef %.1124180.us184.us.us.us.us.us.us.us, i32 noundef 255, i32 noundef %.1126203.us208.us.us.us.us, i32 noundef %.1193.us200.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %50 = add nuw nsw i32 %.1124180.us184.us.us.us.us.us.us.us, 1
  %exitcond273.not = icmp eq i32 %50, %13
  br i1 %exitcond273.not, label %.split182.split.us.us.us.us.us.us.us.us, label %49, !llvm.loop !14

.split182.split.us.us.us.us.us.us.us.us:          ; preds = %49, %.split182.split.us.us.us.us.us.us.us.us
  %.1124180.us184.us.us.us.us.us.us.us.1 = phi i32 [ %51, %.split182.split.us.us.us.us.us.us.us.us ], [ 0, %49 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us241, i32 noundef %.0211.us.us224.us.us, i32 noundef 2, i32 noundef %39, i32 noundef %.1124180.us184.us.us.us.us.us.us.us.1, i32 noundef 255, i32 noundef %.1126203.us208.us.us.us.us, i32 noundef %.1193.us200.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %51 = add nuw nsw i32 %.1124180.us184.us.us.us.us.us.us.us.1, 1
  %exitcond273.1.not = icmp eq i32 %51, %13
  br i1 %exitcond273.1.not, label %.split182.split.us.us.us.us.us.us.us.us.1, label %.split182.split.us.us.us.us.us.us.us.us, !llvm.loop !14

.split182.split.us.us.us.us.us.us.us.us.1:        ; preds = %.split182.split.us.us.us.us.us.us.us.us, %.split182.split.us.us.us.us.us.us.us.us.1
  %.1124180.us184.us.us.us.us.us.us.us.2 = phi i32 [ %52, %.split182.split.us.us.us.us.us.us.us.us.1 ], [ 0, %.split182.split.us.us.us.us.us.us.us.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us.us241, i32 noundef %.0211.us.us224.us.us, i32 noundef 2, i32 noundef %40, i32 noundef %.1124180.us184.us.us.us.us.us.us.us.2, i32 noundef 255, i32 noundef %.1126203.us208.us.us.us.us, i32 noundef %.1193.us200.us.us.us.us.us, i32 noundef 0, i32 noundef %15) #2
  %52 = add nuw nsw i32 %.1124180.us184.us.us.us.us.us.us.us.2, 1
  %exitcond273.2.not = icmp eq i32 %52, %13
  br i1 %exitcond273.2.not, label %.split182.split.us.us.us.us.us.us.us.us.2, label %.split182.split.us.us.us.us.us.us.us.us.1, !llvm.loop !14

.split182.split.us.us.us.us.us.us.us.us.2:        ; preds = %.split182.split.us.us.us.us.us.us.us.us.1
  %53 = add nuw nsw i32 %.1193.us200.us.us.us.us.us, 1
  %exitcond277.not = icmp eq i32 %53, %12
  br i1 %exitcond277.not, label %.split197.split.us.us.us.us.us.us, label %.preheader129.us199.us.us.us.us.us, !llvm.loop !15

.split197.split.us.us.us.us.us.us:                ; preds = %.split182.split.us.us.us.us.us.us.us.us.2
  %54 = add nuw i32 %.1126203.us208.us.us.us.us, 1
  %exitcond278.not = icmp eq i32 %54, %5
  br i1 %exitcond278.not, label %._crit_edge.split.split.us.us.us227.us.us, label %.preheader130.us207.us.us.us.us, !llvm.loop !16

._crit_edge.split.split.us.us.us227.us.us:        ; preds = %.split197.split.us.us.us.us.us.us
  %55 = add nuw nsw i32 %.0211.us.us224.us.us, 1
  %exitcond279.not = icmp eq i32 %55, 16
  br i1 %exitcond279.not, label %.split220.us.split.split.us.us.us, label %.preheader131.us.us223.us.us, !llvm.loop !17

.split220.us.split.split.us.us.us:                ; preds = %._crit_edge.split.split.us.us.us227.us.us
  %56 = add nuw nsw i32 %.1120228.us.us241, 1
  %exitcond280.not = icmp eq i32 %56, 16
  br i1 %exitcond280.not, label %.split238.us, label %.preheader132.us.us240, !llvm.loop !18

.preheader132.us:                                 ; preds = %.preheader133.split231.us, %.split220.us.split.split.us234
  %.1120228.us = phi i32 [ %64, %.split220.us.split.split.us234 ], [ 0, %.preheader133.split231.us ]
  br label %.preheader131.us.us232

.preheader131.us.us232:                           ; preds = %.preheader132.us, %._crit_edge.split.split.us216.us
  %.0211.us.us233 = phi i32 [ 0, %.preheader132.us ], [ %63, %._crit_edge.split.split.us216.us ]
  br label %.preheader130.us214.us

.split197.split.us.us:                            ; preds = %.split182.split.us.us.2
  %57 = add nuw i32 %.1126203.us215.us, 1
  %exitcond296.not = icmp eq i32 %57, %5
  br i1 %exitcond296.not, label %._crit_edge.split.split.us216.us, label %.preheader130.us214.us, !llvm.loop !16

.split182.split.us.us:                            ; preds = %61, %.split182.split.us.us
  %.1124180.us.us.1 = phi i32 [ %58, %.split182.split.us.us ], [ 0, %61 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %39, i32 noundef %.1124180.us.us.1, i32 noundef %.1126203.us215.us, i32 noundef 0, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %39, i32 noundef %.1124180.us.us.1, i32 noundef 0, i32 noundef %.1126203.us215.us, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  %58 = add nuw nsw i32 %.1124180.us.us.1, 1
  %exitcond291.1.not = icmp eq i32 %58, %13
  br i1 %exitcond291.1.not, label %.split182.split.us.us.1, label %.split182.split.us.us, !llvm.loop !14

.split182.split.us.us.1:                          ; preds = %.split182.split.us.us, %.split182.split.us.us.1
  %.1124180.us.us.2 = phi i32 [ %59, %.split182.split.us.us.1 ], [ 0, %.split182.split.us.us ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %40, i32 noundef %.1124180.us.us.2, i32 noundef %.1126203.us215.us, i32 noundef 0, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %40, i32 noundef %.1124180.us.us.2, i32 noundef 0, i32 noundef %.1126203.us215.us, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  %59 = add nuw nsw i32 %.1124180.us.us.2, 1
  %exitcond291.2.not = icmp eq i32 %59, %13
  br i1 %exitcond291.2.not, label %.split182.split.us.us.2, label %.split182.split.us.us.1, !llvm.loop !14

.split182.split.us.us.2:                          ; preds = %.split182.split.us.us.1
  %60 = add nuw nsw i32 %.1193.us.us, 1
  %exitcond295.not = icmp eq i32 %60, %12
  br i1 %exitcond295.not, label %.split197.split.us.us, label %.preheader129.us.us, !llvm.loop !15

61:                                               ; preds = %.preheader129.us.us, %61
  %.1124180.us.us = phi i32 [ 0, %.preheader129.us.us ], [ %62, %61 ]
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %.pre303.pre.pre.pre, i32 noundef %.1124180.us.us, i32 noundef %.1126203.us215.us, i32 noundef 0, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 122, i32 noundef %.1120228.us, i32 noundef %.0211.us.us233, i32 noundef 2, i32 noundef %.pre303.pre.pre.pre, i32 noundef %.1124180.us.us, i32 noundef 0, i32 noundef %.1126203.us215.us, i32 noundef %.1193.us.us, i32 noundef 0, i32 noundef %15) #2
  %62 = add nuw nsw i32 %.1124180.us.us, 1
  %exitcond291.not = icmp eq i32 %62, %13
  br i1 %exitcond291.not, label %.split182.split.us.us, label %61, !llvm.loop !14

.preheader129.us.us:                              ; preds = %.preheader130.us214.us, %.split182.split.us.us.2
  %.1193.us.us = phi i32 [ 0, %.preheader130.us214.us ], [ %60, %.split182.split.us.us.2 ]
  br label %61

.preheader130.us214.us:                           ; preds = %.split197.split.us.us, %.preheader131.us.us232
  %.1126203.us215.us = phi i32 [ %10, %.preheader131.us.us232 ], [ %57, %.split197.split.us.us ]
  br label %.preheader129.us.us

._crit_edge.split.split.us216.us:                 ; preds = %.split197.split.us.us
  %63 = add nuw nsw i32 %.0211.us.us233, 1
  %exitcond297.not = icmp eq i32 %63, 16
  br i1 %exitcond297.not, label %.split220.us.split.split.us234, label %.preheader131.us.us232, !llvm.loop !17

.split220.us.split.split.us234:                   ; preds = %._crit_edge.split.split.us216.us
  %64 = add nuw nsw i32 %.1120228.us, 1
  %exitcond298.not = icmp eq i32 %64, 16
  br i1 %exitcond298.not, label %.split238.us, label %.preheader132.us, !llvm.loop !18

.split238.us:                                     ; preds = %.split220.us.split.split.us.us.us, %.split220.us.split.us.us.us, %.split220.us.split.split.us234, %8, %.preheader133
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_mask_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass