; LLVM IR from abeaumont/competitive-programming :: cses/1739.ll (Z6countxiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local global i32, align 4
@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z6countxiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !5
  %8 = load i32, ptr @k, align 4, !tbaa !5
  %9 = sub nsw i32 %8, 1
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = add nsw i32 %10, %9
  store i32 %11, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr @k, align 4, !tbaa !5
  %13 = sub nsw i32 %12, 1
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = add nsw i32 %14, %13
  store i32 %15, ptr %6, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %50, %3
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %20, label %55

20:                                               ; preds = %16
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = srem i32 %21, 2
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %35

24:                                               ; preds = %20
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %26) #2
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %5, align 4, !tbaa !5
  %30 = sext i32 %28 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %30) #2
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %33, %32
  store i32 %34, ptr %7, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %24, %20
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = srem i32 %36, 2
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %50

39:                                               ; preds = %35
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %41) #2
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = add nsw i32 %43, -1
  store i32 %44, ptr %6, align 4, !tbaa !5
  %45 = sext i32 %43 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = add nsw i32 %48, %47
  store i32 %49, ptr %7, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %39, %35
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = sdiv i32 %51, 2
  store i32 %52, ptr %5, align 4, !tbaa !5
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = sdiv i32 %53, 2
  store i32 %54, ptr %6, align 4, !tbaa !5
  br label %16, !llvm.loop !9

55:                                               ; preds = %16
  %56 = load i32, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %56
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local local_unnamed_addr global i32, align 4
@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z6countxiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not19 = icmp sgt i32 %1, %2
  br i1 %.not19, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %4 = load i32, ptr @k, align 4, !tbaa !5
  %5 = add nsw i32 %4, -1
  %6 = add nsw i32 %5, %2
  %7 = add nsw i32 %5, %1
  %8 = sext i32 %0 to i64
  br label %9

9:                                                ; preds = %.lr.ph, %29
  %.022 = phi i32 [ 0, %.lr.ph ], [ %.2, %29 ]
  %.01521 = phi i32 [ %6, %.lr.ph ], [ %31, %29 ]
  %.01720 = phi i32 [ %7, %.lr.ph ], [ %30, %29 ]
  %10 = and i32 %.01720, -2147483647
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %19

12:                                               ; preds = %9
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %8) #1
  %14 = add nuw nsw i32 %.01720, 1
  %15 = zext nneg i32 %.01720 to i64
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = add nsw i32 %17, %.022
  br label %19

19:                                               ; preds = %12, %9
  %.118 = phi i32 [ %14, %12 ], [ %.01720, %9 ]
  %.1 = phi i32 [ %18, %12 ], [ %.022, %9 ]
  %20 = and i32 %.01521, 1
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %29

22:                                               ; preds = %19
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %8) #1
  %24 = add nsw i32 %.01521, -1
  %25 = sext i32 %.01521 to i64
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = add nsw i32 %27, %.1
  br label %29

29:                                               ; preds = %22, %19
  %.116 = phi i32 [ %24, %22 ], [ %.01521, %19 ]
  %.2 = phi i32 [ %28, %22 ], [ %.1, %19 ]
  %30 = sdiv i32 %.118, 2
  %31 = sdiv i32 %.116, 2
  %.not = icmp sgt i32 %30, %31
  br i1 %.not, label %._crit_edge, label %9, !llvm.loop !9

._crit_edge:                                      ; preds = %29, %3
  %.0.lcssa = phi i32 [ 0, %3 ], [ %.2, %29 ]
  ret i32 %.0.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass