; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseAbsDifferenceSum)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base22AbsDifferenceSumMaskedEPKhmS2_mS2_mhmmPm(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i8 noundef zeroext %6, i64 noundef %7, i64 noundef %8, ptr noundef %9) #2 {
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i8, align 1
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca ptr, align 8
  %21 = alloca i64, align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i64, align 8
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i64 %1, ptr %12, align 8, !tbaa !9
  store ptr %2, ptr %13, align 8, !tbaa !5
  store i64 %3, ptr %14, align 8, !tbaa !9
  store ptr %4, ptr %15, align 8, !tbaa !5
  store i64 %5, ptr %16, align 8, !tbaa !9
  store i8 %6, ptr %17, align 1, !tbaa !11
  store i64 %7, ptr %18, align 8, !tbaa !9
  store i64 %8, ptr %19, align 8, !tbaa !9
  store ptr %9, ptr %20, align 8, !tbaa !5
  %25 = load ptr, ptr %20, align 8, !tbaa !5
  store i64 0, ptr %25, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  store i64 0, ptr %21, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %79, %10
  %27 = load i64, ptr %21, align 8, !tbaa !9
  %28 = load i64, ptr %19, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  br label %82

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store i32 0, ptr %23, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  store i64 0, ptr %24, align 8, !tbaa !9
  br label %32

32:                                               ; preds = %61, %31
  %33 = load i64, ptr %24, align 8, !tbaa !9
  %34 = load i64, ptr %18, align 8, !tbaa !9
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 5, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  br label %64

37:                                               ; preds = %32
  %38 = load ptr, ptr %15, align 8, !tbaa !5
  %39 = load i64, ptr %24, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %38, i64 %39
  %41 = load i8, ptr %40, align 1, !tbaa !11
  %42 = zext i8 %41 to i32
  %43 = load i8, ptr %17, align 1, !tbaa !11
  %44 = zext i8 %43 to i32
  %45 = icmp eq i32 %42, %44
  br i1 %45, label %46, label %60

46:                                               ; preds = %37
  %47 = load ptr, ptr %11, align 8, !tbaa !5
  %48 = load i64, ptr %24, align 8, !tbaa !9
  %49 = getelementptr inbounds i8, ptr %47, i64 %48
  %50 = load i8, ptr %49, align 1, !tbaa !11
  %51 = zext i8 %50 to i32
  %52 = load ptr, ptr %13, align 8, !tbaa !5
  %53 = load i64, ptr %24, align 8, !tbaa !9
  %54 = getelementptr inbounds i8, ptr %52, i64 %53
  %55 = load i8, ptr %54, align 1, !tbaa !11
  %56 = zext i8 %55 to i32
  %57 = call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %51, i32 noundef %56)
  %58 = load i32, ptr %23, align 4, !tbaa !12
  %59 = add nsw i32 %58, %57
  store i32 %59, ptr %23, align 4, !tbaa !12
  br label %60

60:                                               ; preds = %46, %37
  br label %61

61:                                               ; preds = %60
  %62 = load i64, ptr %24, align 8, !tbaa !9
  %63 = add i64 %62, 1
  store i64 %63, ptr %24, align 8, !tbaa !9
  br label %32, !llvm.loop !14

64:                                               ; preds = %36
  %65 = load i32, ptr %23, align 4, !tbaa !12
  %66 = sext i32 %65 to i64
  %67 = load ptr, ptr %20, align 8, !tbaa !5
  %68 = load i64, ptr %67, align 8, !tbaa !9
  %69 = add i64 %68, %66
  store i64 %69, ptr %67, align 8, !tbaa !9
  %70 = load i64, ptr %12, align 8, !tbaa !9
  %71 = load ptr, ptr %11, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 %70
  store ptr %72, ptr %11, align 8, !tbaa !5
  %73 = load i64, ptr %14, align 8, !tbaa !9
  %74 = load ptr, ptr %13, align 8, !tbaa !5
  %75 = getelementptr inbounds i8, ptr %74, i64 %73
  store ptr %75, ptr %13, align 8, !tbaa !5
  %76 = load i64, ptr %16, align 8, !tbaa !9
  %77 = load ptr, ptr %15, align 8, !tbaa !5
  %78 = getelementptr inbounds i8, ptr %77, i64 %76
  store ptr %78, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  br label %79

79:                                               ; preds = %64
  %80 = load i64, ptr %21, align 8, !tbaa !9
  %81 = add i64 %80, 1
  store i64 %81, ptr %21, align 8, !tbaa !9
  br label %26, !llvm.loop !16

82:                                               ; preds = %30
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base22AbsDifferenceSumMaskedEPKhmS2_mS2_mhmmPm(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, i64 noundef %3, ptr nocapture noundef readonly %4, i64 noundef %5, i8 noundef zeroext %6, i64 noundef %7, i64 noundef %8, ptr nocapture noundef %9) local_unnamed_addr #1 {
  store i64 0, ptr %9, align 8, !tbaa !5
  %.not = icmp eq i64 %8, 0
  %.not34 = icmp eq i64 %7, 0
  %or.cond = or i1 %.not, %.not34
  br i1 %or.cond, label %._crit_edge33, label %.preheader.us

.preheader.us:                                    ; preds = %10, %._crit_edge.us
  %.02332.us = phi i64 [ %32, %._crit_edge.us ], [ 0, %10 ]
  %.02431.us = phi ptr [ %29, %._crit_edge.us ], [ %0, %10 ]
  %.02530.us = phi ptr [ %30, %._crit_edge.us ], [ %2, %10 ]
  %.02629.us = phi ptr [ %31, %._crit_edge.us ], [ %4, %10 ]
  br label %11

11:                                               ; preds = %.preheader.us, %24
  %.028.us = phi i64 [ 0, %.preheader.us ], [ %25, %24 ]
  %.02227.us = phi i32 [ 0, %.preheader.us ], [ %.1.us, %24 ]
  %12 = getelementptr inbounds i8, ptr %.02629.us, i64 %.028.us
  %13 = load i8, ptr %12, align 1, !tbaa !9
  %14 = icmp eq i8 %13, %6
  br i1 %14, label %15, label %24

15:                                               ; preds = %11
  %16 = getelementptr inbounds i8, ptr %.02431.us, i64 %.028.us
  %17 = load i8, ptr %16, align 1, !tbaa !9
  %18 = zext i8 %17 to i32
  %19 = getelementptr inbounds i8, ptr %.02530.us, i64 %.028.us
  %20 = load i8, ptr %19, align 1, !tbaa !9
  %21 = zext i8 %20 to i32
  %22 = tail call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %18, i32 noundef %21)
  %23 = add nsw i32 %22, %.02227.us
  br label %24

24:                                               ; preds = %15, %11
  %.1.us = phi i32 [ %23, %15 ], [ %.02227.us, %11 ]
  %25 = add nuw i64 %.028.us, 1
  %exitcond.not = icmp eq i64 %25, %7
  br i1 %exitcond.not, label %._crit_edge.us, label %11, !llvm.loop !10

._crit_edge.us:                                   ; preds = %24
  %26 = sext i32 %.1.us to i64
  %27 = load i64, ptr %9, align 8, !tbaa !5
  %28 = add i64 %27, %26
  store i64 %28, ptr %9, align 8, !tbaa !5
  %29 = getelementptr inbounds i8, ptr %.02431.us, i64 %1
  %30 = getelementptr inbounds i8, ptr %.02530.us, i64 %3
  %31 = getelementptr inbounds i8, ptr %.02629.us, i64 %5
  %32 = add nuw i64 %.02332.us, 1
  %exitcond35.not = icmp eq i64 %32, %8
  br i1 %exitcond35.not, label %._crit_edge33, label %.preheader.us, !llvm.loop !12

._crit_edge33:                                    ; preds = %._crit_edge.us, %10
  ret void
}

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass