; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_pair_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  store i16 64, ptr %10, align 2, !tbaa !11
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %12, ptr noundef %13)
  store i8 32, ptr %7, align 1, !tbaa !13
  br label %14

14:                                               ; preds = %56, %3
  %15 = load i8, ptr %7, align 1, !tbaa !13
  %16 = zext i8 %15 to i32
  %17 = icmp slt i32 %16, 64
  br i1 %17, label %18, label %59

18:                                               ; preds = %14
  store i8 0, ptr %8, align 1, !tbaa !13
  br label %19

19:                                               ; preds = %52, %18
  %20 = load i8, ptr %8, align 1, !tbaa !13
  %21 = zext i8 %20 to i32
  %22 = icmp slt i32 %21, 64
  br i1 %22, label %23, label %55

23:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %24 = load i8, ptr %8, align 1, !tbaa !13
  %25 = zext i8 %24 to i32
  %26 = icmp slt i32 %25, 32
  %27 = zext i1 %26 to i64
  %28 = select i1 %26, i32 0, i32 32
  store i32 %28, ptr %11, align 4, !tbaa !9
  %29 = load i32, ptr %11, align 4, !tbaa !9
  %30 = trunc i32 %29 to i8
  store i8 %30, ptr %9, align 1, !tbaa !13
  br label %31

31:                                               ; preds = %48, %23
  %32 = load i8, ptr %9, align 1, !tbaa !13
  %33 = zext i8 %32 to i32
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = add i32 %34, 32
  %36 = icmp ult i32 %33, %35
  br i1 %36, label %37, label %51

37:                                               ; preds = %31
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !9
  %40 = load i8, ptr %7, align 1, !tbaa !13
  %41 = zext i8 %40 to i32
  %42 = load i16, ptr %10, align 2, !tbaa !11
  %43 = sext i16 %42 to i32
  %44 = load i8, ptr %8, align 1, !tbaa !13
  %45 = zext i8 %44 to i32
  %46 = load i8, ptr %9, align 1, !tbaa !13
  %47 = zext i8 %46 to i32
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %38, i32 noundef %39, i32 noundef %41, i32 noundef %43, i32 noundef %45, i32 noundef %47)
  br label %48

48:                                               ; preds = %37
  %49 = load i8, ptr %9, align 1, !tbaa !13
  %50 = add i8 %49, 1
  store i8 %50, ptr %9, align 1, !tbaa !13
  br label %31, !llvm.loop !14

51:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %52

52:                                               ; preds = %51
  %53 = load i8, ptr %8, align 1, !tbaa !13
  %54 = add i8 %53, 1
  store i8 %54, ptr %8, align 1, !tbaa !13
  br label %19, !llvm.loop !16

55:                                               ; preds = %19
  br label %56

56:                                               ; preds = %55
  %57 = load i8, ptr %7, align 1, !tbaa !13
  %58 = add i8 %57, 1
  store i8 %58, ptr %7, align 1, !tbaa !13
  br label %14, !llvm.loop !17

59:                                               ; preds = %14
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %60, ptr noundef %61)
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_pair_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  br label %.preheader

.preheader:                                       ; preds = %3, %6
  %indvars.iv29 = phi i32 [ 32, %3 ], [ %indvars.iv.next30, %6 ]
  br label %._crit_edge

._crit_edge:                                      ; preds = %.preheader, %._crit_edge
  %indvars.iv = phi i32 [ 0, %.preheader ], [ %indvars.iv.next27, %._crit_edge ]
  %4 = icmp ult i32 %indvars.iv, 32
  %5 = select i1 %4, i32 0, i32 32
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %5) #2
  %indvars.iv.next = or disjoint i32 %5, 1
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next) #2
  %indvars.iv.next.1 = or disjoint i32 %5, 2
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.1) #2
  %indvars.iv.next.2 = or disjoint i32 %5, 3
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.2) #2
  %indvars.iv.next.3 = or disjoint i32 %5, 4
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.3) #2
  %indvars.iv.next.4 = or disjoint i32 %5, 5
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.4) #2
  %indvars.iv.next.5 = or disjoint i32 %5, 6
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.5) #2
  %indvars.iv.next.6 = or disjoint i32 %5, 7
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.6) #2
  %indvars.iv.next.7 = or disjoint i32 %5, 8
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.7) #2
  %indvars.iv.next.8 = or disjoint i32 %5, 9
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.8) #2
  %indvars.iv.next.9 = or disjoint i32 %5, 10
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.9) #2
  %indvars.iv.next.10 = or disjoint i32 %5, 11
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.10) #2
  %indvars.iv.next.11 = or disjoint i32 %5, 12
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.11) #2
  %indvars.iv.next.12 = or disjoint i32 %5, 13
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.12) #2
  %indvars.iv.next.13 = or disjoint i32 %5, 14
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.13) #2
  %indvars.iv.next.14 = or disjoint i32 %5, 15
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.14) #2
  %indvars.iv.next.15 = or disjoint i32 %5, 16
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.15) #2
  %indvars.iv.next.16 = or disjoint i32 %5, 17
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.16) #2
  %indvars.iv.next.17 = or disjoint i32 %5, 18
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.17) #2
  %indvars.iv.next.18 = or disjoint i32 %5, 19
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.18) #2
  %indvars.iv.next.19 = or disjoint i32 %5, 20
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.19) #2
  %indvars.iv.next.20 = or disjoint i32 %5, 21
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.20) #2
  %indvars.iv.next.21 = or disjoint i32 %5, 22
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.21) #2
  %indvars.iv.next.22 = or disjoint i32 %5, 23
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.22) #2
  %indvars.iv.next.23 = or disjoint i32 %5, 24
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.23) #2
  %indvars.iv.next.24 = or disjoint i32 %5, 25
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.24) #2
  %indvars.iv.next.25 = or disjoint i32 %5, 26
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.25) #2
  %indvars.iv.next.26 = or disjoint i32 %5, 27
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.26) #2
  %indvars.iv.next.27 = or disjoint i32 %5, 28
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.27) #2
  %indvars.iv.next.28 = or disjoint i32 %5, 29
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.28) #2
  %indvars.iv.next.29 = or disjoint i32 %5, 30
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.29) #2
  %indvars.iv.next.30 = or disjoint i32 %5, 31
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv29, i32 noundef 64, i32 noundef %indvars.iv, i32 noundef %indvars.iv.next.30) #2
  %indvars.iv.next27 = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next27, 64
  br i1 %exitcond.not, label %6, label %._crit_edge, !llvm.loop !5

6:                                                ; preds = %._crit_edge
  %indvars.iv.next30 = add nuw nsw i32 %indvars.iv29, 1
  %exitcond32.not = icmp eq i32 %indvars.iv.next30, 64
  br i1 %exitcond32.not, label %7, label %.preheader, !llvm.loop !7

7:                                                ; preds = %6
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass