; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_transform_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [93 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_transform_16way_permute_network_avx512 = external hidden unnamed_addr constant [57 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_16way_permute_network_avx512(ptr noundef %0, i8 noundef signext %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #2 {
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i8 %1, ptr %8, align 1, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !10
  store i32 %5, ptr %12, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !10
  %21 = load i32, ptr %11, align 4, !tbaa !10
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %35

23:                                               ; preds = %6
  %24 = load i32, ptr %11, align 4, !tbaa !10
  %25 = icmp ne i32 %24, 16
  br i1 %25, label %26, label %35

26:                                               ; preds = %23
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !10
  %29 = icmp ult i32 1, %28
  br i1 %29, label %30, label %32

30:                                               ; preds = %26
  %31 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !10
  br label %33

32:                                               ; preds = %26
  br label %33

33:                                               ; preds = %32, %30
  %34 = phi i32 [ %31, %30 ], [ 1, %32 ]
  call void @libxsmm_handle_error(ptr noundef %27, i32 noundef 90000, ptr noundef @__func__.libxsmm_generator_transform_16way_permute_network_avx512, ptr noundef @.str, i32 noundef 97, i32 noundef %34)
  store i32 1, ptr %14, align 4
  br label %112

35:                                               ; preds = %23, %6
  store i32 0, ptr %13, align 4, !tbaa !10
  br label %36

36:                                               ; preds = %50, %35
  %37 = load i32, ptr %13, align 4, !tbaa !10
  %38 = icmp ult i32 %37, 8
  br i1 %38, label %39, label %53

39:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %40 = load i32, ptr %13, align 4, !tbaa !10
  %41 = load i32, ptr %11, align 4, !tbaa !10
  %42 = add i32 %40, %41
  store i32 %42, ptr %15, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %43 = load i32, ptr %15, align 4, !tbaa !10
  %44 = add i32 %43, 16
  %45 = urem i32 %44, 32
  store i32 %45, ptr %16, align 4, !tbaa !10
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = load i8, ptr %8, align 1, !tbaa !9
  %48 = load i32, ptr %15, align 4, !tbaa !10
  %49 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %46, i32 noundef -528083345, i8 noundef signext %47, i32 noundef %48, i32 noundef 255, i32 noundef %49, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024)
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %50

50:                                               ; preds = %39
  %51 = load i32, ptr %13, align 4, !tbaa !10
  %52 = add i32 %51, 1
  store i32 %52, ptr %13, align 4, !tbaa !10
  br label %36, !llvm.loop !12

53:                                               ; preds = %36
  store i32 0, ptr %13, align 4, !tbaa !10
  br label %54

54:                                               ; preds = %78, %53
  %55 = load i32, ptr %13, align 4, !tbaa !10
  %56 = icmp ult i32 %55, 8
  br i1 %56, label %57, label %81

57:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %58 = load i32, ptr %13, align 4, !tbaa !10
  %59 = load i32, ptr %11, align 4, !tbaa !10
  %60 = add i32 %58, %59
  %61 = add i32 %60, 8
  store i32 %61, ptr %17, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %62 = load i32, ptr %13, align 4, !tbaa !10
  %63 = load i32, ptr %11, align 4, !tbaa !10
  %64 = add i32 %62, %63
  store i32 %64, ptr %18, align 4, !tbaa !10
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  %66 = load i32, ptr %12, align 4, !tbaa !10
  %67 = load i8, ptr %8, align 1, !tbaa !9
  %68 = load i32, ptr %17, align 4, !tbaa !10
  %69 = load i32, ptr %18, align 4, !tbaa !10
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  %71 = getelementptr inbounds i8, ptr %70, i64 0
  %72 = load i8, ptr %71, align 1, !tbaa !9
  %73 = zext i8 %72 to i32
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = getelementptr inbounds i8, ptr %74, i64 0
  %76 = load i8, ptr %75, align 1, !tbaa !9
  %77 = zext i8 %76 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %65, i32 noundef %66, i8 noundef signext %67, i32 noundef %68, i32 noundef 255, i32 noundef %69, i32 noundef %73, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %77)
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %78

78:                                               ; preds = %57
  %79 = load i32, ptr %13, align 4, !tbaa !10
  %80 = add i32 %79, 1
  store i32 %80, ptr %13, align 4, !tbaa !10
  br label %54, !llvm.loop !14

81:                                               ; preds = %54
  store i32 8, ptr %13, align 4, !tbaa !10
  br label %82

82:                                               ; preds = %108, %81
  %83 = load i32, ptr %13, align 4, !tbaa !10
  %84 = icmp ult i32 %83, 16
  br i1 %84, label %85, label %111

85:                                               ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %86 = load i32, ptr %13, align 4, !tbaa !10
  %87 = sub i32 %86, 8
  %88 = load i32, ptr %11, align 4, !tbaa !10
  %89 = add i32 %87, %88
  %90 = add i32 %89, 16
  %91 = urem i32 %90, 32
  store i32 %91, ptr %19, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %92 = load i32, ptr %13, align 4, !tbaa !10
  %93 = load i32, ptr %11, align 4, !tbaa !10
  %94 = add i32 %92, %93
  store i32 %94, ptr %20, align 4, !tbaa !10
  %95 = load ptr, ptr %7, align 8, !tbaa !5
  %96 = load i32, ptr %12, align 4, !tbaa !10
  %97 = load i8, ptr %8, align 1, !tbaa !9
  %98 = load i32, ptr %19, align 4, !tbaa !10
  %99 = load i32, ptr %20, align 4, !tbaa !10
  %100 = load ptr, ptr %9, align 8, !tbaa !5
  %101 = getelementptr inbounds i8, ptr %100, i64 1
  %102 = load i8, ptr %101, align 1, !tbaa !9
  %103 = zext i8 %102 to i32
  %104 = load ptr, ptr %10, align 8, !tbaa !5
  %105 = getelementptr inbounds i8, ptr %104, i64 1
  %106 = load i8, ptr %105, align 1, !tbaa !9
  %107 = zext i8 %106 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %95, i32 noundef %96, i8 noundef signext %97, i32 noundef %98, i32 noundef 255, i32 noundef %99, i32 noundef %103, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %107)
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  br label %108

108:                                              ; preds = %85
  %109 = load i32, ptr %13, align 4, !tbaa !10
  %110 = add i32 %109, 1
  store i32 %110, ptr %13, align 4, !tbaa !10
  br label %82, !llvm.loop !15

111:                                              ; preds = %82
  store i32 0, ptr %14, align 4
  br label %112

112:                                              ; preds = %111, %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %113 = load i32, ptr %14, align 4
  switch i32 %113, label %115 [
    i32 0, label %114
    i32 1, label %114
  ]

114:                                              ; preds = %112, %112
  ret void

115:                                              ; preds = %112
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [93 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_transform_16way_permute_network_avx512 = external hidden unnamed_addr constant [57 x i8], align 1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_16way_permute_network_avx512(ptr noundef %0, i8 noundef signext %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = and i32 %4, -17
  %or.cond.not = icmp eq i32 %7, 0
  br i1 %or.cond.not, label %.preheader39.preheader, label %112

.preheader39.preheader:                           ; preds = %6
  %8 = xor i32 %4, 16
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %4, i32 noundef 255, i32 noundef %8, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %9 = or disjoint i32 %4, 1
  %10 = xor i32 %4, 17
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %9, i32 noundef 255, i32 noundef %10, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %11 = or disjoint i32 %4, 2
  %12 = xor i32 %4, 18
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %11, i32 noundef 255, i32 noundef %12, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %13 = or disjoint i32 %4, 3
  %14 = xor i32 %4, 19
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %13, i32 noundef 255, i32 noundef %14, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %15 = or disjoint i32 %4, 4
  %16 = xor i32 %4, 20
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %15, i32 noundef 255, i32 noundef %16, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %17 = or disjoint i32 %4, 5
  %18 = xor i32 %4, 21
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %17, i32 noundef 255, i32 noundef %18, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %19 = or disjoint i32 %4, 6
  %20 = xor i32 %4, 22
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %19, i32 noundef 255, i32 noundef %20, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %21 = or disjoint i32 %4, 7
  %22 = xor i32 %4, 23
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %21, i32 noundef 255, i32 noundef %22, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %23 = or disjoint i32 %4, 8
  %24 = load i8, ptr %2, align 1, !tbaa !5
  %25 = zext i8 %24 to i32
  %26 = load i8, ptr %3, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %23, i32 noundef 255, i32 noundef %4, i32 noundef %25, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %27) #2
  %28 = or disjoint i32 %4, 9
  %29 = load i8, ptr %2, align 1, !tbaa !5
  %30 = zext i8 %29 to i32
  %31 = load i8, ptr %3, align 1, !tbaa !5
  %32 = zext i8 %31 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %28, i32 noundef 255, i32 noundef %9, i32 noundef %30, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %32) #2
  %33 = or disjoint i32 %4, 10
  %34 = load i8, ptr %2, align 1, !tbaa !5
  %35 = zext i8 %34 to i32
  %36 = load i8, ptr %3, align 1, !tbaa !5
  %37 = zext i8 %36 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %33, i32 noundef 255, i32 noundef %11, i32 noundef %35, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %37) #2
  %38 = or disjoint i32 %4, 11
  %39 = load i8, ptr %2, align 1, !tbaa !5
  %40 = zext i8 %39 to i32
  %41 = load i8, ptr %3, align 1, !tbaa !5
  %42 = zext i8 %41 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %38, i32 noundef 255, i32 noundef %13, i32 noundef %40, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %42) #2
  %43 = or disjoint i32 %4, 12
  %44 = load i8, ptr %2, align 1, !tbaa !5
  %45 = zext i8 %44 to i32
  %46 = load i8, ptr %3, align 1, !tbaa !5
  %47 = zext i8 %46 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %43, i32 noundef 255, i32 noundef %15, i32 noundef %45, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %47) #2
  %48 = or disjoint i32 %4, 13
  %49 = load i8, ptr %2, align 1, !tbaa !5
  %50 = zext i8 %49 to i32
  %51 = load i8, ptr %3, align 1, !tbaa !5
  %52 = zext i8 %51 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %48, i32 noundef 255, i32 noundef %17, i32 noundef %50, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %52) #2
  %53 = or disjoint i32 %4, 14
  %54 = load i8, ptr %2, align 1, !tbaa !5
  %55 = zext i8 %54 to i32
  %56 = load i8, ptr %3, align 1, !tbaa !5
  %57 = zext i8 %56 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %53, i32 noundef 255, i32 noundef %19, i32 noundef %55, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %57) #2
  %58 = or disjoint i32 %4, 15
  %59 = load i8, ptr %2, align 1, !tbaa !5
  %60 = zext i8 %59 to i32
  %61 = load i8, ptr %3, align 1, !tbaa !5
  %62 = zext i8 %61 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %58, i32 noundef 255, i32 noundef %21, i32 noundef %60, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %62) #2
  %63 = getelementptr inbounds i8, ptr %2, i64 1
  %64 = getelementptr inbounds i8, ptr %3, i64 1
  %65 = xor i32 %4, 16
  %66 = load i8, ptr %63, align 1, !tbaa !5
  %67 = zext i8 %66 to i32
  %68 = load i8, ptr %64, align 1, !tbaa !5
  %69 = zext i8 %68 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %65, i32 noundef 255, i32 noundef %23, i32 noundef %67, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %69) #2
  %70 = xor i32 %4, 17
  %71 = or disjoint i32 %4, 9
  %72 = load i8, ptr %63, align 1, !tbaa !5
  %73 = zext i8 %72 to i32
  %74 = load i8, ptr %64, align 1, !tbaa !5
  %75 = zext i8 %74 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %70, i32 noundef 255, i32 noundef %71, i32 noundef %73, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %75) #2
  %76 = xor i32 %4, 18
  %77 = or disjoint i32 %4, 10
  %78 = load i8, ptr %63, align 1, !tbaa !5
  %79 = zext i8 %78 to i32
  %80 = load i8, ptr %64, align 1, !tbaa !5
  %81 = zext i8 %80 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %76, i32 noundef 255, i32 noundef %77, i32 noundef %79, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %81) #2
  %82 = xor i32 %4, 19
  %83 = or disjoint i32 %4, 11
  %84 = load i8, ptr %63, align 1, !tbaa !5
  %85 = zext i8 %84 to i32
  %86 = load i8, ptr %64, align 1, !tbaa !5
  %87 = zext i8 %86 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %82, i32 noundef 255, i32 noundef %83, i32 noundef %85, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %87) #2
  %88 = xor i32 %4, 20
  %89 = or disjoint i32 %4, 12
  %90 = load i8, ptr %63, align 1, !tbaa !5
  %91 = zext i8 %90 to i32
  %92 = load i8, ptr %64, align 1, !tbaa !5
  %93 = zext i8 %92 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %88, i32 noundef 255, i32 noundef %89, i32 noundef %91, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %93) #2
  %94 = xor i32 %4, 21
  %95 = or disjoint i32 %4, 13
  %96 = load i8, ptr %63, align 1, !tbaa !5
  %97 = zext i8 %96 to i32
  %98 = load i8, ptr %64, align 1, !tbaa !5
  %99 = zext i8 %98 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %94, i32 noundef 255, i32 noundef %95, i32 noundef %97, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %99) #2
  %100 = xor i32 %4, 22
  %101 = or disjoint i32 %4, 14
  %102 = load i8, ptr %63, align 1, !tbaa !5
  %103 = zext i8 %102 to i32
  %104 = load i8, ptr %64, align 1, !tbaa !5
  %105 = zext i8 %104 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %100, i32 noundef 255, i32 noundef %101, i32 noundef %103, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %105) #2
  %106 = xor i32 %4, 23
  %107 = or disjoint i32 %4, 15
  %108 = load i8, ptr %63, align 1, !tbaa !5
  %109 = zext i8 %108 to i32
  %110 = load i8, ptr %64, align 1, !tbaa !5
  %111 = zext i8 %110 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %106, i32 noundef 255, i32 noundef %107, i32 noundef %109, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %111) #2
  br label %.loopexit

112:                                              ; preds = %6
  %113 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !8
  %114 = icmp ugt i32 %113, 1
  %115 = load i32, ptr @libxsmm_verbosity, align 4
  %116 = select i1 %114, i32 %115, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_generator_transform_16way_permute_network_avx512, ptr noundef nonnull @.str, i32 noundef 97, i32 noundef %116) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader39.preheader, %112
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass