; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @test_sve_move(ptr noundef %0, ptr noundef %1, i32 noundef %2, i16 noundef signext %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i16 %3, ptr %8, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %13, ptr noundef %14)
  %15 = load i16, ptr %8, align 2, !tbaa !11
  %16 = sext i16 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %65

18:                                               ; preds = %4
  store i8 32, ptr %9, align 1, !tbaa !13
  br label %19

19:                                               ; preds = %61, %18
  %20 = load i8, ptr %9, align 1, !tbaa !13
  %21 = zext i8 %20 to i32
  %22 = icmp slt i32 %21, 64
  br i1 %22, label %23, label %64

23:                                               ; preds = %19
  store i8 32, ptr %10, align 1, !tbaa !13
  br label %24

24:                                               ; preds = %57, %23
  %25 = load i8, ptr %10, align 1, !tbaa !13
  %26 = zext i8 %25 to i32
  %27 = icmp slt i32 %26, 64
  br i1 %27, label %28, label %60

28:                                               ; preds = %24
  store i8 0, ptr %11, align 1, !tbaa !13
  br label %29

29:                                               ; preds = %53, %28
  %30 = load i8, ptr %11, align 1, !tbaa !13
  %31 = zext i8 %30 to i32
  %32 = icmp slt i32 %31, 32
  br i1 %32, label %33, label %56

33:                                               ; preds = %29
  store i8 0, ptr %12, align 1, !tbaa !13
  br label %34

34:                                               ; preds = %49, %33
  %35 = load i8, ptr %12, align 1, !tbaa !13
  %36 = zext i8 %35 to i32
  %37 = icmp slt i32 %36, 8
  br i1 %37, label %38, label %52

38:                                               ; preds = %34
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = load i8, ptr %9, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = load i8, ptr %10, align 1, !tbaa !13
  %44 = zext i8 %43 to i32
  %45 = load i8, ptr %11, align 1, !tbaa !13
  %46 = zext i8 %45 to i32
  %47 = load i8, ptr %12, align 1, !tbaa !13
  %48 = zext i8 %47 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %39, i32 noundef %40, i32 noundef %42, i32 noundef %44, i32 noundef 0, i32 noundef %46, i32 noundef %48)
  br label %49

49:                                               ; preds = %38
  %50 = load i8, ptr %12, align 1, !tbaa !13
  %51 = add i8 %50, 1
  store i8 %51, ptr %12, align 1, !tbaa !13
  br label %34, !llvm.loop !14

52:                                               ; preds = %34
  br label %53

53:                                               ; preds = %52
  %54 = load i8, ptr %11, align 1, !tbaa !13
  %55 = add i8 %54, 1
  store i8 %55, ptr %11, align 1, !tbaa !13
  br label %29, !llvm.loop !16

56:                                               ; preds = %29
  br label %57

57:                                               ; preds = %56
  %58 = load i8, ptr %10, align 1, !tbaa !13
  %59 = add i8 %58, 1
  store i8 %59, ptr %10, align 1, !tbaa !13
  br label %24, !llvm.loop !17

60:                                               ; preds = %24
  br label %61

61:                                               ; preds = %60
  %62 = load i8, ptr %9, align 1, !tbaa !13
  %63 = add i8 %62, 1
  store i8 %63, ptr %9, align 1, !tbaa !13
  br label %19, !llvm.loop !18

64:                                               ; preds = %19
  br label %103

65:                                               ; preds = %4
  store i8 32, ptr %9, align 1, !tbaa !13
  br label %66

66:                                               ; preds = %99, %65
  %67 = load i8, ptr %9, align 1, !tbaa !13
  %68 = zext i8 %67 to i32
  %69 = icmp slt i32 %68, 64
  br i1 %69, label %70, label %102

70:                                               ; preds = %66
  store i8 0, ptr %11, align 1, !tbaa !13
  br label %71

71:                                               ; preds = %95, %70
  %72 = load i8, ptr %11, align 1, !tbaa !13
  %73 = zext i8 %72 to i32
  %74 = icmp slt i32 %73, 32
  br i1 %74, label %75, label %98

75:                                               ; preds = %71
  store i8 0, ptr %12, align 1, !tbaa !13
  br label %76

76:                                               ; preds = %91, %75
  %77 = load i8, ptr %12, align 1, !tbaa !13
  %78 = zext i8 %77 to i32
  %79 = icmp slt i32 %78, 8
  br i1 %79, label %80, label %94

80:                                               ; preds = %76
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = load i32, ptr %7, align 4, !tbaa !9
  %83 = load i8, ptr %9, align 1, !tbaa !13
  %84 = zext i8 %83 to i32
  %85 = load i16, ptr %8, align 2, !tbaa !11
  %86 = sext i16 %85 to i32
  %87 = load i8, ptr %11, align 1, !tbaa !13
  %88 = zext i8 %87 to i32
  %89 = load i8, ptr %12, align 1, !tbaa !13
  %90 = zext i8 %89 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %81, i32 noundef %82, i32 noundef %84, i32 noundef 127, i32 noundef %86, i32 noundef %88, i32 noundef %90)
  br label %91

91:                                               ; preds = %80
  %92 = load i8, ptr %12, align 1, !tbaa !13
  %93 = add i8 %92, 1
  store i8 %93, ptr %12, align 1, !tbaa !13
  br label %76, !llvm.loop !19

94:                                               ; preds = %76
  br label %95

95:                                               ; preds = %94
  %96 = load i8, ptr %11, align 1, !tbaa !13
  %97 = add i8 %96, 1
  store i8 %97, ptr %11, align 1, !tbaa !13
  br label %71, !llvm.loop !20

98:                                               ; preds = %71
  br label %99

99:                                               ; preds = %98
  %100 = load i8, ptr %9, align 1, !tbaa !13
  %101 = add i8 %100, 1
  store i8 %101, ptr %9, align 1, !tbaa !13
  br label %66, !llvm.loop !21

102:                                              ; preds = %66
  br label %103

103:                                              ; preds = %102, %64
  %104 = load ptr, ptr %6, align 8, !tbaa !5
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %104, ptr noundef %105)
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}
!19 = distinct !{!19, !15}
!20 = distinct !{!20, !15}
!21 = distinct !{!21, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_sve_move(ptr noundef %0, ptr noundef %1, i32 noundef %2, i16 noundef signext %3) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %5 = sext i16 %3 to i32
  %6 = icmp eq i16 %3, 0
  br i1 %6, label %.preheader44, label %.preheader47

.preheader44:                                     ; preds = %4, %8
  %indvars.iv76 = phi i32 [ %indvars.iv.next77, %8 ], [ 32, %4 ]
  br label %.preheader43

.preheader43:                                     ; preds = %.preheader44, %7
  %indvars.iv72 = phi i32 [ 32, %.preheader44 ], [ %indvars.iv.next73, %7 ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader43, %.preheader
  %indvars.iv68 = phi i32 [ 0, %.preheader43 ], [ %indvars.iv.next69, %.preheader ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 0) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 1) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 2) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 3) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 4) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 5) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 6) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv76, i32 noundef %indvars.iv72, i32 noundef 0, i32 noundef %indvars.iv68, i32 noundef 7) #2
  %indvars.iv.next69 = add nuw nsw i32 %indvars.iv68, 1
  %exitcond71.not = icmp eq i32 %indvars.iv.next69, 32
  br i1 %exitcond71.not, label %7, label %.preheader, !llvm.loop !5

7:                                                ; preds = %.preheader
  %indvars.iv.next73 = add nuw nsw i32 %indvars.iv72, 1
  %exitcond75.not = icmp eq i32 %indvars.iv.next73, 64
  br i1 %exitcond75.not, label %8, label %.preheader43, !llvm.loop !7

8:                                                ; preds = %7
  %indvars.iv.next77 = add nuw nsw i32 %indvars.iv76, 1
  %exitcond79.not = icmp eq i32 %indvars.iv.next77, 64
  br i1 %exitcond79.not, label %.loopexit, label %.preheader44, !llvm.loop !8

.preheader47:                                     ; preds = %4, %9
  %indvars.iv60 = phi i32 [ %indvars.iv.next61, %9 ], [ 32, %4 ]
  br label %.preheader46

.preheader46:                                     ; preds = %.preheader47, %.preheader46
  %indvars.iv = phi i32 [ 0, %.preheader47 ], [ %indvars.iv.next, %.preheader46 ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 0) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 1) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 2) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 3) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 4) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 5) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 6) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv60, i32 noundef 127, i32 noundef %5, i32 noundef %indvars.iv, i32 noundef 7) #2
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, 32
  br i1 %exitcond.not, label %9, label %.preheader46, !llvm.loop !9

9:                                                ; preds = %.preheader46
  %indvars.iv.next61 = add nuw nsw i32 %indvars.iv60, 1
  %exitcond63.not = icmp eq i32 %indvars.iv.next61, 64
  br i1 %exitcond63.not, label %.loopexit, label %.preheader47, !llvm.loop !10

.loopexit:                                        ; preds = %9, %8
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = distinct !{!9, !6}
!10 = distinct !{!10, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass