; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_a64fx(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #3 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca [3 x i32], align 4
  %20 = alloca i32, align 4
  %21 = alloca [32 x i32], align 16
  %22 = alloca [32 x i32], align 16
  %23 = alloca [32 x i32], align 16
  %24 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %19) #4
  call void @llvm.memset.p0.i64(ptr align 4 %19, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 128, ptr %21) #4
  call void @llvm.memset.p0.i64(ptr align 16 %21, i8 0, i64 128, i1 false)
  call void @llvm.lifetime.start.p0(i64 128, ptr %22) #4
  call void @llvm.memset.p0.i64(ptr align 16 %22, i8 0, i64 128, i1 false)
  call void @llvm.lifetime.start.p0(i64 128, ptr %23) #4
  call void @llvm.memset.p0.i64(ptr align 16 %23, i8 0, i64 128, i1 false)
  %25 = load i32, ptr %12, align 4, !tbaa !9
  %26 = load ptr, ptr %10, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %26, i32 0, i32 2
  %28 = load i32, ptr %27, align 8, !tbaa !11
  %29 = udiv i32 %25, %28
  %30 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  store i32 %29, ptr %30, align 4, !tbaa !9
  %31 = load i32, ptr %12, align 4, !tbaa !9
  %32 = load ptr, ptr %10, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %32, i32 0, i32 2
  %34 = load i32, ptr %33, align 8, !tbaa !11
  %35 = urem i32 %31, %34
  %36 = load ptr, ptr %10, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %36, i32 0, i32 2
  %38 = load i32, ptr %37, align 8, !tbaa !11
  %39 = udiv i32 %38, 2
  %40 = udiv i32 %35, %39
  %41 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  store i32 %40, ptr %41, align 4, !tbaa !9
  %42 = load i32, ptr %12, align 4, !tbaa !9
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %43, i32 0, i32 2
  %45 = load i32, ptr %44, align 8, !tbaa !11
  %46 = urem i32 %42, %45
  %47 = load ptr, ptr %10, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %47, i32 0, i32 2
  %49 = load i32, ptr %48, align 8, !tbaa !11
  %50 = udiv i32 %49, 2
  %51 = urem i32 %46, %50
  %52 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  store i32 %51, ptr %52, align 4, !tbaa !9
  %53 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %56 = load i32, ptr %55, align 4, !tbaa !9
  %57 = add i32 %54, %56
  %58 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = add i32 %57, %59
  store i32 %60, ptr %20, align 4, !tbaa !9
  %61 = load i32, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %17, align 4, !tbaa !9
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %85, %7
  %63 = load i32, ptr %16, align 4, !tbaa !9
  %64 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = icmp ult i32 %63, %65
  br i1 %66, label %67, label %88

67:                                               ; preds = %62
  %68 = load i32, ptr %17, align 4, !tbaa !9
  %69 = zext i32 %68 to i64
  %70 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %69
  store i32 1, ptr %70, align 4, !tbaa !9
  %71 = load i32, ptr %17, align 4, !tbaa !9
  %72 = zext i32 %71 to i64
  %73 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %72
  store i32 16, ptr %73, align 4, !tbaa !9
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %74, i32 0, i32 3
  %76 = load i32, ptr %75, align 4, !tbaa !15
  %77 = icmp eq i32 %76, 4
  %78 = zext i1 %77 to i64
  %79 = select i1 %77, i32 5, i32 7
  %80 = load i32, ptr %17, align 4, !tbaa !9
  %81 = zext i32 %80 to i64
  %82 = getelementptr inbounds [32 x i32], ptr %23, i64 0, i64 %81
  store i32 %79, ptr %82, align 4, !tbaa !9
  %83 = load i32, ptr %17, align 4, !tbaa !9
  %84 = add i32 %83, 1
  store i32 %84, ptr %17, align 4, !tbaa !9
  br label %85

85:                                               ; preds = %67
  %86 = load i32, ptr %16, align 4, !tbaa !9
  %87 = add i32 %86, 1
  store i32 %87, ptr %16, align 4, !tbaa !9
  br label %62, !llvm.loop !16

88:                                               ; preds = %62
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %89

89:                                               ; preds = %112, %88
  %90 = load i32, ptr %16, align 4, !tbaa !9
  %91 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %92 = load i32, ptr %91, align 4, !tbaa !9
  %93 = icmp ult i32 %90, %92
  br i1 %93, label %94, label %115

94:                                               ; preds = %89
  %95 = load i32, ptr %17, align 4, !tbaa !9
  %96 = zext i32 %95 to i64
  %97 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %96
  store i32 6, ptr %97, align 4, !tbaa !9
  %98 = load i32, ptr %17, align 4, !tbaa !9
  %99 = zext i32 %98 to i64
  %100 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %99
  store i32 8, ptr %100, align 4, !tbaa !9
  %101 = load ptr, ptr %10, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %101, i32 0, i32 3
  %103 = load i32, ptr %102, align 4, !tbaa !15
  %104 = icmp eq i32 %103, 4
  %105 = zext i1 %104 to i64
  %106 = select i1 %104, i32 4, i32 7
  %107 = load i32, ptr %17, align 4, !tbaa !9
  %108 = zext i32 %107 to i64
  %109 = getelementptr inbounds [32 x i32], ptr %23, i64 0, i64 %108
  store i32 %106, ptr %109, align 4, !tbaa !9
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = add i32 %110, 1
  store i32 %111, ptr %17, align 4, !tbaa !9
  br label %112

112:                                              ; preds = %94
  %113 = load i32, ptr %16, align 4, !tbaa !9
  %114 = add i32 %113, 1
  store i32 %114, ptr %16, align 4, !tbaa !9
  br label %89, !llvm.loop !18

115:                                              ; preds = %89
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %116

116:                                              ; preds = %133, %115
  %117 = load i32, ptr %16, align 4, !tbaa !9
  %118 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %119 = load i32, ptr %118, align 4, !tbaa !9
  %120 = icmp ult i32 %117, %119
  br i1 %120, label %121, label %136

121:                                              ; preds = %116
  %122 = load i32, ptr %17, align 4, !tbaa !9
  %123 = zext i32 %122 to i64
  %124 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %123
  store i32 4, ptr %124, align 4, !tbaa !9
  %125 = load i32, ptr %17, align 4, !tbaa !9
  %126 = zext i32 %125 to i64
  %127 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %126
  store i32 4, ptr %127, align 4, !tbaa !9
  %128 = load i32, ptr %17, align 4, !tbaa !9
  %129 = zext i32 %128 to i64
  %130 = getelementptr inbounds [32 x i32], ptr %23, i64 0, i64 %129
  store i32 5, ptr %130, align 4, !tbaa !9
  %131 = load i32, ptr %17, align 4, !tbaa !9
  %132 = add i32 %131, 1
  store i32 %132, ptr %17, align 4, !tbaa !9
  br label %133

133:                                              ; preds = %121
  %134 = load i32, ptr %16, align 4, !tbaa !9
  %135 = add i32 %134, 1
  store i32 %135, ptr %16, align 4, !tbaa !9
  br label %116, !llvm.loop !19

136:                                              ; preds = %116
  %137 = load ptr, ptr %10, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %137, i32 0, i32 1
  %139 = load i32, ptr %138, align 4, !tbaa !20
  %140 = load i32, ptr %13, align 4, !tbaa !9
  %141 = load i32, ptr %20, align 4, !tbaa !9
  %142 = mul i32 %140, %141
  %143 = sub i32 %139, %142
  store i32 %143, ptr %18, align 4, !tbaa !9
  %144 = load i32, ptr %13, align 4, !tbaa !9
  %145 = load i32, ptr %20, align 4, !tbaa !9
  %146 = icmp ugt i32 %144, %145
  br i1 %146, label %147, label %347

147:                                              ; preds = %136
  %148 = load i32, ptr %13, align 4, !tbaa !9
  %149 = icmp ule i32 %148, 6
  br i1 %149, label %150, label %347

150:                                              ; preds = %147
  %151 = load i32, ptr %20, align 4, !tbaa !9
  %152 = icmp ule i32 %151, 4
  br i1 %152, label %153, label %347

153:                                              ; preds = %150
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %154

154:                                              ; preds = %343, %153
  %155 = load i32, ptr %16, align 4, !tbaa !9
  %156 = load i32, ptr %20, align 4, !tbaa !9
  %157 = icmp ult i32 %155, %156
  br i1 %157, label %158, label %346

158:                                              ; preds = %154
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %159

159:                                              ; preds = %339, %158
  %160 = load i32, ptr %15, align 4, !tbaa !9
  %161 = load i32, ptr %13, align 4, !tbaa !9
  %162 = icmp ult i32 %160, %161
  br i1 %162, label %163, label %342

163:                                              ; preds = %159
  %164 = load i32, ptr %16, align 4, !tbaa !9
  %165 = icmp eq i32 %164, 0
  br i1 %165, label %166, label %234

166:                                              ; preds = %163
  %167 = load ptr, ptr %11, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %167, i32 0, i32 6
  %169 = load i32, ptr %168, align 1, !tbaa !21
  %170 = and i32 %169, 2
  %171 = icmp ugt i32 %170, 0
  br i1 %171, label %172, label %184

172:                                              ; preds = %166
  %173 = load ptr, ptr %8, align 8, !tbaa !5
  %174 = load ptr, ptr %9, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %174, i32 0, i32 3
  %176 = load i32, ptr %175, align 4, !tbaa !24
  %177 = load i32, ptr %15, align 4, !tbaa !9
  %178 = load ptr, ptr %10, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %178, i32 0, i32 3
  %180 = load i32, ptr %179, align 4, !tbaa !15
  %181 = icmp eq i32 %180, 4
  %182 = zext i1 %181 to i64
  %183 = select i1 %181, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %173, i32 noundef 230735875, i32 noundef %176, i32 noundef 63, i32 noundef %177, i32 noundef %183)
  br label %199

184:                                              ; preds = %166
  %185 = load ptr, ptr %8, align 8, !tbaa !5
  %186 = load ptr, ptr %9, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %186, i32 0, i32 3
  %188 = load i32, ptr %187, align 4, !tbaa !24
  %189 = load ptr, ptr %9, align 8, !tbaa !5
  %190 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %189, i32 0, i32 24
  %191 = load i32, ptr %190, align 4, !tbaa !26
  %192 = load i32, ptr %15, align 4, !tbaa !9
  %193 = load ptr, ptr %10, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %193, i32 0, i32 3
  %195 = load i32, ptr %194, align 4, !tbaa !15
  %196 = icmp eq i32 %195, 4
  %197 = zext i1 %196 to i64
  %198 = select i1 %196, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %185, i32 noundef 230735875, i32 noundef %188, i32 noundef %191, i32 noundef %192, i32 noundef %198)
  br label %199

199:                                              ; preds = %184, %172
  %200 = load i32, ptr %15, align 4, !tbaa !9
  %201 = add i32 %200, 1
  %202 = load i32, ptr %13, align 4, !tbaa !9
  %203 = icmp eq i32 %201, %202
  br i1 %203, label %204, label %233

204:                                              ; preds = %199
  %205 = load ptr, ptr %11, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %205, i32 0, i32 6
  %207 = load i32, ptr %206, align 1, !tbaa !21
  %208 = and i32 %207, 2
  %209 = icmp ugt i32 %208, 0
  br i1 %209, label %210, label %221

210:                                              ; preds = %204
  %211 = load ptr, ptr %8, align 8, !tbaa !5
  %212 = load ptr, ptr %9, align 8, !tbaa !5
  %213 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %212, i32 0, i32 3
  %214 = load i32, ptr %213, align 4, !tbaa !24
  %215 = load ptr, ptr %9, align 8, !tbaa !5
  %216 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %215, i32 0, i32 23
  %217 = load i32, ptr %216, align 4, !tbaa !27
  %218 = load ptr, ptr %9, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %218, i32 0, i32 3
  %220 = load i32, ptr %219, align 4, !tbaa !24
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %211, i32 noundef 184549383, i32 noundef %214, i32 noundef %217, i32 noundef %220, i32 noundef 0, i32 noundef 0)
  br label %232

221:                                              ; preds = %204
  %222 = load ptr, ptr %8, align 8, !tbaa !5
  %223 = load ptr, ptr %9, align 8, !tbaa !5
  %224 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %223, i32 0, i32 3
  %225 = load i32, ptr %224, align 4, !tbaa !24
  %226 = load ptr, ptr %9, align 8, !tbaa !5
  %227 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %226, i32 0, i32 23
  %228 = load i32, ptr %227, align 4, !tbaa !27
  %229 = load ptr, ptr %9, align 8, !tbaa !5
  %230 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %229, i32 0, i32 3
  %231 = load i32, ptr %230, align 4, !tbaa !24
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %222, i32 noundef 1258291207, i32 noundef %225, i32 noundef %228, i32 noundef %231, i32 noundef 0, i32 noundef 0)
  br label %232

232:                                              ; preds = %221, %210
  br label %233

233:                                              ; preds = %232, %199
  br label %234

234:                                              ; preds = %233, %163
  %235 = load i32, ptr %15, align 4, !tbaa !9
  %236 = icmp eq i32 %235, 0
  br i1 %236, label %237, label %319

237:                                              ; preds = %234
  %238 = load i32, ptr %17, align 4, !tbaa !9
  %239 = icmp eq i32 %238, 0
  br i1 %239, label %240, label %275

240:                                              ; preds = %237
  store i32 6, ptr %24, align 4, !tbaa !9
  %241 = load ptr, ptr %8, align 8, !tbaa !5
  %242 = load ptr, ptr %9, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %242, i32 0, i32 1
  %244 = load i32, ptr %243, align 4, !tbaa !28
  %245 = load i32, ptr %17, align 4, !tbaa !9
  %246 = zext i32 %245 to i64
  %247 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %246
  %248 = load i32, ptr %247, align 4, !tbaa !9
  %249 = load i32, ptr %24, align 4, !tbaa !9
  %250 = load i32, ptr %17, align 4, !tbaa !9
  %251 = zext i32 %250 to i64
  %252 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %251
  %253 = load i32, ptr %252, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %241, i32 noundef 1010828294, i32 noundef %244, i32 noundef 127, i32 noundef %248, i32 noundef %249, i32 noundef %253)
  %254 = load i32, ptr %17, align 4, !tbaa !9
  %255 = add i32 %254, 1
  store i32 %255, ptr %17, align 4, !tbaa !9
  %256 = load i32, ptr %20, align 4, !tbaa !9
  %257 = icmp ugt i32 %256, 1
  br i1 %257, label %258, label %274

258:                                              ; preds = %240
  store i32 7, ptr %24, align 4, !tbaa !9
  %259 = load ptr, ptr %8, align 8, !tbaa !5
  %260 = load ptr, ptr %9, align 8, !tbaa !5
  %261 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %260, i32 0, i32 1
  %262 = load i32, ptr %261, align 4, !tbaa !28
  %263 = load i32, ptr %17, align 4, !tbaa !9
  %264 = zext i32 %263 to i64
  %265 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %264
  %266 = load i32, ptr %265, align 4, !tbaa !9
  %267 = load i32, ptr %24, align 4, !tbaa !9
  %268 = load i32, ptr %17, align 4, !tbaa !9
  %269 = zext i32 %268 to i64
  %270 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %269
  %271 = load i32, ptr %270, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %259, i32 noundef 1010828294, i32 noundef %262, i32 noundef 127, i32 noundef %266, i32 noundef %267, i32 noundef %271)
  %272 = load i32, ptr %17, align 4, !tbaa !9
  %273 = add i32 %272, 1
  store i32 %273, ptr %17, align 4, !tbaa !9
  br label %274

274:                                              ; preds = %258, %240
  br label %301

275:                                              ; preds = %237
  %276 = load i32, ptr %17, align 4, !tbaa !9
  %277 = load i32, ptr %20, align 4, !tbaa !9
  %278 = icmp ult i32 %276, %277
  br i1 %278, label %279, label %300

279:                                              ; preds = %275
  %280 = load i32, ptr %17, align 4, !tbaa !9
  %281 = urem i32 %280, 2
  %282 = icmp eq i32 %281, 0
  %283 = zext i1 %282 to i64
  %284 = select i1 %282, i32 6, i32 7
  store i32 %284, ptr %24, align 4, !tbaa !9
  %285 = load ptr, ptr %8, align 8, !tbaa !5
  %286 = load ptr, ptr %9, align 8, !tbaa !5
  %287 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %286, i32 0, i32 1
  %288 = load i32, ptr %287, align 4, !tbaa !28
  %289 = load i32, ptr %17, align 4, !tbaa !9
  %290 = zext i32 %289 to i64
  %291 = getelementptr inbounds [32 x i32], ptr %22, i64 0, i64 %290
  %292 = load i32, ptr %291, align 4, !tbaa !9
  %293 = load i32, ptr %24, align 4, !tbaa !9
  %294 = load i32, ptr %17, align 4, !tbaa !9
  %295 = zext i32 %294 to i64
  %296 = getelementptr inbounds [32 x i32], ptr %21, i64 0, i64 %295
  %297 = load i32, ptr %296, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %285, i32 noundef 1010828294, i32 noundef %288, i32 noundef 127, i32 noundef %292, i32 noundef %293, i32 noundef %297)
  %298 = load i32, ptr %17, align 4, !tbaa !9
  %299 = add i32 %298, 1
  store i32 %299, ptr %17, align 4, !tbaa !9
  br label %300

300:                                              ; preds = %279, %275
  br label %301

301:                                              ; preds = %300, %274
  %302 = load i32, ptr %17, align 4, !tbaa !9
  %303 = load i32, ptr %20, align 4, !tbaa !9
  %304 = icmp eq i32 %302, %303
  br i1 %304, label %305, label %318

305:                                              ; preds = %301
  %306 = load ptr, ptr %8, align 8, !tbaa !5
  %307 = load ptr, ptr %9, align 8, !tbaa !5
  %308 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %307, i32 0, i32 1
  %309 = load i32, ptr %308, align 4, !tbaa !28
  %310 = load ptr, ptr %9, align 8, !tbaa !5
  %311 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %310, i32 0, i32 22
  %312 = load i32, ptr %311, align 4, !tbaa !29
  %313 = load ptr, ptr %9, align 8, !tbaa !5
  %314 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %313, i32 0, i32 1
  %315 = load i32, ptr %314, align 4, !tbaa !28
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %306, i32 noundef 184549383, i32 noundef %309, i32 noundef %312, i32 noundef %315, i32 noundef 0, i32 noundef 0)
  %316 = load i32, ptr %17, align 4, !tbaa !9
  %317 = add i32 %316, 1
  store i32 %317, ptr %17, align 4, !tbaa !9
  br label %318

318:                                              ; preds = %305, %301
  br label %319

319:                                              ; preds = %318, %234
  %320 = load i32, ptr %16, align 4, !tbaa !9
  %321 = urem i32 %320, 2
  %322 = icmp eq i32 %321, 0
  %323 = zext i1 %322 to i64
  %324 = select i1 %322, i32 6, i32 7
  store i32 %324, ptr %24, align 4, !tbaa !9
  %325 = load ptr, ptr %8, align 8, !tbaa !5
  %326 = load i32, ptr %24, align 4, !tbaa !9
  %327 = load i32, ptr %15, align 4, !tbaa !9
  %328 = load i32, ptr %18, align 4, !tbaa !9
  %329 = load i32, ptr %16, align 4, !tbaa !9
  %330 = add i32 %328, %329
  %331 = load i32, ptr %20, align 4, !tbaa !9
  %332 = load i32, ptr %15, align 4, !tbaa !9
  %333 = mul i32 %331, %332
  %334 = add i32 %330, %333
  %335 = load i32, ptr %16, align 4, !tbaa !9
  %336 = zext i32 %335 to i64
  %337 = getelementptr inbounds [32 x i32], ptr %23, i64 0, i64 %336
  %338 = load i32, ptr %337, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %325, i32 noundef 237030411, i32 noundef %326, i32 noundef %327, i8 noundef zeroext 0, i32 noundef %334, i32 noundef %338)
  br label %339

339:                                              ; preds = %319
  %340 = load i32, ptr %15, align 4, !tbaa !9
  %341 = add i32 %340, 1
  store i32 %341, ptr %15, align 4, !tbaa !9
  br label %159, !llvm.loop !30

342:                                              ; preds = %159
  br label %343

343:                                              ; preds = %342
  %344 = load i32, ptr %16, align 4, !tbaa !9
  %345 = add i32 %344, 1
  store i32 %345, ptr %16, align 4, !tbaa !9
  br label %154, !llvm.loop !31

346:                                              ; preds = %154
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  br label %596

347:                                              ; preds = %150, %147, %136
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %348

348:                                              ; preds = %360, %347
  %349 = load i32, ptr %16, align 4, !tbaa !9
  %350 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %351 = load i32, ptr %350, align 4, !tbaa !9
  %352 = icmp ult i32 %349, %351
  br i1 %352, label %353, label %363

353:                                              ; preds = %348
  %354 = load ptr, ptr %8, align 8, !tbaa !5
  %355 = load ptr, ptr %9, align 8, !tbaa !5
  %356 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %355, i32 0, i32 1
  %357 = load i32, ptr %356, align 4, !tbaa !28
  %358 = load i32, ptr %16, align 4, !tbaa !9
  %359 = add i32 1, %358
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %354, i32 noundef 1010828294, i32 noundef %357, i32 noundef 127, i32 noundef 16, i32 noundef %359, i32 noundef 1)
  br label %360

360:                                              ; preds = %353
  %361 = load i32, ptr %16, align 4, !tbaa !9
  %362 = add i32 %361, 1
  store i32 %362, ptr %16, align 4, !tbaa !9
  br label %348, !llvm.loop !32

363:                                              ; preds = %348
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %364

364:                                              ; preds = %379, %363
  %365 = load i32, ptr %16, align 4, !tbaa !9
  %366 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %367 = load i32, ptr %366, align 4, !tbaa !9
  %368 = icmp ult i32 %365, %367
  br i1 %368, label %369, label %382

369:                                              ; preds = %364
  %370 = load ptr, ptr %8, align 8, !tbaa !5
  %371 = load ptr, ptr %9, align 8, !tbaa !5
  %372 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %371, i32 0, i32 1
  %373 = load i32, ptr %372, align 4, !tbaa !28
  %374 = load i32, ptr %16, align 4, !tbaa !9
  %375 = add i32 1, %374
  %376 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %377 = load i32, ptr %376, align 4, !tbaa !9
  %378 = add i32 %375, %377
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %370, i32 noundef 1010828294, i32 noundef %373, i32 noundef 127, i32 noundef 8, i32 noundef %378, i32 noundef 6)
  br label %379

379:                                              ; preds = %369
  %380 = load i32, ptr %16, align 4, !tbaa !9
  %381 = add i32 %380, 1
  store i32 %381, ptr %16, align 4, !tbaa !9
  br label %364, !llvm.loop !33

382:                                              ; preds = %364
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %383

383:                                              ; preds = %401, %382
  %384 = load i32, ptr %16, align 4, !tbaa !9
  %385 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %386 = load i32, ptr %385, align 4, !tbaa !9
  %387 = icmp ult i32 %384, %386
  br i1 %387, label %388, label %404

388:                                              ; preds = %383
  %389 = load ptr, ptr %8, align 8, !tbaa !5
  %390 = load ptr, ptr %9, align 8, !tbaa !5
  %391 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %390, i32 0, i32 1
  %392 = load i32, ptr %391, align 4, !tbaa !28
  %393 = load i32, ptr %16, align 4, !tbaa !9
  %394 = add i32 1, %393
  %395 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %396 = load i32, ptr %395, align 4, !tbaa !9
  %397 = add i32 %394, %396
  %398 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %399 = load i32, ptr %398, align 4, !tbaa !9
  %400 = add i32 %397, %399
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %389, i32 noundef 1010828294, i32 noundef %392, i32 noundef 127, i32 noundef 4, i32 noundef %400, i32 noundef 4)
  br label %401

401:                                              ; preds = %388
  %402 = load i32, ptr %16, align 4, !tbaa !9
  %403 = add i32 %402, 1
  store i32 %403, ptr %16, align 4, !tbaa !9
  br label %383, !llvm.loop !34

404:                                              ; preds = %383
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %405

405:                                              ; preds = %592, %404
  %406 = load i32, ptr %15, align 4, !tbaa !9
  %407 = load i32, ptr %13, align 4, !tbaa !9
  %408 = icmp ult i32 %406, %407
  br i1 %408, label %409, label %595

409:                                              ; preds = %405
  %410 = load ptr, ptr %11, align 8, !tbaa !5
  %411 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %410, i32 0, i32 6
  %412 = load i32, ptr %411, align 1, !tbaa !21
  %413 = and i32 %412, 2
  %414 = icmp ugt i32 %413, 0
  br i1 %414, label %415, label %426

415:                                              ; preds = %409
  %416 = load ptr, ptr %8, align 8, !tbaa !5
  %417 = load ptr, ptr %9, align 8, !tbaa !5
  %418 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %417, i32 0, i32 3
  %419 = load i32, ptr %418, align 4, !tbaa !24
  %420 = load ptr, ptr %10, align 8, !tbaa !5
  %421 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %420, i32 0, i32 3
  %422 = load i32, ptr %421, align 4, !tbaa !15
  %423 = icmp eq i32 %422, 4
  %424 = zext i1 %423 to i64
  %425 = select i1 %423, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %416, i32 noundef 230735875, i32 noundef %419, i32 noundef 63, i32 noundef 0, i32 noundef %425)
  br label %440

426:                                              ; preds = %409
  %427 = load ptr, ptr %8, align 8, !tbaa !5
  %428 = load ptr, ptr %9, align 8, !tbaa !5
  %429 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %428, i32 0, i32 3
  %430 = load i32, ptr %429, align 4, !tbaa !24
  %431 = load ptr, ptr %9, align 8, !tbaa !5
  %432 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %431, i32 0, i32 24
  %433 = load i32, ptr %432, align 4, !tbaa !26
  %434 = load ptr, ptr %10, align 8, !tbaa !5
  %435 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %434, i32 0, i32 3
  %436 = load i32, ptr %435, align 4, !tbaa !15
  %437 = icmp eq i32 %436, 4
  %438 = zext i1 %437 to i64
  %439 = select i1 %437, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %427, i32 noundef 230735875, i32 noundef %430, i32 noundef %433, i32 noundef 0, i32 noundef %439)
  br label %440

440:                                              ; preds = %426, %415
  %441 = load i32, ptr %15, align 4, !tbaa !9
  %442 = load i32, ptr %13, align 4, !tbaa !9
  %443 = sub i32 %442, 1
  %444 = icmp eq i32 %441, %443
  br i1 %444, label %445, label %484

445:                                              ; preds = %440
  %446 = load ptr, ptr %11, align 8, !tbaa !5
  %447 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %446, i32 0, i32 6
  %448 = load i32, ptr %447, align 1, !tbaa !21
  %449 = and i32 %448, 2
  %450 = icmp ugt i32 %449, 0
  br i1 %450, label %451, label %462

451:                                              ; preds = %445
  %452 = load ptr, ptr %8, align 8, !tbaa !5
  %453 = load ptr, ptr %9, align 8, !tbaa !5
  %454 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %453, i32 0, i32 3
  %455 = load i32, ptr %454, align 4, !tbaa !24
  %456 = load ptr, ptr %9, align 8, !tbaa !5
  %457 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %456, i32 0, i32 23
  %458 = load i32, ptr %457, align 4, !tbaa !27
  %459 = load ptr, ptr %9, align 8, !tbaa !5
  %460 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %459, i32 0, i32 3
  %461 = load i32, ptr %460, align 4, !tbaa !24
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %452, i32 noundef 184549383, i32 noundef %455, i32 noundef %458, i32 noundef %461, i32 noundef 0, i32 noundef 0)
  br label %473

462:                                              ; preds = %445
  %463 = load ptr, ptr %8, align 8, !tbaa !5
  %464 = load ptr, ptr %9, align 8, !tbaa !5
  %465 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %464, i32 0, i32 3
  %466 = load i32, ptr %465, align 4, !tbaa !24
  %467 = load ptr, ptr %9, align 8, !tbaa !5
  %468 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %467, i32 0, i32 23
  %469 = load i32, ptr %468, align 4, !tbaa !27
  %470 = load ptr, ptr %9, align 8, !tbaa !5
  %471 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %470, i32 0, i32 3
  %472 = load i32, ptr %471, align 4, !tbaa !24
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %463, i32 noundef 1258291207, i32 noundef %466, i32 noundef %469, i32 noundef %472, i32 noundef 0, i32 noundef 0)
  br label %473

473:                                              ; preds = %462, %451
  %474 = load ptr, ptr %8, align 8, !tbaa !5
  %475 = load ptr, ptr %9, align 8, !tbaa !5
  %476 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %475, i32 0, i32 1
  %477 = load i32, ptr %476, align 4, !tbaa !28
  %478 = load ptr, ptr %9, align 8, !tbaa !5
  %479 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %478, i32 0, i32 22
  %480 = load i32, ptr %479, align 4, !tbaa !29
  %481 = load ptr, ptr %9, align 8, !tbaa !5
  %482 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %481, i32 0, i32 1
  %483 = load i32, ptr %482, align 4, !tbaa !28
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %474, i32 noundef 184549383, i32 noundef %477, i32 noundef %480, i32 noundef %483, i32 noundef 0, i32 noundef 0)
  br label %484

484:                                              ; preds = %473, %440
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %485

485:                                              ; preds = %507, %484
  %486 = load i32, ptr %16, align 4, !tbaa !9
  %487 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %488 = load i32, ptr %487, align 4, !tbaa !9
  %489 = icmp ult i32 %486, %488
  br i1 %489, label %490, label %510

490:                                              ; preds = %485
  %491 = load ptr, ptr %8, align 8, !tbaa !5
  %492 = load i32, ptr %16, align 4, !tbaa !9
  %493 = add i32 1, %492
  %494 = load i32, ptr %18, align 4, !tbaa !9
  %495 = load i32, ptr %16, align 4, !tbaa !9
  %496 = add i32 %494, %495
  %497 = load i32, ptr %20, align 4, !tbaa !9
  %498 = load i32, ptr %15, align 4, !tbaa !9
  %499 = mul i32 %497, %498
  %500 = add i32 %496, %499
  %501 = load ptr, ptr %10, align 8, !tbaa !5
  %502 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %501, i32 0, i32 3
  %503 = load i32, ptr %502, align 4, !tbaa !15
  %504 = icmp eq i32 %503, 4
  %505 = zext i1 %504 to i64
  %506 = select i1 %504, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %491, i32 noundef 237030411, i32 noundef %493, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %500, i32 noundef %506)
  br label %507

507:                                              ; preds = %490
  %508 = load i32, ptr %16, align 4, !tbaa !9
  %509 = add i32 %508, 1
  store i32 %509, ptr %16, align 4, !tbaa !9
  br label %485, !llvm.loop !35

510:                                              ; preds = %485
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %511

511:                                              ; preds = %556, %510
  %512 = load i32, ptr %16, align 4, !tbaa !9
  %513 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %514 = load i32, ptr %513, align 4, !tbaa !9
  %515 = icmp ult i32 %512, %514
  br i1 %515, label %516, label %559

516:                                              ; preds = %511
  %517 = load ptr, ptr %10, align 8, !tbaa !5
  %518 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %517, i32 0, i32 3
  %519 = load i32, ptr %518, align 4, !tbaa !15
  %520 = icmp eq i32 %519, 4
  br i1 %520, label %521, label %538

521:                                              ; preds = %516
  %522 = load ptr, ptr %8, align 8, !tbaa !5
  %523 = load i32, ptr %16, align 4, !tbaa !9
  %524 = add i32 1, %523
  %525 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %526 = load i32, ptr %525, align 4, !tbaa !9
  %527 = add i32 %524, %526
  %528 = load i32, ptr %18, align 4, !tbaa !9
  %529 = load i32, ptr %16, align 4, !tbaa !9
  %530 = add i32 %528, %529
  %531 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %532 = load i32, ptr %531, align 4, !tbaa !9
  %533 = add i32 %530, %532
  %534 = load i32, ptr %20, align 4, !tbaa !9
  %535 = load i32, ptr %15, align 4, !tbaa !9
  %536 = mul i32 %534, %535
  %537 = add i32 %533, %536
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %522, i32 noundef 237030411, i32 noundef %527, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %537, i32 noundef 4)
  br label %555

538:                                              ; preds = %516
  %539 = load ptr, ptr %8, align 8, !tbaa !5
  %540 = load i32, ptr %16, align 4, !tbaa !9
  %541 = add i32 1, %540
  %542 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %543 = load i32, ptr %542, align 4, !tbaa !9
  %544 = add i32 %541, %543
  %545 = load i32, ptr %18, align 4, !tbaa !9
  %546 = load i32, ptr %16, align 4, !tbaa !9
  %547 = add i32 %545, %546
  %548 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %549 = load i32, ptr %548, align 4, !tbaa !9
  %550 = add i32 %547, %549
  %551 = load i32, ptr %20, align 4, !tbaa !9
  %552 = load i32, ptr %15, align 4, !tbaa !9
  %553 = mul i32 %551, %552
  %554 = add i32 %550, %553
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %539, i32 noundef 237030411, i32 noundef %544, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %554, i32 noundef 7)
  br label %555

555:                                              ; preds = %538, %521
  br label %556

556:                                              ; preds = %555
  %557 = load i32, ptr %16, align 4, !tbaa !9
  %558 = add i32 %557, 1
  store i32 %558, ptr %16, align 4, !tbaa !9
  br label %511, !llvm.loop !36

559:                                              ; preds = %511
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %560

560:                                              ; preds = %588, %559
  %561 = load i32, ptr %16, align 4, !tbaa !9
  %562 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %563 = load i32, ptr %562, align 4, !tbaa !9
  %564 = icmp ult i32 %561, %563
  br i1 %564, label %565, label %591

565:                                              ; preds = %560
  %566 = load ptr, ptr %8, align 8, !tbaa !5
  %567 = load i32, ptr %16, align 4, !tbaa !9
  %568 = add i32 1, %567
  %569 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %570 = load i32, ptr %569, align 4, !tbaa !9
  %571 = add i32 %568, %570
  %572 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %573 = load i32, ptr %572, align 4, !tbaa !9
  %574 = add i32 %571, %573
  %575 = load i32, ptr %18, align 4, !tbaa !9
  %576 = load i32, ptr %16, align 4, !tbaa !9
  %577 = add i32 %575, %576
  %578 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %579 = load i32, ptr %578, align 4, !tbaa !9
  %580 = add i32 %577, %579
  %581 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %582 = load i32, ptr %581, align 4, !tbaa !9
  %583 = add i32 %580, %582
  %584 = load i32, ptr %20, align 4, !tbaa !9
  %585 = load i32, ptr %15, align 4, !tbaa !9
  %586 = mul i32 %584, %585
  %587 = add i32 %583, %586
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %566, i32 noundef 237030411, i32 noundef %574, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %587, i32 noundef 5)
  br label %588

588:                                              ; preds = %565
  %589 = load i32, ptr %16, align 4, !tbaa !9
  %590 = add i32 %589, 1
  store i32 %590, ptr %16, align 4, !tbaa !9
  br label %560, !llvm.loop !37

591:                                              ; preds = %560
  br label %592

592:                                              ; preds = %591
  %593 = load i32, ptr %15, align 4, !tbaa !9
  %594 = add i32 %593, 1
  store i32 %594, ptr %15, align 4, !tbaa !9
  br label %405, !llvm.loop !38

595:                                              ; preds = %405
  br label %596

596:                                              ; preds = %595, %346
  call void @llvm.lifetime.end.p0(i64 128, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 128, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 128, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !13, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!13 = !{!"libxsmm_tile_config", !7, i64 0, !14, i64 2, !7, i64 4, !14, i64 6, !7, i64 8, !14, i64 10, !7, i64 12, !14, i64 14, !7, i64 16, !14, i64 18, !7, i64 20, !14, i64 22, !7, i64 24, !14, i64 26, !7, i64 28, !14, i64 30, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 12}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = !{!12, !10, i64 4}
!21 = !{!22, !10, i64 24}
!22 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !23, i64 33, !23, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!23 = !{!"long long", !7, i64 0}
!24 = !{!25, !10, i64 12}
!25 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!26 = !{!25, !10, i64 96}
!27 = !{!25, !10, i64 92}
!28 = !{!25, !10, i64 4}
!29 = !{!25, !10, i64 88}
!30 = distinct !{!30, !17}
!31 = distinct !{!31, !17}
!32 = distinct !{!32, !17}
!33 = distinct !{!33, !17}
!34 = distinct !{!34, !17}
!35 = distinct !{!35, !17}
!36 = distinct !{!36, !17}
!37 = distinct !{!37, !17}
!38 = distinct !{!38, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_a64fx(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #3 {
  %8 = alloca [32 x i32], align 16
  %9 = alloca [32 x i32], align 16
  %10 = alloca [32 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %8) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(128) %8, i8 0, i64 128, i1 false)
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %9) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(128) %9, i8 0, i64 128, i1 false)
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %10) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(128) %10, i8 0, i64 128, i1 false)
  %11 = getelementptr inbounds i8, ptr %2, i64 8
  %12 = load i32, ptr %11, align 8, !tbaa !5
  %13 = udiv i32 %4, %12
  %14 = urem i32 %4, %12
  %15 = udiv i32 %4, %12
  %16 = lshr i32 %12, 1
  %17 = udiv i32 %14, %16
  %18 = urem i32 %14, %16
  %19 = add i32 %17, %13
  %20 = add i32 %19, %18
  %.not273 = icmp ugt i32 %12, %4
  br i1 %.not273, label %.preheader243, label %.lr.ph

.lr.ph:                                           ; preds = %7
  %21 = getelementptr inbounds i8, ptr %2, i64 12
  %22 = load i32, ptr %21, align 4, !tbaa !13
  %23 = icmp eq i32 %22, 4
  %24 = select i1 %23, i32 5, i32 7
  %25 = tail call i32 @llvm.umax.i32(i32 %15, i32 1)
  %umax = zext i32 %25 to i64
  %min.iters.check = icmp ult i32 %15, 8
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

scalar.ph.preheader:                              ; preds = %middle.block, %.lr.ph
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph ], [ %n.vec, %middle.block ]
  br label %scalar.ph

vector.ph:                                        ; preds = %.lr.ph
  %n.vec = and i64 %umax, 4294967288
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %24, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %26 = phi i64 [ 3, %vector.ph ], [ %33, %vector.body ]
  %27 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %index
  %28 = getelementptr inbounds i8, ptr %27, i64 16
  store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, ptr %27, align 16, !tbaa !14
  store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, ptr %28, align 16, !tbaa !14
  %29 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %index
  %30 = getelementptr inbounds i8, ptr %29, i64 16
  store <4 x i32> <i32 16, i32 16, i32 16, i32 16>, ptr %29, align 16, !tbaa !14
  store <4 x i32> <i32 16, i32 16, i32 16, i32 16>, ptr %30, align 16, !tbaa !14
  %31 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %index
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  store <4 x i32> %broadcast.splat, ptr %31, align 16, !tbaa !14
  store <4 x i32> %broadcast.splat, ptr %32, align 16, !tbaa !14
  %index.next = add nuw i64 %index, 8
  %33 = add i64 %26, 8
  %34 = icmp eq i64 %index.next, %n.vec
  br i1 %34, label %middle.block, label %vector.body, !llvm.loop !15

middle.block:                                     ; preds = %vector.body
  %35 = trunc i64 %26 to i32
  %36 = add i32 %35, 5
  %cmp.n = icmp eq i64 %n.vec, %umax
  br i1 %cmp.n, label %.preheader243, label %scalar.ph.preheader

.preheader243:                                    ; preds = %scalar.ph, %middle.block, %7
  %.0.lcssa = phi i32 [ 0, %7 ], [ %36, %middle.block ], [ %indvars288, %scalar.ph ]
  %.not274 = icmp ugt i32 %16, %14
  br i1 %.not274, label %.preheader242, label %.lr.ph248

.lr.ph248:                                        ; preds = %.preheader243
  %37 = getelementptr inbounds i8, ptr %2, i64 12
  %38 = load i32, ptr %37, align 4, !tbaa !13
  %39 = icmp eq i32 %38, 4
  %40 = select i1 %39, i32 4, i32 7
  %min.iters.check324 = icmp ult i32 %17, 8
  %41 = sub i32 0, %17
  %42 = icmp ugt i32 %.0.lcssa, %41
  %or.cond352 = select i1 %min.iters.check324, i1 true, i1 %42
  br i1 %or.cond352, label %scalar.ph323.preheader, label %vector.ph325

scalar.ph323.preheader:                           ; preds = %middle.block322, %.lr.ph248
  %.1247.ph = phi i32 [ %.0.lcssa, %.lr.ph248 ], [ %ind.end, %middle.block322 ]
  %.1217246.ph = phi i32 [ 0, %.lr.ph248 ], [ %n.vec327, %middle.block322 ]
  br label %scalar.ph323

vector.ph325:                                     ; preds = %.lr.ph248
  %n.vec327 = and i32 %17, -8
  %ind.end = add i32 %.0.lcssa, %n.vec327
  %broadcast.splatinsert332 = insertelement <4 x i32> poison, i32 %40, i64 0
  %broadcast.splat333 = shufflevector <4 x i32> %broadcast.splatinsert332, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body330

vector.body330:                                   ; preds = %vector.body330, %vector.ph325
  %index331 = phi i32 [ 0, %vector.ph325 ], [ %index.next334, %vector.body330 ]
  %offset.idx = add i32 %.0.lcssa, %index331
  %43 = zext i32 %offset.idx to i64
  %44 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %43
  %45 = getelementptr inbounds i8, ptr %44, i64 16
  store <4 x i32> <i32 6, i32 6, i32 6, i32 6>, ptr %44, align 4, !tbaa !14
  store <4 x i32> <i32 6, i32 6, i32 6, i32 6>, ptr %45, align 4, !tbaa !14
  %46 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %43
  %47 = getelementptr inbounds i8, ptr %46, i64 16
  store <4 x i32> <i32 8, i32 8, i32 8, i32 8>, ptr %46, align 4, !tbaa !14
  store <4 x i32> <i32 8, i32 8, i32 8, i32 8>, ptr %47, align 4, !tbaa !14
  %48 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %43
  %49 = getelementptr inbounds i8, ptr %48, i64 16
  store <4 x i32> %broadcast.splat333, ptr %48, align 4, !tbaa !14
  store <4 x i32> %broadcast.splat333, ptr %49, align 4, !tbaa !14
  %index.next334 = add nuw i32 %index331, 8
  %50 = icmp eq i32 %index.next334, %n.vec327
  br i1 %50, label %middle.block322, label %vector.body330, !llvm.loop !19

middle.block322:                                  ; preds = %vector.body330
  %cmp.n335 = icmp eq i32 %17, %n.vec327
  br i1 %cmp.n335, label %.preheader242, label %scalar.ph323.preheader

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %51 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %indvars.iv
  store i32 1, ptr %51, align 4, !tbaa !14
  %52 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %indvars.iv
  store i32 16, ptr %52, align 4, !tbaa !14
  %53 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %indvars.iv
  store i32 %24, ptr %53, align 4, !tbaa !14
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %indvars288 = trunc i64 %indvars.iv.next to i32
  %54 = icmp ugt i32 %13, %indvars288
  br i1 %54, label %scalar.ph, label %.preheader243, !llvm.loop !20

.preheader242:                                    ; preds = %scalar.ph323, %middle.block322, %.preheader243
  %.1.lcssa = phi i32 [ %.0.lcssa, %.preheader243 ], [ %ind.end, %middle.block322 ], [ %72, %scalar.ph323 ]
  %.not275 = icmp eq i32 %18, 0
  br i1 %.not275, label %._crit_edge, label %.lr.ph252.preheader

.lr.ph252.preheader:                              ; preds = %.preheader242
  %min.iters.check339 = icmp ult i32 %18, 12
  br i1 %min.iters.check339, label %.lr.ph252.preheader354, label %vector.scevcheck336

.lr.ph252.preheader354:                           ; preds = %middle.block337, %vector.scevcheck336, %.lr.ph252.preheader
  %.2251.ph = phi i32 [ %.1.lcssa, %vector.scevcheck336 ], [ %.1.lcssa, %.lr.ph252.preheader ], [ %ind.end343, %middle.block337 ]
  %.2218250.ph = phi i32 [ 0, %vector.scevcheck336 ], [ 0, %.lr.ph252.preheader ], [ %n.vec342, %middle.block337 ]
  br label %.lr.ph252

vector.scevcheck336:                              ; preds = %.lr.ph252.preheader
  %55 = mul nuw i32 %12, %13
  %56 = mul nuw i32 %16, %17
  %57 = sub i32 %55, %4
  %58 = add i32 %57, %56
  %59 = icmp ult i32 %58, %.1.lcssa
  br i1 %59, label %.lr.ph252.preheader354, label %vector.ph340

vector.ph340:                                     ; preds = %vector.scevcheck336
  %n.vec342 = and i32 %18, 2147483640
  %ind.end343 = add i32 %.1.lcssa, %n.vec342
  br label %vector.body346

vector.body346:                                   ; preds = %vector.body346, %vector.ph340
  %index347 = phi i32 [ 0, %vector.ph340 ], [ %index.next349, %vector.body346 ]
  %offset.idx348 = add i32 %.1.lcssa, %index347
  %60 = zext i32 %offset.idx348 to i64
  %61 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %60
  %62 = getelementptr inbounds i8, ptr %61, i64 16
  store <4 x i32> <i32 4, i32 4, i32 4, i32 4>, ptr %61, align 4, !tbaa !14
  store <4 x i32> <i32 4, i32 4, i32 4, i32 4>, ptr %62, align 4, !tbaa !14
  %63 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %60
  %64 = getelementptr inbounds i8, ptr %63, i64 16
  store <4 x i32> <i32 4, i32 4, i32 4, i32 4>, ptr %63, align 4, !tbaa !14
  store <4 x i32> <i32 4, i32 4, i32 4, i32 4>, ptr %64, align 4, !tbaa !14
  %65 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %60
  %66 = getelementptr inbounds i8, ptr %65, i64 16
  store <4 x i32> <i32 5, i32 5, i32 5, i32 5>, ptr %65, align 4, !tbaa !14
  store <4 x i32> <i32 5, i32 5, i32 5, i32 5>, ptr %66, align 4, !tbaa !14
  %index.next349 = add nuw i32 %index347, 8
  %67 = icmp eq i32 %index.next349, %n.vec342
  br i1 %67, label %middle.block337, label %vector.body346, !llvm.loop !21

middle.block337:                                  ; preds = %vector.body346
  %cmp.n350 = icmp eq i32 %18, %n.vec342
  br i1 %cmp.n350, label %._crit_edge, label %.lr.ph252.preheader354

scalar.ph323:                                     ; preds = %scalar.ph323.preheader, %scalar.ph323
  %.1247 = phi i32 [ %72, %scalar.ph323 ], [ %.1247.ph, %scalar.ph323.preheader ]
  %.1217246 = phi i32 [ %73, %scalar.ph323 ], [ %.1217246.ph, %scalar.ph323.preheader ]
  %68 = zext i32 %.1247 to i64
  %69 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %68
  store i32 6, ptr %69, align 4, !tbaa !14
  %70 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %68
  store i32 8, ptr %70, align 4, !tbaa !14
  %71 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %68
  store i32 %40, ptr %71, align 4, !tbaa !14
  %72 = add i32 %.1247, 1
  %73 = add nuw i32 %.1217246, 1
  %74 = icmp ult i32 %73, %17
  br i1 %74, label %scalar.ph323, label %.preheader242, !llvm.loop !22

.lr.ph252:                                        ; preds = %.lr.ph252.preheader354, %.lr.ph252
  %.2251 = phi i32 [ %79, %.lr.ph252 ], [ %.2251.ph, %.lr.ph252.preheader354 ]
  %.2218250 = phi i32 [ %80, %.lr.ph252 ], [ %.2218250.ph, %.lr.ph252.preheader354 ]
  %75 = zext i32 %.2251 to i64
  %76 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %75
  store i32 4, ptr %76, align 4, !tbaa !14
  %77 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %75
  store i32 4, ptr %77, align 4, !tbaa !14
  %78 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %75
  store i32 5, ptr %78, align 4, !tbaa !14
  %79 = add i32 %.2251, 1
  %80 = add nuw nsw i32 %.2218250, 1
  %81 = icmp ult i32 %80, %18
  br i1 %81, label %.lr.ph252, label %._crit_edge, !llvm.loop !23

._crit_edge:                                      ; preds = %.lr.ph252, %middle.block337, %.preheader242
  %82 = getelementptr inbounds i8, ptr %2, i64 4
  %83 = load i32, ptr %82, align 4, !tbaa !24
  %84 = mul i32 %20, %5
  %85 = sub i32 %83, %84
  %86 = icmp ult i32 %20, %5
  %87 = icmp ult i32 %5, 7
  %or.cond = and i1 %87, %86
  %88 = icmp ult i32 %20, 5
  %or.cond3 = and i1 %88, %or.cond
  br i1 %or.cond3, label %.preheader234, label %.preheader241

.preheader241:                                    ; preds = %._crit_edge
  br i1 %.not273, label %.preheader240, label %.lr.ph254

.lr.ph254:                                        ; preds = %.preheader241
  %89 = getelementptr inbounds i8, ptr %1, i64 4
  br label %173

.preheader234:                                    ; preds = %._crit_edge
  %.not283 = icmp eq i32 %20, 0
  br i1 %.not283, label %.loopexit, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader234
  %90 = getelementptr inbounds i8, ptr %3, i64 24
  %91 = getelementptr inbounds i8, ptr %1, i64 12
  %92 = getelementptr inbounds i8, ptr %2, i64 12
  %93 = getelementptr inbounds i8, ptr %1, i64 96
  %94 = getelementptr inbounds i8, ptr %1, i64 92
  %95 = getelementptr inbounds i8, ptr %1, i64 4
  %96 = load i32, ptr %9, align 16
  %97 = load i32, ptr %8, align 16
  %.not284 = icmp eq i32 %20, 1
  %98 = getelementptr inbounds i8, ptr %9, i64 4
  %99 = load i32, ptr %98, align 4
  %100 = getelementptr inbounds i8, ptr %8, i64 4
  %101 = load i32, ptr %100, align 4
  %102 = getelementptr inbounds i8, ptr %1, i64 88
  %103 = zext nneg i32 %20 to i64
  %104 = icmp eq i32 %5, 1
  %105 = add nuw nsw i32 %20, 1
  %exitcond290.peel.not = icmp eq i32 %5, 1
  br label %.preheader

.preheader:                                       ; preds = %.preheader.lr.ph, %.loopexit292
  %indvars.iv293 = phi i64 [ 0, %.preheader.lr.ph ], [ %indvars.iv.next294, %.loopexit292 ]
  %.3272 = phi i32 [ 0, %.preheader.lr.ph ], [ %.6.peel, %.loopexit292 ]
  %106 = icmp eq i64 %indvars.iv293, 0
  %107 = trunc nuw nsw i64 %indvars.iv293 to i32
  %108 = and i32 %107, 1
  %109 = or disjoint i32 %108, 6
  %110 = add i32 %85, %107
  %111 = getelementptr inbounds [32 x i32], ptr %10, i64 0, i64 %indvars.iv293
  br i1 %106, label %112, label %126

112:                                              ; preds = %.preheader
  %113 = load i32, ptr %90, align 1, !tbaa !25
  %114 = and i32 %113, 2
  %.not232.peel = icmp eq i32 %114, 0
  %115 = load i32, ptr %91, align 4, !tbaa !28
  br i1 %.not232.peel, label %116, label %118

116:                                              ; preds = %112
  %117 = load i32, ptr %93, align 4, !tbaa !30
  br label %118

118:                                              ; preds = %112, %116
  %.sink = phi i32 [ %117, %116 ], [ 63, %112 ]
  %119 = load i32, ptr %92, align 4, !tbaa !13
  %120 = icmp eq i32 %119, 4
  %121 = select i1 %120, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %0, i32 noundef 230735875, i32 noundef %115, i32 noundef %.sink, i32 noundef 0, i32 noundef %121) #5
  br i1 %104, label %.sink.split, label %126

.sink.split:                                      ; preds = %118
  %122 = load i32, ptr %90, align 1, !tbaa !25
  %123 = and i32 %122, 2
  %.not233.peel = icmp eq i32 %123, 0
  %124 = load i32, ptr %91, align 4, !tbaa !28
  %125 = load i32, ptr %94, align 4, !tbaa !31
  %. = select i1 %.not233.peel, i32 1258291207, i32 184549383
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef %., i32 noundef %124, i32 noundef %125, i32 noundef %124, i32 noundef 0, i32 noundef 0) #5
  br label %126

126:                                              ; preds = %.sink.split, %.preheader, %118
  %127 = icmp eq i32 %.3272, 0
  br i1 %127, label %140, label %128

128:                                              ; preds = %126
  %129 = icmp ult i32 %.3272, %20
  br i1 %129, label %130, label %144

130:                                              ; preds = %128
  %131 = and i32 %.3272, 1
  %132 = or disjoint i32 %131, 6
  %133 = load i32, ptr %95, align 4, !tbaa !32
  %134 = zext nneg i32 %.3272 to i64
  %135 = getelementptr inbounds [32 x i32], ptr %9, i64 0, i64 %134
  %136 = load i32, ptr %135, align 4, !tbaa !14
  %137 = getelementptr inbounds [32 x i32], ptr %8, i64 0, i64 %134
  %138 = load i32, ptr %137, align 4, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %133, i32 noundef 127, i32 noundef %136, i32 noundef %132, i32 noundef %138) #5
  %139 = add nuw nsw i32 %.3272, 1
  br label %144

140:                                              ; preds = %126
  %141 = load i32, ptr %95, align 4, !tbaa !32
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %141, i32 noundef 127, i32 noundef %96, i32 noundef 6, i32 noundef %97) #5
  br i1 %.not284, label %144, label %142

142:                                              ; preds = %140
  %143 = load i32, ptr %95, align 4, !tbaa !32
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %143, i32 noundef 127, i32 noundef %99, i32 noundef 7, i32 noundef %101) #5
  br label %144

144:                                              ; preds = %142, %140, %130, %128
  %.5.peel = phi i32 [ 2, %142 ], [ 1, %140 ], [ %139, %130 ], [ %.3272, %128 ]
  %145 = icmp eq i32 %.5.peel, %20
  br i1 %145, label %146, label %149

146:                                              ; preds = %144
  %147 = load i32, ptr %95, align 4, !tbaa !32
  %148 = load i32, ptr %102, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %147, i32 noundef %148, i32 noundef %147, i32 noundef 0, i32 noundef 0) #5
  br label %149

149:                                              ; preds = %146, %144
  %.6.peel = phi i32 [ %105, %146 ], [ %.5.peel, %144 ]
  %150 = load i32, ptr %111, align 4, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %109, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %110, i32 noundef %150) #5
  br i1 %exitcond290.peel.not, label %.loopexit292, label %.peel.next

.peel.next:                                       ; preds = %149, %167
  %.0223269 = phi i32 [ %170, %167 ], [ 1, %149 ]
  br i1 %106, label %151, label %167

151:                                              ; preds = %.peel.next
  %152 = load i32, ptr %90, align 1, !tbaa !25
  %153 = and i32 %152, 2
  %.not232 = icmp eq i32 %153, 0
  %154 = load i32, ptr %91, align 4, !tbaa !28
  br i1 %.not232, label %155, label %157

155:                                              ; preds = %151
  %156 = load i32, ptr %93, align 4, !tbaa !30
  br label %157

157:                                              ; preds = %151, %155
  %.sink303 = phi i32 [ %156, %155 ], [ 63, %151 ]
  %158 = load i32, ptr %92, align 4, !tbaa !13
  %159 = icmp eq i32 %158, 4
  %160 = select i1 %159, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %0, i32 noundef 230735875, i32 noundef %154, i32 noundef %.sink303, i32 noundef %.0223269, i32 noundef %160) #5
  %161 = add nuw nsw i32 %.0223269, 1
  %162 = icmp eq i32 %161, %5
  br i1 %162, label %.sink.split307, label %167

.sink.split307:                                   ; preds = %157
  %163 = load i32, ptr %90, align 1, !tbaa !25
  %164 = and i32 %163, 2
  %.not233 = icmp eq i32 %164, 0
  %165 = load i32, ptr %91, align 4, !tbaa !28
  %166 = load i32, ptr %94, align 4, !tbaa !31
  %.315 = select i1 %.not233, i32 1258291207, i32 184549383
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef %.315, i32 noundef %165, i32 noundef %166, i32 noundef %165, i32 noundef 0, i32 noundef 0) #5
  br label %167

167:                                              ; preds = %.sink.split307, %.peel.next, %157
  %168 = mul nuw nsw i32 %.0223269, %20
  %169 = add i32 %110, %168
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %109, i32 noundef %.0223269, i8 noundef zeroext 0, i32 noundef %169, i32 noundef %150) #5
  %170 = add nuw i32 %.0223269, 1
  %exitcond290.not = icmp eq i32 %170, %5
  br i1 %exitcond290.not, label %.loopexit292, label %.peel.next, !llvm.loop !34

.loopexit292:                                     ; preds = %167, %149
  %indvars.iv.next294 = add nuw nsw i64 %indvars.iv293, 1
  %171 = icmp ult i64 %indvars.iv.next294, %103
  br i1 %171, label %.preheader, label %.loopexit, !llvm.loop !36

.preheader240:                                    ; preds = %173, %.preheader241
  br i1 %.not274, label %.preheader239, label %.lr.ph256

.lr.ph256:                                        ; preds = %.preheader240
  %172 = getelementptr inbounds i8, ptr %1, i64 4
  br label %178

173:                                              ; preds = %.lr.ph254, %173
  %.4220253 = phi i32 [ 0, %.lr.ph254 ], [ %175, %173 ]
  %174 = load i32, ptr %89, align 4, !tbaa !32
  %175 = add nuw i32 %.4220253, 1
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %174, i32 noundef 127, i32 noundef 16, i32 noundef %175, i32 noundef 1) #5
  %176 = icmp ult i32 %175, %13
  br i1 %176, label %173, label %.preheader240, !llvm.loop !37

.preheader239:                                    ; preds = %178, %.preheader240
  br i1 %.not275, label %.preheader237, label %.lr.ph258

.lr.ph258:                                        ; preds = %.preheader239
  %177 = getelementptr inbounds i8, ptr %1, i64 4
  br label %194

178:                                              ; preds = %.lr.ph256, %178
  %.5221255 = phi i32 [ 0, %.lr.ph256 ], [ %180, %178 ]
  %179 = load i32, ptr %172, align 4, !tbaa !32
  %180 = add nuw i32 %.5221255, 1
  %181 = add i32 %180, %13
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %179, i32 noundef 127, i32 noundef 8, i32 noundef %181, i32 noundef 6) #5
  %182 = icmp ult i32 %180, %17
  br i1 %182, label %178, label %.preheader239, !llvm.loop !38

.preheader237:                                    ; preds = %194, %.preheader239
  %.not279 = icmp eq i32 %5, 0
  br i1 %.not279, label %.loopexit, label %.lr.ph268

.lr.ph268:                                        ; preds = %.preheader237
  %183 = getelementptr inbounds i8, ptr %3, i64 24
  %184 = getelementptr inbounds i8, ptr %1, i64 12
  %185 = getelementptr inbounds i8, ptr %2, i64 12
  %186 = getelementptr inbounds i8, ptr %1, i64 96
  %187 = add i32 %5, -1
  %188 = getelementptr inbounds i8, ptr %1, i64 92
  %189 = getelementptr inbounds i8, ptr %1, i64 4
  %190 = getelementptr inbounds i8, ptr %1, i64 88
  %191 = add i32 %13, 1
  %192 = add i32 %85, %13
  %193 = add i32 %19, %85
  br label %199

194:                                              ; preds = %.lr.ph258, %194
  %.6222257 = phi i32 [ 0, %.lr.ph258 ], [ %196, %194 ]
  %195 = load i32, ptr %177, align 4, !tbaa !32
  %196 = add nuw nsw i32 %.6222257, 1
  %197 = add i32 %19, %196
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %195, i32 noundef 127, i32 noundef 4, i32 noundef %197, i32 noundef 4) #5
  %198 = icmp ult i32 %196, %18
  br i1 %198, label %194, label %.preheader237, !llvm.loop !39

199:                                              ; preds = %.lr.ph268, %._crit_edge266
  %.1224267 = phi i32 [ 0, %.lr.ph268 ], [ %243, %._crit_edge266 ]
  %200 = load i32, ptr %183, align 1, !tbaa !25
  %201 = and i32 %200, 2
  %.not = icmp eq i32 %201, 0
  %202 = load i32, ptr %184, align 4, !tbaa !28
  br i1 %.not, label %203, label %205

203:                                              ; preds = %199
  %204 = load i32, ptr %186, align 4, !tbaa !30
  br label %205

205:                                              ; preds = %199, %203
  %.sink309 = phi i32 [ %204, %203 ], [ 63, %199 ]
  %206 = load i32, ptr %185, align 4, !tbaa !13
  %207 = icmp eq i32 %206, 4
  %208 = select i1 %207, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %0, i32 noundef 230735875, i32 noundef %202, i32 noundef %.sink309, i32 noundef 0, i32 noundef %208) #5
  %209 = icmp eq i32 %.1224267, %187
  br i1 %209, label %210, label %217

210:                                              ; preds = %205
  %211 = load i32, ptr %183, align 1, !tbaa !25
  %212 = and i32 %211, 2
  %.not231 = icmp eq i32 %212, 0
  %213 = load i32, ptr %184, align 4, !tbaa !28
  %214 = load i32, ptr %188, align 4, !tbaa !31
  %.316 = select i1 %.not231, i32 1258291207, i32 184549383
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef %.316, i32 noundef %213, i32 noundef %214, i32 noundef %213, i32 noundef 0, i32 noundef 0) #5
  %215 = load i32, ptr %189, align 4, !tbaa !32
  %216 = load i32, ptr %190, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %215, i32 noundef %216, i32 noundef %215, i32 noundef 0, i32 noundef 0) #5
  br label %217

217:                                              ; preds = %210, %205
  br i1 %.not273, label %.preheader236, label %.lr.ph261

.lr.ph261:                                        ; preds = %217
  %218 = mul i32 %.1224267, %20
  %219 = add i32 %218, %85
  br label %222

.preheader236:                                    ; preds = %222, %217
  br i1 %.not274, label %.preheader235, label %.lr.ph263

.lr.ph263:                                        ; preds = %.preheader236
  %220 = mul i32 %.1224267, %20
  %221 = add i32 %192, %220
  br label %231

222:                                              ; preds = %.lr.ph261, %222
  %.7259 = phi i32 [ 0, %.lr.ph261 ], [ %223, %222 ]
  %223 = add nuw i32 %.7259, 1
  %224 = add i32 %219, %.7259
  %225 = load i32, ptr %185, align 4, !tbaa !13
  %226 = icmp eq i32 %225, 4
  %227 = select i1 %226, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %223, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %224, i32 noundef %227) #5
  %228 = icmp ult i32 %223, %13
  br i1 %228, label %222, label %.preheader236, !llvm.loop !40

.preheader235:                                    ; preds = %231, %.preheader236
  br i1 %.not275, label %._crit_edge266, label %.lr.ph265

.lr.ph265:                                        ; preds = %.preheader235
  %229 = mul i32 %.1224267, %20
  %230 = add i32 %193, %229
  br label %238

231:                                              ; preds = %.lr.ph263, %231
  %.8262 = phi i32 [ 0, %.lr.ph263 ], [ %236, %231 ]
  %232 = load i32, ptr %185, align 4, !tbaa !13
  %233 = icmp eq i32 %232, 4
  %234 = add i32 %191, %.8262
  %235 = add i32 %221, %.8262
  %.317 = select i1 %233, i32 4, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %234, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %235, i32 noundef %.317) #5
  %236 = add nuw i32 %.8262, 1
  %237 = icmp ult i32 %236, %17
  br i1 %237, label %231, label %.preheader235, !llvm.loop !41

238:                                              ; preds = %.lr.ph265, %238
  %.9264 = phi i32 [ 0, %.lr.ph265 ], [ %239, %238 ]
  %239 = add nuw nsw i32 %.9264, 1
  %240 = add i32 %19, %239
  %241 = add i32 %230, %.9264
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %240, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %241, i32 noundef 5) #5
  %242 = icmp ult i32 %239, %18
  br i1 %242, label %238, label %._crit_edge266, !llvm.loop !42

._crit_edge266:                                   ; preds = %238, %.preheader235
  %243 = add nuw i32 %.1224267, 1
  %exitcond.not = icmp eq i32 %243, %5
  br i1 %exitcond.not, label %.loopexit, label %199, !llvm.loop !43

.loopexit:                                        ; preds = %._crit_edge266, %.loopexit292, %.preheader237, %.preheader234
  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %10) #5
  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %9) #5
  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %8) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !10, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !12, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !12, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"libxsmm_tile_config", !8, i64 0, !11, i64 2, !8, i64 4, !11, i64 6, !8, i64 8, !11, i64 10, !8, i64 12, !11, i64 14, !8, i64 16, !11, i64 18, !8, i64 20, !11, i64 22, !8, i64 24, !11, i64 26, !8, i64 28, !11, i64 30, !8, i64 32}
!11 = !{!"short", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 12}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16, !17, !18}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!"llvm.loop.isvectorized", i32 1}
!18 = !{!"llvm.loop.unroll.runtime.disable"}
!19 = distinct !{!19, !16, !17, !18}
!20 = distinct !{!20, !16, !18, !17}
!21 = distinct !{!21, !16, !17, !18}
!22 = distinct !{!22, !16, !17}
!23 = distinct !{!23, !16, !17}
!24 = !{!6, !7, i64 4}
!25 = !{!26, !7, i64 24}
!26 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !27, i64 33, !27, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!27 = !{!"long long", !8, i64 0}
!28 = !{!29, !7, i64 12}
!29 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!30 = !{!29, !7, i64 96}
!31 = !{!29, !7, i64 92}
!32 = !{!29, !7, i64 4}
!33 = !{!29, !7, i64 88}
!34 = distinct !{!34, !16, !35}
!35 = !{!"llvm.loop.peeled.count", i32 1}
!36 = distinct !{!36, !16}
!37 = distinct !{!37, !16}
!38 = distinct !{!38, !16}
!39 = distinct !{!39, !16}
!40 = distinct !{!40, !16}
!41 = distinct !{!41, !16}
!42 = distinct !{!42, !16}
!43 = distinct !{!43, !16}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass