; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_misc_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_mn_code_block_replicate_col_var_aarch64(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10) #0 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i8, align 1
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i8, align 1
  %30 = alloca i8, align 1
  %31 = alloca i8, align 1
  %32 = alloca i8, align 1
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i8, align 1
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store ptr %3, ptr %15, align 8, !tbaa !5
  store ptr %4, ptr %16, align 8, !tbaa !5
  store i32 %5, ptr %17, align 4, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !9
  store i32 %7, ptr %19, align 4, !tbaa !9
  store i32 %8, ptr %20, align 4, !tbaa !9
  store i32 %9, ptr %21, align 4, !tbaa !9
  store i32 %10, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  store i32 0, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %25) #3
  store i8 0, ptr %25, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  store i32 0, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  %39 = load ptr, ptr %16, align 8, !tbaa !5
  %40 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %39, i32 noundef 0)
  %41 = icmp eq i32 2, %40
  %42 = zext i1 %41 to i64
  %43 = select i1 %41, i32 1, i32 0
  store i32 %43, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  %44 = load ptr, ptr %16, align 8, !tbaa !5
  %45 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %44, i32 noundef 3)
  %46 = icmp eq i32 2, %45
  %47 = zext i1 %46 to i64
  %48 = select i1 %46, i32 1, i32 0
  store i32 %48, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %29) #3
  store i8 0, ptr %29, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %30) #3
  store i8 1, ptr %30, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %31) #3
  store i8 2, ptr %31, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %32) #3
  store i8 3, ptr %32, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #3
  store i32 0, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #3
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #3
  store i32 0, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %36) #3
  %49 = load ptr, ptr %12, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %49, i32 0, i32 6
  %51 = load i32, ptr %50, align 4, !tbaa !12
  %52 = icmp uge i32 %51, 2201
  br i1 %52, label %53, label %58

53:                                               ; preds = %11
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %54, i32 0, i32 6
  %56 = load i32, ptr %55, align 4, !tbaa !12
  %57 = icmp ule i32 %56, 2999
  br label %58

58:                                               ; preds = %53, %11
  %59 = phi i1 [ false, %11 ], [ %57, %53 ]
  %60 = zext i1 %59 to i32
  %61 = trunc i32 %60 to i8
  store i8 %61, ptr %36, align 1, !tbaa !11
  %62 = load ptr, ptr %16, align 8, !tbaa !5
  %63 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %62, i32 noundef 0)
  %64 = icmp eq i32 2, %63
  br i1 %64, label %65, label %70

65:                                               ; preds = %58
  %66 = load ptr, ptr %16, align 8, !tbaa !5
  %67 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %66, i32 noundef 3)
  %68 = icmp eq i32 1, %67
  br i1 %68, label %69, label %70

69:                                               ; preds = %65
  store i32 1, ptr %33, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %69, %65, %58
  %71 = load ptr, ptr %16, align 8, !tbaa !5
  %72 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %71, i32 noundef 3)
  %73 = icmp eq i32 2, %72
  br i1 %73, label %74, label %79

74:                                               ; preds = %70
  %75 = load ptr, ptr %16, align 8, !tbaa !5
  %76 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %75, i32 noundef 0)
  %77 = icmp eq i32 1, %76
  br i1 %77, label %78, label %79

78:                                               ; preds = %74
  store i32 1, ptr %34, align 4, !tbaa !9
  br label %79

79:                                               ; preds = %78, %74, %70
  %80 = load i32, ptr %18, align 4, !tbaa !9
  %81 = icmp ugt i32 %80, 1
  br i1 %81, label %82, label %89

82:                                               ; preds = %79
  %83 = load ptr, ptr %12, align 8, !tbaa !5
  %84 = load ptr, ptr %13, align 8, !tbaa !5
  %85 = load ptr, ptr %14, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %85, i32 0, i32 24
  %87 = load i32, ptr %86, align 4, !tbaa !14
  %88 = load i32, ptr %18, align 4, !tbaa !9
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %83, ptr noundef %84, i32 noundef %87, i32 noundef %88)
  br label %89

89:                                               ; preds = %82, %79
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %90

90:                                               ; preds = %181, %89
  %91 = load i32, ptr %23, align 4, !tbaa !9
  %92 = load i32, ptr %19, align 4, !tbaa !9
  %93 = icmp ult i32 %91, %92
  br i1 %93, label %94, label %184

94:                                               ; preds = %90
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #3
  %95 = load i32, ptr %23, align 4, !tbaa !9
  %96 = load i32, ptr %19, align 4, !tbaa !9
  %97 = sub i32 %96, 1
  %98 = icmp eq i32 %95, %97
  br i1 %98, label %99, label %102

99:                                               ; preds = %94
  %100 = load i32, ptr %21, align 4, !tbaa !9
  %101 = icmp eq i32 %100, 1
  br label %102

102:                                              ; preds = %99, %94
  %103 = phi i1 [ false, %94 ], [ %101, %99 ]
  %104 = zext i1 %103 to i64
  %105 = select i1 %103, i32 1, i32 0
  store i32 %105, ptr %37, align 4, !tbaa !9
  %106 = load i32, ptr %37, align 4, !tbaa !9
  %107 = icmp ugt i32 %106, 0
  br i1 %107, label %108, label %110

108:                                              ; preds = %102
  %109 = load i32, ptr %22, align 4, !tbaa !9
  br label %111

110:                                              ; preds = %102
  br label %111

111:                                              ; preds = %110, %108
  %112 = phi i32 [ %109, %108 ], [ 0, %110 ]
  store i32 %112, ptr %35, align 4, !tbaa !9
  %113 = load i32, ptr %27, align 4, !tbaa !9
  %114 = icmp eq i32 %113, 0
  br i1 %114, label %115, label %117

115:                                              ; preds = %111
  %116 = load i32, ptr %35, align 4, !tbaa !9
  br label %126

117:                                              ; preds = %111
  %118 = load i32, ptr %35, align 4, !tbaa !9
  %119 = icmp ugt i32 %118, 0
  br i1 %119, label %120, label %122

120:                                              ; preds = %117
  %121 = load i32, ptr %35, align 4, !tbaa !9
  br label %124

122:                                              ; preds = %117
  %123 = load i32, ptr %17, align 4, !tbaa !9
  br label %124

124:                                              ; preds = %122, %120
  %125 = phi i32 [ %121, %120 ], [ %123, %122 ]
  br label %126

126:                                              ; preds = %124, %115
  %127 = phi i32 [ %116, %115 ], [ %125, %124 ]
  store i32 %127, ptr %26, align 4, !tbaa !9
  %128 = load i32, ptr %27, align 4, !tbaa !9
  %129 = icmp eq i32 %128, 0
  br i1 %129, label %130, label %141

130:                                              ; preds = %126
  %131 = load i32, ptr %35, align 4, !tbaa !9
  %132 = icmp ugt i32 %131, 0
  br i1 %132, label %133, label %136

133:                                              ; preds = %130
  %134 = load i8, ptr %30, align 1, !tbaa !11
  %135 = zext i8 %134 to i32
  br label %139

136:                                              ; preds = %130
  %137 = load i8, ptr %29, align 1, !tbaa !11
  %138 = zext i8 %137 to i32
  br label %139

139:                                              ; preds = %136, %133
  %140 = phi i32 [ %135, %133 ], [ %138, %136 ]
  br label %152

141:                                              ; preds = %126
  %142 = load i32, ptr %35, align 4, !tbaa !9
  %143 = icmp ugt i32 %142, 0
  br i1 %143, label %144, label %147

144:                                              ; preds = %141
  %145 = load i8, ptr %32, align 1, !tbaa !11
  %146 = zext i8 %145 to i32
  br label %150

147:                                              ; preds = %141
  %148 = load i8, ptr %31, align 1, !tbaa !11
  %149 = zext i8 %148 to i32
  br label %150

150:                                              ; preds = %147, %144
  %151 = phi i32 [ %146, %144 ], [ %149, %147 ]
  br label %152

152:                                              ; preds = %150, %139
  %153 = phi i32 [ %140, %139 ], [ %151, %150 ]
  %154 = trunc i32 %153 to i8
  store i8 %154, ptr %25, align 1, !tbaa !11
  %155 = load ptr, ptr %12, align 8, !tbaa !5
  %156 = load ptr, ptr %14, align 8, !tbaa !5
  %157 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %156, i32 0, i32 1
  %158 = load i32, ptr %157, align 4, !tbaa !16
  %159 = load ptr, ptr %14, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %159, i32 0, i32 35
  %161 = load i32, ptr %160, align 4, !tbaa !17
  %162 = load i32, ptr %23, align 4, !tbaa !9
  %163 = load ptr, ptr %15, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %163, i32 0, i32 2
  %165 = load i32, ptr %164, align 4, !tbaa !18
  %166 = load i32, ptr %26, align 4, !tbaa !9
  %167 = load i8, ptr %25, align 1, !tbaa !11
  %168 = load i8, ptr %36, align 1, !tbaa !11
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %155, i32 noundef %158, i32 noundef %161, i32 noundef %162, i32 noundef %165, i32 noundef %166, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %167, i8 noundef zeroext %168)
  %169 = load i32, ptr %33, align 4, !tbaa !9
  %170 = icmp ugt i32 %169, 0
  br i1 %170, label %171, label %174

171:                                              ; preds = %152
  %172 = load ptr, ptr %12, align 8, !tbaa !5
  %173 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_generator_vcvt_bf16f32_aarch64(ptr noundef %172, i32 noundef %173, i32 noundef 0)
  br label %174

174:                                              ; preds = %171, %152
  %175 = load i32, ptr %34, align 4, !tbaa !9
  %176 = icmp ugt i32 %175, 0
  br i1 %176, label %177, label %180

177:                                              ; preds = %174
  %178 = load ptr, ptr %12, align 8, !tbaa !5
  %179 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_generator_vcvt_f32bf16_aarch64(ptr noundef %178, i32 noundef %179, i32 noundef 0)
  br label %180

180:                                              ; preds = %177, %174
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #3
  br label %181

181:                                              ; preds = %180
  %182 = load i32, ptr %23, align 4, !tbaa !9
  %183 = add i32 %182, 1
  store i32 %183, ptr %23, align 4, !tbaa !9
  br label %90, !llvm.loop !20

184:                                              ; preds = %90
  %185 = load ptr, ptr %12, align 8, !tbaa !5
  %186 = load ptr, ptr %13, align 8, !tbaa !5
  %187 = load ptr, ptr %14, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %187, i32 0, i32 25
  %189 = load i32, ptr %188, align 4, !tbaa !22
  %190 = load ptr, ptr %14, align 8, !tbaa !5
  %191 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %190, i32 0, i32 26
  %192 = load i32, ptr %191, align 4, !tbaa !23
  call void @libxsmm_generator_loop_header_gp_reg_bound_aarch64(ptr noundef %185, ptr noundef %186, i32 noundef %189, i32 noundef %192)
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %193

193:                                              ; preds = %272, %184
  %194 = load i32, ptr %23, align 4, !tbaa !9
  %195 = load i32, ptr %19, align 4, !tbaa !9
  %196 = icmp ult i32 %194, %195
  br i1 %196, label %197, label %275

197:                                              ; preds = %193
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #3
  %198 = load i32, ptr %23, align 4, !tbaa !9
  %199 = load i32, ptr %19, align 4, !tbaa !9
  %200 = sub i32 %199, 1
  %201 = icmp eq i32 %198, %200
  br i1 %201, label %202, label %205

202:                                              ; preds = %197
  %203 = load i32, ptr %21, align 4, !tbaa !9
  %204 = icmp eq i32 %203, 1
  br label %205

205:                                              ; preds = %202, %197
  %206 = phi i1 [ false, %197 ], [ %204, %202 ]
  %207 = zext i1 %206 to i64
  %208 = select i1 %206, i32 1, i32 0
  store i32 %208, ptr %38, align 4, !tbaa !9
  %209 = load i32, ptr %38, align 4, !tbaa !9
  %210 = icmp ugt i32 %209, 0
  br i1 %210, label %211, label %213

211:                                              ; preds = %205
  %212 = load i32, ptr %22, align 4, !tbaa !9
  br label %214

213:                                              ; preds = %205
  br label %214

214:                                              ; preds = %213, %211
  %215 = phi i32 [ %212, %211 ], [ 0, %213 ]
  store i32 %215, ptr %35, align 4, !tbaa !9
  %216 = load i32, ptr %28, align 4, !tbaa !9
  %217 = icmp eq i32 %216, 0
  br i1 %217, label %218, label %220

218:                                              ; preds = %214
  %219 = load i32, ptr %35, align 4, !tbaa !9
  br label %229

220:                                              ; preds = %214
  %221 = load i32, ptr %35, align 4, !tbaa !9
  %222 = icmp ugt i32 %221, 0
  br i1 %222, label %223, label %225

223:                                              ; preds = %220
  %224 = load i32, ptr %35, align 4, !tbaa !9
  br label %227

225:                                              ; preds = %220
  %226 = load i32, ptr %17, align 4, !tbaa !9
  br label %227

227:                                              ; preds = %225, %223
  %228 = phi i32 [ %224, %223 ], [ %226, %225 ]
  br label %229

229:                                              ; preds = %227, %218
  %230 = phi i32 [ %219, %218 ], [ %228, %227 ]
  store i32 %230, ptr %26, align 4, !tbaa !9
  %231 = load i32, ptr %28, align 4, !tbaa !9
  %232 = icmp eq i32 %231, 0
  br i1 %232, label %233, label %244

233:                                              ; preds = %229
  %234 = load i32, ptr %35, align 4, !tbaa !9
  %235 = icmp ugt i32 %234, 0
  br i1 %235, label %236, label %239

236:                                              ; preds = %233
  %237 = load i8, ptr %30, align 1, !tbaa !11
  %238 = zext i8 %237 to i32
  br label %242

239:                                              ; preds = %233
  %240 = load i8, ptr %29, align 1, !tbaa !11
  %241 = zext i8 %240 to i32
  br label %242

242:                                              ; preds = %239, %236
  %243 = phi i32 [ %238, %236 ], [ %241, %239 ]
  br label %255

244:                                              ; preds = %229
  %245 = load i32, ptr %35, align 4, !tbaa !9
  %246 = icmp ugt i32 %245, 0
  br i1 %246, label %247, label %250

247:                                              ; preds = %244
  %248 = load i8, ptr %32, align 1, !tbaa !11
  %249 = zext i8 %248 to i32
  br label %253

250:                                              ; preds = %244
  %251 = load i8, ptr %31, align 1, !tbaa !11
  %252 = zext i8 %251 to i32
  br label %253

253:                                              ; preds = %250, %247
  %254 = phi i32 [ %249, %247 ], [ %252, %250 ]
  br label %255

255:                                              ; preds = %253, %242
  %256 = phi i32 [ %243, %242 ], [ %254, %253 ]
  %257 = trunc i32 %256 to i8
  store i8 %257, ptr %25, align 1, !tbaa !11
  %258 = load ptr, ptr %12, align 8, !tbaa !5
  %259 = load ptr, ptr %14, align 8, !tbaa !5
  %260 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %259, i32 0, i32 6
  %261 = load i32, ptr %260, align 4, !tbaa !24
  %262 = load ptr, ptr %14, align 8, !tbaa !5
  %263 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %262, i32 0, i32 35
  %264 = load i32, ptr %263, align 4, !tbaa !17
  %265 = load i32, ptr %23, align 4, !tbaa !9
  %266 = load ptr, ptr %15, align 8, !tbaa !5
  %267 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %266, i32 0, i32 5
  %268 = load i32, ptr %267, align 4, !tbaa !25
  %269 = load i32, ptr %26, align 4, !tbaa !9
  %270 = load i8, ptr %25, align 1, !tbaa !11
  %271 = load i8, ptr %36, align 1, !tbaa !11
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %258, i32 noundef %261, i32 noundef %264, i32 noundef %265, i32 noundef %268, i32 noundef %269, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %270, i8 noundef zeroext %271)
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #3
  br label %272

272:                                              ; preds = %255
  %273 = load i32, ptr %23, align 4, !tbaa !9
  %274 = add i32 %273, 1
  store i32 %274, ptr %23, align 4, !tbaa !9
  br label %193, !llvm.loop !26

275:                                              ; preds = %193
  %276 = load ptr, ptr %16, align 8, !tbaa !5
  %277 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %276, i32 0, i32 3
  %278 = load i32, ptr %277, align 1, !tbaa !27
  %279 = load ptr, ptr %15, align 8, !tbaa !5
  %280 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %279, i32 0, i32 5
  %281 = load i32, ptr %280, align 4, !tbaa !25
  %282 = mul i32 %278, %281
  %283 = load i32, ptr %17, align 4, !tbaa !9
  %284 = load ptr, ptr %15, align 8, !tbaa !5
  %285 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %284, i32 0, i32 5
  %286 = load i32, ptr %285, align 4, !tbaa !25
  %287 = mul i32 %283, %286
  %288 = load i32, ptr %19, align 4, !tbaa !9
  %289 = mul i32 %287, %288
  %290 = load i32, ptr %21, align 4, !tbaa !9
  %291 = load i32, ptr %17, align 4, !tbaa !9
  %292 = load i32, ptr %22, align 4, !tbaa !9
  %293 = sub i32 %291, %292
  %294 = mul i32 %290, %293
  %295 = load ptr, ptr %15, align 8, !tbaa !5
  %296 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %295, i32 0, i32 5
  %297 = load i32, ptr %296, align 4, !tbaa !25
  %298 = mul i32 %294, %297
  %299 = sub i32 %289, %298
  %300 = sub i32 %282, %299
  store i32 %300, ptr %24, align 4, !tbaa !9
  %301 = load i32, ptr %24, align 4, !tbaa !9
  %302 = icmp sgt i32 %301, 0
  br i1 %302, label %303, label %316

303:                                              ; preds = %275
  %304 = load ptr, ptr %12, align 8, !tbaa !5
  %305 = load ptr, ptr %14, align 8, !tbaa !5
  %306 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %305, i32 0, i32 6
  %307 = load i32, ptr %306, align 4, !tbaa !24
  %308 = load ptr, ptr %14, align 8, !tbaa !5
  %309 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %308, i32 0, i32 35
  %310 = load i32, ptr %309, align 4, !tbaa !17
  %311 = load ptr, ptr %14, align 8, !tbaa !5
  %312 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %311, i32 0, i32 6
  %313 = load i32, ptr %312, align 4, !tbaa !24
  %314 = load i32, ptr %24, align 4, !tbaa !9
  %315 = sext i32 %314 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %304, i32 noundef 4096, i32 noundef %307, i32 noundef %310, i32 noundef %313, i64 noundef %315)
  br label %316

316:                                              ; preds = %303, %275
  %317 = load ptr, ptr %12, align 8, !tbaa !5
  %318 = load ptr, ptr %13, align 8, !tbaa !5
  %319 = load ptr, ptr %14, align 8, !tbaa !5
  %320 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %319, i32 0, i32 25
  %321 = load i32, ptr %320, align 4, !tbaa !22
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %317, ptr noundef %318, i32 noundef %321, i32 noundef 1)
  %322 = load ptr, ptr %12, align 8, !tbaa !5
  %323 = load ptr, ptr %14, align 8, !tbaa !5
  %324 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %323, i32 0, i32 35
  %325 = load i32, ptr %324, align 4, !tbaa !17
  %326 = load ptr, ptr %16, align 8, !tbaa !5
  %327 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %326, i32 0, i32 3
  %328 = load i32, ptr %327, align 1, !tbaa !27
  %329 = zext i32 %328 to i64
  %330 = load ptr, ptr %15, align 8, !tbaa !5
  %331 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %330, i32 0, i32 5
  %332 = load i32, ptr %331, align 4, !tbaa !25
  %333 = zext i32 %332 to i64
  %334 = mul nsw i64 %329, %333
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %322, i32 noundef %325, i64 noundef %334)
  %335 = load ptr, ptr %12, align 8, !tbaa !5
  %336 = load ptr, ptr %14, align 8, !tbaa !5
  %337 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %336, i32 0, i32 26
  %338 = load i32, ptr %337, align 4, !tbaa !23
  %339 = load ptr, ptr %14, align 8, !tbaa !5
  %340 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %339, i32 0, i32 35
  %341 = load i32, ptr %340, align 4, !tbaa !17
  %342 = load ptr, ptr %14, align 8, !tbaa !5
  %343 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %342, i32 0, i32 35
  %344 = load i32, ptr %343, align 4, !tbaa !17
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %335, i32 noundef 453016595, i32 noundef %338, i32 noundef %341, i32 noundef %344, i32 noundef 0, i32 noundef 0)
  %345 = load ptr, ptr %12, align 8, !tbaa !5
  %346 = load ptr, ptr %14, align 8, !tbaa !5
  %347 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %346, i32 0, i32 6
  %348 = load i32, ptr %347, align 4, !tbaa !24
  %349 = load ptr, ptr %14, align 8, !tbaa !5
  %350 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %349, i32 0, i32 35
  %351 = load i32, ptr %350, align 4, !tbaa !17
  %352 = load ptr, ptr %14, align 8, !tbaa !5
  %353 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %352, i32 0, i32 6
  %354 = load i32, ptr %353, align 4, !tbaa !24
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %345, i32 noundef 1258291207, i32 noundef %348, i32 noundef %351, i32 noundef %354, i32 noundef 0, i32 noundef 0)
  %355 = load i32, ptr %18, align 4, !tbaa !9
  %356 = icmp ugt i32 %355, 1
  br i1 %356, label %363, label %357

357:                                              ; preds = %316
  %358 = load i32, ptr %18, align 4, !tbaa !9
  %359 = icmp eq i32 %358, 1
  br i1 %359, label %360, label %393

360:                                              ; preds = %357
  %361 = load i32, ptr %20, align 4, !tbaa !9
  %362 = icmp ugt i32 %361, 0
  br i1 %362, label %363, label %393

363:                                              ; preds = %360, %316
  %364 = load ptr, ptr %12, align 8, !tbaa !5
  %365 = load ptr, ptr %14, align 8, !tbaa !5
  %366 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %365, i32 0, i32 6
  %367 = load i32, ptr %366, align 4, !tbaa !24
  %368 = load ptr, ptr %14, align 8, !tbaa !5
  %369 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %368, i32 0, i32 35
  %370 = load i32, ptr %369, align 4, !tbaa !17
  %371 = load ptr, ptr %14, align 8, !tbaa !5
  %372 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %371, i32 0, i32 6
  %373 = load i32, ptr %372, align 4, !tbaa !24
  %374 = load i32, ptr %19, align 4, !tbaa !9
  %375 = zext i32 %374 to i64
  %376 = load ptr, ptr %15, align 8, !tbaa !5
  %377 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %376, i32 0, i32 5
  %378 = load i32, ptr %377, align 4, !tbaa !25
  %379 = zext i32 %378 to i64
  %380 = mul nsw i64 %375, %379
  %381 = load i32, ptr %17, align 4, !tbaa !9
  %382 = zext i32 %381 to i64
  %383 = mul nsw i64 %380, %382
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %364, i32 noundef 4096, i32 noundef %367, i32 noundef %370, i32 noundef %373, i64 noundef %383)
  %384 = load i32, ptr %18, align 4, !tbaa !9
  %385 = icmp ugt i32 %384, 1
  br i1 %385, label %386, label %392

386:                                              ; preds = %363
  %387 = load ptr, ptr %12, align 8, !tbaa !5
  %388 = load ptr, ptr %13, align 8, !tbaa !5
  %389 = load ptr, ptr %14, align 8, !tbaa !5
  %390 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %389, i32 0, i32 24
  %391 = load i32, ptr %390, align 4, !tbaa !14
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %387, ptr noundef %388, i32 noundef %391, i32 noundef 1)
  br label %392

392:                                              ; preds = %386, %363
  br label %393

393:                                              ; preds = %392, %360, %357
  call void @llvm.lifetime.end.p0(i64 1, ptr %36) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @libxsmm_meltw_getenum_precision(ptr noundef, i32 noundef) #2

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2

declare void @libxsmm_generator_vcvt_bf16f32_aarch64(ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_vcvt_f32bf16_aarch64(ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_generator_loop_header_gp_reg_bound_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = !{!15, !10, i64 96}
!15 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}
!16 = !{!15, !10, i64 4}
!17 = !{!15, !10, i64 140}
!18 = !{!19, !10, i64 8}
!19 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!15, !10, i64 100}
!23 = !{!15, !10, i64 104}
!24 = !{!15, !10, i64 24}
!25 = !{!19, !10, i64 20}
!26 = distinct !{!26, !21}
!27 = !{!28, !10, i64 12}
!28 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !29, i64 27, !29, i64 29, !7, i64 31}
!29 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_mn_code_block_replicate_col_var_aarch64(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #0 {
  %12 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 0) #2
  %.not136 = icmp eq i32 %12, 2
  %13 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 3) #2
  %.not = icmp eq i32 %13, 2
  %14 = getelementptr inbounds i8, ptr %0, i64 28
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add i32 %15, -2201
  %spec.select = icmp ult i32 %16, 799
  %17 = zext i1 %spec.select to i8
  %18 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 0) #2
  %19 = icmp eq i32 %18, 2
  br i1 %19, label %20, label %23

20:                                               ; preds = %11
  %21 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 3) #2
  %.fr155 = freeze i32 %21
  %22 = icmp eq i32 %.fr155, 1
  br label %23

23:                                               ; preds = %20, %11
  %.fr = phi i1 [ false, %11 ], [ %22, %20 ]
  %24 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 3) #2
  %25 = icmp eq i32 %24, 2
  br i1 %25, label %26, label %29

26:                                               ; preds = %23
  %27 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %4, i32 noundef 0) #2
  %.fr156 = freeze i32 %27
  %28 = icmp eq i32 %.fr156, 1
  br label %29

29:                                               ; preds = %26, %23
  %.fr149 = phi i1 [ false, %23 ], [ %28, %26 ]
  %30 = icmp ugt i32 %6, 1
  br i1 %30, label %31, label %34

31:                                               ; preds = %29
  %32 = getelementptr inbounds i8, ptr %2, i64 96
  %33 = load i32, ptr %32, align 4, !tbaa !11
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %33, i32 noundef %6) #2
  br label %34

34:                                               ; preds = %31, %29
  %.not154 = icmp eq i32 %7, 0
  br i1 %.not154, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %34
  %35 = add i32 %7, -1
  %36 = icmp eq i32 %9, 1
  %37 = getelementptr inbounds i8, ptr %2, i64 4
  %38 = getelementptr inbounds i8, ptr %2, i64 140
  %39 = getelementptr inbounds i8, ptr %3, i64 8
  br i1 %.fr, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %52
  %.0145.us = phi i32 [ %53, %52 ], [ 0, %.lr.ph ]
  %40 = icmp eq i32 %.0145.us, %35
  %41 = and i1 %36, %40
  %42 = select i1 %41, i32 %10, i32 0
  %.not137.us = icmp eq i32 %42, 0
  %43 = and i1 %.not136, %.not137.us
  %44 = select i1 %43, i32 %5, i32 %42
  %.not139.us = icmp ne i32 %42, 0
  %45 = zext i1 %.not139.us to i8
  %46 = select i1 %.not137.us, i8 2, i8 3
  %47 = select i1 %.not136, i8 %46, i8 %45
  %48 = load i32, ptr %37, align 4, !tbaa !13
  %49 = load i32, ptr %38, align 4, !tbaa !14
  %50 = load i32, ptr %39, align 4, !tbaa !15
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %48, i32 noundef %49, i32 noundef %.0145.us, i32 noundef %50, i32 noundef %44, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %47, i8 noundef zeroext %17) #2
  tail call void @libxsmm_generator_vcvt_bf16f32_aarch64(ptr noundef %0, i32 noundef %.0145.us, i32 noundef 0) #2
  br i1 %.fr149, label %51, label %52

51:                                               ; preds = %.lr.ph.split.us
  tail call void @libxsmm_generator_vcvt_f32bf16_aarch64(ptr noundef %0, i32 noundef %.0145.us, i32 noundef 0) #2
  br label %52

52:                                               ; preds = %51, %.lr.ph.split.us
  %53 = add nuw i32 %.0145.us, 1
  %exitcond162.not = icmp eq i32 %53, %7
  br i1 %exitcond162.not, label %.lr.ph152, label %.lr.ph.split.us, !llvm.loop !17

.lr.ph.split:                                     ; preds = %.lr.ph
  br i1 %.fr149, label %.lr.ph.split.split.us, label %.lr.ph.split.split

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split, %.lr.ph.split.split.us
  %.0145.us146 = phi i32 [ %65, %.lr.ph.split.split.us ], [ 0, %.lr.ph.split ]
  %54 = icmp eq i32 %.0145.us146, %35
  %55 = and i1 %36, %54
  %56 = select i1 %55, i32 %10, i32 0
  %.not137.us147 = icmp eq i32 %56, 0
  %57 = and i1 %.not136, %.not137.us147
  %58 = select i1 %57, i32 %5, i32 %56
  %.not139.us148 = icmp ne i32 %56, 0
  %59 = zext i1 %.not139.us148 to i8
  %60 = select i1 %.not137.us147, i8 2, i8 3
  %61 = select i1 %.not136, i8 %60, i8 %59
  %62 = load i32, ptr %37, align 4, !tbaa !13
  %63 = load i32, ptr %38, align 4, !tbaa !14
  %64 = load i32, ptr %39, align 4, !tbaa !15
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %62, i32 noundef %63, i32 noundef %.0145.us146, i32 noundef %64, i32 noundef %58, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %61, i8 noundef zeroext %17) #2
  tail call void @libxsmm_generator_vcvt_f32bf16_aarch64(ptr noundef %0, i32 noundef %.0145.us146, i32 noundef 0) #2
  %65 = add nuw i32 %.0145.us146, 1
  %exitcond161.not = icmp eq i32 %65, %7
  br i1 %exitcond161.not, label %.lr.ph152, label %.lr.ph.split.split.us, !llvm.loop !17

.lr.ph.split.split:                               ; preds = %.lr.ph.split, %.lr.ph.split.split
  %.0145 = phi i32 [ %77, %.lr.ph.split.split ], [ 0, %.lr.ph.split ]
  %66 = icmp eq i32 %.0145, %35
  %67 = and i1 %36, %66
  %68 = select i1 %67, i32 %10, i32 0
  %.not137 = icmp eq i32 %68, 0
  %69 = and i1 %.not136, %.not137
  %70 = select i1 %69, i32 %5, i32 %68
  %.not139 = icmp ne i32 %68, 0
  %71 = zext i1 %.not139 to i8
  %72 = select i1 %.not137, i8 2, i8 3
  %73 = select i1 %.not136, i8 %72, i8 %71
  %74 = load i32, ptr %37, align 4, !tbaa !13
  %75 = load i32, ptr %38, align 4, !tbaa !14
  %76 = load i32, ptr %39, align 4, !tbaa !15
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %74, i32 noundef %75, i32 noundef %.0145, i32 noundef %76, i32 noundef %70, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %73, i8 noundef zeroext %17) #2
  %77 = add nuw i32 %.0145, 1
  %exitcond.not = icmp eq i32 %77, %7
  br i1 %exitcond.not, label %.lr.ph152, label %.lr.ph.split.split, !llvm.loop !17

._crit_edge:                                      ; preds = %34
  %78 = getelementptr inbounds i8, ptr %2, i64 100
  %79 = load i32, ptr %78, align 4, !tbaa !19
  %80 = getelementptr inbounds i8, ptr %2, i64 104
  %81 = load i32, ptr %80, align 4, !tbaa !20
  tail call void @libxsmm_generator_loop_header_gp_reg_bound_aarch64(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %79, i32 noundef %81) #2
  br label %._crit_edge153

.lr.ph152:                                        ; preds = %.lr.ph.split.split, %.lr.ph.split.split.us, %52
  %82 = getelementptr inbounds i8, ptr %2, i64 100
  %83 = load i32, ptr %82, align 4, !tbaa !19
  %84 = getelementptr inbounds i8, ptr %2, i64 104
  %85 = load i32, ptr %84, align 4, !tbaa !20
  tail call void @libxsmm_generator_loop_header_gp_reg_bound_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %83, i32 noundef %85) #2
  %86 = add i32 %7, -1
  %87 = icmp eq i32 %9, 1
  %88 = getelementptr inbounds i8, ptr %2, i64 24
  %89 = getelementptr inbounds i8, ptr %2, i64 140
  %90 = getelementptr inbounds i8, ptr %3, i64 20
  br label %91

91:                                               ; preds = %.lr.ph152, %91
  %.1150 = phi i32 [ 0, %.lr.ph152 ], [ %103, %91 ]
  %92 = icmp eq i32 %.1150, %86
  %93 = and i1 %87, %92
  %94 = select i1 %93, i32 %10, i32 0
  %.not133 = icmp eq i32 %94, 0
  %95 = and i1 %.not, %.not133
  %96 = select i1 %95, i32 %5, i32 %94
  %.not135 = icmp ne i32 %94, 0
  %97 = zext i1 %.not135 to i8
  %98 = select i1 %.not133, i8 2, i8 3
  %99 = select i1 %.not, i8 %98, i8 %97
  %100 = load i32, ptr %88, align 4, !tbaa !21
  %101 = load i32, ptr %89, align 4, !tbaa !14
  %102 = load i32, ptr %90, align 4, !tbaa !22
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %100, i32 noundef %101, i32 noundef %.1150, i32 noundef %102, i32 noundef %96, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %99, i8 noundef zeroext %17) #2
  %103 = add nuw i32 %.1150, 1
  %exitcond163.not = icmp eq i32 %103, %7
  br i1 %exitcond163.not, label %._crit_edge153, label %91, !llvm.loop !23

._crit_edge153:                                   ; preds = %91, %._crit_edge
  %104 = phi ptr [ %80, %._crit_edge ], [ %84, %91 ]
  %105 = phi ptr [ %78, %._crit_edge ], [ %82, %91 ]
  %106 = getelementptr inbounds i8, ptr %4, i64 12
  %107 = load i32, ptr %106, align 1, !tbaa !24
  %108 = getelementptr inbounds i8, ptr %3, i64 20
  %109 = load i32, ptr %108, align 4, !tbaa !22
  %.neg.neg = sub i32 %5, %10
  %.neg132.neg158 = mul i32 %.neg.neg, %9
  %110 = mul i32 %7, %5
  %reass.add = add i32 %.neg132.neg158, %107
  %reass.add144 = sub i32 %reass.add, %110
  %reass.mul = mul i32 %reass.add144, %109
  %111 = icmp sgt i32 %reass.mul, 0
  br i1 %111, label %112, label %118

112:                                              ; preds = %._crit_edge153
  %113 = getelementptr inbounds i8, ptr %2, i64 24
  %114 = load i32, ptr %113, align 4, !tbaa !21
  %115 = getelementptr inbounds i8, ptr %2, i64 140
  %116 = load i32, ptr %115, align 4, !tbaa !14
  %117 = zext nneg i32 %reass.mul to i64
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %114, i32 noundef %116, i32 noundef %114, i64 noundef %117) #2
  br label %118

118:                                              ; preds = %112, %._crit_edge153
  %119 = load i32, ptr %105, align 4, !tbaa !19
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %119, i32 noundef 1) #2
  %120 = getelementptr inbounds i8, ptr %2, i64 140
  %121 = load i32, ptr %120, align 4, !tbaa !14
  %122 = load i32, ptr %106, align 1, !tbaa !24
  %123 = zext i32 %122 to i64
  %124 = load i32, ptr %108, align 4, !tbaa !22
  %125 = zext i32 %124 to i64
  %126 = mul nuw nsw i64 %125, %123
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %121, i64 noundef %126) #2
  %127 = load i32, ptr %104, align 4, !tbaa !20
  %128 = load i32, ptr %120, align 4, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 453016595, i32 noundef %127, i32 noundef %128, i32 noundef %128, i32 noundef 0, i32 noundef 0) #2
  %129 = getelementptr inbounds i8, ptr %2, i64 24
  %130 = load i32, ptr %129, align 4, !tbaa !21
  %131 = load i32, ptr %120, align 4, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 1258291207, i32 noundef %130, i32 noundef %131, i32 noundef %130, i32 noundef 0, i32 noundef 0) #2
  br i1 %30, label %.critedge, label %132

132:                                              ; preds = %118
  %133 = icmp eq i32 %6, 1
  %134 = icmp ne i32 %8, 0
  %or.cond = and i1 %133, %134
  br i1 %or.cond, label %135, label %154

135:                                              ; preds = %132
  %136 = load i32, ptr %129, align 4, !tbaa !21
  %137 = load i32, ptr %120, align 4, !tbaa !14
  %138 = zext i32 %7 to i64
  %139 = load i32, ptr %108, align 4, !tbaa !22
  %140 = zext i32 %139 to i64
  %141 = zext i32 %5 to i64
  %142 = mul nuw i64 %138, %141
  %143 = mul i64 %142, %140
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %136, i32 noundef %137, i32 noundef %136, i64 noundef %143) #2
  br label %154

.critedge:                                        ; preds = %118
  %144 = load i32, ptr %129, align 4, !tbaa !21
  %145 = load i32, ptr %120, align 4, !tbaa !14
  %146 = zext i32 %7 to i64
  %147 = load i32, ptr %108, align 4, !tbaa !22
  %148 = zext i32 %147 to i64
  %149 = zext i32 %5 to i64
  %150 = mul nuw i64 %146, %149
  %151 = mul i64 %150, %148
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %144, i32 noundef %145, i32 noundef %144, i64 noundef %151) #2
  %152 = getelementptr inbounds i8, ptr %2, i64 96
  %153 = load i32, ptr %152, align 4, !tbaa !11
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %153, i32 noundef 1) #2
  br label %154

154:                                              ; preds = %135, %.critedge, %132
  ret void
}

declare i32 @libxsmm_meltw_getenum_precision(ptr noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

declare void @libxsmm_generator_vcvt_bf16f32_aarch64(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_vcvt_f32bf16_aarch64(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_loop_header_gp_reg_bound_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 96}
!12 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}
!13 = !{!12, !10, i64 4}
!14 = !{!12, !10, i64 140}
!15 = !{!16, !10, i64 8}
!16 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !8, i64 512}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!12, !10, i64 100}
!20 = !{!12, !10, i64 104}
!21 = !{!12, !10, i64 24}
!22 = !{!16, !10, i64 20}
!23 = distinct !{!23, !18}
!24 = !{!25, !10, i64 12}
!25 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !26, i64 27, !26, i64 29, !8, i64 31}
!26 = !{!"short", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass