; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseReduceGray2x2.ll (ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  store i64 %7, ptr %16, align 8, !tbaa !9
  %23 = load i64, ptr %10, align 8, !tbaa !9
  %24 = add i64 %23, 1
  %25 = udiv i64 %24, 2
  %26 = load i64, ptr %14, align 8, !tbaa !9
  %27 = icmp eq i64 %25, %26
  br i1 %27, label %28, label %34

28:                                               ; preds = %8
  %29 = load i64, ptr %11, align 8, !tbaa !9
  %30 = add i64 %29, 1
  %31 = udiv i64 %30, 2
  %32 = load i64, ptr %15, align 8, !tbaa !9
  %33 = icmp eq i64 %31, %32
  br label %34

34:                                               ; preds = %28, %8
  %35 = phi i1 [ false, %8 ], [ %33, %28 ]
  br i1 %35, label %36, label %37

36:                                               ; preds = %34
  br label %39

37:                                               ; preds = %34
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 34, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm) #4
  unreachable

38:                                               ; No predecessors!
  br label %39

39:                                               ; preds = %38, %36
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  %40 = load i64, ptr %10, align 8, !tbaa !9
  %41 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %40, i64 noundef 2)
  store i64 %41, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  store i64 0, ptr %18, align 8, !tbaa !9
  br label %42

42:                                               ; preds = %122, %39
  %43 = load i64, ptr %18, align 8, !tbaa !9
  %44 = load i64, ptr %11, align 8, !tbaa !9
  %45 = icmp ult i64 %43, %44
  br i1 %45, label %47, label %46

46:                                               ; preds = %42
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  br label %125

47:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #5
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %48, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  %49 = load i64, ptr %18, align 8, !tbaa !9
  %50 = load i64, ptr %11, align 8, !tbaa !9
  %51 = sub i64 %50, 1
  %52 = icmp eq i64 %49, %51
  br i1 %52, label %53, label %55

53:                                               ; preds = %47
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  br label %59

55:                                               ; preds = %47
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = load i64, ptr %12, align 8, !tbaa !9
  %58 = getelementptr inbounds i8, ptr %56, i64 %57
  br label %59

59:                                               ; preds = %55, %53
  %60 = phi ptr [ %54, %53 ], [ %58, %55 ]
  store ptr %60, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  %61 = load ptr, ptr %9, align 8, !tbaa !5
  %62 = load i64, ptr %17, align 8, !tbaa !9
  %63 = getelementptr inbounds i8, ptr %61, i64 %62
  store ptr %63, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #5
  %64 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %64, ptr %22, align 8, !tbaa !5
  br label %65

65:                                               ; preds = %90, %59
  %66 = load ptr, ptr %19, align 8, !tbaa !5
  %67 = load ptr, ptr %21, align 8, !tbaa !5
  %68 = icmp ult ptr %66, %67
  br i1 %68, label %69, label %97

69:                                               ; preds = %65
  %70 = load ptr, ptr %19, align 8, !tbaa !5
  %71 = getelementptr inbounds i8, ptr %70, i64 0
  %72 = load i8, ptr %71, align 1, !tbaa !11
  %73 = zext i8 %72 to i32
  %74 = load ptr, ptr %19, align 8, !tbaa !5
  %75 = getelementptr inbounds i8, ptr %74, i64 1
  %76 = load i8, ptr %75, align 1, !tbaa !11
  %77 = zext i8 %76 to i32
  %78 = load ptr, ptr %20, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 0
  %80 = load i8, ptr %79, align 1, !tbaa !11
  %81 = zext i8 %80 to i32
  %82 = load ptr, ptr %20, align 8, !tbaa !5
  %83 = getelementptr inbounds i8, ptr %82, i64 1
  %84 = load i8, ptr %83, align 1, !tbaa !11
  %85 = zext i8 %84 to i32
  %86 = call noundef i32 @_ZN4Simd4Base7AverageEiiii(i32 noundef %73, i32 noundef %77, i32 noundef %81, i32 noundef %85)
  %87 = trunc i32 %86 to i8
  %88 = load ptr, ptr %22, align 8, !tbaa !5
  %89 = getelementptr inbounds i8, ptr %88, i64 0
  store i8 %87, ptr %89, align 1, !tbaa !11
  br label %90

90:                                               ; preds = %69
  %91 = load ptr, ptr %19, align 8, !tbaa !5
  %92 = getelementptr inbounds i8, ptr %91, i64 2
  store ptr %92, ptr %19, align 8, !tbaa !5
  %93 = load ptr, ptr %20, align 8, !tbaa !5
  %94 = getelementptr inbounds i8, ptr %93, i64 2
  store ptr %94, ptr %20, align 8, !tbaa !5
  %95 = load ptr, ptr %22, align 8, !tbaa !5
  %96 = getelementptr inbounds i8, ptr %95, i64 1
  store ptr %96, ptr %22, align 8, !tbaa !5
  br label %65, !llvm.loop !12

97:                                               ; preds = %65
  %98 = load i64, ptr %17, align 8, !tbaa !9
  %99 = load i64, ptr %10, align 8, !tbaa !9
  %100 = icmp ne i64 %98, %99
  br i1 %100, label %101, label %114

101:                                              ; preds = %97
  %102 = load ptr, ptr %19, align 8, !tbaa !5
  %103 = getelementptr inbounds i8, ptr %102, i64 0
  %104 = load i8, ptr %103, align 1, !tbaa !11
  %105 = zext i8 %104 to i32
  %106 = load ptr, ptr %20, align 8, !tbaa !5
  %107 = getelementptr inbounds i8, ptr %106, i64 0
  %108 = load i8, ptr %107, align 1, !tbaa !11
  %109 = zext i8 %108 to i32
  %110 = call noundef i32 @_ZN4Simd4Base7AverageEii(i32 noundef %105, i32 noundef %109)
  %111 = trunc i32 %110 to i8
  %112 = load ptr, ptr %22, align 8, !tbaa !5
  %113 = getelementptr inbounds i8, ptr %112, i64 0
  store i8 %111, ptr %113, align 1, !tbaa !11
  br label %114

114:                                              ; preds = %101, %97
  %115 = load i64, ptr %12, align 8, !tbaa !9
  %116 = mul i64 2, %115
  %117 = load ptr, ptr %9, align 8, !tbaa !5
  %118 = getelementptr inbounds i8, ptr %117, i64 %116
  store ptr %118, ptr %9, align 8, !tbaa !5
  %119 = load i64, ptr %16, align 8, !tbaa !9
  %120 = load ptr, ptr %13, align 8, !tbaa !5
  %121 = getelementptr inbounds i8, ptr %120, i64 %119
  store ptr %121, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #5
  br label %122

122:                                              ; preds = %114
  %123 = load i64, ptr %18, align 8, !tbaa !9
  %124 = add i64 %123, 2
  store i64 %124, ptr %18, align 8, !tbaa !9
  br label %42, !llvm.loop !14

125:                                              ; preds = %46
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base7AverageEiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base7AverageEii(i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm(ptr noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) local_unnamed_addr #0 {
  %9 = add i64 %1, 1
  %10 = lshr i64 %9, 1
  %11 = icmp eq i64 %10, %5
  br i1 %11, label %12, label %.critedge

12:                                               ; preds = %8
  %13 = add i64 %2, 1
  %14 = lshr i64 %13, 1
  %15 = icmp eq i64 %14, %6
  br i1 %15, label %16, label %.critedge

.critedge:                                        ; preds = %8, %12
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 34, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray2x2EPKhmmmPhmmm) #3
  unreachable

16:                                               ; preds = %12
  %17 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 2)
  %.not52 = icmp eq i64 %2, 0
  br i1 %.not52, label %._crit_edge51, label %.lr.ph50

.lr.ph50:                                         ; preds = %16
  %18 = add i64 %2, -1
  %.not = icmp eq i64 %17, %1
  %19 = shl i64 %3, 1
  br i1 %.not, label %.lr.ph50.split.us.preheader, label %.lr.ph50.split.preheader

.lr.ph50.split.preheader:                         ; preds = %.lr.ph50
  %20 = icmp sgt i64 %17, 0
  br label %.lr.ph50.split

.lr.ph50.split.us.preheader:                      ; preds = %.lr.ph50
  %21 = icmp sgt i64 %1, 0
  br label %.lr.ph50.split.us

.lr.ph50.split.us:                                ; preds = %.lr.ph50.split.us.preheader, %._crit_edge.us
  %.03548.us = phi ptr [ %25, %._crit_edge.us ], [ %0, %.lr.ph50.split.us.preheader ]
  %.03847.us = phi i64 [ %27, %._crit_edge.us ], [ 0, %.lr.ph50.split.us.preheader ]
  %.03946.us = phi ptr [ %26, %._crit_edge.us ], [ %4, %.lr.ph50.split.us.preheader ]
  %22 = getelementptr inbounds i8, ptr %.03548.us, i64 %1
  br i1 %21, label %.lr.ph.us.preheader, label %._crit_edge.us

.lr.ph.us.preheader:                              ; preds = %.lr.ph50.split.us
  %23 = icmp eq i64 %.03847.us, %18
  %.idx.us = select i1 %23, i64 0, i64 %3
  %24 = getelementptr inbounds i8, ptr %.03548.us, i64 %.idx.us
  br label %.lr.ph.us

._crit_edge.us:                                   ; preds = %.lr.ph.us, %.lr.ph50.split.us
  %25 = getelementptr inbounds i8, ptr %.03548.us, i64 %19
  %26 = getelementptr inbounds i8, ptr %.03946.us, i64 %7
  %27 = add i64 %.03847.us, 2
  %28 = icmp ult i64 %27, %2
  br i1 %28, label %.lr.ph50.split.us, label %._crit_edge51, !llvm.loop !5

.lr.ph.us:                                        ; preds = %.lr.ph.us.preheader, %.lr.ph.us
  %.043.us = phi ptr [ %43, %.lr.ph.us ], [ %.03946.us, %.lr.ph.us.preheader ]
  %.03642.us = phi ptr [ %42, %.lr.ph.us ], [ %24, %.lr.ph.us.preheader ]
  %.03741.us = phi ptr [ %41, %.lr.ph.us ], [ %.03548.us, %.lr.ph.us.preheader ]
  %29 = load i8, ptr %.03741.us, align 1, !tbaa !7
  %30 = zext i8 %29 to i32
  %31 = getelementptr inbounds i8, ptr %.03741.us, i64 1
  %32 = load i8, ptr %31, align 1, !tbaa !7
  %33 = zext i8 %32 to i32
  %34 = load i8, ptr %.03642.us, align 1, !tbaa !7
  %35 = zext i8 %34 to i32
  %36 = getelementptr inbounds i8, ptr %.03642.us, i64 1
  %37 = load i8, ptr %36, align 1, !tbaa !7
  %38 = zext i8 %37 to i32
  %39 = tail call noundef i32 @_ZN4Simd4Base7AverageEiiii(i32 noundef %30, i32 noundef %33, i32 noundef %35, i32 noundef %38)
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %.043.us, align 1, !tbaa !7
  %41 = getelementptr inbounds i8, ptr %.03741.us, i64 2
  %42 = getelementptr inbounds i8, ptr %.03642.us, i64 2
  %43 = getelementptr inbounds i8, ptr %.043.us, i64 1
  %44 = icmp ult ptr %41, %22
  br i1 %44, label %.lr.ph.us, label %._crit_edge.us, !llvm.loop !10

._crit_edge51:                                    ; preds = %._crit_edge, %._crit_edge.us, %16
  ret void

.lr.ph50.split:                                   ; preds = %.lr.ph50.split.preheader, %._crit_edge
  %.03548 = phi ptr [ %70, %._crit_edge ], [ %0, %.lr.ph50.split.preheader ]
  %.03847 = phi i64 [ %72, %._crit_edge ], [ 0, %.lr.ph50.split.preheader ]
  %.03946 = phi ptr [ %71, %._crit_edge ], [ %4, %.lr.ph50.split.preheader ]
  %45 = icmp eq i64 %.03847, %18
  %.idx = select i1 %45, i64 0, i64 %3
  %46 = getelementptr inbounds i8, ptr %.03548, i64 %.idx
  %47 = getelementptr inbounds i8, ptr %.03548, i64 %17
  br i1 %20, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.lr.ph50.split, %.lr.ph
  %.043 = phi ptr [ %62, %.lr.ph ], [ %.03946, %.lr.ph50.split ]
  %.03642 = phi ptr [ %61, %.lr.ph ], [ %46, %.lr.ph50.split ]
  %.03741 = phi ptr [ %60, %.lr.ph ], [ %.03548, %.lr.ph50.split ]
  %48 = load i8, ptr %.03741, align 1, !tbaa !7
  %49 = zext i8 %48 to i32
  %50 = getelementptr inbounds i8, ptr %.03741, i64 1
  %51 = load i8, ptr %50, align 1, !tbaa !7
  %52 = zext i8 %51 to i32
  %53 = load i8, ptr %.03642, align 1, !tbaa !7
  %54 = zext i8 %53 to i32
  %55 = getelementptr inbounds i8, ptr %.03642, i64 1
  %56 = load i8, ptr %55, align 1, !tbaa !7
  %57 = zext i8 %56 to i32
  %58 = tail call noundef i32 @_ZN4Simd4Base7AverageEiiii(i32 noundef %49, i32 noundef %52, i32 noundef %54, i32 noundef %57)
  %59 = trunc i32 %58 to i8
  store i8 %59, ptr %.043, align 1, !tbaa !7
  %60 = getelementptr inbounds i8, ptr %.03741, i64 2
  %61 = getelementptr inbounds i8, ptr %.03642, i64 2
  %62 = getelementptr inbounds i8, ptr %.043, i64 1
  %63 = icmp ult ptr %60, %47
  br i1 %63, label %.lr.ph, label %._crit_edge, !llvm.loop !10

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph50.split
  %.037.lcssa = phi ptr [ %.03548, %.lr.ph50.split ], [ %60, %.lr.ph ]
  %.036.lcssa = phi ptr [ %46, %.lr.ph50.split ], [ %61, %.lr.ph ]
  %.0.lcssa = phi ptr [ %.03946, %.lr.ph50.split ], [ %62, %.lr.ph ]
  %64 = load i8, ptr %.037.lcssa, align 1, !tbaa !7
  %65 = zext i8 %64 to i32
  %66 = load i8, ptr %.036.lcssa, align 1, !tbaa !7
  %67 = zext i8 %66 to i32
  %68 = tail call noundef i32 @_ZN4Simd4Base7AverageEii(i32 noundef %65, i32 noundef %67)
  %69 = trunc i32 %68 to i8
  store i8 %69, ptr %.0.lcssa, align 1, !tbaa !7
  %70 = getelementptr inbounds i8, ptr %.03548, i64 %19
  %71 = getelementptr inbounds i8, ptr %.03946, i64 %7
  %72 = add i64 %.03847, 2
  %73 = icmp ult i64 %72, %2
  br i1 %73, label %.lr.ph50.split, label %._crit_edge51, !llvm.loop !5
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base7AverageEiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base7AverageEii(i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = distinct !{!10, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass