; LLVM IR from alekras/ao.rtos.cpp :: Tools/ARM-Raspberry_Pi/Initial_Interactive_Loader (periph)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pAUX_MU_IO_REG = external dso_local global ptr, align 8
@flag = external dso_local global i8, align 1
@txhead = external dso_local global i32, align 4
@txtail = external dso_local global i32, align 4
@txbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IER_REG = external dso_local global ptr, align 8
@rxhead = external dso_local global i32, align 4
@rxbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IIR_REG = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @irq_handler_mini_uart() #1 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  br label %2

2:                                                ; preds = %46, %0
  %3 = load ptr, ptr @pAUX_MU_IIR_REG, align 8, !tbaa !5
  %4 = load volatile i32, ptr %3, align 4, !tbaa !9
  store volatile i32 %4, ptr %1, align 4, !tbaa !9
  %5 = load volatile i32, ptr %1, align 4, !tbaa !9
  %6 = and i32 %5, 1
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %8, label %9

8:                                                ; preds = %2
  br label %50

9:                                                ; preds = %2
  %10 = load volatile i32, ptr %1, align 4, !tbaa !9
  %11 = and i32 %10, 4
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %24

13:                                               ; preds = %9
  %14 = load ptr, ptr @pAUX_MU_IO_REG, align 8, !tbaa !5
  %15 = load volatile i32, ptr %14, align 4, !tbaa !9
  %16 = and i32 %15, 255
  %17 = trunc i32 %16 to i8
  %18 = load volatile i32, ptr @rxhead, align 4, !tbaa !9
  %19 = zext i32 %18 to i64
  %20 = getelementptr inbounds [256 x i8], ptr @rxbuffer, i64 0, i64 %19
  store volatile i8 %17, ptr %20, align 1, !tbaa !11
  %21 = load volatile i32, ptr @rxhead, align 4, !tbaa !9
  %22 = add i32 %21, 1
  %23 = and i32 %22, 255
  store volatile i32 %23, ptr @rxhead, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %13, %9
  %25 = load volatile i32, ptr %1, align 4, !tbaa !9
  %26 = and i32 %25, 2
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %45

28:                                               ; preds = %24
  %29 = load volatile i32, ptr @txhead, align 4, !tbaa !9
  %30 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %31 = icmp ne i32 %29, %30
  br i1 %31, label %32, label %42

32:                                               ; preds = %28
  %33 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %34
  %36 = load volatile i8, ptr %35, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = load ptr, ptr @pAUX_MU_IO_REG, align 8, !tbaa !5
  store volatile i32 %37, ptr %38, align 4, !tbaa !9
  %39 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %40 = add i32 %39, 1
  %41 = and i32 %40, 255
  store volatile i32 %41, ptr @txtail, align 4, !tbaa !9
  br label %44

42:                                               ; preds = %28
  store volatile i8 0, ptr @flag, align 1, !tbaa !12
  %43 = load ptr, ptr @pAUX_MU_IER_REG, align 8, !tbaa !5
  store volatile i32 5, ptr %43, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %42, %32
  br label %45

45:                                               ; preds = %44, %24
  br label %46

46:                                               ; preds = %45
  %47 = load volatile i32, ptr %1, align 4, !tbaa !9
  %48 = and i32 %47, 1
  %49 = icmp eq i32 %48, 0
  br i1 %49, label %2, label %50, !llvm.loop !14

50:                                               ; preds = %46, %8
  call void asm sideeffect "cpsid aif", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !16
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{i64 2147530742}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pAUX_MU_IO_REG = external dso_local local_unnamed_addr global ptr, align 8
@flag = external dso_local global i8, align 1
@txhead = external dso_local global i32, align 4
@txtail = external dso_local global i32, align 4
@txbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IER_REG = external dso_local local_unnamed_addr global ptr, align 8
@rxhead = external dso_local global i32, align 4
@rxbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IIR_REG = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @irq_handler_mini_uart() local_unnamed_addr #1 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1)
  %2 = load ptr, ptr @pAUX_MU_IIR_REG, align 8, !tbaa !5
  %3 = load ptr, ptr @pAUX_MU_IO_REG, align 8
  %4 = load ptr, ptr @pAUX_MU_IER_REG, align 8
  br label %5

5:                                                ; preds = %34, %0
  %6 = load volatile i32, ptr %2, align 4, !tbaa !9
  store volatile i32 %6, ptr %1, align 4, !tbaa !9
  %.0..0..0..0. = load volatile i32, ptr %1, align 4, !tbaa !9
  %7 = and i32 %.0..0..0..0., 1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %37

8:                                                ; preds = %5
  %.0..0..0..0.1 = load volatile i32, ptr %1, align 4, !tbaa !9
  %9 = and i32 %.0..0..0..0.1, 4
  %.not4 = icmp eq i32 %9, 0
  br i1 %.not4, label %19, label %10

10:                                               ; preds = %8
  %11 = load volatile i32, ptr %3, align 4, !tbaa !9
  %12 = trunc i32 %11 to i8
  %13 = load volatile i32, ptr @rxhead, align 4, !tbaa !9
  %14 = zext i32 %13 to i64
  %15 = getelementptr inbounds [256 x i8], ptr @rxbuffer, i64 0, i64 %14
  store volatile i8 %12, ptr %15, align 1, !tbaa !11
  %16 = load volatile i32, ptr @rxhead, align 4, !tbaa !9
  %17 = add i32 %16, 1
  %18 = and i32 %17, 255
  store volatile i32 %18, ptr @rxhead, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %10, %8
  %.0..0..0..0.2 = load volatile i32, ptr %1, align 4, !tbaa !9
  %20 = and i32 %.0..0..0..0.2, 2
  %.not5 = icmp eq i32 %20, 0
  br i1 %.not5, label %34, label %21

21:                                               ; preds = %19
  %22 = load volatile i32, ptr @txhead, align 4, !tbaa !9
  %23 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %.not6 = icmp eq i32 %22, %23
  br i1 %.not6, label %33, label %24

24:                                               ; preds = %21
  %25 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %26
  %28 = load volatile i8, ptr %27, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  store volatile i32 %29, ptr %3, align 4, !tbaa !9
  %30 = load volatile i32, ptr @txtail, align 4, !tbaa !9
  %31 = add i32 %30, 1
  %32 = and i32 %31, 255
  store volatile i32 %32, ptr @txtail, align 4, !tbaa !9
  br label %34

33:                                               ; preds = %21
  store volatile i8 0, ptr @flag, align 1, !tbaa !12
  store volatile i32 5, ptr %4, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %19, %33, %24
  %.0..0..0..0.3 = load volatile i32, ptr %1, align 4, !tbaa !9
  %35 = and i32 %.0..0..0..0.3, 1
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %5, label %37, !llvm.loop !14

37:                                               ; preds = %5, %34
  tail call void asm sideeffect "cpsid aif", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !16
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1)
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{i64 2147530742}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,SROAPass,SimplifyCFGPass,TailCallElimPass