; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetDeconvolution16bNhwcGemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetDeconvolution16bNhwcGemm" = type { %"class.Simd::SynetDeconvolution16b", %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr, ptr, ptr, ptr }
%"class.Simd::SynetDeconvolution16b" = type { %"struct.Simd::Deletable", %"struct.Simd::DeconvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", %"struct.Simd::Array.0", %"struct.Simd::Array.1", %"struct.Simd::Array.1", i8, i8, i8, i64, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::DeconvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam" = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetDeconvolution16bNhwcGemm9SetParamsEPKfS3_S3_(ptr noundef nonnull align 8 dereferenceable(488) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) unnamed_addr #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %18 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %19 = getelementptr inbounds %"class.Simd::Base::SynetDeconvolution16bNhwcGemm", ptr %18, i32 0, i32 1
  store ptr %19, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  %21 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %20, i32 0, i32 1
  %22 = load i64, ptr %21, align 8, !tbaa !9
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %23, i32 0, i32 3
  %25 = load i64, ptr %24, align 8, !tbaa !12
  %26 = call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %22, i64 noundef %25)
  store i64 %26, ptr %10, align 8, !tbaa !13
  %27 = getelementptr inbounds %"class.Simd::SynetDeconvolution16b", ptr %18, i32 0, i32 4
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  %29 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %28, i32 0, i32 13
  %30 = load i64, ptr %29, align 8, !tbaa !14
  %31 = load ptr, ptr %9, align 8, !tbaa !5
  %32 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %31, i32 0, i32 12
  %33 = load i64, ptr %32, align 8, !tbaa !15
  %34 = mul i64 %30, %33
  call void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %34, i1 noundef zeroext true, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %35 = getelementptr inbounds %"class.Simd::SynetDeconvolution16b", ptr %18, i32 0, i32 4
  %36 = getelementptr inbounds %"struct.Simd::Array.0", ptr %35, i32 0, i32 0
  %37 = load ptr, ptr %36, align 8, !tbaa !16
  store ptr %37, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  store i64 0, ptr %12, align 8, !tbaa !13
  br label %38

38:                                               ; preds = %119, %4
  %39 = load i64, ptr %12, align 8, !tbaa !13
  %40 = load i64, ptr %10, align 8, !tbaa !13
  %41 = icmp ult i64 %39, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store i32 2, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  br label %125

43:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  store i64 0, ptr %14, align 8, !tbaa !13
  br label %44

44:                                               ; preds = %115, %43
  %45 = load i64, ptr %14, align 8, !tbaa !13
  %46 = load ptr, ptr %9, align 8, !tbaa !5
  %47 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %46, i32 0, i32 13
  %48 = load i64, ptr %47, align 8, !tbaa !14
  %49 = icmp ult i64 %45, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %44
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  br label %118

51:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = load i64, ptr %14, align 8, !tbaa !13
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  %55 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %54, i32 0, i32 1
  %56 = load i64, ptr %55, align 8, !tbaa !9
  %57 = mul i64 %53, %56
  %58 = getelementptr inbounds float, ptr %52, i64 %57
  %59 = load i64, ptr %12, align 8, !tbaa !13
  %60 = getelementptr inbounds float, ptr %58, i64 %59
  store ptr %60, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  store i64 0, ptr %16, align 8, !tbaa !13
  br label %61

61:                                               ; preds = %111, %51
  %62 = load i64, ptr %16, align 8, !tbaa !13
  %63 = load ptr, ptr %9, align 8, !tbaa !5
  %64 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %63, i32 0, i32 3
  %65 = load i64, ptr %64, align 8, !tbaa !12
  %66 = icmp ult i64 %62, %65
  br i1 %66, label %68, label %67

67:                                               ; preds = %61
  store i32 8, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  br label %114

68:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  store i64 0, ptr %17, align 8, !tbaa !13
  br label %69

69:                                               ; preds = %105, %68
  %70 = load i64, ptr %17, align 8, !tbaa !13
  %71 = icmp ult i64 %70, 2
  br i1 %71, label %73, label %72

72:                                               ; preds = %69
  store i32 11, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  br label %108

73:                                               ; preds = %69
  %74 = load i64, ptr %12, align 8, !tbaa !13
  %75 = load i64, ptr %16, align 8, !tbaa !13
  %76 = add i64 %74, %75
  %77 = load ptr, ptr %9, align 8, !tbaa !5
  %78 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %77, i32 0, i32 1
  %79 = load i64, ptr %78, align 8, !tbaa !9
  %80 = icmp ult i64 %76, %79
  br i1 %80, label %81, label %101

81:                                               ; preds = %73
  %82 = load i64, ptr %14, align 8, !tbaa !13
  %83 = load i64, ptr %17, align 8, !tbaa !13
  %84 = add i64 %82, %83
  %85 = load ptr, ptr %9, align 8, !tbaa !5
  %86 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %85, i32 0, i32 2
  %87 = load i64, ptr %86, align 8, !tbaa !32
  %88 = icmp ult i64 %84, %87
  br i1 %88, label %89, label %101

89:                                               ; preds = %81
  %90 = load ptr, ptr %15, align 8, !tbaa !5
  %91 = load i64, ptr %17, align 8, !tbaa !13
  %92 = load ptr, ptr %9, align 8, !tbaa !5
  %93 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %92, i32 0, i32 1
  %94 = load i64, ptr %93, align 8, !tbaa !9
  %95 = mul i64 %91, %94
  %96 = getelementptr inbounds float, ptr %90, i64 %95
  %97 = load float, ptr %96, align 4, !tbaa !33
  %98 = call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %97)
  %99 = load ptr, ptr %11, align 8, !tbaa !5
  %100 = getelementptr inbounds i16, ptr %99, i32 1
  store ptr %100, ptr %11, align 8, !tbaa !5
  store i16 %98, ptr %99, align 2, !tbaa !35
  br label %104

101:                                              ; preds = %81, %73
  %102 = load ptr, ptr %11, align 8, !tbaa !5
  %103 = getelementptr inbounds i16, ptr %102, i32 1
  store ptr %103, ptr %11, align 8, !tbaa !5
  store i16 0, ptr %102, align 2, !tbaa !35
  br label %104

104:                                              ; preds = %101, %89
  br label %105

105:                                              ; preds = %104
  %106 = load i64, ptr %17, align 8, !tbaa !13
  %107 = add i64 %106, 1
  store i64 %107, ptr %17, align 8, !tbaa !13
  br label %69, !llvm.loop !37

108:                                              ; preds = %72
  %109 = load ptr, ptr %15, align 8, !tbaa !5
  %110 = getelementptr inbounds float, ptr %109, i32 1
  store ptr %110, ptr %15, align 8, !tbaa !5
  br label %111

111:                                              ; preds = %108
  %112 = load i64, ptr %16, align 8, !tbaa !13
  %113 = add i64 %112, 1
  store i64 %113, ptr %16, align 8, !tbaa !13
  br label %61, !llvm.loop !39

114:                                              ; preds = %67
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  br label %115

115:                                              ; preds = %114
  %116 = load i64, ptr %14, align 8, !tbaa !13
  %117 = add i64 %116, 2
  store i64 %117, ptr %14, align 8, !tbaa !13
  br label %44, !llvm.loop !40

118:                                              ; preds = %50
  br label %119

119:                                              ; preds = %118
  %120 = load ptr, ptr %9, align 8, !tbaa !5
  %121 = getelementptr inbounds %"struct.Simd::Base::SynetDeconvolution16bNhwcGemm::AlgParam", ptr %120, i32 0, i32 3
  %122 = load i64, ptr %121, align 8, !tbaa !12
  %123 = load i64, ptr %12, align 8, !tbaa !13
  %124 = add i64 %123, %122
  store i64 %124, ptr %12, align 8, !tbaa !13
  br label %38, !llvm.loop !41

125:                                              ; preds = %42
  %126 = load ptr, ptr %7, align 8, !tbaa !5
  %127 = call noundef i64 @_ZN4Simd9AlignmentEv()
  call void @_ZN4Simd21SynetDeconvolution16b7SetBiasEPKfm(ptr noundef nonnull align 8 dereferenceable(328) %18, ptr noundef %126, i64 noundef %127)
  %128 = load ptr, ptr %8, align 8, !tbaa !5
  %129 = call noundef i64 @_ZN4Simd9AlignmentEv()
  call void @_ZN4Simd21SynetDeconvolution16b9SetParamsEPKfm(ptr noundef nonnull align 8 dereferenceable(328) %18, ptr noundef %128, i64 noundef %129)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef) #3

declare void @_ZN4Simd21SynetDeconvolution16b7SetBiasEPKfm(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, i64 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd9AlignmentEv() #1

declare void @_ZN4Simd21SynetDeconvolution16b9SetParamsEPKfm(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, i64 noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"_ZTSN4Simd4Base29SynetDeconvolution16bNhwcGemm8AlgParamE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 24}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 104}
!15 = !{!10, !11, i64 96}
!16 = !{!17, !6, i64 240}
!17 = !{!"_ZTSN4Simd21SynetDeconvolution16bE", !18, i64 0, !19, i64 8, !26, i64 192, !27, i64 208, !29, i64 240, !30, i64 256, !30, i64 272, !31, i64 288, !31, i64 289, !31, i64 290, !11, i64 296, !11, i64 304, !11, i64 312, !11, i64 320}
!18 = !{!"_ZTSN4Simd9DeletableE"}
!19 = !{!"_ZTSN4Simd11DeconvParamE", !20, i64 0, !24, i64 160, !11, i64 168, !25, i64 176}
!20 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !21, i64 24, !22, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !21, i64 56, !22, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !23, i64 152}
!21 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!22 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!23 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!24 = !{!"_ZTS8SimdBool", !7, i64 0}
!25 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!26 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !11, i64 8}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !28, i64 0, !11, i64 8, !7, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!29 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !11, i64 8}
!30 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !11, i64 8}
!31 = !{!"bool", !7, i64 0}
!32 = !{!10, !11, i64 16}
!33 = !{!34, !34, i64 0}
!34 = !{!"float", !7, i64 0}
!35 = !{!36, !36, i64 0}
!36 = !{!"short", !7, i64 0}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}
!39 = distinct !{!39, !38}
!40 = distinct !{!40, !38}
!41 = distinct !{!41, !38}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetDeconvolution16bNhwcGemm9SetParamsEPKfS3_S3_(ptr noundef nonnull align 8 dereferenceable(488) %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr noundef %3) unnamed_addr #1 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 336
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 352
  %8 = load i64, ptr %7, align 8, !tbaa !10
  %9 = tail call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %6, i64 noundef %8)
  %10 = getelementptr inbounds i8, ptr %0, i64 240
  %11 = getelementptr inbounds i8, ptr %0, i64 432
  %12 = load i64, ptr %11, align 8, !tbaa !11
  %13 = getelementptr inbounds i8, ptr %0, i64 424
  %14 = load i64, ptr %13, align 8, !tbaa !12
  %15 = mul i64 %14, %12
  tail call void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %10, i64 noundef %15, i1 noundef zeroext true, i64 noundef 8)
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %._crit_edge54, label %.preheader40.lr.ph

.preheader40.lr.ph:                               ; preds = %4
  %16 = getelementptr inbounds i8, ptr %0, i64 344
  %17 = load i64, ptr %11, align 8, !tbaa !11
  %.not55 = icmp eq i64 %17, 0
  br i1 %.not55, label %._crit_edge54, label %.preheader40.preheader

.preheader40.preheader:                           ; preds = %.preheader40.lr.ph
  %18 = load ptr, ptr %10, align 8, !tbaa !13
  %.pre64.pre = load i64, ptr %7, align 8, !tbaa !10
  br label %.preheader40

.preheader40:                                     ; preds = %.preheader40.preheader, %._crit_edge48
  %.pre64 = phi i64 [ %.pre6469, %._crit_edge48 ], [ %.pre64.pre, %.preheader40.preheader ]
  %19 = phi i64 [ %24, %._crit_edge48 ], [ %17, %.preheader40.preheader ]
  %20 = phi i64 [ %25, %._crit_edge48 ], [ %17, %.preheader40.preheader ]
  %.03752 = phi i64 [ %26, %._crit_edge48 ], [ 0, %.preheader40.preheader ]
  %.03851 = phi ptr [ %.1.lcssa, %._crit_edge48 ], [ %18, %.preheader40.preheader ]
  %invariant.gep = getelementptr float, ptr %1, i64 %.03752
  %.not56 = icmp eq i64 %20, 0
  br i1 %.not56, label %._crit_edge48, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader40
  %.not57 = icmp eq i64 %.pre64, 0
  br i1 %.not57, label %._crit_edge48, label %.lr.ph.split

._crit_edge54:                                    ; preds = %._crit_edge48, %.preheader40.lr.ph, %4
  %21 = tail call noundef i64 @_ZN4Simd9AlignmentEv()
  tail call void @_ZN4Simd21SynetDeconvolution16b7SetBiasEPKfm(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %2, i64 noundef %21)
  %22 = tail call noundef i64 @_ZN4Simd9AlignmentEv()
  tail call void @_ZN4Simd21SynetDeconvolution16b9SetParamsEPKfm(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %3, i64 noundef %22)
  ret void

._crit_edge48:                                    ; preds = %._crit_edge, %.lr.ph, %.preheader40
  %.pre6469 = phi i64 [ %.pre64, %.preheader40 ], [ 0, %.lr.ph ], [ %.pre6467, %._crit_edge ]
  %23 = phi i64 [ %.pre64, %.preheader40 ], [ 0, %.lr.ph ], [ %39, %._crit_edge ]
  %24 = phi i64 [ %19, %.preheader40 ], [ %19, %.lr.ph ], [ %38, %._crit_edge ]
  %25 = phi i64 [ 0, %.preheader40 ], [ %20, %.lr.ph ], [ %38, %._crit_edge ]
  %.1.lcssa = phi ptr [ %.03851, %.preheader40 ], [ %.03851, %.lr.ph ], [ %.2.lcssa, %._crit_edge ]
  %26 = add i64 %23, %.03752
  %27 = icmp ult i64 %26, %9
  br i1 %27, label %.preheader40, label %._crit_edge54, !llvm.loop !30

.lr.ph.split:                                     ; preds = %.lr.ph, %._crit_edge
  %.pre6468 = phi i64 [ %.pre6467, %._crit_edge ], [ %.pre64, %.lr.ph ]
  %28 = phi i64 [ %38, %._crit_edge ], [ %19, %.lr.ph ]
  %29 = phi i64 [ %39, %._crit_edge ], [ %.pre64, %.lr.ph ]
  %30 = phi i64 [ %40, %._crit_edge ], [ 1, %.lr.ph ]
  %.03647 = phi i64 [ %41, %._crit_edge ], [ 0, %.lr.ph ]
  %.146 = phi ptr [ %.2.lcssa, %._crit_edge ], [ %.03851, %.lr.ph ]
  %.not58 = icmp eq i64 %30, 0
  br i1 %.not58, label %._crit_edge, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.lr.ph.split
  %31 = load i64, ptr %5, align 8, !tbaa !5
  %32 = mul i64 %31, %.03647
  %gep = getelementptr float, ptr %invariant.gep, i64 %32
  %33 = or disjoint i64 %.03647, 1
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.split.us
  %.pre6466 = phi i64 [ %.pre6465, %.split.us ], [ %.pre6468, %.preheader.preheader ]
  %34 = phi i64 [ %43, %.split.us ], [ %29, %.preheader.preheader ]
  %.03445 = phi i64 [ %45, %.split.us ], [ 0, %.preheader.preheader ]
  %.03544 = phi ptr [ %44, %.split.us ], [ %gep, %.preheader.preheader ]
  %.243 = phi ptr [ %.us-phi, %.split.us ], [ %.146, %.preheader.preheader ]
  %35 = add i64 %.03445, %.03752
  %36 = load i64, ptr %5, align 8, !tbaa !5
  %37 = icmp ult i64 %35, %36
  br i1 %37, label %.preheader.split.preheader, label %.preheader.split.us.preheader

.preheader.split.us.preheader:                    ; preds = %.preheader
  store i32 0, ptr %.243, align 2
  br label %.split.us

._crit_edge.loopexit:                             ; preds = %.split.us
  %.pre63 = load i64, ptr %11, align 8, !tbaa !11
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph.split
  %.pre6467 = phi i64 [ %.pre6468, %.lr.ph.split ], [ %.pre6465, %._crit_edge.loopexit ]
  %38 = phi i64 [ %28, %.lr.ph.split ], [ %.pre63, %._crit_edge.loopexit ]
  %39 = phi i64 [ %29, %.lr.ph.split ], [ %43, %._crit_edge.loopexit ]
  %40 = phi i64 [ 0, %.lr.ph.split ], [ %43, %._crit_edge.loopexit ]
  %.2.lcssa = phi ptr [ %.146, %.lr.ph.split ], [ %.us-phi, %._crit_edge.loopexit ]
  %41 = add i64 %.03647, 2
  %42 = icmp ult i64 %41, %38
  br i1 %42, label %.lr.ph.split, label %._crit_edge48, !llvm.loop !33

.split.us:                                        ; preds = %.preheader.split.us.preheader, %.split.us.loopexit
  %.pre6465 = phi i64 [ %.pre62, %.split.us.loopexit ], [ %.pre6466, %.preheader.split.us.preheader ]
  %43 = phi i64 [ %.pre62, %.split.us.loopexit ], [ %34, %.preheader.split.us.preheader ]
  %.us-phi = getelementptr i8, ptr %.243, i64 4
  %44 = getelementptr inbounds i8, ptr %.03544, i64 4
  %45 = add nuw i64 %.03445, 1
  %46 = icmp ult i64 %45, %43
  br i1 %46, label %.preheader, label %._crit_edge.loopexit, !llvm.loop !34

.preheader.split.preheader:                       ; preds = %.preheader
  %47 = load i64, ptr %16, align 8, !tbaa !35
  %48 = icmp ult i64 %.03647, %47
  br i1 %48, label %49, label %.preheader.split.1

49:                                               ; preds = %.preheader.split.preheader
  %50 = load float, ptr %.03544, align 4, !tbaa !36
  %51 = tail call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %50)
  %.pre = load i64, ptr %5, align 8, !tbaa !5
  br label %.preheader.split.1

.preheader.split.1:                               ; preds = %.preheader.split.preheader, %49
  %52 = phi i64 [ %.pre, %49 ], [ %36, %.preheader.split.preheader ]
  %storemerge = phi i16 [ %51, %49 ], [ 0, %.preheader.split.preheader ]
  %.4 = getelementptr inbounds i8, ptr %.243, i64 2
  store i16 %storemerge, ptr %.243, align 2, !tbaa !38
  %53 = icmp ult i64 %35, %52
  %54 = load i64, ptr %16, align 8
  %55 = icmp ult i64 %33, %54
  %or.cond = select i1 %53, i1 %55, i1 false
  br i1 %or.cond, label %56, label %.split.us.loopexit

56:                                               ; preds = %.preheader.split.1
  %57 = getelementptr inbounds float, ptr %.03544, i64 %52
  %58 = load float, ptr %57, align 4, !tbaa !36
  %59 = tail call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %58)
  br label %.split.us.loopexit

.split.us.loopexit:                               ; preds = %56, %.preheader.split.1
  %storemerge.1 = phi i16 [ %59, %56 ], [ 0, %.preheader.split.1 ]
  store i16 %storemerge.1, ptr %.4, align 2, !tbaa !38
  %.pre62 = load i64, ptr %7, align 8, !tbaa !10
  br label %.split.us
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef) local_unnamed_addr #2

declare void @_ZN4Simd21SynetDeconvolution16b7SetBiasEPKfm(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd9AlignmentEv() local_unnamed_addr #0

declare void @_ZN4Simd21SynetDeconvolution16b9SetParamsEPKfm(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, i64 noundef) local_unnamed_addr #3

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTSN4Simd4Base29SynetDeconvolution16bNhwcGemm8AlgParamE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 24}
!11 = !{!6, !7, i64 104}
!12 = !{!6, !7, i64 96}
!13 = !{!14, !24, i64 240}
!14 = !{!"_ZTSN4Simd21SynetDeconvolution16bE", !15, i64 0, !16, i64 8, !23, i64 192, !25, i64 208, !27, i64 240, !28, i64 256, !28, i64 272, !29, i64 288, !29, i64 289, !29, i64 290, !7, i64 296, !7, i64 304, !7, i64 312, !7, i64 320}
!15 = !{!"_ZTSN4Simd9DeletableE"}
!16 = !{!"_ZTSN4Simd11DeconvParamE", !17, i64 0, !21, i64 160, !7, i64 168, !22, i64 176}
!17 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !18, i64 24, !19, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !18, i64 56, !19, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !20, i64 152}
!18 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!19 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!20 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!21 = !{!"_ZTS8SimdBool", !8, i64 0}
!22 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!23 = !{!"_ZTSN4Simd5ArrayIhEE", !24, i64 0, !7, i64 8}
!24 = !{!"any pointer", !8, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !7, i64 8, !8, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !24, i64 0}
!27 = !{!"_ZTSN4Simd5ArrayItEE", !24, i64 0, !7, i64 8}
!28 = !{!"_ZTSN4Simd5ArrayIfEE", !24, i64 0, !7, i64 8}
!29 = !{!"bool", !8, i64 0}
!30 = distinct !{!30, !31, !32}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!"llvm.loop.unswitch.partial.disable"}
!33 = distinct !{!33, !31, !32}
!34 = distinct !{!34, !31}
!35 = !{!6, !7, i64 16}
!36 = !{!37, !37, i64 0}
!37 = !{!"float", !8, i64 0}
!38 = !{!39, !39, i64 0}
!39 = !{!"short", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass