; LLVM IR from libxsmm/libxsmm :: src (generator_packed_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_gemm_aarch64_kloop_simd_packed(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) #2 {
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  store ptr %0, ptr %11, align 8, !tbaa !5
  store ptr %1, ptr %12, align 8, !tbaa !5
  store ptr %2, ptr %13, align 8, !tbaa !5
  store ptr %3, ptr %14, align 8, !tbaa !5
  store ptr %4, ptr %15, align 8, !tbaa !5
  store i32 %5, ptr %16, align 4, !tbaa !9
  store i32 %6, ptr %17, align 4, !tbaa !9
  store i32 %7, ptr %18, align 4, !tbaa !9
  store i32 %8, ptr %19, align 4, !tbaa !9
  store i32 %9, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  store i32 0, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  store i32 0, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store i32 0, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %25, i32 0, i32 6
  %27 = load i32, ptr %26, align 4, !tbaa !11
  %28 = icmp uge i32 %27, 2201
  br i1 %28, label %29, label %34

29:                                               ; preds = %10
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %30, i32 0, i32 6
  %32 = load i32, ptr %31, align 4, !tbaa !11
  %33 = icmp ule i32 %32, 2999
  br label %34

34:                                               ; preds = %29, %10
  %35 = phi i1 [ false, %10 ], [ %33, %29 ]
  %36 = zext i1 %35 to i64
  %37 = select i1 %35, i32 1, i32 0
  store i32 %37, ptr %24, align 4, !tbaa !9
  %38 = load i32, ptr %17, align 4, !tbaa !9
  %39 = load i32, ptr %18, align 4, !tbaa !9
  %40 = icmp ugt i32 %38, %39
  br i1 %40, label %41, label %49

41:                                               ; preds = %34
  %42 = load i32, ptr %24, align 4, !tbaa !9
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %41
  br label %47

45:                                               ; preds = %41
  %46 = load i32, ptr %18, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %45, %44
  %48 = phi i32 [ 1, %44 ], [ %46, %45 ]
  store i32 %48, ptr %23, align 4, !tbaa !9
  br label %49

49:                                               ; preds = %47, %34
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = load ptr, ptr %13, align 8, !tbaa !5
  %52 = load ptr, ptr %14, align 8, !tbaa !5
  %53 = load ptr, ptr %15, align 8, !tbaa !5
  %54 = load i32, ptr %19, align 4, !tbaa !9
  %55 = load i32, ptr %20, align 4, !tbaa !9
  %56 = load i32, ptr %23, align 4, !tbaa !9
  %57 = load i32, ptr %16, align 4, !tbaa !9
  call void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef %50, ptr noundef %51, ptr noundef %52, ptr noundef %53, i32 noundef %54, i32 noundef %55, i32 noundef %56, i32 noundef %57)
  %58 = load ptr, ptr %11, align 8, !tbaa !5
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = load ptr, ptr %13, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %60, i32 0, i32 12
  %62 = load i32, ptr %61, align 4, !tbaa !13
  %63 = load ptr, ptr %15, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %63, i32 0, i32 2
  %65 = load i32, ptr %64, align 1, !tbaa !15
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %58, ptr noundef %59, i32 noundef %62, i32 noundef %65)
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %66

66:                                               ; preds = %106, %49
  %67 = load i32, ptr %22, align 4, !tbaa !9
  %68 = load i32, ptr %20, align 4, !tbaa !9
  %69 = icmp ult i32 %67, %68
  br i1 %69, label %70, label %109

70:                                               ; preds = %66
  %71 = load ptr, ptr %11, align 8, !tbaa !5
  %72 = load ptr, ptr %13, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %72, i32 0, i32 1
  %74 = load i32, ptr %73, align 4, !tbaa !19
  %75 = load ptr, ptr %13, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %75, i32 0, i32 22
  %77 = load i32, ptr %76, align 4, !tbaa !20
  %78 = load i32, ptr %19, align 4, !tbaa !9
  %79 = load i32, ptr %20, align 4, !tbaa !9
  %80 = mul i32 %78, %79
  %81 = load i32, ptr %22, align 4, !tbaa !9
  %82 = add i32 %80, %81
  %83 = load ptr, ptr %14, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %83, i32 0, i32 5
  %85 = load i32, ptr %84, align 4, !tbaa !21
  %86 = load i32, ptr %23, align 4, !tbaa !9
  %87 = load i32, ptr %24, align 4, !tbaa !9
  %88 = trunc i32 %87 to i8
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %71, i32 noundef %74, i32 noundef %77, i32 noundef %82, i32 noundef %85, i32 noundef %86, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %88)
  %89 = load ptr, ptr %11, align 8, !tbaa !5
  %90 = load ptr, ptr %13, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %90, i32 0, i32 1
  %92 = load i32, ptr %91, align 4, !tbaa !19
  %93 = load ptr, ptr %13, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %93, i32 0, i32 22
  %95 = load i32, ptr %94, align 4, !tbaa !20
  %96 = load ptr, ptr %13, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %96, i32 0, i32 1
  %98 = load i32, ptr %97, align 4, !tbaa !19
  %99 = load i32, ptr %16, align 4, !tbaa !9
  %100 = zext i32 %99 to i64
  %101 = load ptr, ptr %14, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %101, i32 0, i32 3
  %103 = load i32, ptr %102, align 4, !tbaa !24
  %104 = zext i32 %103 to i64
  %105 = mul nsw i64 %100, %104
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %89, i32 noundef 4096, i32 noundef %92, i32 noundef %95, i32 noundef %98, i64 noundef %105)
  br label %106

106:                                              ; preds = %70
  %107 = load i32, ptr %22, align 4, !tbaa !9
  %108 = add i32 %107, 1
  store i32 %108, ptr %22, align 4, !tbaa !9
  br label %66, !llvm.loop !25

109:                                              ; preds = %66
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %110

110:                                              ; preds = %213, %109
  %111 = load i32, ptr %21, align 4, !tbaa !9
  %112 = load i32, ptr %19, align 4, !tbaa !9
  %113 = icmp ult i32 %111, %112
  br i1 %113, label %114, label %216

114:                                              ; preds = %110
  %115 = load ptr, ptr %11, align 8, !tbaa !5
  %116 = load ptr, ptr %13, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %116, i32 0, i32 3
  %118 = load i32, ptr %117, align 4, !tbaa !27
  %119 = load ptr, ptr %13, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %119, i32 0, i32 23
  %121 = load i32, ptr %120, align 4, !tbaa !28
  %122 = load i32, ptr %19, align 4, !tbaa !9
  %123 = load i32, ptr %20, align 4, !tbaa !9
  %124 = mul i32 %122, %123
  %125 = load i32, ptr %20, align 4, !tbaa !9
  %126 = add i32 %124, %125
  %127 = load ptr, ptr %14, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %127, i32 0, i32 5
  %129 = load i32, ptr %128, align 4, !tbaa !21
  %130 = load i32, ptr %23, align 4, !tbaa !9
  %131 = load i32, ptr %24, align 4, !tbaa !9
  %132 = trunc i32 %131 to i8
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %115, i32 noundef %118, i32 noundef %121, i32 noundef %126, i32 noundef %129, i32 noundef %130, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %132)
  %133 = load ptr, ptr %11, align 8, !tbaa !5
  %134 = load ptr, ptr %13, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %134, i32 0, i32 3
  %136 = load i32, ptr %135, align 4, !tbaa !27
  %137 = load ptr, ptr %13, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %137, i32 0, i32 23
  %139 = load i32, ptr %138, align 4, !tbaa !28
  %140 = load ptr, ptr %13, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %140, i32 0, i32 3
  %142 = load i32, ptr %141, align 4, !tbaa !27
  %143 = load ptr, ptr %15, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %143, i32 0, i32 4
  %145 = load i32, ptr %144, align 1, !tbaa !29
  %146 = zext i32 %145 to i64
  %147 = load i32, ptr %16, align 4, !tbaa !9
  %148 = zext i32 %147 to i64
  %149 = mul nsw i64 %146, %148
  %150 = load ptr, ptr %14, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %150, i32 0, i32 3
  %152 = load i32, ptr %151, align 4, !tbaa !24
  %153 = zext i32 %152 to i64
  %154 = mul nsw i64 %149, %153
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %133, i32 noundef 4096, i32 noundef %136, i32 noundef %139, i32 noundef %142, i64 noundef %154)
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %155

155:                                              ; preds = %209, %114
  %156 = load i32, ptr %22, align 4, !tbaa !9
  %157 = load i32, ptr %20, align 4, !tbaa !9
  %158 = icmp ult i32 %156, %157
  br i1 %158, label %159, label %212

159:                                              ; preds = %155
  %160 = load i32, ptr %24, align 4, !tbaa !9
  %161 = icmp ne i32 %160, 0
  br i1 %161, label %162, label %185

162:                                              ; preds = %159
  %163 = load ptr, ptr %11, align 8, !tbaa !5
  %164 = load i32, ptr %19, align 4, !tbaa !9
  %165 = load i32, ptr %20, align 4, !tbaa !9
  %166 = mul i32 %164, %165
  %167 = load i32, ptr %22, align 4, !tbaa !9
  %168 = add i32 %166, %167
  %169 = load i32, ptr %19, align 4, !tbaa !9
  %170 = load i32, ptr %20, align 4, !tbaa !9
  %171 = mul i32 %169, %170
  %172 = load i32, ptr %20, align 4, !tbaa !9
  %173 = add i32 %171, %172
  %174 = load i32, ptr %21, align 4, !tbaa !9
  %175 = load i32, ptr %20, align 4, !tbaa !9
  %176 = mul i32 %174, %175
  %177 = load i32, ptr %22, align 4, !tbaa !9
  %178 = add i32 %176, %177
  %179 = load ptr, ptr %14, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %179, i32 0, i32 3
  %181 = load i32, ptr %180, align 4, !tbaa !24
  %182 = icmp eq i32 %181, 4
  %183 = zext i1 %182 to i64
  %184 = select i1 %182, i32 2, i32 3
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %163, i32 noundef 1696596099, i32 noundef %168, i32 noundef %173, i8 noundef zeroext -1, i32 noundef %178, i32 noundef 0, i32 noundef %184)
  br label %208

185:                                              ; preds = %159
  %186 = load ptr, ptr %11, align 8, !tbaa !5
  %187 = load i32, ptr %19, align 4, !tbaa !9
  %188 = load i32, ptr %20, align 4, !tbaa !9
  %189 = mul i32 %187, %188
  %190 = load i32, ptr %22, align 4, !tbaa !9
  %191 = add i32 %189, %190
  %192 = load i32, ptr %19, align 4, !tbaa !9
  %193 = load i32, ptr %20, align 4, !tbaa !9
  %194 = mul i32 %192, %193
  %195 = load i32, ptr %20, align 4, !tbaa !9
  %196 = add i32 %194, %195
  %197 = load i32, ptr %21, align 4, !tbaa !9
  %198 = load i32, ptr %20, align 4, !tbaa !9
  %199 = mul i32 %197, %198
  %200 = load i32, ptr %22, align 4, !tbaa !9
  %201 = add i32 %199, %200
  %202 = load ptr, ptr %14, align 8, !tbaa !5
  %203 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %202, i32 0, i32 3
  %204 = load i32, ptr %203, align 4, !tbaa !24
  %205 = icmp eq i32 %204, 4
  %206 = zext i1 %205 to i64
  %207 = select i1 %205, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %186, i32 noundef 237030411, i32 noundef %191, i32 noundef %196, i8 noundef zeroext 0, i32 noundef %201, i32 noundef %207)
  br label %208

208:                                              ; preds = %185, %162
  br label %209

209:                                              ; preds = %208
  %210 = load i32, ptr %22, align 4, !tbaa !9
  %211 = add i32 %210, 1
  store i32 %211, ptr %22, align 4, !tbaa !9
  br label %155, !llvm.loop !30

212:                                              ; preds = %155
  br label %213

213:                                              ; preds = %212
  %214 = load i32, ptr %21, align 4, !tbaa !9
  %215 = add i32 %214, 1
  store i32 %215, ptr %21, align 4, !tbaa !9
  br label %110, !llvm.loop !31

216:                                              ; preds = %110
  %217 = load ptr, ptr %11, align 8, !tbaa !5
  %218 = load ptr, ptr %13, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %218, i32 0, i32 1
  %220 = load i32, ptr %219, align 4, !tbaa !19
  %221 = load ptr, ptr %13, align 8, !tbaa !5
  %222 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %221, i32 0, i32 22
  %223 = load i32, ptr %222, align 4, !tbaa !20
  %224 = load ptr, ptr %13, align 8, !tbaa !5
  %225 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %224, i32 0, i32 1
  %226 = load i32, ptr %225, align 4, !tbaa !19
  %227 = load ptr, ptr %15, align 8, !tbaa !5
  %228 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %227, i32 0, i32 3
  %229 = load i32, ptr %228, align 1, !tbaa !32
  %230 = load i32, ptr %20, align 4, !tbaa !9
  %231 = sub i32 %229, %230
  %232 = zext i32 %231 to i64
  %233 = load i32, ptr %16, align 4, !tbaa !9
  %234 = zext i32 %233 to i64
  %235 = mul nsw i64 %232, %234
  %236 = load ptr, ptr %14, align 8, !tbaa !5
  %237 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %236, i32 0, i32 3
  %238 = load i32, ptr %237, align 4, !tbaa !24
  %239 = zext i32 %238 to i64
  %240 = mul nsw i64 %235, %239
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %217, i32 noundef 4096, i32 noundef %220, i32 noundef %223, i32 noundef %226, i64 noundef %240)
  %241 = load ptr, ptr %11, align 8, !tbaa !5
  %242 = load ptr, ptr %13, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %242, i32 0, i32 3
  %244 = load i32, ptr %243, align 4, !tbaa !27
  %245 = load ptr, ptr %13, align 8, !tbaa !5
  %246 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %245, i32 0, i32 23
  %247 = load i32, ptr %246, align 4, !tbaa !28
  %248 = load ptr, ptr %13, align 8, !tbaa !5
  %249 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %248, i32 0, i32 3
  %250 = load i32, ptr %249, align 4, !tbaa !27
  %251 = load i32, ptr %19, align 4, !tbaa !9
  %252 = zext i32 %251 to i64
  %253 = load ptr, ptr %15, align 8, !tbaa !5
  %254 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %253, i32 0, i32 4
  %255 = load i32, ptr %254, align 1, !tbaa !29
  %256 = zext i32 %255 to i64
  %257 = mul nsw i64 %252, %256
  %258 = load i32, ptr %16, align 4, !tbaa !9
  %259 = zext i32 %258 to i64
  %260 = mul nsw i64 %257, %259
  %261 = load ptr, ptr %14, align 8, !tbaa !5
  %262 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %261, i32 0, i32 3
  %263 = load i32, ptr %262, align 4, !tbaa !24
  %264 = zext i32 %263 to i64
  %265 = mul nsw i64 %260, %264
  %266 = load i32, ptr %16, align 4, !tbaa !9
  %267 = zext i32 %266 to i64
  %268 = load ptr, ptr %14, align 8, !tbaa !5
  %269 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %268, i32 0, i32 3
  %270 = load i32, ptr %269, align 4, !tbaa !24
  %271 = zext i32 %270 to i64
  %272 = mul nsw i64 %267, %271
  %273 = sub nsw i64 %265, %272
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %241, i32 noundef 4097, i32 noundef %244, i32 noundef %247, i32 noundef %250, i64 noundef %273)
  %274 = load ptr, ptr %11, align 8, !tbaa !5
  %275 = load ptr, ptr %12, align 8, !tbaa !5
  %276 = load ptr, ptr %13, align 8, !tbaa !5
  %277 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %276, i32 0, i32 12
  %278 = load i32, ptr %277, align 4, !tbaa !13
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %274, ptr noundef %275, i32 noundef %278, i32 noundef 1)
  %279 = load ptr, ptr %11, align 8, !tbaa !5
  %280 = load ptr, ptr %13, align 8, !tbaa !5
  %281 = load ptr, ptr %14, align 8, !tbaa !5
  %282 = load ptr, ptr %15, align 8, !tbaa !5
  %283 = load i32, ptr %19, align 4, !tbaa !9
  %284 = load i32, ptr %20, align 4, !tbaa !9
  %285 = load i32, ptr %23, align 4, !tbaa !9
  %286 = load i32, ptr %16, align 4, !tbaa !9
  call void @libxsmm_generator_packed_gemm_aarch64_store_C(ptr noundef %279, ptr noundef %280, ptr noundef %281, ptr noundef %282, i32 noundef %283, i32 noundef %284, i32 noundef %285, i32 noundef %286)
  %287 = load ptr, ptr %11, align 8, !tbaa !5
  %288 = load ptr, ptr %13, align 8, !tbaa !5
  %289 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %288, i32 0, i32 1
  %290 = load i32, ptr %289, align 4, !tbaa !19
  %291 = load ptr, ptr %13, align 8, !tbaa !5
  %292 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %291, i32 0, i32 22
  %293 = load i32, ptr %292, align 4, !tbaa !20
  %294 = load ptr, ptr %13, align 8, !tbaa !5
  %295 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %294, i32 0, i32 1
  %296 = load i32, ptr %295, align 4, !tbaa !19
  %297 = load ptr, ptr %15, align 8, !tbaa !5
  %298 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %297, i32 0, i32 2
  %299 = load i32, ptr %298, align 1, !tbaa !15
  %300 = zext i32 %299 to i64
  %301 = load ptr, ptr %15, align 8, !tbaa !5
  %302 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %301, i32 0, i32 3
  %303 = load i32, ptr %302, align 1, !tbaa !32
  %304 = zext i32 %303 to i64
  %305 = mul nsw i64 %300, %304
  %306 = load i32, ptr %16, align 4, !tbaa !9
  %307 = zext i32 %306 to i64
  %308 = mul nsw i64 %305, %307
  %309 = load ptr, ptr %14, align 8, !tbaa !5
  %310 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %309, i32 0, i32 3
  %311 = load i32, ptr %310, align 4, !tbaa !24
  %312 = zext i32 %311 to i64
  %313 = mul nsw i64 %308, %312
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %287, i32 noundef 4097, i32 noundef %290, i32 noundef %293, i32 noundef %296, i64 noundef %313)
  %314 = load ptr, ptr %11, align 8, !tbaa !5
  %315 = load ptr, ptr %13, align 8, !tbaa !5
  %316 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %315, i32 0, i32 3
  %317 = load i32, ptr %316, align 4, !tbaa !27
  %318 = load ptr, ptr %13, align 8, !tbaa !5
  %319 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %318, i32 0, i32 23
  %320 = load i32, ptr %319, align 4, !tbaa !28
  %321 = load ptr, ptr %13, align 8, !tbaa !5
  %322 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %321, i32 0, i32 3
  %323 = load i32, ptr %322, align 4, !tbaa !27
  %324 = load ptr, ptr %15, align 8, !tbaa !5
  %325 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %324, i32 0, i32 2
  %326 = load i32, ptr %325, align 1, !tbaa !15
  %327 = zext i32 %326 to i64
  %328 = load i32, ptr %16, align 4, !tbaa !9
  %329 = zext i32 %328 to i64
  %330 = mul nsw i64 %327, %329
  %331 = load ptr, ptr %14, align 8, !tbaa !5
  %332 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %331, i32 0, i32 3
  %333 = load i32, ptr %332, align 4, !tbaa !24
  %334 = zext i32 %333 to i64
  %335 = mul nsw i64 %330, %334
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %314, i32 noundef 4097, i32 noundef %317, i32 noundef %320, i32 noundef %323, i64 noundef %335)
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_packed_gemm_aarch64_store_C(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!14, !10, i64 48}
!14 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!15 = !{!16, !10, i64 8}
!16 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !17, i64 33, !17, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !18, i64 62, !18, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !18, i64 70, !18, i64 72, !18, i64 74, !18, i64 76, !18, i64 78, !18, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!17 = !{!"long long", !7, i64 0}
!18 = !{!"short", !7, i64 0}
!19 = !{!14, !10, i64 4}
!20 = !{!14, !10, i64 88}
!21 = !{!22, !10, i64 20}
!22 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !23, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!23 = !{!"libxsmm_tile_config", !7, i64 0, !18, i64 2, !7, i64 4, !18, i64 6, !7, i64 8, !18, i64 10, !7, i64 12, !18, i64 14, !7, i64 16, !18, i64 18, !7, i64 20, !18, i64 22, !7, i64 24, !18, i64 26, !7, i64 28, !18, i64 30, !7, i64 32}
!24 = !{!22, !10, i64 12}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!14, !10, i64 12}
!28 = !{!14, !10, i64 92}
!29 = !{!16, !10, i64 16}
!30 = distinct !{!30, !26}
!31 = distinct !{!31, !26}
!32 = !{!16, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_gemm_aarch64_kloop_simd_packed(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) local_unnamed_addr #1 {
  %11 = getelementptr inbounds i8, ptr %0, i64 28
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.fr143 = freeze i32 %12
  %13 = add i32 %.fr143, -2201
  %spec.select = icmp ult i32 %13, 799
  %14 = icmp ugt i32 %6, %7
  %15 = select i1 %spec.select, i32 1, i32 %7
  %.0124 = select i1 %14, i32 %15, i32 0
  tail call void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef %0, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %8, i32 noundef %9, i32 noundef %.0124, i32 noundef %5)
  %16 = getelementptr inbounds i8, ptr %2, i64 48
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = getelementptr inbounds i8, ptr %4, i64 8
  %19 = load i32, ptr %18, align 1, !tbaa !13
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %17, i32 noundef %19) #2
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %.preheader.thread, label %.lr.ph

.lr.ph:                                           ; preds = %10
  %20 = getelementptr inbounds i8, ptr %2, i64 4
  %21 = getelementptr inbounds i8, ptr %2, i64 88
  %22 = mul i32 %9, %8
  %23 = getelementptr inbounds i8, ptr %3, i64 20
  %24 = zext i1 %spec.select to i8
  %25 = zext i32 %5 to i64
  %26 = getelementptr inbounds i8, ptr %3, i64 12
  br label %85

.preheader:                                       ; preds = %85
  %.not141 = icmp eq i32 %8, 0
  br i1 %.not141, label %.preheader.._crit_edge137_crit_edge, label %.lr.ph136.split.us

.preheader.thread:                                ; preds = %10
  %.not141151 = icmp eq i32 %8, 0
  br i1 %.not141151, label %.preheader.._crit_edge137_crit_edge, label %.lr.ph136.split.preheader

.preheader.._crit_edge137_crit_edge:              ; preds = %.preheader.thread, %.preheader
  %.pre = zext i32 %5 to i64
  br label %._crit_edge137

.lr.ph136.split.preheader:                        ; preds = %.preheader.thread
  %27 = getelementptr inbounds i8, ptr %2, i64 12
  %28 = getelementptr inbounds i8, ptr %2, i64 92
  %29 = add i32 %8, 1
  %30 = mul nuw nsw i32 %29, %9
  %31 = getelementptr inbounds i8, ptr %3, i64 20
  %32 = zext i1 %spec.select to i8
  %33 = getelementptr inbounds i8, ptr %4, i64 16
  %34 = zext i32 %5 to i64
  %35 = getelementptr inbounds i8, ptr %3, i64 12
  br label %.lr.ph136.split

.lr.ph136.split.us:                               ; preds = %.preheader
  %36 = getelementptr inbounds i8, ptr %2, i64 12
  %37 = getelementptr inbounds i8, ptr %2, i64 92
  %38 = mul i32 %9, %8
  %39 = add i32 %38, %9
  %40 = getelementptr inbounds i8, ptr %3, i64 20
  %41 = zext i1 %spec.select to i8
  %42 = getelementptr inbounds i8, ptr %4, i64 16
  %43 = zext i32 %5 to i64
  %44 = getelementptr inbounds i8, ptr %3, i64 12
  br i1 %spec.select, label %.lr.ph134.us.us, label %.lr.ph134.us

.lr.ph134.us.us:                                  ; preds = %.lr.ph136.split.us, %._crit_edge.split.us.us.us
  %.0135.us.us = phi i32 [ %64, %._crit_edge.split.us.us.us ], [ 0, %.lr.ph136.split.us ]
  %45 = load i32, ptr %36, align 4, !tbaa !17
  %46 = load i32, ptr %37, align 4, !tbaa !18
  %47 = load i32, ptr %40, align 4, !tbaa !19
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %45, i32 noundef %46, i32 noundef %39, i32 noundef %47, i32 noundef %.0124, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %41) #2
  %48 = load i32, ptr %36, align 4, !tbaa !17
  %49 = load i32, ptr %37, align 4, !tbaa !18
  %50 = load i32, ptr %42, align 1, !tbaa !22
  %51 = zext i32 %50 to i64
  %52 = mul nuw nsw i64 %51, %43
  %53 = load i32, ptr %44, align 4, !tbaa !23
  %54 = zext i32 %53 to i64
  %55 = mul nuw nsw i64 %52, %54
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %48, i32 noundef %49, i32 noundef %48, i64 noundef %55) #2
  %56 = mul i32 %.0135.us.us, %9
  br label %57

57:                                               ; preds = %57, %.lr.ph134.us.us
  %.1133.us.us.us = phi i32 [ 0, %.lr.ph134.us.us ], [ %63, %57 ]
  %58 = add i32 %.1133.us.us.us, %38
  %59 = add i32 %.1133.us.us.us, %56
  %60 = load i32, ptr %44, align 4, !tbaa !23
  %61 = icmp eq i32 %60, 4
  %62 = select i1 %61, i32 2, i32 3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1696596099, i32 noundef %58, i32 noundef %39, i8 noundef zeroext -1, i32 noundef %59, i32 noundef 0, i32 noundef %62) #2
  %63 = add nuw i32 %.1133.us.us.us, 1
  %exitcond148.not = icmp eq i32 %63, %9
  br i1 %exitcond148.not, label %._crit_edge.split.us.us.us, label %57, !llvm.loop !24

._crit_edge.split.us.us.us:                       ; preds = %57
  %64 = add nuw i32 %.0135.us.us, 1
  %exitcond149.not = icmp eq i32 %64, %8
  br i1 %exitcond149.not, label %._crit_edge137, label %.lr.ph134.us.us, !llvm.loop !26

.lr.ph134.us:                                     ; preds = %.lr.ph136.split.us, %._crit_edge.split.us139
  %.0135.us = phi i32 [ %84, %._crit_edge.split.us139 ], [ 0, %.lr.ph136.split.us ]
  %65 = load i32, ptr %36, align 4, !tbaa !17
  %66 = load i32, ptr %37, align 4, !tbaa !18
  %67 = load i32, ptr %40, align 4, !tbaa !19
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %65, i32 noundef %66, i32 noundef %39, i32 noundef %67, i32 noundef %.0124, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %41) #2
  %68 = load i32, ptr %36, align 4, !tbaa !17
  %69 = load i32, ptr %37, align 4, !tbaa !18
  %70 = load i32, ptr %42, align 1, !tbaa !22
  %71 = zext i32 %70 to i64
  %72 = mul nuw nsw i64 %71, %43
  %73 = load i32, ptr %44, align 4, !tbaa !23
  %74 = zext i32 %73 to i64
  %75 = mul nuw nsw i64 %72, %74
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %68, i32 noundef %69, i32 noundef %68, i64 noundef %75) #2
  %76 = mul i32 %.0135.us, %9
  br label %77

77:                                               ; preds = %.lr.ph134.us, %77
  %.1133.us138 = phi i32 [ 0, %.lr.ph134.us ], [ %83, %77 ]
  %78 = add i32 %.1133.us138, %38
  %79 = add i32 %.1133.us138, %76
  %80 = load i32, ptr %44, align 4, !tbaa !23
  %81 = icmp eq i32 %80, 4
  %82 = select i1 %81, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237030411, i32 noundef %78, i32 noundef %39, i8 noundef zeroext 0, i32 noundef %79, i32 noundef %82) #2
  %83 = add nuw i32 %.1133.us138, 1
  %exitcond146.not = icmp eq i32 %83, %9
  br i1 %exitcond146.not, label %._crit_edge.split.us139, label %77, !llvm.loop !24

._crit_edge.split.us139:                          ; preds = %77
  %84 = add nuw i32 %.0135.us, 1
  %exitcond147.not = icmp eq i32 %84, %8
  br i1 %exitcond147.not, label %._crit_edge137, label %.lr.ph134.us, !llvm.loop !26

85:                                               ; preds = %.lr.ph, %85
  %.0125132 = phi i32 [ 0, %.lr.ph ], [ %95, %85 ]
  %86 = load i32, ptr %20, align 4, !tbaa !27
  %87 = load i32, ptr %21, align 4, !tbaa !28
  %88 = add i32 %.0125132, %22
  %89 = load i32, ptr %23, align 4, !tbaa !19
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %86, i32 noundef %87, i32 noundef %88, i32 noundef %89, i32 noundef %.0124, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %24) #2
  %90 = load i32, ptr %20, align 4, !tbaa !27
  %91 = load i32, ptr %21, align 4, !tbaa !28
  %92 = load i32, ptr %26, align 4, !tbaa !23
  %93 = zext i32 %92 to i64
  %94 = mul nuw nsw i64 %93, %25
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %90, i32 noundef %91, i32 noundef %90, i64 noundef %94) #2
  %95 = add nuw i32 %.0125132, 1
  %exitcond.not = icmp eq i32 %95, %9
  br i1 %exitcond.not, label %.preheader, label %85, !llvm.loop !29

.lr.ph136.split:                                  ; preds = %.lr.ph136.split.preheader, %.lr.ph136.split
  %.0135 = phi i32 [ %107, %.lr.ph136.split ], [ 0, %.lr.ph136.split.preheader ]
  %96 = load i32, ptr %27, align 4, !tbaa !17
  %97 = load i32, ptr %28, align 4, !tbaa !18
  %98 = load i32, ptr %31, align 4, !tbaa !19
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %96, i32 noundef %97, i32 noundef %30, i32 noundef %98, i32 noundef %.0124, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %32) #2
  %99 = load i32, ptr %27, align 4, !tbaa !17
  %100 = load i32, ptr %28, align 4, !tbaa !18
  %101 = load i32, ptr %33, align 1, !tbaa !22
  %102 = zext i32 %101 to i64
  %103 = mul nuw nsw i64 %102, %34
  %104 = load i32, ptr %35, align 4, !tbaa !23
  %105 = zext i32 %104 to i64
  %106 = mul nuw nsw i64 %103, %105
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %99, i32 noundef %100, i32 noundef %99, i64 noundef %106) #2
  %107 = add nuw i32 %.0135, 1
  %exitcond150.not = icmp eq i32 %107, %8
  br i1 %exitcond150.not, label %._crit_edge137, label %.lr.ph136.split, !llvm.loop !26

._crit_edge137:                                   ; preds = %._crit_edge.split.us139, %._crit_edge.split.us.us.us, %.lr.ph136.split, %.preheader.._crit_edge137_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.preheader.._crit_edge137_crit_edge ], [ %34, %.lr.ph136.split ], [ %43, %._crit_edge.split.us.us.us ], [ %43, %._crit_edge.split.us139 ]
  %108 = getelementptr inbounds i8, ptr %2, i64 4
  %109 = load i32, ptr %108, align 4, !tbaa !27
  %110 = getelementptr inbounds i8, ptr %2, i64 88
  %111 = load i32, ptr %110, align 4, !tbaa !28
  %112 = getelementptr inbounds i8, ptr %4, i64 12
  %113 = load i32, ptr %112, align 1, !tbaa !30
  %114 = sub i32 %113, %9
  %115 = zext i32 %114 to i64
  %116 = mul nuw nsw i64 %.pre-phi, %115
  %117 = getelementptr inbounds i8, ptr %3, i64 12
  %118 = load i32, ptr %117, align 4, !tbaa !23
  %119 = zext i32 %118 to i64
  %120 = mul nuw nsw i64 %116, %119
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %109, i32 noundef %111, i32 noundef %109, i64 noundef %120) #2
  %121 = getelementptr inbounds i8, ptr %2, i64 12
  %122 = load i32, ptr %121, align 4, !tbaa !17
  %123 = getelementptr inbounds i8, ptr %2, i64 92
  %124 = load i32, ptr %123, align 4, !tbaa !18
  %125 = zext i32 %8 to i64
  %126 = getelementptr inbounds i8, ptr %4, i64 16
  %127 = load i32, ptr %126, align 1, !tbaa !22
  %128 = zext i32 %127 to i64
  %129 = mul nuw nsw i64 %128, %125
  %130 = load i32, ptr %117, align 4, !tbaa !23
  %131 = zext i32 %130 to i64
  %132 = add nsw i64 %129, -1
  %133 = mul nuw i64 %.pre-phi, %131
  %134 = mul i64 %133, %132
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %122, i32 noundef %124, i32 noundef %122, i64 noundef %134) #2
  %135 = load i32, ptr %16, align 4, !tbaa !11
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %135, i32 noundef 1) #2
  tail call void @libxsmm_generator_packed_gemm_aarch64_store_C(ptr noundef %0, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %8, i32 noundef %9, i32 noundef %.0124, i32 noundef %5)
  %136 = load i32, ptr %108, align 4, !tbaa !27
  %137 = load i32, ptr %110, align 4, !tbaa !28
  %138 = load i32, ptr %18, align 1, !tbaa !13
  %139 = zext i32 %138 to i64
  %140 = load i32, ptr %112, align 1, !tbaa !30
  %141 = zext i32 %140 to i64
  %142 = load i32, ptr %117, align 4, !tbaa !23
  %143 = zext i32 %142 to i64
  %144 = mul nuw i64 %.pre-phi, %139
  %145 = mul i64 %144, %141
  %146 = mul nuw nsw i64 %145, %143
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %136, i32 noundef %137, i32 noundef %136, i64 noundef %146) #2
  %147 = load i32, ptr %121, align 4, !tbaa !17
  %148 = load i32, ptr %123, align 4, !tbaa !18
  %149 = load i32, ptr %18, align 1, !tbaa !13
  %150 = zext i32 %149 to i64
  %151 = mul nuw nsw i64 %.pre-phi, %150
  %152 = load i32, ptr %117, align 4, !tbaa !23
  %153 = zext i32 %152 to i64
  %154 = mul nuw nsw i64 %151, %153
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %147, i32 noundef %148, i32 noundef %147, i64 noundef %154) #2
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_packed_gemm_aarch64_store_C(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!14, !10, i64 8}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !15, i64 33, !15, i64 41, !8, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !8, i64 94}
!15 = !{!"long long", !8, i64 0}
!16 = !{!"short", !8, i64 0}
!17 = !{!12, !10, i64 12}
!18 = !{!12, !10, i64 92}
!19 = !{!20, !10, i64 20}
!20 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !8, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !10, i64 460, !8, i64 464, !21, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !7, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !7, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!21 = !{!"libxsmm_tile_config", !8, i64 0, !16, i64 2, !8, i64 4, !16, i64 6, !8, i64 8, !16, i64 10, !8, i64 12, !16, i64 14, !8, i64 16, !16, i64 18, !8, i64 20, !16, i64 22, !8, i64 24, !16, i64 26, !8, i64 28, !16, i64 30, !8, i64 32}
!22 = !{!14, !10, i64 16}
!23 = !{!20, !10, i64 12}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = distinct !{!26, !25}
!27 = !{!12, !10, i64 4}
!28 = !{!12, !10, i64 88}
!29 = distinct !{!29, !25}
!30 = !{!14, !10, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass