; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution16b" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", %"struct.Simd::Array.0", %"struct.Simd::Array.1", %"struct.Simd::Array.1", i8, i8, i8, i64, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"class.Simd::Base::SynetConvolution16bGemm" = type { %"class.Simd::SynetConvolution16b", i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK4Simd4Base23SynetConvolution16bGemm18ExternalBufferSizeEv(ptr noundef nonnull align 8 dereferenceable(432) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  store i64 0, ptr %3, align 8, !tbaa !9
  %5 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %4, i32 0, i32 7
  %6 = load i8, ptr %5, align 8, !tbaa !11, !range !27, !noundef !28
  %7 = trunc i8 %6 to i1
  br i1 %7, label %14, label %8

8:                                                ; preds = %1
  %9 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bGemm", ptr %4, i32 0, i32 11
  %10 = load i64, ptr %9, align 8, !tbaa !29
  %11 = mul i64 %10, 2
  %12 = load i64, ptr %3, align 8, !tbaa !9
  %13 = add i64 %12, %11
  store i64 %13, ptr %3, align 8, !tbaa !9
  br label %14

14:                                               ; preds = %8, %1
  %15 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %4, i32 0, i32 9
  %16 = load i8, ptr %15, align 2, !tbaa !31, !range !27, !noundef !28
  %17 = trunc i8 %16 to i1
  br i1 %17, label %24, label %18

18:                                               ; preds = %14
  %19 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bGemm", ptr %4, i32 0, i32 12
  %20 = load i64, ptr %19, align 8, !tbaa !32
  %21 = mul i64 %20, 2
  %22 = load i64, ptr %3, align 8, !tbaa !9
  %23 = add i64 %22, %21
  store i64 %23, ptr %3, align 8, !tbaa !9
  br label %24

24:                                               ; preds = %18, %14
  %25 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %4, i32 0, i32 8
  %26 = load i8, ptr %25, align 1, !tbaa !33, !range !27, !noundef !28
  %27 = trunc i8 %26 to i1
  br i1 %27, label %28, label %34

28:                                               ; preds = %24
  %29 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bGemm", ptr %4, i32 0, i32 13
  %30 = load i64, ptr %29, align 8, !tbaa !34
  %31 = mul i64 %30, 4
  %32 = load i64, ptr %3, align 8, !tbaa !9
  %33 = add i64 %32, %31
  store i64 %33, ptr %3, align 8, !tbaa !9
  br label %34

34:                                               ; preds = %28, %24
  %35 = load i64, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret i64 %35
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !26, i64 288}
!12 = !{!"_ZTSN4Simd19SynetConvolution16bE", !13, i64 0, !14, i64 8, !21, i64 192, !22, i64 208, !24, i64 240, !25, i64 256, !25, i64 272, !26, i64 288, !26, i64 289, !26, i64 290, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320}
!13 = !{!"_ZTSN4Simd9DeletableE"}
!14 = !{!"_ZTSN4Simd9ConvParamE", !15, i64 0, !19, i64 160, !10, i64 168, !20, i64 176}
!15 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !16, i64 24, !17, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !16, i64 56, !17, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !18, i64 152}
!16 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!17 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!18 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !10, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !10, i64 8}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!26 = !{!"bool", !7, i64 0}
!27 = !{i8 0, i8 2}
!28 = !{}
!29 = !{!30, !10, i64 408}
!30 = !{!"_ZTSN4Simd4Base23SynetConvolution16bGemmE", !12, i64 0, !10, i64 328, !10, i64 336, !10, i64 344, !10, i64 352, !10, i64 360, !10, i64 368, !10, i64 376, !10, i64 384, !10, i64 392, !10, i64 400, !10, i64 408, !10, i64 416, !10, i64 424}
!31 = !{!12, !26, i64 290}
!32 = !{!30, !10, i64 416}
!33 = !{!12, !26, i64 289}
!34 = !{!30, !10, i64 424}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef i64 @_ZNK4Simd4Base23SynetConvolution16bGemm18ExternalBufferSizeEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(432) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 288
  %3 = load i8, ptr %2, align 8, !tbaa !5, !range !25, !noundef !26
  %4 = trunc nuw i8 %3 to i1
  %5 = getelementptr inbounds i8, ptr %0, i64 408
  %6 = load i64, ptr %5, align 8
  %7 = shl i64 %6, 1
  %.0 = select i1 %4, i64 0, i64 %7
  %8 = getelementptr inbounds i8, ptr %0, i64 290
  %9 = load i8, ptr %8, align 2, !tbaa !27, !range !25, !noundef !26
  %10 = trunc nuw i8 %9 to i1
  %11 = getelementptr inbounds i8, ptr %0, i64 416
  %12 = load i64, ptr %11, align 8
  %13 = shl i64 %12, 1
  %14 = select i1 %10, i64 0, i64 %13
  %.1 = add i64 %14, %.0
  %15 = getelementptr inbounds i8, ptr %0, i64 289
  %16 = load i8, ptr %15, align 1, !tbaa !28, !range !25, !noundef !26
  %17 = trunc nuw i8 %16 to i1
  %18 = getelementptr inbounds i8, ptr %0, i64 424
  %19 = load i64, ptr %18, align 8
  %20 = shl i64 %19, 2
  %21 = select i1 %17, i64 %20, i64 0
  %.2 = add i64 %.1, %21
  ret i64 %.2
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !24, i64 288}
!6 = !{!"_ZTSN4Simd19SynetConvolution16bE", !7, i64 0, !8, i64 8, !18, i64 192, !20, i64 208, !22, i64 240, !23, i64 256, !23, i64 272, !24, i64 288, !24, i64 289, !24, i64 290, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320}
!7 = !{!"_ZTSN4Simd9DeletableE"}
!8 = !{!"_ZTSN4Simd9ConvParamE", !9, i64 0, !16, i64 160, !10, i64 168, !17, i64 176}
!9 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !13, i64 24, !14, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !13, i64 56, !14, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !15, i64 152}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS18SimdTensorDataType", !11, i64 0}
!14 = !{!"_ZTS20SimdTensorFormatType", !11, i64 0}
!15 = !{!"_ZTS29SimdConvolutionActivationType", !11, i64 0}
!16 = !{!"_ZTS8SimdBool", !11, i64 0}
!17 = !{!"_ZTS26SimdSynetCompatibilityType", !11, i64 0}
!18 = !{!"_ZTSN4Simd5ArrayIhEE", !19, i64 0, !10, i64 8}
!19 = !{!"any pointer", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !10, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !19, i64 0}
!22 = !{!"_ZTSN4Simd5ArrayItEE", !19, i64 0, !10, i64 8}
!23 = !{!"_ZTSN4Simd5ArrayIfEE", !19, i64 0, !10, i64 8}
!24 = !{!"bool", !11, i64 0}
!25 = !{i8 0, i8 2}
!26 = !{}
!27 = !{!6, !24, i64 290}
!28 = !{!6, !24, i64 289}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass