; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_maskedstore_16bit_avx2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2 {
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !9
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store i32 %4, ptr %13, align 4, !tbaa !9
  store i32 %5, ptr %14, align 4, !tbaa !9
  store i32 %6, ptr %15, align 4, !tbaa !9
  store i32 %7, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %19 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %19, ptr %18, align 4, !tbaa !9
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %20, i32 noundef 30008, i32 noundef 4, i64 noundef 32)
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  %22 = load ptr, ptr %9, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %22, i32 0, i32 6
  %24 = load i32, ptr %23, align 4, !tbaa !11
  %25 = load i32, ptr %11, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %21, i32 noundef %24, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %25, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  %26 = load i32, ptr %18, align 4, !tbaa !9
  %27 = icmp uge i32 %26, 8
  br i1 %27, label %28, label %44

28:                                               ; preds = %8
  %29 = load ptr, ptr %9, align 8, !tbaa !5
  %30 = load ptr, ptr %9, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %30, i32 0, i32 6
  %32 = load i32, ptr %31, align 4, !tbaa !11
  %33 = load i32, ptr %12, align 4, !tbaa !9
  %34 = load i32, ptr %13, align 4, !tbaa !9
  %35 = load i32, ptr %14, align 4, !tbaa !9
  %36 = load i32, ptr %15, align 4, !tbaa !9
  %37 = load i32, ptr %17, align 4, !tbaa !9
  %38 = add nsw i32 %36, %37
  %39 = load i32, ptr %11, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %29, i32 noundef %32, i32 noundef 537138704, i32 noundef %33, i32 noundef %34, i32 noundef %35, i32 noundef %38, i8 noundef signext 120, i32 noundef %39, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  %40 = load i32, ptr %17, align 4, !tbaa !9
  %41 = add nsw i32 %40, 16
  store i32 %41, ptr %17, align 4, !tbaa !9
  %42 = load i32, ptr %18, align 4, !tbaa !9
  %43 = sub i32 %42, 8
  store i32 %43, ptr %18, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %28, %8
  %45 = load i32, ptr %18, align 4, !tbaa !9
  %46 = icmp uge i32 %45, 4
  br i1 %46, label %47, label %63

47:                                               ; preds = %44
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  %49 = load i32, ptr %17, align 4, !tbaa !9
  %50 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %48, i32 noundef -1568407413, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %49, i32 noundef %50, i32 noundef 0)
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  %52 = load i32, ptr %12, align 4, !tbaa !9
  %53 = load i32, ptr %13, align 4, !tbaa !9
  %54 = load i32, ptr %14, align 4, !tbaa !9
  %55 = load i32, ptr %15, align 4, !tbaa !9
  %56 = load i32, ptr %17, align 4, !tbaa !9
  %57 = add nsw i32 %55, %56
  %58 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %51, i32 noundef -1568407413, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %57, i32 noundef %58, i32 noundef 1)
  %59 = load i32, ptr %17, align 4, !tbaa !9
  %60 = add nsw i32 %59, 8
  store i32 %60, ptr %17, align 4, !tbaa !9
  %61 = load i32, ptr %18, align 4, !tbaa !9
  %62 = sub i32 %61, 4
  store i32 %62, ptr %18, align 4, !tbaa !9
  br label %63

63:                                               ; preds = %47, %44
  %64 = load i32, ptr %18, align 4, !tbaa !9
  %65 = icmp uge i32 %64, 2
  br i1 %65, label %66, label %82

66:                                               ; preds = %63
  %67 = load ptr, ptr %9, align 8, !tbaa !5
  %68 = load i32, ptr %17, align 4, !tbaa !9
  %69 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %67, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %68, i32 noundef %69, i32 noundef 0)
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !9
  %72 = load i32, ptr %13, align 4, !tbaa !9
  %73 = load i32, ptr %14, align 4, !tbaa !9
  %74 = load i32, ptr %15, align 4, !tbaa !9
  %75 = load i32, ptr %17, align 4, !tbaa !9
  %76 = add nsw i32 %74, %75
  %77 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %70, i32 noundef -1610350453, i32 noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef %76, i32 noundef %77, i32 noundef 1)
  %78 = load i32, ptr %17, align 4, !tbaa !9
  %79 = add nsw i32 %78, 4
  store i32 %79, ptr %17, align 4, !tbaa !9
  %80 = load i32, ptr %18, align 4, !tbaa !9
  %81 = sub i32 %80, 2
  store i32 %81, ptr %18, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %66, %63
  %83 = load i32, ptr %18, align 4, !tbaa !9
  %84 = icmp eq i32 %83, 1
  br i1 %84, label %85, label %101

85:                                               ; preds = %82
  %86 = load ptr, ptr %9, align 8, !tbaa !5
  %87 = load i32, ptr %17, align 4, !tbaa !9
  %88 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %86, i32 noundef -1610334069, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %87, i32 noundef %88, i32 noundef 0)
  %89 = load ptr, ptr %9, align 8, !tbaa !5
  %90 = load i32, ptr %12, align 4, !tbaa !9
  %91 = load i32, ptr %13, align 4, !tbaa !9
  %92 = load i32, ptr %14, align 4, !tbaa !9
  %93 = load i32, ptr %15, align 4, !tbaa !9
  %94 = load i32, ptr %17, align 4, !tbaa !9
  %95 = add nsw i32 %93, %94
  %96 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %89, i32 noundef -1610334069, i32 noundef %90, i32 noundef %91, i32 noundef %92, i32 noundef %95, i32 noundef %96, i32 noundef 1)
  %97 = load i32, ptr %17, align 4, !tbaa !9
  %98 = add nsw i32 %97, 2
  store i32 %98, ptr %17, align 4, !tbaa !9
  %99 = load i32, ptr %18, align 4, !tbaa !9
  %100 = sub i32 %99, 1
  store i32 %100, ptr %18, align 4, !tbaa !9
  br label %101

101:                                              ; preds = %85, %82
  %102 = load ptr, ptr %9, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %102, i32 noundef 30000, i32 noundef 4, i64 noundef 32)
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  ret void
}

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_maskedstore_16bit_avx2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #1 {
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30008, i32 noundef 4, i64 noundef 32) #2
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %0, i32 noundef %10, i32 noundef 537138704, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i8 noundef signext 121, i32 noundef %2, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %11 = icmp ugt i32 %7, 7
  br i1 %11, label %12, label %15

12:                                               ; preds = %8
  %13 = load i32, ptr %9, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %13, i32 noundef 537138704, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i8 noundef signext 120, i32 noundef %2, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %14 = add i32 %7, -8
  br label %15

15:                                               ; preds = %12, %8
  %.055 = phi i32 [ 16, %12 ], [ 0, %8 ]
  %.0 = phi i32 [ %14, %12 ], [ %7, %8 ]
  %16 = icmp ugt i32 %.0, 3
  br i1 %16, label %17, label %21

17:                                               ; preds = %15
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.055, i32 noundef %1, i32 noundef 0) #2
  %18 = add nsw i32 %.055, %6
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %18, i32 noundef %1, i32 noundef 1) #2
  %19 = or disjoint i32 %.055, 8
  %20 = add i32 %.0, -4
  br label %21

21:                                               ; preds = %17, %15
  %.156 = phi i32 [ %19, %17 ], [ %.055, %15 ]
  %.1 = phi i32 [ %20, %17 ], [ %.0, %15 ]
  %22 = icmp ugt i32 %.1, 1
  br i1 %22, label %23, label %27

23:                                               ; preds = %21
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.156, i32 noundef %1, i32 noundef 0) #2
  %24 = add nsw i32 %.156, %6
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350453, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %24, i32 noundef %1, i32 noundef 1) #2
  %25 = add nuw nsw i32 %.156, 4
  %26 = add i32 %.1, -2
  br label %27

27:                                               ; preds = %23, %21
  %.257 = phi i32 [ %25, %23 ], [ %.156, %21 ]
  %.2 = phi i32 [ %26, %23 ], [ %.1, %21 ]
  %28 = icmp eq i32 %.2, 1
  br i1 %28, label %29, label %31

29:                                               ; preds = %27
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610334069, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %.257, i32 noundef %1, i32 noundef 0) #2
  %30 = add nsw i32 %.257, %6
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610334069, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %30, i32 noundef %1, i32 noundef 1) #2
  br label %31

31:                                               ; preds = %29, %27
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef 30000, i32 noundef 4, i64 noundef 32) #2
  ret void
}

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass