; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynet.ll (ZN4Simd4Base30SynetLrnLayerCrossChannelsNhwcEPKfmmmS2_Pf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base3PowEff(float noundef, float noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base30SynetLrnLayerCrossChannelsNhwcEPKfmmmS2_Pf(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, ptr noundef %5) #3 {
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca float, align 4
  %14 = alloca float, align 4
  %15 = alloca float, align 4
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca float, align 4
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i64 %1, ptr %8, align 8, !tbaa !9
  store i64 %2, ptr %9, align 8, !tbaa !9
  store i64 %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = getelementptr inbounds float, ptr %25, i64 0
  %27 = load float, ptr %26, align 4, !tbaa !11
  store float %27, ptr %13, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %28 = load ptr, ptr %11, align 8, !tbaa !5
  %29 = getelementptr inbounds float, ptr %28, i64 1
  %30 = load float, ptr %29, align 4, !tbaa !11
  store float %30, ptr %14, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %31 = load ptr, ptr %11, align 8, !tbaa !5
  %32 = getelementptr inbounds float, ptr %31, i64 2
  %33 = load float, ptr %32, align 4, !tbaa !11
  store float %33, ptr %15, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %34 = load i64, ptr %8, align 8, !tbaa !9
  %35 = add i64 %34, 1
  store i64 %35, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  %36 = load i64, ptr %9, align 8, !tbaa !9
  %37 = load i64, ptr %8, align 8, !tbaa !9
  %38 = sub i64 %36, %37
  store i64 %38, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  store i64 0, ptr %18, align 8, !tbaa !9
  br label %39

39:                                               ; preds = %180, %6
  %40 = load i64, ptr %18, align 8, !tbaa !9
  %41 = load i64, ptr %10, align 8, !tbaa !9
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  store i32 2, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  br label %183

44:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store float 0.000000e+00, ptr %20, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  store i64 0, ptr %21, align 8, !tbaa !9
  br label %45

45:                                               ; preds = %58, %44
  %46 = load i64, ptr %21, align 8, !tbaa !9
  %47 = load i64, ptr %8, align 8, !tbaa !9
  %48 = icmp ult i64 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 5, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  br label %61

50:                                               ; preds = %45
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = load i64, ptr %21, align 8, !tbaa !9
  %53 = getelementptr inbounds float, ptr %51, i64 %52
  %54 = load float, ptr %53, align 4, !tbaa !11
  %55 = call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %54)
  %56 = load float, ptr %20, align 4, !tbaa !11
  %57 = fadd float %56, %55
  store float %57, ptr %20, align 4, !tbaa !11
  br label %58

58:                                               ; preds = %50
  %59 = load i64, ptr %21, align 8, !tbaa !9
  %60 = add i64 %59, 1
  store i64 %60, ptr %21, align 8, !tbaa !9
  br label %45, !llvm.loop !13

61:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #4
  store i64 0, ptr %22, align 8, !tbaa !9
  br label %62

62:                                               ; preds = %91, %61
  %63 = load i64, ptr %22, align 8, !tbaa !9
  %64 = load i64, ptr %16, align 8, !tbaa !9
  %65 = icmp ult i64 %63, %64
  br i1 %65, label %67, label %66

66:                                               ; preds = %62
  store i32 8, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #4
  br label %94

67:                                               ; preds = %62
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = load i64, ptr %22, align 8, !tbaa !9
  %70 = load i64, ptr %8, align 8, !tbaa !9
  %71 = add i64 %69, %70
  %72 = getelementptr inbounds float, ptr %68, i64 %71
  %73 = load float, ptr %72, align 4, !tbaa !11
  %74 = call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %73)
  %75 = load float, ptr %20, align 4, !tbaa !11
  %76 = fadd float %75, %74
  store float %76, ptr %20, align 4, !tbaa !11
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = load i64, ptr %22, align 8, !tbaa !9
  %79 = getelementptr inbounds float, ptr %77, i64 %78
  %80 = load float, ptr %79, align 4, !tbaa !11
  %81 = load float, ptr %13, align 4, !tbaa !11
  %82 = load float, ptr %14, align 4, !tbaa !11
  %83 = load float, ptr %20, align 4, !tbaa !11
  %84 = call float @llvm.fmuladd.f32(float %82, float %83, float %81)
  %85 = load float, ptr %15, align 4, !tbaa !11
  %86 = call noundef float @_ZN4Simd4Base3PowEff(float noundef %84, float noundef %85)
  %87 = fmul float %80, %86
  %88 = load ptr, ptr %12, align 8, !tbaa !5
  %89 = load i64, ptr %22, align 8, !tbaa !9
  %90 = getelementptr inbounds float, ptr %88, i64 %89
  store float %87, ptr %90, align 4, !tbaa !11
  br label %91

91:                                               ; preds = %67
  %92 = load i64, ptr %22, align 8, !tbaa !9
  %93 = add i64 %92, 1
  store i64 %93, ptr %22, align 8, !tbaa !9
  br label %62, !llvm.loop !15

94:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #4
  %95 = load i64, ptr %16, align 8, !tbaa !9
  store i64 %95, ptr %23, align 8, !tbaa !9
  br label %96

96:                                               ; preds = %135, %94
  %97 = load i64, ptr %23, align 8, !tbaa !9
  %98 = load i64, ptr %17, align 8, !tbaa !9
  %99 = icmp ult i64 %97, %98
  br i1 %99, label %101, label %100

100:                                              ; preds = %96
  store i32 11, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #4
  br label %138

101:                                              ; preds = %96
  %102 = load ptr, ptr %7, align 8, !tbaa !5
  %103 = load i64, ptr %23, align 8, !tbaa !9
  %104 = load i64, ptr %8, align 8, !tbaa !9
  %105 = add i64 %103, %104
  %106 = getelementptr inbounds float, ptr %102, i64 %105
  %107 = load float, ptr %106, align 4, !tbaa !11
  %108 = call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %107)
  %109 = load float, ptr %20, align 4, !tbaa !11
  %110 = fadd float %109, %108
  store float %110, ptr %20, align 4, !tbaa !11
  %111 = load ptr, ptr %7, align 8, !tbaa !5
  %112 = load i64, ptr %23, align 8, !tbaa !9
  %113 = load i64, ptr %8, align 8, !tbaa !9
  %114 = sub i64 %112, %113
  %115 = sub i64 %114, 1
  %116 = getelementptr inbounds float, ptr %111, i64 %115
  %117 = load float, ptr %116, align 4, !tbaa !11
  %118 = call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %117)
  %119 = load float, ptr %20, align 4, !tbaa !11
  %120 = fsub float %119, %118
  store float %120, ptr %20, align 4, !tbaa !11
  %121 = load ptr, ptr %7, align 8, !tbaa !5
  %122 = load i64, ptr %23, align 8, !tbaa !9
  %123 = getelementptr inbounds float, ptr %121, i64 %122
  %124 = load float, ptr %123, align 4, !tbaa !11
  %125 = load float, ptr %13, align 4, !tbaa !11
  %126 = load float, ptr %14, align 4, !tbaa !11
  %127 = load float, ptr %20, align 4, !tbaa !11
  %128 = call float @llvm.fmuladd.f32(float %126, float %127, float %125)
  %129 = load float, ptr %15, align 4, !tbaa !11
  %130 = call noundef float @_ZN4Simd4Base3PowEff(float noundef %128, float noundef %129)
  %131 = fmul float %124, %130
  %132 = load ptr, ptr %12, align 8, !tbaa !5
  %133 = load i64, ptr %23, align 8, !tbaa !9
  %134 = getelementptr inbounds float, ptr %132, i64 %133
  store float %131, ptr %134, align 4, !tbaa !11
  br label %135

135:                                              ; preds = %101
  %136 = load i64, ptr %23, align 8, !tbaa !9
  %137 = add i64 %136, 1
  store i64 %137, ptr %23, align 8, !tbaa !9
  br label %96, !llvm.loop !16

138:                                              ; preds = %100
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #4
  %139 = load i64, ptr %17, align 8, !tbaa !9
  store i64 %139, ptr %24, align 8, !tbaa !9
  br label %140

140:                                              ; preds = %170, %138
  %141 = load i64, ptr %24, align 8, !tbaa !9
  %142 = load i64, ptr %9, align 8, !tbaa !9
  %143 = icmp ult i64 %141, %142
  br i1 %143, label %145, label %144

144:                                              ; preds = %140
  store i32 14, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #4
  br label %173

145:                                              ; preds = %140
  %146 = load ptr, ptr %7, align 8, !tbaa !5
  %147 = load i64, ptr %24, align 8, !tbaa !9
  %148 = load i64, ptr %8, align 8, !tbaa !9
  %149 = sub i64 %147, %148
  %150 = sub i64 %149, 1
  %151 = getelementptr inbounds float, ptr %146, i64 %150
  %152 = load float, ptr %151, align 4, !tbaa !11
  %153 = call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %152)
  %154 = load float, ptr %20, align 4, !tbaa !11
  %155 = fsub float %154, %153
  store float %155, ptr %20, align 4, !tbaa !11
  %156 = load ptr, ptr %7, align 8, !tbaa !5
  %157 = load i64, ptr %24, align 8, !tbaa !9
  %158 = getelementptr inbounds float, ptr %156, i64 %157
  %159 = load float, ptr %158, align 4, !tbaa !11
  %160 = load float, ptr %13, align 4, !tbaa !11
  %161 = load float, ptr %14, align 4, !tbaa !11
  %162 = load float, ptr %20, align 4, !tbaa !11
  %163 = call float @llvm.fmuladd.f32(float %161, float %162, float %160)
  %164 = load float, ptr %15, align 4, !tbaa !11
  %165 = call noundef float @_ZN4Simd4Base3PowEff(float noundef %163, float noundef %164)
  %166 = fmul float %159, %165
  %167 = load ptr, ptr %12, align 8, !tbaa !5
  %168 = load i64, ptr %24, align 8, !tbaa !9
  %169 = getelementptr inbounds float, ptr %167, i64 %168
  store float %166, ptr %169, align 4, !tbaa !11
  br label %170

170:                                              ; preds = %145
  %171 = load i64, ptr %24, align 8, !tbaa !9
  %172 = add i64 %171, 1
  store i64 %172, ptr %24, align 8, !tbaa !9
  br label %140, !llvm.loop !17

173:                                              ; preds = %144
  %174 = load i64, ptr %9, align 8, !tbaa !9
  %175 = load ptr, ptr %7, align 8, !tbaa !5
  %176 = getelementptr inbounds float, ptr %175, i64 %174
  store ptr %176, ptr %7, align 8, !tbaa !5
  %177 = load i64, ptr %9, align 8, !tbaa !9
  %178 = load ptr, ptr %12, align 8, !tbaa !5
  %179 = getelementptr inbounds float, ptr %178, i64 %177
  store ptr %179, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  br label %180

180:                                              ; preds = %173
  %181 = load i64, ptr %18, align 8, !tbaa !9
  %182 = add i64 %181, 1
  store i64 %182, ptr %18, align 8, !tbaa !9
  br label %39, !llvm.loop !18

183:                                              ; preds = %43
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base3PowEff(float noundef, float noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base30SynetLrnLayerCrossChannelsNhwcEPKfmmmS2_Pf(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef readonly %4, ptr nocapture noundef writeonly %5) local_unnamed_addr #2 {
  %7 = load float, ptr %4, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %4, i64 4
  %9 = load float, ptr %8, align 4, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %4, i64 8
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = add i64 %1, 1
  %13 = sub i64 %2, %1
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge99, label %.preheader82.lr.ph

.preheader82.lr.ph:                               ; preds = %6
  %.not100 = icmp eq i64 %1, 0
  %.not101 = icmp eq i64 %12, 0
  %14 = icmp ult i64 %12, %13
  %15 = xor i64 %1, -1
  %16 = icmp ult i64 %13, %2
  br label %.preheader82

.preheader82:                                     ; preds = %.preheader82.lr.ph, %._crit_edge
  %.07398 = phi i64 [ 0, %.preheader82.lr.ph ], [ %53, %._crit_edge ]
  %.07497 = phi ptr [ %0, %.preheader82.lr.ph ], [ %51, %._crit_edge ]
  %.07596 = phi ptr [ %5, %.preheader82.lr.ph ], [ %52, %._crit_edge ]
  br i1 %.not100, label %.lr.ph87.preheader, label %.lr.ph

._crit_edge99:                                    ; preds = %._crit_edge, %6
  ret void

.preheader81:                                     ; preds = %.lr.ph
  br i1 %.not101, label %.preheader80, label %.lr.ph87.preheader

.lr.ph87.preheader:                               ; preds = %.preheader82, %.preheader81
  %.185.ph = phi float [ %20, %.preheader81 ], [ 0.000000e+00, %.preheader82 ]
  br label %.lr.ph87

.lr.ph:                                           ; preds = %.preheader82, %.lr.ph
  %.07184 = phi i64 [ %21, %.lr.ph ], [ 0, %.preheader82 ]
  %.07283 = phi float [ %20, %.lr.ph ], [ 0.000000e+00, %.preheader82 ]
  %17 = getelementptr inbounds float, ptr %.07497, i64 %.07184
  %18 = load float, ptr %17, align 4, !tbaa !5
  %19 = tail call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %18)
  %20 = fadd float %.07283, %19
  %21 = add nuw i64 %.07184, 1
  %exitcond.not = icmp eq i64 %21, %1
  br i1 %exitcond.not, label %.preheader81, label %.lr.ph, !llvm.loop !9

.preheader80:                                     ; preds = %.lr.ph87, %.preheader81
  %.1.lcssa = phi float [ %20, %.preheader81 ], [ %26, %.lr.ph87 ]
  br i1 %14, label %.lr.ph91, label %.preheader

.lr.ph87:                                         ; preds = %.lr.ph87.preheader, %.lr.ph87
  %.07086 = phi i64 [ %33, %.lr.ph87 ], [ 0, %.lr.ph87.preheader ]
  %.185 = phi float [ %26, %.lr.ph87 ], [ %.185.ph, %.lr.ph87.preheader ]
  %22 = add i64 %.07086, %1
  %23 = getelementptr inbounds float, ptr %.07497, i64 %22
  %24 = load float, ptr %23, align 4, !tbaa !5
  %25 = tail call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %24)
  %26 = fadd float %.185, %25
  %27 = getelementptr inbounds float, ptr %.07497, i64 %.07086
  %28 = load float, ptr %27, align 4, !tbaa !5
  %29 = tail call float @llvm.fmuladd.f32(float %9, float %26, float %7)
  %30 = tail call noundef float @_ZN4Simd4Base3PowEff(float noundef %29, float noundef %11)
  %31 = fmul float %28, %30
  %32 = getelementptr inbounds float, ptr %.07596, i64 %.07086
  store float %31, ptr %32, align 4, !tbaa !5
  %33 = add nuw i64 %.07086, 1
  %exitcond104.not = icmp eq i64 %.07086, %1
  br i1 %exitcond104.not, label %.preheader80, label %.lr.ph87, !llvm.loop !11

.preheader:                                       ; preds = %.lr.ph91, %.preheader80
  %.2.lcssa = phi float [ %.1.lcssa, %.preheader80 ], [ %43, %.lr.ph91 ]
  br i1 %16, label %.lr.ph95, label %._crit_edge

.lr.ph91:                                         ; preds = %.preheader80, %.lr.ph91
  %.06990 = phi i64 [ %50, %.lr.ph91 ], [ %12, %.preheader80 ]
  %.289 = phi float [ %43, %.lr.ph91 ], [ %.1.lcssa, %.preheader80 ]
  %34 = add i64 %.06990, %1
  %35 = getelementptr inbounds float, ptr %.07497, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !5
  %37 = tail call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %36)
  %38 = fadd float %.289, %37
  %39 = add i64 %.06990, %15
  %40 = getelementptr inbounds float, ptr %.07497, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !5
  %42 = tail call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %41)
  %43 = fsub float %38, %42
  %44 = getelementptr inbounds float, ptr %.07497, i64 %.06990
  %45 = load float, ptr %44, align 4, !tbaa !5
  %46 = tail call float @llvm.fmuladd.f32(float %9, float %43, float %7)
  %47 = tail call noundef float @_ZN4Simd4Base3PowEff(float noundef %46, float noundef %11)
  %48 = fmul float %45, %47
  %49 = getelementptr inbounds float, ptr %.07596, i64 %.06990
  store float %48, ptr %49, align 4, !tbaa !5
  %50 = add i64 %.06990, 1
  %exitcond105.not = icmp eq i64 %50, %13
  br i1 %exitcond105.not, label %.preheader, label %.lr.ph91, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph95, %.preheader
  %51 = getelementptr inbounds float, ptr %.07497, i64 %2
  %52 = getelementptr inbounds float, ptr %.07596, i64 %2
  %53 = add nuw i64 %.07398, 1
  %exitcond107.not = icmp eq i64 %53, %3
  br i1 %exitcond107.not, label %._crit_edge99, label %.preheader82, !llvm.loop !13

.lr.ph95:                                         ; preds = %.preheader, %.lr.ph95
  %.094 = phi i64 [ %65, %.lr.ph95 ], [ %13, %.preheader ]
  %.393 = phi float [ %58, %.lr.ph95 ], [ %.2.lcssa, %.preheader ]
  %54 = add i64 %.094, %15
  %55 = getelementptr inbounds float, ptr %.07497, i64 %54
  %56 = load float, ptr %55, align 4, !tbaa !5
  %57 = tail call noundef float @_ZN4Simd6SquareIfEET_S1_(float noundef %56)
  %58 = fsub float %.393, %57
  %59 = getelementptr inbounds float, ptr %.07497, i64 %.094
  %60 = load float, ptr %59, align 4, !tbaa !5
  %61 = tail call float @llvm.fmuladd.f32(float %9, float %58, float %7)
  %62 = tail call noundef float @_ZN4Simd4Base3PowEff(float noundef %61, float noundef %11)
  %63 = fmul float %60, %62
  %64 = getelementptr inbounds float, ptr %.07596, i64 %.094
  store float %63, ptr %64, align 4, !tbaa !5
  %65 = add i64 %.094, 1
  %exitcond106.not = icmp eq i64 %65, %2
  br i1 %exitcond106.not, label %._crit_edge, label %.lr.ph95, !llvm.loop !14
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass