; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetActivation.ll (ZN4Simd4Base26SynetPreluLayerForwardNhwcEPKfS2_mmPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef, float noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base26SynetPreluLayerForwardNhwcEPKfS2_mmPf(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %14 = load i64, ptr %8, align 8, !tbaa !9
  %15 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %14, i64 noundef 4)
  store i64 %15, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %16

16:                                               ; preds = %118, %5
  %17 = load i64, ptr %12, align 8, !tbaa !9
  %18 = load i64, ptr %9, align 8, !tbaa !9
  %19 = icmp ult i64 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %121

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store i64 0, ptr %13, align 8, !tbaa !9
  br label %22

22:                                               ; preds = %87, %21
  %23 = load i64, ptr %13, align 8, !tbaa !9
  %24 = load i64, ptr %11, align 8, !tbaa !9
  %25 = icmp ult i64 %23, %24
  br i1 %25, label %26, label %90

26:                                               ; preds = %22
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = load i64, ptr %13, align 8, !tbaa !9
  %29 = add i64 %28, 0
  %30 = getelementptr inbounds float, ptr %27, i64 %29
  %31 = load float, ptr %30, align 4, !tbaa !11
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load i64, ptr %13, align 8, !tbaa !9
  %34 = add i64 %33, 0
  %35 = getelementptr inbounds float, ptr %32, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !11
  %37 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %31, float noundef %36)
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  %39 = load i64, ptr %13, align 8, !tbaa !9
  %40 = add i64 %39, 0
  %41 = getelementptr inbounds float, ptr %38, i64 %40
  store float %37, ptr %41, align 4, !tbaa !11
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = load i64, ptr %13, align 8, !tbaa !9
  %44 = add i64 %43, 1
  %45 = getelementptr inbounds float, ptr %42, i64 %44
  %46 = load float, ptr %45, align 4, !tbaa !11
  %47 = load ptr, ptr %7, align 8, !tbaa !5
  %48 = load i64, ptr %13, align 8, !tbaa !9
  %49 = add i64 %48, 1
  %50 = getelementptr inbounds float, ptr %47, i64 %49
  %51 = load float, ptr %50, align 4, !tbaa !11
  %52 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %46, float noundef %51)
  %53 = load ptr, ptr %10, align 8, !tbaa !5
  %54 = load i64, ptr %13, align 8, !tbaa !9
  %55 = add i64 %54, 1
  %56 = getelementptr inbounds float, ptr %53, i64 %55
  store float %52, ptr %56, align 4, !tbaa !11
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = load i64, ptr %13, align 8, !tbaa !9
  %59 = add i64 %58, 2
  %60 = getelementptr inbounds float, ptr %57, i64 %59
  %61 = load float, ptr %60, align 4, !tbaa !11
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = load i64, ptr %13, align 8, !tbaa !9
  %64 = add i64 %63, 2
  %65 = getelementptr inbounds float, ptr %62, i64 %64
  %66 = load float, ptr %65, align 4, !tbaa !11
  %67 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %61, float noundef %66)
  %68 = load ptr, ptr %10, align 8, !tbaa !5
  %69 = load i64, ptr %13, align 8, !tbaa !9
  %70 = add i64 %69, 2
  %71 = getelementptr inbounds float, ptr %68, i64 %70
  store float %67, ptr %71, align 4, !tbaa !11
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = load i64, ptr %13, align 8, !tbaa !9
  %74 = add i64 %73, 3
  %75 = getelementptr inbounds float, ptr %72, i64 %74
  %76 = load float, ptr %75, align 4, !tbaa !11
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = load i64, ptr %13, align 8, !tbaa !9
  %79 = add i64 %78, 3
  %80 = getelementptr inbounds float, ptr %77, i64 %79
  %81 = load float, ptr %80, align 4, !tbaa !11
  %82 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %76, float noundef %81)
  %83 = load ptr, ptr %10, align 8, !tbaa !5
  %84 = load i64, ptr %13, align 8, !tbaa !9
  %85 = add i64 %84, 3
  %86 = getelementptr inbounds float, ptr %83, i64 %85
  store float %82, ptr %86, align 4, !tbaa !11
  br label %87

87:                                               ; preds = %26
  %88 = load i64, ptr %13, align 8, !tbaa !9
  %89 = add i64 %88, 4
  store i64 %89, ptr %13, align 8, !tbaa !9
  br label %22, !llvm.loop !13

90:                                               ; preds = %22
  br label %91

91:                                               ; preds = %108, %90
  %92 = load i64, ptr %13, align 8, !tbaa !9
  %93 = load i64, ptr %8, align 8, !tbaa !9
  %94 = icmp ult i64 %92, %93
  br i1 %94, label %95, label %111

95:                                               ; preds = %91
  %96 = load ptr, ptr %6, align 8, !tbaa !5
  %97 = load i64, ptr %13, align 8, !tbaa !9
  %98 = getelementptr inbounds float, ptr %96, i64 %97
  %99 = load float, ptr %98, align 4, !tbaa !11
  %100 = load ptr, ptr %7, align 8, !tbaa !5
  %101 = load i64, ptr %13, align 8, !tbaa !9
  %102 = getelementptr inbounds float, ptr %100, i64 %101
  %103 = load float, ptr %102, align 4, !tbaa !11
  %104 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %99, float noundef %103)
  %105 = load ptr, ptr %10, align 8, !tbaa !5
  %106 = load i64, ptr %13, align 8, !tbaa !9
  %107 = getelementptr inbounds float, ptr %105, i64 %106
  store float %104, ptr %107, align 4, !tbaa !11
  br label %108

108:                                              ; preds = %95
  %109 = load i64, ptr %13, align 8, !tbaa !9
  %110 = add i64 %109, 1
  store i64 %110, ptr %13, align 8, !tbaa !9
  br label %91, !llvm.loop !15

111:                                              ; preds = %91
  %112 = load i64, ptr %8, align 8, !tbaa !9
  %113 = load ptr, ptr %6, align 8, !tbaa !5
  %114 = getelementptr inbounds float, ptr %113, i64 %112
  store ptr %114, ptr %6, align 8, !tbaa !5
  %115 = load i64, ptr %8, align 8, !tbaa !9
  %116 = load ptr, ptr %10, align 8, !tbaa !5
  %117 = getelementptr inbounds float, ptr %116, i64 %115
  store ptr %117, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %118

118:                                              ; preds = %111
  %119 = load i64, ptr %12, align 8, !tbaa !9
  %120 = add i64 %119, 1
  store i64 %120, ptr %12, align 8, !tbaa !9
  br label %16, !llvm.loop !16

121:                                              ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base26SynetPreluLayerForwardNhwcEPKfS2_mmPf(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #1 {
  %6 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %2, i64 noundef 4)
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge54, label %.preheader47.lr.ph

.preheader47.lr.ph:                               ; preds = %5
  %.not62 = icmp eq i64 %6, 0
  br i1 %.not62, label %.preheader47.lr.ph.split, label %.preheader47.us

.preheader47.us:                                  ; preds = %.preheader47.lr.ph, %._crit_edge.us
  %.04353.us = phi i64 [ %9, %._crit_edge.us ], [ 0, %.preheader47.lr.ph ]
  %.04452.us = phi ptr [ %7, %._crit_edge.us ], [ %0, %.preheader47.lr.ph ]
  %.04551.us = phi ptr [ %8, %._crit_edge.us ], [ %4, %.preheader47.lr.ph ]
  br label %18

._crit_edge.us:                                   ; preds = %.lr.ph50.us, %..preheader_crit_edge.us
  %7 = getelementptr inbounds float, ptr %.04452.us, i64 %2
  %8 = getelementptr inbounds float, ptr %.04551.us, i64 %2
  %9 = add nuw i64 %.04353.us, 1
  %exitcond.not = icmp eq i64 %9, %3
  br i1 %exitcond.not, label %._crit_edge54, label %.preheader47.us, !llvm.loop !5

.lr.ph50.us:                                      ; preds = %..preheader_crit_edge.us, %.lr.ph50.us
  %.149.us = phi i64 [ %16, %.lr.ph50.us ], [ %46, %..preheader_crit_edge.us ]
  %10 = getelementptr inbounds float, ptr %.04452.us, i64 %.149.us
  %11 = load float, ptr %10, align 4, !tbaa !7
  %12 = getelementptr inbounds float, ptr %1, i64 %.149.us
  %13 = load float, ptr %12, align 4, !tbaa !7
  %14 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %11, float noundef %13)
  %15 = getelementptr inbounds float, ptr %.04551.us, i64 %.149.us
  store float %14, ptr %15, align 4, !tbaa !7
  %16 = add nuw i64 %.149.us, 1
  %17 = icmp ult i64 %16, %2
  br i1 %17, label %.lr.ph50.us, label %._crit_edge.us, !llvm.loop !11

18:                                               ; preds = %.preheader47.us, %18
  %.048.us = phi i64 [ 0, %.preheader47.us ], [ %46, %18 ]
  %19 = getelementptr inbounds float, ptr %.04452.us, i64 %.048.us
  %20 = load float, ptr %19, align 4, !tbaa !7
  %21 = getelementptr inbounds float, ptr %1, i64 %.048.us
  %22 = load float, ptr %21, align 4, !tbaa !7
  %23 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %20, float noundef %22)
  %24 = getelementptr inbounds float, ptr %.04551.us, i64 %.048.us
  store float %23, ptr %24, align 4, !tbaa !7
  %25 = or disjoint i64 %.048.us, 1
  %26 = getelementptr inbounds float, ptr %.04452.us, i64 %25
  %27 = load float, ptr %26, align 4, !tbaa !7
  %28 = getelementptr inbounds float, ptr %1, i64 %25
  %29 = load float, ptr %28, align 4, !tbaa !7
  %30 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %27, float noundef %29)
  %31 = getelementptr inbounds float, ptr %.04551.us, i64 %25
  store float %30, ptr %31, align 4, !tbaa !7
  %32 = or disjoint i64 %.048.us, 2
  %33 = getelementptr inbounds float, ptr %.04452.us, i64 %32
  %34 = load float, ptr %33, align 4, !tbaa !7
  %35 = getelementptr inbounds float, ptr %1, i64 %32
  %36 = load float, ptr %35, align 4, !tbaa !7
  %37 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %34, float noundef %36)
  %38 = getelementptr inbounds float, ptr %.04551.us, i64 %32
  store float %37, ptr %38, align 4, !tbaa !7
  %39 = or disjoint i64 %.048.us, 3
  %40 = getelementptr inbounds float, ptr %.04452.us, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !7
  %42 = getelementptr inbounds float, ptr %1, i64 %39
  %43 = load float, ptr %42, align 4, !tbaa !7
  %44 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %41, float noundef %43)
  %45 = getelementptr inbounds float, ptr %.04551.us, i64 %39
  store float %44, ptr %45, align 4, !tbaa !7
  %46 = add i64 %.048.us, 4
  %47 = icmp ult i64 %46, %6
  br i1 %47, label %18, label %..preheader_crit_edge.us, !llvm.loop !12

..preheader_crit_edge.us:                         ; preds = %18
  %48 = icmp ult i64 %46, %2
  br i1 %48, label %.lr.ph50.us, label %._crit_edge.us

.preheader47.lr.ph.split:                         ; preds = %.preheader47.lr.ph
  %.not63 = icmp eq i64 %2, 0
  br i1 %.not63, label %._crit_edge54, label %.preheader47.us55

.preheader47.us55:                                ; preds = %.preheader47.lr.ph.split, %._crit_edge.us61
  %.04353.us56 = phi i64 [ %59, %._crit_edge.us61 ], [ 0, %.preheader47.lr.ph.split ]
  %.04452.us57 = phi ptr [ %57, %._crit_edge.us61 ], [ %0, %.preheader47.lr.ph.split ]
  %.04551.us58 = phi ptr [ %58, %._crit_edge.us61 ], [ %4, %.preheader47.lr.ph.split ]
  br label %49

49:                                               ; preds = %.preheader47.us55, %49
  %.149.us59 = phi i64 [ 0, %.preheader47.us55 ], [ %56, %49 ]
  %50 = getelementptr inbounds float, ptr %.04452.us57, i64 %.149.us59
  %51 = load float, ptr %50, align 4, !tbaa !7
  %52 = getelementptr inbounds float, ptr %1, i64 %.149.us59
  %53 = load float, ptr %52, align 4, !tbaa !7
  %54 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %51, float noundef %53)
  %55 = getelementptr inbounds float, ptr %.04551.us58, i64 %.149.us59
  store float %54, ptr %55, align 4, !tbaa !7
  %56 = add nuw i64 %.149.us59, 1
  %exitcond66.not = icmp eq i64 %56, %2
  br i1 %exitcond66.not, label %._crit_edge.us61, label %49, !llvm.loop !11

._crit_edge.us61:                                 ; preds = %49
  %57 = getelementptr inbounds float, ptr %.04452.us57, i64 %2
  %58 = getelementptr inbounds float, ptr %.04551.us58, i64 %2
  %59 = add nuw i64 %.04353.us56, 1
  %exitcond67.not = icmp eq i64 %59, %3
  br i1 %exitcond67.not, label %._crit_edge54, label %.preheader47.us55, !llvm.loop !5

._crit_edge54:                                    ; preds = %._crit_edge.us, %._crit_edge.us61, %.preheader47.lr.ph.split, %5
  ret void
}

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass