; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetAdd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [78 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType = external hidden unnamed_addr constant [237 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, i64 noundef %9, i64 noundef %10, i64 noundef %11, i32 noundef %12, i32 noundef %13) #2 {
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca i64, align 8
  %25 = alloca i64, align 8
  %26 = alloca i64, align 8
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i64, align 8
  %32 = alloca i32, align 4
  %33 = alloca i64, align 8
  %34 = alloca i64, align 8
  %35 = alloca float, align 4
  %36 = alloca float, align 4
  %37 = alloca i64, align 8
  %38 = alloca i64, align 8
  %39 = alloca float, align 4
  %40 = alloca float, align 4
  store ptr %0, ptr %15, align 8, !tbaa !5
  store ptr %1, ptr %16, align 8, !tbaa !5
  store ptr %2, ptr %17, align 8, !tbaa !5
  store ptr %3, ptr %18, align 8, !tbaa !5
  store ptr %4, ptr %19, align 8, !tbaa !5
  store ptr %5, ptr %20, align 8, !tbaa !5
  store ptr %6, ptr %21, align 8, !tbaa !5
  store ptr %7, ptr %22, align 8, !tbaa !5
  store ptr %8, ptr %23, align 8, !tbaa !5
  store i64 %9, ptr %24, align 8, !tbaa !9
  store i64 %10, ptr %25, align 8, !tbaa !9
  store i64 %11, ptr %26, align 8, !tbaa !9
  store i32 %12, ptr %27, align 4, !tbaa !11
  store i32 %13, ptr %28, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #6
  %41 = load i32, ptr %28, align 4, !tbaa !13
  %42 = call noundef zeroext i1 @_ZN4Simd4Base8NarrowedE26SimdSynetCompatibilityType(i32 noundef %41)
  br i1 %42, label %43, label %44

43:                                               ; preds = %14
  store i32 0, ptr %29, align 4, !tbaa !15
  store i32 180, ptr %30, align 4, !tbaa !15
  br label %45

44:                                               ; preds = %14
  store i32 0, ptr %29, align 4, !tbaa !15
  store i32 255, ptr %30, align 4, !tbaa !15
  br label %45

45:                                               ; preds = %44, %43
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #6
  store i64 0, ptr %31, align 8, !tbaa !9
  br label %46

46:                                               ; preds = %210, %45
  %47 = load i64, ptr %31, align 8, !tbaa !9
  %48 = load i64, ptr %24, align 8, !tbaa !9
  %49 = icmp ult i64 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  store i32 2, ptr %32, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #6
  br label %213

51:                                               ; preds = %46
  %52 = load i32, ptr %27, align 4, !tbaa !11
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %129

54:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #6
  store i64 0, ptr %33, align 8, !tbaa !9
  br label %55

55:                                               ; preds = %125, %54
  %56 = load i64, ptr %33, align 8, !tbaa !9
  %57 = load i64, ptr %25, align 8, !tbaa !9
  %58 = icmp ult i64 %56, %57
  br i1 %58, label %60, label %59

59:                                               ; preds = %55
  store i32 5, ptr %32, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #6
  br label %128

60:                                               ; preds = %55
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #6
  store i64 0, ptr %34, align 8, !tbaa !9
  br label %61

61:                                               ; preds = %112, %60
  %62 = load i64, ptr %34, align 8, !tbaa !9
  %63 = load i64, ptr %26, align 8, !tbaa !9
  %64 = icmp ult i64 %62, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %61
  store i32 8, ptr %32, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #6
  br label %115

66:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #6
  %67 = load ptr, ptr %15, align 8, !tbaa !5
  %68 = load i64, ptr %34, align 8, !tbaa !9
  %69 = getelementptr inbounds i8, ptr %67, i64 %68
  %70 = load i8, ptr %69, align 1, !tbaa !17
  %71 = uitofp i8 %70 to float
  %72 = load ptr, ptr %16, align 8, !tbaa !5
  %73 = load i64, ptr %33, align 8, !tbaa !9
  %74 = getelementptr inbounds float, ptr %72, i64 %73
  %75 = load float, ptr %74, align 4, !tbaa !18
  %76 = load ptr, ptr %17, align 8, !tbaa !5
  %77 = load i64, ptr %33, align 8, !tbaa !9
  %78 = getelementptr inbounds float, ptr %76, i64 %77
  %79 = load float, ptr %78, align 4, !tbaa !18
  %80 = call float @llvm.fmuladd.f32(float %71, float %75, float %79)
  store float %80, ptr %35, align 4, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #6
  %81 = load ptr, ptr %18, align 8, !tbaa !5
  %82 = load i64, ptr %34, align 8, !tbaa !9
  %83 = getelementptr inbounds i8, ptr %81, i64 %82
  %84 = load i8, ptr %83, align 1, !tbaa !17
  %85 = uitofp i8 %84 to float
  %86 = load ptr, ptr %19, align 8, !tbaa !5
  %87 = load i64, ptr %33, align 8, !tbaa !9
  %88 = getelementptr inbounds float, ptr %86, i64 %87
  %89 = load float, ptr %88, align 4, !tbaa !18
  %90 = load ptr, ptr %20, align 8, !tbaa !5
  %91 = load i64, ptr %33, align 8, !tbaa !9
  %92 = getelementptr inbounds float, ptr %90, i64 %91
  %93 = load float, ptr %92, align 4, !tbaa !18
  %94 = call float @llvm.fmuladd.f32(float %85, float %89, float %93)
  store float %94, ptr %36, align 4, !tbaa !18
  %95 = load float, ptr %35, align 4, !tbaa !18
  %96 = load float, ptr %36, align 4, !tbaa !18
  %97 = fadd float %95, %96
  %98 = load ptr, ptr %22, align 8, !tbaa !5
  %99 = load i64, ptr %33, align 8, !tbaa !9
  %100 = getelementptr inbounds float, ptr %98, i64 %99
  %101 = load float, ptr %100, align 4, !tbaa !18
  %102 = load ptr, ptr %23, align 8, !tbaa !5
  %103 = load i64, ptr %33, align 8, !tbaa !9
  %104 = getelementptr inbounds float, ptr %102, i64 %103
  %105 = load float, ptr %104, align 4, !tbaa !18
  %106 = load i32, ptr %29, align 4, !tbaa !15
  %107 = load i32, ptr %30, align 4, !tbaa !15
  %108 = call noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef %97, float noundef %101, float noundef %105, i32 noundef %106, i32 noundef %107)
  %109 = load ptr, ptr %21, align 8, !tbaa !5
  %110 = load i64, ptr %34, align 8, !tbaa !9
  %111 = getelementptr inbounds i8, ptr %109, i64 %110
  store i8 %108, ptr %111, align 1, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #6
  br label %112

112:                                              ; preds = %66
  %113 = load i64, ptr %34, align 8, !tbaa !9
  %114 = add i64 %113, 1
  store i64 %114, ptr %34, align 8, !tbaa !9
  br label %61, !llvm.loop !20

115:                                              ; preds = %65
  %116 = load i64, ptr %26, align 8, !tbaa !9
  %117 = load ptr, ptr %15, align 8, !tbaa !5
  %118 = getelementptr inbounds i8, ptr %117, i64 %116
  store ptr %118, ptr %15, align 8, !tbaa !5
  %119 = load i64, ptr %26, align 8, !tbaa !9
  %120 = load ptr, ptr %18, align 8, !tbaa !5
  %121 = getelementptr inbounds i8, ptr %120, i64 %119
  store ptr %121, ptr %18, align 8, !tbaa !5
  %122 = load i64, ptr %26, align 8, !tbaa !9
  %123 = load ptr, ptr %21, align 8, !tbaa !5
  %124 = getelementptr inbounds i8, ptr %123, i64 %122
  store ptr %124, ptr %21, align 8, !tbaa !5
  br label %125

125:                                              ; preds = %115
  %126 = load i64, ptr %33, align 8, !tbaa !9
  %127 = add i64 %126, 1
  store i64 %127, ptr %33, align 8, !tbaa !9
  br label %55, !llvm.loop !22

128:                                              ; preds = %59
  br label %209

129:                                              ; preds = %51
  %130 = load i32, ptr %27, align 4, !tbaa !11
  %131 = icmp eq i32 %130, 1
  br i1 %131, label %132, label %207

132:                                              ; preds = %129
  call void @llvm.lifetime.start.p0(i64 8, ptr %37) #6
  store i64 0, ptr %37, align 8, !tbaa !9
  br label %133

133:                                              ; preds = %203, %132
  %134 = load i64, ptr %37, align 8, !tbaa !9
  %135 = load i64, ptr %26, align 8, !tbaa !9
  %136 = icmp ult i64 %134, %135
  br i1 %136, label %138, label %137

137:                                              ; preds = %133
  store i32 11, ptr %32, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %37) #6
  br label %206

138:                                              ; preds = %133
  call void @llvm.lifetime.start.p0(i64 8, ptr %38) #6
  store i64 0, ptr %38, align 8, !tbaa !9
  br label %139

139:                                              ; preds = %190, %138
  %140 = load i64, ptr %38, align 8, !tbaa !9
  %141 = load i64, ptr %25, align 8, !tbaa !9
  %142 = icmp ult i64 %140, %141
  br i1 %142, label %144, label %143

143:                                              ; preds = %139
  store i32 14, ptr %32, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %38) #6
  br label %193

144:                                              ; preds = %139
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #6
  %145 = load ptr, ptr %15, align 8, !tbaa !5
  %146 = load i64, ptr %38, align 8, !tbaa !9
  %147 = getelementptr inbounds i8, ptr %145, i64 %146
  %148 = load i8, ptr %147, align 1, !tbaa !17
  %149 = uitofp i8 %148 to float
  %150 = load ptr, ptr %16, align 8, !tbaa !5
  %151 = load i64, ptr %38, align 8, !tbaa !9
  %152 = getelementptr inbounds float, ptr %150, i64 %151
  %153 = load float, ptr %152, align 4, !tbaa !18
  %154 = load ptr, ptr %17, align 8, !tbaa !5
  %155 = load i64, ptr %38, align 8, !tbaa !9
  %156 = getelementptr inbounds float, ptr %154, i64 %155
  %157 = load float, ptr %156, align 4, !tbaa !18
  %158 = call float @llvm.fmuladd.f32(float %149, float %153, float %157)
  store float %158, ptr %39, align 4, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #6
  %159 = load ptr, ptr %18, align 8, !tbaa !5
  %160 = load i64, ptr %38, align 8, !tbaa !9
  %161 = getelementptr inbounds i8, ptr %159, i64 %160
  %162 = load i8, ptr %161, align 1, !tbaa !17
  %163 = uitofp i8 %162 to float
  %164 = load ptr, ptr %19, align 8, !tbaa !5
  %165 = load i64, ptr %38, align 8, !tbaa !9
  %166 = getelementptr inbounds float, ptr %164, i64 %165
  %167 = load float, ptr %166, align 4, !tbaa !18
  %168 = load ptr, ptr %20, align 8, !tbaa !5
  %169 = load i64, ptr %38, align 8, !tbaa !9
  %170 = getelementptr inbounds float, ptr %168, i64 %169
  %171 = load float, ptr %170, align 4, !tbaa !18
  %172 = call float @llvm.fmuladd.f32(float %163, float %167, float %171)
  store float %172, ptr %40, align 4, !tbaa !18
  %173 = load float, ptr %39, align 4, !tbaa !18
  %174 = load float, ptr %40, align 4, !tbaa !18
  %175 = fadd float %173, %174
  %176 = load ptr, ptr %22, align 8, !tbaa !5
  %177 = load i64, ptr %38, align 8, !tbaa !9
  %178 = getelementptr inbounds float, ptr %176, i64 %177
  %179 = load float, ptr %178, align 4, !tbaa !18
  %180 = load ptr, ptr %23, align 8, !tbaa !5
  %181 = load i64, ptr %38, align 8, !tbaa !9
  %182 = getelementptr inbounds float, ptr %180, i64 %181
  %183 = load float, ptr %182, align 4, !tbaa !18
  %184 = load i32, ptr %29, align 4, !tbaa !15
  %185 = load i32, ptr %30, align 4, !tbaa !15
  %186 = call noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef %175, float noundef %179, float noundef %183, i32 noundef %184, i32 noundef %185)
  %187 = load ptr, ptr %21, align 8, !tbaa !5
  %188 = load i64, ptr %38, align 8, !tbaa !9
  %189 = getelementptr inbounds i8, ptr %187, i64 %188
  store i8 %186, ptr %189, align 1, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #6
  br label %190

190:                                              ; preds = %144
  %191 = load i64, ptr %38, align 8, !tbaa !9
  %192 = add i64 %191, 1
  store i64 %192, ptr %38, align 8, !tbaa !9
  br label %139, !llvm.loop !23

193:                                              ; preds = %143
  %194 = load i64, ptr %25, align 8, !tbaa !9
  %195 = load ptr, ptr %15, align 8, !tbaa !5
  %196 = getelementptr inbounds i8, ptr %195, i64 %194
  store ptr %196, ptr %15, align 8, !tbaa !5
  %197 = load i64, ptr %25, align 8, !tbaa !9
  %198 = load ptr, ptr %18, align 8, !tbaa !5
  %199 = getelementptr inbounds i8, ptr %198, i64 %197
  store ptr %199, ptr %18, align 8, !tbaa !5
  %200 = load i64, ptr %25, align 8, !tbaa !9
  %201 = load ptr, ptr %21, align 8, !tbaa !5
  %202 = getelementptr inbounds i8, ptr %201, i64 %200
  store ptr %202, ptr %21, align 8, !tbaa !5
  br label %203

203:                                              ; preds = %193
  %204 = load i64, ptr %37, align 8, !tbaa !9
  %205 = add i64 %204, 1
  store i64 %205, ptr %37, align 8, !tbaa !9
  br label %133, !llvm.loop !24

206:                                              ; preds = %137
  br label %208

207:                                              ; preds = %129
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 123, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType) #7
  unreachable

208:                                              ; preds = %206
  br label %209

209:                                              ; preds = %208, %128
  br label %210

210:                                              ; preds = %209
  %211 = load i64, ptr %31, align 8, !tbaa !9
  %212 = add i64 %211, 1
  store i64 %212, ptr %31, align 8, !tbaa !9
  br label %46, !llvm.loop !25

213:                                              ; preds = %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #6
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8NarrowedE26SimdSynetCompatibilityType(i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef, float noundef, float noundef, i32 noundef, i32 noundef) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}
!23 = distinct !{!23, !21}
!24 = distinct !{!24, !21}
!25 = distinct !{!25, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [78 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType = external hidden unnamed_addr constant [237 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef writeonly %6, ptr nocapture noundef readonly %7, ptr nocapture noundef readonly %8, i64 noundef %9, i64 noundef %10, i64 noundef %11, i32 noundef %12, i32 noundef %13) local_unnamed_addr #1 {
  %15 = tail call noundef zeroext i1 @_ZN4Simd4Base8NarrowedE26SimdSynetCompatibilityType(i32 noundef %13)
  %. = select i1 %15, i32 180, i32 255
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %14
  %.not144 = icmp eq i64 %11, 0
  %.not145 = icmp eq i64 %10, 0
  %switch = icmp ult i32 %12, 2
  br i1 %switch, label %.lr.ph.split, label %76

.lr.ph.split:                                     ; preds = %.lr.ph
  %cond = icmp eq i32 %12, 0
  br i1 %cond, label %.lr.ph.split.split.us, label %.lr.ph.split.split

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split
  %brmerge = or i1 %.not145, %.not144
  br i1 %brmerge, label %._crit_edge, label %.preheader92.us.us.us

.preheader92.us.us.us:                            ; preds = %.lr.ph.split.split.us, %..loopexit_crit_edge.split.us.us.us.us
  %.0119.us.us.us = phi ptr [ %41, %..loopexit_crit_edge.split.us.us.us.us ], [ %0, %.lr.ph.split.split.us ]
  %.073118.us.us.us = phi ptr [ %42, %..loopexit_crit_edge.split.us.us.us.us ], [ %3, %.lr.ph.split.split.us ]
  %.079117.us.us.us = phi ptr [ %43, %..loopexit_crit_edge.split.us.us.us.us ], [ %6, %.lr.ph.split.split.us ]
  %.086116.us.us.us = phi i64 [ %45, %..loopexit_crit_edge.split.us.us.us.us ], [ 0, %.lr.ph.split.split.us ]
  br label %.preheader.us.us.us.us

.preheader.us.us.us.us:                           ; preds = %._crit_edge.us112.us.us.us, %.preheader92.us.us.us
  %.1108.us.us.us.us = phi ptr [ %.0119.us.us.us, %.preheader92.us.us.us ], [ %41, %._crit_edge.us112.us.us.us ]
  %.174107.us.us.us.us = phi ptr [ %.073118.us.us.us, %.preheader92.us.us.us ], [ %42, %._crit_edge.us112.us.us.us ]
  %.180106.us.us.us.us = phi ptr [ %.079117.us.us.us, %.preheader92.us.us.us ], [ %43, %._crit_edge.us112.us.us.us ]
  %.085105.us.us.us.us = phi i64 [ 0, %.preheader92.us.us.us ], [ %44, %._crit_edge.us112.us.us.us ]
  %16 = getelementptr inbounds float, ptr %1, i64 %.085105.us.us.us.us
  %17 = getelementptr inbounds float, ptr %2, i64 %.085105.us.us.us.us
  %18 = getelementptr inbounds float, ptr %4, i64 %.085105.us.us.us.us
  %19 = getelementptr inbounds float, ptr %5, i64 %.085105.us.us.us.us
  %20 = getelementptr inbounds float, ptr %7, i64 %.085105.us.us.us.us
  %21 = getelementptr inbounds float, ptr %8, i64 %.085105.us.us.us.us
  br label %22

22:                                               ; preds = %22, %.preheader.us.us.us.us
  %.084104.us.us.us.us = phi i64 [ 0, %.preheader.us.us.us.us ], [ %40, %22 ]
  %23 = getelementptr inbounds i8, ptr %.1108.us.us.us.us, i64 %.084104.us.us.us.us
  %24 = load i8, ptr %23, align 1, !tbaa !5
  %25 = uitofp i8 %24 to float
  %26 = load float, ptr %16, align 4, !tbaa !8
  %27 = load float, ptr %17, align 4, !tbaa !8
  %28 = tail call float @llvm.fmuladd.f32(float %25, float %26, float %27)
  %29 = getelementptr inbounds i8, ptr %.174107.us.us.us.us, i64 %.084104.us.us.us.us
  %30 = load i8, ptr %29, align 1, !tbaa !5
  %31 = uitofp i8 %30 to float
  %32 = load float, ptr %18, align 4, !tbaa !8
  %33 = load float, ptr %19, align 4, !tbaa !8
  %34 = tail call float @llvm.fmuladd.f32(float %31, float %32, float %33)
  %35 = fadd float %28, %34
  %36 = load float, ptr %20, align 4, !tbaa !8
  %37 = load float, ptr %21, align 4, !tbaa !8
  %38 = tail call noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef %35, float noundef %36, float noundef %37, i32 noundef 0, i32 noundef %.)
  %39 = getelementptr inbounds i8, ptr %.180106.us.us.us.us, i64 %.084104.us.us.us.us
  store i8 %38, ptr %39, align 1, !tbaa !5
  %40 = add nuw i64 %.084104.us.us.us.us, 1
  %exitcond168.not = icmp eq i64 %40, %11
  br i1 %exitcond168.not, label %._crit_edge.us112.us.us.us, label %22, !llvm.loop !10

._crit_edge.us112.us.us.us:                       ; preds = %22
  %41 = getelementptr inbounds i8, ptr %.1108.us.us.us.us, i64 %11
  %42 = getelementptr inbounds i8, ptr %.174107.us.us.us.us, i64 %11
  %43 = getelementptr inbounds i8, ptr %.180106.us.us.us.us, i64 %11
  %44 = add nuw i64 %.085105.us.us.us.us, 1
  %exitcond169.not = icmp eq i64 %44, %10
  br i1 %exitcond169.not, label %..loopexit_crit_edge.split.us.us.us.us, label %.preheader.us.us.us.us, !llvm.loop !12

..loopexit_crit_edge.split.us.us.us.us:           ; preds = %._crit_edge.us112.us.us.us
  %45 = add nuw i64 %.086116.us.us.us, 1
  %exitcond170.not = icmp eq i64 %45, %9
  br i1 %exitcond170.not, label %._crit_edge, label %.preheader92.us.us.us, !llvm.loop !13

.lr.ph.split.split:                               ; preds = %.lr.ph.split
  %brmerge179 = or i1 %.not144, %.not145
  br i1 %brmerge179, label %._crit_edge, label %.preheader93.us.us

.preheader93.us.us:                               ; preds = %.lr.ph.split.split, %..loopexit94_crit_edge.split.us.us.us
  %.0119.us130.us = phi ptr [ %71, %..loopexit94_crit_edge.split.us.us.us ], [ %0, %.lr.ph.split.split ]
  %.073118.us131.us = phi ptr [ %72, %..loopexit94_crit_edge.split.us.us.us ], [ %3, %.lr.ph.split.split ]
  %.079117.us132.us = phi ptr [ %73, %..loopexit94_crit_edge.split.us.us.us ], [ %6, %.lr.ph.split.split ]
  %.086116.us133.us = phi i64 [ %75, %..loopexit94_crit_edge.split.us.us.us ], [ 0, %.lr.ph.split.split ]
  br label %.preheader91.us.us.us

.preheader91.us.us.us:                            ; preds = %._crit_edge.us.us.us, %.preheader93.us.us
  %.299.us.us.us = phi ptr [ %.0119.us130.us, %.preheader93.us.us ], [ %71, %._crit_edge.us.us.us ]
  %.27598.us.us.us = phi ptr [ %.073118.us131.us, %.preheader93.us.us ], [ %72, %._crit_edge.us.us.us ]
  %.07897.us.us.us = phi i64 [ 0, %.preheader93.us.us ], [ %74, %._crit_edge.us.us.us ]
  %.28196.us.us.us = phi ptr [ %.079117.us132.us, %.preheader93.us.us ], [ %73, %._crit_edge.us.us.us ]
  br label %46

46:                                               ; preds = %46, %.preheader91.us.us.us
  %.07795.us.us.us = phi i64 [ 0, %.preheader91.us.us.us ], [ %70, %46 ]
  %47 = getelementptr inbounds i8, ptr %.299.us.us.us, i64 %.07795.us.us.us
  %48 = load i8, ptr %47, align 1, !tbaa !5
  %49 = uitofp i8 %48 to float
  %50 = getelementptr inbounds float, ptr %1, i64 %.07795.us.us.us
  %51 = load float, ptr %50, align 4, !tbaa !8
  %52 = getelementptr inbounds float, ptr %2, i64 %.07795.us.us.us
  %53 = load float, ptr %52, align 4, !tbaa !8
  %54 = tail call float @llvm.fmuladd.f32(float %49, float %51, float %53)
  %55 = getelementptr inbounds i8, ptr %.27598.us.us.us, i64 %.07795.us.us.us
  %56 = load i8, ptr %55, align 1, !tbaa !5
  %57 = uitofp i8 %56 to float
  %58 = getelementptr inbounds float, ptr %4, i64 %.07795.us.us.us
  %59 = load float, ptr %58, align 4, !tbaa !8
  %60 = getelementptr inbounds float, ptr %5, i64 %.07795.us.us.us
  %61 = load float, ptr %60, align 4, !tbaa !8
  %62 = tail call float @llvm.fmuladd.f32(float %57, float %59, float %61)
  %63 = fadd float %54, %62
  %64 = getelementptr inbounds float, ptr %7, i64 %.07795.us.us.us
  %65 = load float, ptr %64, align 4, !tbaa !8
  %66 = getelementptr inbounds float, ptr %8, i64 %.07795.us.us.us
  %67 = load float, ptr %66, align 4, !tbaa !8
  %68 = tail call noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef %63, float noundef %65, float noundef %67, i32 noundef 0, i32 noundef %.)
  %69 = getelementptr inbounds i8, ptr %.28196.us.us.us, i64 %.07795.us.us.us
  store i8 %68, ptr %69, align 1, !tbaa !5
  %70 = add nuw i64 %.07795.us.us.us, 1
  %exitcond.not = icmp eq i64 %70, %10
  br i1 %exitcond.not, label %._crit_edge.us.us.us, label %46, !llvm.loop !14

._crit_edge.us.us.us:                             ; preds = %46
  %71 = getelementptr inbounds i8, ptr %.299.us.us.us, i64 %10
  %72 = getelementptr inbounds i8, ptr %.27598.us.us.us, i64 %10
  %73 = getelementptr inbounds i8, ptr %.28196.us.us.us, i64 %10
  %74 = add nuw i64 %.07897.us.us.us, 1
  %exitcond164.not = icmp eq i64 %74, %11
  br i1 %exitcond164.not, label %..loopexit94_crit_edge.split.us.us.us, label %.preheader91.us.us.us, !llvm.loop !15

..loopexit94_crit_edge.split.us.us.us:            ; preds = %._crit_edge.us.us.us
  %75 = add nuw i64 %.086116.us133.us, 1
  %exitcond165.not = icmp eq i64 %75, %9
  br i1 %exitcond165.not, label %._crit_edge, label %.preheader93.us.us, !llvm.loop !13

._crit_edge:                                      ; preds = %..loopexit94_crit_edge.split.us.us.us, %..loopexit_crit_edge.split.us.us.us.us, %.lr.ph.split.split, %.lr.ph.split.split.us, %14
  ret void

76:                                               ; preds = %.lr.ph
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 123, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base10SynetAdd8iEPKhPKfS4_S2_S4_S4_PhS4_S4_mmm20SimdTensorFormatType26SimdSynetCompatibilityType) #5
  unreachable
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8NarrowedE26SimdSynetCompatibilityType(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Simd4Base19SynetConvert32fTo8uEfffii(float noundef, float noundef, float noundef, i32 noundef, i32 noundef) local_unnamed_addr #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"float", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
!15 = distinct !{!15, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass