; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_instr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__func__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd = external hidden unnamed_addr constant [54 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@.str.9 = external hidden unnamed_addr constant [30 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd = external hidden unnamed_addr constant [316 x i8], align 1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_store_2dregblock_mmla_aarch64_asimd(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i8 noundef zeroext %10) #4 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i8, align 1
  %23 = alloca i32, align 4
  %24 = alloca [2 x i32], align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca [2 x i32], align 4
  %29 = alloca i32, align 4
  %30 = alloca [24 x i32], align 16
  %31 = alloca [2 x i32], align 4
  %32 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store i32 %3, ptr %15, align 4, !tbaa !9
  store i32 %4, ptr %16, align 4, !tbaa !9
  store i32 %5, ptr %17, align 4, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !9
  store i32 %7, ptr %19, align 4, !tbaa !9
  store i32 %8, ptr %20, align 4, !tbaa !9
  store i32 %9, ptr %21, align 4, !tbaa !9
  store i8 %10, ptr %22, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  store i32 0, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #5
  %33 = load i32, ptr %20, align 4, !tbaa !9
  %34 = udiv i32 %33, 2
  store i32 %34, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #5
  store i32 0, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #5
  store i32 0, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 96, ptr %30) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %30, ptr align 16 @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c, i64 96, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %31, ptr align 4 @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_instr_zip, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #5
  store i32 7, ptr %32, align 4, !tbaa !9
  %35 = load ptr, ptr %13, align 8, !tbaa !5
  %36 = load ptr, ptr %14, align 8, !tbaa !5
  %37 = load i32, ptr %18, align 4, !tbaa !9
  %38 = load i8, ptr %22, align 1, !tbaa !11
  %39 = icmp ne i8 %38, 0
  br i1 %39, label %40, label %43

40:                                               ; preds = %11
  %41 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  store i32 234887171, ptr %41, align 4, !tbaa !9
  %42 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  store i32 234903555, ptr %42, align 4, !tbaa !9
  store i32 5, ptr %32, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %40, %11
  %44 = load i32, ptr %19, align 4, !tbaa !9
  %45 = load i32, ptr %17, align 4, !tbaa !9
  %46 = udiv i32 %44, %45
  %47 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 0
  store i32 %46, ptr %47, align 4, !tbaa !9
  %48 = load i32, ptr %19, align 4, !tbaa !9
  %49 = load i32, ptr %17, align 4, !tbaa !9
  %50 = urem i32 %48, %49
  %51 = load i32, ptr %17, align 4, !tbaa !9
  %52 = udiv i32 %51, 2
  %53 = udiv i32 %50, %52
  %54 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 1
  store i32 %53, ptr %54, align 4, !tbaa !9
  %55 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 0
  %56 = load i32, ptr %55, align 4, !tbaa !9
  %57 = mul i32 %56, 16
  %58 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 1
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = mul i32 %59, 8
  %61 = add i32 %57, %60
  store i32 %61, ptr %29, align 4, !tbaa !9
  %62 = getelementptr inbounds [24 x i32], ptr %30, i64 0, i64 0
  %63 = load i32, ptr %62, align 16, !tbaa !9
  store i32 %63, ptr %23, align 4, !tbaa !9
  %64 = load i32, ptr %23, align 4, !tbaa !9
  %65 = sub i32 %64, 2
  %66 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  store i32 %65, ptr %66, align 4, !tbaa !9
  %67 = load i32, ptr %23, align 4, !tbaa !9
  %68 = sub i32 %67, 1
  %69 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  store i32 %68, ptr %69, align 4, !tbaa !9
  store i32 0, ptr %25, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %173, %43
  %71 = load i32, ptr %25, align 4, !tbaa !9
  %72 = load i32, ptr %26, align 4, !tbaa !9
  %73 = icmp ult i32 %71, %72
  br i1 %73, label %74, label %176

74:                                               ; preds = %70
  %75 = load ptr, ptr %12, align 8, !tbaa !5
  %76 = load i32, ptr %15, align 4, !tbaa !9
  %77 = load i32, ptr %16, align 4, !tbaa !9
  %78 = load i32, ptr %16, align 4, !tbaa !9
  %79 = load i32, ptr %21, align 4, !tbaa !9
  %80 = zext i32 %79 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %75, i32 noundef 4096, i32 noundef %76, i32 noundef %77, i32 noundef %78, i64 noundef %80)
  store i32 0, ptr %27, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %141, %74
  %82 = load i32, ptr %27, align 4, !tbaa !9
  %83 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 0
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = icmp ult i32 %82, %84
  br i1 %85, label %86, label %144

86:                                               ; preds = %81
  %87 = load ptr, ptr %12, align 8, !tbaa !5
  %88 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %89 = load i32, ptr %88, align 4, !tbaa !9
  %90 = load i32, ptr %25, align 4, !tbaa !9
  %91 = mul i32 8, %90
  %92 = load i32, ptr %27, align 4, !tbaa !9
  %93 = mul i32 2, %92
  %94 = add i32 %91, %93
  %95 = zext i32 %94 to i64
  %96 = getelementptr inbounds [24 x i32], ptr %30, i64 0, i64 %95
  %97 = load i32, ptr %96, align 4, !tbaa !9
  %98 = load i32, ptr %25, align 4, !tbaa !9
  %99 = mul i32 8, %98
  %100 = load i32, ptr %27, align 4, !tbaa !9
  %101 = mul i32 2, %100
  %102 = add i32 %99, %101
  %103 = add i32 %102, 1
  %104 = zext i32 %103 to i64
  %105 = getelementptr inbounds [24 x i32], ptr %30, i64 0, i64 %104
  %106 = load i32, ptr %105, align 4, !tbaa !9
  %107 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  %108 = load i32, ptr %107, align 4, !tbaa !9
  %109 = load i32, ptr %32, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %87, i32 noundef %89, i32 noundef %97, i32 noundef %106, i8 noundef zeroext 0, i32 noundef %108, i32 noundef %109)
  %110 = load ptr, ptr %12, align 8, !tbaa !5
  %111 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  %112 = load i32, ptr %111, align 4, !tbaa !9
  %113 = load i32, ptr %25, align 4, !tbaa !9
  %114 = mul i32 8, %113
  %115 = load i32, ptr %27, align 4, !tbaa !9
  %116 = mul i32 2, %115
  %117 = add i32 %114, %116
  %118 = zext i32 %117 to i64
  %119 = getelementptr inbounds [24 x i32], ptr %30, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !9
  %121 = load i32, ptr %25, align 4, !tbaa !9
  %122 = mul i32 8, %121
  %123 = load i32, ptr %27, align 4, !tbaa !9
  %124 = mul i32 2, %123
  %125 = add i32 %122, %124
  %126 = add i32 %125, 1
  %127 = zext i32 %126 to i64
  %128 = getelementptr inbounds [24 x i32], ptr %30, i64 0, i64 %127
  %129 = load i32, ptr %128, align 4, !tbaa !9
  %130 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  %131 = load i32, ptr %130, align 4, !tbaa !9
  %132 = load i32, ptr %32, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %110, i32 noundef %112, i32 noundef %120, i32 noundef %129, i8 noundef zeroext 0, i32 noundef %131, i32 noundef %132)
  %133 = load ptr, ptr %12, align 8, !tbaa !5
  %134 = load i32, ptr %15, align 4, !tbaa !9
  %135 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  %136 = load i32, ptr %135, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %133, i32 noundef 1006633990, i32 noundef %134, i32 noundef 127, i32 noundef 16, i32 noundef %136, i32 noundef 1)
  %137 = load ptr, ptr %12, align 8, !tbaa !5
  %138 = load i32, ptr %16, align 4, !tbaa !9
  %139 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  %140 = load i32, ptr %139, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %137, i32 noundef 1006633990, i32 noundef %138, i32 noundef 127, i32 noundef 16, i32 noundef %140, i32 noundef 1)
  br label %141

141:                                              ; preds = %86
  %142 = load i32, ptr %27, align 4, !tbaa !9
  %143 = add i32 %142, 1
  store i32 %143, ptr %27, align 4, !tbaa !9
  br label %81, !llvm.loop !12

144:                                              ; preds = %81
  store i32 0, ptr %27, align 4, !tbaa !9
  br label %145

145:                                              ; preds = %159, %144
  %146 = load i32, ptr %27, align 4, !tbaa !9
  %147 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 1
  %148 = load i32, ptr %147, align 4, !tbaa !9
  %149 = icmp ult i32 %146, %148
  br i1 %149, label %150, label %162

150:                                              ; preds = %145
  %151 = load ptr, ptr %12, align 8, !tbaa !5
  %152 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %153 = icmp ult i32 1, %152
  br i1 %153, label %154, label %156

154:                                              ; preds = %150
  %155 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %157

156:                                              ; preds = %150
  br label %157

157:                                              ; preds = %156, %154
  %158 = phi i32 [ %155, %154 ], [ 1, %156 ]
  call void @libxsmm_handle_error(ptr noundef %151, i32 noundef 90000, ptr noundef @__func__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd, ptr noundef @.str.1, i32 noundef 1582, i32 noundef %158)
  call void @__assert_fail(ptr noundef @.str.9, ptr noundef @.str.1, i32 noundef 1583, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd) #6
  unreachable

159:                                              ; No predecessors!
  %160 = load i32, ptr %27, align 4, !tbaa !9
  %161 = add i32 %160, 1
  store i32 %161, ptr %27, align 4, !tbaa !9
  br label %145, !llvm.loop !14

162:                                              ; preds = %145
  %163 = load ptr, ptr %12, align 8, !tbaa !5
  %164 = load i32, ptr %15, align 4, !tbaa !9
  %165 = load i32, ptr %16, align 4, !tbaa !9
  %166 = load i32, ptr %15, align 4, !tbaa !9
  %167 = load i32, ptr %21, align 4, !tbaa !9
  %168 = zext i32 %167 to i64
  %169 = mul i64 2, %168
  %170 = load i32, ptr %29, align 4, !tbaa !9
  %171 = zext i32 %170 to i64
  %172 = sub i64 %169, %171
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %163, i32 noundef 4096, i32 noundef %164, i32 noundef %165, i32 noundef %166, i64 noundef %172)
  br label %173

173:                                              ; preds = %162
  %174 = load i32, ptr %25, align 4, !tbaa !9
  %175 = add i32 %174, 1
  store i32 %175, ptr %25, align 4, !tbaa !9
  br label %70, !llvm.loop !15

176:                                              ; preds = %70
  %177 = load ptr, ptr %12, align 8, !tbaa !5
  %178 = load i32, ptr %15, align 4, !tbaa !9
  %179 = load i32, ptr %16, align 4, !tbaa !9
  %180 = load i32, ptr %15, align 4, !tbaa !9
  %181 = load i32, ptr %21, align 4, !tbaa !9
  %182 = zext i32 %181 to i64
  %183 = load i32, ptr %20, align 4, !tbaa !9
  %184 = zext i32 %183 to i64
  %185 = mul nsw i64 %182, %184
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %177, i32 noundef 4097, i32 noundef %178, i32 noundef %179, i32 noundef %180, i64 noundef %185)
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #5
  call void @llvm.lifetime.end.p0(i64 96, ptr %30) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  ret void
}

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_instr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__func__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd = external hidden unnamed_addr constant [54 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@.str.9 = external hidden unnamed_addr constant [30 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd = external hidden unnamed_addr constant [316 x i8], align 1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_store_2dregblock_mmla_aarch64_asimd(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i8 noundef zeroext %10) local_unnamed_addr #2 {
  %12 = lshr i32 %8, 1
  %.sroa.0.0.copyload = load i32, ptr @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_instr_zip, align 4
  %.sroa.5.0.copyload = load i32, ptr getelementptr inbounds (i8, ptr @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_instr_zip, i64 4), align 4
  %.not = icmp eq i8 %10, 0
  %.sroa.5.0 = select i1 %.not, i32 %.sroa.5.0.copyload, i32 234903555
  %.sroa.0.0 = select i1 %.not, i32 %.sroa.0.0.copyload, i32 234887171
  %.0 = select i1 %.not, i32 7, i32 5
  %13 = udiv i32 %7, %5
  %14 = urem i32 %7, %5
  %15 = load i32, ptr @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c, align 16, !tbaa !5
  %16 = add i32 %15, -2
  %17 = add i32 %15, -1
  %.not68 = icmp ult i32 %8, 2
  br i1 %.not68, label %.._crit_edge66_crit_edge, label %.lr.ph65

.._crit_edge66_crit_edge:                         ; preds = %11
  %.pre = zext i32 %9 to i64
  br label %._crit_edge66

.lr.ph65:                                         ; preds = %11
  %18 = lshr i32 %5, 1
  %19 = udiv i32 %14, %18
  %20 = shl i32 %19, 3
  %21 = shl i32 %13, 4
  %22 = add i32 %20, %21
  %23 = zext i32 %9 to i64
  %.not69 = icmp ugt i32 %5, %7
  %.not61 = icmp ugt i32 %18, %14
  %24 = shl nuw nsw i64 %23, 1
  %25 = zext i32 %22 to i64
  %26 = sub nsw i64 %24, %25
  br i1 %.not69, label %.lr.ph65.split, label %.lr.ph.us.preheader

.lr.ph.us.preheader:                              ; preds = %.lr.ph65
  %27 = zext i32 %13 to i64
  br label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.lr.ph.us.preheader, %29
  %.05963.us = phi i32 [ %30, %29 ], [ 0, %.lr.ph.us.preheader ]
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %4, i64 noundef %23) #3
  %28 = shl i32 %.05963.us, 3
  br label %31

29:                                               ; preds = %._crit_edge.us
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %3, i64 noundef %26) #3
  %30 = add nuw nsw i32 %.05963.us, 1
  %exitcond.not = icmp eq i32 %30, %12
  br i1 %exitcond.not, label %._crit_edge66, label %.lr.ph.us, !llvm.loop !9

31:                                               ; preds = %.lr.ph.us, %31
  %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %31 ]
  %32 = trunc nuw i64 %indvars.iv to i32
  %33 = shl i32 %32, 1
  %34 = add i32 %33, %28
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c, i64 0, i64 %35
  %37 = load i32, ptr %36, align 8, !tbaa !5
  %38 = or disjoint i32 %34, 1
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd.l_vr_c, i64 0, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !5
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.sroa.0.0, i32 noundef %37, i32 noundef %41, i8 noundef zeroext 0, i32 noundef %16, i32 noundef %.0) #3
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.sroa.5.0, i32 noundef %37, i32 noundef %41, i8 noundef zeroext 0, i32 noundef %17, i32 noundef %.0) #3
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1006633990, i32 noundef %3, i32 noundef 127, i32 noundef 16, i32 noundef %16, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1006633990, i32 noundef %4, i32 noundef 127, i32 noundef 16, i32 noundef %17, i32 noundef 1) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %42 = icmp ult i64 %indvars.iv.next, %27
  br i1 %42, label %31, label %._crit_edge.us, !llvm.loop !11

._crit_edge.us:                                   ; preds = %31
  br i1 %.not61, label %29, label %.split.us

.lr.ph65.split:                                   ; preds = %.lr.ph65
  br i1 %.not61, label %.lr.ph65.split.split.us, label %.lr.ph65.split.split

.lr.ph65.split.split.us:                          ; preds = %.lr.ph65.split, %.lr.ph65.split.split.us
  %.05963.us67 = phi i32 [ %43, %.lr.ph65.split.split.us ], [ 0, %.lr.ph65.split ]
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %4, i64 noundef %23) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %3, i64 noundef %26) #3
  %43 = add nuw nsw i32 %.05963.us67, 1
  %exitcond72.not = icmp eq i32 %43, %12
  br i1 %exitcond72.not, label %._crit_edge66, label %.lr.ph65.split.split.us, !llvm.loop !9

.lr.ph65.split.split:                             ; preds = %.lr.ph65.split
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %4, i64 noundef %23) #3
  br label %.split.us

.split.us:                                        ; preds = %._crit_edge.us, %.lr.ph65.split.split
  %44 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !5
  %45 = icmp ugt i32 %44, 1
  %46 = load i32, ptr @libxsmm_verbosity, align 4
  %47 = select i1 %45, i32 %46, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd, ptr noundef nonnull @.str.1, i32 noundef 1582, i32 noundef %47) #3
  tail call void @__assert_fail(ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.1, i32 noundef 1583, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_store_2dregblock_mmla_aarch64_asimd) #4
  unreachable

._crit_edge66:                                    ; preds = %29, %.lr.ph65.split.split.us, %.._crit_edge66_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.._crit_edge66_crit_edge ], [ %23, %.lr.ph65.split.split.us ], [ %23, %29 ]
  %48 = zext i32 %8 to i64
  %49 = mul nuw nsw i64 %.pre-phi, %48
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %3, i32 noundef %4, i32 noundef %3, i64 noundef %49) #3
  ret void
}

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass