; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_struct_move.simd = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_struct_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca [8 x i32], align 16
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %9, ptr align 16 @__const.test_asimd_struct_move.simd, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %12, ptr noundef %13)
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = icmp eq i32 %14, 222347266
  br i1 %15, label %16, label %54

16:                                               ; preds = %3
  store i8 32, ptr %7, align 1, !tbaa !11
  br label %17

17:                                               ; preds = %50, %16
  %18 = load i8, ptr %7, align 1, !tbaa !11
  %19 = zext i8 %18 to i32
  %20 = icmp slt i32 %19, 64
  br i1 %20, label %21, label %53

21:                                               ; preds = %17
  store i8 0, ptr %10, align 1, !tbaa !11
  br label %22

22:                                               ; preds = %46, %21
  %23 = load i8, ptr %10, align 1, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = icmp slt i32 %24, 32
  br i1 %25, label %26, label %49

26:                                               ; preds = %22
  store i8 0, ptr %11, align 1, !tbaa !11
  br label %27

27:                                               ; preds = %42, %26
  %28 = load i8, ptr %11, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  %30 = icmp slt i32 %29, 8
  br i1 %30, label %31, label %45

31:                                               ; preds = %27
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = load i8, ptr %7, align 1, !tbaa !11
  %35 = zext i8 %34 to i32
  %36 = load i8, ptr %10, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = load i8, ptr %11, align 1, !tbaa !11
  %39 = zext i8 %38 to i64
  %40 = getelementptr inbounds [8 x i32], ptr %9, i64 0, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %32, i32 noundef %33, i32 noundef %35, i32 noundef 127, i32 noundef %37, i32 noundef %41)
  br label %42

42:                                               ; preds = %31
  %43 = load i8, ptr %11, align 1, !tbaa !11
  %44 = add i8 %43, 1
  store i8 %44, ptr %11, align 1, !tbaa !11
  br label %27, !llvm.loop !12

45:                                               ; preds = %27
  br label %46

46:                                               ; preds = %45
  %47 = load i8, ptr %10, align 1, !tbaa !11
  %48 = add i8 %47, 1
  store i8 %48, ptr %10, align 1, !tbaa !11
  br label %22, !llvm.loop !14

49:                                               ; preds = %22
  br label %50

50:                                               ; preds = %49
  %51 = load i8, ptr %7, align 1, !tbaa !11
  %52 = add i8 %51, 1
  store i8 %52, ptr %7, align 1, !tbaa !11
  br label %17, !llvm.loop !15

53:                                               ; preds = %17
  br label %103

54:                                               ; preds = %3
  store i8 32, ptr %7, align 1, !tbaa !11
  br label %55

55:                                               ; preds = %99, %54
  %56 = load i8, ptr %7, align 1, !tbaa !11
  %57 = zext i8 %56 to i32
  %58 = icmp slt i32 %57, 64
  br i1 %58, label %59, label %102

59:                                               ; preds = %55
  store i8 32, ptr %8, align 1, !tbaa !11
  br label %60

60:                                               ; preds = %95, %59
  %61 = load i8, ptr %8, align 1, !tbaa !11
  %62 = zext i8 %61 to i32
  %63 = icmp slt i32 %62, 64
  br i1 %63, label %64, label %98

64:                                               ; preds = %60
  store i8 0, ptr %10, align 1, !tbaa !11
  br label %65

65:                                               ; preds = %91, %64
  %66 = load i8, ptr %10, align 1, !tbaa !11
  %67 = zext i8 %66 to i32
  %68 = icmp slt i32 %67, 32
  br i1 %68, label %69, label %94

69:                                               ; preds = %65
  store i8 0, ptr %11, align 1, !tbaa !11
  br label %70

70:                                               ; preds = %87, %69
  %71 = load i8, ptr %11, align 1, !tbaa !11
  %72 = zext i8 %71 to i32
  %73 = icmp slt i32 %72, 8
  br i1 %73, label %74, label %90

74:                                               ; preds = %70
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = load i32, ptr %6, align 4, !tbaa !9
  %77 = load i8, ptr %7, align 1, !tbaa !11
  %78 = zext i8 %77 to i32
  %79 = load i8, ptr %8, align 1, !tbaa !11
  %80 = zext i8 %79 to i32
  %81 = load i8, ptr %10, align 1, !tbaa !11
  %82 = zext i8 %81 to i32
  %83 = load i8, ptr %11, align 1, !tbaa !11
  %84 = zext i8 %83 to i64
  %85 = getelementptr inbounds [8 x i32], ptr %9, i64 0, i64 %84
  %86 = load i32, ptr %85, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %75, i32 noundef %76, i32 noundef %78, i32 noundef %80, i32 noundef %82, i32 noundef %86)
  br label %87

87:                                               ; preds = %74
  %88 = load i8, ptr %11, align 1, !tbaa !11
  %89 = add i8 %88, 1
  store i8 %89, ptr %11, align 1, !tbaa !11
  br label %70, !llvm.loop !16

90:                                               ; preds = %70
  br label %91

91:                                               ; preds = %90
  %92 = load i8, ptr %10, align 1, !tbaa !11
  %93 = add i8 %92, 1
  store i8 %93, ptr %10, align 1, !tbaa !11
  br label %65, !llvm.loop !17

94:                                               ; preds = %65
  br label %95

95:                                               ; preds = %94
  %96 = load i8, ptr %8, align 1, !tbaa !11
  %97 = add i8 %96, 1
  store i8 %97, ptr %8, align 1, !tbaa !11
  br label %60, !llvm.loop !18

98:                                               ; preds = %60
  br label %99

99:                                               ; preds = %98
  %100 = load i8, ptr %7, align 1, !tbaa !11
  %101 = add i8 %100, 1
  store i8 %101, ptr %7, align 1, !tbaa !11
  br label %55, !llvm.loop !19

102:                                              ; preds = %55
  br label %103

103:                                              ; preds = %102, %53
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %104, ptr noundef %105)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}
!17 = distinct !{!17, !13}
!18 = distinct !{!18, !13}
!19 = distinct !{!19, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_struct_move.simd = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_struct_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %4 = icmp eq i32 %2, 222347266
  %.pre85.pre = load i32, ptr @__const.test_asimd_struct_move.simd, align 16, !tbaa !5
  %.pre86.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 4), align 4, !tbaa !5
  %.pre87.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 8), align 8, !tbaa !5
  %.pre88.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 12), align 4, !tbaa !5
  %.pre89.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 16), align 16, !tbaa !5
  %.pre90.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 20), align 4, !tbaa !5
  %.pre91.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 24), align 8, !tbaa !5
  %.pre92.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_struct_move.simd, i64 28), align 4, !tbaa !5
  br i1 %4, label %.preheader41, label %.preheader45

.preheader41:                                     ; preds = %3, %5
  %indvars.iv74 = phi i32 [ %indvars.iv.next75, %5 ], [ 32, %3 ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader41, %.preheader
  %indvars.iv70 = phi i32 [ 0, %.preheader41 ], [ %indvars.iv.next71, %.preheader ]
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre85.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre86.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre87.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre88.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre89.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre90.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre91.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef 222347266, i32 noundef %indvars.iv74, i32 noundef 127, i32 noundef %indvars.iv70, i32 noundef %.pre92.pre) #2
  %indvars.iv.next71 = add nuw nsw i32 %indvars.iv70, 1
  %exitcond73.not = icmp eq i32 %indvars.iv.next71, 32
  br i1 %exitcond73.not, label %5, label %.preheader, !llvm.loop !9

5:                                                ; preds = %.preheader
  %indvars.iv.next75 = add nuw nsw i32 %indvars.iv74, 1
  %exitcond77.not = icmp eq i32 %indvars.iv.next75, 64
  br i1 %exitcond77.not, label %.loopexit, label %.preheader41, !llvm.loop !11

.preheader45:                                     ; preds = %3, %7
  %indvars.iv62 = phi i32 [ %indvars.iv.next63, %7 ], [ 32, %3 ]
  br label %.preheader44

.preheader44:                                     ; preds = %.preheader45, %6
  %indvars.iv58 = phi i32 [ 32, %.preheader45 ], [ %indvars.iv.next59, %6 ]
  br label %.preheader43

.preheader43:                                     ; preds = %.preheader44, %.preheader43
  %indvars.iv = phi i32 [ 0, %.preheader44 ], [ %indvars.iv.next, %.preheader43 ]
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre85.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre86.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre87.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre88.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre89.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre90.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre91.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv62, i32 noundef %indvars.iv58, i32 noundef %indvars.iv, i32 noundef %.pre92.pre) #2
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, 32
  br i1 %exitcond.not, label %6, label %.preheader43, !llvm.loop !12

6:                                                ; preds = %.preheader43
  %indvars.iv.next59 = add nuw nsw i32 %indvars.iv58, 1
  %exitcond61.not = icmp eq i32 %indvars.iv.next59, 64
  br i1 %exitcond61.not, label %7, label %.preheader44, !llvm.loop !13

7:                                                ; preds = %6
  %indvars.iv.next63 = add nuw nsw i32 %indvars.iv62, 1
  %exitcond65.not = icmp eq i32 %indvars.iv.next63, 64
  br i1 %exitcond65.not, label %.loopexit, label %.preheader45, !llvm.loop !14

.loopexit:                                        ; preds = %7, %5
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass