; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseWarpAffine)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::WarpAffParam" = type { i32, [6 x float], [6 x float], [4 x i8], i64, i64, i64, i64, i64, i64, i64, i64 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base14WarpAffineInitEmmmmmmmPKf19SimdWarpAffineFlagsPKh(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7, i32 noundef %8, ptr noundef %9) #1 personality ptr @__gxx_personality_v0 {
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  %22 = alloca %"struct.Simd::WarpAffParam", align 8
  %23 = alloca i32, align 4
  %24 = alloca ptr, align 8
  %25 = alloca i32, align 4
  store i64 %0, ptr %12, align 8, !tbaa !5
  store i64 %1, ptr %13, align 8, !tbaa !5
  store i64 %2, ptr %14, align 8, !tbaa !5
  store i64 %3, ptr %15, align 8, !tbaa !5
  store i64 %4, ptr %16, align 8, !tbaa !5
  store i64 %5, ptr %17, align 8, !tbaa !5
  store i64 %6, ptr %18, align 8, !tbaa !5
  store ptr %7, ptr %19, align 8, !tbaa !9
  store i32 %8, ptr %20, align 4, !tbaa !11
  store ptr %9, ptr %21, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 120, ptr %22) #5
  %26 = load i64, ptr %12, align 8, !tbaa !5
  %27 = load i64, ptr %13, align 8, !tbaa !5
  %28 = load i64, ptr %14, align 8, !tbaa !5
  %29 = load i64, ptr %15, align 8, !tbaa !5
  %30 = load i64, ptr %16, align 8, !tbaa !5
  %31 = load i64, ptr %17, align 8, !tbaa !5
  %32 = load i64, ptr %18, align 8, !tbaa !5
  %33 = load ptr, ptr %19, align 8, !tbaa !9
  %34 = load i32, ptr %20, align 4, !tbaa !11
  %35 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN4Simd12WarpAffParamC1EmmmmmmmPKf19SimdWarpAffineFlagsPKhm(ptr noundef nonnull align 8 dereferenceable(120) %22, i64 noundef %26, i64 noundef %27, i64 noundef %28, i64 noundef %29, i64 noundef %30, i64 noundef %31, i64 noundef %32, ptr noundef %33, i32 noundef %34, ptr noundef %35, i64 noundef 1)
  %36 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(120) %22)
  br i1 %36, label %38, label %37

37:                                               ; preds = %10
  store ptr null, ptr %11, align 8
  store i32 1, ptr %23, align 4
  br label %57

38:                                               ; preds = %10
  %39 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam9IsNearestEv(ptr noundef nonnull align 8 dereferenceable(120) %22)
  br i1 %39, label %40, label %47

40:                                               ; preds = %38
  %41 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 208) #6
  invoke void @_ZN4Simd4Base17WarpAffineNearestC1ERKNS_12WarpAffParamE(ptr noundef nonnull align 8 dereferenceable(208) %41, ptr noundef nonnull align 8 dereferenceable(120) %22)
          to label %42 unwind label %43

42:                                               ; preds = %40
  store ptr %41, ptr %11, align 8
  store i32 1, ptr %23, align 4
  br label %57

43:                                               ; preds = %40
  %44 = landingpad { ptr, i32 }
          cleanup
  %45 = extractvalue { ptr, i32 } %44, 0
  store ptr %45, ptr %24, align 8
  %46 = extractvalue { ptr, i32 } %44, 1
  store i32 %46, ptr %25, align 4
  call void @_ZdlPvm(ptr noundef %41, i64 noundef 208) #7
  br label %59

47:                                               ; preds = %38
  %48 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam14IsByteBilinearEv(ptr noundef nonnull align 8 dereferenceable(120) %22)
  br i1 %48, label %49, label %56

49:                                               ; preds = %47
  %50 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 224) #6
  invoke void @_ZN4Simd4Base22WarpAffineByteBilinearC1ERKNS_12WarpAffParamE(ptr noundef nonnull align 8 dereferenceable(224) %50, ptr noundef nonnull align 8 dereferenceable(120) %22)
          to label %51 unwind label %52

51:                                               ; preds = %49
  store ptr %50, ptr %11, align 8
  store i32 1, ptr %23, align 4
  br label %57

52:                                               ; preds = %49
  %53 = landingpad { ptr, i32 }
          cleanup
  %54 = extractvalue { ptr, i32 } %53, 0
  store ptr %54, ptr %24, align 8
  %55 = extractvalue { ptr, i32 } %53, 1
  store i32 %55, ptr %25, align 4
  call void @_ZdlPvm(ptr noundef %50, i64 noundef 224) #7
  br label %59

56:                                               ; preds = %47
  store ptr null, ptr %11, align 8
  store i32 1, ptr %23, align 4
  br label %57

57:                                               ; preds = %56, %51, %42, %37
  call void @llvm.lifetime.end.p0(i64 120, ptr %22) #5
  %58 = load ptr, ptr %11, align 8
  ret ptr %58

59:                                               ; preds = %52, %43
  call void @llvm.lifetime.end.p0(i64 120, ptr %22) #5
  br label %60

60:                                               ; preds = %59
  %61 = load ptr, ptr %24, align 8
  %62 = load i32, ptr %25, align 4
  %63 = insertvalue { ptr, i32 } poison, ptr %61, 0
  %64 = insertvalue { ptr, i32 } %63, i32 %62, 1
  resume { ptr, i32 } %64
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(120)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam9IsNearestEv(ptr noundef nonnull align 8 dereferenceable(120)) #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam14IsByteBilinearEv(ptr noundef nonnull align 8 dereferenceable(120)) #2 align 2

declare void @_ZN4Simd12WarpAffParamC1EmmmmmmmPKf19SimdWarpAffineFlagsPKhm(ptr, i64, i64, i64, i64, i64, i64, i64, ptr, i32, ptr, i64)

declare void @_ZN4Simd4Base17WarpAffineNearestC1ERKNS_12WarpAffParamE(ptr, ptr)

declare void @_ZN4Simd4Base22WarpAffineByteBilinearC1ERKNS_12WarpAffParamE(ptr, ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS19SimdWarpAffineFlags", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::WarpAffParam" = type { i32, [6 x float], [6 x float], [4 x i8], i64, i64, i64, i64, i64, i64, i64, i64 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base14WarpAffineInitEmmmmmmmPKf19SimdWarpAffineFlagsPKh(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7, i32 noundef %8, ptr noundef %9) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %11 = alloca %"struct.Simd::WarpAffParam", align 8
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %11) #5
  call void @_ZN4Simd12WarpAffParamC1EmmmmmmmPKf19SimdWarpAffineFlagsPKhm(ptr noundef nonnull align 8 dereferenceable(120) %11, i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7, i32 noundef %8, ptr noundef %9, i64 noundef 1)
  %12 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(120) %11)
  br i1 %12, label %13, label %25

13:                                               ; preds = %10
  %14 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam9IsNearestEv(ptr noundef nonnull align 8 dereferenceable(120) %11)
  br i1 %14, label %15, label %19

15:                                               ; preds = %13
  %16 = call noalias noundef nonnull dereferenceable(208) ptr @_Znwm(i64 noundef 208) #6
  invoke void @_ZN4Simd4Base17WarpAffineNearestC1ERKNS_12WarpAffParamE(ptr noundef nonnull align 8 dereferenceable(208) %16, ptr noundef nonnull align 8 dereferenceable(120) %11)
          to label %25 unwind label %17

17:                                               ; preds = %15
  %18 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %16, i64 noundef 208) #7
  br label %26

19:                                               ; preds = %13
  %20 = call noundef zeroext i1 @_ZNK4Simd12WarpAffParam14IsByteBilinearEv(ptr noundef nonnull align 8 dereferenceable(120) %11)
  br i1 %20, label %21, label %25

21:                                               ; preds = %19
  %22 = call noalias noundef nonnull dereferenceable(224) ptr @_Znwm(i64 noundef 224) #6
  invoke void @_ZN4Simd4Base22WarpAffineByteBilinearC1ERKNS_12WarpAffParamE(ptr noundef nonnull align 8 dereferenceable(224) %22, ptr noundef nonnull align 8 dereferenceable(120) %11)
          to label %25 unwind label %23

23:                                               ; preds = %21
  %24 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %22, i64 noundef 224) #7
  br label %26

25:                                               ; preds = %19, %21, %15, %10
  %.013 = phi ptr [ null, %10 ], [ %16, %15 ], [ %22, %21 ], [ null, %19 ]
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %11) #5
  ret ptr %.013

26:                                               ; preds = %23, %17
  %.pn = phi { ptr, i32 } [ %18, %17 ], [ %24, %23 ]
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %11) #5
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam5ValidEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam9IsNearestEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd12WarpAffParam14IsByteBilinearEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2 align 2

declare void @_ZN4Simd12WarpAffParamC1EmmmmmmmPKf19SimdWarpAffineFlagsPKhm(ptr, i64, i64, i64, i64, i64, i64, i64, ptr, i32, ptr, i64) local_unnamed_addr

declare void @_ZN4Simd4Base17WarpAffineNearestC1ERKNS_12WarpAffParamE(ptr, ptr) local_unnamed_addr

declare void @_ZN4Simd4Base22WarpAffineByteBilinearC1ERKNS_12WarpAffParamE(ptr, ptr) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass