; LLVM IR from specinfo-ua/UAPKI :: library/uapkic/src (sha2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Sha2Ctx_st = type { i32, [128 x i8], %union.anon }
%union.anon = type { %struct.Sha512Ctx_st }
%struct.Sha512Ctx_st = type { [2 x i64], i64, [256 x i8], [8 x i64] }

; Function Attrs: nounwind uwtable
define dso_local i64 @sha2_get_block_size(ptr noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp ne ptr %4, null
  br i1 %5, label %6, label %15

6:                                                ; preds = %1
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.Sha2Ctx_st, ptr %7, i32 0, i32 0
  %9 = load i32, ptr %8, align 8, !tbaa !9
  switch i32 %9, label %14 [
    i32 0, label %10
    i32 1, label %11
    i32 2, label %12
    i32 3, label %13
  ]

10:                                               ; preds = %6
  store i64 64, ptr %2, align 8
  br label %16

11:                                               ; preds = %6
  store i64 64, ptr %2, align 8
  br label %16

12:                                               ; preds = %6
  store i64 128, ptr %2, align 8
  br label %16

13:                                               ; preds = %6
  store i64 128, ptr %2, align 8
  br label %16

14:                                               ; preds = %6
  store i64 0, ptr %2, align 8
  br label %16

15:                                               ; preds = %1
  store i64 0, ptr %2, align 8
  br label %16

16:                                               ; preds = %15, %14, %13, %12, %11, %10
  %17 = load i64, ptr %2, align 8
  ret i64 %17
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"Sha2Ctx_st", !11, i64 0, !7, i64 4, !7, i64 136}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@switch.table.sha2_get_block_size = private unnamed_addr constant [4 x i64] [i64 64, i64 64, i64 128, i64 128], align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local range(i64 0, 129) i64 @sha2_get_block_size(ptr noundef readonly %0) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %2

2:                                                ; preds = %1
  %3 = load i32, ptr %0, align 8, !tbaa !5
  %4 = icmp ult i32 %3, 4
  br i1 %4, label %switch.lookup, label %6

switch.lookup:                                    ; preds = %2
  %5 = zext nneg i32 %3 to i64
  %switch.gep = getelementptr inbounds [4 x i64], ptr @switch.table.sha2_get_block_size, i64 0, i64 %5
  %switch.load = load i64, ptr %switch.gep, align 8
  br label %6

6:                                                ; preds = %2, %switch.lookup, %1
  %.0 = phi i64 [ 0, %1 ], [ %switch.load, %switch.lookup ], [ 0, %2 ]
  ret i64 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"Sha2Ctx_st", !7, i64 0, !8, i64 4, !8, i64 136}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass