; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseResizerBicubic.ll (ZN4Simd4Base18ResizerByteBicubicC2ERKNS_8ResParamE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::ResizerByteBicubic" = type { %"class.Simd::Resizer", %"struct.Simd::Array", %"struct.Simd::Array", %"struct.Simd::Array", %"struct.Simd::Array", [4 x %"struct.Simd::Array"], i64, i64, i64 }
%"class.Simd::Resizer" = type { %"struct.Simd::Deletable", %"struct.Simd::ResParam" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ResParam" = type { i32, i32, i64, i64, i64, i64, i64, i64 }
%"struct.Simd::Array" = type { ptr, i64 }

@_ZTVN4Simd4Base18ResizerByteBicubicE = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18ResizerByteBicubicC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(216) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64) %7, ptr noundef nonnull align 8 dereferenceable(56) %8)
  store ptr getelementptr inbounds inrange(-16, 24) ({ [5 x ptr] }, ptr @_ZTVN4Simd4Base18ResizerByteBicubicE, i32 0, i32 0, i32 2), ptr %7, align 8, !tbaa !9
  %9 = getelementptr inbounds %"class.Simd::Base::ResizerByteBicubic", ptr %7, i32 0, i32 1
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %10 unwind label %26

10:                                               ; preds = %2
  %11 = getelementptr inbounds %"class.Simd::Base::ResizerByteBicubic", ptr %7, i32 0, i32 2
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %11, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %12 unwind label %30

12:                                               ; preds = %10
  %13 = getelementptr inbounds %"class.Simd::Base::ResizerByteBicubic", ptr %7, i32 0, i32 3
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %13, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %14 unwind label %34

14:                                               ; preds = %12
  %15 = getelementptr inbounds %"class.Simd::Base::ResizerByteBicubic", ptr %7, i32 0, i32 4
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %15, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %16 unwind label %38

16:                                               ; preds = %14
  %17 = getelementptr inbounds %"class.Simd::Base::ResizerByteBicubic", ptr %7, i32 0, i32 5
  %18 = getelementptr inbounds [4 x %"struct.Simd::Array"], ptr %17, i32 0, i32 0
  %19 = getelementptr inbounds %"struct.Simd::Array", ptr %18, i64 4
  br label %20

20:                                               ; preds = %22, %16
  %21 = phi ptr [ %18, %16 ], [ %23, %22 ]
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %21, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %22 unwind label %42

22:                                               ; preds = %20
  %23 = getelementptr inbounds %"struct.Simd::Array", ptr %21, i64 1
  %24 = icmp eq ptr %23, %19
  br i1 %24, label %25, label %20

25:                                               ; preds = %22
  ret void

26:                                               ; preds = %2
  %27 = landingpad { ptr, i32 }
          cleanup
  %28 = extractvalue { ptr, i32 } %27, 0
  store ptr %28, ptr %5, align 8
  %29 = extractvalue { ptr, i32 } %27, 1
  store i32 %29, ptr %6, align 4
  br label %55

30:                                               ; preds = %10
  %31 = landingpad { ptr, i32 }
          cleanup
  %32 = extractvalue { ptr, i32 } %31, 0
  store ptr %32, ptr %5, align 8
  %33 = extractvalue { ptr, i32 } %31, 1
  store i32 %33, ptr %6, align 4
  br label %54

34:                                               ; preds = %12
  %35 = landingpad { ptr, i32 }
          cleanup
  %36 = extractvalue { ptr, i32 } %35, 0
  store ptr %36, ptr %5, align 8
  %37 = extractvalue { ptr, i32 } %35, 1
  store i32 %37, ptr %6, align 4
  br label %53

38:                                               ; preds = %14
  %39 = landingpad { ptr, i32 }
          cleanup
  %40 = extractvalue { ptr, i32 } %39, 0
  store ptr %40, ptr %5, align 8
  %41 = extractvalue { ptr, i32 } %39, 1
  store i32 %41, ptr %6, align 4
  br label %52

42:                                               ; preds = %20
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %5, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %6, align 4
  %46 = icmp eq ptr %18, %21
  br i1 %46, label %51, label %47

47:                                               ; preds = %47, %42
  %48 = phi ptr [ %21, %42 ], [ %49, %47 ]
  %49 = getelementptr inbounds %"struct.Simd::Array", ptr %48, i64 -1
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %49) #4
  %50 = icmp eq ptr %49, %18
  br i1 %50, label %51, label %47

51:                                               ; preds = %47, %42
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %15) #4
  br label %52

52:                                               ; preds = %51, %38
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %13) #4
  br label %53

53:                                               ; preds = %52, %34
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #4
  br label %54

54:                                               ; preds = %53, %30
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %9) #4
  br label %55

55:                                               ; preds = %54, %26
  call void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %7) #4
  br label %56

56:                                               ; preds = %55
  %57 = load ptr, ptr %5, align 8
  %58 = load i32, ptr %6, align 4
  %59 = insertvalue { ptr, i32 } poison, ptr %57, 0
  %60 = insertvalue { ptr, i32 } %59, i32 %58, 1
  resume { ptr, i32 } %60
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4Simd4Base18ResizerByteBicubicE = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18ResizerByteBicubicC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(216) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  store ptr getelementptr inbounds inrange(-16, 24) (i8, ptr @_ZTVN4Simd4Base18ResizerByteBicubicE, i64 16), ptr %0, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 64
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %3, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %4 unwind label %11

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 80
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %5, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %6 unwind label %13

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 96
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %7, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %8 unwind label %15

8:                                                ; preds = %6
  %9 = getelementptr inbounds i8, ptr %0, i64 112
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader19.preheader unwind label %17

.preheader19.preheader:                           ; preds = %8
  %.ptr.ptr = getelementptr inbounds i8, ptr %0, i64 128
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader19.1 unwind label %19

.preheader19.1:                                   ; preds = %.preheader19.preheader
  %.ptr.ptr.1 = getelementptr inbounds i8, ptr %0, i64 144
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr.1, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader19.2 unwind label %.preheader.preheader

.preheader19.2:                                   ; preds = %.preheader19.1
  %.ptr.ptr.2 = getelementptr inbounds i8, ptr %0, i64 160
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr.2, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader19.3 unwind label %.preheader.preheader

.preheader19.3:                                   ; preds = %.preheader19.2
  %.ptr.ptr.3 = getelementptr inbounds i8, ptr %0, i64 176
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr.3, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %10 unwind label %.preheader.preheader

10:                                               ; preds = %.preheader19.3
  ret void

11:                                               ; preds = %2
  %12 = landingpad { ptr, i32 }
          cleanup
  br label %24

13:                                               ; preds = %4
  %14 = landingpad { ptr, i32 }
          cleanup
  br label %23

15:                                               ; preds = %6
  %16 = landingpad { ptr, i32 }
          cleanup
  br label %22

17:                                               ; preds = %8
  %18 = landingpad { ptr, i32 }
          cleanup
  br label %21

19:                                               ; preds = %.preheader19.preheader
  %lpad.thr_comm.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit

.preheader.preheader:                             ; preds = %.preheader19.1, %.preheader19.2, %.preheader19.3
  %.idx.lcssa.ph = phi i64 [ 176, %.preheader19.3 ], [ 160, %.preheader19.2 ], [ 144, %.preheader19.1 ]
  %lpad.thr_comm = landingpad { ptr, i32 }
          cleanup
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %.idx11 = phi i64 [ %.add12, %.preheader ], [ %.idx.lcssa.ph, %.preheader.preheader ]
  %.add12 = add nsw i64 %.idx11, -16
  %.ptr14 = getelementptr inbounds i8, ptr %0, i64 %.add12
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %.ptr14) #4
  %20 = icmp eq i64 %.add12, 128
  br i1 %20, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %.preheader, %19
  %lpad.phi26 = phi { ptr, i32 } [ %lpad.thr_comm.split-lp, %19 ], [ %lpad.thr_comm, %.preheader ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %9) #4
  br label %21

21:                                               ; preds = %.loopexit, %17
  %.pn = phi { ptr, i32 } [ %lpad.phi26, %.loopexit ], [ %18, %17 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #4
  br label %22

22:                                               ; preds = %21, %15
  %.pn.pn = phi { ptr, i32 } [ %.pn, %21 ], [ %16, %15 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %5) #4
  br label %23

23:                                               ; preds = %22, %13
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %22 ], [ %14, %13 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %3) #4
  br label %24

24:                                               ; preds = %23, %11
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %23 ], [ %12, %11 ]
  tail call void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %0) #4
  resume { ptr, i32 } %.pn.pn.pn.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass