; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseBFloat16.ll (ZN4Simd4Base17BFloat16ToFloat32EPKtmPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base17BFloat16ToFloat32EPKtmPf(ptr noundef %0, i64 noundef %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %9 = load i64, ptr %5, align 8, !tbaa !9
  %10 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %9, i64 noundef 4)
  store i64 %10, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %11

11:                                               ; preds = %56, %3
  %12 = load i64, ptr %8, align 8, !tbaa !9
  %13 = load i64, ptr %7, align 8, !tbaa !9
  %14 = icmp ult i64 %12, %13
  br i1 %14, label %15, label %59

15:                                               ; preds = %11
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = load i64, ptr %8, align 8, !tbaa !9
  %18 = add i64 %17, 0
  %19 = getelementptr inbounds i16, ptr %16, i64 %18
  %20 = load i16, ptr %19, align 2, !tbaa !11
  %21 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %20)
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = load i64, ptr %8, align 8, !tbaa !9
  %24 = add i64 %23, 0
  %25 = getelementptr inbounds float, ptr %22, i64 %24
  store float %21, ptr %25, align 4, !tbaa !13
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = load i64, ptr %8, align 8, !tbaa !9
  %28 = add i64 %27, 1
  %29 = getelementptr inbounds i16, ptr %26, i64 %28
  %30 = load i16, ptr %29, align 2, !tbaa !11
  %31 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %30)
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i64, ptr %8, align 8, !tbaa !9
  %34 = add i64 %33, 1
  %35 = getelementptr inbounds float, ptr %32, i64 %34
  store float %31, ptr %35, align 4, !tbaa !13
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = load i64, ptr %8, align 8, !tbaa !9
  %38 = add i64 %37, 2
  %39 = getelementptr inbounds i16, ptr %36, i64 %38
  %40 = load i16, ptr %39, align 2, !tbaa !11
  %41 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %40)
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = load i64, ptr %8, align 8, !tbaa !9
  %44 = add i64 %43, 2
  %45 = getelementptr inbounds float, ptr %42, i64 %44
  store float %41, ptr %45, align 4, !tbaa !13
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load i64, ptr %8, align 8, !tbaa !9
  %48 = add i64 %47, 3
  %49 = getelementptr inbounds i16, ptr %46, i64 %48
  %50 = load i16, ptr %49, align 2, !tbaa !11
  %51 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %50)
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = load i64, ptr %8, align 8, !tbaa !9
  %54 = add i64 %53, 3
  %55 = getelementptr inbounds float, ptr %52, i64 %54
  store float %51, ptr %55, align 4, !tbaa !13
  br label %56

56:                                               ; preds = %15
  %57 = load i64, ptr %8, align 8, !tbaa !9
  %58 = add i64 %57, 4
  store i64 %58, ptr %8, align 8, !tbaa !9
  br label %11, !llvm.loop !15

59:                                               ; preds = %11
  br label %60

60:                                               ; preds = %73, %59
  %61 = load i64, ptr %8, align 8, !tbaa !9
  %62 = load i64, ptr %5, align 8, !tbaa !9
  %63 = icmp ult i64 %61, %62
  br i1 %63, label %64, label %76

64:                                               ; preds = %60
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = load i64, ptr %8, align 8, !tbaa !9
  %67 = getelementptr inbounds i16, ptr %65, i64 %66
  %68 = load i16, ptr %67, align 2, !tbaa !11
  %69 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %68)
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = load i64, ptr %8, align 8, !tbaa !9
  %72 = getelementptr inbounds float, ptr %70, i64 %71
  store float %69, ptr %72, align 4, !tbaa !13
  br label %73

73:                                               ; preds = %64
  %74 = load i64, ptr %8, align 8, !tbaa !9
  %75 = add i64 %74, 1
  store i64 %75, ptr %8, align 8, !tbaa !9
  br label %60, !llvm.loop !17

76:                                               ; preds = %60
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base17BFloat16ToFloat32EPKtmPf(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #1 {
  %4 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 4)
  %.not = icmp eq i64 %4, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %3
  %.0.lcssa = phi i64 [ 0, %3 ], [ %25, %.lr.ph ]
  %5 = icmp ult i64 %.0.lcssa, %1
  br i1 %5, label %.lr.ph28, label %._crit_edge

.lr.ph:                                           ; preds = %3, %.lr.ph
  %.026 = phi i64 [ %25, %.lr.ph ], [ 0, %3 ]
  %6 = getelementptr inbounds i16, ptr %0, i64 %.026
  %7 = load i16, ptr %6, align 2, !tbaa !5
  %8 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %7)
  %9 = getelementptr inbounds float, ptr %2, i64 %.026
  store float %8, ptr %9, align 4, !tbaa !9
  %10 = or disjoint i64 %.026, 1
  %11 = getelementptr inbounds i16, ptr %0, i64 %10
  %12 = load i16, ptr %11, align 2, !tbaa !5
  %13 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %12)
  %14 = getelementptr inbounds float, ptr %2, i64 %10
  store float %13, ptr %14, align 4, !tbaa !9
  %15 = or disjoint i64 %.026, 2
  %16 = getelementptr inbounds i16, ptr %0, i64 %15
  %17 = load i16, ptr %16, align 2, !tbaa !5
  %18 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %17)
  %19 = getelementptr inbounds float, ptr %2, i64 %15
  store float %18, ptr %19, align 4, !tbaa !9
  %20 = or disjoint i64 %.026, 3
  %21 = getelementptr inbounds i16, ptr %0, i64 %20
  %22 = load i16, ptr %21, align 2, !tbaa !5
  %23 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %22)
  %24 = getelementptr inbounds float, ptr %2, i64 %20
  store float %23, ptr %24, align 4, !tbaa !9
  %25 = add i64 %.026, 4
  %26 = icmp ult i64 %25, %4
  br i1 %26, label %.lr.ph, label %.preheader, !llvm.loop !11

.lr.ph28:                                         ; preds = %.preheader, %.lr.ph28
  %.127 = phi i64 [ %31, %.lr.ph28 ], [ %.0.lcssa, %.preheader ]
  %27 = getelementptr inbounds i16, ptr %0, i64 %.127
  %28 = load i16, ptr %27, align 2, !tbaa !5
  %29 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %28)
  %30 = getelementptr inbounds float, ptr %2, i64 %.127
  store float %29, ptr %30, align 4, !tbaa !9
  %31 = add i64 %.127, 1
  %exitcond.not = icmp eq i64 %31, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph28, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph28, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) local_unnamed_addr #2

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass