; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_neoverse(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #0 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca [3 x i32], align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %19) #4
  call void @llvm.memset.p0.i64(ptr align 4 %19, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  %21 = load i32, ptr %12, align 4, !tbaa !9
  %22 = load ptr, ptr %10, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %22, i32 0, i32 2
  %24 = load i32, ptr %23, align 8, !tbaa !11
  %25 = udiv i32 %21, %24
  %26 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  store i32 %25, ptr %26, align 4, !tbaa !9
  %27 = load i32, ptr %12, align 4, !tbaa !9
  %28 = load ptr, ptr %10, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %28, i32 0, i32 2
  %30 = load i32, ptr %29, align 8, !tbaa !11
  %31 = urem i32 %27, %30
  %32 = load ptr, ptr %10, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %32, i32 0, i32 2
  %34 = load i32, ptr %33, align 8, !tbaa !11
  %35 = udiv i32 %34, 2
  %36 = udiv i32 %31, %35
  %37 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  store i32 %36, ptr %37, align 4, !tbaa !9
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %39, i32 0, i32 2
  %41 = load i32, ptr %40, align 8, !tbaa !11
  %42 = urem i32 %38, %41
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %43, i32 0, i32 2
  %45 = load i32, ptr %44, align 8, !tbaa !11
  %46 = udiv i32 %45, 2
  %47 = urem i32 %42, %46
  %48 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  store i32 %47, ptr %48, align 4, !tbaa !9
  %49 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = add i32 %50, %52
  %54 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = add i32 %53, %55
  store i32 %56, ptr %20, align 4, !tbaa !9
  %57 = load ptr, ptr %10, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %57, i32 0, i32 1
  %59 = load i32, ptr %58, align 4, !tbaa !15
  %60 = load i32, ptr %13, align 4, !tbaa !9
  %61 = load i32, ptr %20, align 4, !tbaa !9
  %62 = mul i32 %60, %61
  %63 = sub i32 %59, %62
  store i32 %63, ptr %17, align 4, !tbaa !9
  %64 = load i32, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %77, %7
  %66 = load i32, ptr %16, align 4, !tbaa !9
  %67 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = icmp ult i32 %66, %68
  br i1 %69, label %70, label %80

70:                                               ; preds = %65
  %71 = load ptr, ptr %8, align 8, !tbaa !5
  %72 = load ptr, ptr %9, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %72, i32 0, i32 1
  %74 = load i32, ptr %73, align 4, !tbaa !16
  %75 = load i32, ptr %16, align 4, !tbaa !9
  %76 = add i32 1, %75
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %71, i32 noundef 1010828294, i32 noundef %74, i32 noundef 127, i32 noundef 16, i32 noundef %76, i32 noundef 1)
  br label %77

77:                                               ; preds = %70
  %78 = load i32, ptr %16, align 4, !tbaa !9
  %79 = add i32 %78, 1
  store i32 %79, ptr %16, align 4, !tbaa !9
  br label %65, !llvm.loop !18

80:                                               ; preds = %65
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %96, %80
  %82 = load i32, ptr %16, align 4, !tbaa !9
  %83 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = icmp ult i32 %82, %84
  br i1 %85, label %86, label %99

86:                                               ; preds = %81
  %87 = load ptr, ptr %8, align 8, !tbaa !5
  %88 = load ptr, ptr %9, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %88, i32 0, i32 1
  %90 = load i32, ptr %89, align 4, !tbaa !16
  %91 = load i32, ptr %16, align 4, !tbaa !9
  %92 = add i32 1, %91
  %93 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = add i32 %92, %94
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %87, i32 noundef 1010828294, i32 noundef %90, i32 noundef 127, i32 noundef 8, i32 noundef %95, i32 noundef 6)
  br label %96

96:                                               ; preds = %86
  %97 = load i32, ptr %16, align 4, !tbaa !9
  %98 = add i32 %97, 1
  store i32 %98, ptr %16, align 4, !tbaa !9
  br label %81, !llvm.loop !20

99:                                               ; preds = %81
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %100

100:                                              ; preds = %118, %99
  %101 = load i32, ptr %16, align 4, !tbaa !9
  %102 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %103 = load i32, ptr %102, align 4, !tbaa !9
  %104 = icmp ult i32 %101, %103
  br i1 %104, label %105, label %121

105:                                              ; preds = %100
  %106 = load ptr, ptr %8, align 8, !tbaa !5
  %107 = load ptr, ptr %9, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %107, i32 0, i32 1
  %109 = load i32, ptr %108, align 4, !tbaa !16
  %110 = load i32, ptr %16, align 4, !tbaa !9
  %111 = add i32 1, %110
  %112 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %113 = load i32, ptr %112, align 4, !tbaa !9
  %114 = add i32 %111, %113
  %115 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %116 = load i32, ptr %115, align 4, !tbaa !9
  %117 = add i32 %114, %116
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %106, i32 noundef 1010828294, i32 noundef %109, i32 noundef 127, i32 noundef 4, i32 noundef %117, i32 noundef 4)
  br label %118

118:                                              ; preds = %105
  %119 = load i32, ptr %16, align 4, !tbaa !9
  %120 = add i32 %119, 1
  store i32 %120, ptr %16, align 4, !tbaa !9
  br label %100, !llvm.loop !21

121:                                              ; preds = %100
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %122

122:                                              ; preds = %337, %121
  %123 = load i32, ptr %15, align 4, !tbaa !9
  %124 = load i32, ptr %13, align 4, !tbaa !9
  %125 = icmp ult i32 %123, %124
  br i1 %125, label %126, label %340

126:                                              ; preds = %122
  %127 = load i32, ptr %13, align 4, !tbaa !9
  %128 = icmp ugt i32 %127, 6
  br i1 %128, label %129, label %171

129:                                              ; preds = %126
  %130 = load ptr, ptr %11, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %130, i32 0, i32 6
  %132 = load i32, ptr %131, align 1, !tbaa !22
  %133 = and i32 %132, 2
  %134 = icmp ugt i32 %133, 0
  br i1 %134, label %135, label %141

135:                                              ; preds = %129
  %136 = load i32, ptr %15, align 4, !tbaa !9
  %137 = load ptr, ptr %10, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %137, i32 0, i32 3
  %139 = load i32, ptr %138, align 4, !tbaa !25
  %140 = mul i32 %136, %139
  store i32 %140, ptr %18, align 4, !tbaa !9
  br label %151

141:                                              ; preds = %129
  %142 = load ptr, ptr %11, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %142, i32 0, i32 4
  %144 = load i32, ptr %143, align 1, !tbaa !26
  %145 = load i32, ptr %15, align 4, !tbaa !9
  %146 = mul i32 %144, %145
  %147 = load ptr, ptr %10, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %147, i32 0, i32 3
  %149 = load i32, ptr %148, align 4, !tbaa !25
  %150 = mul i32 %146, %149
  store i32 %150, ptr %18, align 4, !tbaa !9
  br label %151

151:                                              ; preds = %141, %135
  %152 = load ptr, ptr %8, align 8, !tbaa !5
  %153 = load ptr, ptr %9, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %153, i32 0, i32 24
  %155 = load i32, ptr %154, align 4, !tbaa !27
  %156 = load i32, ptr %18, align 4, !tbaa !9
  %157 = sext i32 %156 to i64
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %152, i32 noundef %155, i64 noundef %157)
  %158 = load ptr, ptr %8, align 8, !tbaa !5
  %159 = load ptr, ptr %9, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %159, i32 0, i32 3
  %161 = load i32, ptr %160, align 4, !tbaa !28
  %162 = load ptr, ptr %9, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %162, i32 0, i32 24
  %164 = load i32, ptr %163, align 4, !tbaa !27
  %165 = load ptr, ptr %10, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %165, i32 0, i32 3
  %167 = load i32, ptr %166, align 4, !tbaa !25
  %168 = icmp eq i32 %167, 4
  %169 = zext i1 %168 to i64
  %170 = select i1 %168, i32 4, i32 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %158, i32 noundef 1012942851, i32 noundef %161, i32 noundef %164, i32 noundef 0, i32 noundef 0, i32 noundef %170)
  br label %203

171:                                              ; preds = %126
  %172 = load i32, ptr %15, align 4, !tbaa !9
  %173 = icmp eq i32 %172, 0
  br i1 %173, label %174, label %185

174:                                              ; preds = %171
  %175 = load ptr, ptr %8, align 8, !tbaa !5
  %176 = load ptr, ptr %9, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %176, i32 0, i32 3
  %178 = load i32, ptr %177, align 4, !tbaa !28
  %179 = load ptr, ptr %10, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %179, i32 0, i32 3
  %181 = load i32, ptr %180, align 4, !tbaa !25
  %182 = icmp eq i32 %181, 4
  %183 = zext i1 %182 to i64
  %184 = select i1 %182, i32 4, i32 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %175, i32 noundef 1012942851, i32 noundef %178, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %184)
  br label %202

185:                                              ; preds = %171
  %186 = load ptr, ptr %8, align 8, !tbaa !5
  %187 = load ptr, ptr %9, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %187, i32 0, i32 3
  %189 = load i32, ptr %188, align 4, !tbaa !28
  %190 = load ptr, ptr %9, align 8, !tbaa !5
  %191 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %190, i32 0, i32 24
  %192 = load i32, ptr %191, align 4, !tbaa !27
  %193 = load i32, ptr %15, align 4, !tbaa !9
  %194 = sub i32 %193, 1
  %195 = add i32 %192, %194
  %196 = load ptr, ptr %10, align 8, !tbaa !5
  %197 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %196, i32 0, i32 3
  %198 = load i32, ptr %197, align 4, !tbaa !25
  %199 = icmp eq i32 %198, 4
  %200 = zext i1 %199 to i64
  %201 = select i1 %199, i32 4, i32 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %186, i32 noundef 1012942851, i32 noundef %189, i32 noundef %195, i32 noundef 0, i32 noundef 0, i32 noundef %201)
  br label %202

202:                                              ; preds = %185, %174
  br label %203

203:                                              ; preds = %202, %151
  %204 = load i32, ptr %15, align 4, !tbaa !9
  %205 = load i32, ptr %13, align 4, !tbaa !9
  %206 = sub i32 %205, 1
  %207 = icmp eq i32 %204, %206
  br i1 %207, label %208, label %229

208:                                              ; preds = %203
  %209 = load ptr, ptr %8, align 8, !tbaa !5
  %210 = load ptr, ptr %9, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %210, i32 0, i32 3
  %212 = load i32, ptr %211, align 4, !tbaa !28
  %213 = load ptr, ptr %9, align 8, !tbaa !5
  %214 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %213, i32 0, i32 23
  %215 = load i32, ptr %214, align 4, !tbaa !29
  %216 = load ptr, ptr %9, align 8, !tbaa !5
  %217 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %216, i32 0, i32 3
  %218 = load i32, ptr %217, align 4, !tbaa !28
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %209, i32 noundef 184549383, i32 noundef %212, i32 noundef %215, i32 noundef %218, i32 noundef 0, i32 noundef 0)
  %219 = load ptr, ptr %8, align 8, !tbaa !5
  %220 = load ptr, ptr %9, align 8, !tbaa !5
  %221 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %220, i32 0, i32 1
  %222 = load i32, ptr %221, align 4, !tbaa !16
  %223 = load ptr, ptr %9, align 8, !tbaa !5
  %224 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %223, i32 0, i32 22
  %225 = load i32, ptr %224, align 4, !tbaa !30
  %226 = load ptr, ptr %9, align 8, !tbaa !5
  %227 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %226, i32 0, i32 1
  %228 = load i32, ptr %227, align 4, !tbaa !16
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %219, i32 noundef 184549383, i32 noundef %222, i32 noundef %225, i32 noundef %228, i32 noundef 0, i32 noundef 0)
  br label %229

229:                                              ; preds = %208, %203
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %230

230:                                              ; preds = %252, %229
  %231 = load i32, ptr %16, align 4, !tbaa !9
  %232 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %233 = load i32, ptr %232, align 4, !tbaa !9
  %234 = icmp ult i32 %231, %233
  br i1 %234, label %235, label %255

235:                                              ; preds = %230
  %236 = load ptr, ptr %8, align 8, !tbaa !5
  %237 = load i32, ptr %16, align 4, !tbaa !9
  %238 = add i32 1, %237
  %239 = load i32, ptr %17, align 4, !tbaa !9
  %240 = load i32, ptr %16, align 4, !tbaa !9
  %241 = add i32 %239, %240
  %242 = load i32, ptr %20, align 4, !tbaa !9
  %243 = load i32, ptr %15, align 4, !tbaa !9
  %244 = mul i32 %242, %243
  %245 = add i32 %241, %244
  %246 = load ptr, ptr %10, align 8, !tbaa !5
  %247 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %246, i32 0, i32 3
  %248 = load i32, ptr %247, align 4, !tbaa !25
  %249 = icmp eq i32 %248, 4
  %250 = zext i1 %249 to i64
  %251 = select i1 %249, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %236, i32 noundef 260050959, i32 noundef %238, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %245, i32 noundef %251)
  br label %252

252:                                              ; preds = %235
  %253 = load i32, ptr %16, align 4, !tbaa !9
  %254 = add i32 %253, 1
  store i32 %254, ptr %16, align 4, !tbaa !9
  br label %230, !llvm.loop !31

255:                                              ; preds = %230
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %256

256:                                              ; preds = %301, %255
  %257 = load i32, ptr %16, align 4, !tbaa !9
  %258 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %259 = load i32, ptr %258, align 4, !tbaa !9
  %260 = icmp ult i32 %257, %259
  br i1 %260, label %261, label %304

261:                                              ; preds = %256
  %262 = load ptr, ptr %10, align 8, !tbaa !5
  %263 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %262, i32 0, i32 3
  %264 = load i32, ptr %263, align 4, !tbaa !25
  %265 = icmp eq i32 %264, 4
  br i1 %265, label %266, label %283

266:                                              ; preds = %261
  %267 = load ptr, ptr %8, align 8, !tbaa !5
  %268 = load i32, ptr %16, align 4, !tbaa !9
  %269 = add i32 1, %268
  %270 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %271 = load i32, ptr %270, align 4, !tbaa !9
  %272 = add i32 %269, %271
  %273 = load i32, ptr %17, align 4, !tbaa !9
  %274 = load i32, ptr %16, align 4, !tbaa !9
  %275 = add i32 %273, %274
  %276 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %277 = load i32, ptr %276, align 4, !tbaa !9
  %278 = add i32 %275, %277
  %279 = load i32, ptr %20, align 4, !tbaa !9
  %280 = load i32, ptr %15, align 4, !tbaa !9
  %281 = mul i32 %279, %280
  %282 = add i32 %278, %281
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %267, i32 noundef 260050959, i32 noundef %272, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %282, i32 noundef 4)
  br label %300

283:                                              ; preds = %261
  %284 = load ptr, ptr %8, align 8, !tbaa !5
  %285 = load i32, ptr %16, align 4, !tbaa !9
  %286 = add i32 1, %285
  %287 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %288 = load i32, ptr %287, align 4, !tbaa !9
  %289 = add i32 %286, %288
  %290 = load i32, ptr %17, align 4, !tbaa !9
  %291 = load i32, ptr %16, align 4, !tbaa !9
  %292 = add i32 %290, %291
  %293 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %294 = load i32, ptr %293, align 4, !tbaa !9
  %295 = add i32 %292, %294
  %296 = load i32, ptr %20, align 4, !tbaa !9
  %297 = load i32, ptr %15, align 4, !tbaa !9
  %298 = mul i32 %296, %297
  %299 = add i32 %295, %298
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %284, i32 noundef 1602228239, i32 noundef %289, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %299, i32 noundef 7)
  br label %300

300:                                              ; preds = %283, %266
  br label %301

301:                                              ; preds = %300
  %302 = load i32, ptr %16, align 4, !tbaa !9
  %303 = add i32 %302, 1
  store i32 %303, ptr %16, align 4, !tbaa !9
  br label %256, !llvm.loop !32

304:                                              ; preds = %256
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %305

305:                                              ; preds = %333, %304
  %306 = load i32, ptr %16, align 4, !tbaa !9
  %307 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 2
  %308 = load i32, ptr %307, align 4, !tbaa !9
  %309 = icmp ult i32 %306, %308
  br i1 %309, label %310, label %336

310:                                              ; preds = %305
  %311 = load ptr, ptr %8, align 8, !tbaa !5
  %312 = load i32, ptr %16, align 4, !tbaa !9
  %313 = add i32 1, %312
  %314 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %315 = load i32, ptr %314, align 4, !tbaa !9
  %316 = add i32 %313, %315
  %317 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %318 = load i32, ptr %317, align 4, !tbaa !9
  %319 = add i32 %316, %318
  %320 = load i32, ptr %17, align 4, !tbaa !9
  %321 = load i32, ptr %16, align 4, !tbaa !9
  %322 = add i32 %320, %321
  %323 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 0
  %324 = load i32, ptr %323, align 4, !tbaa !9
  %325 = add i32 %322, %324
  %326 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 1
  %327 = load i32, ptr %326, align 4, !tbaa !9
  %328 = add i32 %325, %327
  %329 = load i32, ptr %20, align 4, !tbaa !9
  %330 = load i32, ptr %15, align 4, !tbaa !9
  %331 = mul i32 %329, %330
  %332 = add i32 %328, %331
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %311, i32 noundef 1602228239, i32 noundef %319, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %332, i32 noundef 5)
  br label %333

333:                                              ; preds = %310
  %334 = load i32, ptr %16, align 4, !tbaa !9
  %335 = add i32 %334, 1
  store i32 %335, ptr %16, align 4, !tbaa !9
  br label %305, !llvm.loop !33

336:                                              ; preds = %305
  br label %337

337:                                              ; preds = %336
  %338 = load i32, ptr %15, align 4, !tbaa !9
  %339 = add i32 %338, 1
  store i32 %339, ptr %15, align 4, !tbaa !9
  br label %122, !llvm.loop !34

340:                                              ; preds = %122
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #3

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !13, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!13 = !{!"libxsmm_tile_config", !7, i64 0, !14, i64 2, !7, i64 4, !14, i64 6, !7, i64 8, !14, i64 10, !7, i64 12, !14, i64 14, !7, i64 16, !14, i64 18, !7, i64 20, !14, i64 22, !7, i64 24, !14, i64 26, !7, i64 28, !14, i64 30, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 4}
!16 = !{!17, !10, i64 4}
!17 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
!21 = distinct !{!21, !19}
!22 = !{!23, !10, i64 24}
!23 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !24, i64 33, !24, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!24 = !{!"long long", !7, i64 0}
!25 = !{!12, !10, i64 12}
!26 = !{!23, !10, i64 16}
!27 = !{!17, !10, i64 96}
!28 = !{!17, !10, i64 12}
!29 = !{!17, !10, i64 92}
!30 = !{!17, !10, i64 88}
!31 = distinct !{!31, !19}
!32 = distinct !{!32, !19}
!33 = distinct !{!33, !19}
!34 = distinct !{!34, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_neoverse(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #0 {
  %8 = getelementptr inbounds i8, ptr %2, i64 8
  %9 = load i32, ptr %8, align 8, !tbaa !5
  %10 = udiv i32 %4, %9
  %11 = urem i32 %4, %9
  %12 = lshr i32 %9, 1
  %13 = udiv i32 %11, %12
  %14 = urem i32 %11, %12
  %15 = add i32 %13, %10
  %16 = add i32 %15, %14
  %17 = getelementptr inbounds i8, ptr %2, i64 4
  %18 = load i32, ptr %17, align 4, !tbaa !13
  %19 = mul i32 %16, %5
  %20 = sub i32 %18, %19
  %.not151 = icmp ugt i32 %9, %4
  br i1 %.not151, label %.preheader135, label %.lr.ph

.lr.ph:                                           ; preds = %7
  %21 = getelementptr inbounds i8, ptr %1, i64 4
  br label %23

.preheader135:                                    ; preds = %23, %7
  %.not152 = icmp ugt i32 %12, %11
  br i1 %.not152, label %.preheader134, label %.lr.ph138

.lr.ph138:                                        ; preds = %.preheader135
  %22 = getelementptr inbounds i8, ptr %1, i64 4
  br label %28

23:                                               ; preds = %.lr.ph, %23
  %.0126136 = phi i32 [ 0, %.lr.ph ], [ %25, %23 ]
  %24 = load i32, ptr %21, align 4, !tbaa !14
  %25 = add nuw i32 %.0126136, 1
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %24, i32 noundef 127, i32 noundef 16, i32 noundef %25, i32 noundef 1) #2
  %26 = icmp ult i32 %25, %10
  br i1 %26, label %23, label %.preheader135, !llvm.loop !16

.preheader134:                                    ; preds = %28, %.preheader135
  %.not153 = icmp eq i32 %14, 0
  br i1 %.not153, label %.preheader133, label %.lr.ph140

.lr.ph140:                                        ; preds = %.preheader134
  %27 = getelementptr inbounds i8, ptr %1, i64 4
  br label %46

28:                                               ; preds = %.lr.ph138, %28
  %.1137 = phi i32 [ 0, %.lr.ph138 ], [ %30, %28 ]
  %29 = load i32, ptr %22, align 4, !tbaa !14
  %30 = add nuw i32 %.1137, 1
  %31 = add i32 %30, %10
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %29, i32 noundef 127, i32 noundef 8, i32 noundef %31, i32 noundef 6) #2
  %32 = icmp ult i32 %30, %13
  br i1 %32, label %28, label %.preheader134, !llvm.loop !18

.preheader133:                                    ; preds = %46, %.preheader134
  %.not154 = icmp eq i32 %5, 0
  br i1 %.not154, label %._crit_edge150, label %.lr.ph149

.lr.ph149:                                        ; preds = %.preheader133
  %33 = icmp ugt i32 %5, 6
  %34 = getelementptr inbounds i8, ptr %1, i64 12
  %35 = getelementptr inbounds i8, ptr %1, i64 96
  %36 = getelementptr inbounds i8, ptr %2, i64 12
  %37 = getelementptr inbounds i8, ptr %3, i64 24
  %38 = getelementptr inbounds i8, ptr %3, i64 16
  %39 = add i32 %5, -1
  %40 = getelementptr inbounds i8, ptr %1, i64 92
  %41 = getelementptr inbounds i8, ptr %1, i64 4
  %42 = getelementptr inbounds i8, ptr %1, i64 88
  %43 = add i32 %10, 1
  %44 = add i32 %20, %10
  %45 = add i32 %15, %20
  br label %51

46:                                               ; preds = %.lr.ph140, %46
  %.2139 = phi i32 [ 0, %.lr.ph140 ], [ %48, %46 ]
  %47 = load i32, ptr %27, align 4, !tbaa !14
  %48 = add nuw nsw i32 %.2139, 1
  %49 = add i32 %15, %48
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1010828294, i32 noundef %47, i32 noundef 127, i32 noundef 4, i32 noundef %49, i32 noundef 4) #2
  %50 = icmp ult i32 %48, %14
  br i1 %50, label %46, label %.preheader133, !llvm.loop !19

51:                                               ; preds = %.lr.ph149, %._crit_edge
  %.0127147 = phi i32 [ 0, %.lr.ph149 ], [ %121, %._crit_edge ]
  br i1 %33, label %52, label %71

52:                                               ; preds = %51
  %53 = load i32, ptr %37, align 1, !tbaa !20
  %54 = and i32 %53, 2
  %.not = icmp eq i32 %54, 0
  br i1 %.not, label %58, label %55

55:                                               ; preds = %52
  %56 = load i32, ptr %36, align 4, !tbaa !23
  %57 = mul i32 %56, %.0127147
  br label %63

58:                                               ; preds = %52
  %59 = load i32, ptr %38, align 1, !tbaa !24
  %60 = mul i32 %59, %.0127147
  %61 = load i32, ptr %36, align 4, !tbaa !23
  %62 = mul i32 %60, %61
  br label %63

63:                                               ; preds = %58, %55
  %.0 = phi i32 [ %57, %55 ], [ %62, %58 ]
  %64 = load i32, ptr %35, align 4, !tbaa !25
  %65 = sext i32 %.0 to i64
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %64, i64 noundef %65) #2
  %66 = load i32, ptr %34, align 4, !tbaa !26
  %67 = load i32, ptr %35, align 4, !tbaa !25
  %68 = load i32, ptr %36, align 4, !tbaa !23
  %69 = icmp eq i32 %68, 4
  %70 = select i1 %69, i32 4, i32 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %66, i32 noundef %67, i32 noundef 0, i32 noundef 0, i32 noundef %70) #2
  br label %85

71:                                               ; preds = %51
  %72 = icmp eq i32 %.0127147, 0
  %73 = load i32, ptr %34, align 4, !tbaa !26
  br i1 %72, label %74, label %78

74:                                               ; preds = %71
  %75 = load i32, ptr %36, align 4, !tbaa !23
  %76 = icmp eq i32 %75, 4
  %77 = select i1 %76, i32 4, i32 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %73, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %77) #2
  br label %85

78:                                               ; preds = %71
  %79 = load i32, ptr %35, align 4, !tbaa !25
  %80 = add i32 %.0127147, -1
  %81 = add i32 %80, %79
  %82 = load i32, ptr %36, align 4, !tbaa !23
  %83 = icmp eq i32 %82, 4
  %84 = select i1 %83, i32 4, i32 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %73, i32 noundef %81, i32 noundef 0, i32 noundef 0, i32 noundef %84) #2
  br label %85

85:                                               ; preds = %74, %78, %63
  %86 = icmp eq i32 %.0127147, %39
  br i1 %86, label %87, label %92

87:                                               ; preds = %85
  %88 = load i32, ptr %34, align 4, !tbaa !26
  %89 = load i32, ptr %40, align 4, !tbaa !27
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %88, i32 noundef %89, i32 noundef %88, i32 noundef 0, i32 noundef 0) #2
  %90 = load i32, ptr %41, align 4, !tbaa !14
  %91 = load i32, ptr %42, align 4, !tbaa !28
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %90, i32 noundef %91, i32 noundef %90, i32 noundef 0, i32 noundef 0) #2
  br label %92

92:                                               ; preds = %87, %85
  br i1 %.not151, label %.preheader132, label %.lr.ph142

.lr.ph142:                                        ; preds = %92
  %93 = mul i32 %.0127147, %16
  %94 = add i32 %93, %20
  br label %97

.preheader132:                                    ; preds = %97, %92
  br i1 %.not152, label %.preheader, label %.lr.ph144

.lr.ph144:                                        ; preds = %.preheader132
  %95 = mul i32 %.0127147, %16
  %96 = add i32 %44, %95
  br label %106

97:                                               ; preds = %.lr.ph142, %97
  %.3141 = phi i32 [ 0, %.lr.ph142 ], [ %98, %97 ]
  %98 = add nuw i32 %.3141, 1
  %99 = add i32 %94, %.3141
  %100 = load i32, ptr %36, align 4, !tbaa !23
  %101 = icmp eq i32 %100, 4
  %102 = select i1 %101, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 260050959, i32 noundef %98, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %99, i32 noundef %102) #2
  %103 = icmp ult i32 %98, %10
  br i1 %103, label %97, label %.preheader132, !llvm.loop !29

.preheader:                                       ; preds = %113, %.preheader132
  br i1 %.not153, label %._crit_edge, label %.lr.ph146

.lr.ph146:                                        ; preds = %.preheader
  %104 = mul i32 %.0127147, %16
  %105 = add i32 %45, %104
  br label %116

106:                                              ; preds = %.lr.ph144, %113
  %.4143 = phi i32 [ 0, %.lr.ph144 ], [ %114, %113 ]
  %107 = load i32, ptr %36, align 4, !tbaa !23
  %108 = icmp eq i32 %107, 4
  %109 = add i32 %43, %.4143
  %110 = add i32 %96, %.4143
  br i1 %108, label %111, label %112

111:                                              ; preds = %106
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 260050959, i32 noundef %109, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %110, i32 noundef 4) #2
  br label %113

112:                                              ; preds = %106
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 1602228239, i32 noundef %109, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %110, i32 noundef 7) #2
  br label %113

113:                                              ; preds = %111, %112
  %114 = add nuw i32 %.4143, 1
  %115 = icmp ult i32 %114, %13
  br i1 %115, label %106, label %.preheader, !llvm.loop !30

116:                                              ; preds = %.lr.ph146, %116
  %.5145 = phi i32 [ 0, %.lr.ph146 ], [ %117, %116 ]
  %117 = add nuw nsw i32 %.5145, 1
  %118 = add i32 %15, %117
  %119 = add i32 %105, %.5145
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 1602228239, i32 noundef %118, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %119, i32 noundef 5) #2
  %120 = icmp ult i32 %117, %14
  br i1 %120, label %116, label %._crit_edge, !llvm.loop !31

._crit_edge:                                      ; preds = %116, %.preheader
  %121 = add nuw i32 %.0127147, 1
  %exitcond.not = icmp eq i32 %121, %5
  br i1 %exitcond.not, label %._crit_edge150, label %51, !llvm.loop !32

._crit_edge150:                                   ; preds = %._crit_edge, %.preheader133
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !10, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !12, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !12, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"libxsmm_tile_config", !8, i64 0, !11, i64 2, !8, i64 4, !11, i64 6, !8, i64 8, !11, i64 10, !8, i64 12, !11, i64 14, !8, i64 16, !11, i64 18, !8, i64 20, !11, i64 22, !8, i64 24, !11, i64 26, !8, i64 28, !11, i64 30, !8, i64 32}
!11 = !{!"short", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!15, !7, i64 4}
!15 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = !{!21, !7, i64 24}
!21 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !22, i64 33, !22, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!22 = !{!"long long", !8, i64 0}
!23 = !{!6, !7, i64 12}
!24 = !{!21, !7, i64 16}
!25 = !{!15, !7, i64 96}
!26 = !{!15, !7, i64 12}
!27 = !{!15, !7, i64 92}
!28 = !{!15, !7, i64 88}
!29 = distinct !{!29, !17}
!30 = distinct !{!30, !17}
!31 = distinct !{!31, !17}
!32 = distinct !{!32, !17}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass