; LLVM IR from abeaumont/competitive-programming :: cses/1739.ll (Z5buildv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local global i32, align 4
@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  %6 = load i32, ptr @k, align 4, !tbaa !5
  %7 = sub nsw i32 %6, 1
  store i32 %7, ptr %1, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %49, %0
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %52

12:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %13 = load i32, ptr @k, align 4, !tbaa !5
  store i32 %13, ptr %3, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %45, %12
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = load i32, ptr @k, align 4, !tbaa !5
  %17 = mul nsw i32 2, %16
  %18 = icmp slt i32 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %14
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %48

20:                                               ; preds = %14
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = mul nsw i32 %21, 2
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %23) #2
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #2
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = load i32, ptr %1, align 4, !tbaa !5
  %30 = mul nsw i32 %29, 2
  %31 = add nsw i32 %30, 1
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %32) #2
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35) #2
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = add nsw i32 %28, %37
  %39 = load i32, ptr %1, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %40) #2
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #2
  store i32 %38, ptr %44, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %20
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %3, align 4, !tbaa !5
  br label %14, !llvm.loop !9

48:                                               ; preds = %19
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %1, align 4, !tbaa !5
  %51 = add nsw i32 %50, -1
  store i32 %51, ptr %1, align 4, !tbaa !5
  br label %8, !llvm.loop !11

52:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %53

53:                                               ; preds = %95, %52
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = load i32, ptr @k, align 4, !tbaa !5
  %56 = mul nsw i32 2, %55
  %57 = icmp slt i32 %54, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %53
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %98

59:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %60 = load i32, ptr @k, align 4, !tbaa !5
  %61 = sub nsw i32 %60, 1
  store i32 %61, ptr %5, align 4, !tbaa !5
  br label %62

62:                                               ; preds = %91, %59
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = icmp sgt i32 %63, 0
  br i1 %64, label %66, label %65

65:                                               ; preds = %62
  store i32 11, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %94

66:                                               ; preds = %62
  %67 = load i32, ptr %4, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %68) #2
  %70 = load i32, ptr %5, align 4, !tbaa !5
  %71 = mul nsw i32 %70, 2
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %72) #2
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %76) #2
  %78 = load i32, ptr %5, align 4, !tbaa !5
  %79 = mul nsw i32 %78, 2
  %80 = add nsw i32 %79, 1
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %81) #2
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = add nsw i32 %74, %83
  %85 = load i32, ptr %4, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %86) #2
  %88 = load i32, ptr %5, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %89) #2
  store i32 %84, ptr %90, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %66
  %92 = load i32, ptr %5, align 4, !tbaa !5
  %93 = add nsw i32 %92, -1
  store i32 %93, ptr %5, align 4, !tbaa !5
  br label %62, !llvm.loop !12

94:                                               ; preds = %65
  br label %95

95:                                               ; preds = %94
  %96 = load i32, ptr %4, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %4, align 4, !tbaa !5
  br label %53, !llvm.loop !13

98:                                               ; preds = %58
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local local_unnamed_addr global i32, align 4
@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildv() local_unnamed_addr #0 {
  %1 = load i32, ptr @k, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 1
  br i1 %2, label %.lr.ph27.preheader, label %.preheader23

.lr.ph27.preheader:                               ; preds = %0
  %3 = zext nneg i32 %1 to i64
  br label %.lr.ph27

.loopexit:                                        ; preds = %14, %.lr.ph27
  %4 = phi i32 [ %8, %.lr.ph27 ], [ %24, %14 ]
  %5 = icmp sgt i64 %indvars.iv33, 2
  br i1 %5, label %.lr.ph27, label %.preheader23, !llvm.loop !9

.preheader23:                                     ; preds = %.loopexit, %0
  %6 = phi i32 [ %1, %0 ], [ %4, %.loopexit ]
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.preheader, label %._crit_edge31

.lr.ph27:                                         ; preds = %.lr.ph27.preheader, %.loopexit
  %8 = phi i32 [ %1, %.lr.ph27.preheader ], [ %4, %.loopexit ]
  %indvars.iv33 = phi i64 [ %3, %.lr.ph27.preheader ], [ %indvars.iv.next34, %.loopexit ]
  %indvars.iv.next34 = add nsw i64 %indvars.iv33, -1
  %9 = shl nsw i32 %8, 1
  %10 = icmp slt i32 %8, %9
  br i1 %10, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph27
  %11 = shl nuw nsw i64 %indvars.iv.next34, 1
  %12 = or disjoint i64 %11, 1
  %13 = sext i32 %8 to i64
  br label %14

14:                                               ; preds = %.lr.ph, %14
  %indvars.iv = phi i64 [ %13, %.lr.ph ], [ %indvars.iv.next, %14 ]
  %15 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %11) #1
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %indvars.iv) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %12) #1
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = add nsw i32 %20, %17
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %indvars.iv.next34) #1
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv) #1
  store i32 %21, ptr %23, align 4, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %24 = load i32, ptr @k, align 4, !tbaa !5
  %25 = shl nsw i32 %24, 1
  %26 = sext i32 %25 to i64
  %27 = icmp slt i64 %indvars.iv.next, %26
  br i1 %27, label %14, label %.loopexit, !llvm.loop !11

.preheader:                                       ; preds = %.preheader23, %._crit_edge
  %28 = phi i32 [ %31, %._crit_edge ], [ %6, %.preheader23 ]
  %indvars.iv39 = phi i64 [ %indvars.iv.next40, %._crit_edge ], [ 0, %.preheader23 ]
  %29 = icmp sgt i32 %28, 1
  br i1 %29, label %.lr.ph29, label %._crit_edge

.lr.ph29:                                         ; preds = %.preheader
  %30 = zext nneg i32 %28 to i64
  br label %35

._crit_edge31:                                    ; preds = %._crit_edge, %.preheader23
  ret void

._crit_edge.loopexit:                             ; preds = %35
  %.pre = load i32, ptr @k, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %31 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %28, %.preheader ]
  %indvars.iv.next40 = add nuw nsw i64 %indvars.iv39, 1
  %32 = shl nsw i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = icmp slt i64 %indvars.iv.next40, %33
  br i1 %34, label %.preheader, label %._crit_edge31, !llvm.loop !12

35:                                               ; preds = %.lr.ph29, %35
  %indvars.iv36 = phi i64 [ %30, %.lr.ph29 ], [ %indvars.iv.next37, %35 ]
  %indvars.iv.next37 = add nsw i64 %indvars.iv36, -1
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %indvars.iv39) #1
  %37 = shl nuw nsw i64 %indvars.iv.next37, 1
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %37) #1
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %indvars.iv39) #1
  %41 = or disjoint i64 %37, 1
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %41) #1
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = add nsw i32 %43, %39
  %45 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %indvars.iv39) #1
  %46 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv.next37) #1
  store i32 %44, ptr %46, align 4, !tbaa !5
  %47 = icmp ugt i64 %indvars.iv36, 2
  br i1 %47, label %35, label %._crit_edge.loopexit, !llvm.loop !13
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass