; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array.0" = type { ptr, i64 }
%"class.Simd::Base::SynetMergedConvolution8i" = type { %"class.Simd::SynetMergedConvolution8i", %"struct.Simd::MergConvParam8i", i8, i8, i8, i8, i64, i64, [2 x i64], [5 x i64], [3 x %"struct.Simd::CvtParam"], %"struct.Simd::Array", [2 x %"struct.Simd::Array.1"], %"struct.Simd::Array.0", [2 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], %"struct.Simd::Base::SynetMergedConvolution8i::AlgParam", ptr, ptr, ptr, ptr, [2 x ptr], %"class.std::__cxx11::basic_string" }
%"class.Simd::SynetMergedConvolution8i" = type { %"struct.Simd::Deletable" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::MergConvParam8i" = type { i64, [3 x %"struct.Simd::ConvParam"] }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Base::SynetMergedConvolution8i::AlgParam" = type { i64, i64, [3 x i64], [3 x i64], [3 x i64], [2 x i64], [3 x i64], i64, i32, i32 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i22ReorderDepthwiseWeightERKNS_9ConvParamERNS_5ArrayIfEE(ptr noundef nonnull align 8 dereferenceable(1376) %0, ptr noundef nonnull align 8 dereferenceable(180) %1, ptr noundef nonnull align 8 dereferenceable(16) %2) #3 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca %"struct.Simd::Array.0", align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %20 = load ptr, ptr %4, align 8
  %21 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %20, i32 0, i32 17
  %22 = getelementptr inbounds %"struct.Simd::Base::SynetMergedConvolution8i::AlgParam", ptr %21, i32 0, i32 0
  %23 = load i64, ptr %22, align 8, !tbaa !9
  %24 = icmp eq i64 %23, 0
  br i1 %24, label %25, label %26

25:                                               ; preds = %3
  br label %120

26:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %27, i32 0, i32 5
  %29 = load i64, ptr %28, align 8, !tbaa !22
  store i64 %29, ptr %7, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %30, i32 0, i32 10
  %32 = load i64, ptr %31, align 8, !tbaa !28
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %33, i32 0, i32 11
  %35 = load i64, ptr %34, align 8, !tbaa !29
  %36 = mul i64 %32, %35
  store i64 %36, ptr %8, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %37 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %20, i32 0, i32 17
  %38 = getelementptr inbounds %"struct.Simd::Base::SynetMergedConvolution8i::AlgParam", ptr %37, i32 0, i32 0
  %39 = load i64, ptr %38, align 8, !tbaa !9
  store i64 %39, ptr %9, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 16, ptr %10) #4
  %40 = load i64, ptr %7, align 8, !tbaa !27
  %41 = load i64, ptr %9, align 8, !tbaa !27
  %42 = call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %40, i64 noundef %41)
  %43 = load i64, ptr %8, align 8, !tbaa !27
  %44 = mul i64 %42, %43
  call void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %10, i64 noundef %44, i1 noundef zeroext false, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = getelementptr inbounds %"struct.Simd::Array.0", ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !30
  store ptr %47, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %48 = getelementptr inbounds %"struct.Simd::Array.0", ptr %10, i32 0, i32 0
  %49 = load ptr, ptr %48, align 8, !tbaa !30
  store ptr %49, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  store i64 0, ptr %13, align 8, !tbaa !27
  br label %50

50:                                               ; preds = %113, %26
  %51 = load i64, ptr %13, align 8, !tbaa !27
  %52 = load i64, ptr %7, align 8, !tbaa !27
  %53 = icmp ult i64 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  br label %117

55:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %56 = load i64, ptr %9, align 8, !tbaa !27
  %57 = load i64, ptr %7, align 8, !tbaa !27
  %58 = load i64, ptr %13, align 8, !tbaa !27
  %59 = sub i64 %57, %58
  %60 = invoke noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %56, i64 noundef %59)
          to label %61 unwind label %67

61:                                               ; preds = %55
  store i64 %60, ptr %15, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  store i64 0, ptr %18, align 8, !tbaa !27
  br label %62

62:                                               ; preds = %109, %61
  %63 = load i64, ptr %18, align 8, !tbaa !27
  %64 = load i64, ptr %8, align 8, !tbaa !27
  %65 = icmp ult i64 %63, %64
  br i1 %65, label %71, label %66

66:                                               ; preds = %62
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  br label %112

67:                                               ; preds = %55
  %68 = landingpad { ptr, i32 }
          cleanup
  %69 = extractvalue { ptr, i32 } %68, 0
  store ptr %69, ptr %16, align 8
  %70 = extractvalue { ptr, i32 } %68, 1
  store i32 %70, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  br label %125

71:                                               ; preds = %62
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  store i64 0, ptr %19, align 8, !tbaa !27
  br label %72

72:                                               ; preds = %90, %71
  %73 = load i64, ptr %19, align 8, !tbaa !27
  %74 = load i64, ptr %15, align 8, !tbaa !27
  %75 = icmp ult i64 %73, %74
  br i1 %75, label %76, label %93

76:                                               ; preds = %72
  %77 = load ptr, ptr %11, align 8, !tbaa !5
  %78 = load i64, ptr %18, align 8, !tbaa !27
  %79 = load i64, ptr %7, align 8, !tbaa !27
  %80 = mul i64 %78, %79
  %81 = load i64, ptr %13, align 8, !tbaa !27
  %82 = add i64 %80, %81
  %83 = load i64, ptr %19, align 8, !tbaa !27
  %84 = add i64 %82, %83
  %85 = getelementptr inbounds float, ptr %77, i64 %84
  %86 = load float, ptr %85, align 4, !tbaa !31
  %87 = load ptr, ptr %12, align 8, !tbaa !5
  %88 = load i64, ptr %19, align 8, !tbaa !27
  %89 = getelementptr inbounds float, ptr %87, i64 %88
  store float %86, ptr %89, align 4, !tbaa !31
  br label %90

90:                                               ; preds = %76
  %91 = load i64, ptr %19, align 8, !tbaa !27
  %92 = add i64 %91, 1
  store i64 %92, ptr %19, align 8, !tbaa !27
  br label %72, !llvm.loop !33

93:                                               ; preds = %72
  br label %94

94:                                               ; preds = %102, %93
  %95 = load i64, ptr %19, align 8, !tbaa !27
  %96 = load i64, ptr %9, align 8, !tbaa !27
  %97 = icmp ult i64 %95, %96
  br i1 %97, label %98, label %105

98:                                               ; preds = %94
  %99 = load ptr, ptr %12, align 8, !tbaa !5
  %100 = load i64, ptr %19, align 8, !tbaa !27
  %101 = getelementptr inbounds float, ptr %99, i64 %100
  store float 0.000000e+00, ptr %101, align 4, !tbaa !31
  br label %102

102:                                              ; preds = %98
  %103 = load i64, ptr %19, align 8, !tbaa !27
  %104 = add i64 %103, 1
  store i64 %104, ptr %19, align 8, !tbaa !27
  br label %94, !llvm.loop !35

105:                                              ; preds = %94
  %106 = load i64, ptr %9, align 8, !tbaa !27
  %107 = load ptr, ptr %12, align 8, !tbaa !5
  %108 = getelementptr inbounds float, ptr %107, i64 %106
  store ptr %108, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  br label %109

109:                                              ; preds = %105
  %110 = load i64, ptr %18, align 8, !tbaa !27
  %111 = add i64 %110, 1
  store i64 %111, ptr %18, align 8, !tbaa !27
  br label %62, !llvm.loop !36

112:                                              ; preds = %66
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  br label %113

113:                                              ; preds = %112
  %114 = load i64, ptr %9, align 8, !tbaa !27
  %115 = load i64, ptr %13, align 8, !tbaa !27
  %116 = add i64 %115, %114
  store i64 %116, ptr %13, align 8, !tbaa !27
  br label %50, !llvm.loop !37

117:                                              ; preds = %54
  %118 = load ptr, ptr %6, align 8, !tbaa !5
  invoke void @_ZN4Simd5ArrayIfE4SwapERKS1_(ptr noundef nonnull align 8 dereferenceable(16) %118, ptr noundef nonnull align 8 dereferenceable(16) %10)
          to label %119 unwind label %121

119:                                              ; preds = %117
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %120

120:                                              ; preds = %119, %25
  ret void

121:                                              ; preds = %117
  %122 = landingpad { ptr, i32 }
          cleanup
  %123 = extractvalue { ptr, i32 } %122, 0
  store ptr %123, ptr %16, align 8
  %124 = extractvalue { ptr, i32 } %122, 1
  store i32 %124, ptr %17, align 4
  br label %125

125:                                              ; preds = %121, %67
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %126

126:                                              ; preds = %125
  %127 = load ptr, ptr %16, align 8
  %128 = load i32, ptr %17, align 4
  %129 = insertvalue { ptr, i32 } poison, ptr %127, 0
  %130 = insertvalue { ptr, i32 } %129, i32 %128, 1
  resume { ptr, i32 } %130
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE4SwapERKS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #0 align 2

attributes #0 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !14, i64 1152}
!10 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8iE", !11, i64 0, !13, i64 8, !15, i64 568, !15, i64 569, !15, i64 570, !15, i64 571, !14, i64 576, !14, i64 584, !7, i64 592, !7, i64 608, !7, i64 648, !16, i64 960, !7, i64 976, !17, i64 1008, !7, i64 1024, !7, i64 1056, !7, i64 1104, !18, i64 1152, !6, i64 1296, !6, i64 1304, !6, i64 1312, !6, i64 1320, !7, i64 1328, !20, i64 1344}
!11 = !{!"_ZTSN4Simd24SynetMergedConvolution8iE", !12, i64 0}
!12 = !{!"_ZTSN4Simd9DeletableE"}
!13 = !{!"_ZTSN4Simd15MergConvParam8iE", !14, i64 0, !7, i64 8}
!14 = !{!"long", !7, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !14, i64 8}
!17 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !14, i64 8}
!18 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8i8AlgParamE", !14, i64 0, !14, i64 8, !7, i64 16, !7, i64 40, !7, i64 64, !7, i64 88, !7, i64 104, !14, i64 128, !19, i64 136, !19, i64 140}
!19 = !{!"int", !7, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !14, i64 8, !7, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!22 = !{!23, !14, i64 32}
!23 = !{!"_ZTS25SimdConvolutionParameters", !14, i64 0, !14, i64 8, !14, i64 16, !24, i64 24, !25, i64 28, !14, i64 32, !14, i64 40, !14, i64 48, !24, i64 56, !25, i64 60, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !26, i64 152}
!24 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!25 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!26 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!27 = !{!14, !14, i64 0}
!28 = !{!23, !14, i64 64}
!29 = !{!23, !14, i64 72}
!30 = !{!17, !6, i64 0}
!31 = !{!32, !32, i64 0}
!32 = !{!"float", !7, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = distinct !{!35, !34}
!36 = distinct !{!36, !34}
!37 = distinct !{!37, !34}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array.0" = type { ptr, i64 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i22ReorderDepthwiseWeightERKNS_9ConvParamERNS_5ArrayIfEE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(1376) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(180) %1, ptr noundef nonnull align 8 dereferenceable(16) %2) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"struct.Simd::Array.0", align 8
  %5 = getelementptr inbounds i8, ptr %0, i64 1152
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %77, label %8

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %1, i64 32
  %10 = load i64, ptr %9, align 8, !tbaa !21
  %11 = getelementptr inbounds i8, ptr %1, i64 64
  %12 = load i64, ptr %11, align 8, !tbaa !26
  %13 = getelementptr inbounds i8, ptr %1, i64 72
  %14 = load i64, ptr %13, align 8, !tbaa !27
  %15 = mul i64 %14, %12
  %.fr63 = freeze i64 %15
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #5
  %16 = tail call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %10, i64 noundef %6)
  %17 = mul i64 %16, %.fr63
  call void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %4, i64 noundef %17, i1 noundef zeroext false, i64 noundef 8)
  %18 = load ptr, ptr %2, align 8, !tbaa !28
  %.not = icmp eq i64 %10, 0
  br i1 %.not, label %._crit_edge54, label %.lr.ph

.lr.ph:                                           ; preds = %8
  %.not64 = icmp eq i64 %.fr63, 0
  br i1 %.not64, label %.lr.ph.split, label %.preheader43.lr.ph.us.preheader

.preheader43.lr.ph.us.preheader:                  ; preds = %.lr.ph
  %19 = load ptr, ptr %4, align 8, !tbaa !28
  %20 = shl i64 %6, 2
  %21 = mul i64 %.fr63, %6
  %22 = shl i64 %21, 2
  %23 = add i64 %.fr63, -1
  %24 = mul i64 %6, %23
  %25 = shl i64 %24, 2
  %26 = shl i64 %6, 2
  %27 = mul i64 %10, %23
  %28 = shl i64 %27, 2
  %29 = getelementptr i8, ptr %18, i64 %28
  %stride.check = icmp slt i64 %20, 0
  %.mask = and i64 %10, 2305843009213693952
  %stride.check79 = icmp ne i64 %.mask, 0
  br label %.preheader43.lr.ph.us

.preheader43.lr.ph.us:                            ; preds = %.preheader43.lr.ph.us.preheader, %._crit_edge49.us
  %indvar = phi i64 [ 0, %.preheader43.lr.ph.us.preheader ], [ %indvar.next, %._crit_edge49.us ]
  %.03852.us = phi ptr [ %19, %.preheader43.lr.ph.us.preheader ], [ %.us-phi.us, %._crit_edge49.us ]
  %.04051.us = phi i64 [ 0, %.preheader43.lr.ph.us.preheader ], [ %38, %._crit_edge49.us ]
  %30 = mul i64 %26, %indvar
  %scevgep76 = getelementptr i8, ptr %18, i64 %30
  %31 = sub i64 %10, %.04051.us
  %32 = call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %6, i64 noundef %31)
  %invariant.gep.us = getelementptr float, ptr %18, i64 %.04051.us
  %.not65 = icmp eq i64 %32, 0
  br i1 %.not65, label %.preheader43.us56.preheader, label %.preheader43.us.us.preheader

.preheader43.us.us.preheader:                     ; preds = %.preheader43.lr.ph.us
  %scevgep77 = getelementptr i8, ptr %29, i64 %30
  %33 = shl i64 %32, 2
  %34 = sub i64 %20, %33
  %35 = icmp ult i64 %32, %6
  %scevgep74 = getelementptr i8, ptr %.03852.us, i64 %25
  %scevgep75 = getelementptr i8, ptr %scevgep74, i64 %33
  %scevgep78 = getelementptr i8, ptr %scevgep77, i64 %33
  %min.iters.check = icmp ult i64 %32, 8
  %bound0 = icmp ult ptr %.03852.us, %scevgep78
  %bound1 = icmp ult ptr %scevgep76, %scevgep75
  %found.conflict = and i1 %bound0, %bound1
  %36 = or i1 %found.conflict, %stride.check
  %37 = or i1 %36, %stride.check79
  %n.vec = and i64 %32, -8
  %cmp.n = icmp eq i64 %32, %n.vec
  %xtraiter = and i64 %32, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader43.us.us

.preheader43.us56.preheader:                      ; preds = %.preheader43.lr.ph.us
  call void @llvm.memset.p0.i64(ptr align 4 %.03852.us, i8 0, i64 %22, i1 false), !tbaa !29
  %scevgep71 = getelementptr i8, ptr %.03852.us, i64 %22
  br label %._crit_edge49.us

._crit_edge49.us:                                 ; preds = %._crit_edge.us.us, %.preheader43.us56.preheader
  %.us-phi.us = phi ptr [ %scevgep71, %.preheader43.us56.preheader ], [ %54, %._crit_edge.us.us ]
  %38 = add i64 %.04051.us, %6
  %39 = icmp ult i64 %38, %10
  %indvar.next = add i64 %indvar, 1
  br i1 %39, label %.preheader43.lr.ph.us, label %._crit_edge54, !llvm.loop !31

.preheader43.us.us:                               ; preds = %.preheader43.us.us.preheader, %._crit_edge.us.us
  %.03748.us.us = phi i64 [ %55, %._crit_edge.us.us ], [ 0, %.preheader43.us.us.preheader ]
  %.13947.us.us = phi ptr [ %54, %._crit_edge.us.us ], [ %.03852.us, %.preheader43.us.us.preheader ]
  %40 = mul i64 %20, %.03748.us.us
  %41 = add i64 %33, %40
  %scevgep = getelementptr i8, ptr %.03852.us, i64 %41
  %42 = mul i64 %.03748.us.us, %10
  %gep.us.us = getelementptr float, ptr %invariant.gep.us, i64 %42
  %brmerge = select i1 %min.iters.check, i1 true, i1 %37
  br i1 %brmerge, label %scalar.ph.preheader, label %vector.body

scalar.ph.preheader:                              ; preds = %.preheader43.us.us, %middle.block
  %.044.us.us.ph = phi i64 [ 0, %.preheader43.us.us ], [ %n.vec, %middle.block ]
  br i1 %lcmp.mod.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol

scalar.ph.prol:                                   ; preds = %scalar.ph.preheader, %scalar.ph.prol
  %.044.us.us.prol = phi i64 [ %46, %scalar.ph.prol ], [ %.044.us.us.ph, %scalar.ph.preheader ]
  %prol.iter = phi i64 [ %prol.iter.next, %scalar.ph.prol ], [ 0, %scalar.ph.preheader ]
  %43 = getelementptr float, ptr %gep.us.us, i64 %.044.us.us.prol
  %44 = load float, ptr %43, align 4, !tbaa !29
  %45 = getelementptr inbounds float, ptr %.13947.us.us, i64 %.044.us.us.prol
  store float %44, ptr %45, align 4, !tbaa !29
  %46 = add nuw i64 %.044.us.us.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol, !llvm.loop !33

scalar.ph.prol.loopexit:                          ; preds = %scalar.ph.prol, %scalar.ph.preheader
  %.044.us.us.unr = phi i64 [ %.044.us.us.ph, %scalar.ph.preheader ], [ %46, %scalar.ph.prol ]
  %47 = sub i64 %.044.us.us.ph, %32
  %48 = icmp ugt i64 %47, -4
  br i1 %48, label %..preheader_crit_edge.us.us, label %scalar.ph

vector.body:                                      ; preds = %.preheader43.us.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader43.us.us ]
  %49 = getelementptr float, ptr %gep.us.us, i64 %index
  %50 = getelementptr i8, ptr %49, i64 16
  %wide.load = load <4 x float>, ptr %49, align 4, !tbaa !29, !alias.scope !35
  %wide.load80 = load <4 x float>, ptr %50, align 4, !tbaa !29, !alias.scope !35
  %51 = getelementptr inbounds float, ptr %.13947.us.us, i64 %index
  %52 = getelementptr inbounds i8, ptr %51, i64 16
  store <4 x float> %wide.load, ptr %51, align 4, !tbaa !29, !alias.scope !38, !noalias !35
  store <4 x float> %wide.load80, ptr %52, align 4, !tbaa !29, !alias.scope !38, !noalias !35
  %index.next = add nuw i64 %index, 8
  %53 = icmp eq i64 %index.next, %n.vec
  br i1 %53, label %middle.block, label %vector.body, !llvm.loop !40

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %..preheader_crit_edge.us.us, label %scalar.ph.preheader

._crit_edge.us.us:                                ; preds = %.lr.ph46.us.us.preheader, %..preheader_crit_edge.us.us
  %54 = getelementptr inbounds float, ptr %.13947.us.us, i64 %6
  %55 = add nuw i64 %.03748.us.us, 1
  %exitcond70.not = icmp eq i64 %55, %.fr63
  br i1 %exitcond70.not, label %._crit_edge49.us, label %.preheader43.us.us, !llvm.loop !43

scalar.ph:                                        ; preds = %scalar.ph.prol.loopexit, %scalar.ph
  %.044.us.us = phi i64 [ %71, %scalar.ph ], [ %.044.us.us.unr, %scalar.ph.prol.loopexit ]
  %56 = getelementptr float, ptr %gep.us.us, i64 %.044.us.us
  %57 = load float, ptr %56, align 4, !tbaa !29
  %58 = getelementptr inbounds float, ptr %.13947.us.us, i64 %.044.us.us
  store float %57, ptr %58, align 4, !tbaa !29
  %59 = add nuw i64 %.044.us.us, 1
  %60 = getelementptr float, ptr %gep.us.us, i64 %59
  %61 = load float, ptr %60, align 4, !tbaa !29
  %62 = getelementptr inbounds float, ptr %.13947.us.us, i64 %59
  store float %61, ptr %62, align 4, !tbaa !29
  %63 = add nuw i64 %.044.us.us, 2
  %64 = getelementptr float, ptr %gep.us.us, i64 %63
  %65 = load float, ptr %64, align 4, !tbaa !29
  %66 = getelementptr inbounds float, ptr %.13947.us.us, i64 %63
  store float %65, ptr %66, align 4, !tbaa !29
  %67 = add nuw i64 %.044.us.us, 3
  %68 = getelementptr float, ptr %gep.us.us, i64 %67
  %69 = load float, ptr %68, align 4, !tbaa !29
  %70 = getelementptr inbounds float, ptr %.13947.us.us, i64 %67
  store float %69, ptr %70, align 4, !tbaa !29
  %71 = add nuw i64 %.044.us.us, 4
  %exitcond.not.3 = icmp eq i64 %71, %32
  br i1 %exitcond.not.3, label %..preheader_crit_edge.us.us, label %scalar.ph, !llvm.loop !44

..preheader_crit_edge.us.us:                      ; preds = %scalar.ph.prol.loopexit, %scalar.ph, %middle.block
  br i1 %35, label %.lr.ph46.us.us.preheader, label %._crit_edge.us.us

.lr.ph46.us.us.preheader:                         ; preds = %..preheader_crit_edge.us.us
  call void @llvm.memset.p0.i64(ptr align 4 %scevgep, i8 0, i64 %34, i1 false), !tbaa !29
  br label %._crit_edge.us.us

._crit_edge54:                                    ; preds = %._crit_edge49.us, %.lr.ph.split, %8
  invoke void @_ZN4Simd5ArrayIfE4SwapERKS1_(ptr noundef nonnull align 8 dereferenceable(16) %2, ptr noundef nonnull align 8 dereferenceable(16) %4)
          to label %76 unwind label %78

.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
  %.04051 = phi i64 [ %74, %.lr.ph.split ], [ 0, %.lr.ph ]
  %72 = sub i64 %10, %.04051
  %73 = call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %6, i64 noundef %72)
  %74 = add i64 %.04051, %6
  %75 = icmp ult i64 %74, %10
  br i1 %75, label %.lr.ph.split, label %._crit_edge54, !llvm.loop !31

76:                                               ; preds = %._crit_edge54
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #5
  br label %77

77:                                               ; preds = %3, %76
  ret void

78:                                               ; preds = %._crit_edge54
  %79 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #5
  resume { ptr, i32 } %79
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE4SwapERKS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 1152}
!6 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8iE", !7, i64 0, !9, i64 8, !13, i64 568, !13, i64 569, !13, i64 570, !13, i64 571, !10, i64 576, !10, i64 584, !11, i64 592, !11, i64 608, !11, i64 648, !14, i64 960, !11, i64 976, !16, i64 1008, !11, i64 1024, !11, i64 1056, !11, i64 1104, !17, i64 1152, !15, i64 1296, !15, i64 1304, !15, i64 1312, !15, i64 1320, !11, i64 1328, !19, i64 1344}
!7 = !{!"_ZTSN4Simd24SynetMergedConvolution8iE", !8, i64 0}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd15MergConvParam8iE", !10, i64 0, !11, i64 8}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"bool", !11, i64 0}
!14 = !{!"_ZTSN4Simd5ArrayIhEE", !15, i64 0, !10, i64 8}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!"_ZTSN4Simd5ArrayIfEE", !15, i64 0, !10, i64 8}
!17 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8i8AlgParamE", !10, i64 0, !10, i64 8, !11, i64 16, !11, i64 40, !11, i64 64, !11, i64 88, !11, i64 104, !10, i64 128, !18, i64 136, !18, i64 140}
!18 = !{!"int", !11, i64 0}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !10, i64 8, !11, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !15, i64 0}
!21 = !{!22, !10, i64 32}
!22 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !23, i64 24, !24, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !23, i64 56, !24, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !25, i64 152}
!23 = !{!"_ZTS18SimdTensorDataType", !11, i64 0}
!24 = !{!"_ZTS20SimdTensorFormatType", !11, i64 0}
!25 = !{!"_ZTS29SimdConvolutionActivationType", !11, i64 0}
!26 = !{!22, !10, i64 64}
!27 = !{!22, !10, i64 72}
!28 = !{!16, !15, i64 0}
!29 = !{!30, !30, i64 0}
!30 = !{!"float", !11, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.unroll.disable"}
!35 = !{!36}
!36 = distinct !{!36, !37}
!37 = distinct !{!37, !"LVerDomain"}
!38 = !{!39}
!39 = distinct !{!39, !37}
!40 = distinct !{!40, !32, !41, !42}
!41 = !{!"llvm.loop.isvectorized", i32 1}
!42 = !{!"llvm.loop.unroll.runtime.disable"}
!43 = distinct !{!43, !32}
!44 = distinct !{!44, !32, !41}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass