; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fDirectNchw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Simd::Base::SynetConvolution32fDirectNchw" = type { %"class.Simd::SynetConvolution32f", i64, i64, i64, i64, i64, i64, i64, i32, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution32fDirectNchw7ForwardEPKfPfS4_(ptr noundef nonnull align 8 dereferenceable(512) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) unnamed_addr #0 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %16 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %17 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %16, i32 0, i32 1
  store ptr %17, ptr %9, align 8, !tbaa !5
  %18 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 8
  %19 = load i32, ptr %18, align 8, !tbaa !9
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %24

21:                                               ; preds = %4
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = call noundef ptr @_ZN4Simd19SynetConvolution32f6BufferEPf(ptr noundef nonnull align 8 dereferenceable(440) %16, ptr noundef %22)
  store ptr %23, ptr %7, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %21, %4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 0, ptr %10, align 8, !tbaa !36
  br label %25

25:                                               ; preds = %131, %24
  %26 = load i64, ptr %10, align 8, !tbaa !36
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %27, i32 0, i32 3
  %29 = load i64, ptr %28, align 8, !tbaa !37
  %30 = icmp ult i64 %26, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %25
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %134

32:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %33 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %16, i32 0, i32 5
  %34 = load ptr, ptr %33, align 8, !tbaa !38
  store ptr %34, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %35 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %16, i32 0, i32 6
  %36 = load ptr, ptr %35, align 8, !tbaa !39
  store ptr %36, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %37 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %16, i32 0, i32 7
  %38 = load ptr, ptr %37, align 8, !tbaa !40
  store ptr %38, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  store i64 0, ptr %15, align 8, !tbaa !36
  br label %39

39:                                               ; preds = %127, %32
  %40 = load i64, ptr %15, align 8, !tbaa !36
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %41, i32 0, i32 20
  %43 = load i64, ptr %42, align 8, !tbaa !41
  %44 = icmp ult i64 %40, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %39
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %130

46:                                               ; preds = %39
  %47 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 8
  %48 = load i32, ptr %47, align 8, !tbaa !9
  %49 = icmp ne i32 %48, 0
  br i1 %49, label %50, label %74

50:                                               ; preds = %46
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr noundef nonnull align 8 dereferenceable(512) %16, ptr noundef %51, ptr noundef %52)
  %53 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 9
  %54 = load ptr, ptr %53, align 8, !tbaa !42
  %55 = load ptr, ptr %7, align 8, !tbaa !5
  %56 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 4
  %57 = load i64, ptr %56, align 8, !tbaa !43
  %58 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 5
  %59 = load i64, ptr %58, align 8, !tbaa !44
  %60 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 6
  %61 = load i64, ptr %60, align 8, !tbaa !45
  %62 = load ptr, ptr %12, align 8, !tbaa !5
  %63 = load ptr, ptr %13, align 8, !tbaa !5
  %64 = load ptr, ptr %14, align 8, !tbaa !5
  %65 = load ptr, ptr %8, align 8, !tbaa !5
  %66 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 7
  %67 = load i64, ptr %66, align 8, !tbaa !46
  %68 = load ptr, ptr %9, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %68, i32 0, i32 6
  %70 = load i64, ptr %69, align 8, !tbaa !47
  %71 = load ptr, ptr %9, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %71, i32 0, i32 7
  %73 = load i64, ptr %72, align 8, !tbaa !48
  call void %54(ptr noundef %55, i64 noundef %57, i64 noundef %59, i64 noundef %61, ptr noundef %62, ptr noundef %63, ptr noundef %64, ptr noundef %65, i64 noundef %67, i64 noundef %70, i64 noundef %73)
  br label %96

74:                                               ; preds = %46
  %75 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 9
  %76 = load ptr, ptr %75, align 8, !tbaa !42
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 4
  %79 = load i64, ptr %78, align 8, !tbaa !43
  %80 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 5
  %81 = load i64, ptr %80, align 8, !tbaa !44
  %82 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 6
  %83 = load i64, ptr %82, align 8, !tbaa !45
  %84 = load ptr, ptr %12, align 8, !tbaa !5
  %85 = load ptr, ptr %13, align 8, !tbaa !5
  %86 = load ptr, ptr %14, align 8, !tbaa !5
  %87 = load ptr, ptr %8, align 8, !tbaa !5
  %88 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 7
  %89 = load i64, ptr %88, align 8, !tbaa !46
  %90 = load ptr, ptr %9, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %90, i32 0, i32 6
  %92 = load i64, ptr %91, align 8, !tbaa !47
  %93 = load ptr, ptr %9, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %93, i32 0, i32 7
  %95 = load i64, ptr %94, align 8, !tbaa !48
  call void %76(ptr noundef %77, i64 noundef %79, i64 noundef %81, i64 noundef %83, ptr noundef %84, ptr noundef %85, ptr noundef %86, ptr noundef %87, i64 noundef %89, i64 noundef %92, i64 noundef %95)
  br label %96

96:                                               ; preds = %74, %50
  %97 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 1
  %98 = load i64, ptr %97, align 8, !tbaa !49
  %99 = load ptr, ptr %12, align 8, !tbaa !5
  %100 = getelementptr inbounds float, ptr %99, i64 %98
  store ptr %100, ptr %12, align 8, !tbaa !5
  %101 = load ptr, ptr %13, align 8, !tbaa !5
  %102 = icmp ne ptr %101, null
  br i1 %102, label %103, label %108

103:                                              ; preds = %96
  %104 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 7
  %105 = load i64, ptr %104, align 8, !tbaa !46
  %106 = load ptr, ptr %13, align 8, !tbaa !5
  %107 = getelementptr inbounds float, ptr %106, i64 %105
  store ptr %107, ptr %13, align 8, !tbaa !5
  br label %108

108:                                              ; preds = %103, %96
  %109 = load ptr, ptr %9, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %109, i32 0, i32 21
  %111 = load i32, ptr %110, align 8, !tbaa !50
  %112 = icmp eq i32 %111, 4
  br i1 %112, label %113, label %118

113:                                              ; preds = %108
  %114 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 7
  %115 = load i64, ptr %114, align 8, !tbaa !46
  %116 = load ptr, ptr %14, align 8, !tbaa !5
  %117 = getelementptr inbounds float, ptr %116, i64 %115
  store ptr %117, ptr %14, align 8, !tbaa !5
  br label %118

118:                                              ; preds = %113, %108
  %119 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 2
  %120 = load i64, ptr %119, align 8, !tbaa !51
  %121 = load ptr, ptr %6, align 8, !tbaa !5
  %122 = getelementptr inbounds float, ptr %121, i64 %120
  store ptr %122, ptr %6, align 8, !tbaa !5
  %123 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %16, i32 0, i32 3
  %124 = load i64, ptr %123, align 8, !tbaa !52
  %125 = load ptr, ptr %8, align 8, !tbaa !5
  %126 = getelementptr inbounds float, ptr %125, i64 %124
  store ptr %126, ptr %8, align 8, !tbaa !5
  br label %127

127:                                              ; preds = %118
  %128 = load i64, ptr %15, align 8, !tbaa !36
  %129 = add i64 %128, 1
  store i64 %129, ptr %15, align 8, !tbaa !36
  br label %39, !llvm.loop !53

130:                                              ; preds = %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %131

131:                                              ; preds = %130
  %132 = load i64, ptr %10, align 8, !tbaa !36
  %133 = add i64 %132, 1
  store i64 %133, ptr %10, align 8, !tbaa !36
  br label %25, !llvm.loop !55

134:                                              ; preds = %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN4Simd19SynetConvolution32f6BufferEPf(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr noundef nonnull align 8 dereferenceable(512), ptr noundef, ptr noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !35, i64 496}
!10 = !{!"_ZTSN4Simd4Base29SynetConvolution32fDirectNchwE", !11, i64 0, !15, i64 440, !15, i64 448, !15, i64 456, !15, i64 464, !15, i64 472, !15, i64 480, !15, i64 488, !35, i64 496, !6, i64 504}
!11 = !{!"_ZTSN4Simd19SynetConvolution32fE", !12, i64 0, !13, i64 8, !21, i64 192, !22, i64 208, !22, i64 212, !6, i64 216, !6, i64 224, !6, i64 232, !23, i64 240, !30, i64 304, !21, i64 368, !6, i64 384, !6, i64 392, !6, i64 400, !28, i64 408}
!12 = !{!"_ZTSN4Simd9DeletableE"}
!13 = !{!"_ZTSN4Simd9ConvParamE", !14, i64 0, !19, i64 160, !15, i64 168, !20, i64 176}
!14 = !{!"_ZTS25SimdConvolutionParameters", !15, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !17, i64 28, !15, i64 32, !15, i64 40, !15, i64 48, !16, i64 56, !17, i64 60, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !15, i64 96, !15, i64 104, !15, i64 112, !15, i64 120, !15, i64 128, !15, i64 136, !15, i64 144, !18, i64 152}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!17 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!18 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !15, i64 8}
!22 = !{!"float", !7, i64 0}
!23 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !6, i64 0, !24, i64 8, !28, i64 32}
!24 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !29, i64 0, !15, i64 8, !7, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!30 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !6, i64 0, !31, i64 8, !28, i64 32}
!31 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"int", !7, i64 0}
!36 = !{!15, !15, i64 0}
!37 = !{!13, !15, i64 168}
!38 = !{!11, !6, i64 216}
!39 = !{!11, !6, i64 224}
!40 = !{!11, !6, i64 232}
!41 = !{!14, !15, i64 144}
!42 = !{!10, !6, i64 504}
!43 = !{!10, !15, i64 464}
!44 = !{!10, !15, i64 472}
!45 = !{!10, !15, i64 480}
!46 = !{!10, !15, i64 488}
!47 = !{!14, !15, i64 40}
!48 = !{!14, !15, i64 48}
!49 = !{!10, !15, i64 440}
!50 = !{!14, !18, i64 152}
!51 = !{!10, !15, i64 448}
!52 = !{!10, !15, i64 456}
!53 = distinct !{!53, !54}
!54 = !{!"llvm.loop.mustprogress"}
!55 = distinct !{!55, !54}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution32fDirectNchw7ForwardEPKfPfS4_(ptr noundef nonnull align 8 dereferenceable(512) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 496
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %9, label %7

7:                                                ; preds = %4
  %8 = tail call noundef ptr @_ZN4Simd19SynetConvolution32f6BufferEPf(ptr noundef nonnull align 8 dereferenceable(440) %0, ptr noundef %2)
  br label %9

9:                                                ; preds = %7, %4
  %.039 = phi ptr [ %8, %7 ], [ %2, %4 ]
  %10 = getelementptr inbounds i8, ptr %0, i64 176
  %11 = load i64, ptr %10, align 8, !tbaa !35
  %.not55 = icmp eq i64 %11, 0
  br i1 %.not55, label %._crit_edge54, label %.lr.ph53

.lr.ph53:                                         ; preds = %9
  %12 = getelementptr inbounds i8, ptr %0, i64 216
  %13 = getelementptr inbounds i8, ptr %0, i64 224
  %14 = getelementptr inbounds i8, ptr %0, i64 232
  %15 = getelementptr inbounds i8, ptr %0, i64 152
  %16 = getelementptr inbounds i8, ptr %0, i64 504
  %17 = getelementptr inbounds i8, ptr %0, i64 464
  %18 = getelementptr inbounds i8, ptr %0, i64 472
  %19 = getelementptr inbounds i8, ptr %0, i64 480
  %20 = getelementptr inbounds i8, ptr %0, i64 488
  %21 = getelementptr inbounds i8, ptr %0, i64 48
  %22 = getelementptr inbounds i8, ptr %0, i64 56
  %23 = getelementptr inbounds i8, ptr %0, i64 440
  %24 = getelementptr inbounds i8, ptr %0, i64 160
  %25 = getelementptr inbounds i8, ptr %0, i64 448
  %26 = getelementptr inbounds i8, ptr %0, i64 456
  %27 = load i64, ptr %15, align 8, !tbaa !36
  %.not56 = icmp eq i64 %27, 0
  br i1 %.not56, label %._crit_edge54, label %.lr.ph53.split

._crit_edge54:                                    ; preds = %._crit_edge, %.lr.ph53, %9
  ret void

.lr.ph53.split:                                   ; preds = %.lr.ph53, %._crit_edge
  %28 = phi i64 [ %33, %._crit_edge ], [ %11, %.lr.ph53 ]
  %29 = phi i64 [ %34, %._crit_edge ], [ 1, %.lr.ph53 ]
  %.03451 = phi i64 [ %35, %._crit_edge ], [ 0, %.lr.ph53 ]
  %.03550 = phi ptr [ %.136.lcssa, %._crit_edge ], [ %1, %.lr.ph53 ]
  %.03749 = phi ptr [ %.138.lcssa, %._crit_edge ], [ %3, %.lr.ph53 ]
  %.not57 = icmp eq i64 %29, 0
  br i1 %.not57, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.lr.ph53.split
  %30 = load ptr, ptr %14, align 8, !tbaa !37
  %31 = load ptr, ptr %13, align 8, !tbaa !38
  %32 = load ptr, ptr %12, align 8, !tbaa !39
  br label %.lr.ph

._crit_edge.loopexit:                             ; preds = %39
  %.pre = load i64, ptr %10, align 8, !tbaa !35
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph53.split
  %33 = phi i64 [ %28, %.lr.ph53.split ], [ %.pre, %._crit_edge.loopexit ]
  %34 = phi i64 [ 0, %.lr.ph53.split ], [ %58, %._crit_edge.loopexit ]
  %.138.lcssa = phi ptr [ %.03749, %.lr.ph53.split ], [ %56, %._crit_edge.loopexit ]
  %.136.lcssa = phi ptr [ %.03550, %.lr.ph53.split ], [ %54, %._crit_edge.loopexit ]
  %35 = add nuw i64 %.03451, 1
  %36 = icmp ult i64 %35, %33
  br i1 %36, label %.lr.ph53.split, label %._crit_edge54, !llvm.loop !40

.lr.ph:                                           ; preds = %.lr.ph.preheader, %39
  %.047 = phi i64 [ %57, %39 ], [ 0, %.lr.ph.preheader ]
  %.03046 = phi ptr [ %.1, %39 ], [ %30, %.lr.ph.preheader ]
  %.03145 = phi ptr [ %.132, %39 ], [ %31, %.lr.ph.preheader ]
  %.03344 = phi ptr [ %48, %39 ], [ %32, %.lr.ph.preheader ]
  %.13643 = phi ptr [ %54, %39 ], [ %.03550, %.lr.ph.preheader ]
  %.13842 = phi ptr [ %56, %39 ], [ %.03749, %.lr.ph.preheader ]
  %37 = load i32, ptr %5, align 8, !tbaa !5
  %.not40 = icmp eq i32 %37, 0
  br i1 %.not40, label %39, label %38

38:                                               ; preds = %.lr.ph
  tail call void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr noundef nonnull align 8 dereferenceable(512) %0, ptr noundef %.13643, ptr noundef %.039)
  br label %39

39:                                               ; preds = %.lr.ph, %38
  %.13643.sink = phi ptr [ %.039, %38 ], [ %.13643, %.lr.ph ]
  %40 = load ptr, ptr %16, align 8, !tbaa !43
  %41 = load i64, ptr %17, align 8, !tbaa !44
  %42 = load i64, ptr %18, align 8, !tbaa !45
  %43 = load i64, ptr %19, align 8, !tbaa !46
  %44 = load i64, ptr %20, align 8, !tbaa !47
  %45 = load i64, ptr %21, align 8, !tbaa !48
  %46 = load i64, ptr %22, align 8, !tbaa !49
  tail call void %40(ptr noundef %.13643.sink, i64 noundef %41, i64 noundef %42, i64 noundef %43, ptr noundef %.03344, ptr noundef %.03145, ptr noundef %.03046, ptr noundef %.13842, i64 noundef %44, i64 noundef %45, i64 noundef %46)
  %47 = load i64, ptr %23, align 8, !tbaa !50
  %48 = getelementptr inbounds float, ptr %.03344, i64 %47
  %.not41 = icmp eq ptr %.03145, null
  %49 = load i64, ptr %20, align 8
  %50 = getelementptr inbounds float, ptr %.03145, i64 %49
  %.132 = select i1 %.not41, ptr null, ptr %50
  %51 = load i32, ptr %24, align 8, !tbaa !51
  %52 = icmp eq i32 %51, 4
  %.1.idx = select i1 %52, i64 %49, i64 0
  %.1 = getelementptr inbounds float, ptr %.03046, i64 %.1.idx
  %53 = load i64, ptr %25, align 8, !tbaa !52
  %54 = getelementptr inbounds float, ptr %.13643, i64 %53
  %55 = load i64, ptr %26, align 8, !tbaa !53
  %56 = getelementptr inbounds float, ptr %.13842, i64 %55
  %57 = add nuw i64 %.047, 1
  %58 = load i64, ptr %15, align 8, !tbaa !36
  %59 = icmp ult i64 %57, %58
  br i1 %59, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !54
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN4Simd19SynetConvolution32f6BufferEPf(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr noundef nonnull align 8 dereferenceable(512), ptr noundef, ptr noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !34, i64 496}
!6 = !{!"_ZTSN4Simd4Base29SynetConvolution32fDirectNchwE", !7, i64 0, !11, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !11, i64 472, !11, i64 480, !11, i64 488, !34, i64 496, !20, i64 504}
!7 = !{!"_ZTSN4Simd19SynetConvolution32fE", !8, i64 0, !9, i64 8, !19, i64 192, !21, i64 208, !21, i64 212, !20, i64 216, !20, i64 224, !20, i64 232, !22, i64 240, !29, i64 304, !19, i64 368, !20, i64 384, !20, i64 392, !20, i64 400, !27, i64 408}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd9ConvParamE", !10, i64 0, !17, i64 160, !11, i64 168, !18, i64 176}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !14, i64 24, !15, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !14, i64 56, !15, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !16, i64 152}
!11 = !{!"long", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTS18SimdTensorDataType", !12, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !12, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !12, i64 0}
!17 = !{!"_ZTS8SimdBool", !12, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !12, i64 0}
!19 = !{!"_ZTSN4Simd5ArrayIfEE", !20, i64 0, !11, i64 8}
!20 = !{!"any pointer", !12, i64 0}
!21 = !{!"float", !12, i64 0}
!22 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !20, i64 0, !23, i64 8, !27, i64 32}
!23 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !28, i64 0, !11, i64 8, !12, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !20, i64 0}
!29 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !20, i64 0, !30, i64 8, !27, i64 32}
!30 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!34 = !{!"int", !12, i64 0}
!35 = !{!9, !11, i64 168}
!36 = !{!10, !11, i64 144}
!37 = !{!7, !20, i64 232}
!38 = !{!7, !20, i64 224}
!39 = !{!7, !20, i64 216}
!40 = distinct !{!40, !41, !42}
!41 = !{!"llvm.loop.mustprogress"}
!42 = !{!"llvm.loop.unswitch.partial.disable"}
!43 = !{!6, !20, i64 504}
!44 = !{!6, !11, i64 464}
!45 = !{!6, !11, i64 472}
!46 = !{!6, !11, i64 480}
!47 = !{!6, !11, i64 488}
!48 = !{!10, !11, i64 40}
!49 = !{!10, !11, i64 48}
!50 = !{!6, !11, i64 440}
!51 = !{!10, !16, i64 152}
!52 = !{!6, !11, i64 448}
!53 = !{!6, !11, i64 456}
!54 = distinct !{!54, !41}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass