; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gelu_inv_ps_minimax3_aarch64_sve(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i8 noundef zeroext %28) #1 {
  %30 = alloca ptr, align 8
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  %44 = alloca i32, align 4
  %45 = alloca i32, align 4
  %46 = alloca i32, align 4
  %47 = alloca i32, align 4
  %48 = alloca i32, align 4
  %49 = alloca i32, align 4
  %50 = alloca i32, align 4
  %51 = alloca i32, align 4
  %52 = alloca i32, align 4
  %53 = alloca i32, align 4
  %54 = alloca i32, align 4
  %55 = alloca i32, align 4
  %56 = alloca i32, align 4
  %57 = alloca i32, align 4
  %58 = alloca i8, align 1
  store ptr %0, ptr %30, align 8, !tbaa !5
  store i32 %1, ptr %31, align 4, !tbaa !9
  store i32 %2, ptr %32, align 4, !tbaa !9
  store i32 %3, ptr %33, align 4, !tbaa !9
  store i32 %4, ptr %34, align 4, !tbaa !9
  store i32 %5, ptr %35, align 4, !tbaa !9
  store i32 %6, ptr %36, align 4, !tbaa !9
  store i32 %7, ptr %37, align 4, !tbaa !9
  store i32 %8, ptr %38, align 4, !tbaa !9
  store i32 %9, ptr %39, align 4, !tbaa !9
  store i32 %10, ptr %40, align 4, !tbaa !9
  store i32 %11, ptr %41, align 4, !tbaa !9
  store i32 %12, ptr %42, align 4, !tbaa !9
  store i32 %13, ptr %43, align 4, !tbaa !9
  store i32 %14, ptr %44, align 4, !tbaa !9
  store i32 %15, ptr %45, align 4, !tbaa !9
  store i32 %16, ptr %46, align 4, !tbaa !9
  store i32 %17, ptr %47, align 4, !tbaa !9
  store i32 %18, ptr %48, align 4, !tbaa !9
  store i32 %19, ptr %49, align 4, !tbaa !9
  store i32 %20, ptr %50, align 4, !tbaa !9
  store i32 %21, ptr %51, align 4, !tbaa !9
  store i32 %22, ptr %52, align 4, !tbaa !9
  store i32 %23, ptr %53, align 4, !tbaa !9
  store i32 %24, ptr %54, align 4, !tbaa !9
  store i32 %25, ptr %55, align 4, !tbaa !9
  store i32 %26, ptr %56, align 4, !tbaa !9
  store i32 %27, ptr %57, align 4, !tbaa !9
  store i8 %28, ptr %58, align 1, !tbaa !11
  %59 = load ptr, ptr %30, align 8, !tbaa !5
  %60 = load i32, ptr %31, align 4, !tbaa !9
  %61 = load i32, ptr %31, align 4, !tbaa !9
  %62 = load i32, ptr %32, align 4, !tbaa !9
  %63 = load i8, ptr %58, align 1, !tbaa !11
  %64 = zext i8 %63 to i32
  %65 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %59, i32 noundef 73412611, i32 noundef %60, i32 noundef %61, i8 noundef zeroext 0, i32 noundef %62, i32 noundef %64, i32 noundef %65)
  %66 = load ptr, ptr %30, align 8, !tbaa !5
  %67 = load i32, ptr %32, align 4, !tbaa !9
  %68 = load i32, ptr %32, align 4, !tbaa !9
  %69 = load i8, ptr %58, align 1, !tbaa !11
  %70 = zext i8 %69 to i32
  %71 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %66, i32 noundef 69243910, i32 noundef %67, i32 noundef 127, i8 noundef zeroext 31, i32 noundef %68, i32 noundef %70, i32 noundef %71)
  %72 = load ptr, ptr %30, align 8, !tbaa !5
  %73 = load i32, ptr %32, align 4, !tbaa !9
  %74 = load i32, ptr %32, align 4, !tbaa !9
  %75 = load i8, ptr %58, align 1, !tbaa !11
  %76 = zext i8 %75 to i32
  %77 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %72, i32 noundef 69245958, i32 noundef %73, i32 noundef 127, i8 noundef zeroext 31, i32 noundef %74, i32 noundef %76, i32 noundef %77)
  %78 = load ptr, ptr %30, align 8, !tbaa !5
  %79 = load i32, ptr %31, align 4, !tbaa !9
  %80 = load i32, ptr %39, align 4, !tbaa !9
  %81 = load i32, ptr %33, align 4, !tbaa !9
  %82 = load i8, ptr %58, align 1, !tbaa !11
  %83 = zext i8 %82 to i32
  %84 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %78, i32 noundef 69218307, i32 noundef %79, i32 noundef %80, i8 noundef zeroext 0, i32 noundef %81, i32 noundef %83, i32 noundef %84)
  %85 = load ptr, ptr %30, align 8, !tbaa !5
  %86 = load i32, ptr %33, align 4, !tbaa !9
  %87 = load i32, ptr %38, align 4, !tbaa !9
  %88 = load i32, ptr %33, align 4, !tbaa !9
  %89 = load i8, ptr %58, align 1, !tbaa !11
  %90 = zext i8 %89 to i32
  %91 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %85, i32 noundef 1694990498, i32 noundef %86, i32 noundef %87, i8 noundef zeroext 0, i32 noundef %88, i32 noundef %90, i32 noundef %91)
  %92 = load ptr, ptr %30, align 8, !tbaa !5
  %93 = load i32, ptr %32, align 4, !tbaa !9
  %94 = load i32, ptr %33, align 4, !tbaa !9
  %95 = load i32, ptr %32, align 4, !tbaa !9
  %96 = load i8, ptr %58, align 1, !tbaa !11
  %97 = zext i8 %96 to i32
  %98 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %92, i32 noundef 73412611, i32 noundef %93, i32 noundef %94, i8 noundef zeroext 0, i32 noundef %95, i32 noundef %97, i32 noundef %98)
  %99 = load ptr, ptr %30, align 8, !tbaa !5
  %100 = load i32, ptr %33, align 4, !tbaa !9
  %101 = load i32, ptr %40, align 4, !tbaa !9
  %102 = load i32, ptr %34, align 4, !tbaa !9
  %103 = load i8, ptr %58, align 1, !tbaa !11
  %104 = zext i8 %103 to i32
  %105 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %99, i32 noundef 1694500867, i32 noundef %100, i32 noundef %101, i8 noundef zeroext 0, i32 noundef %102, i32 noundef %104, i32 noundef %105)
  %106 = load ptr, ptr %30, align 8, !tbaa !5
  %107 = load i32, ptr %34, align 4, !tbaa !9
  %108 = load i32, ptr %41, align 4, !tbaa !9
  %109 = load i32, ptr %34, align 4, !tbaa !9
  %110 = load i8, ptr %58, align 1, !tbaa !11
  %111 = zext i8 %110 to i32
  %112 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %106, i32 noundef 1694498819, i32 noundef %107, i32 noundef %108, i8 noundef zeroext 0, i32 noundef %109, i32 noundef %111, i32 noundef %112)
  %113 = load ptr, ptr %30, align 8, !tbaa !5
  %114 = load i32, ptr %34, align 4, !tbaa !9
  %115 = load i32, ptr %55, align 4, !tbaa !9
  %116 = load i32, ptr %34, align 4, !tbaa !9
  %117 = load i8, ptr %58, align 1, !tbaa !11
  %118 = zext i8 %117 to i32
  %119 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %113, i32 noundef 69218307, i32 noundef %114, i32 noundef %115, i8 noundef zeroext 0, i32 noundef %116, i32 noundef %118, i32 noundef %119)
  %120 = load ptr, ptr %30, align 8, !tbaa !5
  %121 = load i32, ptr %43, align 4, !tbaa !9
  %122 = load i32, ptr %34, align 4, !tbaa !9
  %123 = load i32, ptr %35, align 4, !tbaa !9
  %124 = load i8, ptr %58, align 1, !tbaa !11
  %125 = zext i8 %124 to i32
  %126 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %120, i32 noundef 85995523, i32 noundef %121, i32 noundef %122, i8 noundef zeroext 0, i32 noundef %123, i32 noundef %125, i32 noundef %126)
  %127 = load ptr, ptr %30, align 8, !tbaa !5
  %128 = load i32, ptr %47, align 4, !tbaa !9
  %129 = load i32, ptr %34, align 4, !tbaa !9
  %130 = load i32, ptr %36, align 4, !tbaa !9
  %131 = load i8, ptr %58, align 1, !tbaa !11
  %132 = zext i8 %131 to i32
  %133 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %127, i32 noundef 85995523, i32 noundef %128, i32 noundef %129, i8 noundef zeroext 0, i32 noundef %130, i32 noundef %132, i32 noundef %133)
  %134 = load ptr, ptr %30, align 8, !tbaa !5
  %135 = load i32, ptr %51, align 4, !tbaa !9
  %136 = load i32, ptr %34, align 4, !tbaa !9
  %137 = load i32, ptr %37, align 4, !tbaa !9
  %138 = load i8, ptr %58, align 1, !tbaa !11
  %139 = zext i8 %138 to i32
  %140 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %134, i32 noundef 85995523, i32 noundef %135, i32 noundef %136, i8 noundef zeroext 0, i32 noundef %137, i32 noundef %139, i32 noundef %140)
  %141 = load ptr, ptr %30, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %141, i32 0, i32 6
  %143 = load i32, ptr %142, align 4, !tbaa !12
  %144 = icmp uge i32 %143, 2301
  br i1 %144, label %145, label %199

145:                                              ; preds = %29
  %146 = load ptr, ptr %30, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %146, i32 0, i32 6
  %148 = load i32, ptr %147, align 4, !tbaa !12
  %149 = icmp ult i32 %148, 2401
  br i1 %149, label %150, label %199

150:                                              ; preds = %145
  %151 = load ptr, ptr %30, align 8, !tbaa !5
  %152 = load i32, ptr %34, align 4, !tbaa !9
  %153 = load i32, ptr %34, align 4, !tbaa !9
  %154 = load i8, ptr %58, align 1, !tbaa !11
  %155 = zext i8 %154 to i32
  %156 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %151, i32 noundef 622968870, i32 noundef %152, i32 noundef 127, i8 noundef zeroext 8, i32 noundef %153, i32 noundef %155, i32 noundef %156)
  %157 = load ptr, ptr %30, align 8, !tbaa !5
  %158 = load i32, ptr %44, align 4, !tbaa !9
  %159 = load i32, ptr %34, align 4, !tbaa !9
  %160 = load i32, ptr %56, align 4, !tbaa !9
  %161 = load i8, ptr %58, align 1, !tbaa !11
  %162 = zext i8 %161 to i32
  %163 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %157, i32 noundef 85995523, i32 noundef %158, i32 noundef %159, i8 noundef zeroext 0, i32 noundef %160, i32 noundef %162, i32 noundef %163)
  %164 = load ptr, ptr %30, align 8, !tbaa !5
  %165 = load i32, ptr %35, align 4, !tbaa !9
  %166 = load i32, ptr %56, align 4, !tbaa !9
  %167 = load i32, ptr %35, align 4, !tbaa !9
  %168 = load i8, ptr %58, align 1, !tbaa !11
  %169 = zext i8 %168 to i32
  %170 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %164, i32 noundef 73412611, i32 noundef %165, i32 noundef %166, i8 noundef zeroext 0, i32 noundef %167, i32 noundef %169, i32 noundef %170)
  %171 = load ptr, ptr %30, align 8, !tbaa !5
  %172 = load i32, ptr %48, align 4, !tbaa !9
  %173 = load i32, ptr %34, align 4, !tbaa !9
  %174 = load i32, ptr %56, align 4, !tbaa !9
  %175 = load i8, ptr %58, align 1, !tbaa !11
  %176 = zext i8 %175 to i32
  %177 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %171, i32 noundef 85995523, i32 noundef %172, i32 noundef %173, i8 noundef zeroext 0, i32 noundef %174, i32 noundef %176, i32 noundef %177)
  %178 = load ptr, ptr %30, align 8, !tbaa !5
  %179 = load i32, ptr %36, align 4, !tbaa !9
  %180 = load i32, ptr %56, align 4, !tbaa !9
  %181 = load i32, ptr %36, align 4, !tbaa !9
  %182 = load i8, ptr %58, align 1, !tbaa !11
  %183 = zext i8 %182 to i32
  %184 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %178, i32 noundef 73412611, i32 noundef %179, i32 noundef %180, i8 noundef zeroext 0, i32 noundef %181, i32 noundef %183, i32 noundef %184)
  %185 = load ptr, ptr %30, align 8, !tbaa !5
  %186 = load i32, ptr %52, align 4, !tbaa !9
  %187 = load i32, ptr %34, align 4, !tbaa !9
  %188 = load i32, ptr %56, align 4, !tbaa !9
  %189 = load i8, ptr %58, align 1, !tbaa !11
  %190 = zext i8 %189 to i32
  %191 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %185, i32 noundef 85995523, i32 noundef %186, i32 noundef %187, i8 noundef zeroext 0, i32 noundef %188, i32 noundef %190, i32 noundef %191)
  %192 = load ptr, ptr %30, align 8, !tbaa !5
  %193 = load i32, ptr %37, align 4, !tbaa !9
  %194 = load i32, ptr %56, align 4, !tbaa !9
  %195 = load i32, ptr %37, align 4, !tbaa !9
  %196 = load i8, ptr %58, align 1, !tbaa !11
  %197 = zext i8 %196 to i32
  %198 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %192, i32 noundef 73412611, i32 noundef %193, i32 noundef %194, i8 noundef zeroext 0, i32 noundef %195, i32 noundef %197, i32 noundef %198)
  br label %199

199:                                              ; preds = %150, %145, %29
  %200 = load ptr, ptr %30, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %200, i32 0, i32 6
  %202 = load i32, ptr %201, align 4, !tbaa !12
  %203 = icmp uge i32 %202, 2201
  br i1 %203, label %204, label %354

204:                                              ; preds = %199
  %205 = load ptr, ptr %30, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %205, i32 0, i32 6
  %207 = load i32, ptr %206, align 4, !tbaa !12
  %208 = icmp ult i32 %207, 2301
  br i1 %208, label %209, label %354

209:                                              ; preds = %204
  %210 = load ptr, ptr %30, align 8, !tbaa !5
  %211 = load i32, ptr %34, align 4, !tbaa !9
  %212 = load i32, ptr %34, align 4, !tbaa !9
  %213 = load i8, ptr %58, align 1, !tbaa !11
  %214 = zext i8 %213 to i32
  %215 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %210, i32 noundef 622968870, i32 noundef %211, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %212, i32 noundef %214, i32 noundef %215)
  %216 = load ptr, ptr %30, align 8, !tbaa !5
  %217 = load i32, ptr %44, align 4, !tbaa !9
  %218 = load i32, ptr %34, align 4, !tbaa !9
  %219 = load i32, ptr %56, align 4, !tbaa !9
  %220 = load i8, ptr %58, align 1, !tbaa !11
  %221 = zext i8 %220 to i32
  %222 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %216, i32 noundef 85995523, i32 noundef %217, i32 noundef %218, i8 noundef zeroext 0, i32 noundef %219, i32 noundef %221, i32 noundef %222)
  %223 = load ptr, ptr %30, align 8, !tbaa !5
  %224 = load i32, ptr %35, align 4, !tbaa !9
  %225 = load i32, ptr %56, align 4, !tbaa !9
  %226 = load i32, ptr %35, align 4, !tbaa !9
  %227 = load i8, ptr %58, align 1, !tbaa !11
  %228 = zext i8 %227 to i32
  %229 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %223, i32 noundef 73412611, i32 noundef %224, i32 noundef %225, i8 noundef zeroext 0, i32 noundef %226, i32 noundef %228, i32 noundef %229)
  %230 = load ptr, ptr %30, align 8, !tbaa !5
  %231 = load i32, ptr %48, align 4, !tbaa !9
  %232 = load i32, ptr %34, align 4, !tbaa !9
  %233 = load i32, ptr %56, align 4, !tbaa !9
  %234 = load i8, ptr %58, align 1, !tbaa !11
  %235 = zext i8 %234 to i32
  %236 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %230, i32 noundef 85995523, i32 noundef %231, i32 noundef %232, i8 noundef zeroext 0, i32 noundef %233, i32 noundef %235, i32 noundef %236)
  %237 = load ptr, ptr %30, align 8, !tbaa !5
  %238 = load i32, ptr %36, align 4, !tbaa !9
  %239 = load i32, ptr %56, align 4, !tbaa !9
  %240 = load i32, ptr %36, align 4, !tbaa !9
  %241 = load i8, ptr %58, align 1, !tbaa !11
  %242 = zext i8 %241 to i32
  %243 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %237, i32 noundef 73412611, i32 noundef %238, i32 noundef %239, i8 noundef zeroext 0, i32 noundef %240, i32 noundef %242, i32 noundef %243)
  %244 = load ptr, ptr %30, align 8, !tbaa !5
  %245 = load i32, ptr %52, align 4, !tbaa !9
  %246 = load i32, ptr %34, align 4, !tbaa !9
  %247 = load i32, ptr %56, align 4, !tbaa !9
  %248 = load i8, ptr %58, align 1, !tbaa !11
  %249 = zext i8 %248 to i32
  %250 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %244, i32 noundef 85995523, i32 noundef %245, i32 noundef %246, i8 noundef zeroext 0, i32 noundef %247, i32 noundef %249, i32 noundef %250)
  %251 = load ptr, ptr %30, align 8, !tbaa !5
  %252 = load i32, ptr %37, align 4, !tbaa !9
  %253 = load i32, ptr %56, align 4, !tbaa !9
  %254 = load i32, ptr %37, align 4, !tbaa !9
  %255 = load i8, ptr %58, align 1, !tbaa !11
  %256 = zext i8 %255 to i32
  %257 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %251, i32 noundef 73412611, i32 noundef %252, i32 noundef %253, i8 noundef zeroext 0, i32 noundef %254, i32 noundef %256, i32 noundef %257)
  %258 = load ptr, ptr %30, align 8, !tbaa !5
  %259 = load i32, ptr %34, align 4, !tbaa !9
  %260 = load i32, ptr %34, align 4, !tbaa !9
  %261 = load i8, ptr %58, align 1, !tbaa !11
  %262 = zext i8 %261 to i32
  %263 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %258, i32 noundef 622968870, i32 noundef %259, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %260, i32 noundef %262, i32 noundef %263)
  %264 = load ptr, ptr %30, align 8, !tbaa !5
  %265 = load i32, ptr %45, align 4, !tbaa !9
  %266 = load i32, ptr %34, align 4, !tbaa !9
  %267 = load i32, ptr %56, align 4, !tbaa !9
  %268 = load i8, ptr %58, align 1, !tbaa !11
  %269 = zext i8 %268 to i32
  %270 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %264, i32 noundef 85995523, i32 noundef %265, i32 noundef %266, i8 noundef zeroext 0, i32 noundef %267, i32 noundef %269, i32 noundef %270)
  %271 = load ptr, ptr %30, align 8, !tbaa !5
  %272 = load i32, ptr %35, align 4, !tbaa !9
  %273 = load i32, ptr %56, align 4, !tbaa !9
  %274 = load i32, ptr %35, align 4, !tbaa !9
  %275 = load i8, ptr %58, align 1, !tbaa !11
  %276 = zext i8 %275 to i32
  %277 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %271, i32 noundef 73412611, i32 noundef %272, i32 noundef %273, i8 noundef zeroext 0, i32 noundef %274, i32 noundef %276, i32 noundef %277)
  %278 = load ptr, ptr %30, align 8, !tbaa !5
  %279 = load i32, ptr %49, align 4, !tbaa !9
  %280 = load i32, ptr %34, align 4, !tbaa !9
  %281 = load i32, ptr %56, align 4, !tbaa !9
  %282 = load i8, ptr %58, align 1, !tbaa !11
  %283 = zext i8 %282 to i32
  %284 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %278, i32 noundef 85995523, i32 noundef %279, i32 noundef %280, i8 noundef zeroext 0, i32 noundef %281, i32 noundef %283, i32 noundef %284)
  %285 = load ptr, ptr %30, align 8, !tbaa !5
  %286 = load i32, ptr %36, align 4, !tbaa !9
  %287 = load i32, ptr %56, align 4, !tbaa !9
  %288 = load i32, ptr %36, align 4, !tbaa !9
  %289 = load i8, ptr %58, align 1, !tbaa !11
  %290 = zext i8 %289 to i32
  %291 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %285, i32 noundef 73412611, i32 noundef %286, i32 noundef %287, i8 noundef zeroext 0, i32 noundef %288, i32 noundef %290, i32 noundef %291)
  %292 = load ptr, ptr %30, align 8, !tbaa !5
  %293 = load i32, ptr %53, align 4, !tbaa !9
  %294 = load i32, ptr %34, align 4, !tbaa !9
  %295 = load i32, ptr %56, align 4, !tbaa !9
  %296 = load i8, ptr %58, align 1, !tbaa !11
  %297 = zext i8 %296 to i32
  %298 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %292, i32 noundef 85995523, i32 noundef %293, i32 noundef %294, i8 noundef zeroext 0, i32 noundef %295, i32 noundef %297, i32 noundef %298)
  %299 = load ptr, ptr %30, align 8, !tbaa !5
  %300 = load i32, ptr %37, align 4, !tbaa !9
  %301 = load i32, ptr %56, align 4, !tbaa !9
  %302 = load i32, ptr %37, align 4, !tbaa !9
  %303 = load i8, ptr %58, align 1, !tbaa !11
  %304 = zext i8 %303 to i32
  %305 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %299, i32 noundef 73412611, i32 noundef %300, i32 noundef %301, i8 noundef zeroext 0, i32 noundef %302, i32 noundef %304, i32 noundef %305)
  %306 = load ptr, ptr %30, align 8, !tbaa !5
  %307 = load i32, ptr %34, align 4, !tbaa !9
  %308 = load i32, ptr %34, align 4, !tbaa !9
  %309 = load i8, ptr %58, align 1, !tbaa !11
  %310 = zext i8 %309 to i32
  %311 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %306, i32 noundef 622968870, i32 noundef %307, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %308, i32 noundef %310, i32 noundef %311)
  %312 = load ptr, ptr %30, align 8, !tbaa !5
  %313 = load i32, ptr %46, align 4, !tbaa !9
  %314 = load i32, ptr %34, align 4, !tbaa !9
  %315 = load i32, ptr %56, align 4, !tbaa !9
  %316 = load i8, ptr %58, align 1, !tbaa !11
  %317 = zext i8 %316 to i32
  %318 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %312, i32 noundef 85995523, i32 noundef %313, i32 noundef %314, i8 noundef zeroext 0, i32 noundef %315, i32 noundef %317, i32 noundef %318)
  %319 = load ptr, ptr %30, align 8, !tbaa !5
  %320 = load i32, ptr %35, align 4, !tbaa !9
  %321 = load i32, ptr %56, align 4, !tbaa !9
  %322 = load i32, ptr %35, align 4, !tbaa !9
  %323 = load i8, ptr %58, align 1, !tbaa !11
  %324 = zext i8 %323 to i32
  %325 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %319, i32 noundef 73412611, i32 noundef %320, i32 noundef %321, i8 noundef zeroext 0, i32 noundef %322, i32 noundef %324, i32 noundef %325)
  %326 = load ptr, ptr %30, align 8, !tbaa !5
  %327 = load i32, ptr %50, align 4, !tbaa !9
  %328 = load i32, ptr %34, align 4, !tbaa !9
  %329 = load i32, ptr %56, align 4, !tbaa !9
  %330 = load i8, ptr %58, align 1, !tbaa !11
  %331 = zext i8 %330 to i32
  %332 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %326, i32 noundef 85995523, i32 noundef %327, i32 noundef %328, i8 noundef zeroext 0, i32 noundef %329, i32 noundef %331, i32 noundef %332)
  %333 = load ptr, ptr %30, align 8, !tbaa !5
  %334 = load i32, ptr %36, align 4, !tbaa !9
  %335 = load i32, ptr %56, align 4, !tbaa !9
  %336 = load i32, ptr %36, align 4, !tbaa !9
  %337 = load i8, ptr %58, align 1, !tbaa !11
  %338 = zext i8 %337 to i32
  %339 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %333, i32 noundef 73412611, i32 noundef %334, i32 noundef %335, i8 noundef zeroext 0, i32 noundef %336, i32 noundef %338, i32 noundef %339)
  %340 = load ptr, ptr %30, align 8, !tbaa !5
  %341 = load i32, ptr %54, align 4, !tbaa !9
  %342 = load i32, ptr %34, align 4, !tbaa !9
  %343 = load i32, ptr %56, align 4, !tbaa !9
  %344 = load i8, ptr %58, align 1, !tbaa !11
  %345 = zext i8 %344 to i32
  %346 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %340, i32 noundef 85995523, i32 noundef %341, i32 noundef %342, i8 noundef zeroext 0, i32 noundef %343, i32 noundef %345, i32 noundef %346)
  %347 = load ptr, ptr %30, align 8, !tbaa !5
  %348 = load i32, ptr %37, align 4, !tbaa !9
  %349 = load i32, ptr %56, align 4, !tbaa !9
  %350 = load i32, ptr %37, align 4, !tbaa !9
  %351 = load i8, ptr %58, align 1, !tbaa !11
  %352 = zext i8 %351 to i32
  %353 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %347, i32 noundef 73412611, i32 noundef %348, i32 noundef %349, i8 noundef zeroext 0, i32 noundef %350, i32 noundef %352, i32 noundef %353)
  br label %354

354:                                              ; preds = %209, %204, %199
  %355 = load ptr, ptr %30, align 8, !tbaa !5
  %356 = load i32, ptr %33, align 4, !tbaa !9
  %357 = load i32, ptr %37, align 4, !tbaa !9
  %358 = load i32, ptr %36, align 4, !tbaa !9
  %359 = load i8, ptr %58, align 1, !tbaa !11
  %360 = zext i8 %359 to i32
  %361 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %355, i32 noundef 1696596099, i32 noundef %356, i32 noundef %357, i8 noundef zeroext 0, i32 noundef %358, i32 noundef %360, i32 noundef %361)
  %362 = load ptr, ptr %30, align 8, !tbaa !5
  %363 = load i32, ptr %33, align 4, !tbaa !9
  %364 = load i32, ptr %36, align 4, !tbaa !9
  %365 = load i32, ptr %35, align 4, !tbaa !9
  %366 = load i8, ptr %58, align 1, !tbaa !11
  %367 = zext i8 %366 to i32
  %368 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %362, i32 noundef 1696596099, i32 noundef %363, i32 noundef %364, i8 noundef zeroext 0, i32 noundef %365, i32 noundef %367, i32 noundef %368)
  %369 = load ptr, ptr %30, align 8, !tbaa !5
  %370 = load i32, ptr %42, align 4, !tbaa !9
  %371 = load i32, ptr %42, align 4, !tbaa !9
  %372 = load i32, ptr %36, align 4, !tbaa !9
  %373 = load i8, ptr %58, align 1, !tbaa !11
  %374 = zext i8 %373 to i32
  %375 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %369, i32 noundef 73412611, i32 noundef %370, i32 noundef %371, i8 noundef zeroext 0, i32 noundef %372, i32 noundef %374, i32 noundef %375)
  %376 = load ptr, ptr %30, align 8, !tbaa !5
  %377 = load i32, ptr %32, align 4, !tbaa !9
  %378 = load i32, ptr %35, align 4, !tbaa !9
  %379 = load i32, ptr %36, align 4, !tbaa !9
  %380 = load i8, ptr %58, align 1, !tbaa !11
  %381 = zext i8 %380 to i32
  %382 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %376, i32 noundef 1696596099, i32 noundef %377, i32 noundef %378, i8 noundef zeroext 0, i32 noundef %379, i32 noundef %381, i32 noundef %382)
  %383 = load ptr, ptr %30, align 8, !tbaa !5
  %384 = load i32, ptr %36, align 4, !tbaa !9
  %385 = load i32, ptr %36, align 4, !tbaa !9
  %386 = load i32, ptr %31, align 4, !tbaa !9
  %387 = load i8, ptr %58, align 1, !tbaa !11
  %388 = zext i8 %387 to i32
  %389 = load i32, ptr %57, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %383, i32 noundef 73412611, i32 noundef %384, i32 noundef %385, i8 noundef zeroext 0, i32 noundef %386, i32 noundef %388, i32 noundef %389)
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gelu_inv_ps_minimax3_aarch64_sve(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i8 noundef zeroext %28) local_unnamed_addr #1 {
  %30 = zext i8 %28 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 73412611, i32 noundef %1, i32 noundef %1, i8 noundef zeroext 0, i32 noundef %2, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 69243910, i32 noundef %2, i32 noundef 127, i8 noundef zeroext 31, i32 noundef %2, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 69245958, i32 noundef %2, i32 noundef 127, i8 noundef zeroext 31, i32 noundef %2, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 69218307, i32 noundef %1, i32 noundef %9, i8 noundef zeroext 0, i32 noundef %3, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1694990498, i32 noundef %3, i32 noundef %8, i8 noundef zeroext 0, i32 noundef %3, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 73412611, i32 noundef %2, i32 noundef %3, i8 noundef zeroext 0, i32 noundef %2, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1694500867, i32 noundef %3, i32 noundef %10, i8 noundef zeroext 0, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1694498819, i32 noundef %4, i32 noundef %11, i8 noundef zeroext 0, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 69218307, i32 noundef %4, i32 noundef %25, i8 noundef zeroext 0, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 85995523, i32 noundef %13, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 85995523, i32 noundef %17, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 85995523, i32 noundef %21, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %7, i32 noundef %30, i32 noundef %27) #2
  %31 = getelementptr inbounds i8, ptr %0, i64 28
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = add i32 %32, -2301
  %or.cond = icmp ult i32 %33, 100
  br i1 %or.cond, label %34, label %35

34:                                               ; preds = %29
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 622968870, i32 noundef %4, i32 noundef 127, i8 noundef zeroext 8, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %14, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %5, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %18, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %6, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %22, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %7, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %7, i32 noundef %30, i32 noundef %27) #2
  %.pre = load i32, ptr %31, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %34, %29
  %36 = phi i32 [ %.pre, %34 ], [ %32, %29 ]
  %37 = add i32 %36, -2201
  %or.cond268 = icmp ult i32 %37, 100
  br i1 %or.cond268, label %38, label %39

38:                                               ; preds = %35
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 622968870, i32 noundef %4, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %14, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %5, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %18, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %6, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %22, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %7, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %7, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 622968870, i32 noundef %4, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %15, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %5, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %19, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %6, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %23, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %7, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %7, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 622968870, i32 noundef %4, i32 noundef 127, i8 noundef zeroext 4, i32 noundef %4, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %16, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %5, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %20, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %6, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 85995523, i32 noundef %24, i32 noundef %4, i8 noundef zeroext 0, i32 noundef %26, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %7, i32 noundef %26, i8 noundef zeroext 0, i32 noundef %7, i32 noundef %30, i32 noundef %27) #2
  br label %39

39:                                               ; preds = %38, %35
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 1696596099, i32 noundef %3, i32 noundef %7, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 1696596099, i32 noundef %3, i32 noundef %6, i8 noundef zeroext 0, i32 noundef %5, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %12, i32 noundef %12, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 1696596099, i32 noundef %2, i32 noundef %5, i8 noundef zeroext 0, i32 noundef %6, i32 noundef %30, i32 noundef %27) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 73412611, i32 noundef %6, i32 noundef %6, i8 noundef zeroext 0, i32 noundef %1, i32 noundef %30, i32 noundef %27) #2
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass