; LLVM IR from mlcommons/tiny :: benchmark/interface/Drivers/BSP/Components/cs42l51 (cs42l51)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CS42L51_Object_t = type { %struct.CS42L51_IO_t, %struct.cs42l51_ctx_t, i8 }
%struct.CS42L51_IO_t = type { ptr, ptr, i16, ptr, ptr, ptr }
%struct.cs42l51_ctx_t = type { ptr, ptr, ptr }
%struct.CS42L51_Init_t = type { i32, i32, i32, i32, i32 }

@CS42L51_CurrentDevices = external hidden global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Init(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %7, i32 0, i32 2
  %9 = load i8, ptr %8, align 8, !tbaa !11
  %10 = zext i8 %9 to i32
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %48

12:                                               ; preds = %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %13, i32 0, i32 1
  %15 = call i32 @cs42l51_read_reg(ptr noundef %14, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = add nsw i32 %16, %15
  store i32 %17, ptr %5, align 4, !tbaa !9
  %18 = load i8, ptr %6, align 1, !tbaa !16
  %19 = zext i8 %18 to i32
  %20 = or i32 %19, 1
  %21 = trunc i32 %20 to i8
  store i8 %21, ptr %6, align 1, !tbaa !16
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %22, i32 0, i32 1
  %24 = call i32 @cs42l51_write_reg(ptr noundef %23, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = add nsw i32 %25, %24
  store i32 %26, ptr %5, align 4, !tbaa !9
  store i8 127, ptr %6, align 1, !tbaa !16
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %27, i32 0, i32 1
  %29 = call i32 @cs42l51_write_reg(ptr noundef %28, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = add nsw i32 %30, %29
  store i32 %31, ptr %5, align 4, !tbaa !9
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %32, i32 0, i32 1
  %34 = call i32 @cs42l51_read_reg(ptr noundef %33, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = add nsw i32 %35, %34
  store i32 %36, ptr %5, align 4, !tbaa !9
  %37 = load i8, ptr %6, align 1, !tbaa !16
  %38 = zext i8 %37 to i32
  %39 = or i32 %38, 14
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %6, align 1, !tbaa !16
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %41, i32 0, i32 1
  %43 = call i32 @cs42l51_write_reg(ptr noundef %42, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %44 = load i32, ptr %5, align 4, !tbaa !9
  %45 = add nsw i32 %44, %43
  store i32 %45, ptr %5, align 4, !tbaa !9
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %46, i32 0, i32 2
  store i8 1, ptr %47, align 8, !tbaa !11
  br label %96

48:                                               ; preds = %2
  store i8 126, ptr %6, align 1, !tbaa !16
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %49, i32 0, i32 1
  %51 = call i32 @cs42l51_write_reg(ptr noundef %50, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %52 = load i32, ptr %5, align 4, !tbaa !9
  %53 = add nsw i32 %52, %51
  store i32 %53, ptr %5, align 4, !tbaa !9
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %54, i32 0, i32 1
  %56 = call i32 @cs42l51_read_reg(ptr noundef %55, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = add nsw i32 %57, %56
  store i32 %58, ptr %5, align 4, !tbaa !9
  %59 = load i8, ptr %6, align 1, !tbaa !16
  %60 = zext i8 %59 to i32
  %61 = or i32 %60, 14
  %62 = trunc i32 %61 to i8
  store i8 %62, ptr %6, align 1, !tbaa !16
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %63, i32 0, i32 1
  %65 = call i32 @cs42l51_write_reg(ptr noundef %64, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %66 = load i32, ptr %5, align 4, !tbaa !9
  %67 = add nsw i32 %66, %65
  store i32 %67, ptr %5, align 4, !tbaa !9
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %68, i32 0, i32 1
  %70 = call i32 @cs42l51_read_reg(ptr noundef %69, i16 noundef zeroext 9, ptr noundef %6, i16 noundef zeroext 1)
  %71 = load i32, ptr %5, align 4, !tbaa !9
  %72 = add nsw i32 %71, %70
  store i32 %72, ptr %5, align 4, !tbaa !9
  %73 = load i8, ptr %6, align 1, !tbaa !16
  %74 = zext i8 %73 to i32
  %75 = and i32 %74, 252
  %76 = trunc i32 %75 to i8
  store i8 %76, ptr %6, align 1, !tbaa !16
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %77, i32 0, i32 1
  %79 = call i32 @cs42l51_write_reg(ptr noundef %78, i16 noundef zeroext 9, ptr noundef %6, i16 noundef zeroext 1)
  %80 = load i32, ptr %5, align 4, !tbaa !9
  %81 = add nsw i32 %80, %79
  store i32 %81, ptr %5, align 4, !tbaa !9
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %82, i32 0, i32 1
  %84 = call i32 @cs42l51_read_reg(ptr noundef %83, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %85 = load i32, ptr %5, align 4, !tbaa !9
  %86 = add nsw i32 %85, %84
  store i32 %86, ptr %5, align 4, !tbaa !9
  %87 = load i8, ptr %6, align 1, !tbaa !16
  %88 = zext i8 %87 to i32
  %89 = or i32 %88, 1
  %90 = trunc i32 %89 to i8
  store i8 %90, ptr %6, align 1, !tbaa !16
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %91, i32 0, i32 1
  %93 = call i32 @cs42l51_write_reg(ptr noundef %92, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %94 = load i32, ptr %5, align 4, !tbaa !9
  %95 = add nsw i32 %94, %93
  store i32 %95, ptr %5, align 4, !tbaa !9
  br label %96

96:                                               ; preds = %48, %12
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %97, i32 0, i32 1
  %99 = call i32 @cs42l51_read_reg(ptr noundef %98, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %100 = load i32, ptr %5, align 4, !tbaa !9
  %101 = add nsw i32 %100, %99
  store i32 %101, ptr %5, align 4, !tbaa !9
  %102 = load i8, ptr %6, align 1, !tbaa !16
  %103 = zext i8 %102 to i32
  %104 = and i32 %103, 14
  %105 = or i32 %104, 160
  %106 = trunc i32 %105 to i8
  store i8 %106, ptr %6, align 1, !tbaa !16
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %107, i32 0, i32 1
  %109 = call i32 @cs42l51_write_reg(ptr noundef %108, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %110 = load i32, ptr %5, align 4, !tbaa !9
  %111 = add nsw i32 %110, %109
  store i32 %111, ptr %5, align 4, !tbaa !9
  store i8 12, ptr %6, align 1, !tbaa !16
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %112, i32 0, i32 1
  %114 = call i32 @cs42l51_write_reg(ptr noundef %113, i16 noundef zeroext 4, ptr noundef %6, i16 noundef zeroext 1)
  %115 = load i32, ptr %5, align 4, !tbaa !9
  %116 = add nsw i32 %115, %114
  store i32 %116, ptr %5, align 4, !tbaa !9
  store i8 3, ptr %6, align 1, !tbaa !16
  %117 = load ptr, ptr %3, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %117, i32 0, i32 1
  %119 = call i32 @cs42l51_write_reg(ptr noundef %118, i16 noundef zeroext 5, ptr noundef %6, i16 noundef zeroext 1)
  %120 = load i32, ptr %5, align 4, !tbaa !9
  %121 = add nsw i32 %120, %119
  store i32 %121, ptr %5, align 4, !tbaa !9
  store i8 -81, ptr %6, align 1, !tbaa !16
  %122 = load ptr, ptr %3, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %122, i32 0, i32 1
  %124 = call i32 @cs42l51_write_reg(ptr noundef %123, i16 noundef zeroext 6, ptr noundef %6, i16 noundef zeroext 1)
  %125 = load i32, ptr %5, align 4, !tbaa !9
  %126 = add nsw i32 %125, %124
  store i32 %126, ptr %5, align 4, !tbaa !9
  store i8 -61, ptr %6, align 1, !tbaa !16
  %127 = load ptr, ptr %3, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %127, i32 0, i32 1
  %129 = call i32 @cs42l51_write_reg(ptr noundef %128, i16 noundef zeroext 8, ptr noundef %6, i16 noundef zeroext 1)
  %130 = load i32, ptr %5, align 4, !tbaa !9
  %131 = add nsw i32 %130, %129
  store i32 %131, ptr %5, align 4, !tbaa !9
  store i8 66, ptr %6, align 1, !tbaa !16
  %132 = load ptr, ptr %3, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %132, i32 0, i32 1
  %134 = call i32 @cs42l51_write_reg(ptr noundef %133, i16 noundef zeroext 9, ptr noundef %6, i16 noundef zeroext 1)
  %135 = load i32, ptr %5, align 4, !tbaa !9
  %136 = add nsw i32 %135, %134
  store i32 %136, ptr %5, align 4, !tbaa !9
  store i8 -48, ptr %6, align 1, !tbaa !16
  %137 = load ptr, ptr %3, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %137, i32 0, i32 1
  %139 = call i32 @cs42l51_write_reg(ptr noundef %138, i16 noundef zeroext 10, ptr noundef %6, i16 noundef zeroext 1)
  %140 = load i32, ptr %5, align 4, !tbaa !9
  %141 = add nsw i32 %140, %139
  store i32 %141, ptr %5, align 4, !tbaa !9
  %142 = load ptr, ptr %3, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %142, i32 0, i32 1
  %144 = call i32 @cs42l51_write_reg(ptr noundef %143, i16 noundef zeroext 11, ptr noundef %6, i16 noundef zeroext 1)
  %145 = load i32, ptr %5, align 4, !tbaa !9
  %146 = add nsw i32 %145, %144
  store i32 %146, ptr %5, align 4, !tbaa !9
  store i8 0, ptr %6, align 1, !tbaa !16
  %147 = load ptr, ptr %3, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %147, i32 0, i32 1
  %149 = call i32 @cs42l51_write_reg(ptr noundef %148, i16 noundef zeroext 12, ptr noundef %6, i16 noundef zeroext 1)
  %150 = load i32, ptr %5, align 4, !tbaa !9
  %151 = add nsw i32 %150, %149
  store i32 %151, ptr %5, align 4, !tbaa !9
  %152 = load ptr, ptr %3, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %152, i32 0, i32 1
  %154 = call i32 @cs42l51_write_reg(ptr noundef %153, i16 noundef zeroext 13, ptr noundef %6, i16 noundef zeroext 1)
  %155 = load i32, ptr %5, align 4, !tbaa !9
  %156 = add nsw i32 %155, %154
  store i32 %156, ptr %5, align 4, !tbaa !9
  store i8 -128, ptr %6, align 1, !tbaa !16
  %157 = load ptr, ptr %3, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %157, i32 0, i32 1
  %159 = call i32 @cs42l51_write_reg(ptr noundef %158, i16 noundef zeroext 14, ptr noundef %6, i16 noundef zeroext 1)
  %160 = load i32, ptr %5, align 4, !tbaa !9
  %161 = add nsw i32 %160, %159
  store i32 %161, ptr %5, align 4, !tbaa !9
  %162 = load ptr, ptr %3, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %162, i32 0, i32 1
  %164 = call i32 @cs42l51_write_reg(ptr noundef %163, i16 noundef zeroext 15, ptr noundef %6, i16 noundef zeroext 1)
  %165 = load i32, ptr %5, align 4, !tbaa !9
  %166 = add nsw i32 %165, %164
  store i32 %166, ptr %5, align 4, !tbaa !9
  store i8 0, ptr %6, align 1, !tbaa !16
  %167 = load ptr, ptr %3, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %167, i32 0, i32 1
  %169 = call i32 @cs42l51_write_reg(ptr noundef %168, i16 noundef zeroext 16, ptr noundef %6, i16 noundef zeroext 1)
  %170 = load i32, ptr %5, align 4, !tbaa !9
  %171 = add nsw i32 %170, %169
  store i32 %171, ptr %5, align 4, !tbaa !9
  %172 = load ptr, ptr %3, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %172, i32 0, i32 1
  %174 = call i32 @cs42l51_write_reg(ptr noundef %173, i16 noundef zeroext 17, ptr noundef %6, i16 noundef zeroext 1)
  %175 = load i32, ptr %5, align 4, !tbaa !9
  %176 = add nsw i32 %175, %174
  store i32 %176, ptr %5, align 4, !tbaa !9
  %177 = load ptr, ptr %3, align 8, !tbaa !5
  %178 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %177, i32 0, i32 1
  %179 = call i32 @cs42l51_write_reg(ptr noundef %178, i16 noundef zeroext 24, ptr noundef %6, i16 noundef zeroext 1)
  %180 = load i32, ptr %5, align 4, !tbaa !9
  %181 = add nsw i32 %180, %179
  store i32 %181, ptr %5, align 4, !tbaa !9
  %182 = load ptr, ptr %4, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.CS42L51_Init_t, ptr %182, i32 0, i32 1
  %184 = load i32, ptr %183, align 4, !tbaa !17
  %185 = and i32 %184, 1
  %186 = icmp eq i32 %185, 1
  br i1 %186, label %187, label %214

187:                                              ; preds = %96
  %188 = load ptr, ptr %4, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.CS42L51_Init_t, ptr %188, i32 0, i32 4
  %190 = load i32, ptr %189, align 4, !tbaa !19
  %191 = icmp uge i32 %190, 100
  br i1 %191, label %192, label %193

192:                                              ; preds = %187
  br label %201

193:                                              ; preds = %187
  %194 = load ptr, ptr %4, align 8, !tbaa !5
  %195 = getelementptr inbounds %struct.CS42L51_Init_t, ptr %194, i32 0, i32 4
  %196 = load i32, ptr %195, align 4, !tbaa !19
  %197 = mul i32 %196, 2
  %198 = add i32 %197, 56
  %199 = trunc i32 %198 to i8
  %200 = zext i8 %199 to i32
  br label %201

201:                                              ; preds = %193, %192
  %202 = phi i32 [ 0, %192 ], [ %200, %193 ]
  %203 = trunc i32 %202 to i8
  store i8 %203, ptr %6, align 1, !tbaa !16
  %204 = load ptr, ptr %3, align 8, !tbaa !5
  %205 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %204, i32 0, i32 1
  %206 = call i32 @cs42l51_write_reg(ptr noundef %205, i16 noundef zeroext 22, ptr noundef %6, i16 noundef zeroext 1)
  %207 = load i32, ptr %5, align 4, !tbaa !9
  %208 = add nsw i32 %207, %206
  store i32 %208, ptr %5, align 4, !tbaa !9
  %209 = load ptr, ptr %3, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %209, i32 0, i32 1
  %211 = call i32 @cs42l51_write_reg(ptr noundef %210, i16 noundef zeroext 23, ptr noundef %6, i16 noundef zeroext 1)
  %212 = load i32, ptr %5, align 4, !tbaa !9
  %213 = add nsw i32 %212, %211
  store i32 %213, ptr %5, align 4, !tbaa !9
  br label %214

214:                                              ; preds = %201, %96
  store i8 64, ptr %6, align 1, !tbaa !16
  %215 = load ptr, ptr %3, align 8, !tbaa !5
  %216 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %215, i32 0, i32 1
  %217 = call i32 @cs42l51_write_reg(ptr noundef %216, i16 noundef zeroext 28, ptr noundef %6, i16 noundef zeroext 1)
  %218 = load i32, ptr %5, align 4, !tbaa !9
  %219 = add nsw i32 %218, %217
  store i32 %219, ptr %5, align 4, !tbaa !9
  %220 = load ptr, ptr %4, align 8, !tbaa !5
  %221 = getelementptr inbounds %struct.CS42L51_Init_t, ptr %220, i32 0, i32 1
  %222 = load i32, ptr %221, align 4, !tbaa !17
  %223 = load ptr, ptr %4, align 8, !tbaa !5
  %224 = getelementptr inbounds %struct.CS42L51_Init_t, ptr %223, i32 0, i32 0
  %225 = load i32, ptr %224, align 4, !tbaa !20
  %226 = or i32 %222, %225
  store i32 %226, ptr @CS42L51_CurrentDevices, align 4, !tbaa !9
  %227 = load i32, ptr %5, align 4, !tbaa !9
  %228 = icmp ne i32 %227, 0
  br i1 %228, label %229, label %230

229:                                              ; preds = %214
  store i32 -1, ptr %5, align 4, !tbaa !9
  br label %230

230:                                              ; preds = %229, %214
  %231 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %231
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 72}
!12 = !{!"", !13, i64 0, !15, i64 48, !7, i64 72}
!13 = !{!"", !6, i64 0, !6, i64 8, !14, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !10, i64 4}
!18 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!19 = !{!18, !10, i64 16}
!20 = !{!18, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@CS42L51_CurrentDevices = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Init(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 72
  %5 = load i8, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %7, label %22

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 48
  %9 = call i32 @cs42l51_read_reg(ptr noundef nonnull %8, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %10 = load i8, ptr %3, align 1, !tbaa !13
  %11 = or i8 %10, 1
  store i8 %11, ptr %3, align 1, !tbaa !13
  %12 = call i32 @cs42l51_write_reg(ptr noundef nonnull %8, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %13 = add nsw i32 %12, %9
  store i8 127, ptr %3, align 1, !tbaa !13
  %14 = call i32 @cs42l51_write_reg(ptr noundef nonnull %8, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %15 = add nsw i32 %13, %14
  %16 = call i32 @cs42l51_read_reg(ptr noundef nonnull %8, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %17 = add nsw i32 %15, %16
  %18 = load i8, ptr %3, align 1, !tbaa !13
  %19 = or i8 %18, 14
  store i8 %19, ptr %3, align 1, !tbaa !13
  %20 = call i32 @cs42l51_write_reg(ptr noundef nonnull %8, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %21 = add nsw i32 %17, %20
  store i8 1, ptr %4, align 8, !tbaa !5
  br label %43

22:                                               ; preds = %2
  store i8 126, ptr %3, align 1, !tbaa !13
  %23 = getelementptr inbounds i8, ptr %0, i64 48
  %24 = call i32 @cs42l51_write_reg(ptr noundef nonnull %23, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %25 = call i32 @cs42l51_read_reg(ptr noundef nonnull %23, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %26 = add nsw i32 %25, %24
  %27 = load i8, ptr %3, align 1, !tbaa !13
  %28 = or i8 %27, 14
  store i8 %28, ptr %3, align 1, !tbaa !13
  %29 = call i32 @cs42l51_write_reg(ptr noundef nonnull %23, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %30 = add nsw i32 %26, %29
  %31 = call i32 @cs42l51_read_reg(ptr noundef nonnull %23, i16 noundef zeroext 9, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %32 = add nsw i32 %30, %31
  %33 = load i8, ptr %3, align 1, !tbaa !13
  %34 = and i8 %33, -4
  store i8 %34, ptr %3, align 1, !tbaa !13
  %35 = call i32 @cs42l51_write_reg(ptr noundef nonnull %23, i16 noundef zeroext 9, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %36 = add nsw i32 %32, %35
  %37 = call i32 @cs42l51_read_reg(ptr noundef nonnull %23, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %38 = add nsw i32 %36, %37
  %39 = load i8, ptr %3, align 1, !tbaa !13
  %40 = or i8 %39, 1
  store i8 %40, ptr %3, align 1, !tbaa !13
  %41 = call i32 @cs42l51_write_reg(ptr noundef nonnull %23, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %42 = add nsw i32 %38, %41
  br label %43

43:                                               ; preds = %22, %7
  %.0 = phi i32 [ %21, %7 ], [ %42, %22 ]
  %44 = getelementptr inbounds i8, ptr %0, i64 48
  %45 = call i32 @cs42l51_read_reg(ptr noundef nonnull %44, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %46 = add nsw i32 %45, %.0
  %47 = load i8, ptr %3, align 1, !tbaa !13
  %48 = and i8 %47, 14
  %49 = or disjoint i8 %48, -96
  store i8 %49, ptr %3, align 1, !tbaa !13
  %50 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %51 = add nsw i32 %46, %50
  store i8 12, ptr %3, align 1, !tbaa !13
  %52 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 4, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %53 = add nsw i32 %51, %52
  store i8 3, ptr %3, align 1, !tbaa !13
  %54 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 5, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %55 = add nsw i32 %53, %54
  store i8 -81, ptr %3, align 1, !tbaa !13
  %56 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 6, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %57 = add nsw i32 %55, %56
  store i8 -61, ptr %3, align 1, !tbaa !13
  %58 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 8, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %59 = add nsw i32 %57, %58
  store i8 66, ptr %3, align 1, !tbaa !13
  %60 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 9, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %61 = add nsw i32 %59, %60
  store i8 -48, ptr %3, align 1, !tbaa !13
  %62 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 10, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %63 = add nsw i32 %61, %62
  %64 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 11, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %65 = add nsw i32 %63, %64
  store i8 0, ptr %3, align 1, !tbaa !13
  %66 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 12, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %67 = add nsw i32 %65, %66
  %68 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 13, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %69 = add nsw i32 %67, %68
  store i8 -128, ptr %3, align 1, !tbaa !13
  %70 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 14, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %71 = add nsw i32 %69, %70
  %72 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 15, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %73 = add nsw i32 %71, %72
  store i8 0, ptr %3, align 1, !tbaa !13
  %74 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 16, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %75 = add nsw i32 %73, %74
  %76 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 17, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %77 = add nsw i32 %75, %76
  %78 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 24, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %79 = add nsw i32 %77, %78
  %80 = getelementptr inbounds i8, ptr %1, i64 4
  %81 = load i32, ptr %80, align 4, !tbaa !14
  %82 = and i32 %81, 1
  %.not = icmp eq i32 %82, 0
  br i1 %.not, label %94, label %83

83:                                               ; preds = %43
  %84 = getelementptr inbounds i8, ptr %1, i64 16
  %85 = load i32, ptr %84, align 4, !tbaa !17
  %86 = icmp ugt i32 %85, 99
  %.tr = trunc nuw i32 %85 to i8
  %87 = shl nuw i8 %.tr, 1
  %88 = add i8 %87, 56
  %89 = select i1 %86, i8 0, i8 %88
  store i8 %89, ptr %3, align 1, !tbaa !13
  %90 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 22, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %91 = add nsw i32 %90, %79
  %92 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 23, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %93 = add nsw i32 %91, %92
  br label %94

94:                                               ; preds = %83, %43
  %.1 = phi i32 [ %93, %83 ], [ %79, %43 ]
  store i8 64, ptr %3, align 1, !tbaa !13
  %95 = call i32 @cs42l51_write_reg(ptr noundef nonnull %44, i16 noundef zeroext 28, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %96 = load i32, ptr %80, align 4, !tbaa !14
  %97 = load i32, ptr %1, align 4, !tbaa !18
  %98 = or i32 %97, %96
  store i32 %98, ptr @CS42L51_CurrentDevices, align 4, !tbaa !19
  %99 = sub i32 0, %95
  %.not71 = icmp ne i32 %.1, %99
  %spec.store.select = sext i1 %.not71 to i32
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  ret i32 %spec.store.select
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 72}
!6 = !{!"", !7, i64 0, !12, i64 48, !9, i64 72}
!7 = !{!"", !8, i64 0, !8, i64 8, !11, i64 16, !8, i64 24, !8, i64 32, !8, i64 40}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"short", !9, i64 0}
!12 = !{!"", !8, i64 0, !8, i64 8, !8, i64 16}
!13 = !{!9, !9, i64 0}
!14 = !{!15, !16, i64 4}
!15 = !{!"", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16}
!16 = !{!"int", !9, i64 0}
!17 = !{!15, !16, i64 16}
!18 = !{!15, !16, i64 0}
!19 = !{!16, !16, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass