; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_gather_scatter_avx_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_offs_avx_avx512_mn_loop_unrolled(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i8 noundef signext %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i8 noundef signext %13, i8 noundef signext %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24) #1 {
  %26 = alloca ptr, align 8
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i8, align 1
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i8, align 1
  %40 = alloca i8, align 1
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  %44 = alloca i32, align 4
  %45 = alloca i32, align 4
  %46 = alloca i32, align 4
  %47 = alloca i32, align 4
  %48 = alloca i32, align 4
  %49 = alloca i32, align 4
  %50 = alloca i32, align 4
  %51 = alloca i32, align 4
  %52 = alloca i32, align 4
  %53 = alloca i32, align 4
  %54 = alloca i32, align 4
  %55 = alloca i32, align 4
  %56 = alloca i32, align 4
  store ptr %0, ptr %26, align 8, !tbaa !5
  store i32 %1, ptr %27, align 4, !tbaa !9
  store i32 %2, ptr %28, align 4, !tbaa !9
  store i32 %3, ptr %29, align 4, !tbaa !9
  store i32 %4, ptr %30, align 4, !tbaa !9
  store i32 %5, ptr %31, align 4, !tbaa !9
  store i32 %6, ptr %32, align 4, !tbaa !9
  store i8 %7, ptr %33, align 1, !tbaa !11
  store i32 %8, ptr %34, align 4, !tbaa !9
  store i32 %9, ptr %35, align 4, !tbaa !9
  store i32 %10, ptr %36, align 4, !tbaa !9
  store i32 %11, ptr %37, align 4, !tbaa !9
  store i32 %12, ptr %38, align 4, !tbaa !9
  store i8 %13, ptr %39, align 1, !tbaa !11
  store i8 %14, ptr %40, align 1, !tbaa !11
  store i32 %15, ptr %41, align 4, !tbaa !9
  store i32 %16, ptr %42, align 4, !tbaa !9
  store i32 %17, ptr %43, align 4, !tbaa !9
  store i32 %18, ptr %44, align 4, !tbaa !9
  store i32 %19, ptr %45, align 4, !tbaa !9
  store i32 %20, ptr %46, align 4, !tbaa !9
  store i32 %21, ptr %47, align 4, !tbaa !9
  store i32 %22, ptr %48, align 4, !tbaa !9
  store i32 %23, ptr %49, align 4, !tbaa !9
  store i32 %24, ptr %50, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %51) #3
  store i32 0, ptr %51, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %52) #3
  store i32 0, ptr %52, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %53) #3
  %57 = load i32, ptr %27, align 4, !tbaa !9
  %58 = load i32, ptr %28, align 4, !tbaa !9
  %59 = mul i32 %57, %58
  store i32 %59, ptr %53, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %54) #3
  store i32 0, ptr %54, align 4, !tbaa !9
  store i32 0, ptr %52, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %283, %25
  %61 = load i32, ptr %52, align 4, !tbaa !9
  %62 = load i32, ptr %28, align 4, !tbaa !9
  %63 = icmp ult i32 %61, %62
  br i1 %63, label %64, label %286

64:                                               ; preds = %60
  store i32 0, ptr %51, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %279, %64
  %66 = load i32, ptr %51, align 4, !tbaa !9
  %67 = load i32, ptr %27, align 4, !tbaa !9
  %68 = icmp ult i32 %66, %67
  br i1 %68, label %69, label %282

69:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %55) #3
  %70 = load i32, ptr %54, align 4, !tbaa !9
  %71 = load i32, ptr %51, align 4, !tbaa !9
  %72 = add i32 %70, %71
  %73 = load i32, ptr %52, align 4, !tbaa !9
  %74 = load i32, ptr %27, align 4, !tbaa !9
  %75 = mul i32 %73, %74
  %76 = add i32 %72, %75
  store i32 %76, ptr %55, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %56) #3
  %77 = load i32, ptr %53, align 4, !tbaa !9
  %78 = load i32, ptr %51, align 4, !tbaa !9
  %79 = add i32 %77, %78
  %80 = load i32, ptr %52, align 4, !tbaa !9
  %81 = load i32, ptr %27, align 4, !tbaa !9
  %82 = mul i32 %80, %81
  %83 = add i32 %79, %82
  store i32 %83, ptr %56, align 4, !tbaa !9
  %84 = load ptr, ptr %26, align 8, !tbaa !5
  %85 = load i32, ptr %29, align 4, !tbaa !9
  %86 = load i32, ptr %30, align 4, !tbaa !9
  %87 = load i32, ptr %51, align 4, !tbaa !9
  %88 = load i32, ptr %31, align 4, !tbaa !9
  %89 = mul i32 %87, %88
  %90 = load i32, ptr %32, align 4, !tbaa !9
  %91 = mul i32 %89, %90
  %92 = load i32, ptr %52, align 4, !tbaa !9
  %93 = load i32, ptr %35, align 4, !tbaa !9
  %94 = mul i32 %92, %93
  %95 = load i32, ptr %32, align 4, !tbaa !9
  %96 = mul i32 %94, %95
  %97 = add i32 %91, %96
  %98 = load i8, ptr %33, align 1, !tbaa !11
  %99 = load i32, ptr %55, align 4, !tbaa !9
  %100 = load i32, ptr %41, align 4, !tbaa !9
  %101 = icmp ugt i32 %100, 0
  br i1 %101, label %102, label %107

102:                                              ; preds = %69
  %103 = load i32, ptr %51, align 4, !tbaa !9
  %104 = load i32, ptr %27, align 4, !tbaa !9
  %105 = sub i32 %104, 1
  %106 = icmp eq i32 %103, %105
  br label %107

107:                                              ; preds = %102, %69
  %108 = phi i1 [ false, %69 ], [ %106, %102 ]
  %109 = zext i1 %108 to i64
  %110 = select i1 %108, i32 1, i32 0
  %111 = load i32, ptr %34, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %84, i32 noundef %85, i32 noundef %86, i32 noundef 127, i32 noundef 0, i32 noundef %97, i8 noundef signext %98, i32 noundef %99, i32 noundef %110, i32 noundef %111, i32 noundef 0)
  %112 = load i32, ptr %45, align 4, !tbaa !9
  %113 = icmp eq i32 %112, 1
  br i1 %113, label %114, label %214

114:                                              ; preds = %107
  %115 = load ptr, ptr %26, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %115, i32 0, i32 6
  %117 = load i32, ptr %116, align 4, !tbaa !12
  %118 = icmp uge i32 %117, 1051
  br i1 %118, label %119, label %155

119:                                              ; preds = %114
  %120 = load i32, ptr %41, align 4, !tbaa !9
  %121 = icmp ugt i32 %120, 0
  br i1 %121, label %122, label %138

122:                                              ; preds = %119
  %123 = load i32, ptr %51, align 4, !tbaa !9
  %124 = load i32, ptr %27, align 4, !tbaa !9
  %125 = sub i32 %124, 1
  %126 = icmp eq i32 %123, %125
  br i1 %126, label %127, label %132

127:                                              ; preds = %122
  %128 = load ptr, ptr %26, align 8, !tbaa !5
  %129 = load i32, ptr %43, align 4, !tbaa !9
  %130 = load i32, ptr %43, align 4, !tbaa !9
  %131 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %128, i32 noundef -1341910203, i32 noundef %129, i32 noundef %130, i32 noundef %131, i32 noundef 0)
  br label %137

132:                                              ; preds = %122
  %133 = load ptr, ptr %26, align 8, !tbaa !5
  %134 = load i32, ptr %42, align 4, !tbaa !9
  %135 = load i32, ptr %42, align 4, !tbaa !9
  %136 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %133, i32 noundef -1341910203, i32 noundef %134, i32 noundef %135, i32 noundef %136, i32 noundef 0)
  br label %137

137:                                              ; preds = %132, %127
  br label %143

138:                                              ; preds = %119
  %139 = load ptr, ptr %26, align 8, !tbaa !5
  %140 = load i32, ptr %42, align 4, !tbaa !9
  %141 = load i32, ptr %42, align 4, !tbaa !9
  %142 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %139, i32 noundef -1341910203, i32 noundef %140, i32 noundef %141, i32 noundef %142, i32 noundef 0)
  br label %143

143:                                              ; preds = %138, %137
  %144 = load ptr, ptr %26, align 8, !tbaa !5
  %145 = load ptr, ptr %26, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %145, i32 0, i32 6
  %147 = load i32, ptr %146, align 4, !tbaa !12
  %148 = load i32, ptr %36, align 4, !tbaa !9
  %149 = load i32, ptr %46, align 4, !tbaa !9
  %150 = load i32, ptr %55, align 4, !tbaa !9
  %151 = load i32, ptr %48, align 4, !tbaa !9
  %152 = load i8, ptr %39, align 1, !tbaa !11
  %153 = load i32, ptr %56, align 4, !tbaa !9
  %154 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %144, i32 noundef %147, i32 noundef %148, i32 noundef %149, i32 noundef %150, i32 noundef %151, i32 noundef 0, i8 noundef signext %152, i32 noundef %153, i32 noundef %154, i32 noundef 0, i32 noundef 0)
  br label %185

155:                                              ; preds = %114
  %156 = load i32, ptr %41, align 4, !tbaa !9
  %157 = icmp ugt i32 %156, 0
  br i1 %157, label %158, label %172

158:                                              ; preds = %155
  %159 = load i32, ptr %51, align 4, !tbaa !9
  %160 = load i32, ptr %27, align 4, !tbaa !9
  %161 = sub i32 %160, 1
  %162 = icmp eq i32 %159, %161
  br i1 %162, label %163, label %167

163:                                              ; preds = %158
  %164 = load ptr, ptr %26, align 8, !tbaa !5
  %165 = load i32, ptr %43, align 4, !tbaa !9
  %166 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %164, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %165, i32 noundef %166)
  br label %171

167:                                              ; preds = %158
  %168 = load ptr, ptr %26, align 8, !tbaa !5
  %169 = load i32, ptr %42, align 4, !tbaa !9
  %170 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %168, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %169, i32 noundef %170)
  br label %171

171:                                              ; preds = %167, %163
  br label %176

172:                                              ; preds = %155
  %173 = load ptr, ptr %26, align 8, !tbaa !5
  %174 = load i32, ptr %42, align 4, !tbaa !9
  %175 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %173, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %174, i32 noundef %175)
  br label %176

176:                                              ; preds = %172, %171
  %177 = load ptr, ptr %26, align 8, !tbaa !5
  %178 = load i32, ptr %36, align 4, !tbaa !9
  %179 = load i32, ptr %46, align 4, !tbaa !9
  %180 = load i32, ptr %55, align 4, !tbaa !9
  %181 = load i32, ptr %48, align 4, !tbaa !9
  %182 = load i8, ptr %39, align 1, !tbaa !11
  %183 = load i32, ptr %56, align 4, !tbaa !9
  %184 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_mask_move(ptr noundef %177, i32 noundef %178, i32 noundef %179, i32 noundef %180, i32 noundef %181, i32 noundef 0, i8 noundef signext %182, i32 noundef %183, i32 noundef %184, i32 noundef 0)
  br label %185

185:                                              ; preds = %176, %143
  %186 = load ptr, ptr %26, align 8, !tbaa !5
  %187 = load i32, ptr %37, align 4, !tbaa !9
  %188 = load i32, ptr %47, align 4, !tbaa !9
  %189 = load i32, ptr %51, align 4, !tbaa !9
  %190 = load i32, ptr %38, align 4, !tbaa !9
  %191 = mul i32 %189, %190
  %192 = load i32, ptr %49, align 4, !tbaa !9
  %193 = mul i32 %191, %192
  %194 = load i32, ptr %52, align 4, !tbaa !9
  %195 = load i32, ptr %50, align 4, !tbaa !9
  %196 = mul i32 %194, %195
  %197 = load i32, ptr %49, align 4, !tbaa !9
  %198 = mul i32 %196, %197
  %199 = add i32 %193, %198
  %200 = load i8, ptr %40, align 1, !tbaa !11
  %201 = load i32, ptr %56, align 4, !tbaa !9
  %202 = load i32, ptr %41, align 4, !tbaa !9
  %203 = icmp ugt i32 %202, 0
  br i1 %203, label %204, label %209

204:                                              ; preds = %185
  %205 = load i32, ptr %51, align 4, !tbaa !9
  %206 = load i32, ptr %27, align 4, !tbaa !9
  %207 = sub i32 %206, 1
  %208 = icmp eq i32 %205, %207
  br label %209

209:                                              ; preds = %204, %185
  %210 = phi i1 [ false, %185 ], [ %208, %204 ]
  %211 = zext i1 %210 to i64
  %212 = select i1 %210, i32 1, i32 0
  %213 = load i32, ptr %43, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %186, i32 noundef %187, i32 noundef %188, i32 noundef 127, i32 noundef 0, i32 noundef %199, i8 noundef signext %200, i32 noundef %201, i32 noundef %212, i32 noundef %213, i32 noundef 1)
  br label %278

214:                                              ; preds = %107
  %215 = load ptr, ptr %26, align 8, !tbaa !5
  %216 = load i32, ptr %36, align 4, !tbaa !9
  %217 = load i32, ptr %47, align 4, !tbaa !9
  %218 = load i32, ptr %51, align 4, !tbaa !9
  %219 = load i32, ptr %38, align 4, !tbaa !9
  %220 = mul i32 %218, %219
  %221 = load i32, ptr %49, align 4, !tbaa !9
  %222 = mul i32 %220, %221
  %223 = load i32, ptr %52, align 4, !tbaa !9
  %224 = load i32, ptr %50, align 4, !tbaa !9
  %225 = mul i32 %223, %224
  %226 = load i32, ptr %49, align 4, !tbaa !9
  %227 = mul i32 %225, %226
  %228 = add i32 %222, %227
  %229 = load i8, ptr %39, align 1, !tbaa !11
  %230 = load i32, ptr %56, align 4, !tbaa !9
  %231 = load i32, ptr %41, align 4, !tbaa !9
  %232 = icmp ugt i32 %231, 0
  br i1 %232, label %233, label %238

233:                                              ; preds = %214
  %234 = load i32, ptr %51, align 4, !tbaa !9
  %235 = load i32, ptr %27, align 4, !tbaa !9
  %236 = sub i32 %235, 1
  %237 = icmp eq i32 %234, %236
  br label %238

238:                                              ; preds = %233, %214
  %239 = phi i1 [ false, %214 ], [ %237, %233 ]
  %240 = zext i1 %239 to i64
  %241 = select i1 %239, i32 1, i32 0
  %242 = load i32, ptr %43, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %215, i32 noundef %216, i32 noundef %217, i32 noundef 127, i32 noundef 0, i32 noundef %228, i8 noundef signext %229, i32 noundef %230, i32 noundef %241, i32 noundef %242, i32 noundef 0)
  %243 = load i32, ptr %41, align 4, !tbaa !9
  %244 = icmp ugt i32 %243, 0
  br i1 %244, label %245, label %261

245:                                              ; preds = %238
  %246 = load i32, ptr %51, align 4, !tbaa !9
  %247 = load i32, ptr %27, align 4, !tbaa !9
  %248 = sub i32 %247, 1
  %249 = icmp eq i32 %246, %248
  br i1 %249, label %250, label %255

250:                                              ; preds = %245
  %251 = load ptr, ptr %26, align 8, !tbaa !5
  %252 = load i32, ptr %43, align 4, !tbaa !9
  %253 = load i32, ptr %43, align 4, !tbaa !9
  %254 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %251, i32 noundef -1341910203, i32 noundef %252, i32 noundef %253, i32 noundef %254, i32 noundef 0)
  br label %260

255:                                              ; preds = %245
  %256 = load ptr, ptr %26, align 8, !tbaa !5
  %257 = load i32, ptr %42, align 4, !tbaa !9
  %258 = load i32, ptr %42, align 4, !tbaa !9
  %259 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %256, i32 noundef -1341910203, i32 noundef %257, i32 noundef %258, i32 noundef %259, i32 noundef 0)
  br label %260

260:                                              ; preds = %255, %250
  br label %266

261:                                              ; preds = %238
  %262 = load ptr, ptr %26, align 8, !tbaa !5
  %263 = load i32, ptr %42, align 4, !tbaa !9
  %264 = load i32, ptr %42, align 4, !tbaa !9
  %265 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %262, i32 noundef -1341910203, i32 noundef %263, i32 noundef %264, i32 noundef %265, i32 noundef 0)
  br label %266

266:                                              ; preds = %261, %260
  %267 = load ptr, ptr %26, align 8, !tbaa !5
  %268 = load ptr, ptr %26, align 8, !tbaa !5
  %269 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %268, i32 0, i32 6
  %270 = load i32, ptr %269, align 4, !tbaa !12
  %271 = load i32, ptr %37, align 4, !tbaa !9
  %272 = load i32, ptr %46, align 4, !tbaa !9
  %273 = load i32, ptr %55, align 4, !tbaa !9
  %274 = load i32, ptr %48, align 4, !tbaa !9
  %275 = load i8, ptr %40, align 1, !tbaa !11
  %276 = load i32, ptr %56, align 4, !tbaa !9
  %277 = load i32, ptr %44, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %267, i32 noundef %270, i32 noundef %271, i32 noundef %272, i32 noundef %273, i32 noundef %274, i32 noundef 0, i8 noundef signext %275, i32 noundef %276, i32 noundef %277, i32 noundef 0, i32 noundef 0)
  br label %278

278:                                              ; preds = %266, %209
  call void @llvm.lifetime.end.p0(i64 4, ptr %56) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %55) #3
  br label %279

279:                                              ; preds = %278
  %280 = load i32, ptr %51, align 4, !tbaa !9
  %281 = add i32 %280, 1
  store i32 %281, ptr %51, align 4, !tbaa !9
  br label %65, !llvm.loop !14

282:                                              ; preds = %65
  br label %283

283:                                              ; preds = %282
  %284 = load i32, ptr %52, align 4, !tbaa !9
  %285 = add i32 %284, 1
  store i32 %285, ptr %52, align 4, !tbaa !9
  br label %60, !llvm.loop !16

286:                                              ; preds = %60
  call void @llvm.lifetime.end.p0(i64 4, ptr %54) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %53) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %52) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %51) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_mask_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_offs_avx_avx512_mn_loop_unrolled(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i8 noundef signext %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i8 noundef signext %13, i8 noundef signext %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24) local_unnamed_addr #1 {
  %26 = mul i32 %2, %1
  %factor.op.mul143 = mul i32 %6, %9
  %factor.op.mul = mul i32 %23, %24
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %._crit_edge146, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %25
  %factor.op.mul132 = mul i32 %5, %6
  %factor.op.mul136 = mul i32 %12, %23
  %.not151 = icmp eq i32 %1, 0
  %27 = icmp ne i32 %15, 0
  %28 = add i32 %1, -1
  %29 = getelementptr inbounds i8, ptr %0, i64 28
  br i1 %.not151, label %._crit_edge146, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  %30 = icmp eq i32 %19, 1
  br i1 %30, label %.preheader.us.us, label %.preheader.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us.us.us
  %.0130145.us.us = phi i32 [ %54, %._crit_edge.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us ]
  %factor.op.mul.reass.us.us = mul i32 %.0130145.us.us, %factor.op.mul143
  %factor.op.mul138.reass.us.us = mul i32 %.0130145.us.us, %factor.op.mul
  %31 = mul i32 %.0130145.us.us, %1
  %32 = add i32 %31, %26
  br label %33

33:                                               ; preds = %51, %.preheader.us.us
  %.0142.us.us.us = phi i32 [ 0, %.preheader.us.us ], [ %53, %51 ]
  %34 = add i32 %.0142.us.us.us, %31
  %35 = add i32 %32, %.0142.us.us.us
  %.reass133.us.us.us = mul i32 %.0142.us.us.us, %factor.op.mul132
  %36 = add i32 %.reass133.us.us.us, %factor.op.mul.reass.us.us
  %37 = icmp eq i32 %.0142.us.us.us, %28
  %38 = and i1 %27, %37
  %39 = zext i1 %38 to i32
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %0, i32 noundef %3, i32 noundef %4, i32 noundef 127, i32 noundef 0, i32 noundef %36, i8 noundef signext %7, i32 noundef %34, i32 noundef %39, i32 noundef %8, i32 noundef 0) #2
  %40 = load i32, ptr %29, align 4, !tbaa !5
  %41 = icmp ugt i32 %40, 1050
  br i1 %41, label %44, label %42

42:                                               ; preds = %33
  %43 = and i1 %27, %37
  %.sink = select i1 %43, i32 %17, i32 %16
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %.sink, i32 noundef %18) #2
  tail call void @libxsmm_x86_instruction_vec_mask_move(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %20, i32 noundef %34, i32 noundef %22, i32 noundef 0, i8 noundef signext %13, i32 noundef %35, i32 noundef %18, i32 noundef 0) #2
  br label %51

44:                                               ; preds = %33
  br i1 %27, label %46, label %45

45:                                               ; preds = %44
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %16, i32 noundef %16, i32 noundef %18, i32 noundef 0) #2
  br label %49

46:                                               ; preds = %44
  br i1 %37, label %48, label %47

47:                                               ; preds = %46
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %16, i32 noundef %16, i32 noundef %18, i32 noundef 0) #2
  br label %49

48:                                               ; preds = %46
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %17, i32 noundef %17, i32 noundef %18, i32 noundef 0) #2
  br label %49

49:                                               ; preds = %48, %47, %45
  %50 = load i32, ptr %29, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %50, i32 noundef %10, i32 noundef %20, i32 noundef %34, i32 noundef %22, i32 noundef 0, i8 noundef signext %13, i32 noundef %35, i32 noundef %18, i32 noundef 0, i32 noundef 0) #2
  br label %51

51:                                               ; preds = %49, %42
  %.reass141.us.us.us = mul i32 %.0142.us.us.us, %factor.op.mul136
  %52 = add i32 %.reass141.us.us.us, %factor.op.mul138.reass.us.us
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef nonnull %0, i32 noundef %11, i32 noundef %21, i32 noundef 127, i32 noundef 0, i32 noundef %52, i8 noundef signext %14, i32 noundef %35, i32 noundef %39, i32 noundef %17, i32 noundef 1) #2
  %53 = add nuw i32 %.0142.us.us.us, 1
  %exitcond155.not = icmp eq i32 %53, %1
  br i1 %exitcond155.not, label %._crit_edge.split.us.us.us, label %33, !llvm.loop !11

._crit_edge.split.us.us.us:                       ; preds = %51
  %54 = add nuw i32 %.0130145.us.us, 1
  %exitcond156.not = icmp eq i32 %54, %2
  br i1 %exitcond156.not, label %._crit_edge146, label %.preheader.us.us, !llvm.loop !13

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us149
  %.0130145.us = phi i32 [ %72, %._crit_edge.split.us149 ], [ 0, %.preheader.lr.ph.split.us ]
  %factor.op.mul.reass.us = mul i32 %.0130145.us, %factor.op.mul143
  %factor.op.mul134.reass.us = mul i32 %.0130145.us, %factor.op.mul
  %55 = mul i32 %.0130145.us, %1
  %56 = add i32 %55, %26
  br label %57

57:                                               ; preds = %.preheader.us, %69
  %.0142.us147 = phi i32 [ 0, %.preheader.us ], [ %71, %69 ]
  %58 = add i32 %.0142.us147, %55
  %59 = add i32 %56, %.0142.us147
  %.reass133.us148 = mul i32 %.0142.us147, %factor.op.mul132
  %60 = add i32 %.reass133.us148, %factor.op.mul.reass.us
  %61 = icmp eq i32 %.0142.us147, %28
  %62 = and i1 %27, %61
  %63 = zext i1 %62 to i32
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %0, i32 noundef %3, i32 noundef %4, i32 noundef 127, i32 noundef 0, i32 noundef %60, i8 noundef signext %7, i32 noundef %58, i32 noundef %63, i32 noundef %8, i32 noundef 0) #2
  %.reass137.us = mul i32 %.0142.us147, %factor.op.mul136
  %64 = add i32 %.reass137.us, %factor.op.mul134.reass.us
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %0, i32 noundef %10, i32 noundef %21, i32 noundef 127, i32 noundef 0, i32 noundef %64, i8 noundef signext %13, i32 noundef %59, i32 noundef %63, i32 noundef %17, i32 noundef 0) #2
  br i1 %27, label %66, label %65

65:                                               ; preds = %57
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %16, i32 noundef %16, i32 noundef %18, i32 noundef 0) #2
  br label %69

66:                                               ; preds = %57
  br i1 %61, label %68, label %67

67:                                               ; preds = %66
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %16, i32 noundef %16, i32 noundef %18, i32 noundef 0) #2
  br label %69

68:                                               ; preds = %66
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %17, i32 noundef %17, i32 noundef %18, i32 noundef 0) #2
  br label %69

69:                                               ; preds = %68, %67, %65
  %70 = load i32, ptr %29, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %0, i32 noundef %70, i32 noundef %11, i32 noundef %20, i32 noundef %58, i32 noundef %22, i32 noundef 0, i8 noundef signext %14, i32 noundef %59, i32 noundef %18, i32 noundef 0, i32 noundef 0) #2
  %71 = add nuw i32 %.0142.us147, 1
  %exitcond.not = icmp eq i32 %71, %1
  br i1 %exitcond.not, label %._crit_edge.split.us149, label %57, !llvm.loop !11

._crit_edge.split.us149:                          ; preds = %69
  %72 = add nuw i32 %.0130145.us, 1
  %exitcond154.not = icmp eq i32 %72, %2
  br i1 %exitcond154.not, label %._crit_edge146, label %.preheader.us, !llvm.loop !13

._crit_edge146:                                   ; preds = %._crit_edge.split.us149, %._crit_edge.split.us.us.us, %.preheader.lr.ph, %25
  ret void
}

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_mask_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass