; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_sme)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_kloop_sme_het(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #0 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca ptr, align 8
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %2, ptr %12, align 8, !tbaa !5
  store ptr %3, ptr %13, align 8, !tbaa !5
  store ptr %4, ptr %14, align 8, !tbaa !5
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  %20 = load i32, ptr %17, align 4, !tbaa !9
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %23

22:                                               ; preds = %9
  store ptr @libxsmm_generator_gemm_aarch64_microkernel_sme, ptr %19, align 8, !tbaa !5
  br label %29

23:                                               ; preds = %9
  %24 = load i32, ptr %17, align 4, !tbaa !9
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %27

26:                                               ; preds = %23
  store ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_64x16, ptr %19, align 8, !tbaa !5
  br label %28

27:                                               ; preds = %23
  store ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_16x64, ptr %19, align 8, !tbaa !5
  br label %28

28:                                               ; preds = %27, %26
  br label %29

29:                                               ; preds = %28, %22
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %31, i32 0, i32 22
  %33 = load i32, ptr %32, align 4, !tbaa !11
  %34 = load ptr, ptr %14, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %34, i32 0, i32 3
  %36 = load i32, ptr %35, align 1, !tbaa !13
  %37 = zext i32 %36 to i64
  %38 = load ptr, ptr %13, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %38, i32 0, i32 3
  %40 = load i32, ptr %39, align 4, !tbaa !17
  %41 = zext i32 %40 to i64
  %42 = mul nsw i64 %37, %41
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %30, i32 noundef %33, i64 noundef %42)
  %43 = load ptr, ptr %14, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %43, i32 0, i32 6
  %45 = load i32, ptr %44, align 1, !tbaa !20
  %46 = and i32 %45, 2
  %47 = icmp ugt i32 %46, 0
  br i1 %47, label %48, label %62

48:                                               ; preds = %29
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = load ptr, ptr %12, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %50, i32 0, i32 23
  %52 = load i32, ptr %51, align 4, !tbaa !21
  %53 = load ptr, ptr %14, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %53, i32 0, i32 4
  %55 = load i32, ptr %54, align 1, !tbaa !22
  %56 = zext i32 %55 to i64
  %57 = load ptr, ptr %13, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %57, i32 0, i32 3
  %59 = load i32, ptr %58, align 4, !tbaa !17
  %60 = zext i32 %59 to i64
  %61 = mul nsw i64 %56, %60
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %49, i32 noundef %52, i64 noundef %61)
  br label %74

62:                                               ; preds = %29
  %63 = load ptr, ptr %10, align 8, !tbaa !5
  %64 = load ptr, ptr %12, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %64, i32 0, i32 23
  %66 = load i32, ptr %65, align 4, !tbaa !21
  %67 = load i32, ptr %18, align 4, !tbaa !9
  %68 = zext i32 %67 to i64
  %69 = load ptr, ptr %13, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %69, i32 0, i32 3
  %71 = load i32, ptr %70, align 4, !tbaa !17
  %72 = zext i32 %71 to i64
  %73 = mul nsw i64 %68, %72
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %63, i32 noundef %66, i64 noundef %73)
  br label %74

74:                                               ; preds = %62, %48
  %75 = load i32, ptr %17, align 4, !tbaa !9
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %178

77:                                               ; preds = %74
  %78 = load ptr, ptr %10, align 8, !tbaa !5
  %79 = load i32, ptr %15, align 4, !tbaa !9
  %80 = load ptr, ptr %13, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %80, i32 0, i32 3
  %82 = load i32, ptr %81, align 4, !tbaa !17
  %83 = mul i32 %79, %82
  %84 = load ptr, ptr %12, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %84, i32 0, i32 24
  %86 = load i32, ptr %85, align 4, !tbaa !23
  call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %78, i32 noundef 8, i32 noundef %83, i32 noundef %86, i32 noundef 0)
  %87 = load ptr, ptr %10, align 8, !tbaa !5
  %88 = load i32, ptr %16, align 4, !tbaa !9
  %89 = load ptr, ptr %13, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %89, i32 0, i32 3
  %91 = load i32, ptr %90, align 4, !tbaa !17
  %92 = mul i32 %88, %91
  %93 = load ptr, ptr %12, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %93, i32 0, i32 24
  %95 = load i32, ptr %94, align 4, !tbaa !23
  call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %87, i32 noundef 9, i32 noundef %92, i32 noundef %95, i32 noundef 0)
  %96 = load i32, ptr %15, align 4, !tbaa !9
  %97 = icmp eq i32 %96, 32
  br i1 %97, label %98, label %107

98:                                               ; preds = %77
  %99 = load ptr, ptr %10, align 8, !tbaa !5
  %100 = load ptr, ptr %12, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %100, i32 0, i32 24
  %102 = load i32, ptr %101, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %99, i32 noundef 0, i32 noundef -1, i32 noundef %102)
  %103 = load ptr, ptr %10, align 8, !tbaa !5
  %104 = load ptr, ptr %12, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %104, i32 0, i32 24
  %106 = load i32, ptr %105, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %103, i32 noundef 2, i32 noundef -1, i32 noundef %106)
  br label %136

107:                                              ; preds = %77
  %108 = load i32, ptr %15, align 4, !tbaa !9
  %109 = icmp ugt i32 %108, 16
  br i1 %109, label %110, label %125

110:                                              ; preds = %107
  %111 = load ptr, ptr %10, align 8, !tbaa !5
  %112 = load ptr, ptr %12, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %112, i32 0, i32 24
  %114 = load i32, ptr %113, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %111, i32 noundef 0, i32 noundef -1, i32 noundef %114)
  %115 = load ptr, ptr %10, align 8, !tbaa !5
  %116 = load i32, ptr %15, align 4, !tbaa !9
  %117 = sub i32 %116, 16
  %118 = load ptr, ptr %13, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %118, i32 0, i32 3
  %120 = load i32, ptr %119, align 4, !tbaa !17
  %121 = mul i32 %117, %120
  %122 = load ptr, ptr %12, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %122, i32 0, i32 24
  %124 = load i32, ptr %123, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %115, i32 noundef 2, i32 noundef %121, i32 noundef %124)
  br label %135

125:                                              ; preds = %107
  %126 = load ptr, ptr %10, align 8, !tbaa !5
  %127 = load i32, ptr %15, align 4, !tbaa !9
  %128 = load ptr, ptr %13, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %128, i32 0, i32 3
  %130 = load i32, ptr %129, align 4, !tbaa !17
  %131 = mul i32 %127, %130
  %132 = load ptr, ptr %12, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %132, i32 0, i32 24
  %134 = load i32, ptr %133, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %126, i32 noundef 0, i32 noundef %131, i32 noundef %134)
  br label %135

135:                                              ; preds = %125, %110
  br label %136

136:                                              ; preds = %135, %98
  %137 = load i32, ptr %16, align 4, !tbaa !9
  %138 = icmp eq i32 %137, 32
  br i1 %138, label %139, label %148

139:                                              ; preds = %136
  %140 = load ptr, ptr %10, align 8, !tbaa !5
  %141 = load ptr, ptr %12, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %141, i32 0, i32 24
  %143 = load i32, ptr %142, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %140, i32 noundef 1, i32 noundef -1, i32 noundef %143)
  %144 = load ptr, ptr %10, align 8, !tbaa !5
  %145 = load ptr, ptr %12, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %145, i32 0, i32 24
  %147 = load i32, ptr %146, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %144, i32 noundef 3, i32 noundef -1, i32 noundef %147)
  br label %177

148:                                              ; preds = %136
  %149 = load i32, ptr %16, align 4, !tbaa !9
  %150 = icmp ugt i32 %149, 16
  br i1 %150, label %151, label %166

151:                                              ; preds = %148
  %152 = load ptr, ptr %10, align 8, !tbaa !5
  %153 = load ptr, ptr %12, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %153, i32 0, i32 24
  %155 = load i32, ptr %154, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %152, i32 noundef 1, i32 noundef -1, i32 noundef %155)
  %156 = load ptr, ptr %10, align 8, !tbaa !5
  %157 = load i32, ptr %16, align 4, !tbaa !9
  %158 = sub i32 %157, 16
  %159 = load ptr, ptr %13, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %159, i32 0, i32 3
  %161 = load i32, ptr %160, align 4, !tbaa !17
  %162 = mul i32 %158, %161
  %163 = load ptr, ptr %12, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %163, i32 0, i32 24
  %165 = load i32, ptr %164, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %156, i32 noundef 3, i32 noundef %162, i32 noundef %165)
  br label %176

166:                                              ; preds = %148
  %167 = load ptr, ptr %10, align 8, !tbaa !5
  %168 = load i32, ptr %16, align 4, !tbaa !9
  %169 = load ptr, ptr %13, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %169, i32 0, i32 3
  %171 = load i32, ptr %170, align 4, !tbaa !17
  %172 = mul i32 %168, %171
  %173 = load ptr, ptr %12, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %173, i32 0, i32 24
  %175 = load i32, ptr %174, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %167, i32 noundef 1, i32 noundef %172, i32 noundef %175)
  br label %176

176:                                              ; preds = %166, %151
  br label %177

177:                                              ; preds = %176, %139
  br label %375

178:                                              ; preds = %74
  %179 = load i32, ptr %17, align 4, !tbaa !9
  %180 = icmp eq i32 %179, 1
  br i1 %180, label %181, label %275

181:                                              ; preds = %178
  %182 = load ptr, ptr %10, align 8, !tbaa !5
  %183 = load i32, ptr %15, align 4, !tbaa !9
  %184 = load ptr, ptr %13, align 8, !tbaa !5
  %185 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %184, i32 0, i32 3
  %186 = load i32, ptr %185, align 4, !tbaa !17
  %187 = mul i32 %183, %186
  %188 = load ptr, ptr %12, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %188, i32 0, i32 24
  %190 = load i32, ptr %189, align 4, !tbaa !23
  call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %182, i32 noundef 8, i32 noundef %187, i32 noundef %190, i32 noundef 1)
  %191 = load ptr, ptr %10, align 8, !tbaa !5
  %192 = load i32, ptr %16, align 4, !tbaa !9
  %193 = load ptr, ptr %13, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %193, i32 0, i32 3
  %195 = load i32, ptr %194, align 4, !tbaa !17
  %196 = mul i32 %192, %195
  %197 = load ptr, ptr %12, align 8, !tbaa !5
  %198 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %197, i32 0, i32 24
  %199 = load i32, ptr %198, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %191, i32 noundef 4, i32 noundef %196, i32 noundef %199)
  %200 = load ptr, ptr %10, align 8, !tbaa !5
  %201 = load i32, ptr %15, align 4, !tbaa !9
  %202 = icmp ugt i32 %201, 16
  br i1 %202, label %203, label %204

203:                                              ; preds = %181
  br label %210

204:                                              ; preds = %181
  %205 = load i32, ptr %15, align 4, !tbaa !9
  %206 = load ptr, ptr %13, align 8, !tbaa !5
  %207 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %206, i32 0, i32 3
  %208 = load i32, ptr %207, align 4, !tbaa !17
  %209 = mul nsw i32 %205, %208
  br label %210

210:                                              ; preds = %204, %203
  %211 = phi i32 [ -1, %203 ], [ %209, %204 ]
  %212 = load ptr, ptr %12, align 8, !tbaa !5
  %213 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %212, i32 0, i32 24
  %214 = load i32, ptr %213, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %200, i32 noundef 0, i32 noundef %211, i32 noundef %214)
  %215 = load i32, ptr %15, align 4, !tbaa !9
  %216 = icmp ugt i32 %215, 16
  br i1 %216, label %217, label %234

217:                                              ; preds = %210
  %218 = load ptr, ptr %10, align 8, !tbaa !5
  %219 = load i32, ptr %15, align 4, !tbaa !9
  %220 = icmp ugt i32 %219, 32
  br i1 %220, label %221, label %222

221:                                              ; preds = %217
  br label %229

222:                                              ; preds = %217
  %223 = load i32, ptr %15, align 4, !tbaa !9
  %224 = sub i32 %223, 16
  %225 = load ptr, ptr %13, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %225, i32 0, i32 3
  %227 = load i32, ptr %226, align 4, !tbaa !17
  %228 = mul nsw i32 %224, %227
  br label %229

229:                                              ; preds = %222, %221
  %230 = phi i32 [ -1, %221 ], [ %228, %222 ]
  %231 = load ptr, ptr %12, align 8, !tbaa !5
  %232 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %231, i32 0, i32 24
  %233 = load i32, ptr %232, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %218, i32 noundef 1, i32 noundef %230, i32 noundef %233)
  br label %234

234:                                              ; preds = %229, %210
  %235 = load i32, ptr %15, align 4, !tbaa !9
  %236 = icmp ugt i32 %235, 32
  br i1 %236, label %237, label %254

237:                                              ; preds = %234
  %238 = load ptr, ptr %10, align 8, !tbaa !5
  %239 = load i32, ptr %15, align 4, !tbaa !9
  %240 = icmp ugt i32 %239, 48
  br i1 %240, label %241, label %242

241:                                              ; preds = %237
  br label %249

242:                                              ; preds = %237
  %243 = load i32, ptr %15, align 4, !tbaa !9
  %244 = sub i32 %243, 32
  %245 = load ptr, ptr %13, align 8, !tbaa !5
  %246 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %245, i32 0, i32 3
  %247 = load i32, ptr %246, align 4, !tbaa !17
  %248 = mul nsw i32 %244, %247
  br label %249

249:                                              ; preds = %242, %241
  %250 = phi i32 [ -1, %241 ], [ %248, %242 ]
  %251 = load ptr, ptr %12, align 8, !tbaa !5
  %252 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %251, i32 0, i32 24
  %253 = load i32, ptr %252, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %238, i32 noundef 2, i32 noundef %250, i32 noundef %253)
  br label %254

254:                                              ; preds = %249, %234
  %255 = load i32, ptr %15, align 4, !tbaa !9
  %256 = icmp ugt i32 %255, 48
  br i1 %256, label %257, label %274

257:                                              ; preds = %254
  %258 = load ptr, ptr %10, align 8, !tbaa !5
  %259 = load i32, ptr %15, align 4, !tbaa !9
  %260 = icmp eq i32 %259, 64
  br i1 %260, label %261, label %262

261:                                              ; preds = %257
  br label %269

262:                                              ; preds = %257
  %263 = load i32, ptr %15, align 4, !tbaa !9
  %264 = sub i32 %263, 48
  %265 = load ptr, ptr %13, align 8, !tbaa !5
  %266 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %265, i32 0, i32 3
  %267 = load i32, ptr %266, align 4, !tbaa !17
  %268 = mul nsw i32 %264, %267
  br label %269

269:                                              ; preds = %262, %261
  %270 = phi i32 [ -1, %261 ], [ %268, %262 ]
  %271 = load ptr, ptr %12, align 8, !tbaa !5
  %272 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %271, i32 0, i32 24
  %273 = load i32, ptr %272, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %258, i32 noundef 3, i32 noundef %270, i32 noundef %273)
  br label %274

274:                                              ; preds = %269, %254
  br label %374

275:                                              ; preds = %178
  %276 = load i32, ptr %17, align 4, !tbaa !9
  %277 = icmp eq i32 %276, 2
  br i1 %277, label %278, label %372

278:                                              ; preds = %275
  %279 = load ptr, ptr %10, align 8, !tbaa !5
  %280 = load i32, ptr %16, align 4, !tbaa !9
  %281 = load ptr, ptr %13, align 8, !tbaa !5
  %282 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %281, i32 0, i32 3
  %283 = load i32, ptr %282, align 4, !tbaa !17
  %284 = mul i32 %280, %283
  %285 = load ptr, ptr %12, align 8, !tbaa !5
  %286 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %285, i32 0, i32 24
  %287 = load i32, ptr %286, align 4, !tbaa !23
  call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %279, i32 noundef 8, i32 noundef %284, i32 noundef %287, i32 noundef 1)
  %288 = load ptr, ptr %10, align 8, !tbaa !5
  %289 = load i32, ptr %15, align 4, !tbaa !9
  %290 = load ptr, ptr %13, align 8, !tbaa !5
  %291 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %290, i32 0, i32 3
  %292 = load i32, ptr %291, align 4, !tbaa !17
  %293 = mul i32 %289, %292
  %294 = load ptr, ptr %12, align 8, !tbaa !5
  %295 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %294, i32 0, i32 24
  %296 = load i32, ptr %295, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %288, i32 noundef 4, i32 noundef %293, i32 noundef %296)
  %297 = load ptr, ptr %10, align 8, !tbaa !5
  %298 = load i32, ptr %16, align 4, !tbaa !9
  %299 = icmp ugt i32 %298, 16
  br i1 %299, label %300, label %301

300:                                              ; preds = %278
  br label %307

301:                                              ; preds = %278
  %302 = load i32, ptr %16, align 4, !tbaa !9
  %303 = load ptr, ptr %13, align 8, !tbaa !5
  %304 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %303, i32 0, i32 3
  %305 = load i32, ptr %304, align 4, !tbaa !17
  %306 = mul nsw i32 %302, %305
  br label %307

307:                                              ; preds = %301, %300
  %308 = phi i32 [ -1, %300 ], [ %306, %301 ]
  %309 = load ptr, ptr %12, align 8, !tbaa !5
  %310 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %309, i32 0, i32 24
  %311 = load i32, ptr %310, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %297, i32 noundef 0, i32 noundef %308, i32 noundef %311)
  %312 = load i32, ptr %16, align 4, !tbaa !9
  %313 = icmp ugt i32 %312, 16
  br i1 %313, label %314, label %331

314:                                              ; preds = %307
  %315 = load ptr, ptr %10, align 8, !tbaa !5
  %316 = load i32, ptr %16, align 4, !tbaa !9
  %317 = icmp ugt i32 %316, 32
  br i1 %317, label %318, label %319

318:                                              ; preds = %314
  br label %326

319:                                              ; preds = %314
  %320 = load i32, ptr %16, align 4, !tbaa !9
  %321 = sub i32 %320, 16
  %322 = load ptr, ptr %13, align 8, !tbaa !5
  %323 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %322, i32 0, i32 3
  %324 = load i32, ptr %323, align 4, !tbaa !17
  %325 = mul nsw i32 %321, %324
  br label %326

326:                                              ; preds = %319, %318
  %327 = phi i32 [ -1, %318 ], [ %325, %319 ]
  %328 = load ptr, ptr %12, align 8, !tbaa !5
  %329 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %328, i32 0, i32 24
  %330 = load i32, ptr %329, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %315, i32 noundef 1, i32 noundef %327, i32 noundef %330)
  br label %331

331:                                              ; preds = %326, %307
  %332 = load i32, ptr %16, align 4, !tbaa !9
  %333 = icmp ugt i32 %332, 32
  br i1 %333, label %334, label %351

334:                                              ; preds = %331
  %335 = load ptr, ptr %10, align 8, !tbaa !5
  %336 = load i32, ptr %16, align 4, !tbaa !9
  %337 = icmp ugt i32 %336, 48
  br i1 %337, label %338, label %339

338:                                              ; preds = %334
  br label %346

339:                                              ; preds = %334
  %340 = load i32, ptr %16, align 4, !tbaa !9
  %341 = sub i32 %340, 32
  %342 = load ptr, ptr %13, align 8, !tbaa !5
  %343 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %342, i32 0, i32 3
  %344 = load i32, ptr %343, align 4, !tbaa !17
  %345 = mul nsw i32 %341, %344
  br label %346

346:                                              ; preds = %339, %338
  %347 = phi i32 [ -1, %338 ], [ %345, %339 ]
  %348 = load ptr, ptr %12, align 8, !tbaa !5
  %349 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %348, i32 0, i32 24
  %350 = load i32, ptr %349, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %335, i32 noundef 2, i32 noundef %347, i32 noundef %350)
  br label %351

351:                                              ; preds = %346, %331
  %352 = load i32, ptr %16, align 4, !tbaa !9
  %353 = icmp ugt i32 %352, 48
  br i1 %353, label %354, label %371

354:                                              ; preds = %351
  %355 = load ptr, ptr %10, align 8, !tbaa !5
  %356 = load i32, ptr %16, align 4, !tbaa !9
  %357 = icmp eq i32 %356, 64
  br i1 %357, label %358, label %359

358:                                              ; preds = %354
  br label %366

359:                                              ; preds = %354
  %360 = load i32, ptr %16, align 4, !tbaa !9
  %361 = sub i32 %360, 48
  %362 = load ptr, ptr %13, align 8, !tbaa !5
  %363 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %362, i32 0, i32 3
  %364 = load i32, ptr %363, align 4, !tbaa !17
  %365 = mul nsw i32 %361, %364
  br label %366

366:                                              ; preds = %359, %358
  %367 = phi i32 [ -1, %358 ], [ %365, %359 ]
  %368 = load ptr, ptr %12, align 8, !tbaa !5
  %369 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %368, i32 0, i32 24
  %370 = load i32, ptr %369, align 4, !tbaa !23
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %355, i32 noundef 3, i32 noundef %367, i32 noundef %370)
  br label %371

371:                                              ; preds = %366, %351
  br label %373

372:                                              ; preds = %275
  br label %373

373:                                              ; preds = %372, %371
  br label %374

374:                                              ; preds = %373, %274
  br label %375

375:                                              ; preds = %374, %177
  %376 = load ptr, ptr %10, align 8, !tbaa !5
  %377 = load ptr, ptr %11, align 8, !tbaa !5
  %378 = load ptr, ptr %12, align 8, !tbaa !5
  %379 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %378, i32 0, i32 12
  %380 = load i32, ptr %379, align 4, !tbaa !24
  %381 = load ptr, ptr %14, align 8, !tbaa !5
  %382 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %381, i32 0, i32 2
  %383 = load i32, ptr %382, align 1, !tbaa !25
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %376, ptr noundef %377, i32 noundef %380, i32 noundef %383)
  %384 = load ptr, ptr %19, align 8, !tbaa !5
  %385 = load ptr, ptr %10, align 8, !tbaa !5
  %386 = load ptr, ptr %12, align 8, !tbaa !5
  %387 = load ptr, ptr %13, align 8, !tbaa !5
  %388 = load ptr, ptr %14, align 8, !tbaa !5
  %389 = load i32, ptr %15, align 4, !tbaa !9
  %390 = load i32, ptr %16, align 4, !tbaa !9
  call void %384(ptr noundef %385, ptr noundef %386, ptr noundef %387, ptr noundef %388, i32 noundef %389, i32 noundef %390)
  %391 = load ptr, ptr %10, align 8, !tbaa !5
  %392 = load ptr, ptr %11, align 8, !tbaa !5
  %393 = load ptr, ptr %12, align 8, !tbaa !5
  %394 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %393, i32 0, i32 12
  %395 = load i32, ptr %394, align 4, !tbaa !24
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %391, ptr noundef %392, i32 noundef %395, i32 noundef 1)
  %396 = load ptr, ptr %10, align 8, !tbaa !5
  %397 = load ptr, ptr %12, align 8, !tbaa !5
  %398 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %397, i32 0, i32 1
  %399 = load i32, ptr %398, align 4, !tbaa !26
  %400 = load ptr, ptr %12, align 8, !tbaa !5
  %401 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %400, i32 0, i32 22
  %402 = load i32, ptr %401, align 4, !tbaa !11
  %403 = load ptr, ptr %12, align 8, !tbaa !5
  %404 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %403, i32 0, i32 1
  %405 = load i32, ptr %404, align 4, !tbaa !26
  %406 = load ptr, ptr %14, align 8, !tbaa !5
  %407 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %406, i32 0, i32 2
  %408 = load i32, ptr %407, align 1, !tbaa !25
  %409 = zext i32 %408 to i64
  %410 = load ptr, ptr %14, align 8, !tbaa !5
  %411 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %410, i32 0, i32 3
  %412 = load i32, ptr %411, align 1, !tbaa !13
  %413 = zext i32 %412 to i64
  %414 = mul nsw i64 %409, %413
  %415 = load ptr, ptr %13, align 8, !tbaa !5
  %416 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %415, i32 0, i32 3
  %417 = load i32, ptr %416, align 4, !tbaa !17
  %418 = zext i32 %417 to i64
  %419 = mul nsw i64 %414, %418
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %396, i32 noundef 4097, i32 noundef %399, i32 noundef %402, i32 noundef %405, i64 noundef %419)
  %420 = load ptr, ptr %14, align 8, !tbaa !5
  %421 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %420, i32 0, i32 6
  %422 = load i32, ptr %421, align 1, !tbaa !20
  %423 = and i32 %422, 2
  %424 = icmp ugt i32 %423, 0
  br i1 %424, label %425, label %450

425:                                              ; preds = %375
  %426 = load ptr, ptr %10, align 8, !tbaa !5
  %427 = load ptr, ptr %12, align 8, !tbaa !5
  %428 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %427, i32 0, i32 3
  %429 = load i32, ptr %428, align 4, !tbaa !27
  %430 = load ptr, ptr %12, align 8, !tbaa !5
  %431 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %430, i32 0, i32 23
  %432 = load i32, ptr %431, align 4, !tbaa !21
  %433 = load ptr, ptr %12, align 8, !tbaa !5
  %434 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %433, i32 0, i32 3
  %435 = load i32, ptr %434, align 4, !tbaa !27
  %436 = load ptr, ptr %14, align 8, !tbaa !5
  %437 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %436, i32 0, i32 2
  %438 = load i32, ptr %437, align 1, !tbaa !25
  %439 = zext i32 %438 to i64
  %440 = load ptr, ptr %14, align 8, !tbaa !5
  %441 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %440, i32 0, i32 4
  %442 = load i32, ptr %441, align 1, !tbaa !22
  %443 = zext i32 %442 to i64
  %444 = mul nsw i64 %439, %443
  %445 = load ptr, ptr %13, align 8, !tbaa !5
  %446 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %445, i32 0, i32 3
  %447 = load i32, ptr %446, align 4, !tbaa !17
  %448 = zext i32 %447 to i64
  %449 = mul nsw i64 %444, %448
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %426, i32 noundef 4097, i32 noundef %429, i32 noundef %432, i32 noundef %435, i64 noundef %449)
  br label %473

450:                                              ; preds = %375
  %451 = load ptr, ptr %10, align 8, !tbaa !5
  %452 = load ptr, ptr %12, align 8, !tbaa !5
  %453 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %452, i32 0, i32 13
  %454 = load i32, ptr %453, align 4, !tbaa !28
  %455 = load ptr, ptr %12, align 8, !tbaa !5
  %456 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %455, i32 0, i32 23
  %457 = load i32, ptr %456, align 4, !tbaa !21
  %458 = load ptr, ptr %12, align 8, !tbaa !5
  %459 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %458, i32 0, i32 13
  %460 = load i32, ptr %459, align 4, !tbaa !28
  %461 = load ptr, ptr %14, align 8, !tbaa !5
  %462 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %461, i32 0, i32 2
  %463 = load i32, ptr %462, align 1, !tbaa !25
  %464 = zext i32 %463 to i64
  %465 = load i32, ptr %18, align 4, !tbaa !9
  %466 = zext i32 %465 to i64
  %467 = mul nsw i64 %464, %466
  %468 = load ptr, ptr %13, align 8, !tbaa !5
  %469 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %468, i32 0, i32 3
  %470 = load i32, ptr %469, align 4, !tbaa !17
  %471 = zext i32 %470 to i64
  %472 = mul nsw i64 %467, %471
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %451, i32 noundef 4097, i32 noundef %454, i32 noundef %457, i32 noundef %460, i64 noundef %472)
  br label %473

473:                                              ; preds = %450, %425
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme_64x16(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme_16x64(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 88}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!14, !10, i64 12}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!18, !10, i64 12}
!18 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !19, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!19 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!20 = !{!14, !10, i64 24}
!21 = !{!12, !10, i64 92}
!22 = !{!14, !10, i64 16}
!23 = !{!12, !10, i64 96}
!24 = !{!12, !10, i64 48}
!25 = !{!14, !10, i64 8}
!26 = !{!12, !10, i64 4}
!27 = !{!12, !10, i64 12}
!28 = !{!12, !10, i64 52}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_kloop_sme_het(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #0 {
  %10 = icmp eq i32 %7, 0
  %11 = icmp eq i32 %7, 1
  %libxsmm_generator_gemm_aarch64_microkernel_sme_64x16.libxsmm_generator_gemm_aarch64_microkernel_sme_16x64 = select i1 %11, ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_64x16, ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_16x64
  %.0 = select i1 %10, ptr @libxsmm_generator_gemm_aarch64_microkernel_sme, ptr %libxsmm_generator_gemm_aarch64_microkernel_sme_64x16.libxsmm_generator_gemm_aarch64_microkernel_sme_16x64
  %12 = getelementptr inbounds i8, ptr %2, i64 88
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %4, i64 12
  %15 = load i32, ptr %14, align 1, !tbaa !10
  %16 = zext i32 %15 to i64
  %17 = getelementptr inbounds i8, ptr %3, i64 12
  %18 = load i32, ptr %17, align 4, !tbaa !14
  %19 = zext i32 %18 to i64
  %20 = mul nuw nsw i64 %19, %16
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %13, i64 noundef %20) #2
  %21 = getelementptr inbounds i8, ptr %4, i64 24
  %22 = load i32, ptr %21, align 1, !tbaa !18
  %23 = and i32 %22, 2
  %.not = icmp eq i32 %23, 0
  %24 = getelementptr inbounds i8, ptr %2, i64 92
  %25 = load i32, ptr %24, align 4, !tbaa !19
  br i1 %.not, label %29, label %26

26:                                               ; preds = %9
  %27 = getelementptr inbounds i8, ptr %4, i64 16
  %28 = load i32, ptr %27, align 1, !tbaa !20
  br label %29

29:                                               ; preds = %9, %26
  %.sink = phi i32 [ %28, %26 ], [ %8, %9 ]
  %30 = zext i32 %.sink to i64
  %31 = load i32, ptr %17, align 4, !tbaa !14
  %32 = zext i32 %31 to i64
  %33 = mul nuw nsw i64 %32, %30
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %25, i64 noundef %33) #2
  br i1 %10, label %34, label %75

34:                                               ; preds = %29
  %35 = load i32, ptr %17, align 4, !tbaa !14
  %36 = mul i32 %35, %5
  %37 = getelementptr inbounds i8, ptr %2, i64 96
  %38 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %0, i32 noundef 8, i32 noundef %36, i32 noundef %38, i32 noundef 0) #2
  %39 = load i32, ptr %17, align 4, !tbaa !14
  %40 = mul i32 %39, %6
  %41 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %0, i32 noundef 9, i32 noundef %40, i32 noundef %41, i32 noundef 0) #2
  %42 = icmp eq i32 %5, 32
  br i1 %42, label %43, label %46

43:                                               ; preds = %34
  %44 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef -1, i32 noundef %44) #2
  %45 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef -1, i32 noundef %45) #2
  br label %58

46:                                               ; preds = %34
  %47 = icmp ugt i32 %5, 16
  br i1 %47, label %48, label %54

48:                                               ; preds = %46
  %49 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef -1, i32 noundef %49) #2
  %50 = add i32 %5, -16
  %51 = load i32, ptr %17, align 4, !tbaa !14
  %52 = mul i32 %51, %50
  %53 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef %52, i32 noundef %53) #2
  br label %58

54:                                               ; preds = %46
  %55 = load i32, ptr %17, align 4, !tbaa !14
  %56 = mul i32 %55, %5
  %57 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef %56, i32 noundef %57) #2
  br label %58

58:                                               ; preds = %48, %54, %43
  %59 = icmp eq i32 %6, 32
  br i1 %59, label %60, label %63

60:                                               ; preds = %58
  %61 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef -1, i32 noundef %61) #2
  %62 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 3, i32 noundef -1, i32 noundef %62) #2
  br label %.thread166

63:                                               ; preds = %58
  %64 = icmp ugt i32 %6, 16
  br i1 %64, label %65, label %71

65:                                               ; preds = %63
  %66 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef -1, i32 noundef %66) #2
  %67 = add i32 %6, -16
  %68 = load i32, ptr %17, align 4, !tbaa !14
  %69 = mul i32 %68, %67
  %70 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 3, i32 noundef %69, i32 noundef %70) #2
  br label %.thread166

71:                                               ; preds = %63
  %72 = load i32, ptr %17, align 4, !tbaa !14
  %73 = mul i32 %72, %6
  %74 = load i32, ptr %37, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef %73, i32 noundef %74) #2
  br label %.thread166

75:                                               ; preds = %29
  switch i32 %7, label %.thread166 [
    i32 1, label %76
    i32 2, label %113
  ]

76:                                               ; preds = %75
  %77 = load i32, ptr %17, align 4, !tbaa !14
  %78 = mul i32 %77, %5
  %79 = getelementptr inbounds i8, ptr %2, i64 96
  %80 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %0, i32 noundef 8, i32 noundef %78, i32 noundef %80, i32 noundef 1) #2
  %81 = load i32, ptr %17, align 4, !tbaa !14
  %82 = mul i32 %81, %6
  %83 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 4, i32 noundef %82, i32 noundef %83) #2
  %84 = icmp ugt i32 %5, 16
  br i1 %84, label %.critedge, label %.thread

.thread:                                          ; preds = %76
  %85 = load i32, ptr %17, align 4, !tbaa !14
  %86 = mul nsw i32 %85, %5
  %87 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef %86, i32 noundef %87) #2
  br label %.thread166

.critedge:                                        ; preds = %76
  %88 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef -1, i32 noundef %88) #2
  %89 = icmp ugt i32 %5, 32
  br i1 %89, label %95, label %90

90:                                               ; preds = %.critedge
  %91 = add nsw i32 %5, -16
  %92 = load i32, ptr %17, align 4, !tbaa !14
  %93 = mul nsw i32 %92, %91
  %94 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef %93, i32 noundef %94) #2
  br label %.thread166

95:                                               ; preds = %.critedge
  %96 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef -1, i32 noundef %96) #2
  %97 = icmp ugt i32 %5, 48
  br i1 %97, label %103, label %98

98:                                               ; preds = %95
  %99 = add nsw i32 %5, -32
  %100 = load i32, ptr %17, align 4, !tbaa !14
  %101 = mul nsw i32 %100, %99
  %102 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef %101, i32 noundef %102) #2
  br label %.thread166

103:                                              ; preds = %95
  %104 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef -1, i32 noundef %104) #2
  %105 = icmp eq i32 %5, 64
  br i1 %105, label %110, label %106

106:                                              ; preds = %103
  %107 = add i32 %5, -48
  %108 = load i32, ptr %17, align 4, !tbaa !14
  %109 = mul nsw i32 %108, %107
  br label %110

110:                                              ; preds = %103, %106
  %111 = phi i32 [ %109, %106 ], [ -1, %103 ]
  %112 = load i32, ptr %79, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 3, i32 noundef %111, i32 noundef %112) #2
  br label %.thread166

113:                                              ; preds = %75
  %114 = load i32, ptr %17, align 4, !tbaa !14
  %115 = mul i32 %114, %6
  %116 = getelementptr inbounds i8, ptr %2, i64 96
  %117 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %0, i32 noundef 8, i32 noundef %115, i32 noundef %117, i32 noundef 1) #2
  %118 = load i32, ptr %17, align 4, !tbaa !14
  %119 = mul i32 %118, %5
  %120 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 4, i32 noundef %119, i32 noundef %120) #2
  %121 = icmp ugt i32 %6, 16
  br i1 %121, label %.critedge164, label %.thread168

.thread168:                                       ; preds = %113
  %122 = load i32, ptr %17, align 4, !tbaa !14
  %123 = mul nsw i32 %122, %6
  %124 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef %123, i32 noundef %124) #2
  br label %.thread166

.critedge164:                                     ; preds = %113
  %125 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef -1, i32 noundef %125) #2
  %126 = icmp ugt i32 %6, 32
  br i1 %126, label %132, label %127

127:                                              ; preds = %.critedge164
  %128 = add nsw i32 %6, -16
  %129 = load i32, ptr %17, align 4, !tbaa !14
  %130 = mul nsw i32 %129, %128
  %131 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef %130, i32 noundef %131) #2
  br label %.thread166

132:                                              ; preds = %.critedge164
  %133 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef -1, i32 noundef %133) #2
  %134 = icmp ugt i32 %6, 48
  br i1 %134, label %140, label %135

135:                                              ; preds = %132
  %136 = add nsw i32 %6, -32
  %137 = load i32, ptr %17, align 4, !tbaa !14
  %138 = mul nsw i32 %137, %136
  %139 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef %138, i32 noundef %139) #2
  br label %.thread166

140:                                              ; preds = %132
  %141 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef -1, i32 noundef %141) #2
  %142 = icmp eq i32 %6, 64
  br i1 %142, label %147, label %143

143:                                              ; preds = %140
  %144 = add i32 %6, -48
  %145 = load i32, ptr %17, align 4, !tbaa !14
  %146 = mul nsw i32 %145, %144
  br label %147

147:                                              ; preds = %140, %143
  %148 = phi i32 [ %146, %143 ], [ -1, %140 ]
  %149 = load i32, ptr %116, align 4, !tbaa !21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 3, i32 noundef %148, i32 noundef %149) #2
  br label %.thread166

.thread166:                                       ; preds = %.thread168, %127, %.thread, %90, %135, %98, %75, %110, %147, %60, %71, %65
  %150 = getelementptr inbounds i8, ptr %2, i64 48
  %151 = load i32, ptr %150, align 4, !tbaa !22
  %152 = getelementptr inbounds i8, ptr %4, i64 8
  %153 = load i32, ptr %152, align 1, !tbaa !23
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %151, i32 noundef %153) #2
  tail call void %.0(ptr noundef %0, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4, i32 noundef %5, i32 noundef %6) #2, !callees !24
  %154 = load i32, ptr %150, align 4, !tbaa !22
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %154, i32 noundef 1) #2
  %155 = getelementptr inbounds i8, ptr %2, i64 4
  %156 = load i32, ptr %155, align 4, !tbaa !25
  %157 = load i32, ptr %12, align 4, !tbaa !5
  %158 = load i32, ptr %152, align 1, !tbaa !23
  %159 = zext i32 %158 to i64
  %160 = load i32, ptr %14, align 1, !tbaa !10
  %161 = zext i32 %160 to i64
  %162 = mul nuw nsw i64 %161, %159
  %163 = load i32, ptr %17, align 4, !tbaa !14
  %164 = zext i32 %163 to i64
  %165 = mul nuw nsw i64 %162, %164
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %156, i32 noundef %157, i32 noundef %156, i64 noundef %165) #2
  %166 = load i32, ptr %21, align 1, !tbaa !18
  %167 = and i32 %166, 2
  %.not162 = icmp eq i32 %167, 0
  %168 = getelementptr inbounds i8, ptr %2, i64 92
  %169 = load i32, ptr %168, align 4, !tbaa !19
  %170 = load i32, ptr %152, align 1, !tbaa !23
  %171 = zext i32 %170 to i64
  br i1 %.not162, label %182, label %172

172:                                              ; preds = %.thread166
  %173 = getelementptr inbounds i8, ptr %2, i64 12
  %174 = load i32, ptr %173, align 4, !tbaa !26
  %175 = getelementptr inbounds i8, ptr %4, i64 16
  %176 = load i32, ptr %175, align 1, !tbaa !20
  %177 = zext i32 %176 to i64
  %178 = mul nuw nsw i64 %177, %171
  %179 = load i32, ptr %17, align 4, !tbaa !14
  %180 = zext i32 %179 to i64
  %181 = mul nuw nsw i64 %178, %180
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %174, i32 noundef %169, i32 noundef %174, i64 noundef %181) #2
  br label %190

182:                                              ; preds = %.thread166
  %183 = getelementptr inbounds i8, ptr %2, i64 52
  %184 = load i32, ptr %183, align 4, !tbaa !27
  %185 = zext i32 %8 to i64
  %186 = mul nuw nsw i64 %171, %185
  %187 = load i32, ptr %17, align 4, !tbaa !14
  %188 = zext i32 %187 to i64
  %189 = mul nuw nsw i64 %186, %188
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %184, i32 noundef %169, i32 noundef %184, i64 noundef %189) #2
  br label %190

190:                                              ; preds = %182, %172
  ret void
}

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme_64x16(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_gemm_aarch64_microkernel_sme_16x64(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 88}
!6 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 12}
!11 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !12, i64 33, !12, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !13, i64 62, !13, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !13, i64 70, !13, i64 72, !13, i64 74, !13, i64 76, !13, i64 78, !13, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!12 = !{!"long long", !8, i64 0}
!13 = !{!"short", !8, i64 0}
!14 = !{!15, !7, i64 12}
!15 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !16, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !17, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !17, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!16 = !{!"libxsmm_tile_config", !8, i64 0, !13, i64 2, !8, i64 4, !13, i64 6, !8, i64 8, !13, i64 10, !8, i64 12, !13, i64 14, !8, i64 16, !13, i64 18, !8, i64 20, !13, i64 22, !8, i64 24, !13, i64 26, !8, i64 28, !13, i64 30, !8, i64 32}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!11, !7, i64 24}
!19 = !{!6, !7, i64 92}
!20 = !{!11, !7, i64 16}
!21 = !{!6, !7, i64 96}
!22 = !{!6, !7, i64 48}
!23 = !{!11, !7, i64 8}
!24 = !{ptr @libxsmm_generator_gemm_aarch64_microkernel_sme, ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_16x64, ptr @libxsmm_generator_gemm_aarch64_microkernel_sme_64x16}
!25 = !{!6, !7, i64 4}
!26 = !{!6, !7, i64 12}
!27 = !{!6, !7, i64 52}


; Effective O3 passes: CalledValuePropagationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass