; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution16bNhwcGemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetConvolution16bNhwcGemm" = type { %"class.Simd::SynetConvolution16b", %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr, [2 x ptr] }
%"class.Simd::SynetConvolution16b" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", %"struct.Simd::Array.0", %"struct.Simd::Array.1", %"struct.Simd::Array.1", i8, i8, i8, i64, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam" = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK4Simd4Base27SynetConvolution16bNhwcGemm18ExternalBufferSizeEv(ptr noundef nonnull align 8 dereferenceable(480) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  %6 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcGemm", ptr %5, i32 0, i32 1
  store ptr %6, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 0, ptr %4, align 8, !tbaa !9
  %7 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcGemm", ptr %5, i32 0, i32 2
  %8 = load ptr, ptr %7, align 8, !tbaa !11
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %21

10:                                               ; preds = %1
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr %11, i32 0, i32 11
  %13 = load i64, ptr %12, align 8, !tbaa !30
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr %14, i32 0, i32 12
  %16 = load i64, ptr %15, align 8, !tbaa !31
  %17 = mul i64 %13, %16
  %18 = mul i64 %17, 2
  %19 = load i64, ptr %4, align 8, !tbaa !9
  %20 = add i64 %19, %18
  store i64 %20, ptr %4, align 8, !tbaa !9
  br label %21

21:                                               ; preds = %10, %1
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr %22, i32 0, i32 16
  %24 = load i32, ptr %23, align 4, !tbaa !32
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %37

26:                                               ; preds = %21
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr %27, i32 0, i32 7
  %29 = load i64, ptr %28, align 8, !tbaa !33
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcGemm::AlgParam", ptr %30, i32 0, i32 11
  %32 = load i64, ptr %31, align 8, !tbaa !30
  %33 = mul i64 %29, %32
  %34 = mul i64 %33, 4
  %35 = load i64, ptr %4, align 8, !tbaa !9
  %36 = add i64 %35, %34
  store i64 %36, ptr %4, align 8, !tbaa !9
  br label %37

37:                                               ; preds = %26, %21
  %38 = load i64, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret i64 %38
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 456}
!12 = !{!"_ZTSN4Simd4Base27SynetConvolution16bNhwcGemmE", !13, i64 0, !28, i64 328, !6, i64 456, !7, i64 464}
!13 = !{!"_ZTSN4Simd19SynetConvolution16bE", !14, i64 0, !15, i64 8, !22, i64 192, !23, i64 208, !25, i64 240, !26, i64 256, !26, i64 272, !27, i64 288, !27, i64 289, !27, i64 290, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320}
!14 = !{!"_ZTSN4Simd9DeletableE"}
!15 = !{!"_ZTSN4Simd9ConvParamE", !16, i64 0, !20, i64 160, !10, i64 168, !21, i64 176}
!16 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !17, i64 24, !18, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !17, i64 56, !18, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !19, i64 152}
!17 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!18 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!19 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!20 = !{!"_ZTS8SimdBool", !7, i64 0}
!21 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!22 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !10, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !10, i64 8}
!26 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"_ZTSN4Simd4Base27SynetConvolution16bNhwcGemm8AlgParamE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !29, i64 120, !29, i64 124}
!29 = !{!"int", !7, i64 0}
!30 = !{!28, !10, i64 88}
!31 = !{!28, !10, i64 96}
!32 = !{!28, !29, i64 124}
!33 = !{!28, !10, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef i64 @_ZNK4Simd4Base27SynetConvolution16bNhwcGemm18ExternalBufferSizeEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(480) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 456
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %11, label %4

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 416
  %6 = load i64, ptr %5, align 8, !tbaa !28
  %7 = getelementptr inbounds i8, ptr %0, i64 424
  %8 = load i64, ptr %7, align 8, !tbaa !29
  %9 = shl i64 %6, 1
  %10 = mul i64 %9, %8
  br label %11

11:                                               ; preds = %4, %1
  %.0 = phi i64 [ %10, %4 ], [ 0, %1 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 452
  %13 = load i32, ptr %12, align 4, !tbaa !30
  %.not8 = icmp eq i32 %13, 0
  br i1 %.not8, label %22, label %14

14:                                               ; preds = %11
  %15 = getelementptr inbounds i8, ptr %0, i64 384
  %16 = load i64, ptr %15, align 8, !tbaa !31
  %17 = getelementptr inbounds i8, ptr %0, i64 416
  %18 = load i64, ptr %17, align 8, !tbaa !28
  %19 = shl i64 %16, 2
  %20 = mul i64 %19, %18
  %21 = add i64 %20, %.0
  br label %22

22:                                               ; preds = %14, %11
  %.1 = phi i64 [ %21, %14 ], [ %.0, %11 ]
  ret i64 %.1
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !20, i64 456}
!6 = !{!"_ZTSN4Simd4Base27SynetConvolution16bNhwcGemmE", !7, i64 0, !26, i64 328, !20, i64 456, !12, i64 464}
!7 = !{!"_ZTSN4Simd19SynetConvolution16bE", !8, i64 0, !9, i64 8, !19, i64 192, !21, i64 208, !23, i64 240, !24, i64 256, !24, i64 272, !25, i64 288, !25, i64 289, !25, i64 290, !11, i64 296, !11, i64 304, !11, i64 312, !11, i64 320}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd9ConvParamE", !10, i64 0, !17, i64 160, !11, i64 168, !18, i64 176}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !14, i64 24, !15, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !14, i64 56, !15, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !16, i64 152}
!11 = !{!"long", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTS18SimdTensorDataType", !12, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !12, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !12, i64 0}
!17 = !{!"_ZTS8SimdBool", !12, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !12, i64 0}
!19 = !{!"_ZTSN4Simd5ArrayIhEE", !20, i64 0, !11, i64 8}
!20 = !{!"any pointer", !12, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !11, i64 8, !12, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !20, i64 0}
!23 = !{!"_ZTSN4Simd5ArrayItEE", !20, i64 0, !11, i64 8}
!24 = !{!"_ZTSN4Simd5ArrayIfEE", !20, i64 0, !11, i64 8}
!25 = !{!"bool", !12, i64 0}
!26 = !{!"_ZTSN4Simd4Base27SynetConvolution16bNhwcGemm8AlgParamE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !27, i64 120, !27, i64 124}
!27 = !{!"int", !12, i64 0}
!28 = !{!26, !11, i64 88}
!29 = !{!26, !11, i64 96}
!30 = !{!26, !27, i64 124}
!31 = !{!26, !11, i64 56}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass