; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution8i" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", ptr, %"struct.Simd::CvtParam", %"struct.Simd::CvtParam", %"struct.Simd::Array.1", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, i8, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"class.Simd::Base::SynetConvolution8iNhwcDirect" = type { %"class.Simd::SynetConvolution8i", %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", i64, i64, %"struct.Simd::ConvParam", [3 x ptr] }
%"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam" = type { i64, i64, i64, i64, i64, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832) %0, i64 noundef %1) #1 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  %13 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %14 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %13, i32 0, i32 1
  store ptr %14, ptr %6, align 8, !tbaa !5
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %15, i32 0, i32 17
  %17 = load i64, ptr %16, align 8, !tbaa !11
  %18 = icmp eq i64 %17, 0
  br i1 %18, label %19, label %35

19:                                               ; preds = %2
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %20, i32 0, i32 19
  %22 = load i64, ptr %21, align 8, !tbaa !16
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %24, label %35

24:                                               ; preds = %19
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %25, i32 0, i32 16
  %27 = load i64, ptr %26, align 8, !tbaa !17
  %28 = icmp eq i64 %27, 0
  br i1 %28, label %29, label %35

29:                                               ; preds = %24
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %30, i32 0, i32 18
  %32 = load i64, ptr %31, align 8, !tbaa !18
  %33 = icmp eq i64 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %29
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %82

35:                                               ; preds = %29, %24, %19, %2
  %36 = load i64, ptr %5, align 8, !tbaa !9
  %37 = icmp uge i64 %36, 32
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  store i1 true, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %82

39:                                               ; preds = %35
  %40 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %13, i32 0, i32 1
  %41 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %40, i32 0, i32 2
  %42 = load i64, ptr %41, align 8, !tbaa !19
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %43, i32 0, i32 6
  %45 = load i64, ptr %44, align 8, !tbaa !35
  %46 = icmp ult i64 %42, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %39
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %82

48:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = call noundef i64 @_ZNK4Simd9ConvParam5NoseWEv(ptr noundef nonnull align 8 dereferenceable(180) %49)
  store i64 %50, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = call noundef i64 @_ZNK4Simd9ConvParam5BodyWEv(ptr noundef nonnull align 8 dereferenceable(180) %51)
  %53 = load i64, ptr %8, align 8, !tbaa !9
  %54 = sub i64 %52, %53
  store i64 %54, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %55, i32 0, i32 19
  %57 = load i64, ptr %56, align 8, !tbaa !16
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %58, i32 0, i32 15
  %60 = load i64, ptr %59, align 8, !tbaa !36
  %61 = call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %57, i64 noundef %60)
  store i64 %61, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %62 = load i64, ptr %8, align 8, !tbaa !9
  %63 = load i64, ptr %9, align 8, !tbaa !9
  %64 = load i64, ptr %5, align 8, !tbaa !9
  %65 = call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %63, i64 noundef %64)
  %66 = add i64 %62, %65
  %67 = load i64, ptr %10, align 8, !tbaa !9
  %68 = add i64 %66, %67
  store i64 %68, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %69 = load i64, ptr %8, align 8, !tbaa !9
  %70 = load i64, ptr %9, align 8, !tbaa !9
  %71 = add i64 %69, %70
  %72 = load i64, ptr %10, align 8, !tbaa !9
  %73 = add i64 %71, %72
  %74 = load i64, ptr %5, align 8, !tbaa !9
  %75 = call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %73, i64 noundef %74)
  store i64 %75, ptr %12, align 8, !tbaa !9
  %76 = load i64, ptr %11, align 8, !tbaa !9
  %77 = uitofp i64 %76 to double
  %78 = load i64, ptr %12, align 8, !tbaa !9
  %79 = uitofp i64 %78 to double
  %80 = fmul double %79, 1.300000e+00
  %81 = fcmp oge double %77, %80
  store i1 %81, ptr %3, align 1
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  br label %82

82:                                               ; preds = %48, %47, %38, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  %83 = load i1, ptr %3, align 1
  ret i1 %83
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZNK4Simd9ConvParam5NoseWEv(ptr noundef nonnull align 8 dereferenceable(180)) #2 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZNK4Simd9ConvParam5BodyWEv(ptr noundef nonnull align 8 dereferenceable(180)) #2 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef, i64 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 120}
!12 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !13, i64 24, !14, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !13, i64 56, !14, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !15, i64 152}
!13 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!14 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!15 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!16 = !{!12, !10, i64 136}
!17 = !{!12, !10, i64 112}
!18 = !{!12, !10, i64 128}
!19 = !{!20, !10, i64 568}
!20 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !21, i64 0, !34, i64 552, !10, i64 608, !10, i64 616, !23, i64 624, !7, i64 808}
!21 = !{!"_ZTSN4Simd18SynetConvolution8iE", !22, i64 0, !23, i64 8, !26, i64 192, !27, i64 208, !6, i64 240, !29, i64 248, !29, i64 352, !33, i64 456, !30, i64 472, !30, i64 488, !30, i64 504, !31, i64 520, !31, i64 521, !10, i64 528, !10, i64 536, !10, i64 544}
!22 = !{!"_ZTSN4Simd9DeletableE"}
!23 = !{!"_ZTSN4Simd9ConvParamE", !12, i64 0, !24, i64 160, !10, i64 168, !25, i64 176}
!24 = !{!"_ZTS8SimdBool", !7, i64 0}
!25 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!26 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !28, i64 0, !10, i64 8, !7, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!29 = !{!"_ZTSN4Simd8CvtParamE", !26, i64 0, !30, i64 16, !30, i64 32, !30, i64 48, !30, i64 64, !31, i64 80, !32, i64 84, !32, i64 88, !32, i64 92, !32, i64 96}
!30 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!31 = !{!"bool", !7, i64 0}
!32 = !{!"int", !7, i64 0}
!33 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !10, i64 8}
!34 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !32, i64 40, !32, i64 44, !32, i64 48}
!35 = !{!12, !10, i64 40}
!36 = !{!12, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832) %0, i64 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = getelementptr inbounds i8, ptr %0, i64 128
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i64 %5, 0
  %7 = getelementptr inbounds i8, ptr %0, i64 144
  %8 = load i64, ptr %7, align 8
  %9 = icmp eq i64 %8, 0
  %or.cond = select i1 %6, i1 %9, i1 false
  %10 = getelementptr inbounds i8, ptr %0, i64 120
  %11 = load i64, ptr %10, align 8
  %12 = icmp eq i64 %11, 0
  %or.cond27 = select i1 %or.cond, i1 %12, i1 false
  %13 = getelementptr inbounds i8, ptr %0, i64 136
  %14 = load i64, ptr %13, align 8
  %15 = icmp eq i64 %14, 0
  %or.cond30 = select i1 %or.cond27, i1 %15, i1 false
  br i1 %or.cond30, label %41, label %16

16:                                               ; preds = %2
  %17 = icmp ugt i64 %1, 31
  br i1 %17, label %41, label %18

18:                                               ; preds = %16
  %19 = getelementptr inbounds i8, ptr %0, i64 568
  %20 = load i64, ptr %19, align 8, !tbaa !13
  %21 = getelementptr inbounds i8, ptr %0, i64 48
  %22 = load i64, ptr %21, align 8, !tbaa !30
  %23 = icmp ult i64 %20, %22
  br i1 %23, label %41, label %24

24:                                               ; preds = %18
  %25 = tail call noundef i64 @_ZNK4Simd9ConvParam5NoseWEv(ptr noundef nonnull align 8 dereferenceable(180) %3)
  %26 = tail call noundef i64 @_ZNK4Simd9ConvParam5BodyWEv(ptr noundef nonnull align 8 dereferenceable(180) %3)
  %27 = sub i64 %26, %25
  %28 = load i64, ptr %7, align 8, !tbaa !31
  %29 = getelementptr inbounds i8, ptr %0, i64 112
  %30 = load i64, ptr %29, align 8, !tbaa !32
  %31 = tail call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %28, i64 noundef %30)
  %32 = tail call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %27, i64 noundef %1)
  %33 = add i64 %31, %25
  %34 = add i64 %33, %32
  %35 = add i64 %31, %26
  %36 = tail call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %35, i64 noundef %1)
  %37 = uitofp i64 %34 to double
  %38 = uitofp i64 %36 to double
  %39 = fmul double %38, 1.300000e+00
  %40 = fcmp ole double %39, %37
  br label %41

41:                                               ; preds = %18, %16, %2, %24
  %.0 = phi i1 [ %40, %24 ], [ false, %2 ], [ true, %16 ], [ false, %18 ]
  ret i1 %.0
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZNK4Simd9ConvParam5NoseWEv(ptr noundef nonnull align 8 dereferenceable(180)) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZNK4Simd9ConvParam5BodyWEv(ptr noundef nonnull align 8 dereferenceable(180)) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 120}
!6 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !10, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !12, i64 152}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!11 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!12 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!13 = !{!14, !7, i64 568}
!14 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !15, i64 0, !29, i64 552, !7, i64 608, !7, i64 616, !17, i64 624, !8, i64 808}
!15 = !{!"_ZTSN4Simd18SynetConvolution8iE", !16, i64 0, !17, i64 8, !20, i64 192, !22, i64 208, !21, i64 240, !24, i64 248, !24, i64 352, !28, i64 456, !25, i64 472, !25, i64 488, !25, i64 504, !26, i64 520, !26, i64 521, !7, i64 528, !7, i64 536, !7, i64 544}
!16 = !{!"_ZTSN4Simd9DeletableE"}
!17 = !{!"_ZTSN4Simd9ConvParamE", !6, i64 0, !18, i64 160, !7, i64 168, !19, i64 176}
!18 = !{!"_ZTS8SimdBool", !8, i64 0}
!19 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!20 = !{!"_ZTSN4Simd5ArrayIhEE", !21, i64 0, !7, i64 8}
!21 = !{!"any pointer", !8, i64 0}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !7, i64 8, !8, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !21, i64 0}
!24 = !{!"_ZTSN4Simd8CvtParamE", !20, i64 0, !25, i64 16, !25, i64 32, !25, i64 48, !25, i64 64, !26, i64 80, !27, i64 84, !27, i64 88, !27, i64 92, !27, i64 96}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !21, i64 0, !7, i64 8}
!26 = !{!"bool", !8, i64 0}
!27 = !{!"int", !8, i64 0}
!28 = !{!"_ZTSN4Simd5ArrayIaEE", !21, i64 0, !7, i64 8}
!29 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !27, i64 40, !27, i64 44, !27, i64 48}
!30 = !{!6, !7, i64 40}
!31 = !{!6, !7, i64 136}
!32 = !{!6, !7, i64 104}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass