; LLVM IR from ermig1979/Simd :: src/Test/TestTable.ll (ZN4Test5Table10SetRowPropEmbb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Test::Table::RowProp" = type { i8, i8 }
%"class.Test::Table" = type { %"struct.Simd::Point", %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5" }
%"struct.Simd::Point" = type { i64, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Test::Table::RowProp, std::allocator<Test::Table::RowProp>>::_Vector_impl" }
%"struct.std::_Vector_base<Test::Table::RowProp, std::allocator<Test::Table::RowProp>>::_Vector_impl" = type { %"struct.std::_Vector_base<Test::Table::RowProp, std::allocator<Test::Table::RowProp>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Test::Table::RowProp, std::allocator<Test::Table::RowProp>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Test::Table::Header, std::allocator<Test::Table::Header>>::_Vector_impl" }
%"struct.std::_Vector_base<Test::Table::Header, std::allocator<Test::Table::Header>>::_Vector_impl" = type { %"struct.std::_Vector_base<Test::Table::Header, std::allocator<Test::Table::Header>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Test::Table::Header, std::allocator<Test::Table::Header>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Test5Table10SetRowPropEmbb(ptr noundef nonnull align 8 dereferenceable(88) %0, i64 noundef %1, i1 noundef zeroext %2, i1 noundef zeroext %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca %"struct.Test::Table::RowProp", align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  %10 = zext i1 %2 to i8
  store i8 %10, ptr %7, align 1, !tbaa !11
  %11 = zext i1 %3 to i8
  store i8 %11, ptr %8, align 1, !tbaa !11
  %12 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #4
  %13 = load i8, ptr %7, align 1, !tbaa !11, !range !13, !noundef !14
  %14 = trunc i8 %13 to i1
  %15 = load i8, ptr %8, align 1, !tbaa !11, !range !13, !noundef !14
  %16 = trunc i8 %15 to i1
  call void @_ZN4Test5Table7RowPropC2Ebb(ptr noundef nonnull align 1 dereferenceable(2) %9, i1 noundef zeroext %14, i1 noundef zeroext %16)
  %17 = getelementptr inbounds %"class.Test::Table", ptr %12, i32 0, i32 1
  %18 = load i64, ptr %6, align 8, !tbaa !9
  %19 = call noundef nonnull align 1 dereferenceable(2) ptr @_ZNSt6vectorIN4Test5Table7RowPropESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %18) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %19, ptr align 1 %9, i64 2, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Test5Table7RowPropC2Ebb(ptr noundef nonnull align 1 dereferenceable(2), i1 noundef zeroext, i1 noundef zeroext) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(2) ptr @_ZNSt6vectorIN4Test5Table7RowPropESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{i64 0, i64 1, !11, i64 1, i64 1, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Test::Table::RowProp" = type { i8, i8 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Test5Table10SetRowPropEmbb(ptr noundef nonnull align 8 dereferenceable(88) %0, i64 noundef %1, i1 noundef zeroext %2, i1 noundef zeroext %3) local_unnamed_addr #1 align 2 {
  %5 = alloca %"struct.Test::Table::RowProp", align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #2
  call void @_ZN4Test5Table7RowPropC2Ebb(ptr noundef nonnull align 1 dereferenceable(2) %5, i1 noundef zeroext %2, i1 noundef zeroext %3)
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  %7 = call noundef nonnull align 1 dereferenceable(2) ptr @_ZNSt6vectorIN4Test5Table7RowPropESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %1) #2
  %8 = load i16, ptr %5, align 2
  store i16 %8, ptr %7, align 1
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Test5Table7RowPropC2Ebb(ptr noundef nonnull align 1 dereferenceable(2), i1 noundef zeroext, i1 noundef zeroext) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(2) ptr @_ZNSt6vectorIN4Test5Table7RowPropESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass