; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_pair_move.simd = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_pair_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca [3 x i32], align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr %8) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 @__const.test_asimd_pair_move.simd, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #4
  store i16 64, ptr %12, align 2, !tbaa !11
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %13, ptr noundef %14)
  store i8 32, ptr %7, align 1, !tbaa !13
  br label %15

15:                                               ; preds = %61, %3
  %16 = load i8, ptr %7, align 1, !tbaa !13
  %17 = zext i8 %16 to i32
  %18 = icmp slt i32 %17, 64
  br i1 %18, label %19, label %64

19:                                               ; preds = %15
  store i8 0, ptr %10, align 1, !tbaa !13
  br label %20

20:                                               ; preds = %57, %19
  %21 = load i8, ptr %10, align 1, !tbaa !13
  %22 = zext i8 %21 to i32
  %23 = icmp slt i32 %22, 32
  br i1 %23, label %24, label %60

24:                                               ; preds = %20
  store i8 0, ptr %11, align 1, !tbaa !13
  br label %25

25:                                               ; preds = %53, %24
  %26 = load i8, ptr %11, align 1, !tbaa !13
  %27 = zext i8 %26 to i32
  %28 = icmp slt i32 %27, 32
  br i1 %28, label %29, label %56

29:                                               ; preds = %25
  store i8 0, ptr %9, align 1, !tbaa !13
  br label %30

30:                                               ; preds = %49, %29
  %31 = load i8, ptr %9, align 1, !tbaa !13
  %32 = zext i8 %31 to i32
  %33 = icmp slt i32 %32, 3
  br i1 %33, label %34, label %52

34:                                               ; preds = %30
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = load i8, ptr %7, align 1, !tbaa !13
  %38 = zext i8 %37 to i32
  %39 = load i16, ptr %12, align 2, !tbaa !11
  %40 = sext i16 %39 to i32
  %41 = load i8, ptr %10, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = load i8, ptr %11, align 1, !tbaa !13
  %44 = zext i8 %43 to i32
  %45 = load i8, ptr %9, align 1, !tbaa !13
  %46 = zext i8 %45 to i64
  %47 = getelementptr inbounds [3 x i32], ptr %8, i64 0, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %35, i32 noundef %36, i32 noundef %38, i32 noundef %40, i32 noundef %42, i32 noundef %44, i32 noundef %48)
  br label %49

49:                                               ; preds = %34
  %50 = load i8, ptr %9, align 1, !tbaa !13
  %51 = add i8 %50, 1
  store i8 %51, ptr %9, align 1, !tbaa !13
  br label %30, !llvm.loop !14

52:                                               ; preds = %30
  br label %53

53:                                               ; preds = %52
  %54 = load i8, ptr %11, align 1, !tbaa !13
  %55 = add i8 %54, 1
  store i8 %55, ptr %11, align 1, !tbaa !13
  br label %25, !llvm.loop !16

56:                                               ; preds = %25
  br label %57

57:                                               ; preds = %56
  %58 = load i8, ptr %10, align 1, !tbaa !13
  %59 = add i8 %58, 1
  store i8 %59, ptr %10, align 1, !tbaa !13
  br label %20, !llvm.loop !17

60:                                               ; preds = %20
  br label %61

61:                                               ; preds = %60
  %62 = load i8, ptr %7, align 1, !tbaa !13
  %63 = add i8 %62, 1
  store i8 %63, ptr %7, align 1, !tbaa !13
  br label %15, !llvm.loop !18

64:                                               ; preds = %15
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %65, ptr noundef %66)
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_pair_move.simd = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_pair_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %.pre.pre.pre = load i32, ptr @__const.test_asimd_pair_move.simd, align 4, !tbaa !5
  %.pre40.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_pair_move.simd, i64 4), align 4, !tbaa !5
  %.pre41.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_pair_move.simd, i64 8), align 4, !tbaa !5
  br label %.preheader25

.preheader25:                                     ; preds = %3, %5
  %indvars.iv36 = phi i32 [ 32, %3 ], [ %indvars.iv.next37, %5 ]
  br label %.preheader24

.preheader24:                                     ; preds = %.preheader25, %4
  %indvars.iv32 = phi i32 [ 0, %.preheader25 ], [ %indvars.iv.next33, %4 ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader24, %.preheader
  %indvars.iv = phi i32 [ 0, %.preheader24 ], [ %indvars.iv.next, %.preheader ]
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv36, i32 noundef 64, i32 noundef %indvars.iv32, i32 noundef %indvars.iv, i32 noundef %.pre.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv36, i32 noundef 64, i32 noundef %indvars.iv32, i32 noundef %indvars.iv, i32 noundef %.pre40.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv36, i32 noundef 64, i32 noundef %indvars.iv32, i32 noundef %indvars.iv, i32 noundef %.pre41.pre.pre) #2
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, 32
  br i1 %exitcond.not, label %4, label %.preheader, !llvm.loop !9

4:                                                ; preds = %.preheader
  %indvars.iv.next33 = add nuw nsw i32 %indvars.iv32, 1
  %exitcond35.not = icmp eq i32 %indvars.iv.next33, 32
  br i1 %exitcond35.not, label %5, label %.preheader24, !llvm.loop !11

5:                                                ; preds = %4
  %indvars.iv.next37 = add nuw nsw i32 %indvars.iv36, 1
  %exitcond39.not = icmp eq i32 %indvars.iv.next37, 64
  br i1 %exitcond39.not, label %6, label %.preheader25, !llvm.loop !12

6:                                                ; preds = %5
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass