; LLVM IR from abeaumont/competitive-programming :: cses/1670.ll (Z11permutationi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@n = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11permutationi(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, i32 noundef %1) #2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i1, align 1
  %6 = alloca %"class.std::allocator", align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %3, align 8
  store i32 %1, ptr %4, align 4, !tbaa !5
  store i1 false, ptr %5, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 9, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %16 unwind label %23

16:                                               ; preds = %2
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 1, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %17 = load i32, ptr @n, align 4, !tbaa !5
  %18 = sdiv i32 %17, 9
  store i32 %18, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %75, %16
  %20 = load i32, ptr %11, align 4, !tbaa !5
  %21 = icmp sle i32 %20, 8
  br i1 %21, label %27, label %22

22:                                               ; preds = %19
  store i32 2, ptr %12, align 4
  br label %78

23:                                               ; preds = %2
  %24 = landingpad { ptr, i32 }
          cleanup
  %25 = extractvalue { ptr, i32 } %24, 0
  store ptr %25, ptr %7, align 8
  %26 = extractvalue { ptr, i32 } %24, 1
  store i32 %26, ptr %8, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %83

27:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i32, ptr %10, align 4, !tbaa !5
  %30 = sdiv i32 %28, %29
  store i32 %30, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 1, ptr %15, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %49, %27
  %32 = load i32, ptr %14, align 4, !tbaa !5
  %33 = load i32, ptr %13, align 4, !tbaa !5
  %34 = icmp sle i32 %32, %33
  br i1 %34, label %35, label %52

35:                                               ; preds = %31
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = load i32, ptr %15, align 4, !tbaa !5
  %38 = shl i32 1, %37
  %39 = and i32 %36, %38
  %40 = icmp ne i32 %39, 0
  br i1 %40, label %44, label %41

41:                                               ; preds = %35
  %42 = load i32, ptr %14, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %14, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %41, %35
  %45 = load i32, ptr %14, align 4, !tbaa !5
  %46 = load i32, ptr %13, align 4, !tbaa !5
  %47 = icmp sgt i32 %45, %46
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  br label %52

49:                                               ; preds = %44
  %50 = load i32, ptr %15, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %15, align 4, !tbaa !5
  br label %31, !llvm.loop !9

52:                                               ; preds = %48, %31
  %53 = load i32, ptr %15, align 4, !tbaa !5
  %54 = load i32, ptr %11, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %55) #3
  store i32 %53, ptr %56, align 4, !tbaa !5
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = icmp eq i32 %57, 8
  br i1 %58, label %59, label %60

59:                                               ; preds = %52
  store i32 2, ptr %12, align 4
  br label %72

60:                                               ; preds = %52
  %61 = load i32, ptr %10, align 4, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = srem i32 %62, %61
  store i32 %63, ptr %4, align 4, !tbaa !5
  %64 = load i32, ptr %11, align 4, !tbaa !5
  %65 = sub nsw i32 8, %64
  %66 = load i32, ptr %10, align 4, !tbaa !5
  %67 = sdiv i32 %66, %65
  store i32 %67, ptr %10, align 4, !tbaa !5
  %68 = load i32, ptr %15, align 4, !tbaa !5
  %69 = shl i32 1, %68
  %70 = load i32, ptr %9, align 4, !tbaa !5
  %71 = or i32 %70, %69
  store i32 %71, ptr %9, align 4, !tbaa !5
  store i32 0, ptr %12, align 4
  br label %72

72:                                               ; preds = %60, %59
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %73 = load i32, ptr %12, align 4
  switch i32 %73, label %78 [
    i32 0, label %74
  ]

74:                                               ; preds = %72
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %11, align 4, !tbaa !5
  br label %19, !llvm.loop !11

78:                                               ; preds = %72, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %79

79:                                               ; preds = %78
  store i1 true, ptr %5, align 1
  store i32 1, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %80 = load i1, ptr %5, align 1
  br i1 %80, label %82, label %81

81:                                               ; preds = %79
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %82

82:                                               ; preds = %81, %79
  ret void

83:                                               ; preds = %23
  %84 = load ptr, ptr %7, align 8
  %85 = load i32, ptr %8, align 4
  %86 = insertvalue { ptr, i32 } poison, ptr %84, 0
  %87 = insertvalue { ptr, i32 } %86, i32 %85, 1
  resume { ptr, i32 } %87
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@n = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11permutationi(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, i32 noundef %1) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::allocator", align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 9, ptr noundef nonnull align 1 dereferenceable(1) %3)
          to label %4 unwind label %9

4:                                                ; preds = %2
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = sdiv i32 %5, 9
  %7 = sdiv i32 %1, %6
  %8 = srem i32 %1, %6
  %.not39 = icmp slt i32 %7, 0
  br i1 %.not39, label %._crit_edge, label %.lr.ph

9:                                                ; preds = %2
  %10 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  resume { ptr, i32 } %10

.lr.ph:                                           ; preds = %4, %.lr.ph
  %.041 = phi i32 [ %14, %.lr.ph ], [ 1, %4 ]
  %.02440 = phi i32 [ %spec.select, %.lr.ph ], [ 0, %4 ]
  %11 = lshr i32 -2, %.041
  %12 = and i32 %11, 1
  %spec.select = add nuw nsw i32 %12, %.02440
  %13 = icmp sgt i32 %spec.select, %7
  %14 = add nuw nsw i32 %.041, 1
  br i1 %13, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.0.lcssa = phi i32 [ 1, %4 ], [ %.041, %.lr.ph ]
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  store i32 %.0.lcssa, ptr %15, align 4, !tbaa !5
  %16 = sdiv i32 %5, 72
  %17 = shl nuw i32 1, %.0.lcssa
  %18 = or i32 %17, 1
  %19 = sdiv i32 %8, %16
  %20 = srem i32 %8, %16
  %21 = xor i32 %18, -1
  %.not39.1 = icmp slt i32 %19, 0
  br i1 %.not39.1, label %._crit_edge.1, label %.lr.ph.1

.lr.ph.1:                                         ; preds = %._crit_edge, %.lr.ph.1
  %.041.1 = phi i32 [ %25, %.lr.ph.1 ], [ 1, %._crit_edge ]
  %.02440.1 = phi i32 [ %spec.select.1, %.lr.ph.1 ], [ 0, %._crit_edge ]
  %22 = lshr i32 %21, %.041.1
  %23 = and i32 %22, 1
  %spec.select.1 = add nuw nsw i32 %23, %.02440.1
  %24 = icmp sgt i32 %spec.select.1, %19
  %25 = add nuw nsw i32 %.041.1, 1
  br i1 %24, label %._crit_edge.1, label %.lr.ph.1, !llvm.loop !9

._crit_edge.1:                                    ; preds = %.lr.ph.1, %._crit_edge
  %.0.lcssa.1 = phi i32 [ 1, %._crit_edge ], [ %.041.1, %.lr.ph.1 ]
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #3
  store i32 %.0.lcssa.1, ptr %26, align 4, !tbaa !5
  %27 = sdiv i32 %5, 504
  %28 = shl nuw i32 1, %.0.lcssa.1
  %29 = or i32 %28, %18
  %30 = sdiv i32 %20, %27
  %31 = srem i32 %20, %27
  %32 = xor i32 %29, -1
  %.not39.2 = icmp slt i32 %30, 0
  br i1 %.not39.2, label %._crit_edge.2, label %.lr.ph.2

.lr.ph.2:                                         ; preds = %._crit_edge.1, %.lr.ph.2
  %.041.2 = phi i32 [ %36, %.lr.ph.2 ], [ 1, %._crit_edge.1 ]
  %.02440.2 = phi i32 [ %spec.select.2, %.lr.ph.2 ], [ 0, %._crit_edge.1 ]
  %33 = lshr i32 %32, %.041.2
  %34 = and i32 %33, 1
  %spec.select.2 = add nuw nsw i32 %34, %.02440.2
  %35 = icmp sgt i32 %spec.select.2, %30
  %36 = add nuw nsw i32 %.041.2, 1
  br i1 %35, label %._crit_edge.2, label %.lr.ph.2, !llvm.loop !9

._crit_edge.2:                                    ; preds = %.lr.ph.2, %._crit_edge.1
  %.0.lcssa.2 = phi i32 [ 1, %._crit_edge.1 ], [ %.041.2, %.lr.ph.2 ]
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #3
  store i32 %.0.lcssa.2, ptr %37, align 4, !tbaa !5
  %38 = sdiv i32 %5, 3024
  %39 = shl nuw i32 1, %.0.lcssa.2
  %40 = or i32 %39, %29
  %41 = sdiv i32 %31, %38
  %42 = srem i32 %31, %38
  %43 = xor i32 %40, -1
  %.not39.3 = icmp slt i32 %41, 0
  br i1 %.not39.3, label %._crit_edge.3, label %.lr.ph.3

.lr.ph.3:                                         ; preds = %._crit_edge.2, %.lr.ph.3
  %.041.3 = phi i32 [ %47, %.lr.ph.3 ], [ 1, %._crit_edge.2 ]
  %.02440.3 = phi i32 [ %spec.select.3, %.lr.ph.3 ], [ 0, %._crit_edge.2 ]
  %44 = lshr i32 %43, %.041.3
  %45 = and i32 %44, 1
  %spec.select.3 = add nuw nsw i32 %45, %.02440.3
  %46 = icmp sgt i32 %spec.select.3, %41
  %47 = add nuw nsw i32 %.041.3, 1
  br i1 %46, label %._crit_edge.3, label %.lr.ph.3, !llvm.loop !9

._crit_edge.3:                                    ; preds = %.lr.ph.3, %._crit_edge.2
  %.0.lcssa.3 = phi i32 [ 1, %._crit_edge.2 ], [ %.041.3, %.lr.ph.3 ]
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 3) #3
  store i32 %.0.lcssa.3, ptr %48, align 4, !tbaa !5
  %49 = sdiv i32 %5, 15120
  %50 = shl nuw i32 1, %.0.lcssa.3
  %51 = or i32 %50, %40
  %52 = sdiv i32 %42, %49
  %53 = srem i32 %42, %49
  %54 = xor i32 %51, -1
  %.not39.4 = icmp slt i32 %52, 0
  br i1 %.not39.4, label %._crit_edge.4, label %.lr.ph.4

.lr.ph.4:                                         ; preds = %._crit_edge.3, %.lr.ph.4
  %.041.4 = phi i32 [ %58, %.lr.ph.4 ], [ 1, %._crit_edge.3 ]
  %.02440.4 = phi i32 [ %spec.select.4, %.lr.ph.4 ], [ 0, %._crit_edge.3 ]
  %55 = lshr i32 %54, %.041.4
  %56 = and i32 %55, 1
  %spec.select.4 = add nuw nsw i32 %56, %.02440.4
  %57 = icmp sgt i32 %spec.select.4, %52
  %58 = add nuw nsw i32 %.041.4, 1
  br i1 %57, label %._crit_edge.4, label %.lr.ph.4, !llvm.loop !9

._crit_edge.4:                                    ; preds = %.lr.ph.4, %._crit_edge.3
  %.0.lcssa.4 = phi i32 [ 1, %._crit_edge.3 ], [ %.041.4, %.lr.ph.4 ]
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 4) #3
  store i32 %.0.lcssa.4, ptr %59, align 4, !tbaa !5
  %60 = sdiv i32 %5, 60480
  %61 = shl nuw i32 1, %.0.lcssa.4
  %62 = or i32 %61, %51
  %63 = sdiv i32 %53, %60
  %64 = srem i32 %53, %60
  %65 = xor i32 %62, -1
  %.not39.5 = icmp slt i32 %63, 0
  br i1 %.not39.5, label %._crit_edge.5, label %.lr.ph.5

.lr.ph.5:                                         ; preds = %._crit_edge.4, %.lr.ph.5
  %.041.5 = phi i32 [ %69, %.lr.ph.5 ], [ 1, %._crit_edge.4 ]
  %.02440.5 = phi i32 [ %spec.select.5, %.lr.ph.5 ], [ 0, %._crit_edge.4 ]
  %66 = lshr i32 %65, %.041.5
  %67 = and i32 %66, 1
  %spec.select.5 = add nuw nsw i32 %67, %.02440.5
  %68 = icmp sgt i32 %spec.select.5, %63
  %69 = add nuw nsw i32 %.041.5, 1
  br i1 %68, label %._crit_edge.5, label %.lr.ph.5, !llvm.loop !9

._crit_edge.5:                                    ; preds = %.lr.ph.5, %._crit_edge.4
  %.0.lcssa.5 = phi i32 [ 1, %._crit_edge.4 ], [ %.041.5, %.lr.ph.5 ]
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 5) #3
  store i32 %.0.lcssa.5, ptr %70, align 4, !tbaa !5
  %71 = sdiv i32 %5, 181440
  %72 = shl nuw i32 1, %.0.lcssa.5
  %73 = or i32 %72, %62
  %74 = sdiv i32 %64, %71
  %75 = srem i32 %64, %71
  %76 = xor i32 %73, -1
  %.not39.6 = icmp slt i32 %74, 0
  br i1 %.not39.6, label %._crit_edge.6, label %.lr.ph.6

.lr.ph.6:                                         ; preds = %._crit_edge.5, %.lr.ph.6
  %.041.6 = phi i32 [ %80, %.lr.ph.6 ], [ 1, %._crit_edge.5 ]
  %.02440.6 = phi i32 [ %spec.select.6, %.lr.ph.6 ], [ 0, %._crit_edge.5 ]
  %77 = lshr i32 %76, %.041.6
  %78 = and i32 %77, 1
  %spec.select.6 = add nuw nsw i32 %78, %.02440.6
  %79 = icmp sgt i32 %spec.select.6, %74
  %80 = add nuw nsw i32 %.041.6, 1
  br i1 %79, label %._crit_edge.6, label %.lr.ph.6, !llvm.loop !9

._crit_edge.6:                                    ; preds = %.lr.ph.6, %._crit_edge.5
  %.0.lcssa.6 = phi i32 [ 1, %._crit_edge.5 ], [ %.041.6, %.lr.ph.6 ]
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 6) #3
  store i32 %.0.lcssa.6, ptr %81, align 4, !tbaa !5
  %82 = sdiv i32 %5, 362880
  %83 = shl nuw i32 1, %.0.lcssa.6
  %84 = or i32 %83, %73
  %85 = sdiv i32 %75, %82
  %86 = xor i32 %84, -1
  %.not39.7 = icmp slt i32 %85, 0
  br i1 %.not39.7, label %.lr.ph.preheader.8, label %.lr.ph.7

.lr.ph.7:                                         ; preds = %._crit_edge.6, %.lr.ph.7
  %.041.7 = phi i32 [ %90, %.lr.ph.7 ], [ 1, %._crit_edge.6 ]
  %.02440.7 = phi i32 [ %spec.select.7, %.lr.ph.7 ], [ 0, %._crit_edge.6 ]
  %87 = lshr i32 %86, %.041.7
  %88 = and i32 %87, 1
  %spec.select.7 = add nuw nsw i32 %88, %.02440.7
  %89 = icmp sgt i32 %spec.select.7, %85
  %90 = add nuw nsw i32 %.041.7, 1
  br i1 %89, label %.lr.ph.preheader.8, label %.lr.ph.7, !llvm.loop !9

.lr.ph.preheader.8:                               ; preds = %.lr.ph.7, %._crit_edge.6
  %.0.lcssa.7 = phi i32 [ 1, %._crit_edge.6 ], [ %.041.7, %.lr.ph.7 ]
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 7) #3
  store i32 %.0.lcssa.7, ptr %91, align 4, !tbaa !5
  %92 = shl nuw i32 1, %.0.lcssa.7
  %93 = or i32 %92, %84
  br label %.lr.ph.8

.lr.ph.8:                                         ; preds = %.lr.ph.8, %.lr.ph.preheader.8
  %.041.8 = phi i32 [ %96, %.lr.ph.8 ], [ 1, %.lr.ph.preheader.8 ]
  %94 = shl nuw i32 1, %.041.8
  %95 = and i32 %94, %93
  %.not.not = icmp eq i32 %95, 0
  %96 = add nuw nsw i32 %.041.8, 1
  br i1 %.not.not, label %.thread, label %.lr.ph.8, !llvm.loop !9

.thread:                                          ; preds = %.lr.ph.8
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 8) #3
  store i32 %.041.8, ptr %97, align 4, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass