; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [78 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_b = external hidden unnamed_addr constant [6 x i32], align 16
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_a = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__func__.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla = external hidden unnamed_addr constant [52 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_sve_mmla(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #3 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca [6 x i32], align 16
  %30 = alloca [2 x i32], align 4
  %31 = alloca [2 x i32], align 4
  %32 = alloca [24 x i32], align 16
  %33 = alloca i8, align 1
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 2, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 0, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  store i32 0, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %37, i32 0, i32 6
  %39 = load i32, ptr %38, align 4, !tbaa !11
  %40 = icmp eq i32 %39, 2301
  br i1 %40, label %46, label %41

41:                                               ; preds = %7
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %42, i32 0, i32 6
  %44 = load i32, ptr %43, align 4, !tbaa !11
  %45 = icmp eq i32 %44, 2302
  br label %46

46:                                               ; preds = %41, %7
  %47 = phi i1 [ true, %7 ], [ %45, %41 ]
  %48 = zext i1 %47 to i64
  %49 = select i1 %47, i32 64, i32 32
  store i32 %49, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %50, i32 0, i32 6
  %52 = load i32, ptr %51, align 1, !tbaa !13
  %53 = and i32 %52, 4096
  %54 = icmp ugt i32 %53, 0
  br i1 %54, label %55, label %61

55:                                               ; preds = %46
  %56 = load ptr, ptr %11, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %56, i32 0, i32 6
  %58 = load i32, ptr %57, align 1, !tbaa !13
  %59 = and i32 %58, 2
  %60 = icmp ugt i32 %59, 0
  br label %61

61:                                               ; preds = %55, %46
  %62 = phi i1 [ false, %46 ], [ %60, %55 ]
  %63 = zext i1 %62 to i64
  %64 = select i1 %62, i32 1, i32 0
  store i32 %64, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %65 = load i32, ptr %24, align 4, !tbaa !9
  %66 = icmp eq i32 %65, 0
  br i1 %66, label %67, label %75

67:                                               ; preds = %61
  %68 = load ptr, ptr %11, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %68, i32 0, i32 4
  %70 = load i32, ptr %69, align 1, !tbaa !17
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %71, i32 0, i32 3
  %73 = load i32, ptr %72, align 4, !tbaa !18
  %74 = mul i32 %70, %73
  br label %80

75:                                               ; preds = %61
  %76 = load ptr, ptr %10, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %76, i32 0, i32 3
  %78 = load i32, ptr %77, align 4, !tbaa !18
  %79 = mul i32 8, %78
  br label %80

80:                                               ; preds = %75, %67
  %81 = phi i32 [ %74, %67 ], [ %79, %75 ]
  store i32 %81, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  store i32 44, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  store i32 0, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #4
  store i32 3, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %29) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %29, ptr align 16 @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_b, i64 24, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %30, ptr align 4 @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_zip, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %31, ptr align 4 @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_a, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 96, ptr %32) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %32, ptr align 16 @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c, i64 96, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %33) #4
  store i8 0, ptr %33, align 1, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #4
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #4
  store i32 0, ptr %35, align 4, !tbaa !9
  %82 = load i32, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %83

83:                                               ; preds = %91, %80
  %84 = load i32, ptr %20, align 4, !tbaa !9
  %85 = icmp ult i32 %84, 6
  br i1 %85, label %86, label %94

86:                                               ; preds = %83
  %87 = load i32, ptr %20, align 4, !tbaa !9
  %88 = load i32, ptr %20, align 4, !tbaa !9
  %89 = zext i32 %88 to i64
  %90 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %89
  store i32 %87, ptr %90, align 4, !tbaa !9
  br label %91

91:                                               ; preds = %86
  %92 = load i32, ptr %20, align 4, !tbaa !9
  %93 = add i32 %92, 1
  store i32 %93, ptr %20, align 4, !tbaa !9
  br label %83, !llvm.loop !22

94:                                               ; preds = %83
  %95 = load ptr, ptr %8, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %95, i32 0, i32 6
  %97 = load i32, ptr %96, align 4, !tbaa !11
  %98 = icmp eq i32 %97, 2301
  br i1 %98, label %104, label %99

99:                                               ; preds = %94
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %100, i32 0, i32 6
  %102 = load i32, ptr %101, align 4, !tbaa !11
  %103 = icmp eq i32 %102, 2302
  br i1 %103, label %104, label %114

104:                                              ; preds = %99, %94
  %105 = load i32, ptr %12, align 4, !tbaa !9
  %106 = udiv i32 %105, 8
  store i32 %106, ptr %15, align 4, !tbaa !9
  %107 = load i32, ptr %12, align 4, !tbaa !9
  %108 = urem i32 %107, 8
  %109 = icmp eq i32 %108, 0
  %110 = zext i1 %109 to i64
  %111 = select i1 %109, i32 0, i32 1
  store i32 %111, ptr %16, align 4, !tbaa !9
  %112 = load i32, ptr %12, align 4, !tbaa !9
  %113 = urem i32 %112, 8
  store i32 %113, ptr %17, align 4, !tbaa !9
  br label %124

114:                                              ; preds = %99
  %115 = load i32, ptr %12, align 4, !tbaa !9
  %116 = udiv i32 %115, 4
  store i32 %116, ptr %15, align 4, !tbaa !9
  %117 = load i32, ptr %12, align 4, !tbaa !9
  %118 = urem i32 %117, 4
  %119 = icmp eq i32 %118, 0
  %120 = zext i1 %119 to i64
  %121 = select i1 %119, i32 0, i32 1
  store i32 %121, ptr %16, align 4, !tbaa !9
  %122 = load i32, ptr %12, align 4, !tbaa !9
  %123 = urem i32 %122, 4
  store i32 %123, ptr %17, align 4, !tbaa !9
  br label %124

124:                                              ; preds = %114, %104
  %125 = load i32, ptr %13, align 4, !tbaa !9
  %126 = add i32 %125, 1
  %127 = udiv i32 %126, 2
  store i32 %127, ptr %18, align 4, !tbaa !9
  %128 = load ptr, ptr %11, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %128, i32 0, i32 8
  %130 = getelementptr inbounds [3 x i8], ptr %129, i64 0, i64 0
  %131 = call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef %130)
  %132 = icmp eq i32 2, %131
  br i1 %132, label %133, label %154

133:                                              ; preds = %124
  store i32 1684071427, ptr %34, align 4, !tbaa !9
  %134 = load ptr, ptr %11, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %134, i32 0, i32 2
  %136 = load i32, ptr %135, align 1, !tbaa !24
  %137 = urem i32 %136, 8
  %138 = icmp eq i32 %137, 0
  br i1 %138, label %139, label %150

139:                                              ; preds = %133
  %140 = load ptr, ptr %8, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %140, i32 0, i32 6
  %142 = load i32, ptr %141, align 4, !tbaa !11
  %143 = icmp eq i32 %142, 2301
  br i1 %143, label %149, label %144

144:                                              ; preds = %139
  %145 = load ptr, ptr %8, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %145, i32 0, i32 6
  %147 = load i32, ptr %146, align 4, !tbaa !11
  %148 = icmp eq i32 %147, 2302
  br i1 %148, label %149, label %150

149:                                              ; preds = %144, %139
  store i32 8, ptr %35, align 4, !tbaa !9
  br label %151

150:                                              ; preds = %144, %133
  store i32 4, ptr %35, align 4, !tbaa !9
  br label %151

151:                                              ; preds = %150, %149
  %152 = load i32, ptr %35, align 4, !tbaa !9
  %153 = udiv i32 %152, 4
  store i32 %153, ptr %19, align 4, !tbaa !9
  br label %233

154:                                              ; preds = %124
  %155 = load ptr, ptr %11, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %155, i32 0, i32 8
  %157 = getelementptr inbounds [3 x i8], ptr %156, i64 0, i64 0
  %158 = call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef %157)
  %159 = icmp eq i32 12, %158
  br i1 %159, label %160, label %223

160:                                              ; preds = %154
  %161 = load ptr, ptr %11, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %161, i32 0, i32 6
  %163 = load i32, ptr %162, align 1, !tbaa !13
  %164 = and i32 %163, 256
  %165 = icmp ugt i32 %164, 0
  br i1 %165, label %166, label %173

166:                                              ; preds = %160
  %167 = load ptr, ptr %11, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %167, i32 0, i32 6
  %169 = load i32, ptr %168, align 1, !tbaa !13
  %170 = and i32 %169, 512
  %171 = icmp ugt i32 %170, 0
  br i1 %171, label %172, label %173

172:                                              ; preds = %166
  store i32 1170249731, ptr %34, align 4, !tbaa !9
  br label %202

173:                                              ; preds = %166, %160
  %174 = load ptr, ptr %11, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %174, i32 0, i32 6
  %176 = load i32, ptr %175, align 1, !tbaa !13
  %177 = and i32 %176, 256
  %178 = icmp eq i32 %177, 0
  br i1 %178, label %179, label %186

179:                                              ; preds = %173
  %180 = load ptr, ptr %11, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %180, i32 0, i32 6
  %182 = load i32, ptr %181, align 1, !tbaa !13
  %183 = and i32 %182, 512
  %184 = icmp ugt i32 %183, 0
  br i1 %184, label %185, label %186

185:                                              ; preds = %179
  store i32 1166055427, ptr %34, align 4, !tbaa !9
  br label %201

186:                                              ; preds = %179, %173
  %187 = load ptr, ptr %11, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %187, i32 0, i32 6
  %189 = load i32, ptr %188, align 1, !tbaa !13
  %190 = and i32 %189, 256
  %191 = icmp ugt i32 %190, 0
  br i1 %191, label %192, label %199

192:                                              ; preds = %186
  %193 = load ptr, ptr %11, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %193, i32 0, i32 6
  %195 = load i32, ptr %194, align 1, !tbaa !13
  %196 = and i32 %195, 512
  %197 = icmp eq i32 %196, 0
  br i1 %197, label %198, label %199

198:                                              ; preds = %192
  store i32 1166055427, ptr %34, align 4, !tbaa !9
  store i8 1, ptr %33, align 1, !tbaa !21
  br label %200

199:                                              ; preds = %192, %186
  store i32 1157666819, ptr %34, align 4, !tbaa !9
  br label %200

200:                                              ; preds = %199, %198
  br label %201

201:                                              ; preds = %200, %185
  br label %202

202:                                              ; preds = %201, %172
  %203 = load ptr, ptr %11, align 8, !tbaa !5
  %204 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %203, i32 0, i32 2
  %205 = load i32, ptr %204, align 1, !tbaa !24
  %206 = urem i32 %205, 16
  %207 = icmp eq i32 %206, 0
  br i1 %207, label %208, label %219

208:                                              ; preds = %202
  %209 = load ptr, ptr %8, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %209, i32 0, i32 6
  %211 = load i32, ptr %210, align 4, !tbaa !11
  %212 = icmp eq i32 %211, 2301
  br i1 %212, label %218, label %213

213:                                              ; preds = %208
  %214 = load ptr, ptr %8, align 8, !tbaa !5
  %215 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %214, i32 0, i32 6
  %216 = load i32, ptr %215, align 4, !tbaa !11
  %217 = icmp eq i32 %216, 2302
  br i1 %217, label %218, label %219

218:                                              ; preds = %213, %208
  store i32 16, ptr %35, align 4, !tbaa !9
  br label %220

219:                                              ; preds = %213, %202
  store i32 8, ptr %35, align 4, !tbaa !9
  br label %220

220:                                              ; preds = %219, %218
  %221 = load i32, ptr %35, align 4, !tbaa !9
  %222 = udiv i32 %221, 8
  store i32 %222, ptr %19, align 4, !tbaa !9
  br label %232

223:                                              ; preds = %154
  %224 = load ptr, ptr %8, align 8, !tbaa !5
  %225 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %226 = icmp ult i32 1, %225
  br i1 %226, label %227, label %229

227:                                              ; preds = %223
  %228 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %230

229:                                              ; preds = %223
  br label %230

230:                                              ; preds = %229, %227
  %231 = phi i32 [ %228, %227 ], [ 1, %229 ]
  call void @libxsmm_handle_error(ptr noundef %224, i32 noundef 90033, ptr noundef @__func__.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla, ptr noundef @.str, i32 noundef 1102, i32 noundef %231)
  store i32 1, ptr %36, align 4
  br label %856

232:                                              ; preds = %220
  br label %233

233:                                              ; preds = %232, %151
  %234 = load i32, ptr %19, align 4, !tbaa !9
  %235 = icmp ugt i32 %234, 1
  br i1 %235, label %236, label %256

236:                                              ; preds = %233
  %237 = load i32, ptr %24, align 4, !tbaa !9
  %238 = icmp ugt i32 %237, 0
  br i1 %238, label %239, label %249

239:                                              ; preds = %236
  %240 = load ptr, ptr %8, align 8, !tbaa !5
  %241 = load ptr, ptr %9, align 8, !tbaa !5
  %242 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %241, i32 0, i32 3
  %243 = load i32, ptr %242, align 4, !tbaa !25
  %244 = load i32, ptr %26, align 4, !tbaa !9
  %245 = load ptr, ptr %11, align 8, !tbaa !5
  %246 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %245, i32 0, i32 4
  %247 = load i32, ptr %246, align 1, !tbaa !17
  %248 = mul i32 %247, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %240, i32 noundef 285212678, i32 noundef %243, i32 noundef %244, i32 noundef %248, i8 noundef zeroext 0)
  br label %255

249:                                              ; preds = %236
  %250 = load ptr, ptr %8, align 8, !tbaa !5
  %251 = load ptr, ptr %9, align 8, !tbaa !5
  %252 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %251, i32 0, i32 3
  %253 = load i32, ptr %252, align 4, !tbaa !25
  %254 = load i32, ptr %26, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %250, i32 noundef 285212678, i32 noundef %253, i32 noundef %254, i32 noundef 8, i8 noundef zeroext 0)
  br label %255

255:                                              ; preds = %249, %239
  br label %256

256:                                              ; preds = %255, %233
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %257

257:                                              ; preds = %583, %256
  %258 = load i32, ptr %20, align 4, !tbaa !9
  %259 = load i32, ptr %18, align 4, !tbaa !9
  %260 = icmp ult i32 %258, %259
  br i1 %260, label %261, label %586

261:                                              ; preds = %257
  %262 = load i32, ptr %24, align 4, !tbaa !9
  %263 = icmp ugt i32 %262, 0
  br i1 %263, label %264, label %356

264:                                              ; preds = %261
  %265 = load i32, ptr %13, align 4, !tbaa !9
  %266 = urem i32 %265, 2
  %267 = icmp eq i32 %266, 1
  br i1 %267, label %268, label %299

268:                                              ; preds = %264
  %269 = load i32, ptr %20, align 4, !tbaa !9
  %270 = load i32, ptr %18, align 4, !tbaa !9
  %271 = sub i32 %270, 1
  %272 = icmp eq i32 %269, %271
  br i1 %272, label %273, label %299

273:                                              ; preds = %268
  %274 = load ptr, ptr %8, align 8, !tbaa !5
  %275 = load ptr, ptr %9, align 8, !tbaa !5
  %276 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %275, i32 0, i32 3
  %277 = load i32, ptr %276, align 4, !tbaa !25
  %278 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %279 = load i32, ptr %278, align 4, !tbaa !9
  %280 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %274, i32 noundef -2050957178, i32 noundef %277, i32 noundef 0, i32 noundef 0, i32 noundef %279, i32 noundef %280)
  %281 = load ptr, ptr %8, align 8, !tbaa !5
  %282 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %283 = load i32, ptr %282, align 4, !tbaa !9
  %284 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %285 = load i32, ptr %284, align 4, !tbaa !9
  %286 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %287 = load i32, ptr %286, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %281, i32 noundef 77606915, i32 noundef %283, i32 noundef %285, i8 noundef zeroext 0, i32 noundef %287, i32 noundef 0, i32 noundef 2)
  %288 = load ptr, ptr %8, align 8, !tbaa !5
  %289 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %290 = load i32, ptr %289, align 4, !tbaa !9
  %291 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %292 = load i32, ptr %291, align 4, !tbaa !9
  %293 = load i32, ptr %20, align 4, !tbaa !9
  %294 = mul i32 2, %293
  %295 = add i32 %294, 0
  %296 = zext i32 %295 to i64
  %297 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %296
  %298 = load i32, ptr %297, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %288, i32 noundef 86007811, i32 noundef %290, i32 noundef %292, i8 noundef zeroext 0, i32 noundef %298, i32 noundef 127, i32 noundef 3)
  br label %311

299:                                              ; preds = %268, %264
  %300 = load ptr, ptr %8, align 8, !tbaa !5
  %301 = load ptr, ptr %9, align 8, !tbaa !5
  %302 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %301, i32 0, i32 3
  %303 = load i32, ptr %302, align 4, !tbaa !25
  %304 = load i32, ptr %20, align 4, !tbaa !9
  %305 = mul i32 2, %304
  %306 = add i32 %305, 0
  %307 = zext i32 %306 to i64
  %308 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %307
  %309 = load i32, ptr %308, align 4, !tbaa !9
  %310 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %300, i32 noundef -1518329722, i32 noundef %303, i32 noundef 0, i32 noundef 0, i32 noundef %309, i32 noundef %310)
  br label %311

311:                                              ; preds = %299, %273
  %312 = load i32, ptr %20, align 4, !tbaa !9
  %313 = add i32 %312, 1
  %314 = load i32, ptr %18, align 4, !tbaa !9
  %315 = icmp ne i32 %313, %314
  br i1 %315, label %316, label %329

316:                                              ; preds = %311
  %317 = load ptr, ptr %8, align 8, !tbaa !5
  %318 = load ptr, ptr %9, align 8, !tbaa !5
  %319 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %318, i32 0, i32 3
  %320 = load i32, ptr %319, align 4, !tbaa !25
  %321 = load ptr, ptr %9, align 8, !tbaa !5
  %322 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %321, i32 0, i32 22
  %323 = load i32, ptr %322, align 4, !tbaa !27
  %324 = load ptr, ptr %9, align 8, !tbaa !5
  %325 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %324, i32 0, i32 3
  %326 = load i32, ptr %325, align 4, !tbaa !25
  %327 = load i32, ptr %25, align 4, !tbaa !9
  %328 = zext i32 %327 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %317, i32 noundef 4096, i32 noundef %320, i32 noundef %323, i32 noundef %326, i64 noundef %328)
  br label %355

329:                                              ; preds = %311
  %330 = load ptr, ptr %8, align 8, !tbaa !5
  %331 = load ptr, ptr %9, align 8, !tbaa !5
  %332 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %331, i32 0, i32 3
  %333 = load i32, ptr %332, align 4, !tbaa !25
  %334 = load ptr, ptr %9, align 8, !tbaa !5
  %335 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %334, i32 0, i32 22
  %336 = load i32, ptr %335, align 4, !tbaa !27
  %337 = load ptr, ptr %9, align 8, !tbaa !5
  %338 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %337, i32 0, i32 3
  %339 = load i32, ptr %338, align 4, !tbaa !25
  %340 = load i32, ptr %18, align 4, !tbaa !9
  %341 = zext i32 %340 to i64
  %342 = sub nsw i64 %341, 1
  %343 = load i32, ptr %25, align 4, !tbaa !9
  %344 = zext i32 %343 to i64
  %345 = mul nsw i64 %342, %344
  %346 = load i32, ptr %19, align 4, !tbaa !9
  %347 = zext i32 %346 to i64
  %348 = mul nsw i64 %347, 8
  %349 = load ptr, ptr %11, align 8, !tbaa !5
  %350 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %349, i32 0, i32 4
  %351 = load i32, ptr %350, align 1, !tbaa !17
  %352 = zext i32 %351 to i64
  %353 = mul nsw i64 %348, %352
  %354 = sub nsw i64 %345, %353
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %330, i32 noundef 4097, i32 noundef %333, i32 noundef %336, i32 noundef %339, i64 noundef %354)
  br label %355

355:                                              ; preds = %329, %316
  br label %455

356:                                              ; preds = %261
  %357 = load ptr, ptr %8, align 8, !tbaa !5
  %358 = load ptr, ptr %9, align 8, !tbaa !5
  %359 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %358, i32 0, i32 3
  %360 = load i32, ptr %359, align 4, !tbaa !25
  %361 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %362 = load i32, ptr %361, align 4, !tbaa !9
  %363 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %357, i32 noundef -2050957178, i32 noundef %360, i32 noundef 0, i32 noundef 0, i32 noundef %362, i32 noundef %363)
  %364 = load ptr, ptr %8, align 8, !tbaa !5
  %365 = load ptr, ptr %9, align 8, !tbaa !5
  %366 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %365, i32 0, i32 3
  %367 = load i32, ptr %366, align 4, !tbaa !25
  %368 = load ptr, ptr %9, align 8, !tbaa !5
  %369 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %368, i32 0, i32 22
  %370 = load i32, ptr %369, align 4, !tbaa !27
  %371 = load ptr, ptr %9, align 8, !tbaa !5
  %372 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %371, i32 0, i32 3
  %373 = load i32, ptr %372, align 4, !tbaa !25
  %374 = load i32, ptr %25, align 4, !tbaa !9
  %375 = zext i32 %374 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %364, i32 noundef 4096, i32 noundef %367, i32 noundef %370, i32 noundef %373, i64 noundef %375)
  %376 = load i32, ptr %13, align 4, !tbaa !9
  %377 = urem i32 %376, 2
  %378 = icmp eq i32 %377, 1
  br i1 %378, label %379, label %392

379:                                              ; preds = %356
  %380 = load i32, ptr %20, align 4, !tbaa !9
  %381 = load i32, ptr %18, align 4, !tbaa !9
  %382 = sub i32 %381, 1
  %383 = icmp eq i32 %380, %382
  br i1 %383, label %384, label %392

384:                                              ; preds = %379
  %385 = load ptr, ptr %8, align 8, !tbaa !5
  %386 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %387 = load i32, ptr %386, align 4, !tbaa !9
  %388 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %389 = load i32, ptr %388, align 4, !tbaa !9
  %390 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %391 = load i32, ptr %390, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %385, i32 noundef 77606915, i32 noundef %387, i32 noundef %389, i8 noundef zeroext 0, i32 noundef %391, i32 noundef 0, i32 noundef 2)
  br label %400

392:                                              ; preds = %379, %356
  %393 = load ptr, ptr %8, align 8, !tbaa !5
  %394 = load ptr, ptr %9, align 8, !tbaa !5
  %395 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %394, i32 0, i32 3
  %396 = load i32, ptr %395, align 4, !tbaa !25
  %397 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %398 = load i32, ptr %397, align 4, !tbaa !9
  %399 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %393, i32 noundef -2050957178, i32 noundef %396, i32 noundef 0, i32 noundef 0, i32 noundef %398, i32 noundef %399)
  br label %400

400:                                              ; preds = %392, %384
  %401 = load i32, ptr %20, align 4, !tbaa !9
  %402 = add i32 %401, 1
  %403 = load i32, ptr %18, align 4, !tbaa !9
  %404 = icmp ne i32 %402, %403
  br i1 %404, label %405, label %418

405:                                              ; preds = %400
  %406 = load ptr, ptr %8, align 8, !tbaa !5
  %407 = load ptr, ptr %9, align 8, !tbaa !5
  %408 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %407, i32 0, i32 3
  %409 = load i32, ptr %408, align 4, !tbaa !25
  %410 = load ptr, ptr %9, align 8, !tbaa !5
  %411 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %410, i32 0, i32 22
  %412 = load i32, ptr %411, align 4, !tbaa !27
  %413 = load ptr, ptr %9, align 8, !tbaa !5
  %414 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %413, i32 0, i32 3
  %415 = load i32, ptr %414, align 4, !tbaa !25
  %416 = load i32, ptr %25, align 4, !tbaa !9
  %417 = zext i32 %416 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %406, i32 noundef 4096, i32 noundef %409, i32 noundef %412, i32 noundef %415, i64 noundef %417)
  br label %443

418:                                              ; preds = %400
  %419 = load ptr, ptr %8, align 8, !tbaa !5
  %420 = load ptr, ptr %9, align 8, !tbaa !5
  %421 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %420, i32 0, i32 3
  %422 = load i32, ptr %421, align 4, !tbaa !25
  %423 = load ptr, ptr %9, align 8, !tbaa !5
  %424 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %423, i32 0, i32 22
  %425 = load i32, ptr %424, align 4, !tbaa !27
  %426 = load ptr, ptr %9, align 8, !tbaa !5
  %427 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %426, i32 0, i32 3
  %428 = load i32, ptr %427, align 4, !tbaa !25
  %429 = load i32, ptr %18, align 4, !tbaa !9
  %430 = zext i32 %429 to i64
  %431 = sub nsw i64 %430, 1
  %432 = load i32, ptr %25, align 4, !tbaa !9
  %433 = zext i32 %432 to i64
  %434 = mul nsw i64 %431, %433
  %435 = mul nsw i64 %434, 2
  %436 = load i32, ptr %25, align 4, !tbaa !9
  %437 = zext i32 %436 to i64
  %438 = add nsw i64 %435, %437
  %439 = load i32, ptr %19, align 4, !tbaa !9
  %440 = zext i32 %439 to i64
  %441 = mul nsw i64 %440, 8
  %442 = sub nsw i64 %438, %441
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %419, i32 noundef 4097, i32 noundef %422, i32 noundef %425, i32 noundef %428, i64 noundef %442)
  br label %443

443:                                              ; preds = %418, %405
  %444 = load ptr, ptr %8, align 8, !tbaa !5
  %445 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %446 = load i32, ptr %445, align 4, !tbaa !9
  %447 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %448 = load i32, ptr %447, align 4, !tbaa !9
  %449 = load i32, ptr %20, align 4, !tbaa !9
  %450 = mul i32 2, %449
  %451 = add i32 %450, 0
  %452 = zext i32 %451 to i64
  %453 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %452
  %454 = load i32, ptr %453, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %444, i32 noundef 86007811, i32 noundef %446, i32 noundef %448, i8 noundef zeroext 0, i32 noundef %454, i32 noundef 127, i32 noundef 3)
  br label %455

455:                                              ; preds = %443, %355
  %456 = load i32, ptr %19, align 4, !tbaa !9
  %457 = icmp ugt i32 %456, 1
  br i1 %457, label %458, label %582

458:                                              ; preds = %455
  %459 = load i32, ptr %24, align 4, !tbaa !9
  %460 = icmp ugt i32 %459, 0
  br i1 %460, label %461, label %519

461:                                              ; preds = %458
  %462 = load i32, ptr %13, align 4, !tbaa !9
  %463 = urem i32 %462, 2
  %464 = icmp eq i32 %463, 1
  br i1 %464, label %465, label %494

465:                                              ; preds = %461
  %466 = load i32, ptr %20, align 4, !tbaa !9
  %467 = load i32, ptr %18, align 4, !tbaa !9
  %468 = sub i32 %467, 1
  %469 = icmp eq i32 %466, %468
  br i1 %469, label %470, label %494

470:                                              ; preds = %465
  %471 = load ptr, ptr %8, align 8, !tbaa !5
  %472 = load i32, ptr %26, align 4, !tbaa !9
  %473 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %474 = load i32, ptr %473, align 4, !tbaa !9
  %475 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %471, i32 noundef -2050957178, i32 noundef %472, i32 noundef 0, i32 noundef 0, i32 noundef %474, i32 noundef %475)
  %476 = load ptr, ptr %8, align 8, !tbaa !5
  %477 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %478 = load i32, ptr %477, align 4, !tbaa !9
  %479 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %480 = load i32, ptr %479, align 4, !tbaa !9
  %481 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %482 = load i32, ptr %481, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %476, i32 noundef 77606915, i32 noundef %478, i32 noundef %480, i8 noundef zeroext 0, i32 noundef %482, i32 noundef 0, i32 noundef 2)
  %483 = load ptr, ptr %8, align 8, !tbaa !5
  %484 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %485 = load i32, ptr %484, align 4, !tbaa !9
  %486 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %487 = load i32, ptr %486, align 4, !tbaa !9
  %488 = load i32, ptr %20, align 4, !tbaa !9
  %489 = mul i32 2, %488
  %490 = add i32 %489, 1
  %491 = zext i32 %490 to i64
  %492 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %491
  %493 = load i32, ptr %492, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %483, i32 noundef 86007811, i32 noundef %485, i32 noundef %487, i8 noundef zeroext 0, i32 noundef %493, i32 noundef 127, i32 noundef 3)
  br label %504

494:                                              ; preds = %465, %461
  %495 = load ptr, ptr %8, align 8, !tbaa !5
  %496 = load i32, ptr %26, align 4, !tbaa !9
  %497 = load i32, ptr %20, align 4, !tbaa !9
  %498 = mul i32 2, %497
  %499 = add i32 %498, 1
  %500 = zext i32 %499 to i64
  %501 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %500
  %502 = load i32, ptr %501, align 4, !tbaa !9
  %503 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %495, i32 noundef -1518329722, i32 noundef %496, i32 noundef 0, i32 noundef 0, i32 noundef %502, i32 noundef %503)
  br label %504

504:                                              ; preds = %494, %470
  %505 = load i32, ptr %20, align 4, !tbaa !9
  %506 = add i32 %505, 1
  %507 = load i32, ptr %18, align 4, !tbaa !9
  %508 = icmp ne i32 %506, %507
  br i1 %508, label %509, label %518

509:                                              ; preds = %504
  %510 = load ptr, ptr %8, align 8, !tbaa !5
  %511 = load i32, ptr %26, align 4, !tbaa !9
  %512 = load ptr, ptr %9, align 8, !tbaa !5
  %513 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %512, i32 0, i32 22
  %514 = load i32, ptr %513, align 4, !tbaa !27
  %515 = load i32, ptr %26, align 4, !tbaa !9
  %516 = load i32, ptr %25, align 4, !tbaa !9
  %517 = zext i32 %516 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %510, i32 noundef 4096, i32 noundef %511, i32 noundef %514, i32 noundef %515, i64 noundef %517)
  br label %518

518:                                              ; preds = %509, %504
  br label %581

519:                                              ; preds = %458
  %520 = load ptr, ptr %8, align 8, !tbaa !5
  %521 = load i32, ptr %26, align 4, !tbaa !9
  %522 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %523 = load i32, ptr %522, align 4, !tbaa !9
  %524 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %520, i32 noundef -2050957178, i32 noundef %521, i32 noundef 0, i32 noundef 0, i32 noundef %523, i32 noundef %524)
  %525 = load ptr, ptr %8, align 8, !tbaa !5
  %526 = load i32, ptr %26, align 4, !tbaa !9
  %527 = load ptr, ptr %9, align 8, !tbaa !5
  %528 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %527, i32 0, i32 22
  %529 = load i32, ptr %528, align 4, !tbaa !27
  %530 = load i32, ptr %26, align 4, !tbaa !9
  %531 = load i32, ptr %25, align 4, !tbaa !9
  %532 = zext i32 %531 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %525, i32 noundef 4096, i32 noundef %526, i32 noundef %529, i32 noundef %530, i64 noundef %532)
  %533 = load i32, ptr %13, align 4, !tbaa !9
  %534 = urem i32 %533, 2
  %535 = icmp eq i32 %534, 1
  br i1 %535, label %536, label %549

536:                                              ; preds = %519
  %537 = load i32, ptr %20, align 4, !tbaa !9
  %538 = load i32, ptr %18, align 4, !tbaa !9
  %539 = sub i32 %538, 1
  %540 = icmp eq i32 %537, %539
  br i1 %540, label %541, label %549

541:                                              ; preds = %536
  %542 = load ptr, ptr %8, align 8, !tbaa !5
  %543 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %544 = load i32, ptr %543, align 4, !tbaa !9
  %545 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %546 = load i32, ptr %545, align 4, !tbaa !9
  %547 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %548 = load i32, ptr %547, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %542, i32 noundef 77606915, i32 noundef %544, i32 noundef %546, i8 noundef zeroext 0, i32 noundef %548, i32 noundef 0, i32 noundef 2)
  br label %555

549:                                              ; preds = %536, %519
  %550 = load ptr, ptr %8, align 8, !tbaa !5
  %551 = load i32, ptr %26, align 4, !tbaa !9
  %552 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %553 = load i32, ptr %552, align 4, !tbaa !9
  %554 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %550, i32 noundef -2050957178, i32 noundef %551, i32 noundef 0, i32 noundef 0, i32 noundef %553, i32 noundef %554)
  br label %555

555:                                              ; preds = %549, %541
  %556 = load i32, ptr %20, align 4, !tbaa !9
  %557 = add i32 %556, 1
  %558 = load i32, ptr %18, align 4, !tbaa !9
  %559 = icmp ne i32 %557, %558
  br i1 %559, label %560, label %569

560:                                              ; preds = %555
  %561 = load ptr, ptr %8, align 8, !tbaa !5
  %562 = load i32, ptr %26, align 4, !tbaa !9
  %563 = load ptr, ptr %9, align 8, !tbaa !5
  %564 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %563, i32 0, i32 22
  %565 = load i32, ptr %564, align 4, !tbaa !27
  %566 = load i32, ptr %26, align 4, !tbaa !9
  %567 = load i32, ptr %25, align 4, !tbaa !9
  %568 = zext i32 %567 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %561, i32 noundef 4096, i32 noundef %562, i32 noundef %565, i32 noundef %566, i64 noundef %568)
  br label %569

569:                                              ; preds = %560, %555
  %570 = load ptr, ptr %8, align 8, !tbaa !5
  %571 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 0
  %572 = load i32, ptr %571, align 4, !tbaa !9
  %573 = getelementptr inbounds [2 x i32], ptr %30, i64 0, i64 1
  %574 = load i32, ptr %573, align 4, !tbaa !9
  %575 = load i32, ptr %20, align 4, !tbaa !9
  %576 = mul i32 2, %575
  %577 = add i32 %576, 1
  %578 = zext i32 %577 to i64
  %579 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %578
  %580 = load i32, ptr %579, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %570, i32 noundef 86007811, i32 noundef %572, i32 noundef %574, i8 noundef zeroext 0, i32 noundef %580, i32 noundef 127, i32 noundef 3)
  br label %581

581:                                              ; preds = %569, %518
  br label %582

582:                                              ; preds = %581, %455
  br label %583

583:                                              ; preds = %582
  %584 = load i32, ptr %20, align 4, !tbaa !9
  %585 = add i32 %584, 1
  store i32 %585, ptr %20, align 4, !tbaa !9
  br label %257, !llvm.loop !28

586:                                              ; preds = %257
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %587

587:                                              ; preds = %852, %586
  %588 = load i32, ptr %22, align 4, !tbaa !9
  %589 = load i32, ptr %19, align 4, !tbaa !9
  %590 = icmp ult i32 %588, %589
  br i1 %590, label %591, label %855

591:                                              ; preds = %587
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %592

592:                                              ; preds = %823, %591
  %593 = load i32, ptr %21, align 4, !tbaa !9
  %594 = load i32, ptr %15, align 4, !tbaa !9
  %595 = load i32, ptr %16, align 4, !tbaa !9
  %596 = add i32 %594, %595
  %597 = icmp ult i32 %593, %596
  br i1 %597, label %598, label %826

598:                                              ; preds = %592
  %599 = load i32, ptr %21, align 4, !tbaa !9
  %600 = load i32, ptr %15, align 4, !tbaa !9
  %601 = sub i32 %600, 1
  %602 = icmp ule i32 %599, %601
  br i1 %602, label %603, label %633

603:                                              ; preds = %598
  %604 = load i32, ptr %15, align 4, !tbaa !9
  %605 = icmp ugt i32 %604, 0
  br i1 %605, label %606, label %633

606:                                              ; preds = %603
  %607 = load ptr, ptr %8, align 8, !tbaa !5
  %608 = load ptr, ptr %9, align 8, !tbaa !5
  %609 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %608, i32 0, i32 1
  %610 = load i32, ptr %609, align 4, !tbaa !29
  %611 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %612 = load i32, ptr %611, align 4, !tbaa !9
  %613 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %607, i32 noundef -1512005498, i32 noundef %610, i32 noundef 0, i32 noundef 0, i32 noundef %612, i32 noundef %613)
  %614 = load ptr, ptr %8, align 8, !tbaa !5
  %615 = load ptr, ptr %9, align 8, !tbaa !5
  %616 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %615, i32 0, i32 1
  %617 = load i32, ptr %616, align 4, !tbaa !29
  %618 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  %619 = load i32, ptr %618, align 4, !tbaa !9
  %620 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %614, i32 noundef -1512005498, i32 noundef %617, i32 noundef 0, i32 noundef 1, i32 noundef %619, i32 noundef %620)
  %621 = load ptr, ptr %8, align 8, !tbaa !5
  %622 = load ptr, ptr %9, align 8, !tbaa !5
  %623 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %622, i32 0, i32 1
  %624 = load i32, ptr %623, align 4, !tbaa !29
  %625 = load ptr, ptr %9, align 8, !tbaa !5
  %626 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %625, i32 0, i32 22
  %627 = load i32, ptr %626, align 4, !tbaa !27
  %628 = load ptr, ptr %9, align 8, !tbaa !5
  %629 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %628, i32 0, i32 1
  %630 = load i32, ptr %629, align 4, !tbaa !29
  %631 = load i32, ptr %23, align 4, !tbaa !9
  %632 = zext i32 %631 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %621, i32 noundef 4096, i32 noundef %624, i32 noundef %627, i32 noundef %630, i64 noundef %632)
  br label %703

633:                                              ; preds = %603, %598
  %634 = load i32, ptr %17, align 4, !tbaa !9
  %635 = load ptr, ptr %8, align 8, !tbaa !5
  %636 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %635, i32 0, i32 6
  %637 = load i32, ptr %636, align 4, !tbaa !11
  %638 = icmp eq i32 %637, 2301
  br i1 %638, label %644, label %639

639:                                              ; preds = %633
  %640 = load ptr, ptr %8, align 8, !tbaa !5
  %641 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %640, i32 0, i32 6
  %642 = load i32, ptr %641, align 4, !tbaa !11
  %643 = icmp eq i32 %642, 2302
  br label %644

644:                                              ; preds = %639, %633
  %645 = phi i1 [ true, %633 ], [ %643, %639 ]
  %646 = zext i1 %645 to i64
  %647 = select i1 %645, i32 4, i32 2
  %648 = icmp uge i32 %634, %647
  br i1 %648, label %649, label %681

649:                                              ; preds = %644
  %650 = load ptr, ptr %8, align 8, !tbaa !5
  %651 = load ptr, ptr %9, align 8, !tbaa !5
  %652 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %651, i32 0, i32 1
  %653 = load i32, ptr %652, align 4, !tbaa !29
  %654 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %655 = load i32, ptr %654, align 4, !tbaa !9
  %656 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %650, i32 noundef -1512005498, i32 noundef %653, i32 noundef 0, i32 noundef 0, i32 noundef %655, i32 noundef %656)
  %657 = load i32, ptr %17, align 4, !tbaa !9
  %658 = load ptr, ptr %8, align 8, !tbaa !5
  %659 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %658, i32 0, i32 6
  %660 = load i32, ptr %659, align 4, !tbaa !11
  %661 = icmp eq i32 %660, 2301
  br i1 %661, label %667, label %662

662:                                              ; preds = %649
  %663 = load ptr, ptr %8, align 8, !tbaa !5
  %664 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %663, i32 0, i32 6
  %665 = load i32, ptr %664, align 4, !tbaa !11
  %666 = icmp eq i32 %665, 2302
  br label %667

667:                                              ; preds = %662, %649
  %668 = phi i1 [ true, %649 ], [ %666, %662 ]
  %669 = zext i1 %668 to i64
  %670 = select i1 %668, i32 4, i32 2
  %671 = icmp ugt i32 %657, %670
  br i1 %671, label %672, label %680

672:                                              ; preds = %667
  %673 = load ptr, ptr %8, align 8, !tbaa !5
  %674 = load ptr, ptr %9, align 8, !tbaa !5
  %675 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %674, i32 0, i32 1
  %676 = load i32, ptr %675, align 4, !tbaa !29
  %677 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  %678 = load i32, ptr %677, align 4, !tbaa !9
  %679 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %673, i32 noundef -1512005498, i32 noundef %676, i32 noundef 0, i32 noundef 1, i32 noundef %678, i32 noundef %679)
  br label %680

680:                                              ; preds = %672, %667
  br label %689

681:                                              ; preds = %644
  %682 = load ptr, ptr %8, align 8, !tbaa !5
  %683 = load ptr, ptr %9, align 8, !tbaa !5
  %684 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %683, i32 0, i32 1
  %685 = load i32, ptr %684, align 4, !tbaa !29
  %686 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %687 = load i32, ptr %686, align 4, !tbaa !9
  %688 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %682, i32 noundef -1512005498, i32 noundef %685, i32 noundef 0, i32 noundef 0, i32 noundef %687, i32 noundef %688)
  br label %689

689:                                              ; preds = %681, %680
  %690 = load ptr, ptr %8, align 8, !tbaa !5
  %691 = load ptr, ptr %9, align 8, !tbaa !5
  %692 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %691, i32 0, i32 1
  %693 = load i32, ptr %692, align 4, !tbaa !29
  %694 = load ptr, ptr %9, align 8, !tbaa !5
  %695 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %694, i32 0, i32 22
  %696 = load i32, ptr %695, align 4, !tbaa !27
  %697 = load ptr, ptr %9, align 8, !tbaa !5
  %698 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %697, i32 0, i32 1
  %699 = load i32, ptr %698, align 4, !tbaa !29
  %700 = load i32, ptr %17, align 4, !tbaa !9
  %701 = zext i32 %700 to i64
  %702 = mul nsw i64 %701, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %690, i32 noundef 4096, i32 noundef %693, i32 noundef %696, i32 noundef %699, i64 noundef %702)
  br label %703

703:                                              ; preds = %689, %606
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %704

704:                                              ; preds = %819, %703
  %705 = load i32, ptr %20, align 4, !tbaa !9
  %706 = load i32, ptr %18, align 4, !tbaa !9
  %707 = icmp ult i32 %705, %706
  br i1 %707, label %708, label %822

708:                                              ; preds = %704
  %709 = load ptr, ptr %8, align 8, !tbaa !5
  %710 = load i32, ptr %34, align 4, !tbaa !9
  %711 = load i8, ptr %33, align 1, !tbaa !21
  %712 = sext i8 %711 to i32
  %713 = icmp eq i32 %712, 0
  br i1 %713, label %714, label %722

714:                                              ; preds = %708
  %715 = load i32, ptr %20, align 4, !tbaa !9
  %716 = mul i32 2, %715
  %717 = load i32, ptr %22, align 4, !tbaa !9
  %718 = add i32 %716, %717
  %719 = zext i32 %718 to i64
  %720 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %719
  %721 = load i32, ptr %720, align 4, !tbaa !9
  br label %725

722:                                              ; preds = %708
  %723 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %724 = load i32, ptr %723, align 4, !tbaa !9
  br label %725

725:                                              ; preds = %722, %714
  %726 = phi i32 [ %721, %714 ], [ %724, %722 ]
  %727 = load i8, ptr %33, align 1, !tbaa !21
  %728 = sext i8 %727 to i32
  %729 = icmp eq i32 %728, 0
  br i1 %729, label %730, label %733

730:                                              ; preds = %725
  %731 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 0
  %732 = load i32, ptr %731, align 4, !tbaa !9
  br label %741

733:                                              ; preds = %725
  %734 = load i32, ptr %20, align 4, !tbaa !9
  %735 = mul i32 2, %734
  %736 = load i32, ptr %22, align 4, !tbaa !9
  %737 = add i32 %735, %736
  %738 = zext i32 %737 to i64
  %739 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %738
  %740 = load i32, ptr %739, align 4, !tbaa !9
  br label %741

741:                                              ; preds = %733, %730
  %742 = phi i32 [ %732, %730 ], [ %740, %733 ]
  %743 = load i32, ptr %20, align 4, !tbaa !9
  %744 = mul i32 8, %743
  %745 = load i32, ptr %21, align 4, !tbaa !9
  %746 = mul i32 2, %745
  %747 = add i32 %744, %746
  %748 = zext i32 %747 to i64
  %749 = getelementptr inbounds [24 x i32], ptr %32, i64 0, i64 %748
  %750 = load i32, ptr %749, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %709, i32 noundef %710, i32 noundef %726, i32 noundef %742, i8 noundef zeroext 0, i32 noundef %750, i32 noundef 127, i32 noundef 0)
  %751 = load i32, ptr %21, align 4, !tbaa !9
  %752 = load i32, ptr %15, align 4, !tbaa !9
  %753 = sub i32 %752, 1
  %754 = icmp ule i32 %751, %753
  br i1 %754, label %755, label %758

755:                                              ; preds = %741
  %756 = load i32, ptr %15, align 4, !tbaa !9
  %757 = icmp ugt i32 %756, 0
  br i1 %757, label %774, label %758

758:                                              ; preds = %755, %741
  %759 = load i32, ptr %17, align 4, !tbaa !9
  %760 = load ptr, ptr %8, align 8, !tbaa !5
  %761 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %760, i32 0, i32 6
  %762 = load i32, ptr %761, align 4, !tbaa !11
  %763 = icmp eq i32 %762, 2301
  br i1 %763, label %769, label %764

764:                                              ; preds = %758
  %765 = load ptr, ptr %8, align 8, !tbaa !5
  %766 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %765, i32 0, i32 6
  %767 = load i32, ptr %766, align 4, !tbaa !11
  %768 = icmp eq i32 %767, 2302
  br label %769

769:                                              ; preds = %764, %758
  %770 = phi i1 [ true, %758 ], [ %768, %764 ]
  %771 = zext i1 %770 to i64
  %772 = select i1 %770, i32 4, i32 2
  %773 = icmp ugt i32 %759, %772
  br i1 %773, label %774, label %818

774:                                              ; preds = %769, %755
  %775 = load ptr, ptr %8, align 8, !tbaa !5
  %776 = load i32, ptr %34, align 4, !tbaa !9
  %777 = load i8, ptr %33, align 1, !tbaa !21
  %778 = sext i8 %777 to i32
  %779 = icmp eq i32 %778, 0
  br i1 %779, label %780, label %788

780:                                              ; preds = %774
  %781 = load i32, ptr %20, align 4, !tbaa !9
  %782 = mul i32 2, %781
  %783 = load i32, ptr %22, align 4, !tbaa !9
  %784 = add i32 %782, %783
  %785 = zext i32 %784 to i64
  %786 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %785
  %787 = load i32, ptr %786, align 4, !tbaa !9
  br label %791

788:                                              ; preds = %774
  %789 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  %790 = load i32, ptr %789, align 4, !tbaa !9
  br label %791

791:                                              ; preds = %788, %780
  %792 = phi i32 [ %787, %780 ], [ %790, %788 ]
  %793 = load i8, ptr %33, align 1, !tbaa !21
  %794 = sext i8 %793 to i32
  %795 = icmp eq i32 %794, 0
  br i1 %795, label %796, label %799

796:                                              ; preds = %791
  %797 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 1
  %798 = load i32, ptr %797, align 4, !tbaa !9
  br label %807

799:                                              ; preds = %791
  %800 = load i32, ptr %20, align 4, !tbaa !9
  %801 = mul i32 2, %800
  %802 = load i32, ptr %22, align 4, !tbaa !9
  %803 = add i32 %801, %802
  %804 = zext i32 %803 to i64
  %805 = getelementptr inbounds [6 x i32], ptr %29, i64 0, i64 %804
  %806 = load i32, ptr %805, align 4, !tbaa !9
  br label %807

807:                                              ; preds = %799, %796
  %808 = phi i32 [ %798, %796 ], [ %806, %799 ]
  %809 = load i32, ptr %20, align 4, !tbaa !9
  %810 = mul i32 8, %809
  %811 = load i32, ptr %21, align 4, !tbaa !9
  %812 = mul i32 2, %811
  %813 = add i32 %810, %812
  %814 = add i32 %813, 1
  %815 = zext i32 %814 to i64
  %816 = getelementptr inbounds [24 x i32], ptr %32, i64 0, i64 %815
  %817 = load i32, ptr %816, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %775, i32 noundef %776, i32 noundef %792, i32 noundef %808, i8 noundef zeroext 0, i32 noundef %817, i32 noundef 127, i32 noundef 0)
  br label %818

818:                                              ; preds = %807, %769
  br label %819

819:                                              ; preds = %818
  %820 = load i32, ptr %20, align 4, !tbaa !9
  %821 = add i32 %820, 1
  store i32 %821, ptr %20, align 4, !tbaa !9
  br label %704, !llvm.loop !30

822:                                              ; preds = %704
  br label %823

823:                                              ; preds = %822
  %824 = load i32, ptr %21, align 4, !tbaa !9
  %825 = add i32 %824, 1
  store i32 %825, ptr %21, align 4, !tbaa !9
  br label %592, !llvm.loop !31

826:                                              ; preds = %592
  %827 = load i32, ptr %12, align 4, !tbaa !9
  %828 = load ptr, ptr %11, align 8, !tbaa !5
  %829 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %828, i32 0, i32 3
  %830 = load i32, ptr %829, align 1, !tbaa !32
  %831 = icmp ne i32 %827, %830
  br i1 %831, label %832, label %851

832:                                              ; preds = %826
  %833 = load ptr, ptr %8, align 8, !tbaa !5
  %834 = load ptr, ptr %9, align 8, !tbaa !5
  %835 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %834, i32 0, i32 1
  %836 = load i32, ptr %835, align 4, !tbaa !29
  %837 = load ptr, ptr %9, align 8, !tbaa !5
  %838 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %837, i32 0, i32 22
  %839 = load i32, ptr %838, align 4, !tbaa !27
  %840 = load ptr, ptr %9, align 8, !tbaa !5
  %841 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %840, i32 0, i32 1
  %842 = load i32, ptr %841, align 4, !tbaa !29
  %843 = load ptr, ptr %11, align 8, !tbaa !5
  %844 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %843, i32 0, i32 3
  %845 = load i32, ptr %844, align 1, !tbaa !32
  %846 = zext i32 %845 to i64
  %847 = load i32, ptr %12, align 4, !tbaa !9
  %848 = zext i32 %847 to i64
  %849 = sub nsw i64 %846, %848
  %850 = mul nsw i64 %849, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %833, i32 noundef 4096, i32 noundef %836, i32 noundef %839, i32 noundef %842, i64 noundef %850)
  br label %851

851:                                              ; preds = %832, %826
  br label %852

852:                                              ; preds = %851
  %853 = load i32, ptr %22, align 4, !tbaa !9
  %854 = add i32 %853, 1
  store i32 %854, ptr %22, align 4, !tbaa !9
  br label %587, !llvm.loop !33

855:                                              ; preds = %587
  store i32 0, ptr %36, align 4
  br label %856

856:                                              ; preds = %855, %230
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %33) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  %857 = load i32, ptr %36, align 4
  switch i32 %857, label %859 [
    i32 0, label %858
    i32 1, label %858
  ]

858:                                              ; preds = %856, %856
  ret void

859:                                              ; preds = %856
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!14, !10, i64 24}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!14, !10, i64 16}
!18 = !{!19, !10, i64 12}
!19 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !20, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!20 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!21 = !{!7, !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!14, !10, i64 8}
!25 = !{!26, !10, i64 12}
!26 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!27 = !{!26, !10, i64 88}
!28 = distinct !{!28, !23}
!29 = !{!26, !10, i64 4}
!30 = distinct !{!30, !23}
!31 = distinct !{!31, !23}
!32 = !{!14, !10, i64 12}
!33 = distinct !{!33, !23}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [78 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_a = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__func__.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla = external hidden unnamed_addr constant [52 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

declare i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef) local_unnamed_addr #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_sve_mmla(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #2 {
  %8 = alloca [6 x i32], align 16
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = add i32 %10, -2301
  %spec.select = icmp ult i32 %11, 2
  %12 = getelementptr inbounds i8, ptr %3, i64 24
  %13 = load i32, ptr %12, align 1, !tbaa !11
  %14 = and i32 %13, 4098
  %15 = icmp eq i32 %14, 4098
  br i1 %15, label %22, label %16

16:                                               ; preds = %7
  %17 = getelementptr inbounds i8, ptr %3, i64 16
  %18 = load i32, ptr %17, align 1, !tbaa !15
  %19 = getelementptr inbounds i8, ptr %2, i64 12
  %20 = load i32, ptr %19, align 4, !tbaa !16
  %21 = mul i32 %20, %18
  br label %26

22:                                               ; preds = %7
  %23 = getelementptr inbounds i8, ptr %2, i64 12
  %24 = load i32, ptr %23, align 4, !tbaa !16
  %25 = shl i32 %24, 3
  br label %26

26:                                               ; preds = %22, %16
  %27 = phi i32 [ %21, %16 ], [ %25, %22 ]
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %8) #3
  %.sroa.018.0.copyload = load i32, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_zip, align 4
  %.sroa.11.0.copyload = load i32, ptr getelementptr inbounds (i8, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_zip, i64 4), align 4
  %.sroa.0.0.copyload = load i32, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_a, align 4
  %.sroa.8.0.copyload = load i32, ptr getelementptr inbounds (i8, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_a, i64 4), align 4
  store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, ptr %8, align 16, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %8, i64 16
  store i32 4, ptr %28, align 16, !tbaa !19
  %29 = getelementptr inbounds i8, ptr %8, i64 20
  store i32 5, ptr %29, align 4, !tbaa !19
  %.0276.v = select i1 %spec.select, i32 7, i32 3
  %.0276 = and i32 %.0276.v, %4
  %.0274.v = select i1 %spec.select, i32 3, i32 2
  %.0274 = lshr i32 %4, %.0274.v
  %.0275.in = icmp ne i32 %.0276, 0
  %.0275 = zext i1 %.0275.in to i32
  %30 = add i32 %5, 1
  %31 = lshr i32 %30, 1
  %32 = getelementptr inbounds i8, ptr %3, i64 29
  %33 = tail call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef nonnull %32) #3
  %34 = icmp eq i32 %33, 2
  br i1 %34, label %35, label %42

35:                                               ; preds = %26
  %36 = getelementptr inbounds i8, ptr %3, i64 8
  %37 = load i32, ptr %36, align 1, !tbaa !20
  %38 = and i32 %37, 7
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %68

40:                                               ; preds = %35
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %.off321 = add i32 %41, -2301
  %switch322 = icmp ult i32 %.off321, 2
  br i1 %switch322, label %61, label %68

42:                                               ; preds = %26
  %43 = tail call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef nonnull %32) #3
  %44 = icmp eq i32 %43, 12
  br i1 %44, label %45, label %56

45:                                               ; preds = %42
  %46 = load i32, ptr %12, align 1, !tbaa !11
  %47 = and i32 %46, 768
  switch i32 %47, label %48 [
    i32 768, label %49
    i32 512, label %.fold.split
  ]

48:                                               ; preds = %45
  %or.cond309 = icmp eq i32 %47, 256
  %spec.select323 = zext i1 %or.cond309 to i32
  %spec.select324 = select i1 %or.cond309, i32 1166055427, i32 1157666819
  br label %49

.fold.split:                                      ; preds = %45
  br label %49

49:                                               ; preds = %45, %.fold.split, %48
  %.0272 = phi i32 [ 0, %45 ], [ %spec.select323, %48 ], [ 0, %.fold.split ]
  %.0270 = phi i32 [ 1170249731, %45 ], [ %spec.select324, %48 ], [ 1166055427, %.fold.split ]
  %50 = getelementptr inbounds i8, ptr %3, i64 8
  %51 = load i32, ptr %50, align 1, !tbaa !20
  %52 = and i32 %51, 15
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %68

54:                                               ; preds = %49
  %55 = load i32, ptr %9, align 4, !tbaa !5
  %.off325 = add i32 %55, -2301
  %switch326 = icmp ult i32 %.off325, 2
  br i1 %switch326, label %61, label %68

56:                                               ; preds = %42
  %57 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !19
  %58 = icmp ugt i32 %57, 1
  %59 = load i32, ptr @libxsmm_verbosity, align 4
  %60 = select i1 %58, i32 %59, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90033, ptr noundef nonnull @__func__.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla, ptr noundef nonnull @.str, i32 noundef 1102, i32 noundef %60) #3
  br label %.loopexit

61:                                               ; preds = %40, %54
  %.1273.ph = phi i32 [ %.0272, %54 ], [ 0, %40 ]
  %.1271.ph = phi i32 [ %.0270, %54 ], [ 1684071427, %40 ]
  %62 = getelementptr inbounds i8, ptr %1, i64 12
  %63 = load i32, ptr %62, align 4, !tbaa !21
  br i1 %15, label %64, label %.sink.split

64:                                               ; preds = %61
  %65 = getelementptr inbounds i8, ptr %3, i64 16
  %66 = load i32, ptr %65, align 1, !tbaa !15
  %67 = shl i32 %66, 3
  br label %.sink.split

.sink.split:                                      ; preds = %61, %64
  %.sink = phi i32 [ %67, %64 ], [ 8, %61 ]
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef %63, i32 noundef 44, i32 noundef %.sink, i8 noundef zeroext 0) #3
  br label %68

68:                                               ; preds = %.sink.split, %49, %54, %35, %40
  %69 = phi i1 [ false, %40 ], [ false, %35 ], [ false, %54 ], [ false, %49 ], [ true, %.sink.split ]
  %.1271334 = phi i32 [ 1684071427, %40 ], [ 1684071427, %35 ], [ %.0270, %54 ], [ %.0270, %49 ], [ %.1271.ph, %.sink.split ]
  %.1273332 = phi i32 [ 0, %40 ], [ 0, %35 ], [ %.0272, %54 ], [ %.0272, %49 ], [ %.1273.ph, %.sink.split ]
  %.0277330 = phi i32 [ 1, %40 ], [ 1, %35 ], [ 1, %54 ], [ 1, %49 ], [ 2, %.sink.split ]
  %.not = icmp ult i32 %30, 2
  br i1 %.not, label %.preheader340, label %.lr.ph

.lr.ph:                                           ; preds = %68
  %70 = getelementptr inbounds i8, ptr %1, i64 12
  %71 = getelementptr inbounds i8, ptr %1, i64 88
  %72 = zext i32 %27 to i64
  %73 = and i32 %5, 1
  %.not298 = icmp ne i32 %73, 0
  %74 = add nsw i32 %31, -1
  %75 = and i32 %30, -2
  %76 = zext i32 %75 to i64
  %77 = add nsw i64 %76, -1
  %78 = mul i64 %77, %72
  %79 = shl nuw nsw i32 %.0277330, 3
  %80 = zext nneg i32 %79 to i64
  %81 = sub i64 %78, %80
  %82 = zext nneg i32 %31 to i64
  %83 = add nsw i64 %82, -1
  %84 = mul nuw nsw i64 %83, %72
  %85 = getelementptr inbounds i8, ptr %3, i64 16
  %86 = zext i32 %74 to i64
  br i1 %15, label %.lr.ph.split.us.preheader, label %.lr.ph.split

.lr.ph.split.us.preheader:                        ; preds = %.lr.ph
  %87 = shl nuw nsw i64 %86, 1
  %88 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %87
  %89 = shl nuw nsw i64 %86, 1
  %90 = or disjoint i64 %89, 1
  %91 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %90
  br label %.lr.ph.split.us

.lr.ph.split.us:                                  ; preds = %.lr.ph.split.us.preheader, %121
  %indvars.iv365 = phi i64 [ 0, %.lr.ph.split.us.preheader ], [ %indvars.iv.next366, %121 ]
  %92 = icmp eq i64 %indvars.iv365, %86
  %or.cond311.us = select i1 %.not298, i1 %92, i1 false
  %93 = load i32, ptr %70, align 4, !tbaa !21
  br i1 %or.cond311.us, label %98, label %94

94:                                               ; preds = %.lr.ph.split.us
  %95 = shl nuw i64 %indvars.iv365, 1
  %96 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %95
  %97 = load i32, ptr %96, align 8, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1518329722, i32 noundef %93, i32 noundef 0, i32 noundef 0, i32 noundef %97, i32 noundef 0) #3
  br label %100

98:                                               ; preds = %.lr.ph.split.us
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef %93, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.018.0.copyload, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %.sroa.11.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0, i32 noundef 2) #3
  %99 = load i32, ptr %88, align 8, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86007811, i32 noundef %.sroa.018.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %99, i32 noundef 127, i32 noundef 3) #3
  br label %100

100:                                              ; preds = %98, %94
  %indvars.iv.next366 = add nuw nsw i64 %indvars.iv365, 1
  %.not301.us = icmp eq i64 %indvars.iv.next366, %82
  %101 = load i32, ptr %70, align 4, !tbaa !21
  %102 = load i32, ptr %71, align 4, !tbaa !23
  br i1 %.not301.us, label %104, label %103

103:                                              ; preds = %100
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %101, i32 noundef %102, i32 noundef %101, i64 noundef %72) #3
  br label %109

104:                                              ; preds = %100
  %105 = load i32, ptr %85, align 1, !tbaa !15
  %106 = zext i32 %105 to i64
  %107 = mul nuw nsw i64 %106, %80
  %108 = sub nsw i64 %84, %107
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %101, i32 noundef %102, i32 noundef %101, i64 noundef %108) #3
  br label %109

109:                                              ; preds = %104, %103
  br i1 %69, label %110, label %121

110:                                              ; preds = %109
  br i1 %or.cond311.us, label %116, label %111

111:                                              ; preds = %110
  %112 = shl nuw i64 %indvars.iv365, 1
  %113 = or disjoint i64 %112, 1
  %114 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %113
  %115 = load i32, ptr %114, align 4, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1518329722, i32 noundef 44, i32 noundef 0, i32 noundef 0, i32 noundef %115, i32 noundef 0) #3
  br label %118

116:                                              ; preds = %110
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef 44, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.018.0.copyload, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %.sroa.11.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0, i32 noundef 2) #3
  %117 = load i32, ptr %91, align 4, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86007811, i32 noundef %.sroa.018.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %117, i32 noundef 127, i32 noundef 3) #3
  br label %118

118:                                              ; preds = %116, %111
  br i1 %.not301.us, label %121, label %119

119:                                              ; preds = %118
  %120 = load i32, ptr %71, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 44, i32 noundef %120, i32 noundef 44, i64 noundef %72) #3
  br label %121

121:                                              ; preds = %119, %118, %109
  %exitcond369.not = icmp eq i64 %indvars.iv.next366, %82
  br i1 %exitcond369.not, label %.preheader340, label %.lr.ph.split.us, !llvm.loop !24

.preheader340:                                    ; preds = %236, %121, %68
  %122 = add nuw nsw i32 %.0274, %.0275
  %.not357 = icmp eq i32 %122, 0
  %123 = add nsw i32 %.0274, -1
  %124 = icmp ne i32 %.0274, 0
  %125 = getelementptr inbounds i8, ptr %1, i64 4
  %126 = getelementptr inbounds i8, ptr %1, i64 88
  %127 = shl nuw nsw i32 %.0276, 3
  %128 = zext nneg i32 %127 to i64
  %129 = select i1 %spec.select, i64 64, i64 32
  %130 = and i32 %.1273332, 255
  %131 = icmp eq i32 %130, 0
  %132 = getelementptr inbounds i8, ptr %3, i64 12
  %133 = zext i32 %4 to i64
  br i1 %.not357, label %.preheader340.split, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %.preheader340
  %wide.trip.count384 = zext nneg i32 %.0277330 to i64
  %wide.trip.count373 = zext nneg i32 %31 to i64
  %wide.trip.count378 = zext nneg i32 %31 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %140
  %indvars.iv381 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next382, %140 ]
  br label %141

134:                                              ; preds = %._crit_edge348.us
  %135 = load i32, ptr %125, align 4, !tbaa !26
  %136 = load i32, ptr %126, align 4, !tbaa !23
  %137 = zext i32 %208 to i64
  %138 = sub nsw i64 %137, %133
  %139 = shl nsw i64 %138, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %135, i32 noundef %136, i32 noundef %135, i64 noundef %139) #3
  br label %140

140:                                              ; preds = %134, %._crit_edge348.us
  %indvars.iv.next382 = add nuw nsw i64 %indvars.iv381, 1
  %exitcond385.not = icmp eq i64 %indvars.iv.next382, %wide.trip.count384
  br i1 %exitcond385.not, label %.loopexit, label %.preheader.us, !llvm.loop !27

141:                                              ; preds = %.preheader.us, %._crit_edge.us
  %.0280346.us = phi i32 [ 0, %.preheader.us ], [ %165, %._crit_edge.us ]
  %142 = icmp ule i32 %.0280346.us, %123
  %or.cond.us = and i1 %124, %142
  br i1 %or.cond.us, label %159, label %143

143:                                              ; preds = %141
  %144 = load i32, ptr %9, align 4, !tbaa !5
  %145 = add i32 %144, -2301
  %spec.select318.us = icmp ult i32 %145, 2
  %146 = select i1 %spec.select318.us, i32 4, i32 2
  %.not297.us = icmp ult i32 %.0276, %146
  %147 = load i32, ptr %125, align 4, !tbaa !26
  br i1 %.not297.us, label %155, label %148

148:                                              ; preds = %143
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -1512005498, i32 noundef %147, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.0.0.copyload, i32 noundef 0) #3
  %149 = load i32, ptr %9, align 4, !tbaa !5
  %150 = add i32 %149, -2301
  %spec.select319.us = icmp ult i32 %150, 2
  %151 = select i1 %spec.select319.us, i32 4, i32 2
  %152 = icmp ugt i32 %.0276, %151
  br i1 %152, label %153, label %156

153:                                              ; preds = %148
  %154 = load i32, ptr %125, align 4, !tbaa !26
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -1512005498, i32 noundef %154, i32 noundef 0, i32 noundef 1, i32 noundef %.sroa.8.0.copyload, i32 noundef 3) #3
  br label %156

155:                                              ; preds = %143
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -1512005498, i32 noundef %147, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.0.0.copyload, i32 noundef 3) #3
  br label %156

156:                                              ; preds = %155, %153, %148
  %157 = load i32, ptr %125, align 4, !tbaa !26
  %158 = load i32, ptr %126, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4096, i32 noundef %157, i32 noundef %158, i32 noundef %157, i64 noundef %128) #3
  br label %164

159:                                              ; preds = %141
  %160 = load i32, ptr %125, align 4, !tbaa !26
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1512005498, i32 noundef %160, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.0.0.copyload, i32 noundef 0) #3
  %161 = load i32, ptr %125, align 4, !tbaa !26
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1512005498, i32 noundef %161, i32 noundef 0, i32 noundef 1, i32 noundef %.sroa.8.0.copyload, i32 noundef 0) #3
  %162 = load i32, ptr %125, align 4, !tbaa !26
  %163 = load i32, ptr %126, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %162, i32 noundef %163, i32 noundef %162, i64 noundef %129) #3
  br label %164

164:                                              ; preds = %159, %156
  br i1 %.not, label %._crit_edge.us, label %.lr.ph345.us

._crit_edge.us:                                   ; preds = %186, %207, %164
  %165 = add nuw nsw i32 %.0280346.us, 1
  %exitcond380.not = icmp eq i32 %165, %122
  br i1 %exitcond380.not, label %._crit_edge348.us, label %141, !llvm.loop !28

.lr.ph345.split.us353:                            ; preds = %.lr.ph345.us, %186
  %indvars.iv370 = phi i64 [ %indvars.iv.next371, %186 ], [ 0, %.lr.ph345.us ]
  %166 = shl nuw i64 %indvars.iv370, 1
  %167 = add nuw nsw i64 %166, %indvars.iv381
  %168 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %167
  %169 = load i32, ptr %168, align 4, !tbaa !19
  %170 = trunc nuw nsw i64 %indvars.iv370 to i32
  %171 = shl i32 %170, 3
  %172 = add i32 %171, %187
  %173 = zext i32 %172 to i64
  %174 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c, i64 0, i64 %173
  %175 = load i32, ptr %174, align 8, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef %.1271334, i32 noundef %.sroa.0.0.copyload, i32 noundef %169, i8 noundef zeroext 0, i32 noundef %175, i32 noundef 127, i32 noundef 0) #3
  br i1 %or.cond.us, label %181, label %176

176:                                              ; preds = %.lr.ph345.split.us353
  %177 = load i32, ptr %9, align 4, !tbaa !5
  %178 = add i32 %177, -2301
  %spec.select320.us351 = icmp ult i32 %178, 2
  %179 = select i1 %spec.select320.us351, i32 4, i32 2
  %180 = icmp ugt i32 %.0276, %179
  br i1 %180, label %181, label %186

181:                                              ; preds = %176, %.lr.ph345.split.us353
  %182 = or disjoint i32 %172, 1
  %183 = zext i32 %182 to i64
  %184 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c, i64 0, i64 %183
  %185 = load i32, ptr %184, align 4, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef %.1271334, i32 noundef %.sroa.8.0.copyload, i32 noundef %169, i8 noundef zeroext 0, i32 noundef %185, i32 noundef 127, i32 noundef 0) #3
  br label %186

186:                                              ; preds = %181, %176
  %indvars.iv.next371 = add nuw nsw i64 %indvars.iv370, 1
  %exitcond374.not = icmp eq i64 %indvars.iv.next371, %wide.trip.count373
  br i1 %exitcond374.not, label %._crit_edge.us, label %.lr.ph345.split.us353, !llvm.loop !29

.lr.ph345.us:                                     ; preds = %164
  %187 = shl nuw nsw i32 %.0280346.us, 1
  br i1 %131, label %.thread338.us.us, label %.lr.ph345.split.us353

.thread338.us.us:                                 ; preds = %.lr.ph345.us, %207
  %indvars.iv375 = phi i64 [ %indvars.iv.next376, %207 ], [ 0, %.lr.ph345.us ]
  %188 = shl nuw i64 %indvars.iv375, 1
  %189 = add nuw nsw i64 %188, %indvars.iv381
  %190 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %189
  %191 = load i32, ptr %190, align 4, !tbaa !19
  %192 = trunc nuw nsw i64 %indvars.iv375 to i32
  %193 = shl i32 %192, 3
  %194 = add i32 %193, %187
  %195 = zext i32 %194 to i64
  %196 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c, i64 0, i64 %195
  %197 = load i32, ptr %196, align 8, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef %.1271334, i32 noundef %191, i32 noundef %.sroa.0.0.copyload, i8 noundef zeroext 0, i32 noundef %197, i32 noundef 127, i32 noundef 0) #3
  br i1 %or.cond.us, label %.thread339.us.us, label %198

198:                                              ; preds = %.thread338.us.us
  %199 = load i32, ptr %9, align 4, !tbaa !5
  %200 = add i32 %199, -2301
  %spec.select320.us.us = icmp ult i32 %200, 2
  %201 = select i1 %spec.select320.us.us, i32 4, i32 2
  %202 = icmp ugt i32 %.0276, %201
  br i1 %202, label %.thread339.us.us, label %207

.thread339.us.us:                                 ; preds = %198, %.thread338.us.us
  %203 = or disjoint i32 %194, 1
  %204 = zext i32 %203 to i64
  %205 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_sve_mmla.l_vr_c, i64 0, i64 %204
  %206 = load i32, ptr %205, align 4, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef %.1271334, i32 noundef %191, i32 noundef %.sroa.8.0.copyload, i8 noundef zeroext 0, i32 noundef %206, i32 noundef 127, i32 noundef 0) #3
  br label %207

207:                                              ; preds = %.thread339.us.us, %198
  %indvars.iv.next376 = add nuw nsw i64 %indvars.iv375, 1
  %exitcond379.not = icmp eq i64 %indvars.iv.next376, %wide.trip.count378
  br i1 %exitcond379.not, label %._crit_edge.us, label %.thread338.us.us, !llvm.loop !29

._crit_edge348.us:                                ; preds = %._crit_edge.us
  %208 = load i32, ptr %132, align 1, !tbaa !30
  %.not296.us = icmp eq i32 %208, %4
  br i1 %.not296.us, label %140, label %134

.preheader340.split:                              ; preds = %.preheader340
  %209 = load i32, ptr %132, align 1, !tbaa !30
  %210 = icmp eq i32 %209, %4
  br i1 %210, label %.loopexit, label %.preheader

.lr.ph.split:                                     ; preds = %.lr.ph, %236
  %indvars.iv = phi i64 [ %indvars.iv.next, %236 ], [ 0, %.lr.ph ]
  %211 = load i32, ptr %70, align 4, !tbaa !21
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef %211, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.018.0.copyload, i32 noundef 0) #3
  %212 = load i32, ptr %70, align 4, !tbaa !21
  %213 = load i32, ptr %71, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %212, i32 noundef %213, i32 noundef %212, i64 noundef %72) #3
  %214 = icmp eq i64 %indvars.iv, %86
  %or.cond313 = select i1 %.not298, i1 %214, i1 false
  br i1 %or.cond313, label %215, label %216

215:                                              ; preds = %.lr.ph.split
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %.sroa.11.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0, i32 noundef 2) #3
  br label %218

216:                                              ; preds = %.lr.ph.split
  %217 = load i32, ptr %70, align 4, !tbaa !21
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef %217, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0) #3
  br label %218

218:                                              ; preds = %216, %215
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not299 = icmp eq i64 %indvars.iv.next, %82
  %219 = load i32, ptr %70, align 4, !tbaa !21
  %220 = load i32, ptr %71, align 4, !tbaa !23
  br i1 %.not299, label %222, label %221

221:                                              ; preds = %218
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %219, i32 noundef %220, i32 noundef %219, i64 noundef %72) #3
  br label %.thread336

222:                                              ; preds = %218
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %219, i32 noundef %220, i32 noundef %219, i64 noundef %81) #3
  br label %.thread336

.thread336:                                       ; preds = %221, %222
  %223 = shl nuw i64 %indvars.iv, 1
  %224 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %223
  %225 = load i32, ptr %224, align 8, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86007811, i32 noundef %.sroa.018.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %225, i32 noundef 127, i32 noundef 3) #3
  br i1 %69, label %.thread337, label %236

.thread337:                                       ; preds = %.thread336
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef 44, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.018.0.copyload, i32 noundef 0) #3
  %226 = load i32, ptr %71, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 44, i32 noundef %226, i32 noundef 44, i64 noundef %72) #3
  br i1 %or.cond313, label %227, label %228

227:                                              ; preds = %.thread337
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %.sroa.11.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0, i32 noundef 2) #3
  br label %229

228:                                              ; preds = %.thread337
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2050957178, i32 noundef 44, i32 noundef 0, i32 noundef 0, i32 noundef %.sroa.11.0.copyload, i32 noundef 0) #3
  br label %229

229:                                              ; preds = %228, %227
  br i1 %.not299, label %232, label %230

230:                                              ; preds = %229
  %231 = load i32, ptr %71, align 4, !tbaa !23
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 44, i32 noundef %231, i32 noundef 44, i64 noundef %72) #3
  br label %232

232:                                              ; preds = %230, %229
  %233 = or disjoint i64 %223, 1
  %234 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %233
  %235 = load i32, ptr %234, align 4, !tbaa !19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86007811, i32 noundef %.sroa.018.0.copyload, i32 noundef %.sroa.11.0.copyload, i8 noundef zeroext 0, i32 noundef %235, i32 noundef 127, i32 noundef 3) #3
  br label %236

236:                                              ; preds = %.thread336, %232
  %exitcond.not = icmp eq i64 %indvars.iv.next, %82
  br i1 %exitcond.not, label %.preheader340, label %.lr.ph.split, !llvm.loop !24

.preheader:                                       ; preds = %.preheader340.split, %244
  %.0281349 = phi i32 [ %245, %244 ], [ 0, %.preheader340.split ]
  %237 = load i32, ptr %132, align 1, !tbaa !30
  %.not296 = icmp eq i32 %237, %4
  br i1 %.not296, label %244, label %238

238:                                              ; preds = %.preheader
  %239 = load i32, ptr %125, align 4, !tbaa !26
  %240 = load i32, ptr %126, align 4, !tbaa !23
  %241 = zext i32 %237 to i64
  %242 = sub nsw i64 %241, %133
  %243 = shl nsw i64 %242, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %239, i32 noundef %240, i32 noundef %239, i64 noundef %243) #3
  br label %244

244:                                              ; preds = %.preheader, %238
  %245 = add nuw nsw i32 %.0281349, 1
  %exitcond386.not = icmp eq i32 %245, %.0277330
  br i1 %exitcond386.not, label %.loopexit, label %.preheader, !llvm.loop !31

.loopexit:                                        ; preds = %140, %244, %.preheader340.split, %56
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %8) #3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !13, i64 33, !13, i64 41, !8, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !8, i64 94}
!13 = !{!"long long", !8, i64 0}
!14 = !{!"short", !8, i64 0}
!15 = !{!12, !10, i64 16}
!16 = !{!17, !10, i64 12}
!17 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !8, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !10, i64 460, !8, i64 464, !18, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !7, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !7, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!18 = !{!"libxsmm_tile_config", !8, i64 0, !14, i64 2, !8, i64 4, !14, i64 6, !8, i64 8, !14, i64 10, !8, i64 12, !14, i64 14, !8, i64 16, !14, i64 18, !8, i64 20, !14, i64 22, !8, i64 24, !14, i64 26, !8, i64 28, !14, i64 30, !8, i64 32}
!19 = !{!10, !10, i64 0}
!20 = !{!12, !10, i64 8}
!21 = !{!22, !10, i64 12}
!22 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!23 = !{!22, !10, i64 88}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = !{!22, !10, i64 4}
!27 = distinct !{!27, !25}
!28 = distinct !{!28, !25}
!29 = distinct !{!29, !25}
!30 = !{!12, !10, i64 12}
!31 = distinct !{!31, !25, !32}
!32 = !{!"llvm.loop.unswitch.partial.disable"}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SLPVectorizerPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass