; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fDirectNchw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base29SynetConvolution32fDirectNchw28SetConvolutionBiasActivationEv(ptr noundef nonnull align 8 dereferenceable(512) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %7 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %6, i32 0, i32 1
  store ptr %7, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %8, i32 0, i32 15
  %10 = load i64, ptr %9, align 8, !tbaa !9
  switch i64 %10, label %74 [
    i64 1, label %11
    i64 2, label %42
    i64 3, label %63
  ]

11:                                               ; preds = %1
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %12, i32 0, i32 11
  %14 = load i64, ptr %13, align 8, !tbaa !15
  %15 = icmp eq i64 %14, 1
  br i1 %15, label %16, label %21

16:                                               ; preds = %11
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %17, i32 0, i32 21
  %19 = load i32, ptr %18, align 8, !tbaa !16
  %20 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi1ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %19)
  store ptr %20, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

21:                                               ; preds = %11
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %22, i32 0, i32 11
  %24 = load i64, ptr %23, align 8, !tbaa !15
  %25 = icmp eq i64 %24, 2
  br i1 %25, label %26, label %31

26:                                               ; preds = %21
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %27, i32 0, i32 21
  %29 = load i32, ptr %28, align 8, !tbaa !16
  %30 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %29)
  store ptr %30, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

31:                                               ; preds = %21
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %32, i32 0, i32 11
  %34 = load i64, ptr %33, align 8, !tbaa !15
  %35 = icmp eq i64 %34, 3
  br i1 %35, label %36, label %41

36:                                               ; preds = %31
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %37, i32 0, i32 21
  %39 = load i32, ptr %38, align 8, !tbaa !16
  %40 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %39)
  store ptr %40, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

41:                                               ; preds = %31
  br label %74

42:                                               ; preds = %1
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %43, i32 0, i32 11
  %45 = load i64, ptr %44, align 8, !tbaa !15
  %46 = icmp eq i64 %45, 2
  br i1 %46, label %47, label %52

47:                                               ; preds = %42
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %48, i32 0, i32 21
  %50 = load i32, ptr %49, align 8, !tbaa !16
  %51 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %50)
  store ptr %51, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

52:                                               ; preds = %42
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %53, i32 0, i32 11
  %55 = load i64, ptr %54, align 8, !tbaa !15
  %56 = icmp eq i64 %55, 3
  br i1 %56, label %57, label %62

57:                                               ; preds = %52
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %58, i32 0, i32 21
  %60 = load i32, ptr %59, align 8, !tbaa !16
  %61 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %60)
  store ptr %61, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

62:                                               ; preds = %52
  br label %74

63:                                               ; preds = %1
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %64, i32 0, i32 11
  %66 = load i64, ptr %65, align 8, !tbaa !15
  %67 = icmp eq i64 %66, 3
  br i1 %67, label %68, label %73

68:                                               ; preds = %63
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %69, i32 0, i32 21
  %71 = load i32, ptr %70, align 8, !tbaa !16
  %72 = call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi3EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %71)
  store ptr %72, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

73:                                               ; preds = %63
  br label %74

74:                                               ; preds = %73, %62, %41, %1
  store ptr null, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %75

75:                                               ; preds = %74, %68, %57, %47, %36, %26, %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %76 = load ptr, ptr %2, align 8
  ret ptr %76
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi1ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi3EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 104}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !13, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !14, i64 152}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!14 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!15 = !{!10, !11, i64 72}
!16 = !{!10, !14, i64 152}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef ptr @_ZN4Simd4Base29SynetConvolution32fDirectNchw28SetConvolutionBiasActivationEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(512) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 112
  %3 = load i64, ptr %2, align 8, !tbaa !5
  switch i64 %3, label %38 [
    i64 1, label %4
    i64 2, label %19
    i64 3, label %30
  ]

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 80
  %6 = load i64, ptr %5, align 8, !tbaa !13
  switch i64 %6, label %38 [
    i64 1, label %7
    i64 2, label %11
    i64 3, label %15
  ]

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 160
  %9 = load i32, ptr %8, align 8, !tbaa !14
  %10 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi1ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %9)
  br label %38

11:                                               ; preds = %4
  %12 = getelementptr inbounds i8, ptr %0, i64 160
  %13 = load i32, ptr %12, align 8, !tbaa !14
  %14 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %13)
  br label %38

15:                                               ; preds = %4
  %16 = getelementptr inbounds i8, ptr %0, i64 160
  %17 = load i32, ptr %16, align 8, !tbaa !14
  %18 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %17)
  br label %38

19:                                               ; preds = %1
  %20 = getelementptr inbounds i8, ptr %0, i64 80
  %21 = load i64, ptr %20, align 8, !tbaa !13
  switch i64 %21, label %38 [
    i64 2, label %22
    i64 3, label %26
  ]

22:                                               ; preds = %19
  %23 = getelementptr inbounds i8, ptr %0, i64 160
  %24 = load i32, ptr %23, align 8, !tbaa !14
  %25 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %24)
  br label %38

26:                                               ; preds = %19
  %27 = getelementptr inbounds i8, ptr %0, i64 160
  %28 = load i32, ptr %27, align 8, !tbaa !14
  %29 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %28)
  br label %38

30:                                               ; preds = %1
  %31 = getelementptr inbounds i8, ptr %0, i64 80
  %32 = load i64, ptr %31, align 8, !tbaa !13
  %33 = icmp eq i64 %32, 3
  br i1 %33, label %34, label %38

34:                                               ; preds = %30
  %35 = getelementptr inbounds i8, ptr %0, i64 160
  %36 = load i32, ptr %35, align 8, !tbaa !14
  %37 = tail call noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi3EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef %36)
  br label %38

38:                                               ; preds = %1, %30, %4, %19, %34, %26, %22, %15, %11, %7
  %.0 = phi ptr [ %37, %34 ], [ %25, %22 ], [ %29, %26 ], [ %10, %7 ], [ %14, %11 ], [ %18, %15 ], [ null, %19 ], [ null, %4 ], [ null, %30 ], [ null, %1 ]
  ret ptr %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi1ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi1EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi2ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi2EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd4Base28SetConvolutionBiasActivationILi3ELi3EEEPFvPKfmmmS3_S3_S3_PfmmmE29SimdConvolutionActivationType(i32 noundef) local_unnamed_addr #0

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 104}
!6 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !10, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !12, i64 152}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!11 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!12 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!13 = !{!6, !7, i64 72}
!14 = !{!6, !12, i64 152}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass