; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseDetection.ll (ZN4Simd4Base16DetectionPrepareEPv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Detection::HidBase" = type { %"struct.Simd::Deletable", i32, %"struct.Simd::Point", i8, i8, i8, i8, i32 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::Point" = type { i64, i64 }
%"struct.Simd::Detection::HidHaarCascade" = type { %"struct.Simd::Detection::HidBase", %"class.std::vector.41", %"class.std::vector.46", %"class.std::vector.51", %"class.std::vector.14", %"class.std::vector.56", float, float, [4 x ptr], [4 x ptr], %"struct.Simd::View", %"struct.Simd::View", %"struct.Simd::View", %"struct.Simd::View", %"struct.Simd::View" }
%"class.std::vector.41" = type { %"struct.std::_Vector_base.42" }
%"struct.std::_Vector_base.42" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarNode, std::allocator<Simd::Detection::HidHaarNode>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarNode, std::allocator<Simd::Detection::HidHaarNode>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarNode, std::allocator<Simd::Detection::HidHaarNode>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarNode, std::allocator<Simd::Detection::HidHaarNode>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.46" = type { %"struct.std::_Vector_base.47" }
%"struct.std::_Vector_base.47" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarCascade::Tree, std::allocator<Simd::Detection::HidHaarCascade::Tree>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarCascade::Tree, std::allocator<Simd::Detection::HidHaarCascade::Tree>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarCascade::Tree, std::allocator<Simd::Detection::HidHaarCascade::Tree>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarCascade::Tree, std::allocator<Simd::Detection::HidHaarCascade::Tree>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.51" = type { %"struct.std::_Vector_base.52" }
%"struct.std::_Vector_base.52" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarStage, std::allocator<Simd::Detection::HidHaarStage>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarStage, std::allocator<Simd::Detection::HidHaarStage>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarStage, std::allocator<Simd::Detection::HidHaarStage>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarStage, std::allocator<Simd::Detection::HidHaarStage>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.14" = type { %"struct.std::_Vector_base.15" }
%"struct.std::_Vector_base.15" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.56" = type { %"struct.std::_Vector_base.57" }
%"struct.std::_Vector_base.57" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarFeature, std::allocator<Simd::Detection::HidHaarFeature>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarFeature, std::allocator<Simd::Detection::HidHaarFeature>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidHaarFeature, std::allocator<Simd::Detection::HidHaarFeature>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidHaarFeature, std::allocator<Simd::Detection::HidHaarFeature>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::View" = type <{ i64, i64, i64, i32, [4 x i8], ptr, i8, [7 x i8] }>
%"struct.Simd::Detection::HidLbpCascade" = type { %"struct.Simd::Detection::HidBase", %"class.std::vector.62", %"class.std::vector.67", %"class.std::vector.72", %"class.std::vector.19", %"class.std::vector.19", %"class.std::vector.77", %"struct.Simd::View", %"struct.Simd::View" }
%"class.std::vector.62" = type { %"struct.std::_Vector_base.63" }
%"struct.std::_Vector_base.63" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Node, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Node, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Node, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Node, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.67" = type { %"struct.std::_Vector_base.68" }
%"struct.std::_Vector_base.68" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Tree, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Tree>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Tree, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Tree>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Tree, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Tree>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<int, short>::Tree, std::allocator<Simd::Detection::HidLbpCascade<int, short>::Tree>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.72" = type { %"struct.std::_Vector_base.73" }
%"struct.std::_Vector_base.73" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpStage<int>, std::allocator<Simd::Detection::HidLbpStage<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpStage<int>, std::allocator<Simd::Detection::HidLbpStage<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpStage<int>, std::allocator<Simd::Detection::HidLbpStage<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpStage<int>, std::allocator<Simd::Detection::HidLbpStage<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.19" = type { %"struct.std::_Vector_base.20" }
%"struct.std::_Vector_base.20" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.77" = type { %"struct.std::_Vector_base.78" }
%"struct.std::_Vector_base.78" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<short>, std::allocator<Simd::Detection::HidLbpFeature<short>>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<short>, std::allocator<Simd::Detection::HidLbpFeature<short>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<short>, std::allocator<Simd::Detection::HidLbpFeature<short>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<short>, std::allocator<Simd::Detection::HidLbpFeature<short>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Detection::HidLbpCascade.82" = type { %"struct.Simd::Detection::HidBase", %"class.std::vector.83", %"class.std::vector.88", %"class.std::vector.93", %"class.std::vector.14", %"class.std::vector.19", %"class.std::vector.98", %"struct.Simd::View", %"struct.Simd::View" }
%"class.std::vector.83" = type { %"struct.std::_Vector_base.84" }
%"struct.std::_Vector_base.84" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Node, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Node, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Node, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Node, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.88" = type { %"struct.std::_Vector_base.89" }
%"struct.std::_Vector_base.89" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Tree, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Tree>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Tree, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Tree>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Tree, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Tree>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpCascade<float, int>::Tree, std::allocator<Simd::Detection::HidLbpCascade<float, int>::Tree>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.93" = type { %"struct.std::_Vector_base.94" }
%"struct.std::_Vector_base.94" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpStage<float>, std::allocator<Simd::Detection::HidLbpStage<float>>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpStage<float>, std::allocator<Simd::Detection::HidLbpStage<float>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpStage<float>, std::allocator<Simd::Detection::HidLbpStage<float>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpStage<float>, std::allocator<Simd::Detection::HidLbpStage<float>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.98" = type { %"struct.std::_Vector_base.99" }
%"struct.std::_Vector_base.99" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<int>, std::allocator<Simd::Detection::HidLbpFeature<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<int>, std::allocator<Simd::Detection::HidLbpFeature<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<int>, std::allocator<Simd::Detection::HidLbpFeature<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Detection::HidLbpFeature<int>, std::allocator<Simd::Detection::HidLbpFeature<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41), ptr noundef nonnull align 8 dereferenceable(41)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base10Prepare16iERKNS_4ViewINS_9AllocatorEEEbRS3_(ptr noundef nonnull align 8 dereferenceable(41), i1 noundef zeroext, ptr noundef nonnull align 8 dereferenceable(41)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base16DetectionPrepareEPv(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %7, ptr %3, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %8, i32 0, i32 1
  %10 = load i32, ptr %9, align 8, !tbaa !9
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %33

12:                                               ; preds = %1
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %13, i32 0, i32 4
  %15 = load i8, ptr %14, align 1, !tbaa !17, !range !18, !noundef !19
  %16 = trunc i8 %15 to i1
  br i1 %16, label %17, label %33

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %18, ptr %4, align 8, !tbaa !5
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %"struct.Simd::Detection::HidHaarCascade", ptr %19, i32 0, i32 10
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %"struct.Simd::Detection::HidHaarCascade", ptr %21, i32 0, i32 13
  call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %20, ptr noundef nonnull align 8 dereferenceable(41) %22)
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %23, i32 0, i32 5
  %25 = load i8, ptr %24, align 2, !tbaa !20, !range !18, !noundef !19
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %32

27:                                               ; preds = %17
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %"struct.Simd::Detection::HidHaarCascade", ptr %28, i32 0, i32 12
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.Simd::Detection::HidHaarCascade", ptr %30, i32 0, i32 14
  call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %29, ptr noundef nonnull align 8 dereferenceable(41) %31)
  br label %32

32:                                               ; preds = %27, %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  br label %67

33:                                               ; preds = %12, %1
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %34, i32 0, i32 1
  %36 = load i32, ptr %35, align 8, !tbaa !9
  %37 = icmp eq i32 %36, 1
  br i1 %37, label %38, label %66

38:                                               ; preds = %33
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %39, i32 0, i32 6
  %41 = load i8, ptr %40, align 1, !tbaa !21, !range !18, !noundef !19
  %42 = trunc i8 %41 to i1
  br i1 %42, label %43, label %53

43:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %44, ptr %5, align 8, !tbaa !5
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %"struct.Simd::Detection::HidLbpCascade", ptr %45, i32 0, i32 7
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %47, i32 0, i32 4
  %49 = load i8, ptr %48, align 1, !tbaa !17, !range !18, !noundef !19
  %50 = trunc i8 %49 to i1
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %"struct.Simd::Detection::HidLbpCascade", ptr %51, i32 0, i32 8
  call void @_ZN4Simd4Base10Prepare16iERKNS_4ViewINS_9AllocatorEEEbRS3_(ptr noundef nonnull align 8 dereferenceable(41) %46, i1 noundef zeroext %50, ptr noundef nonnull align 8 dereferenceable(41) %52)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  br label %65

53:                                               ; preds = %38
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %"struct.Simd::Detection::HidBase", ptr %54, i32 0, i32 4
  %56 = load i8, ptr %55, align 1, !tbaa !17, !range !18, !noundef !19
  %57 = trunc i8 %56 to i1
  br i1 %57, label %58, label %64

58:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %59, ptr %6, align 8, !tbaa !5
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds %"struct.Simd::Detection::HidLbpCascade.82", ptr %60, i32 0, i32 7
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = getelementptr inbounds %"struct.Simd::Detection::HidLbpCascade.82", ptr %62, i32 0, i32 8
  call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %61, ptr noundef nonnull align 8 dereferenceable(41) %63)
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  br label %64

64:                                               ; preds = %58, %53
  br label %65

65:                                               ; preds = %64, %43
  br label %66

66:                                               ; preds = %65, %33
  br label %67

67:                                               ; preds = %66, %32
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTSN4Simd9Detection7HidBaseE", !11, i64 0, !12, i64 8, !13, i64 16, !15, i64 32, !15, i64 33, !15, i64 34, !15, i64 35, !16, i64 36}
!11 = !{!"_ZTSN4Simd9DeletableE"}
!12 = !{!"_ZTS22SimdDetectionInfoFlags", !7, i64 0}
!13 = !{!"_ZTSN4Simd5PointIlEE", !14, i64 0, !14, i64 8}
!14 = !{!"long", !7, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!10, !15, i64 33}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!10, !15, i64 34}
!21 = !{!10, !15, i64 35}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41), ptr noundef nonnull align 8 dereferenceable(41)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base10Prepare16iERKNS_4ViewINS_9AllocatorEEEbRS3_(ptr noundef nonnull align 8 dereferenceable(41), i1 noundef zeroext, ptr noundef nonnull align 8 dereferenceable(41)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base16DetectionPrepareEPv(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = load i32, ptr %2, align 8, !tbaa !5
  switch i32 %3, label %.thread [
    i32 0, label %4
    i32 1, label %17
  ]

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 33
  %6 = load i8, ptr %5, align 1, !tbaa !15, !range !16, !noundef !17
  %7 = trunc nuw i8 %6 to i1
  br i1 %7, label %8, label %.thread

8:                                                ; preds = %4
  %9 = getelementptr inbounds i8, ptr %0, i64 232
  %10 = getelementptr inbounds i8, ptr %0, i64 376
  tail call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %9, ptr noundef nonnull align 8 dereferenceable(41) %10)
  %11 = getelementptr inbounds i8, ptr %0, i64 34
  %12 = load i8, ptr %11, align 2, !tbaa !18, !range !16, !noundef !17
  %13 = trunc nuw i8 %12 to i1
  br i1 %13, label %14, label %.thread

14:                                               ; preds = %8
  %15 = getelementptr inbounds i8, ptr %0, i64 328
  %16 = getelementptr inbounds i8, ptr %0, i64 424
  tail call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %15, ptr noundef nonnull align 8 dereferenceable(41) %16)
  br label %.thread

17:                                               ; preds = %1
  %18 = getelementptr inbounds i8, ptr %0, i64 35
  %19 = load i8, ptr %18, align 1, !tbaa !19, !range !16, !noundef !17
  %20 = trunc nuw i8 %19 to i1
  br i1 %20, label %21, label %27

21:                                               ; preds = %17
  %22 = getelementptr inbounds i8, ptr %0, i64 184
  %23 = getelementptr inbounds i8, ptr %0, i64 33
  %24 = load i8, ptr %23, align 1, !tbaa !15, !range !16, !noundef !17
  %25 = trunc nuw i8 %24 to i1
  %26 = getelementptr inbounds i8, ptr %0, i64 232
  tail call void @_ZN4Simd4Base10Prepare16iERKNS_4ViewINS_9AllocatorEEEbRS3_(ptr noundef nonnull align 8 dereferenceable(41) %22, i1 noundef zeroext %25, ptr noundef nonnull align 8 dereferenceable(41) %26)
  br label %.thread

27:                                               ; preds = %17
  %28 = getelementptr inbounds i8, ptr %0, i64 33
  %29 = load i8, ptr %28, align 1, !tbaa !15, !range !16, !noundef !17
  %30 = trunc nuw i8 %29 to i1
  br i1 %30, label %31, label %.thread

31:                                               ; preds = %27
  %32 = getelementptr inbounds i8, ptr %0, i64 184
  %33 = getelementptr inbounds i8, ptr %0, i64 232
  tail call void @_ZN4Simd4Base23PrepareThroughColumn32iERKNS_4ViewINS_9AllocatorEEERS3_(ptr noundef nonnull align 8 dereferenceable(41) %32, ptr noundef nonnull align 8 dereferenceable(41) %33)
  br label %.thread

.thread:                                          ; preds = %1, %4, %8, %14, %27, %31, %21
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN4Simd9Detection7HidBaseE", !7, i64 0, !8, i64 8, !11, i64 16, !13, i64 32, !13, i64 33, !13, i64 34, !13, i64 35, !14, i64 36}
!7 = !{!"_ZTSN4Simd9DeletableE"}
!8 = !{!"_ZTS22SimdDetectionInfoFlags", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSN4Simd5PointIlEE", !12, i64 0, !12, i64 8}
!12 = !{!"long", !9, i64 0}
!13 = !{!"bool", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!6, !13, i64 33}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!6, !13, i64 34}
!19 = !{!6, !13, i64 35}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass