; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_sse_preppedstack(ptr noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_avx2_preppedstack(ptr noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf16_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #1 {
  %10 = alloca ptr, align 8
  %11 = alloca i8, align 1
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store i8 %1, ptr %11, align 1, !tbaa !9
  store i32 %2, ptr %12, align 4, !tbaa !10
  store i32 %3, ptr %13, align 4, !tbaa !10
  store i32 %4, ptr %14, align 4, !tbaa !10
  store i32 %5, ptr %15, align 4, !tbaa !10
  store i32 %6, ptr %16, align 4, !tbaa !10
  store i32 %7, ptr %17, align 4, !tbaa !10
  store i32 %8, ptr %18, align 4, !tbaa !10
  %19 = load i32, ptr %17, align 4, !tbaa !10
  %20 = load ptr, ptr %10, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %20, i32 0, i32 6
  %22 = load i32, ptr %21, align 4, !tbaa !12
  %23 = icmp ult i32 %22, 1005
  br i1 %23, label %24, label %32

24:                                               ; preds = %9
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = load i8, ptr %11, align 1, !tbaa !9
  %27 = load i32, ptr %12, align 4, !tbaa !10
  %28 = load i32, ptr %13, align 4, !tbaa !10
  %29 = load i32, ptr %14, align 4, !tbaa !10
  %30 = load i32, ptr %15, align 4, !tbaa !10
  %31 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_generator_vcvtneps2bf16_sse_preppedstack(ptr noundef %25, i8 noundef signext %26, i32 noundef %27, i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31)
  br label %95

32:                                               ; preds = %9
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %33, i32 0, i32 6
  %35 = load i32, ptr %34, align 4, !tbaa !12
  %36 = icmp uge i32 %35, 1006
  br i1 %36, label %37, label %50

37:                                               ; preds = %32
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %38, i32 0, i32 6
  %40 = load i32, ptr %39, align 4, !tbaa !12
  %41 = icmp ult i32 %40, 1051
  br i1 %41, label %42, label %50

42:                                               ; preds = %37
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = load i8, ptr %11, align 1, !tbaa !9
  %45 = load i32, ptr %12, align 4, !tbaa !10
  %46 = load i32, ptr %13, align 4, !tbaa !10
  %47 = load i32, ptr %14, align 4, !tbaa !10
  %48 = load i32, ptr %15, align 4, !tbaa !10
  %49 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_generator_vcvtneps2bf16_avx2_preppedstack(ptr noundef %43, i8 noundef signext %44, i32 noundef %45, i32 noundef %46, i32 noundef %47, i32 noundef %48, i32 noundef %49)
  br label %94

50:                                               ; preds = %37, %32
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  %52 = load i8, ptr %11, align 1, !tbaa !9
  %53 = load i32, ptr %12, align 4, !tbaa !10
  %54 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %51, i32 noundef 805639899, i8 noundef signext %52, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %53, i32 noundef %54)
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = load i8, ptr %11, align 1, !tbaa !9
  %57 = load i32, ptr %14, align 4, !tbaa !10
  %58 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg_imm8(ptr noundef %55, i32 noundef -267569633, i8 noundef signext %56, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %57, i32 noundef %58, i32 noundef 4)
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = load i8, ptr %11, align 1, !tbaa !9
  %61 = load i32, ptr %12, align 4, !tbaa !10
  %62 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %59, i32 noundef 609031794, i8 noundef signext %60, i32 noundef %61, i32 noundef %62, i32 noundef 16)
  %63 = load ptr, ptr %10, align 8, !tbaa !5
  %64 = load i8, ptr %11, align 1, !tbaa !9
  %65 = load i32, ptr %15, align 4, !tbaa !10
  %66 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %63, i32 noundef 805639899, i8 noundef signext %64, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef %65, i32 noundef %66)
  %67 = load ptr, ptr %10, align 8, !tbaa !5
  %68 = load i8, ptr %11, align 1, !tbaa !9
  %69 = load i32, ptr %15, align 4, !tbaa !10
  %70 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %67, i32 noundef 805639934, i8 noundef signext %68, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 8, i32 noundef 1, i32 noundef %69, i32 noundef %70)
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = load i8, ptr %11, align 1, !tbaa !9
  %73 = load i32, ptr %12, align 4, !tbaa !10
  %74 = load i32, ptr %15, align 4, !tbaa !10
  %75 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %71, i32 noundef 805639934, i8 noundef signext %72, i32 noundef %73, i32 noundef %74, i32 noundef %75)
  %76 = load ptr, ptr %10, align 8, !tbaa !5
  %77 = load i8, ptr %11, align 1, !tbaa !9
  %78 = load i32, ptr %14, align 4, !tbaa !10
  %79 = load i32, ptr %12, align 4, !tbaa !10
  %80 = load i32, ptr %13, align 4, !tbaa !10
  %81 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef %76, i32 noundef -268097948, i8 noundef signext %77, i32 noundef %78, i32 noundef %79, i32 noundef %80, i32 noundef %81, i32 noundef 0)
  %82 = load i32, ptr %18, align 4, !tbaa !10
  %83 = icmp eq i32 %82, 0
  br i1 %83, label %84, label %93

84:                                               ; preds = %50
  %85 = load ptr, ptr %10, align 8, !tbaa !5
  %86 = load i8, ptr %11, align 1, !tbaa !9
  %87 = load i32, ptr %13, align 4, !tbaa !10
  %88 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %85, i32 noundef 609031794, i8 noundef signext %86, i32 noundef %87, i32 noundef %88, i32 noundef 16)
  %89 = load ptr, ptr %10, align 8, !tbaa !5
  %90 = load i8, ptr %11, align 1, !tbaa !9
  %91 = load i32, ptr %13, align 4, !tbaa !10
  %92 = load i32, ptr %13, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %89, i32 noundef 671491379, i8 noundef signext %90, i32 noundef %91, i32 noundef %92)
  br label %93

93:                                               ; preds = %84, %50
  br label %94

94:                                               ; preds = %93, %42
  br label %95

95:                                               ; preds = %94, %24
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_sse_preppedstack(ptr noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_avx2_preppedstack(ptr noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf16_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #1 {
  %10 = getelementptr inbounds i8, ptr %0, i64 28
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp ult i32 %11, 1005
  br i1 %12, label %13, label %14

13:                                               ; preds = %9
  tail call void @libxsmm_generator_vcvtneps2bf16_sse_preppedstack(ptr noundef nonnull %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %8)
  br label %20

14:                                               ; preds = %9
  %.not = icmp ne i32 %11, 1005
  %15 = icmp ult i32 %11, 1051
  %or.cond = and i1 %.not, %15
  br i1 %or.cond, label %16, label %17

16:                                               ; preds = %14
  tail call void @libxsmm_generator_vcvtneps2bf16_avx2_preppedstack(ptr noundef nonnull %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %8)
  br label %20

17:                                               ; preds = %14
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %2, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg_imm8(ptr noundef nonnull %0, i32 noundef -267569633, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %4, i32 noundef %6, i32 noundef 4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 609031794, i8 noundef signext %1, i32 noundef %2, i32 noundef %5, i32 noundef 16) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639899, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef %5, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639934, i8 noundef signext %1, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 8, i32 noundef 1, i32 noundef %5, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639934, i8 noundef signext %1, i32 noundef %2, i32 noundef %5, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef nonnull %0, i32 noundef -268097948, i8 noundef signext %1, i32 noundef %4, i32 noundef %2, i32 noundef %3, i32 noundef %6, i32 noundef 0) #2
  %18 = icmp eq i32 %8, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %17
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 609031794, i8 noundef signext %1, i32 noundef %3, i32 noundef %3, i32 noundef 16) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 671491379, i8 noundef signext %1, i32 noundef %3, i32 noundef %3) #2
  br label %20

20:                                               ; preds = %16, %19, %17, %13
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass