; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetActivation.ll (ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr noundef %0, i64 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = load float, ptr %15, align 4, !tbaa !11
  store float %16, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = load float, ptr %17, align 4, !tbaa !11
  store float %18, ptr %12, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %19 = load i64, ptr %7, align 8, !tbaa !9
  %20 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %19, i64 noundef 4)
  store i64 %20, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !9
  br label %21

21:                                               ; preds = %74, %5
  %22 = load i64, ptr %14, align 8, !tbaa !9
  %23 = load i64, ptr %13, align 8, !tbaa !9
  %24 = icmp ult i64 %22, %23
  br i1 %24, label %25, label %77

25:                                               ; preds = %21
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load i64, ptr %14, align 8, !tbaa !9
  %28 = add i64 %27, 0
  %29 = getelementptr inbounds float, ptr %26, i64 %28
  %30 = load float, ptr %29, align 4, !tbaa !11
  %31 = load float, ptr %11, align 4, !tbaa !11
  %32 = load float, ptr %12, align 4, !tbaa !11
  %33 = call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %30, float noundef %31, float noundef %32)
  %34 = load ptr, ptr %10, align 8, !tbaa !5
  %35 = load i64, ptr %14, align 8, !tbaa !9
  %36 = add i64 %35, 0
  %37 = getelementptr inbounds float, ptr %34, i64 %36
  store float %33, ptr %37, align 4, !tbaa !11
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i64, ptr %14, align 8, !tbaa !9
  %40 = add i64 %39, 1
  %41 = getelementptr inbounds float, ptr %38, i64 %40
  %42 = load float, ptr %41, align 4, !tbaa !11
  %43 = load float, ptr %11, align 4, !tbaa !11
  %44 = load float, ptr %12, align 4, !tbaa !11
  %45 = call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %42, float noundef %43, float noundef %44)
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = load i64, ptr %14, align 8, !tbaa !9
  %48 = add i64 %47, 1
  %49 = getelementptr inbounds float, ptr %46, i64 %48
  store float %45, ptr %49, align 4, !tbaa !11
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = load i64, ptr %14, align 8, !tbaa !9
  %52 = add i64 %51, 2
  %53 = getelementptr inbounds float, ptr %50, i64 %52
  %54 = load float, ptr %53, align 4, !tbaa !11
  %55 = load float, ptr %11, align 4, !tbaa !11
  %56 = load float, ptr %12, align 4, !tbaa !11
  %57 = call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %54, float noundef %55, float noundef %56)
  %58 = load ptr, ptr %10, align 8, !tbaa !5
  %59 = load i64, ptr %14, align 8, !tbaa !9
  %60 = add i64 %59, 2
  %61 = getelementptr inbounds float, ptr %58, i64 %60
  store float %57, ptr %61, align 4, !tbaa !11
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = load i64, ptr %14, align 8, !tbaa !9
  %64 = add i64 %63, 3
  %65 = getelementptr inbounds float, ptr %62, i64 %64
  %66 = load float, ptr %65, align 4, !tbaa !11
  %67 = load float, ptr %11, align 4, !tbaa !11
  %68 = load float, ptr %12, align 4, !tbaa !11
  %69 = call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %66, float noundef %67, float noundef %68)
  %70 = load ptr, ptr %10, align 8, !tbaa !5
  %71 = load i64, ptr %14, align 8, !tbaa !9
  %72 = add i64 %71, 3
  %73 = getelementptr inbounds float, ptr %70, i64 %72
  store float %69, ptr %73, align 4, !tbaa !11
  br label %74

74:                                               ; preds = %25
  %75 = load i64, ptr %14, align 8, !tbaa !9
  %76 = add i64 %75, 4
  store i64 %76, ptr %14, align 8, !tbaa !9
  br label %21, !llvm.loop !13

77:                                               ; preds = %21
  br label %78

78:                                               ; preds = %93, %77
  %79 = load i64, ptr %14, align 8, !tbaa !9
  %80 = load i64, ptr %7, align 8, !tbaa !9
  %81 = icmp ult i64 %79, %80
  br i1 %81, label %82, label %96

82:                                               ; preds = %78
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = load i64, ptr %14, align 8, !tbaa !9
  %85 = getelementptr inbounds float, ptr %83, i64 %84
  %86 = load float, ptr %85, align 4, !tbaa !11
  %87 = load float, ptr %11, align 4, !tbaa !11
  %88 = load float, ptr %12, align 4, !tbaa !11
  %89 = call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %86, float noundef %87, float noundef %88)
  %90 = load ptr, ptr %10, align 8, !tbaa !5
  %91 = load i64, ptr %14, align 8, !tbaa !9
  %92 = getelementptr inbounds float, ptr %90, i64 %91
  store float %89, ptr %92, align 4, !tbaa !11
  br label %93

93:                                               ; preds = %82
  %94 = load i64, ptr %14, align 8, !tbaa !9
  %95 = add i64 %94, 1
  store i64 %95, ptr %14, align 8, !tbaa !9
  br label %78, !llvm.loop !15

96:                                               ; preds = %78
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef, float noundef, float noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #1 {
  %6 = load float, ptr %2, align 4, !tbaa !5
  %7 = load float, ptr %3, align 4, !tbaa !5
  %8 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 4)
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %5
  %.0.lcssa = phi i64 [ 0, %5 ], [ %29, %.lr.ph ]
  %9 = icmp ult i64 %.0.lcssa, %1
  br i1 %9, label %.lr.ph40, label %._crit_edge

.lr.ph:                                           ; preds = %5, %.lr.ph
  %.038 = phi i64 [ %29, %.lr.ph ], [ 0, %5 ]
  %10 = getelementptr inbounds float, ptr %0, i64 %.038
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %11, float noundef %6, float noundef %7)
  %13 = getelementptr inbounds float, ptr %4, i64 %.038
  store float %12, ptr %13, align 4, !tbaa !5
  %14 = or disjoint i64 %.038, 1
  %15 = getelementptr inbounds float, ptr %0, i64 %14
  %16 = load float, ptr %15, align 4, !tbaa !5
  %17 = tail call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %16, float noundef %6, float noundef %7)
  %18 = getelementptr inbounds float, ptr %4, i64 %14
  store float %17, ptr %18, align 4, !tbaa !5
  %19 = or disjoint i64 %.038, 2
  %20 = getelementptr inbounds float, ptr %0, i64 %19
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = tail call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %21, float noundef %6, float noundef %7)
  %23 = getelementptr inbounds float, ptr %4, i64 %19
  store float %22, ptr %23, align 4, !tbaa !5
  %24 = or disjoint i64 %.038, 3
  %25 = getelementptr inbounds float, ptr %0, i64 %24
  %26 = load float, ptr %25, align 4, !tbaa !5
  %27 = tail call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %26, float noundef %6, float noundef %7)
  %28 = getelementptr inbounds float, ptr %4, i64 %24
  store float %27, ptr %28, align 4, !tbaa !5
  %29 = add i64 %.038, 4
  %30 = icmp ult i64 %29, %8
  br i1 %30, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph40:                                         ; preds = %.preheader, %.lr.ph40
  %.139 = phi i64 [ %35, %.lr.ph40 ], [ %.0.lcssa, %.preheader ]
  %31 = getelementptr inbounds float, ptr %0, i64 %.139
  %32 = load float, ptr %31, align 4, !tbaa !5
  %33 = tail call noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef %32, float noundef %6, float noundef %7)
  %34 = getelementptr inbounds float, ptr %4, i64 %.139
  store float %33, ptr %34, align 4, !tbaa !5
  %35 = add i64 %.139, 1
  %exitcond.not = icmp eq i64 %35, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph40, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph40, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd13RestrictRangeIfEET_S1_S1_S1_(float noundef, float noundef, float noundef) local_unnamed_addr #0

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass