; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseDescrInt.ll (ZN4Simd4Base11CorrelationILi5EEEiPKhS3_m)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [78 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base11CorrelationILi4EEEiPKhS3_m = external hidden unnamed_addr constant [74 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN4Simd4Base11CorrelationILi5EEEiPKhS3_m(ptr noundef %0, ptr noundef %1, i64 noundef %2) #3 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  %13 = load i64, ptr %6, align 8, !tbaa !9
  %14 = urem i64 %13, 8
  %15 = icmp eq i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %3
  br label %19

17:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 466, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base11CorrelationILi4EEEiPKhS3_m) #4
  unreachable

18:                                               ; No predecessors!
  br label %19

19:                                               ; preds = %18, %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %20

20:                                               ; preds = %114, %19
  %21 = load i64, ptr %8, align 8, !tbaa !9
  %22 = load i64, ptr %6, align 8, !tbaa !9
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %117

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i64 0
  %28 = load i32, ptr %27, align 4, !tbaa !11
  store i32 %28, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds i8, ptr %29, i64 0
  %31 = load i32, ptr %30, align 4, !tbaa !11
  store i32 %31, ptr %10, align 4, !tbaa !11
  %32 = load i32, ptr %9, align 4, !tbaa !11
  %33 = lshr i32 %32, 0
  %34 = and i32 %33, 31
  %35 = load i32, ptr %10, align 4, !tbaa !11
  %36 = lshr i32 %35, 0
  %37 = and i32 %36, 31
  %38 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %34, i32 noundef %37)
  %39 = load i32, ptr %7, align 4, !tbaa !11
  %40 = add nsw i32 %39, %38
  store i32 %40, ptr %7, align 4, !tbaa !11
  %41 = load i32, ptr %9, align 4, !tbaa !11
  %42 = lshr i32 %41, 5
  %43 = and i32 %42, 31
  %44 = load i32, ptr %10, align 4, !tbaa !11
  %45 = lshr i32 %44, 5
  %46 = and i32 %45, 31
  %47 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %43, i32 noundef %46)
  %48 = load i32, ptr %7, align 4, !tbaa !11
  %49 = add nsw i32 %48, %47
  store i32 %49, ptr %7, align 4, !tbaa !11
  %50 = load i32, ptr %9, align 4, !tbaa !11
  %51 = lshr i32 %50, 10
  %52 = and i32 %51, 31
  %53 = load i32, ptr %10, align 4, !tbaa !11
  %54 = lshr i32 %53, 10
  %55 = and i32 %54, 31
  %56 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %52, i32 noundef %55)
  %57 = load i32, ptr %7, align 4, !tbaa !11
  %58 = add nsw i32 %57, %56
  store i32 %58, ptr %7, align 4, !tbaa !11
  %59 = load i32, ptr %9, align 4, !tbaa !11
  %60 = lshr i32 %59, 15
  %61 = and i32 %60, 31
  %62 = load i32, ptr %10, align 4, !tbaa !11
  %63 = lshr i32 %62, 15
  %64 = and i32 %63, 31
  %65 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %61, i32 noundef %64)
  %66 = load i32, ptr %7, align 4, !tbaa !11
  %67 = add nsw i32 %66, %65
  store i32 %67, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds i8, ptr %68, i64 1
  %70 = load i32, ptr %69, align 4, !tbaa !11
  store i32 %70, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 1
  %73 = load i32, ptr %72, align 4, !tbaa !11
  store i32 %73, ptr %12, align 4, !tbaa !11
  %74 = load i32, ptr %11, align 4, !tbaa !11
  %75 = lshr i32 %74, 12
  %76 = and i32 %75, 31
  %77 = load i32, ptr %12, align 4, !tbaa !11
  %78 = lshr i32 %77, 12
  %79 = and i32 %78, 31
  %80 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %76, i32 noundef %79)
  %81 = load i32, ptr %7, align 4, !tbaa !11
  %82 = add nsw i32 %81, %80
  store i32 %82, ptr %7, align 4, !tbaa !11
  %83 = load i32, ptr %11, align 4, !tbaa !11
  %84 = lshr i32 %83, 17
  %85 = and i32 %84, 31
  %86 = load i32, ptr %12, align 4, !tbaa !11
  %87 = lshr i32 %86, 17
  %88 = and i32 %87, 31
  %89 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %85, i32 noundef %88)
  %90 = load i32, ptr %7, align 4, !tbaa !11
  %91 = add nsw i32 %90, %89
  store i32 %91, ptr %7, align 4, !tbaa !11
  %92 = load i32, ptr %11, align 4, !tbaa !11
  %93 = lshr i32 %92, 22
  %94 = and i32 %93, 31
  %95 = load i32, ptr %12, align 4, !tbaa !11
  %96 = lshr i32 %95, 22
  %97 = and i32 %96, 31
  %98 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %94, i32 noundef %97)
  %99 = load i32, ptr %7, align 4, !tbaa !11
  %100 = add nsw i32 %99, %98
  store i32 %100, ptr %7, align 4, !tbaa !11
  %101 = load i32, ptr %11, align 4, !tbaa !11
  %102 = lshr i32 %101, 27
  %103 = and i32 %102, 31
  %104 = load i32, ptr %12, align 4, !tbaa !11
  %105 = lshr i32 %104, 27
  %106 = and i32 %105, 31
  %107 = call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %103, i32 noundef %106)
  %108 = load i32, ptr %7, align 4, !tbaa !11
  %109 = add nsw i32 %108, %107
  store i32 %109, ptr %7, align 4, !tbaa !11
  %110 = load ptr, ptr %4, align 8, !tbaa !5
  %111 = getelementptr inbounds i8, ptr %110, i64 5
  store ptr %111, ptr %4, align 8, !tbaa !5
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds i8, ptr %112, i64 5
  store ptr %113, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %114

114:                                              ; preds = %25
  %115 = load i64, ptr %8, align 8, !tbaa !9
  %116 = add i64 %115, 8
  store i64 %116, ptr %8, align 8, !tbaa !9
  br label %20, !llvm.loop !13

117:                                              ; preds = %24
  %118 = load i32, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  ret i32 %118
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [78 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base11CorrelationILi4EEEiPKhS3_m = external hidden unnamed_addr constant [74 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN4Simd4Base11CorrelationILi5EEEiPKhS3_m(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #2 {
  %4 = and i64 %2, 7
  %5 = icmp eq i64 %4, 0
  br i1 %5, label %.preheader, label %6

.preheader:                                       ; preds = %3
  %.not = icmp eq i64 %2, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

6:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 466, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base11CorrelationILi4EEEiPKhS3_m) #3
  unreachable

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %.035.lcssa = phi i32 [ 0, %.preheader ], [ %56, %.lr.ph ]
  ret i32 %.035.lcssa

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.040 = phi ptr [ %57, %.lr.ph ], [ %0, %.preheader ]
  %.03439 = phi ptr [ %58, %.lr.ph ], [ %1, %.preheader ]
  %.03538 = phi i32 [ %56, %.lr.ph ], [ 0, %.preheader ]
  %.03637 = phi i64 [ %59, %.lr.ph ], [ 0, %.preheader ]
  %7 = load i32, ptr %.040, align 4, !tbaa !5
  %8 = load i32, ptr %.03439, align 4, !tbaa !5
  %9 = and i32 %7, 31
  %10 = and i32 %8, 31
  %11 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %9, i32 noundef %10)
  %12 = add nsw i32 %11, %.03538
  %13 = lshr i32 %7, 5
  %14 = and i32 %13, 31
  %15 = lshr i32 %8, 5
  %16 = and i32 %15, 31
  %17 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %14, i32 noundef %16)
  %18 = add nsw i32 %12, %17
  %19 = lshr i32 %7, 10
  %20 = and i32 %19, 31
  %21 = lshr i32 %8, 10
  %22 = and i32 %21, 31
  %23 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %20, i32 noundef %22)
  %24 = add nsw i32 %18, %23
  %25 = lshr i32 %7, 15
  %26 = and i32 %25, 31
  %27 = lshr i32 %8, 15
  %28 = and i32 %27, 31
  %29 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %26, i32 noundef %28)
  %30 = add nsw i32 %24, %29
  %31 = getelementptr inbounds i8, ptr %.040, i64 1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %.03439, i64 1
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = lshr i32 %32, 12
  %36 = and i32 %35, 31
  %37 = lshr i32 %34, 12
  %38 = and i32 %37, 31
  %39 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %36, i32 noundef %38)
  %40 = add nsw i32 %30, %39
  %41 = lshr i32 %32, 17
  %42 = and i32 %41, 31
  %43 = lshr i32 %34, 17
  %44 = and i32 %43, 31
  %45 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %42, i32 noundef %44)
  %46 = add nsw i32 %40, %45
  %47 = lshr i32 %32, 22
  %48 = and i32 %47, 31
  %49 = lshr i32 %34, 22
  %50 = and i32 %49, 31
  %51 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %48, i32 noundef %50)
  %52 = add nsw i32 %46, %51
  %53 = lshr i32 %32, 27
  %54 = lshr i32 %34, 27
  %55 = tail call noundef i32 @_ZN4Simd4Base3MulEii(i32 noundef %53, i32 noundef %54)
  %56 = add nsw i32 %52, %55
  %57 = getelementptr inbounds i8, ptr %.040, i64 5
  %58 = getelementptr inbounds i8, ptr %.03439, i64 5
  %59 = add i64 %.03637, 8
  %60 = icmp ult i64 %59, %2
  br i1 %60, label %.lr.ph, label %._crit_edge, !llvm.loop !9
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass