; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseNeural.ll (ZN4Simd4Base28NeuralAdaptiveGradientUpdateEPKfmmS2_S2_PfS3_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28NeuralAdaptiveGradientUpdateEPKfmmS2_S2_PfS3_(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) #2 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca float, align 4
  %16 = alloca float, align 4
  %17 = alloca float, align 4
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store i64 %2, ptr %10, align 8, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store ptr %4, ptr %12, align 8, !tbaa !5
  store ptr %5, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %20 = load i64, ptr %10, align 8, !tbaa !9
  %21 = uitofp i64 %20 to double
  %22 = fdiv double 1.000000e+00, %21
  %23 = fptrunc double %22 to float
  store float %23, ptr %15, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %24 = load ptr, ptr %11, align 8, !tbaa !5
  %25 = getelementptr inbounds float, ptr %24, i64 0
  %26 = load float, ptr %25, align 4, !tbaa !11
  store float %26, ptr %16, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %27 = load ptr, ptr %12, align 8, !tbaa !5
  %28 = getelementptr inbounds float, ptr %27, i64 0
  %29 = load float, ptr %28, align 4, !tbaa !11
  store float %29, ptr %17, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %30 = load i64, ptr %9, align 8, !tbaa !9
  %31 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %30, i64 noundef 4)
  store i64 %31, ptr %18, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  store i64 0, ptr %19, align 8, !tbaa !9
  br label %32

32:                                               ; preds = %69, %7
  %33 = load i64, ptr %19, align 8, !tbaa !9
  %34 = load i64, ptr %18, align 8, !tbaa !9
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %36, label %72

36:                                               ; preds = %32
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = load i64, ptr %19, align 8, !tbaa !9
  %39 = add i64 %38, 0
  %40 = load float, ptr %15, align 4, !tbaa !11
  %41 = load float, ptr %16, align 4, !tbaa !11
  %42 = load float, ptr %17, align 4, !tbaa !11
  %43 = load ptr, ptr %13, align 8, !tbaa !5
  %44 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %37, i64 noundef %39, float noundef %40, float noundef %41, float noundef %42, ptr noundef %43, ptr noundef %44)
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = load i64, ptr %19, align 8, !tbaa !9
  %47 = add i64 %46, 1
  %48 = load float, ptr %15, align 4, !tbaa !11
  %49 = load float, ptr %16, align 4, !tbaa !11
  %50 = load float, ptr %17, align 4, !tbaa !11
  %51 = load ptr, ptr %13, align 8, !tbaa !5
  %52 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %45, i64 noundef %47, float noundef %48, float noundef %49, float noundef %50, ptr noundef %51, ptr noundef %52)
  %53 = load ptr, ptr %8, align 8, !tbaa !5
  %54 = load i64, ptr %19, align 8, !tbaa !9
  %55 = add i64 %54, 2
  %56 = load float, ptr %15, align 4, !tbaa !11
  %57 = load float, ptr %16, align 4, !tbaa !11
  %58 = load float, ptr %17, align 4, !tbaa !11
  %59 = load ptr, ptr %13, align 8, !tbaa !5
  %60 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %53, i64 noundef %55, float noundef %56, float noundef %57, float noundef %58, ptr noundef %59, ptr noundef %60)
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = load i64, ptr %19, align 8, !tbaa !9
  %63 = add i64 %62, 3
  %64 = load float, ptr %15, align 4, !tbaa !11
  %65 = load float, ptr %16, align 4, !tbaa !11
  %66 = load float, ptr %17, align 4, !tbaa !11
  %67 = load ptr, ptr %13, align 8, !tbaa !5
  %68 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %61, i64 noundef %63, float noundef %64, float noundef %65, float noundef %66, ptr noundef %67, ptr noundef %68)
  br label %69

69:                                               ; preds = %36
  %70 = load i64, ptr %19, align 8, !tbaa !9
  %71 = add i64 %70, 4
  store i64 %71, ptr %19, align 8, !tbaa !9
  br label %32, !llvm.loop !13

72:                                               ; preds = %32
  br label %73

73:                                               ; preds = %85, %72
  %74 = load i64, ptr %19, align 8, !tbaa !9
  %75 = load i64, ptr %9, align 8, !tbaa !9
  %76 = icmp ult i64 %74, %75
  br i1 %76, label %77, label %88

77:                                               ; preds = %73
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = load i64, ptr %19, align 8, !tbaa !9
  %80 = load float, ptr %15, align 4, !tbaa !11
  %81 = load float, ptr %16, align 4, !tbaa !11
  %82 = load float, ptr %17, align 4, !tbaa !11
  %83 = load ptr, ptr %13, align 8, !tbaa !5
  %84 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %78, i64 noundef %79, float noundef %80, float noundef %81, float noundef %82, ptr noundef %83, ptr noundef %84)
  br label %85

85:                                               ; preds = %77
  %86 = load i64, ptr %19, align 8, !tbaa !9
  %87 = add i64 %86, 1
  store i64 %87, ptr %19, align 8, !tbaa !9
  br label %73, !llvm.loop !15

88:                                               ; preds = %73
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef, i64 noundef, float noundef, float noundef, float noundef, ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28NeuralAdaptiveGradientUpdateEPKfmmS2_S2_PfS3_(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #1 {
  %8 = uitofp i64 %2 to double
  %9 = fdiv double 1.000000e+00, %8
  %10 = fptrunc double %9 to float
  %11 = load float, ptr %3, align 4, !tbaa !5
  %12 = load float, ptr %4, align 4, !tbaa !5
  %13 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 4)
  %.not = icmp eq i64 %13, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %7
  %.0.lcssa = phi i64 [ 0, %7 ], [ %18, %.lr.ph ]
  %14 = icmp ult i64 %.0.lcssa, %1
  br i1 %14, label %.lr.ph46, label %._crit_edge

.lr.ph:                                           ; preds = %7, %.lr.ph
  %.044 = phi i64 [ %18, %.lr.ph ], [ 0, %7 ]
  tail call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %0, i64 noundef %.044, float noundef %10, float noundef %11, float noundef %12, ptr noundef %5, ptr noundef %6)
  %15 = or disjoint i64 %.044, 1
  tail call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %0, i64 noundef %15, float noundef %10, float noundef %11, float noundef %12, ptr noundef %5, ptr noundef %6)
  %16 = or disjoint i64 %.044, 2
  tail call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %0, i64 noundef %16, float noundef %10, float noundef %11, float noundef %12, ptr noundef %5, ptr noundef %6)
  %17 = or disjoint i64 %.044, 3
  tail call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %0, i64 noundef %17, float noundef %10, float noundef %11, float noundef %12, ptr noundef %5, ptr noundef %6)
  %18 = add i64 %.044, 4
  %19 = icmp ult i64 %18, %13
  br i1 %19, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph46:                                         ; preds = %.preheader, %.lr.ph46
  %.145 = phi i64 [ %20, %.lr.ph46 ], [ %.0.lcssa, %.preheader ]
  tail call void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef %0, i64 noundef %.145, float noundef %10, float noundef %11, float noundef %12, ptr noundef %5, ptr noundef %6)
  %20 = add i64 %.145, 1
  %exitcond.not = icmp eq i64 %20, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph46, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph46, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base22AdaptiveGradientUpdateEPKfmfffPfS3_(ptr noundef, i64 noundef, float noundef, float noundef, float noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass