; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec = external hidden unnamed_addr constant [55 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6) #0 {
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i8 %1, ptr %9, align 1, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !10
  store i32 %3, ptr %11, align 4, !tbaa !10
  store i32 %4, ptr %12, align 4, !tbaa !10
  store ptr %5, ptr %13, align 8, !tbaa !5
  store i32 %6, ptr %14, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %18 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %18, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %19 = load i32, ptr %14, align 4, !tbaa !10
  %20 = urem i32 %19, 16
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %31, label %22

22:                                               ; preds = %7
  %23 = load ptr, ptr %8, align 8, !tbaa !5
  %24 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !10
  %25 = icmp ult i32 1, %24
  br i1 %25, label %26, label %28

26:                                               ; preds = %22
  %27 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !10
  br label %29

28:                                               ; preds = %22
  br label %29

29:                                               ; preds = %28, %26
  %30 = phi i32 [ %27, %26 ], [ 1, %28 ]
  call void @libxsmm_handle_error(ptr noundef %23, i32 noundef 90053, ptr noundef @__func__.libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec, ptr noundef @.str.1, i32 noundef 4284, i32 noundef %30)
  store i32 1, ptr %17, align 4
  br label %73

31:                                               ; preds = %7
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = load i32, ptr %12, align 4, !tbaa !10
  %34 = load i32, ptr %10, align 4, !tbaa !10
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %32, i32 noundef %33, i32 noundef -1, i32 noundef %34)
  %35 = load ptr, ptr %8, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %35, i32 noundef 1358954502, i32 noundef 63, i32 noundef 63, i32 noundef 64, i8 noundef zeroext 0)
  store i32 0, ptr %16, align 4, !tbaa !10
  br label %36

36:                                               ; preds = %64, %31
  %37 = load i32, ptr %16, align 4, !tbaa !10
  %38 = load i32, ptr %14, align 4, !tbaa !10
  %39 = udiv i32 %38, 16
  %40 = icmp ult i32 %37, %39
  br i1 %40, label %41, label %67

41:                                               ; preds = %36
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = load i32, ptr %10, align 4, !tbaa !10
  %44 = load ptr, ptr %15, align 8, !tbaa !5
  %45 = load i32, ptr %16, align 4, !tbaa !10
  %46 = mul i32 2, %45
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds i64, ptr %44, i64 %47
  %49 = load i64, ptr %48, align 8, !tbaa !12
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %42, i32 noundef %43, i64 noundef %49)
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = load i32, ptr %11, align 4, !tbaa !10
  %52 = load ptr, ptr %15, align 8, !tbaa !5
  %53 = load i32, ptr %16, align 4, !tbaa !10
  %54 = mul i32 2, %53
  %55 = add i32 %54, 1
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds i64, ptr %52, i64 %56
  %58 = load i64, ptr %57, align 8, !tbaa !12
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %50, i32 noundef %51, i64 noundef %58)
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = load i32, ptr %16, align 4, !tbaa !10
  %61 = mul i32 16, %60
  %62 = load i32, ptr %10, align 4, !tbaa !10
  %63 = load i32, ptr %11, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %59, i32 noundef 687865863, i32 noundef 63, i32 noundef %61, i32 noundef %62, i32 noundef %63)
  br label %64

64:                                               ; preds = %41
  %65 = load i32, ptr %16, align 4, !tbaa !10
  %66 = add i32 %65, 1
  store i32 %66, ptr %16, align 4, !tbaa !10
  br label %36, !llvm.loop !14

67:                                               ; preds = %36
  %68 = load ptr, ptr %8, align 8, !tbaa !5
  %69 = load i8, ptr %9, align 1, !tbaa !9
  %70 = zext i8 %69 to i32
  %71 = load i32, ptr %12, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %68, i32 noundef -2055192570, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %70, i32 noundef %71)
  %72 = load ptr, ptr %8, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %72, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 64, i8 noundef zeroext 0)
  store i32 0, ptr %17, align 4
  br label %73

73:                                               ; preds = %67, %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  %74 = load i32, ptr %17, align 4
  switch i32 %74, label %76 [
    i32 0, label %75
    i32 1, label %75
  ]

75:                                               ; preds = %73, %73
  ret void

76:                                               ; preds = %73
  unreachable
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long long", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec = external hidden unnamed_addr constant [55 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef readonly %5, i32 noundef %6) local_unnamed_addr #0 {
  %8 = and i32 %6, 15
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %15, label %10

10:                                               ; preds = %7
  %11 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !5
  %12 = icmp ugt i32 %11, 1
  %13 = load i32, ptr @libxsmm_verbosity, align 4
  %14 = select i1 %12, i32 %13, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90053, ptr noundef nonnull @__func__.libxsmm_aarch64_instruction_sve_loadbytes_const_to_vec, ptr noundef nonnull @.str.1, i32 noundef 4284, i32 noundef %14) #2
  br label %25

15:                                               ; preds = %7
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef %4, i32 noundef -1, i32 noundef %2)
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 1358954502, i32 noundef 63, i32 noundef 63, i32 noundef 64, i8 noundef zeroext 0) #2
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %15
  %16 = lshr exact i32 %6, 4
  %wide.trip.count = zext nneg i32 %16 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %17 = shl nuw nsw i64 %indvars.iv, 1
  %18 = getelementptr inbounds i64, ptr %5, i64 %17
  %19 = load i64, ptr %18, align 8, !tbaa !9
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %2, i64 noundef %19) #2
  %20 = or disjoint i64 %17, 1
  %21 = getelementptr inbounds i64, ptr %5, i64 %20
  %22 = load i64, ptr %21, align 8, !tbaa !9
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %3, i64 noundef %22) #2
  %indvars.iv.tr = trunc i64 %indvars.iv to i32
  %23 = shl i32 %indvars.iv.tr, 4
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %0, i32 noundef 687865863, i32 noundef 63, i32 noundef %23, i32 noundef %2, i32 noundef %3) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph, %15
  %24 = zext i8 %1 to i32
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2055192570, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %24, i32 noundef %4) #2
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 64, i8 noundef zeroext 0) #2
  br label %25

25:                                               ; preds = %._crit_edge, %10
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass