; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetMergedConvolution8i" = type { %"class.Simd::SynetMergedConvolution8i", %"struct.Simd::MergConvParam8i", i8, i8, i8, i8, i64, i64, [2 x i64], [5 x i64], [3 x %"struct.Simd::CvtParam"], %"struct.Simd::Array", [2 x %"struct.Simd::Array.1"], %"struct.Simd::Array.0", [2 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], %"struct.Simd::Base::SynetMergedConvolution8i::AlgParam", ptr, ptr, ptr, ptr, [2 x ptr], %"class.std::__cxx11::basic_string" }
%"class.Simd::SynetMergedConvolution8i" = type { %"struct.Simd::Deletable" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::MergConvParam8i" = type { i64, [3 x %"struct.Simd::ConvParam"] }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Base::SynetMergedConvolution8i::AlgParam" = type { i64, i64, [3 x i64], [3 x i64], [3 x i64], [2 x i64], [3 x i64], i64, i32, i32 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf = external hidden unnamed_addr constant [127 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf(ptr noundef nonnull align 8 dereferenceable(1376) %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) #2 align 2 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca float, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store ptr %4, ptr %12, align 8, !tbaa !5
  store ptr %5, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  %23 = load ptr, ptr %8, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #7
  %24 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 1
  %25 = getelementptr inbounds %"struct.Simd::MergConvParam8i", ptr %24, i32 0, i32 1
  %26 = load i64, ptr %10, align 8, !tbaa !9
  %27 = getelementptr inbounds [3 x %"struct.Simd::ConvParam"], ptr %25, i64 0, i64 %26
  store ptr %27, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #7
  %28 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 16
  %29 = load i64, ptr %10, align 8, !tbaa !9
  %30 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %28, i64 0, i64 %29
  %31 = getelementptr inbounds %"struct.Simd::Array.0", ptr %30, i32 0, i32 0
  %32 = load ptr, ptr %31, align 8, !tbaa !11
  store ptr %32, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #7
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %33, ptr %17, align 8, !tbaa !5
  %34 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 5
  %35 = load i8, ptr %34, align 1, !tbaa !13, !range !24, !noundef !25
  %36 = trunc i8 %35 to i1
  br i1 %36, label %50, label %37

37:                                               ; preds = %7
  %38 = load i64, ptr %10, align 8, !tbaa !9
  %39 = icmp eq i64 %38, 0
  br i1 %39, label %40, label %50

40:                                               ; preds = %37
  %41 = load ptr, ptr %17, align 8, !tbaa !5
  %42 = load ptr, ptr %15, align 8, !tbaa !5
  %43 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 10
  %44 = getelementptr inbounds [3 x %"struct.Simd::CvtParam"], ptr %43, i64 0, i64 0
  %45 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %"struct.Simd::Array", ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !26
  %48 = load ptr, ptr %12, align 8, !tbaa !5
  call void @_ZN4Simd4Base8ImgToRowEPKhRK25SimdConvolutionParametersS2_Ph(ptr noundef %41, ptr noundef nonnull align 8 dereferenceable(160) %42, ptr noundef %47, ptr noundef %48)
  %49 = load ptr, ptr %12, align 8, !tbaa !5
  store ptr %49, ptr %17, align 8, !tbaa !5
  br label %50

50:                                               ; preds = %40, %37, %7
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %51, i32 0, i32 0
  %53 = load i64, ptr %52, align 8, !tbaa !28
  %54 = load ptr, ptr %15, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %54, i32 0, i32 10
  %56 = load i64, ptr %55, align 8, !tbaa !33
  %57 = mul i64 %53, %56
  %58 = load ptr, ptr %15, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %58, i32 0, i32 11
  %60 = load i64, ptr %59, align 8, !tbaa !34
  %61 = mul i64 %57, %60
  store i64 %61, ptr %18, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #7
  %62 = load ptr, ptr %15, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %62, i32 0, i32 6
  %64 = load i64, ptr %63, align 8, !tbaa !35
  %65 = load ptr, ptr %15, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %65, i32 0, i32 7
  %67 = load i64, ptr %66, align 8, !tbaa !36
  %68 = mul i64 %64, %67
  store i64 %68, ptr %19, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #7
  %69 = load ptr, ptr %15, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %69, i32 0, i32 5
  %71 = load i64, ptr %70, align 8, !tbaa !37
  store i64 %71, ptr %20, align 8, !tbaa !9
  %72 = load i64, ptr %19, align 8, !tbaa !9
  %73 = load i64, ptr %20, align 8, !tbaa !9
  %74 = load ptr, ptr %15, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %74, i32 0, i32 10
  %76 = load i64, ptr %75, align 8, !tbaa !33
  %77 = load ptr, ptr %15, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %77, i32 0, i32 11
  %79 = load i64, ptr %78, align 8, !tbaa !34
  %80 = mul i64 %76, %79
  %81 = load ptr, ptr %15, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %81, i32 0, i32 0
  %83 = load i64, ptr %82, align 8, !tbaa !28
  %84 = load ptr, ptr %17, align 8, !tbaa !5
  %85 = load i64, ptr %18, align 8, !tbaa !9
  %86 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 12
  %87 = load i64, ptr %11, align 8, !tbaa !9
  %88 = getelementptr inbounds [2 x %"struct.Simd::Array.1"], ptr %86, i64 0, i64 %87
  %89 = getelementptr inbounds %"struct.Simd::Array.1", ptr %88, i32 0, i32 0
  %90 = load ptr, ptr %89, align 8, !tbaa !38
  %91 = load i64, ptr %20, align 8, !tbaa !9
  %92 = load ptr, ptr %13, align 8, !tbaa !5
  %93 = load i64, ptr %20, align 8, !tbaa !9
  %94 = load ptr, ptr %15, align 8, !tbaa !5
  %95 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %94, i32 0, i32 4
  %96 = load i32, ptr %95, align 8, !tbaa !40
  %97 = call noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef %96)
  call void @_ZN4Simd4Base8GemmNhwcEmmmmPKhmPKamPimb(i64 noundef %72, i64 noundef %73, i64 noundef %80, i64 noundef %83, ptr noundef %84, i64 noundef %85, ptr noundef %90, i64 noundef %91, ptr noundef %92, i64 noundef %93, i1 noundef zeroext %97)
  %98 = load ptr, ptr %13, align 8, !tbaa !5
  %99 = load ptr, ptr %15, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %99, i32 0, i32 5
  %101 = load i64, ptr %100, align 8, !tbaa !37
  %102 = load ptr, ptr %15, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %102, i32 0, i32 6
  %104 = load i64, ptr %103, align 8, !tbaa !35
  %105 = load ptr, ptr %15, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %105, i32 0, i32 7
  %107 = load i64, ptr %106, align 8, !tbaa !36
  %108 = load ptr, ptr %15, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %108, i32 0, i32 9
  %110 = load i32, ptr %109, align 4, !tbaa !44
  %111 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 14
  %112 = load i64, ptr %11, align 8, !tbaa !9
  %113 = getelementptr inbounds [2 x %"struct.Simd::Array.0"], ptr %111, i64 0, i64 %112
  %114 = getelementptr inbounds %"struct.Simd::Array.0", ptr %113, i32 0, i32 0
  %115 = load ptr, ptr %114, align 8, !tbaa !11
  %116 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %23, i32 0, i32 15
  %117 = load i64, ptr %10, align 8, !tbaa !9
  %118 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %116, i64 0, i64 %117
  %119 = getelementptr inbounds %"struct.Simd::Array.0", ptr %118, i32 0, i32 0
  %120 = load ptr, ptr %119, align 8, !tbaa !11
  %121 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base7ConvertIiffEEvPKT_mmmm20SimdTensorFormatTypePKT1_S8_iiPT0_(ptr noundef %98, i64 noundef 1, i64 noundef %101, i64 noundef %104, i64 noundef %107, i32 noundef %110, ptr noundef %115, ptr noundef %120, i32 noundef 0, i32 noundef 0, ptr noundef %121)
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #7
  %122 = load ptr, ptr %15, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %122, i32 0, i32 5
  %124 = load i64, ptr %123, align 8, !tbaa !37
  %125 = load ptr, ptr %15, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %125, i32 0, i32 6
  %127 = load i64, ptr %126, align 8, !tbaa !35
  %128 = mul i64 %124, %127
  %129 = load ptr, ptr %15, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %129, i32 0, i32 7
  %131 = load i64, ptr %130, align 8, !tbaa !36
  %132 = mul i64 %128, %131
  store i64 %132, ptr %21, align 8, !tbaa !9
  %133 = load ptr, ptr %15, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %133, i32 0, i32 21
  %135 = load i32, ptr %134, align 8, !tbaa !45
  switch i32 %135, label %197 [
    i32 0, label %198
    i32 1, label %136
    i32 2, label %140
    i32 3, label %145
    i32 4, label %153
    i32 5, label %162
    i32 6, label %167
    i32 7, label %175
    i32 8, label %180
    i32 9, label %188
    i32 10, label %193
  ]

136:                                              ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  store float 0.000000e+00, ptr %22, align 4, !tbaa !46
  %137 = load ptr, ptr %14, align 8, !tbaa !5
  %138 = load i64, ptr %21, align 8, !tbaa !9
  %139 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef %137, i64 noundef %138, ptr noundef %22, ptr noundef %139)
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  br label %198

140:                                              ; preds = %50
  %141 = load ptr, ptr %14, align 8, !tbaa !5
  %142 = load i64, ptr %21, align 8, !tbaa !9
  %143 = load ptr, ptr %16, align 8, !tbaa !5
  %144 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef %141, i64 noundef %142, ptr noundef %143, ptr noundef %144)
  br label %198

145:                                              ; preds = %50
  %146 = load ptr, ptr %14, align 8, !tbaa !5
  %147 = load i64, ptr %21, align 8, !tbaa !9
  %148 = load ptr, ptr %16, align 8, !tbaa !5
  %149 = getelementptr inbounds float, ptr %148, i64 0
  %150 = load ptr, ptr %16, align 8, !tbaa !5
  %151 = getelementptr inbounds float, ptr %150, i64 1
  %152 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr noundef %146, i64 noundef %147, ptr noundef %149, ptr noundef %151, ptr noundef %152)
  br label %198

153:                                              ; preds = %50
  %154 = load ptr, ptr %14, align 8, !tbaa !5
  %155 = load ptr, ptr %16, align 8, !tbaa !5
  %156 = load i64, ptr %20, align 8, !tbaa !9
  %157 = load i64, ptr %19, align 8, !tbaa !9
  %158 = load ptr, ptr %14, align 8, !tbaa !5
  %159 = load ptr, ptr %15, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %159, i32 0, i32 9
  %161 = load i32, ptr %160, align 4, !tbaa !44
  call void @_ZN4Simd4Base22SynetPreluLayerForwardEPKfS2_mmPf20SimdTensorFormatType(ptr noundef %154, ptr noundef %155, i64 noundef %156, i64 noundef %157, ptr noundef %158, i32 noundef %161)
  br label %198

162:                                              ; preds = %50
  %163 = load ptr, ptr %14, align 8, !tbaa !5
  %164 = load i64, ptr %21, align 8, !tbaa !9
  %165 = load ptr, ptr %16, align 8, !tbaa !5
  %166 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr noundef %163, i64 noundef %164, ptr noundef %165, ptr noundef %166)
  br label %198

167:                                              ; preds = %50
  %168 = load ptr, ptr %14, align 8, !tbaa !5
  %169 = load i64, ptr %21, align 8, !tbaa !9
  %170 = load ptr, ptr %16, align 8, !tbaa !5
  %171 = getelementptr inbounds float, ptr %170, i64 0
  %172 = load ptr, ptr %16, align 8, !tbaa !5
  %173 = getelementptr inbounds float, ptr %172, i64 1
  %174 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr noundef %168, i64 noundef %169, ptr noundef %171, ptr noundef %173, ptr noundef %174)
  br label %198

175:                                              ; preds = %50
  %176 = load ptr, ptr %14, align 8, !tbaa !5
  %177 = load i64, ptr %21, align 8, !tbaa !9
  %178 = load ptr, ptr %16, align 8, !tbaa !5
  %179 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base12SynetMish32fEPKfmS2_Pf(ptr noundef %176, i64 noundef %177, ptr noundef %178, ptr noundef %179)
  br label %198

180:                                              ; preds = %50
  %181 = load ptr, ptr %14, align 8, !tbaa !5
  %182 = load i64, ptr %21, align 8, !tbaa !9
  %183 = load ptr, ptr %16, align 8, !tbaa !5
  %184 = getelementptr inbounds float, ptr %183, i64 0
  %185 = load ptr, ptr %16, align 8, !tbaa !5
  %186 = getelementptr inbounds float, ptr %185, i64 1
  %187 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base19SynetHardSigmoid32fEPKfmS2_S2_Pf(ptr noundef %181, i64 noundef %182, ptr noundef %184, ptr noundef %186, ptr noundef %187)
  br label %198

188:                                              ; preds = %50
  %189 = load ptr, ptr %14, align 8, !tbaa !5
  %190 = load i64, ptr %21, align 8, !tbaa !9
  %191 = load ptr, ptr %16, align 8, !tbaa !5
  %192 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base13SynetSwish32fEPKfmS2_Pf(ptr noundef %189, i64 noundef %190, ptr noundef %191, ptr noundef %192)
  br label %198

193:                                              ; preds = %50
  %194 = load ptr, ptr %14, align 8, !tbaa !5
  %195 = load i64, ptr %21, align 8, !tbaa !9
  %196 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN4Simd4Base12SynetGelu32fEPKfmPf(ptr noundef %194, i64 noundef %195, ptr noundef %196)
  br label %198

197:                                              ; preds = %50
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 489, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf) #8
  unreachable

198:                                              ; preds = %193, %188, %180, %175, %167, %162, %153, %145, %140, %136, %50
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8ImgToRowEPKhRK25SimdConvolutionParametersS2_Ph(ptr noundef, ptr noundef nonnull align 8 dereferenceable(160), ptr noundef, ptr noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4Simd4Base8GemmNhwcEmmmmPKhmPKamPimb(i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, i1 noundef zeroext) #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base7ConvertIiffEEvPKT_mmmm20SimdTensorFormatTypePKT1_S8_iiPT0_(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #2

declare void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base22SynetPreluLayerForwardEPKfS2_mmPf20SimdTensorFormatType(ptr noundef, ptr noundef, i64 noundef, i64 noundef, ptr noundef, i32 noundef) #6

declare void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base12SynetMish32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base19SynetHardSigmoid32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base13SynetSwish32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) #6

declare void @_ZN4Simd4Base12SynetGelu32fEPKfmPf(ptr noundef, i64 noundef, ptr noundef) #6

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!13 = !{!14, !18, i64 571}
!14 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8iE", !15, i64 0, !17, i64 8, !18, i64 568, !18, i64 569, !18, i64 570, !18, i64 571, !10, i64 576, !10, i64 584, !7, i64 592, !7, i64 608, !7, i64 648, !19, i64 960, !7, i64 976, !12, i64 1008, !7, i64 1024, !7, i64 1056, !7, i64 1104, !20, i64 1152, !6, i64 1296, !6, i64 1304, !6, i64 1312, !6, i64 1320, !7, i64 1328, !22, i64 1344}
!15 = !{!"_ZTSN4Simd24SynetMergedConvolution8iE", !16, i64 0}
!16 = !{!"_ZTSN4Simd9DeletableE"}
!17 = !{!"_ZTSN4Simd15MergConvParam8iE", !10, i64 0, !7, i64 8}
!18 = !{!"bool", !7, i64 0}
!19 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!20 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8i8AlgParamE", !10, i64 0, !10, i64 8, !7, i64 16, !7, i64 40, !7, i64 64, !7, i64 88, !7, i64 104, !10, i64 128, !21, i64 136, !21, i64 140}
!21 = !{!"int", !7, i64 0}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !10, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{i8 0, i8 2}
!25 = !{}
!26 = !{!27, !6, i64 0}
!27 = !{!"_ZTSN4Simd8CvtParamE", !19, i64 0, !12, i64 16, !12, i64 32, !12, i64 48, !12, i64 64, !18, i64 80, !21, i64 84, !21, i64 88, !21, i64 92, !21, i64 96}
!28 = !{!29, !10, i64 0}
!29 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !30, i64 24, !31, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !30, i64 56, !31, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !32, i64 152}
!30 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!31 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!32 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!33 = !{!29, !10, i64 64}
!34 = !{!29, !10, i64 72}
!35 = !{!29, !10, i64 40}
!36 = !{!29, !10, i64 48}
!37 = !{!29, !10, i64 32}
!38 = !{!39, !6, i64 0}
!39 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !10, i64 8}
!40 = !{!41, !43, i64 176}
!41 = !{!"_ZTSN4Simd9ConvParamE", !29, i64 0, !42, i64 160, !10, i64 168, !43, i64 176}
!42 = !{!"_ZTS8SimdBool", !7, i64 0}
!43 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!44 = !{!29, !31, i64 60}
!45 = !{!29, !32, i64 152}
!46 = !{!47, !47, i64 0}
!47 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf = external hidden unnamed_addr constant [127 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf(ptr noundef nonnull align 8 dereferenceable(1376) %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #2 align 2 {
  %8 = alloca float, align 4
  %9 = getelementptr inbounds i8, ptr %0, i64 16
  %10 = getelementptr inbounds [3 x %"struct.Simd::ConvParam"], ptr %9, i64 0, i64 %2
  %11 = getelementptr inbounds i8, ptr %0, i64 1104
  %12 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %11, i64 0, i64 %2
  %13 = load ptr, ptr %12, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %0, i64 571
  %15 = load i8, ptr %14, align 1, !tbaa !11, !range !22, !noundef !23
  %16 = trunc nuw i8 %15 to i1
  %17 = icmp ne i64 %2, 0
  %or.cond.not = or i1 %17, %16
  br i1 %or.cond.not, label %21, label %18

18:                                               ; preds = %7
  %19 = getelementptr inbounds i8, ptr %0, i64 648
  %20 = load ptr, ptr %19, align 8, !tbaa !24
  tail call void @_ZN4Simd4Base8ImgToRowEPKhRK25SimdConvolutionParametersS2_Ph(ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(160) %10, ptr noundef %20, ptr noundef %4)
  br label %21

21:                                               ; preds = %18, %7
  %.0 = phi ptr [ %4, %18 ], [ %1, %7 ]
  %22 = load i64, ptr %10, align 8, !tbaa !26
  %23 = getelementptr inbounds i8, ptr %10, i64 64
  %24 = load i64, ptr %23, align 8, !tbaa !31
  %25 = getelementptr inbounds i8, ptr %10, i64 72
  %26 = load i64, ptr %25, align 8, !tbaa !32
  %27 = mul i64 %26, %24
  %28 = mul i64 %27, %22
  %29 = getelementptr inbounds i8, ptr %10, i64 40
  %30 = load i64, ptr %29, align 8, !tbaa !33
  %31 = getelementptr inbounds i8, ptr %10, i64 48
  %32 = load i64, ptr %31, align 8, !tbaa !34
  %33 = mul i64 %32, %30
  %34 = getelementptr inbounds i8, ptr %10, i64 32
  %35 = load i64, ptr %34, align 8, !tbaa !35
  %36 = getelementptr inbounds i8, ptr %0, i64 976
  %37 = getelementptr inbounds [2 x %"struct.Simd::Array.1"], ptr %36, i64 0, i64 %3
  %38 = load ptr, ptr %37, align 8, !tbaa !36
  %39 = getelementptr inbounds i8, ptr %10, i64 176
  %40 = load i32, ptr %39, align 8, !tbaa !38
  %41 = tail call noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef %40)
  tail call void @_ZN4Simd4Base8GemmNhwcEmmmmPKhmPKamPimb(i64 noundef %33, i64 noundef %35, i64 noundef %27, i64 noundef %22, ptr noundef %.0, i64 noundef %28, ptr noundef %38, i64 noundef %35, ptr noundef %5, i64 noundef %35, i1 noundef zeroext %41)
  %42 = load i64, ptr %34, align 8, !tbaa !35
  %43 = load i64, ptr %29, align 8, !tbaa !33
  %44 = load i64, ptr %31, align 8, !tbaa !34
  %45 = getelementptr inbounds i8, ptr %10, i64 60
  %46 = load i32, ptr %45, align 4, !tbaa !42
  %47 = getelementptr inbounds i8, ptr %0, i64 1024
  %48 = getelementptr inbounds [2 x %"struct.Simd::Array.0"], ptr %47, i64 0, i64 %3
  %49 = load ptr, ptr %48, align 8, !tbaa !5
  %50 = getelementptr inbounds i8, ptr %0, i64 1056
  %51 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %50, i64 0, i64 %2
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  tail call void @_ZN4Simd4Base7ConvertIiffEEvPKT_mmmm20SimdTensorFormatTypePKT1_S8_iiPT0_(ptr noundef %5, i64 noundef 1, i64 noundef %42, i64 noundef %43, i64 noundef %44, i32 noundef %46, ptr noundef %49, ptr noundef %52, i32 noundef 0, i32 noundef 0, ptr noundef %6)
  %53 = load i64, ptr %34, align 8, !tbaa !35
  %54 = load i64, ptr %29, align 8, !tbaa !33
  %55 = mul i64 %54, %53
  %56 = load i64, ptr %31, align 8, !tbaa !34
  %57 = mul i64 %55, %56
  %58 = getelementptr inbounds i8, ptr %10, i64 152
  %59 = load i32, ptr %58, align 8, !tbaa !43
  switch i32 %59, label %74 [
    i32 0, label %75
    i32 1, label %60
    i32 2, label %61
    i32 3, label %62
    i32 4, label %64
    i32 5, label %66
    i32 6, label %67
    i32 7, label %69
    i32 8, label %70
    i32 9, label %72
    i32 10, label %73
  ]

60:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #7
  store float 0.000000e+00, ptr %8, align 4, !tbaa !44
  call void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef nonnull %8, ptr noundef %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #7
  br label %75

61:                                               ; preds = %21
  tail call void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef %6)
  br label %75

62:                                               ; preds = %21
  %63 = getelementptr inbounds i8, ptr %13, i64 4
  tail call void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef nonnull %63, ptr noundef %6)
  br label %75

64:                                               ; preds = %21
  %65 = load i32, ptr %45, align 4, !tbaa !42
  tail call void @_ZN4Simd4Base22SynetPreluLayerForwardEPKfS2_mmPf20SimdTensorFormatType(ptr noundef %6, ptr noundef %13, i64 noundef %35, i64 noundef %33, ptr noundef %6, i32 noundef %65)
  br label %75

66:                                               ; preds = %21
  tail call void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef %6)
  br label %75

67:                                               ; preds = %21
  %68 = getelementptr inbounds i8, ptr %13, i64 4
  tail call void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef nonnull %68, ptr noundef %6)
  br label %75

69:                                               ; preds = %21
  tail call void @_ZN4Simd4Base12SynetMish32fEPKfmS2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef %6)
  br label %75

70:                                               ; preds = %21
  %71 = getelementptr inbounds i8, ptr %13, i64 4
  tail call void @_ZN4Simd4Base19SynetHardSigmoid32fEPKfmS2_S2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef nonnull %71, ptr noundef %6)
  br label %75

72:                                               ; preds = %21
  tail call void @_ZN4Simd4Base13SynetSwish32fEPKfmS2_Pf(ptr noundef %6, i64 noundef %57, ptr noundef %13, ptr noundef %6)
  br label %75

73:                                               ; preds = %21
  tail call void @_ZN4Simd4Base12SynetGelu32fEPKfmPf(ptr noundef %6, i64 noundef %57, ptr noundef %6)
  br label %75

74:                                               ; preds = %21
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 489, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base24SynetMergedConvolution8i19DirectConvolution8iEPKhmmPhPiPf) #8
  unreachable

75:                                               ; preds = %73, %72, %70, %69, %67, %66, %64, %62, %61, %60, %21
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8ImgToRowEPKhRK25SimdConvolutionParametersS2_Ph(ptr noundef, ptr noundef nonnull align 8 dereferenceable(160), ptr noundef, ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4Simd4Base8GemmNhwcEmmmmPKhmPKamPimb(i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, i1 noundef zeroext) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base7ConvertIiffEEvPKT_mmmm20SimdTensorFormatTypePKT1_S8_iiPT0_(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @_ZN4Simd4Base12SynetRelu32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base21SynetRestrictRange32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base22SynetPreluLayerForwardEPKfS2_mmPf20SimdTensorFormatType(ptr noundef, ptr noundef, i64 noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base12SynetMish32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base19SynetHardSigmoid32fEPKfmS2_S2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base13SynetSwish32fEPKfmS2_Pf(ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #6

declare void @_ZN4Simd4Base12SynetGelu32fEPKfmPf(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #6

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN4Simd5ArrayIfEE", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !16, i64 571}
!12 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8iE", !13, i64 0, !15, i64 8, !16, i64 568, !16, i64 569, !16, i64 570, !16, i64 571, !10, i64 576, !10, i64 584, !8, i64 592, !8, i64 608, !8, i64 648, !17, i64 960, !8, i64 976, !6, i64 1008, !8, i64 1024, !8, i64 1056, !8, i64 1104, !18, i64 1152, !7, i64 1296, !7, i64 1304, !7, i64 1312, !7, i64 1320, !8, i64 1328, !20, i64 1344}
!13 = !{!"_ZTSN4Simd24SynetMergedConvolution8iE", !14, i64 0}
!14 = !{!"_ZTSN4Simd9DeletableE"}
!15 = !{!"_ZTSN4Simd15MergConvParam8iE", !10, i64 0, !8, i64 8}
!16 = !{!"bool", !8, i64 0}
!17 = !{!"_ZTSN4Simd5ArrayIhEE", !7, i64 0, !10, i64 8}
!18 = !{!"_ZTSN4Simd4Base24SynetMergedConvolution8i8AlgParamE", !10, i64 0, !10, i64 8, !8, i64 16, !8, i64 40, !8, i64 64, !8, i64 88, !8, i64 104, !10, i64 128, !19, i64 136, !19, i64 140}
!19 = !{!"int", !8, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !10, i64 8, !8, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !7, i64 0}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!25, !7, i64 0}
!25 = !{!"_ZTSN4Simd8CvtParamE", !17, i64 0, !6, i64 16, !6, i64 32, !6, i64 48, !6, i64 64, !16, i64 80, !19, i64 84, !19, i64 88, !19, i64 92, !19, i64 96}
!26 = !{!27, !10, i64 0}
!27 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !28, i64 24, !29, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !28, i64 56, !29, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !30, i64 152}
!28 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!29 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!30 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!31 = !{!27, !10, i64 64}
!32 = !{!27, !10, i64 72}
!33 = !{!27, !10, i64 40}
!34 = !{!27, !10, i64 48}
!35 = !{!27, !10, i64 32}
!36 = !{!37, !7, i64 0}
!37 = !{!"_ZTSN4Simd5ArrayIaEE", !7, i64 0, !10, i64 8}
!38 = !{!39, !41, i64 176}
!39 = !{!"_ZTSN4Simd9ConvParamE", !27, i64 0, !40, i64 160, !10, i64 168, !41, i64 176}
!40 = !{!"_ZTS8SimdBool", !8, i64 0}
!41 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!42 = !{!27, !29, i64 60}
!43 = !{!27, !30, i64 152}
!44 = !{!45, !45, i64 0}
!45 = !{!"float", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass