; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_common_rv64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_rv64_instruction_alu_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_fusion_2dregblock_rv64(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #3 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca [2 x i32], align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %2, ptr %12, align 8, !tbaa !5
  store i32 %3, ptr %13, align 4, !tbaa !9
  store i32 %4, ptr %14, align 4, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  call void @llvm.memset.p0.i64(ptr align 4 %21, i8 0, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  store i32 0, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  store i32 0, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  store i32 0, ptr %24, align 4, !tbaa !9
  %26 = load i32, ptr %17, align 4, !tbaa !9
  %27 = load i32, ptr %15, align 4, !tbaa !9
  %28 = udiv i32 %26, %27
  %29 = getelementptr inbounds [2 x i32], ptr %21, i64 0, i64 0
  store i32 %28, ptr %29, align 4, !tbaa !9
  %30 = load i32, ptr %17, align 4, !tbaa !9
  %31 = load i32, ptr %15, align 4, !tbaa !9
  %32 = urem i32 %30, %31
  store i32 %32, ptr %24, align 4, !tbaa !9
  %33 = load i32, ptr %24, align 4, !tbaa !9
  %34 = icmp ugt i32 %33, 0
  %35 = zext i1 %34 to i32
  %36 = getelementptr inbounds [2 x i32], ptr %21, i64 0, i64 1
  store i32 %35, ptr %36, align 4, !tbaa !9
  %37 = getelementptr inbounds [2 x i32], ptr %21, i64 0, i64 0
  %38 = load i32, ptr %37, align 4, !tbaa !9
  %39 = getelementptr inbounds [2 x i32], ptr %21, i64 0, i64 1
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = add i32 %38, %40
  store i32 %41, ptr %22, align 4, !tbaa !9
  %42 = load i32, ptr %16, align 4, !tbaa !9
  %43 = load i32, ptr %18, align 4, !tbaa !9
  %44 = load i32, ptr %22, align 4, !tbaa !9
  %45 = mul i32 %43, %44
  %46 = sub i32 %42, %45
  store i32 %46, ptr %23, align 4, !tbaa !9
  %47 = load ptr, ptr %10, align 8, !tbaa !5
  call void @libxsmm_rv64_instruction_alu_compute(ptr noundef %47, i32 noundef -268435373, i32 noundef 0, i32 noundef 0, i32 noundef 31)
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %72, %9
  %49 = load i32, ptr %19, align 4, !tbaa !9
  %50 = load i32, ptr %18, align 4, !tbaa !9
  %51 = icmp ult i32 %49, %50
  br i1 %51, label %52, label %75

52:                                               ; preds = %48
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %68, %52
  %54 = load i32, ptr %20, align 4, !tbaa !9
  %55 = load i32, ptr %22, align 4, !tbaa !9
  %56 = icmp ult i32 %54, %55
  br i1 %56, label %57, label %71

57:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %58 = load i32, ptr %23, align 4, !tbaa !9
  %59 = load i32, ptr %22, align 4, !tbaa !9
  %60 = load i32, ptr %19, align 4, !tbaa !9
  %61 = mul i32 %59, %60
  %62 = add i32 %58, %61
  %63 = load i32, ptr %20, align 4, !tbaa !9
  %64 = add i32 %62, %63
  store i32 %64, ptr %25, align 4, !tbaa !9
  %65 = load ptr, ptr %10, align 8, !tbaa !5
  %66 = load i32, ptr %25, align 4, !tbaa !9
  %67 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %65, i32 noundef 402673751, i32 noundef 31, i32 noundef %66, i32 noundef %67, i32 noundef 1)
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  br label %68

68:                                               ; preds = %57
  %69 = load i32, ptr %20, align 4, !tbaa !9
  %70 = add i32 %69, 1
  store i32 %70, ptr %20, align 4, !tbaa !9
  br label %53, !llvm.loop !11

71:                                               ; preds = %53
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %19, align 4, !tbaa !9
  %74 = add i32 %73, 1
  store i32 %74, ptr %19, align 4, !tbaa !9
  br label %48, !llvm.loop !13

75:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  ret void
}

declare void @libxsmm_rv64_instruction_rvv_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_rv64_instruction_alu_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_fusion_2dregblock_rv64(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #1 {
  %10 = udiv i32 %7, %5
  %11 = urem i32 %7, %5
  %12 = icmp ne i32 %11, 0
  %13 = zext i1 %12 to i32
  %14 = add i32 %10, %13
  tail call void @libxsmm_rv64_instruction_alu_compute(ptr noundef %0, i32 noundef -268435373, i32 noundef 0, i32 noundef 0, i32 noundef 31) #2
  %.not = icmp eq i32 %8, 0
  %.not26 = icmp eq i32 %14, 0
  %or.cond = or i1 %.not, %.not26
  br i1 %or.cond, label %._crit_edge25, label %.preheader.us

.preheader.us:                                    ; preds = %9, %._crit_edge.us
  %.024.us = phi i32 [ %20, %._crit_edge.us ], [ 0, %9 ]
  %reass.add.us = sub i32 %.024.us, %8
  %reass.mul.us = mul i32 %reass.add.us, %14
  %15 = add i32 %reass.mul.us, %6
  br label %16

16:                                               ; preds = %.preheader.us, %16
  %.02123.us = phi i32 [ 0, %.preheader.us ], [ %18, %16 ]
  %17 = add i32 %15, %.02123.us
  tail call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %0, i32 noundef 402673751, i32 noundef 31, i32 noundef %17, i32 noundef %17, i32 noundef 1) #2
  %18 = add nuw i32 %.02123.us, 1
  %19 = icmp ult i32 %18, %14
  br i1 %19, label %16, label %._crit_edge.us, !llvm.loop !5

._crit_edge.us:                                   ; preds = %16
  %20 = add nuw i32 %.024.us, 1
  %exitcond.not = icmp eq i32 %20, %8
  br i1 %exitcond.not, label %._crit_edge25, label %.preheader.us, !llvm.loop !7

._crit_edge25:                                    ; preds = %._crit_edge.us, %9
  ret void
}

declare void @libxsmm_rv64_instruction_rvv_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass