; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_transform_aarch64_sve)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_norm_to_vnni2_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #0 {
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  store ptr %0, ptr %14, align 8, !tbaa !5
  store ptr %1, ptr %15, align 8, !tbaa !5
  store i32 %2, ptr %16, align 4, !tbaa !9
  store i32 %3, ptr %17, align 4, !tbaa !9
  store i32 %4, ptr %18, align 4, !tbaa !9
  store i32 %5, ptr %19, align 4, !tbaa !9
  store i32 %6, ptr %20, align 4, !tbaa !9
  store ptr %7, ptr %21, align 8, !tbaa !5
  store ptr %8, ptr %22, align 8, !tbaa !5
  store i32 %9, ptr %23, align 4, !tbaa !9
  store i32 %10, ptr %24, align 4, !tbaa !9
  store i32 %11, ptr %25, align 4, !tbaa !9
  store i32 %12, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  store i32 1, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  store i32 0, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #3
  %31 = load i32, ptr %23, align 4, !tbaa !9
  %32 = icmp eq i32 %31, 0
  %33 = zext i1 %32 to i64
  %34 = select i1 %32, i32 -2055192570, i32 -1532977018
  store i32 %34, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #3
  %35 = load i32, ptr %23, align 4, !tbaa !9
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %13
  br label %40

38:                                               ; preds = %13
  %39 = load i32, ptr %24, align 4, !tbaa !9
  br label %40

40:                                               ; preds = %38, %37
  %41 = phi i32 [ 127, %37 ], [ %39, %38 ]
  store i32 %41, ptr %30, align 4, !tbaa !9
  %42 = load ptr, ptr %15, align 8, !tbaa !5
  %43 = load i32, ptr %18, align 4, !tbaa !9
  %44 = load i32, ptr %19, align 4, !tbaa !9
  store i32 0, ptr %28, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %69, %40
  %46 = load i32, ptr %28, align 4, !tbaa !9
  %47 = load i32, ptr %26, align 4, !tbaa !9
  %48 = sub i32 2, %47
  %49 = icmp ult i32 %46, %48
  br i1 %49, label %50, label %72

50:                                               ; preds = %45
  %51 = load ptr, ptr %14, align 8, !tbaa !5
  %52 = load i32, ptr %29, align 4, !tbaa !9
  %53 = load i32, ptr %16, align 4, !tbaa !9
  %54 = load i32, ptr %28, align 4, !tbaa !9
  %55 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef 127, i32 noundef 0, i32 noundef %54, i32 noundef %55)
  %56 = load ptr, ptr %14, align 8, !tbaa !5
  %57 = load i32, ptr %16, align 4, !tbaa !9
  %58 = load i32, ptr %20, align 4, !tbaa !9
  %59 = load i32, ptr %16, align 4, !tbaa !9
  %60 = load ptr, ptr %22, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %60, i32 0, i32 2
  %62 = load i32, ptr %61, align 1, !tbaa !11
  %63 = zext i32 %62 to i64
  %64 = load ptr, ptr %21, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %64, i32 0, i32 2
  %66 = load i32, ptr %65, align 4, !tbaa !14
  %67 = zext i32 %66 to i64
  %68 = mul nsw i64 %63, %67
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %56, i32 noundef 4096, i32 noundef %57, i32 noundef %58, i32 noundef %59, i64 noundef %68)
  br label %69

69:                                               ; preds = %50
  %70 = load i32, ptr %28, align 4, !tbaa !9
  %71 = add i32 %70, 1
  store i32 %71, ptr %28, align 4, !tbaa !9
  br label %45, !llvm.loop !16

72:                                               ; preds = %45
  %73 = load i32, ptr %26, align 4, !tbaa !9
  %74 = sub i32 2, %73
  store i32 %74, ptr %28, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %83, %72
  %76 = load i32, ptr %28, align 4, !tbaa !9
  %77 = icmp ult i32 %76, 2
  br i1 %77, label %78, label %86

78:                                               ; preds = %75
  %79 = load ptr, ptr %14, align 8, !tbaa !5
  %80 = load i32, ptr %28, align 4, !tbaa !9
  %81 = load i32, ptr %28, align 4, !tbaa !9
  %82 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %79, i32 noundef 77606915, i32 noundef %80, i32 noundef %81, i8 noundef zeroext 0, i32 noundef %82, i32 noundef 0, i32 noundef 2)
  br label %83

83:                                               ; preds = %78
  %84 = load i32, ptr %28, align 4, !tbaa !9
  %85 = add i32 %84, 1
  store i32 %85, ptr %28, align 4, !tbaa !9
  br label %75, !llvm.loop !18

86:                                               ; preds = %75
  %87 = load ptr, ptr %14, align 8, !tbaa !5
  %88 = load i32, ptr %16, align 4, !tbaa !9
  %89 = load i32, ptr %20, align 4, !tbaa !9
  %90 = load i32, ptr %16, align 4, !tbaa !9
  %91 = load i32, ptr %26, align 4, !tbaa !9
  %92 = zext i32 %91 to i64
  %93 = sub nsw i64 2, %92
  %94 = load ptr, ptr %22, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %94, i32 0, i32 2
  %96 = load i32, ptr %95, align 1, !tbaa !11
  %97 = zext i32 %96 to i64
  %98 = mul nsw i64 %93, %97
  %99 = load ptr, ptr %21, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %99, i32 0, i32 2
  %101 = load i32, ptr %100, align 4, !tbaa !14
  %102 = zext i32 %101 to i64
  %103 = mul nsw i64 %98, %102
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %87, i32 noundef 4097, i32 noundef %88, i32 noundef %89, i32 noundef %90, i64 noundef %103)
  %104 = load ptr, ptr %14, align 8, !tbaa !5
  %105 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %104, i32 noundef 86007811, i32 noundef 0, i32 noundef 1, i8 noundef zeroext 0, i32 noundef 2, i32 noundef 0, i32 noundef %105)
  %106 = load ptr, ptr %14, align 8, !tbaa !5
  %107 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %106, i32 noundef 86008835, i32 noundef 0, i32 noundef 1, i8 noundef zeroext 0, i32 noundef 3, i32 noundef 0, i32 noundef %107)
  %108 = load i32, ptr %23, align 4, !tbaa !9
  %109 = icmp eq i32 %108, 0
  br i1 %109, label %110, label %115

110:                                              ; preds = %86
  %111 = load ptr, ptr %14, align 8, !tbaa !5
  %112 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %111, i32 noundef -444579834, i32 noundef %112, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef 127)
  %113 = load ptr, ptr %14, align 8, !tbaa !5
  %114 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %113, i32 noundef -444579834, i32 noundef %114, i32 noundef 127, i32 noundef 1, i32 noundef 3, i32 noundef 127)
  br label %158

115:                                              ; preds = %86
  %116 = load i32, ptr %23, align 4, !tbaa !9
  %117 = icmp ule i32 %116, 7
  br i1 %117, label %118, label %122

118:                                              ; preds = %115
  %119 = load ptr, ptr %14, align 8, !tbaa !5
  %120 = load i32, ptr %17, align 4, !tbaa !9
  %121 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %119, i32 noundef -459218810, i32 noundef %120, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef %121)
  br label %157

122:                                              ; preds = %115
  %123 = load i32, ptr %23, align 4, !tbaa !9
  %124 = icmp ugt i32 %123, 7
  br i1 %124, label %125, label %156

125:                                              ; preds = %122
  %126 = load i32, ptr %23, align 4, !tbaa !9
  %127 = icmp ule i32 %126, 15
  br i1 %127, label %128, label %156

128:                                              ; preds = %125
  %129 = load ptr, ptr %14, align 8, !tbaa !5
  %130 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %129, i32 noundef -444579834, i32 noundef %130, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef 127)
  %131 = load i32, ptr %23, align 4, !tbaa !9
  %132 = icmp ne i32 %131, 8
  br i1 %132, label %133, label %155

133:                                              ; preds = %128
  %134 = load ptr, ptr %14, align 8, !tbaa !5
  %135 = load i32, ptr %17, align 4, !tbaa !9
  %136 = load i32, ptr %20, align 4, !tbaa !9
  %137 = load i32, ptr %17, align 4, !tbaa !9
  %138 = load ptr, ptr %21, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %138, i32 0, i32 5
  %140 = load i32, ptr %139, align 4, !tbaa !19
  %141 = zext i32 %140 to i64
  %142 = mul nsw i64 16, %141
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %134, i32 noundef 4096, i32 noundef %135, i32 noundef %136, i32 noundef %137, i64 noundef %142)
  %143 = load ptr, ptr %14, align 8, !tbaa !5
  %144 = load i32, ptr %17, align 4, !tbaa !9
  %145 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %143, i32 noundef -459218810, i32 noundef %144, i32 noundef 127, i32 noundef 0, i32 noundef 3, i32 noundef %145)
  %146 = load ptr, ptr %14, align 8, !tbaa !5
  %147 = load i32, ptr %17, align 4, !tbaa !9
  %148 = load i32, ptr %20, align 4, !tbaa !9
  %149 = load i32, ptr %17, align 4, !tbaa !9
  %150 = load ptr, ptr %21, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %150, i32 0, i32 5
  %152 = load i32, ptr %151, align 4, !tbaa !19
  %153 = zext i32 %152 to i64
  %154 = mul nsw i64 16, %153
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %146, i32 noundef 4097, i32 noundef %147, i32 noundef %148, i32 noundef %149, i64 noundef %154)
  br label %155

155:                                              ; preds = %133, %128
  br label %156

156:                                              ; preds = %155, %125, %122
  br label %157

157:                                              ; preds = %156, %118
  br label %158

158:                                              ; preds = %157, %110
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 27, !13, i64 29, !7, i64 31}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !10, i64 8}
!15 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = !{!15, !10, i64 20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_norm_to_vnni2_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr nocapture noundef readnone %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr nocapture noundef readonly %7, ptr nocapture noundef readonly %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) local_unnamed_addr #0 {
  %14 = icmp eq i32 %9, 0
  %15 = select i1 %14, i32 -2055192570, i32 -1532977018
  %16 = select i1 %14, i32 127, i32 %10
  %17 = sub i32 2, %12
  %.not70 = icmp eq i32 %12, 2
  br i1 %.not70, label %.lr.ph69.peel, label %.lr.ph

.lr.ph:                                           ; preds = %13
  %18 = getelementptr inbounds i8, ptr %8, i64 8
  %19 = getelementptr inbounds i8, ptr %7, i64 8
  br label %22

.preheader:                                       ; preds = %22
  %20 = icmp ult i32 %17, 2
  br i1 %20, label %.lr.ph69.peel, label %._crit_edge

.lr.ph69.peel:                                    ; preds = %13, %.preheader
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %17, i32 noundef %17, i8 noundef zeroext 0, i32 noundef %17, i32 noundef 0, i32 noundef 2) #2
  %21 = icmp eq i32 %12, 2
  br i1 %21, label %.lr.ph69, label %._crit_edge

22:                                               ; preds = %.lr.ph, %22
  %.067 = phi i32 [ 0, %.lr.ph ], [ %28, %22 ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %15, i32 noundef %2, i32 noundef 127, i32 noundef 0, i32 noundef %.067, i32 noundef %16) #2
  %23 = load i32, ptr %18, align 1, !tbaa !5
  %24 = zext i32 %23 to i64
  %25 = load i32, ptr %19, align 4, !tbaa !11
  %26 = zext i32 %25 to i64
  %27 = mul nuw nsw i64 %26, %24
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %2, i32 noundef %6, i32 noundef %2, i64 noundef %27) #2
  %28 = add nuw i32 %.067, 1
  %exitcond.not = icmp eq i32 %28, %17
  br i1 %exitcond.not, label %.preheader, label %22, !llvm.loop !13

.lr.ph69:                                         ; preds = %.lr.ph69.peel
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef 1, i32 noundef 1, i8 noundef zeroext 0, i32 noundef 1, i32 noundef 0, i32 noundef 2) #2
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph69.peel, %.lr.ph69, %.preheader
  %29 = zext i32 %12 to i64
  %30 = sub nsw i64 2, %29
  %31 = getelementptr inbounds i8, ptr %8, i64 8
  %32 = load i32, ptr %31, align 1, !tbaa !5
  %33 = zext i32 %32 to i64
  %34 = mul nsw i64 %30, %33
  %35 = getelementptr inbounds i8, ptr %7, i64 8
  %36 = load i32, ptr %35, align 4, !tbaa !11
  %37 = zext i32 %36 to i64
  %38 = mul nsw i64 %34, %37
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %2, i32 noundef %6, i32 noundef %2, i64 noundef %38) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86007811, i32 noundef 0, i32 noundef 1, i8 noundef zeroext 0, i32 noundef 2, i32 noundef 0, i32 noundef 1) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 86008835, i32 noundef 0, i32 noundef 1, i8 noundef zeroext 0, i32 noundef 3, i32 noundef 0, i32 noundef 1) #2
  br i1 %14, label %39, label %40

39:                                               ; preds = %._crit_edge
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -444579834, i32 noundef %3, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef 127) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -444579834, i32 noundef %3, i32 noundef 127, i32 noundef 1, i32 noundef 3, i32 noundef 127) #2
  br label %54

40:                                               ; preds = %._crit_edge
  %41 = icmp ult i32 %9, 8
  br i1 %41, label %42, label %43

42:                                               ; preds = %40
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -459218810, i32 noundef %3, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef %11) #2
  br label %54

43:                                               ; preds = %40
  %44 = icmp ult i32 %9, 16
  br i1 %44, label %45, label %54

45:                                               ; preds = %43
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -444579834, i32 noundef %3, i32 noundef 127, i32 noundef 0, i32 noundef 2, i32 noundef 127) #2
  %.not = icmp eq i32 %9, 8
  br i1 %.not, label %54, label %46

46:                                               ; preds = %45
  %47 = getelementptr inbounds i8, ptr %7, i64 20
  %48 = load i32, ptr %47, align 4, !tbaa !15
  %49 = zext i32 %48 to i64
  %50 = shl nuw nsw i64 %49, 4
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %6, i32 noundef %3, i64 noundef %50) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -459218810, i32 noundef %3, i32 noundef 127, i32 noundef 0, i32 noundef 3, i32 noundef %11) #2
  %51 = load i32, ptr %47, align 4, !tbaa !15
  %52 = zext i32 %51 to i64
  %53 = shl nuw nsw i64 %52, 4
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %3, i32 noundef %6, i32 noundef %3, i64 noundef %53) #2
  br label %54

54:                                               ; preds = %42, %45, %46, %43, %39
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"libxsmm_meltw_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !10, i64 27, !10, i64 29, !8, i64 31}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!12, !7, i64 8}
!12 = !{!"libxsmm_mateltwise_kernel_config_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !7, i64 392, !7, i64 396, !7, i64 400, !7, i64 404, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !7, i64 428, !7, i64 432, !7, i64 436, !7, i64 440, !7, i64 444, !7, i64 448, !7, i64 452, !7, i64 456, !7, i64 460, !7, i64 464, !7, i64 468, !7, i64 472, !7, i64 476, !7, i64 480, !7, i64 484, !7, i64 488, !7, i64 492, !7, i64 496, !7, i64 500, !7, i64 504, !7, i64 508, !8, i64 512}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!12, !7, i64 20}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass