; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack.LUT_array = external hidden unnamed_addr constant [16 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack(ptr noundef %0, i32 noundef %1) #3 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca [16 x i32], align 16
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 64, ptr %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %5, ptr align 16 @__const.libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack.LUT_array, i64 64, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %7, i32 noundef -1568407413, i32 noundef %8, i64 noundef 524296)
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %9, i32 noundef %10)
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %11, i32 noundef -1568407413, i32 noundef %12, i64 noundef 4128831)
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %13, i32 noundef %14)
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %15, i32 noundef -1568407413, i32 noundef %16, i64 noundef 65537)
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %17, i32 noundef %18)
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %19, i32 noundef -1568407413, i32 noundef %20, i64 noundef 8323199)
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %21, i32 noundef %22)
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %23, i32 noundef -1568407413, i32 noundef %24, i64 noundef 67109888)
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %25, i32 noundef %26)
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %27, i32 noundef -1568407413, i32 noundef %28, i64 noundef 9)
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %29, i32 noundef %30)
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %31, i32 noundef -1568407413, i32 noundef %32, i64 noundef 5)
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %33, i32 noundef %34)
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %35, i32 noundef -1568407413, i32 noundef %36, i64 noundef 54526784)
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %37, i32 noundef %38)
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %39, i32 noundef -1568407413, i32 noundef %40, i64 noundef 67044351)
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %41, i32 noundef %42)
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %43, i32 noundef -1568407413, i32 noundef %44, i64 noundef 1507351)
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %45, i32 noundef %46)
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %47, i32 noundef -1568407413, i32 noundef %48, i64 noundef 2147516416)
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %49, i32 noundef %50)
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %51, i32 noundef -1568407413, i32 noundef %52, i64 noundef 2080406528)
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %53, i32 noundef %54)
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %55, i32 noundef -1568407413, i32 noundef %56, i64 noundef 120)
  %57 = load ptr, ptr %3, align 8, !tbaa !5
  %58 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %57, i32 noundef %58)
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  %60 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %59, i32 noundef -1568407413, i32 noundef %60, i64 noundef 128)
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %61, i32 noundef %62)
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %63, i32 noundef -1568407413, i32 noundef %64, i64 noundef 7)
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %65, i32 noundef %66)
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %67, i32 noundef -1568407413, i32 noundef %68, i64 noundef 127)
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %69, i32 noundef %70)
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %71, i32 noundef -1568407413, i32 noundef %72, i64 noundef 0)
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %73, i32 noundef %74)
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %75, i32 noundef -1568407413, i32 noundef %76, i64 noundef 15)
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %77, i32 noundef %78)
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %79, i32 noundef 30008, i32 noundef 4, i64 noundef 64)
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %80

80:                                               ; preds = %99, %2
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = icmp ult i32 %81, 16
  br i1 %82, label %83, label %102

83:                                               ; preds = %80
  %84 = load i32, ptr %6, align 4, !tbaa !9
  %85 = icmp ule i32 %84, 8
  br i1 %85, label %86, label %94

86:                                               ; preds = %83
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = load i32, ptr %4, align 4, !tbaa !9
  %89 = load i32, ptr %6, align 4, !tbaa !9
  %90 = zext i32 %89 to i64
  %91 = getelementptr inbounds [16 x i32], ptr %5, i64 0, i64 %90
  %92 = load i32, ptr %91, align 4, !tbaa !9
  %93 = zext i32 %92 to i64
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %87, i32 noundef -1568407413, i32 noundef %88, i64 noundef %93)
  br label %94

94:                                               ; preds = %86, %83
  %95 = load ptr, ptr %3, align 8, !tbaa !5
  %96 = load i32, ptr %6, align 4, !tbaa !9
  %97 = mul i32 %96, 4
  %98 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %95, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %97, i32 noundef %98, i32 noundef 1)
  br label %99

99:                                               ; preds = %94
  %100 = load i32, ptr %6, align 4, !tbaa !9
  %101 = add i32 %100, 1
  store i32 %101, ptr %6, align 4, !tbaa !9
  br label %80, !llvm.loop !11

102:                                              ; preds = %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 64, ptr %5) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack.LUT_array = external hidden unnamed_addr constant [16 x i32], align 16

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 524296) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 4128831) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 65537) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 8323199) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 67109888) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 9) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 5) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 54526784) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 67044351) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 1507351) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 2147516416) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 2080406528) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 120) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 128) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 7) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 127) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 0) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 15) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef 30008, i32 noundef 4, i64 noundef 64) #2
  br label %3

3:                                                ; preds = %2, %9
  %indvars.iv = phi i64 [ 0, %2 ], [ %indvars.iv.next, %9 ]
  %4 = icmp ult i64 %indvars.iv, 9
  br i1 %4, label %5, label %9

5:                                                ; preds = %3
  %6 = getelementptr inbounds [16 x i32], ptr @__const.libxsmm_generator_vcvt_hf8_tofrom_f32_avx512_prep_stack.LUT_array, i64 0, i64 %indvars.iv
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = zext i32 %7 to i64
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef %8) #2
  br label %9

9:                                                ; preds = %5, %3
  %indvars.iv.tr = trunc i64 %indvars.iv to i32
  %10 = shl i32 %indvars.iv.tr, 2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1610350453, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef %10, i32 noundef %1, i32 noundef 1) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 16
  br i1 %exitcond.not, label %11, label %3, !llvm.loop !9

11:                                               ; preds = %9
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass