; LLVM IR from abeaumont/competitive-programming :: kattis/debugging.ll (Z1dxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@cache = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z1dxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = icmp eq i64 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %3
  store i64 0, ptr %4, align 8
  br label %83

17:                                               ; preds = %3
  %18 = load i64, ptr %5, align 8, !tbaa !5
  %19 = icmp eq i64 %18, 2
  br i1 %19, label %20, label %24

20:                                               ; preds = %17
  %21 = load i64, ptr %7, align 8, !tbaa !5
  %22 = load i64, ptr %6, align 8, !tbaa !5
  %23 = add nsw i64 %21, %22
  store i64 %23, ptr %4, align 8
  br label %83

24:                                               ; preds = %17
  %25 = load i64, ptr %5, align 8, !tbaa !5
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %25) #4
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = icmp ne i64 %27, -1
  br i1 %28, label %29, label %33

29:                                               ; preds = %24
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %30) #4
  %32 = load i64, ptr %31, align 8, !tbaa !5
  store i64 %32, ptr %4, align 8
  br label %83

33:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = sub nsw i64 %34, 1
  %36 = load i64, ptr %7, align 8, !tbaa !5
  %37 = mul nsw i64 %35, %36
  %38 = load i64, ptr %6, align 8, !tbaa !5
  %39 = add nsw i64 %37, %38
  store i64 %39, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  store i64 0, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store i64 1, ptr %10, align 8, !tbaa !5
  br label %40

40:                                               ; preds = %75, %33
  %41 = load i64, ptr %10, align 8, !tbaa !5
  %42 = load i64, ptr %5, align 8, !tbaa !5
  %43 = sub nsw i64 %42, 1
  %44 = icmp slt i64 %41, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %40
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %78

46:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = load i64, ptr %10, align 8, !tbaa !5
  %49 = sub nsw i64 %48, 1
  %50 = add nsw i64 %47, %49
  %51 = load i64, ptr %10, align 8, !tbaa !5
  %52 = sdiv i64 %50, %51
  %53 = sub nsw i64 %52, 1
  store i64 %53, ptr %12, align 8, !tbaa !5
  %54 = load i64, ptr %12, align 8, !tbaa !5
  %55 = load i64, ptr %9, align 8, !tbaa !5
  %56 = icmp eq i64 %54, %55
  br i1 %56, label %57, label %58

57:                                               ; preds = %46
  store i32 4, ptr %11, align 4
  br label %72

58:                                               ; preds = %46
  %59 = load i64, ptr %12, align 8, !tbaa !5
  store i64 %59, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %60 = load i64, ptr %10, align 8, !tbaa !5
  %61 = load i64, ptr %6, align 8, !tbaa !5
  %62 = load i64, ptr %7, align 8, !tbaa !5
  %63 = call noundef i64 @_Z1dxxx(i64 noundef %60, i64 noundef %61, i64 noundef %62)
  %64 = load i64, ptr %12, align 8, !tbaa !5
  %65 = load i64, ptr %7, align 8, !tbaa !5
  %66 = mul nsw i64 %64, %65
  %67 = add nsw i64 %63, %66
  %68 = load i64, ptr %6, align 8, !tbaa !5
  %69 = add nsw i64 %67, %68
  store i64 %69, ptr %13, align 8, !tbaa !5
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %13)
  %71 = load i64, ptr %70, align 8, !tbaa !5
  store i64 %71, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  store i32 0, ptr %11, align 4
  br label %72

72:                                               ; preds = %58, %57
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  %73 = load i32, ptr %11, align 4
  switch i32 %73, label %85 [
    i32 0, label %74
    i32 4, label %75
  ]

74:                                               ; preds = %72
  br label %75

75:                                               ; preds = %74, %72
  %76 = load i64, ptr %10, align 8, !tbaa !5
  %77 = add nsw i64 %76, 1
  store i64 %77, ptr %10, align 8, !tbaa !5
  br label %40, !llvm.loop !9

78:                                               ; preds = %45
  %79 = load i64, ptr %8, align 8, !tbaa !5
  %80 = load i64, ptr %5, align 8, !tbaa !5
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %80) #4
  store i64 %79, ptr %81, align 8, !tbaa !5
  %82 = load i64, ptr %8, align 8, !tbaa !5
  store i64 %82, ptr %4, align 8
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  br label %83

83:                                               ; preds = %78, %29, %20, %16
  %84 = load i64, ptr %4, align 8
  ret i64 %84

85:                                               ; preds = %72
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@cache = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z1dxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  switch i64 %0, label %8 [
    i64 1, label %37
    i64 2, label %6
  ]

6:                                                ; preds = %3
  %7 = add nsw i64 %2, %1
  br label %37

8:                                                ; preds = %3
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %0) #3
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %.not = icmp eq i64 %10, -1
  br i1 %.not, label %14, label %11

11:                                               ; preds = %8
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %0) #3
  %13 = load i64, ptr %12, align 8, !tbaa !5
  br label %37

14:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  %15 = add i64 %0, -1
  %16 = mul nsw i64 %15, %2
  %17 = add nsw i64 %16, %1
  store i64 %17, ptr %4, align 8, !tbaa !5
  %18 = icmp sgt i64 %0, 2
  br i1 %18, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %34, %14
  %19 = phi i64 [ %17, %14 ], [ %35, %34 ]
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache, i64 noundef %0) #3
  store i64 %19, ptr %20, align 8, !tbaa !5
  %21 = load i64, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  br label %37

.lr.ph:                                           ; preds = %14, %34
  %22 = phi i64 [ %35, %34 ], [ %17, %14 ]
  %.02631 = phi i64 [ %36, %34 ], [ 1, %14 ]
  %.02730 = phi i64 [ %.1, %34 ], [ 0, %14 ]
  %23 = add i64 %15, %.02631
  %24 = sdiv i64 %23, %.02631
  %25 = add nsw i64 %24, -1
  %26 = icmp eq i64 %25, %.02730
  br i1 %26, label %34, label %27

27:                                               ; preds = %.lr.ph
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  %28 = call noundef i64 @_Z1dxxx(i64 noundef %.02631, i64 noundef %1, i64 noundef %2)
  %29 = mul nsw i64 %25, %2
  %30 = add i64 %29, %1
  %31 = add i64 %30, %28
  store i64 %31, ptr %5, align 8, !tbaa !5
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %33 = load i64, ptr %32, align 8, !tbaa !5
  store i64 %33, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  br label %34

34:                                               ; preds = %.lr.ph, %27
  %35 = phi i64 [ %33, %27 ], [ %22, %.lr.ph ]
  %.1 = phi i64 [ %25, %27 ], [ %.02730, %.lr.ph ]
  %36 = add nuw nsw i64 %.02631, 1
  %exitcond.not = icmp eq i64 %36, %15
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

37:                                               ; preds = %3, %._crit_edge, %11, %6
  %.0 = phi i64 [ %7, %6 ], [ %13, %11 ], [ %21, %._crit_edge ], [ 0, %3 ]
  ret i64 %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass