; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_common)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_gemm_apply_relu_to_vreg = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_to_vreg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #2 {
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  store ptr %0, ptr %14, align 8, !tbaa !5
  store ptr %1, ptr %15, align 8, !tbaa !5
  store i32 %2, ptr %16, align 4, !tbaa !9
  store i32 %3, ptr %17, align 4, !tbaa !9
  store i32 %4, ptr %18, align 4, !tbaa !9
  store i32 %5, ptr %19, align 4, !tbaa !9
  store i32 %6, ptr %20, align 4, !tbaa !9
  store i32 %7, ptr %21, align 4, !tbaa !9
  store i32 %8, ptr %22, align 4, !tbaa !9
  store i32 %9, ptr %23, align 4, !tbaa !9
  store i32 %10, ptr %24, align 4, !tbaa !9
  store i32 %11, ptr %25, align 4, !tbaa !9
  store i32 %12, ptr %26, align 4, !tbaa !9
  %28 = load ptr, ptr %14, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %28, i32 0, i32 6
  %30 = load i32, ptr %29, align 4, !tbaa !11
  %31 = icmp ult i32 %30, 1051
  br i1 %31, label %32, label %131

32:                                               ; preds = %13
  %33 = load i32, ptr %21, align 4, !tbaa !9
  %34 = icmp eq i32 %33, 1
  br i1 %34, label %35, label %121

35:                                               ; preds = %32
  %36 = load ptr, ptr %14, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %36, i32 0, i32 6
  %38 = load i32, ptr %37, align 4, !tbaa !11
  %39 = icmp ult i32 %38, 1005
  br i1 %39, label %40, label %91

40:                                               ; preds = %35
  %41 = load ptr, ptr %14, align 8, !tbaa !5
  %42 = load ptr, ptr %15, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %42, i32 0, i32 21
  %44 = load i8, ptr %43, align 4, !tbaa !13
  %45 = load i32, ptr %16, align 4, !tbaa !9
  %46 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %41, i32 noundef -1610346401, i8 noundef signext %44, i32 noundef %45, i32 noundef %46)
  %47 = load i32, ptr %18, align 4, !tbaa !9
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %90

49:                                               ; preds = %40
  %50 = load ptr, ptr %14, align 8, !tbaa !5
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %51, i32 0, i32 21
  %53 = load i8, ptr %52, align 4, !tbaa !13
  %54 = load i32, ptr %17, align 4, !tbaa !9
  %55 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %50, i32 noundef -1610346480, i8 noundef signext %53, i32 noundef %54, i32 noundef %55)
  %56 = load ptr, ptr %14, align 8, !tbaa !5
  %57 = load ptr, ptr %15, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %57, i32 0, i32 21
  %59 = load i8, ptr %58, align 4, !tbaa !13
  %60 = load i32, ptr %16, align 4, !tbaa !9
  %61 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %56, i32 noundef -1609822014, i8 noundef signext %59, i32 noundef %60, i32 noundef %61, i32 noundef 4)
  %62 = load ptr, ptr %14, align 8, !tbaa !5
  %63 = load ptr, ptr %15, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %63, i32 0, i32 21
  %65 = load i8, ptr %64, align 4, !tbaa !13
  %66 = load i32, ptr %24, align 4, !tbaa !9
  %67 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %62, i32 noundef -1610346416, i8 noundef signext %65, i32 noundef %66, i32 noundef %67)
  %68 = load i32, ptr %26, align 4, !tbaa !9
  %69 = icmp eq i32 %68, 0
  br i1 %69, label %70, label %75

70:                                               ; preds = %49
  %71 = load ptr, ptr %14, align 8, !tbaa !5
  %72 = load i32, ptr %19, align 4, !tbaa !9
  %73 = load i32, ptr %20, align 4, !tbaa !9
  %74 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %71, i32 noundef -1610350454, i32 noundef %72, i32 noundef 127, i32 noundef 0, i32 noundef %73, i32 noundef %74, i32 noundef 1)
  br label %89

75:                                               ; preds = %49
  %76 = load ptr, ptr %14, align 8, !tbaa !5
  %77 = load i32, ptr %19, align 4, !tbaa !9
  %78 = load i32, ptr %20, align 4, !tbaa !9
  %79 = load i32, ptr %22, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %76, i32 noundef -1610350454, i32 noundef %77, i32 noundef 127, i32 noundef 0, i32 noundef %78, i32 noundef %79, i32 noundef 0)
  %80 = load ptr, ptr %14, align 8, !tbaa !5
  %81 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %80, i32 noundef 30005, i32 noundef %81, i64 noundef 4)
  %82 = load ptr, ptr %14, align 8, !tbaa !5
  %83 = load i32, ptr %23, align 4, !tbaa !9
  %84 = load i32, ptr %22, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %82, i32 noundef -1434189815, i32 noundef %83, i32 noundef %84)
  %85 = load ptr, ptr %14, align 8, !tbaa !5
  %86 = load i32, ptr %19, align 4, !tbaa !9
  %87 = load i32, ptr %20, align 4, !tbaa !9
  %88 = load i32, ptr %22, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %85, i32 noundef -1610350454, i32 noundef %86, i32 noundef 127, i32 noundef 0, i32 noundef %87, i32 noundef %88, i32 noundef 1)
  br label %89

89:                                               ; preds = %75, %70
  br label %90

90:                                               ; preds = %89, %40
  br label %120

91:                                               ; preds = %35
  %92 = load i32, ptr %18, align 4, !tbaa !9
  %93 = icmp eq i32 %92, 1
  br i1 %93, label %94, label %112

94:                                               ; preds = %91
  %95 = load ptr, ptr %14, align 8, !tbaa !5
  %96 = load ptr, ptr %15, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %96, i32 0, i32 21
  %98 = load i8, ptr %97, align 4, !tbaa !13
  %99 = load i32, ptr %16, align 4, !tbaa !9
  %100 = load i32, ptr %17, align 4, !tbaa !9
  %101 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %95, i32 noundef 806098626, i8 noundef signext %98, i32 noundef %99, i32 noundef %100, i32 noundef %101, i32 noundef 6)
  %102 = load ptr, ptr %14, align 8, !tbaa !5
  %103 = load ptr, ptr %15, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %103, i32 0, i32 21
  %105 = load i8, ptr %104, align 4, !tbaa !13
  %106 = load i32, ptr %24, align 4, !tbaa !9
  %107 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %102, i32 noundef 1610879056, i8 noundef signext %105, i32 noundef %106, i32 noundef 255, i32 noundef %107, i32 noundef 0)
  %108 = load ptr, ptr %14, align 8, !tbaa !5
  %109 = load i32, ptr %19, align 4, !tbaa !9
  %110 = load i32, ptr %20, align 4, !tbaa !9
  %111 = load i32, ptr %23, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %108, i32 noundef -1610350454, i32 noundef %109, i32 noundef 127, i32 noundef 0, i32 noundef %110, i32 noundef %111, i32 noundef 1)
  br label %112

112:                                              ; preds = %94, %91
  %113 = load ptr, ptr %14, align 8, !tbaa !5
  %114 = load ptr, ptr %15, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %114, i32 0, i32 21
  %116 = load i8, ptr %115, align 4, !tbaa !13
  %117 = load i32, ptr %17, align 4, !tbaa !9
  %118 = load i32, ptr %16, align 4, !tbaa !9
  %119 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %113, i32 noundef 805574239, i8 noundef signext %116, i32 noundef %117, i32 noundef %118, i32 noundef %119)
  br label %120

120:                                              ; preds = %112, %90
  br label %130

121:                                              ; preds = %32
  %122 = load ptr, ptr %14, align 8, !tbaa !5
  %123 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %124 = icmp ult i32 1, %123
  br i1 %124, label %125, label %127

125:                                              ; preds = %121
  %126 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %128

127:                                              ; preds = %121
  br label %128

128:                                              ; preds = %127, %125
  %129 = phi i32 [ %126, %125 ], [ 1, %127 ]
  call void @libxsmm_handle_error(ptr noundef %122, i32 noundef 90033, ptr noundef @__func__.libxsmm_generator_gemm_apply_relu_to_vreg, ptr noundef @.str.1, i32 noundef 595, i32 noundef %129)
  br label %194

130:                                              ; preds = %120
  br label %194

131:                                              ; preds = %13
  %132 = load i32, ptr %18, align 4, !tbaa !9
  %133 = icmp eq i32 %132, 0
  br i1 %133, label %134, label %146

134:                                              ; preds = %131
  %135 = load ptr, ptr %14, align 8, !tbaa !5
  %136 = load i32, ptr %21, align 4, !tbaa !9
  %137 = icmp eq i32 %136, 1
  %138 = zext i1 %137 to i64
  %139 = select i1 %137, i32 805574239, i32 805639918
  %140 = load ptr, ptr %15, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %140, i32 0, i32 21
  %142 = load i8, ptr %141, align 4, !tbaa !13
  %143 = load i32, ptr %17, align 4, !tbaa !9
  %144 = load i32, ptr %16, align 4, !tbaa !9
  %145 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %135, i32 noundef %139, i8 noundef signext %142, i32 noundef %143, i32 noundef %144, i32 noundef %145)
  br label %193

146:                                              ; preds = %131
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  store i32 7, ptr %27, align 4, !tbaa !9
  %147 = load ptr, ptr %14, align 8, !tbaa !5
  %148 = load i32, ptr %21, align 4, !tbaa !9
  %149 = icmp eq i32 %148, 1
  %150 = zext i1 %149 to i64
  %151 = select i1 %149, i32 806098626, i32 -259180993
  %152 = load ptr, ptr %15, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %152, i32 0, i32 21
  %154 = load i8, ptr %153, align 4, !tbaa !13
  %155 = load i32, ptr %16, align 4, !tbaa !9
  %156 = load i32, ptr %17, align 4, !tbaa !9
  %157 = load i32, ptr %27, align 4, !tbaa !9
  %158 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %147, i32 noundef %151, i8 noundef signext %154, i32 noundef %155, i32 noundef %156, i32 noundef %157, i32 noundef %158, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 6)
  %159 = load ptr, ptr %14, align 8, !tbaa !5
  %160 = load i32, ptr %21, align 4, !tbaa !9
  %161 = icmp eq i32 %160, 1
  %162 = zext i1 %161 to i64
  %163 = select i1 %161, i32 -268097948, i32 -259709338
  %164 = load ptr, ptr %15, align 8, !tbaa !5
  %165 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %164, i32 0, i32 21
  %166 = load i8, ptr %165, align 4, !tbaa !13
  %167 = load i32, ptr %17, align 4, !tbaa !9
  %168 = load i32, ptr %16, align 4, !tbaa !9
  %169 = load i32, ptr %17, align 4, !tbaa !9
  %170 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef %159, i32 noundef %163, i8 noundef signext %166, i32 noundef %167, i32 noundef %168, i32 noundef %169, i32 noundef %170, i32 noundef 0)
  %171 = load ptr, ptr %14, align 8, !tbaa !5
  %172 = load i32, ptr %21, align 4, !tbaa !9
  %173 = icmp eq i32 %172, 1
  br i1 %173, label %174, label %181

174:                                              ; preds = %146
  %175 = load ptr, ptr %15, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %175, i32 0, i32 0
  %177 = load i32, ptr %176, align 8, !tbaa !17
  %178 = icmp ult i32 %177, 1101
  %179 = zext i1 %178 to i64
  %180 = select i1 %178, i32 -1610280559, i32 -1610346095
  br label %188

181:                                              ; preds = %146
  %182 = load ptr, ptr %15, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %182, i32 0, i32 0
  %184 = load i32, ptr %183, align 8, !tbaa !17
  %185 = icmp ult i32 %184, 1101
  %186 = zext i1 %185 to i64
  %187 = select i1 %185, i32 -1610346095, i32 -1601891951
  br label %188

188:                                              ; preds = %181, %174
  %189 = phi i32 [ %180, %174 ], [ %187, %181 ]
  %190 = load i32, ptr %19, align 4, !tbaa !9
  %191 = load i32, ptr %20, align 4, !tbaa !9
  %192 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_move_mem(ptr noundef %171, i32 noundef %189, i32 noundef %190, i32 noundef 127, i32 noundef 0, i32 noundef %191, i32 noundef %192)
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  br label %193

193:                                              ; preds = %188, %134
  br label %194

194:                                              ; preds = %193, %130, %128
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_mask_move_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!14, !7, i64 84}
!14 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !15, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!15 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!16 = !{!"short", !7, i64 0}
!17 = !{!14, !10, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_gemm_apply_relu_to_vreg = external hidden unnamed_addr constant [42 x i8], align 1

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_to_vreg(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) local_unnamed_addr #1 {
  %14 = getelementptr inbounds i8, ptr %0, i64 28
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp ult i32 %15, 1051
  br i1 %16, label %17, label %46

17:                                               ; preds = %13
  %18 = icmp eq i32 %7, 1
  br i1 %18, label %19, label %41

19:                                               ; preds = %17
  %20 = icmp ult i32 %15, 1005
  br i1 %20, label %21, label %32

21:                                               ; preds = %19
  %22 = getelementptr inbounds i8, ptr %1, i64 84
  %23 = load i8, ptr %22, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef -1610346401, i8 noundef signext %23, i32 noundef %2, i32 noundef %3) #2
  %24 = icmp eq i32 %4, 1
  br i1 %24, label %25, label %62

25:                                               ; preds = %21
  %26 = load i8, ptr %22, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef -1610346480, i8 noundef signext %26, i32 noundef %3, i32 noundef %10) #2
  %27 = load i8, ptr %22, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef -1609822014, i8 noundef signext %27, i32 noundef %2, i32 noundef %10, i32 noundef 4) #2
  %28 = load i8, ptr %22, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef -1610346416, i8 noundef signext %28, i32 noundef %10, i32 noundef %9) #2
  %29 = icmp eq i32 %12, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %25
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef %6, i32 noundef %9, i32 noundef 1) #2
  br label %62

31:                                               ; preds = %25
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef %6, i32 noundef %8, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef 30005, i32 noundef %9, i64 noundef 4) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef nonnull %0, i32 noundef -1434189815, i32 noundef %9, i32 noundef %8) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef %6, i32 noundef %8, i32 noundef 1) #2
  br label %62

32:                                               ; preds = %19
  %33 = icmp eq i32 %4, 1
  br i1 %33, label %34, label %38

34:                                               ; preds = %32
  %35 = getelementptr inbounds i8, ptr %1, i64 84
  %36 = load i8, ptr %35, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 806098626, i8 noundef signext %36, i32 noundef %2, i32 noundef %3, i32 noundef %10, i32 noundef 6) #2
  %37 = load i8, ptr %35, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 1610879056, i8 noundef signext %37, i32 noundef %10, i32 noundef 255, i32 noundef %9, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef nonnull %0, i32 noundef -1610350454, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef %6, i32 noundef %9, i32 noundef 1) #2
  br label %38

38:                                               ; preds = %34, %32
  %39 = getelementptr inbounds i8, ptr %1, i64 84
  %40 = load i8, ptr %39, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574239, i8 noundef signext %40, i32 noundef %3, i32 noundef %2, i32 noundef %3) #2
  br label %62

41:                                               ; preds = %17
  %42 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !15
  %43 = icmp ugt i32 %42, 1
  %44 = load i32, ptr @libxsmm_verbosity, align 4
  %45 = select i1 %43, i32 %44, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90033, ptr noundef nonnull @__func__.libxsmm_generator_gemm_apply_relu_to_vreg, ptr noundef nonnull @.str.1, i32 noundef 595, i32 noundef %45) #2
  br label %62

46:                                               ; preds = %13
  %47 = icmp eq i32 %4, 0
  %48 = icmp eq i32 %7, 1
  %49 = getelementptr inbounds i8, ptr %1, i64 84
  %50 = load i8, ptr %49, align 4, !tbaa !11
  br i1 %47, label %51, label %53

51:                                               ; preds = %46
  %52 = select i1 %48, i32 805574239, i32 805639918
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %52, i8 noundef signext %50, i32 noundef %3, i32 noundef %2, i32 noundef %3) #2
  br label %62

53:                                               ; preds = %46
  %54 = select i1 %48, i32 806098626, i32 -259180993
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef nonnull %0, i32 noundef %54, i8 noundef signext %50, i32 noundef %2, i32 noundef %3, i32 noundef 7, i32 noundef %11, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 6) #2
  %55 = select i1 %48, i32 -268097948, i32 -259709338
  %56 = load i8, ptr %49, align 4, !tbaa !11
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef nonnull %0, i32 noundef %55, i8 noundef signext %56, i32 noundef %3, i32 noundef %2, i32 noundef %3, i32 noundef 7, i32 noundef 0) #2
  %57 = load i32, ptr %1, align 8, !tbaa !16
  %58 = icmp ult i32 %57, 1101
  %59 = select i1 %58, i32 -1610280559, i32 -1610346095
  %60 = select i1 %58, i32 -1610346095, i32 -1601891951
  %61 = select i1 %48, i32 %59, i32 %60
  tail call void @libxsmm_x86_instruction_mask_move_mem(ptr noundef nonnull %0, i32 noundef %61, i32 noundef %5, i32 noundef 127, i32 noundef 0, i32 noundef %6, i32 noundef 7) #2
  br label %62

62:                                               ; preds = %51, %53, %21, %31, %30, %38, %41
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_mask_move_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !8, i64 84}
!12 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !8, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !10, i64 460, !8, i64 464, !13, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !7, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !7, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!13 = !{!"libxsmm_tile_config", !8, i64 0, !14, i64 2, !8, i64 4, !14, i64 6, !8, i64 8, !14, i64 10, !8, i64 12, !14, i64 14, !8, i64 16, !14, i64 18, !8, i64 20, !14, i64 22, !8, i64 24, !14, i64 26, !8, i64 28, !14, i64 30, !8, i64 32}
!14 = !{!"short", !8, i64 0}
!15 = !{!10, !10, i64 0}
!16 = !{!12, !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass