; LLVM IR from NVIDIA/DALI :: dali/operators/image/resize (resize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.dali::TensorShape" = type { %"struct.dali::TensorShapeBase" }
%"struct.dali::TensorShapeBase" = type { %"class.dali::SmallVector.136" }
%"class.dali::SmallVector.136" = type { %union.anon.139, i64 }
%union.anon.139 = type { %struct.anon.140, [32 x i8] }
%struct.anon.140 = type { ptr, i64 }
%"struct.dali::TensorListView" = type { %"struct.dali::TensorListViewBase" }
%"struct.dali::TensorListViewBase" = type { %"struct.dali::TensorListShape.141", %"class.std::vector.144" }
%"struct.dali::TensorListShape.141" = type { %"struct.dali::TensorListShapeBase.base.143", [4 x i8] }
%"struct.dali::TensorListShapeBase.base.143" = type <{ %"class.std::vector.85", i32 }>
%"class.std::vector.85" = type { %"struct.std::_Vector_base.86" }
%"struct.std::_Vector_base.86" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.144" = type { %"struct.std::_Vector_base.145" }
%"struct.std::_Vector_base.145" = type { %"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl" }
%"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl" = type { %"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::GPUBackend" = type { i8 }
%"class.dali::AccessOrder" = type <{ ptr, i32, [4 x i8] }>
%"class.dali::Resize.174" = type { %"class.dali::StatelessOperator.175", %"class.dali::ResizeBase.177", %"class.std::vector.72", %"class.dali::TensorList", i8, %"class.dali::ResizeAttr", %"class.dali::ResamplingFilterAttr" }
%"class.dali::StatelessOperator.175" = type { %"class.dali::Operator.176" }
%"class.dali::Operator.176" = type { %"class.dali::OperatorBase" }
%"class.dali::OperatorBase" = type { ptr, %"class.dali::OpSpec", i32, i32, %"class.std::unordered_map" }
%"class.dali::OpSpec" = type { %"class.std::__cxx11::basic_string", ptr, %"class.std::vector.28", %"class.std::map.33", %"class.std::vector.38", %"class.std::map.33", %"class.std::map.43", %"class.std::vector.48", %"class.std::vector.48", %"class.std::map.53" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.28" = type { %"struct.std::_Vector_base.29" }
%"struct.std::_Vector_base.29" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.38" = type { %"struct.std::_Vector_base.39" }
%"struct.std::_Vector_base.39" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.33" = type { %"class.std::_Rb_tree.34" }
%"class.std::_Rb_tree.34" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.43" = type { %"class.std::_Rb_tree.44" }
%"class.std::_Rb_tree.44" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.48" = type { %"struct.std::_Vector_base.49" }
%"struct.std::_Vector_base.49" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.53" = type { %"class.std::_Rb_tree.54" }
%"class.std::_Rb_tree.54" = type { %"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.dali::ResizeBase.177" = type { %"class.std::unique_ptr.178", i32, i32, %"class.dali::kernels::KernelManager" }
%"class.std::unique_ptr.178" = type { %"struct.std::__uniq_ptr_data.179" }
%"struct.std::__uniq_ptr_data.179" = type { %"class.std::__uniq_ptr_impl.180" }
%"class.std::__uniq_ptr_impl.180" = type { %"class.std::tuple.181" }
%"class.std::tuple.181" = type { %"struct.std::_Tuple_impl.182" }
%"struct.std::_Tuple_impl.182" = type { %"struct.std::_Head_base.185" }
%"struct.std::_Head_base.185" = type { ptr }
%"class.dali::kernels::KernelManager" = type { %"class.dali::SmallVector" }
%"class.dali::SmallVector" = type { %union.anon.71, i64 }
%union.anon.71 = type { %struct.anon, [24 x i8] }
%struct.anon = type { ptr, i64 }
%"class.std::vector.72" = type { %"struct.std::_Vector_base.73" }
%"struct.std::_Vector_base.73" = type { %"struct.std::_Vector_base<dali::kernels::ResamplingParams, std::allocator<dali::kernels::ResamplingParams>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::kernels::ResamplingParams, std::allocator<dali::kernels::ResamplingParams>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::kernels::ResamplingParams, std::allocator<dali::kernels::ResamplingParams>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::kernels::ResamplingParams, std::allocator<dali::kernels::ResamplingParams>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::TensorList" = type { %"class.dali::Buffer", %"class.std::vector.80", %"class.dali::TensorList<dali::CPUBackend>::State", i8, i32, i32, i32, %"class.dali::TypeInfo", %"struct.dali::TensorListShape", %"class.dali::TensorLayout", %"class.dali::AccessOrder", %"class.dali::CUDASharedEvent" }
%"class.dali::Buffer" = type <{ ptr, %"class.dali::TypeInfo", %"class.std::shared_ptr", %"class.std::function.77", i64, i64, i32, [4 x i8], %"class.dali::AccessOrder", i8, i8, [6 x i8] }>
%"class.std::shared_ptr" = type { %"class.std::__shared_ptr" }
%"class.std::__shared_ptr" = type { ptr, %"class.std::__shared_count" }
%"class.std::__shared_count" = type { ptr }
%"class.std::function.77" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.std::vector.80" = type { %"struct.std::_Vector_base.81" }
%"struct.std::_Vector_base.81" = type { %"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::TensorList<dali::CPUBackend>::State" = type { i8, i8 }
%"class.dali::TypeInfo" = type { ptr, i32, i64, %"class.std::basic_string_view" }
%"class.std::basic_string_view" = type { i64, ptr }
%"struct.dali::TensorListShape" = type { %"struct.dali::TensorListShapeBase.base", i32 }
%"struct.dali::TensorListShapeBase.base" = type <{ %"class.std::vector.85", i32 }>
%"class.dali::TensorLayout" = type { [16 x i8] }
%"class.dali::CUDASharedEvent" = type { %"class.std::shared_ptr" }
%"class.dali::ResizeAttr" = type { ptr, %"class.std::vector.90", %"class.std::vector.95", i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i8, i32, %"class.dali::TensorLayout", i32, %"class.std::vector.95", %"class.std::vector.95", %"class.std::vector.95", %"class.std::vector.95", %"class.std::vector.95", %"class.std::vector.95" }
%"class.std::vector.90" = type { %"struct.std::_Vector_base.91" }
%"struct.std::_Vector_base.91" = type { %"struct.std::_Vector_base<dali::ResizeParams, std::allocator<dali::ResizeParams>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::ResizeParams, std::allocator<dali::ResizeParams>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::ResizeParams, std::allocator<dali::ResizeParams>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::ResizeParams, std::allocator<dali::ResizeParams>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.95" = type { %"struct.std::_Vector_base.96" }
%"struct.std::_Vector_base.96" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::ResamplingFilterAttr" = type <{ %"class.std::vector.100", %"class.std::vector.100", %"class.std::vector.105", %"class.std::vector.105", %"class.std::vector.105", i32, i8, [3 x i8] }>
%"class.std::vector.100" = type { %"struct.std::_Vector_base.101" }
%"struct.std::_Vector_base.101" = type { %"struct.std::_Vector_base<dali::kernels::ResamplingFilterType, std::allocator<dali::kernels::ResamplingFilterType>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::kernels::ResamplingFilterType, std::allocator<dali::kernels::ResamplingFilterType>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::kernels::ResamplingFilterType, std::allocator<dali::kernels::ResamplingFilterType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::kernels::ResamplingFilterType, std::allocator<dali::kernels::ResamplingFilterType>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.105" = type { %"struct.std::_Vector_base.106" }
%"struct.std::_Vector_base.106" = type { %"struct.std::_Vector_base<dali::DALIInterpType, std::allocator<dali::DALIInterpType>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::DALIInterpType, std::allocator<dali::DALIInterpType>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::DALIInterpType, std::allocator<dali::DALIInterpType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::DALIInterpType, std::allocator<dali::DALIInterpType>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.14 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [154 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE = external hidden unnamed_addr constant [95 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali15TensorListShapeILin1EE10sample_dimEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4dali10is_uniformILin1EEEbRKNS_15TensorListShapeIXT_EEE(ptr noundef nonnull align 8 dereferenceable(32)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK4dali15TensorListShapeILin1EEixEl(ptr dead_on_unwind noalias writable sret(%"struct.dali::TensorShape") align 8, ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEixEi(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef) #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali4viewIiLi1ENS_10CPUBackendEEENS_14TensorListViewINS_6detail15storage_tag_mapIT1_E4typeET_XT0_EEERNS_10TensorListIS5_EE(ptr dead_on_unwind noalias writable sret(%"struct.dali::TensorListView") align 8, ptr noundef nonnull align 8 dereferenceable(304)) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(1176) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.dali::GPUBackend", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.dali::GPUBackend", align 1
  %9 = alloca ptr, align 8
  %10 = alloca %"class.dali::GPUBackend", align 1
  %11 = alloca ptr, align 8
  %12 = alloca %"struct.dali::TensorShape", align 8
  %13 = alloca i1, align 1
  %14 = alloca i1, align 1
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca %"struct.dali::TensorListView", align 8
  %18 = alloca %"class.dali::AccessOrder", align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %19 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %20, i32 noundef 0)
  store ptr %21, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %22, i32 noundef 0)
  store ptr %23, ptr %7, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %19, i64 400
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN4dali10ResizeBaseINS_10GPUBackendEE9RunResizeERNS_9WorkspaceERNS_10TensorListIS1_EERKS6_(ptr noundef nonnull align 8 dereferenceable(64) %24, ptr noundef nonnull align 8 dereferenceable(664) %25, ptr noundef nonnull align 8 dereferenceable(304) %26, ptr noundef nonnull align 8 dereferenceable(304) %27)
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = call noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %29)
  call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %28, ptr noundef nonnull align 1 dereferenceable(16) %30)
  %31 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 4
  %32 = load i8, ptr %31, align 8, !tbaa !9, !range !107, !noundef !108
  %33 = trunc i8 %32 to i1
  br i1 %33, label %34, label %112

34:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %35, i32 noundef 1)
  store ptr %36, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %37)
  store ptr %38, ptr %11, align 8, !tbaa !5
  %39 = load ptr, ptr %11, align 8, !tbaa !5
  %40 = call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %39)
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %41)
  %43 = call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %42)
  %44 = icmp eq i32 %40, %43
  store i1 false, ptr %13, align 1
  store i1 false, ptr %14, align 1
  br i1 %44, label %45, label %61

45:                                               ; preds = %34
  %46 = load ptr, ptr %11, align 8, !tbaa !5
  %47 = call noundef i32 @_ZNK4dali15TensorListShapeILin1EE10sample_dimEv(ptr noundef nonnull align 8 dereferenceable(32) %46)
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %61

49:                                               ; preds = %45
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = call noundef zeroext i1 @_ZN4dali10is_uniformILin1EEEbRKNS_15TensorListShapeIXT_EEE(ptr noundef nonnull align 8 dereferenceable(32) %50)
  br i1 %51, label %52, label %61

52:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 56, ptr %12) #6
  store i1 true, ptr %13, align 1
  %53 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZNK4dali15TensorListShapeILin1EEixEl(ptr dead_on_unwind writable sret(%"struct.dali::TensorShape") align 8 %12, ptr noundef nonnull align 8 dereferenceable(32) %53, i64 noundef 0)
  store i1 true, ptr %14, align 1
  %54 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEixEi(ptr noundef nonnull align 8 dereferenceable(56) %12, i32 noundef 0)
          to label %55 unwind label %65

55:                                               ; preds = %52
  %56 = load i64, ptr %54, align 8, !tbaa !109
  %57 = invoke noundef i32 @_ZNK4dali6ResizeINS_10GPUBackendEE14NumSpatialDimsEv(ptr noundef nonnull align 8 dereferenceable(1176) %19)
          to label %58 unwind label %65

58:                                               ; preds = %55
  %59 = sext i32 %57 to i64
  %60 = icmp eq i64 %56, %59
  br label %61

61:                                               ; preds = %58, %49, %45, %34
  %62 = phi i1 [ false, %49 ], [ false, %45 ], [ false, %34 ], [ %60, %58 ]
  br i1 %62, label %63, label %64

63:                                               ; preds = %61
  br label %71

64:                                               ; preds = %61
  call void @__assert_fail(ptr noundef @.str.20, ptr noundef @.str.14, i32 noundef 96, ptr noundef @__PRETTY_FUNCTION__._ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE) #7
  unreachable

65:                                               ; preds = %55, %52
  %66 = landingpad { ptr, i32 }
          cleanup
  %67 = extractvalue { ptr, i32 } %66, 0
  store ptr %67, ptr %15, align 8
  %68 = extractvalue { ptr, i32 } %66, 1
  store i32 %68, ptr %16, align 4
  %69 = load i1, ptr %14, align 1
  br i1 %69, label %82, label %83

70:                                               ; No predecessors!
  br label %71

71:                                               ; preds = %70, %63
  %72 = load i1, ptr %14, align 1
  br i1 %72, label %73, label %74

73:                                               ; preds = %71
  call void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %12) #6
  br label %74

74:                                               ; preds = %73, %71
  %75 = load i1, ptr %13, align 1
  br i1 %75, label %76, label %77

76:                                               ; preds = %74
  call void @llvm.lifetime.end.p0(i64 56, ptr %12) #6
  br label %77

77:                                               ; preds = %76, %74
  %78 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 3
  %79 = call noundef zeroext i1 @_ZNK4dali10TensorListINS_10CPUBackendEE8has_dataEv(ptr noundef nonnull align 8 dereferenceable(304) %78)
  br i1 %79, label %87, label %80

80:                                               ; preds = %77
  %81 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 3
  call void @_ZN4dali10TensorListINS_10CPUBackendEE10set_pinnedEb(ptr noundef nonnull align 8 dereferenceable(304) %81, i1 noundef zeroext true)
  br label %87

82:                                               ; preds = %65
  call void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %12) #6
  br label %83

83:                                               ; preds = %82, %65
  %84 = load i1, ptr %13, align 1
  br i1 %84, label %85, label %86

85:                                               ; preds = %83
  call void @llvm.lifetime.end.p0(i64 56, ptr %12) #6
  br label %86

86:                                               ; preds = %85, %83
  br label %111

87:                                               ; preds = %80, %77
  %88 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 3
  %89 = load ptr, ptr %9, align 8, !tbaa !5
  %90 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %89)
  call void @_ZN4dali10TensorListINS_10CPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304) %88, ptr noundef nonnull align 8 dereferenceable(32) %90, i32 noundef 6, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 56, ptr %17) #6
  %91 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 3
  call void @_ZN4dali4viewIiLi1ENS_10CPUBackendEEENS_14TensorListViewINS_6detail15storage_tag_mapIT1_E4typeET_XT0_EEERNS_10TensorListIS5_EE(ptr dead_on_unwind writable sret(%"struct.dali::TensorListView") align 8 %17, ptr noundef nonnull align 8 dereferenceable(304) %91)
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %92)
          to label %94 unwind label %107

94:                                               ; preds = %87
  invoke void @_ZNK4dali6ResizeINS_10GPUBackendEE9SaveAttrsERKNS_14TensorListViewINS_10StorageCPUEiLi1EEERKNS_15TensorListShapeILin1EEE(ptr noundef nonnull align 8 dereferenceable(1176) %19, ptr noundef nonnull align 8 dereferenceable(56) %17, ptr noundef nonnull align 8 dereferenceable(32) %93)
          to label %95 unwind label %107

95:                                               ; preds = %94
  %96 = load ptr, ptr %9, align 8, !tbaa !5
  %97 = getelementptr inbounds %"class.dali::Resize.174", ptr %19, i32 0, i32 3
  %98 = load ptr, ptr %4, align 8, !tbaa !5
  %99 = invoke noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %98)
          to label %100 unwind label %107

100:                                              ; preds = %95
  invoke void @_ZN4dali11AccessOrderC1EP11CUstream_st(ptr noundef nonnull align 8 dereferenceable(12) %18, ptr noundef %99)
          to label %101 unwind label %107

101:                                              ; preds = %100
  %102 = getelementptr inbounds { ptr, i32 }, ptr %18, i32 0, i32 0
  %103 = load ptr, ptr %102, align 8
  %104 = getelementptr inbounds { ptr, i32 }, ptr %18, i32 0, i32 1
  %105 = load i32, ptr %104, align 8
  invoke void @_ZN4dali10TensorListINS_10GPUBackendEE4CopyINS_10CPUBackendEEEvRKNS0_IT_EENS_11AccessOrderEb(ptr noundef nonnull align 8 dereferenceable(304) %96, ptr noundef nonnull align 8 dereferenceable(304) %97, ptr %103, i32 %105, i1 noundef zeroext false)
          to label %106 unwind label %107

106:                                              ; preds = %101
  call void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %17) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  br label %112

107:                                              ; preds = %101, %100, %95, %94, %87
  %108 = landingpad { ptr, i32 }
          cleanup
  %109 = extractvalue { ptr, i32 } %108, 0
  store ptr %109, ptr %15, align 8
  %110 = extractvalue { ptr, i32 } %108, 1
  store i32 %110, ptr %16, align 4
  call void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %17) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr %17) #6
  br label %111

111:                                              ; preds = %107, %86
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br label %113

112:                                              ; preds = %106, %2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret void

113:                                              ; preds = %111
  %114 = load ptr, ptr %15, align 8
  %115 = load i32, ptr %16, align 4
  %116 = insertvalue { ptr, i32 } poison, ptr %114, 0
  %117 = insertvalue { ptr, i32 } %116, i32 %115, 1
  resume { ptr, i32 } %117
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #1 align 2

declare void @_ZN4dali10ResizeBaseINS_10GPUBackendEE9RunResizeERNS_9WorkspaceERNS_10TensorListIS1_EERKS6_(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(664), ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) #5

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali6ResizeINS_10GPUBackendEE14NumSpatialDimsEv(ptr noundef nonnull align 8 dereferenceable(1176)) #2 align 2

declare noundef zeroext i1 @_ZNK4dali10TensorListINS_10CPUBackendEE8has_dataEv(ptr noundef nonnull align 8 dereferenceable(304)) #5

declare void @_ZN4dali10TensorListINS_10CPUBackendEE10set_pinnedEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) #5

declare void @_ZN4dali10TensorListINS_10CPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i32 noundef) #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK4dali6ResizeINS_10GPUBackendEE9SaveAttrsERKNS_14TensorListViewINS_10StorageCPUEiLi1EEERKNS_15TensorListShapeILin1EEE(ptr noundef nonnull align 8 dereferenceable(1176), ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE4CopyINS_10CPUBackendEEEvRKNS0_IT_EENS_11AccessOrderEb(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304), ptr, i32, i1 noundef zeroext) #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) #1 align 2

declare void @_ZN4dali11AccessOrderC1EP11CUstream_st(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef) unnamed_addr #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !74, i64 792}
!10 = !{!"_ZTSN4dali6ResizeINS_10GPUBackendEEE", !11, i64 0, !50, i64 400, !59, i64 464, !63, i64 488, !74, i64 792, !88, i64 800, !98, i64 1048}
!11 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !12, i64 0}
!12 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !13, i64 0}
!13 = !{!"_ZTSN4dali12OperatorBaseE", !14, i64 8, !44, i64 336, !44, i64 340, !45, i64 344}
!14 = !{!"_ZTSN4dali6OpSpecE", !15, i64 0, !6, i64 32, !18, i64 40, !22, i64 64, !30, i64 112, !22, i64 136, !34, i64 184, !37, i64 232, !37, i64 256, !41, i64 280}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !16, i64 0, !17, i64 8, !7, i64 16}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !23, i64 0}
!23 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !24, i64 0}
!24 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!25 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !26, i64 0}
!26 = !{!"_ZTSSt4lessIvE"}
!27 = !{!"_ZTSSt15_Rb_tree_header", !28, i64 0, !17, i64 32}
!28 = !{!"_ZTSSt18_Rb_tree_node_base", !29, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!29 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!30 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!34 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !35, i64 0}
!35 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !36, i64 0}
!36 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!37 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !42, i64 0}
!42 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !43, i64 0}
!43 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !25, i64 0, !27, i64 8}
!44 = !{!"int", !7, i64 0}
!45 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !46, i64 0}
!46 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !17, i64 8, !47, i64 16, !17, i64 24, !48, i64 32, !6, i64 48}
!47 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!48 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !49, i64 0, !17, i64 8}
!49 = !{!"float", !7, i64 0}
!50 = !{!"_ZTSN4dali10ResizeBaseINS_10GPUBackendEEE", !51, i64 0, !44, i64 8, !44, i64 12, !57, i64 16}
!51 = !{!"_ZTSSt10unique_ptrIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EE", !52, i64 0}
!52 = !{!"_ZTSSt15__uniq_ptr_dataIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_ELb1ELb1EE", !53, i64 0}
!53 = !{!"_ZTSSt15__uniq_ptr_implIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EE", !54, i64 0}
!54 = !{!"_ZTSSt5tupleIJPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EEE", !55, i64 0}
!55 = !{!"_ZTSSt11_Tuple_implILm0EJPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EEE", !56, i64 0}
!56 = !{!"_ZTSSt10_Head_baseILm0EPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplELb0EE", !6, i64 0}
!57 = !{!"_ZTSN4dali7kernels13KernelManagerE", !58, i64 0}
!58 = !{!"_ZTSN4dali11SmallVectorINS_7kernels17AnyKernelInstanceELm1ESaIS2_EEE", !7, i64 0, !17, i64 40}
!59 = !{!"_ZTSSt6vectorIN4dali7kernels16ResamplingParamsESaIS2_EE", !60, i64 0}
!60 = !{!"_ZTSSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE12_Vector_implE", !62, i64 0}
!62 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!63 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEEE", !64, i64 0, !75, i64 144, !79, i64 168, !74, i64 170, !44, i64 172, !44, i64 176, !44, i64 180, !65, i64 184, !80, i64 224, !86, i64 256, !73, i64 272, !87, i64 288}
!64 = !{!"_ZTSN4dali6BufferINS_10CPUBackendEEE", !65, i64 8, !68, i64 48, !71, i64 64, !17, i64 96, !17, i64 104, !44, i64 112, !73, i64 120, !74, i64 136, !74, i64 137}
!65 = !{!"_ZTSN4dali8TypeInfoE", !6, i64 0, !66, i64 8, !17, i64 16, !67, i64 24}
!66 = !{!"_ZTS13_DALIDataType", !7, i64 0}
!67 = !{!"_ZTSSt17basic_string_viewIcSt11char_traitsIcEE", !17, i64 0, !6, i64 8}
!68 = !{!"_ZTSSt10shared_ptrIvE", !69, i64 0}
!69 = !{!"_ZTSSt12__shared_ptrIvLN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0, !70, i64 8}
!70 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0}
!71 = !{!"_ZTSSt8functionIFSt10shared_ptrIhEmEE", !72, i64 0, !6, i64 24}
!72 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!73 = !{!"_ZTSN4dali11AccessOrderE", !6, i64 0, !44, i64 8}
!74 = !{!"bool", !7, i64 0}
!75 = !{!"_ZTSSt6vectorIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !76, i64 0}
!76 = !{!"_ZTSSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !77, i64 0}
!77 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE12_Vector_implE", !78, i64 0}
!78 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!79 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEE5StateE", !74, i64 0, !74, i64 1}
!80 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !81, i64 0, !44, i64 28}
!81 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !82, i64 0, !44, i64 24}
!82 = !{!"_ZTSSt6vectorIlSaIlEE", !83, i64 0}
!83 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !84, i64 0}
!84 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !85, i64 0}
!85 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!86 = !{!"_ZTSN4dali12TensorLayoutE", !7, i64 0}
!87 = !{!"_ZTSN4dali15CUDASharedEventE", !68, i64 0}
!88 = !{!"_ZTSN4dali10ResizeAttrE", !89, i64 8, !93, i64 32, !74, i64 56, !74, i64 57, !74, i64 58, !74, i64 59, !74, i64 60, !74, i64 61, !74, i64 62, !74, i64 63, !74, i64 64, !74, i64 65, !44, i64 68, !44, i64 72, !74, i64 76, !97, i64 80, !86, i64 84, !44, i64 100, !93, i64 104, !93, i64 128, !93, i64 152, !93, i64 176, !93, i64 200, !93, i64 224}
!89 = !{!"_ZTSSt6vectorIN4dali12ResizeParamsESaIS1_EE", !90, i64 0}
!90 = !{!"_ZTSSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE", !91, i64 0}
!91 = !{!"_ZTSNSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE12_Vector_implE", !92, i64 0}
!92 = !{!"_ZTSNSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!93 = !{!"_ZTSSt6vectorIfSaIfEE", !94, i64 0}
!94 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !95, i64 0}
!95 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !96, i64 0}
!96 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!97 = !{!"_ZTSN4dali10ResizeModeE", !7, i64 0}
!98 = !{!"_ZTSN4dali20ResamplingFilterAttrE", !99, i64 0, !99, i64 24, !103, i64 48, !103, i64 72, !103, i64 96, !66, i64 120, !74, i64 124}
!99 = !{!"_ZTSSt6vectorIN4dali7kernels20ResamplingFilterTypeESaIS2_EE", !100, i64 0}
!100 = !{!"_ZTSSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE", !101, i64 0}
!101 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE12_Vector_implE", !102, i64 0}
!102 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!103 = !{!"_ZTSSt6vectorIN4dali14DALIInterpTypeESaIS1_EE", !104, i64 0}
!104 = !{!"_ZTSSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE", !105, i64 0}
!105 = !{!"_ZTSNSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE12_Vector_implE", !106, i64 0}
!106 = !{!"_ZTSNSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!107 = !{i8 0, i8 2}
!108 = !{}
!109 = !{!17, !17, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.dali::TensorShape" = type { %"struct.dali::TensorShapeBase" }
%"struct.dali::TensorShapeBase" = type { %"class.dali::SmallVector.136" }
%"class.dali::SmallVector.136" = type { %union.anon.139, i64 }
%union.anon.139 = type { %struct.anon.140, [32 x i8] }
%struct.anon.140 = type { ptr, i64 }
%"struct.dali::TensorListView" = type { %"struct.dali::TensorListViewBase" }
%"struct.dali::TensorListViewBase" = type { %"struct.dali::TensorListShape.141", %"class.std::vector.144" }
%"struct.dali::TensorListShape.141" = type { %"struct.dali::TensorListShapeBase.base.143", [4 x i8] }
%"struct.dali::TensorListShapeBase.base.143" = type <{ %"class.std::vector.85", i32 }>
%"class.std::vector.85" = type { %"struct.std::_Vector_base.86" }
%"struct.std::_Vector_base.86" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.144" = type { %"struct.std::_Vector_base.145" }
%"struct.std::_Vector_base.145" = type { %"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl" }
%"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl" = type { %"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int *, std::allocator<int *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::AccessOrder" = type <{ ptr, i32, [4 x i8] }>

@.str.14 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [154 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE = external hidden unnamed_addr constant [95 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali15TensorListShapeILin1EE10sample_dimEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4dali10is_uniformILin1EEEbRKNS_15TensorListShapeIXT_EEE(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK4dali15TensorListShapeILin1EEixEl(ptr dead_on_unwind noalias writable sret(%"struct.dali::TensorShape") align 8, ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEixEi(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali4viewIiLi1ENS_10CPUBackendEEENS_14TensorListViewINS_6detail15storage_tag_mapIT1_E4typeET_XT0_EEERNS_10TensorListIS5_EE(ptr dead_on_unwind noalias writable sret(%"struct.dali::TensorListView") align 8, ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(1176) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"struct.dali::TensorShape", align 8
  %4 = alloca %"struct.dali::TensorListView", align 8
  %5 = alloca %"class.dali::AccessOrder", align 8
  %6 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %7 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %8 = getelementptr inbounds i8, ptr %0, i64 400
  tail call void @_ZN4dali10ResizeBaseINS_10GPUBackendEE9RunResizeERNS_9WorkspaceERNS_10TensorListIS1_EERKS6_(ptr noundef nonnull align 8 dereferenceable(64) %8, ptr noundef nonnull align 8 dereferenceable(664) %1, ptr noundef nonnull align 8 dereferenceable(304) %7, ptr noundef nonnull align 8 dereferenceable(304) %6)
  %9 = tail call noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %6)
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %7, ptr noundef nonnull align 1 dereferenceable(16) %9)
  %10 = getelementptr inbounds i8, ptr %0, i64 792
  %11 = load i8, ptr %10, align 8, !tbaa !5, !range !106, !noundef !107
  %12 = trunc nuw i8 %11 to i1
  br i1 %12, label %13, label %52

13:                                               ; preds = %2
  %14 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 1)
  %15 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %14)
  %16 = tail call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %15)
  %17 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %6)
  %18 = tail call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %17)
  %19 = icmp eq i32 %16, %18
  br i1 %19, label %20, label %.critedge

20:                                               ; preds = %13
  %21 = tail call noundef i32 @_ZNK4dali15TensorListShapeILin1EE10sample_dimEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  %22 = icmp eq i32 %21, 1
  br i1 %22, label %23, label %.critedge

23:                                               ; preds = %20
  %24 = tail call noundef zeroext i1 @_ZN4dali10is_uniformILin1EEEbRKNS_15TensorListShapeIXT_EEE(ptr noundef nonnull align 8 dereferenceable(32) %15)
  br i1 %24, label %25, label %.critedge

25:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %3) #6
  call void @_ZNK4dali15TensorListShapeILin1EEixEl(ptr dead_on_unwind nonnull writable sret(%"struct.dali::TensorShape") align 8 %3, ptr noundef nonnull align 8 dereferenceable(32) %15, i64 noundef 0)
  %26 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEixEi(ptr noundef nonnull align 8 dereferenceable(56) %3, i32 noundef 0)
          to label %27 unwind label %32

27:                                               ; preds = %25
  %28 = load i64, ptr %26, align 8, !tbaa !108
  %29 = call noundef i32 @_ZNK4dali6ResizeINS_10GPUBackendEE14NumSpatialDimsEv(ptr noundef nonnull align 8 dereferenceable(1176) %0)
  %30 = sext i32 %29 to i64
  %31 = icmp eq i64 %28, %30
  br i1 %31, label %34, label %.critedge

.critedge:                                        ; preds = %23, %20, %13, %27
  call void @__assert_fail(ptr noundef nonnull @.str.20, ptr noundef nonnull @.str.14, i32 noundef 96, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4dali6ResizeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE) #7
  unreachable

32:                                               ; preds = %25
  %33 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %3) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %3) #6
  br label %51

34:                                               ; preds = %27
  call void @_ZN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %3) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %3) #6
  %35 = getelementptr inbounds i8, ptr %0, i64 488
  %36 = call noundef zeroext i1 @_ZNK4dali10TensorListINS_10CPUBackendEE8has_dataEv(ptr noundef nonnull align 8 dereferenceable(304) %35)
  br i1 %36, label %38, label %37

37:                                               ; preds = %34
  call void @_ZN4dali10TensorListINS_10CPUBackendEE10set_pinnedEb(ptr noundef nonnull align 8 dereferenceable(304) %35, i1 noundef zeroext true)
  br label %38

38:                                               ; preds = %37, %34
  %39 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %14)
  call void @_ZN4dali10TensorListINS_10CPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304) %35, ptr noundef nonnull align 8 dereferenceable(32) %39, i32 noundef 6, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %4) #6
  call void @_ZN4dali4viewIiLi1ENS_10CPUBackendEEENS_14TensorListViewINS_6detail15storage_tag_mapIT1_E4typeET_XT0_EEERNS_10TensorListIS5_EE(ptr dead_on_unwind nonnull writable sret(%"struct.dali::TensorListView") align 8 %4, ptr noundef nonnull align 8 dereferenceable(304) %35)
  %40 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %6)
  invoke void @_ZNK4dali6ResizeINS_10GPUBackendEE9SaveAttrsERKNS_14TensorListViewINS_10StorageCPUEiLi1EEERKNS_15TensorListShapeILin1EEE(ptr noundef nonnull align 8 dereferenceable(1176) %0, ptr noundef nonnull align 8 dereferenceable(56) %4, ptr noundef nonnull align 8 dereferenceable(32) %40)
          to label %41 unwind label %49

41:                                               ; preds = %38
  %42 = invoke noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %1)
          to label %43 unwind label %49

43:                                               ; preds = %41
  invoke void @_ZN4dali11AccessOrderC1EP11CUstream_st(ptr noundef nonnull align 8 dereferenceable(12) %5, ptr noundef %42)
          to label %44 unwind label %49

44:                                               ; preds = %43
  %45 = load ptr, ptr %5, align 8
  %46 = getelementptr inbounds i8, ptr %5, i64 8
  %47 = load i32, ptr %46, align 8
  invoke void @_ZN4dali10TensorListINS_10GPUBackendEE4CopyINS_10CPUBackendEEEvRKNS0_IT_EENS_11AccessOrderEb(ptr noundef nonnull align 8 dereferenceable(304) %14, ptr noundef nonnull align 8 dereferenceable(304) %35, ptr %45, i32 %47, i1 noundef zeroext false)
          to label %48 unwind label %49

48:                                               ; preds = %44
  call void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %4) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %4) #6
  br label %52

49:                                               ; preds = %44, %43, %41, %38
  %50 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4dali18TensorListViewBaseINS_10StorageCPUEiLi1EED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %4) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %4) #6
  br label %51

51:                                               ; preds = %32, %49
  %.pn = phi { ptr, i32 } [ %50, %49 ], [ %33, %32 ]
  resume { ptr, i32 } %.pn

52:                                               ; preds = %48, %2
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

declare void @_ZN4dali10ResizeBaseINS_10GPUBackendEE9RunResizeERNS_9WorkspaceERNS_10TensorListIS1_EERKS6_(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(664), ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #5

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali6ResizeINS_10GPUBackendEE14NumSpatialDimsEv(ptr noundef nonnull align 8 dereferenceable(1176)) local_unnamed_addr #2 align 2

declare noundef zeroext i1 @_ZNK4dali10TensorListINS_10CPUBackendEE8has_dataEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #5

declare void @_ZN4dali10TensorListINS_10CPUBackendEE10set_pinnedEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) local_unnamed_addr #5

declare void @_ZN4dali10TensorListINS_10CPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK4dali6ResizeINS_10GPUBackendEE9SaveAttrsERKNS_14TensorListViewINS_10StorageCPUEiLi1EEERKNS_15TensorListShapeILin1EEE(ptr noundef nonnull align 8 dereferenceable(1176), ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE4CopyINS_10CPUBackendEEEvRKNS0_IT_EENS_11AccessOrderEb(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304), ptr, i32, i1 noundef zeroext) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #1 align 2

declare void @_ZN4dali11AccessOrderC1EP11CUstream_st(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef) unnamed_addr #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !73, i64 792}
!6 = !{!"_ZTSN4dali6ResizeINS_10GPUBackendEEE", !7, i64 0, !49, i64 400, !58, i64 464, !62, i64 488, !73, i64 792, !87, i64 800, !97, i64 1048}
!7 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !8, i64 0}
!8 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !9, i64 0}
!9 = !{!"_ZTSN4dali12OperatorBaseE", !10, i64 8, !43, i64 336, !43, i64 340, !44, i64 344}
!10 = !{!"_ZTSN4dali6OpSpecE", !11, i64 0, !13, i64 32, !17, i64 40, !21, i64 64, !29, i64 112, !21, i64 136, !33, i64 184, !36, i64 232, !36, i64 256, !40, i64 280}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !16, i64 8, !14, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !14, i64 0}
!14 = !{!"omnipotent char", !15, i64 0}
!15 = !{!"Simple C++ TBAA"}
!16 = !{!"long", !14, i64 0}
!17 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!21 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !22, i64 0}
!22 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !23, i64 0}
!23 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!24 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !25, i64 0}
!25 = !{!"_ZTSSt4lessIvE"}
!26 = !{!"_ZTSSt15_Rb_tree_header", !27, i64 0, !16, i64 32}
!27 = !{!"_ZTSSt18_Rb_tree_node_base", !28, i64 0, !13, i64 8, !13, i64 16, !13, i64 24}
!28 = !{!"_ZTSSt14_Rb_tree_color", !14, i64 0}
!29 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!33 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !34, i64 0}
!34 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !35, i64 0}
!35 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!36 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!40 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !41, i64 0}
!41 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !42, i64 0}
!42 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !24, i64 0, !26, i64 8}
!43 = !{!"int", !14, i64 0}
!44 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !45, i64 0}
!45 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !13, i64 0, !16, i64 8, !46, i64 16, !16, i64 24, !47, i64 32, !13, i64 48}
!46 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !13, i64 0}
!47 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !48, i64 0, !16, i64 8}
!48 = !{!"float", !14, i64 0}
!49 = !{!"_ZTSN4dali10ResizeBaseINS_10GPUBackendEEE", !50, i64 0, !43, i64 8, !43, i64 12, !56, i64 16}
!50 = !{!"_ZTSSt10unique_ptrIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EE", !51, i64 0}
!51 = !{!"_ZTSSt15__uniq_ptr_dataIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_ELb1ELb1EE", !52, i64 0}
!52 = !{!"_ZTSSt15__uniq_ptr_implIN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EE", !53, i64 0}
!53 = !{!"_ZTSSt5tupleIJPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EEE", !54, i64 0}
!54 = !{!"_ZTSSt11_Tuple_implILm0EJPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplESt14default_deleteIS4_EEE", !55, i64 0}
!55 = !{!"_ZTSSt10_Head_baseILm0EPN4dali10ResizeBaseINS0_10GPUBackendEE4ImplELb0EE", !13, i64 0}
!56 = !{!"_ZTSN4dali7kernels13KernelManagerE", !57, i64 0}
!57 = !{!"_ZTSN4dali11SmallVectorINS_7kernels17AnyKernelInstanceELm1ESaIS2_EEE", !14, i64 0, !16, i64 40}
!58 = !{!"_ZTSSt6vectorIN4dali7kernels16ResamplingParamsESaIS2_EE", !59, i64 0}
!59 = !{!"_ZTSSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE12_Vector_implE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels16ResamplingParamsESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!62 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEEE", !63, i64 0, !74, i64 144, !78, i64 168, !73, i64 170, !43, i64 172, !43, i64 176, !43, i64 180, !64, i64 184, !79, i64 224, !85, i64 256, !72, i64 272, !86, i64 288}
!63 = !{!"_ZTSN4dali6BufferINS_10CPUBackendEEE", !64, i64 8, !67, i64 48, !70, i64 64, !16, i64 96, !16, i64 104, !43, i64 112, !72, i64 120, !73, i64 136, !73, i64 137}
!64 = !{!"_ZTSN4dali8TypeInfoE", !13, i64 0, !65, i64 8, !16, i64 16, !66, i64 24}
!65 = !{!"_ZTS13_DALIDataType", !14, i64 0}
!66 = !{!"_ZTSSt17basic_string_viewIcSt11char_traitsIcEE", !16, i64 0, !13, i64 8}
!67 = !{!"_ZTSSt10shared_ptrIvE", !68, i64 0}
!68 = !{!"_ZTSSt12__shared_ptrIvLN9__gnu_cxx12_Lock_policyE2EE", !13, i64 0, !69, i64 8}
!69 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !13, i64 0}
!70 = !{!"_ZTSSt8functionIFSt10shared_ptrIhEmEE", !71, i64 0, !13, i64 24}
!71 = !{!"_ZTSSt14_Function_base", !14, i64 0, !13, i64 16}
!72 = !{!"_ZTSN4dali11AccessOrderE", !13, i64 0, !43, i64 8}
!73 = !{!"bool", !14, i64 0}
!74 = !{!"_ZTSSt6vectorIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !75, i64 0}
!75 = !{!"_ZTSSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !76, i64 0}
!76 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE12_Vector_implE", !77, i64 0}
!77 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!78 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEE5StateE", !73, i64 0, !73, i64 1}
!79 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !80, i64 0, !43, i64 28}
!80 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !81, i64 0, !43, i64 24}
!81 = !{!"_ZTSSt6vectorIlSaIlEE", !82, i64 0}
!82 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !83, i64 0}
!83 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !84, i64 0}
!84 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!85 = !{!"_ZTSN4dali12TensorLayoutE", !14, i64 0}
!86 = !{!"_ZTSN4dali15CUDASharedEventE", !67, i64 0}
!87 = !{!"_ZTSN4dali10ResizeAttrE", !88, i64 8, !92, i64 32, !73, i64 56, !73, i64 57, !73, i64 58, !73, i64 59, !73, i64 60, !73, i64 61, !73, i64 62, !73, i64 63, !73, i64 64, !73, i64 65, !43, i64 68, !43, i64 72, !73, i64 76, !96, i64 80, !85, i64 84, !43, i64 100, !92, i64 104, !92, i64 128, !92, i64 152, !92, i64 176, !92, i64 200, !92, i64 224}
!88 = !{!"_ZTSSt6vectorIN4dali12ResizeParamsESaIS1_EE", !89, i64 0}
!89 = !{!"_ZTSSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE", !90, i64 0}
!90 = !{!"_ZTSNSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE12_Vector_implE", !91, i64 0}
!91 = !{!"_ZTSNSt12_Vector_baseIN4dali12ResizeParamsESaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!92 = !{!"_ZTSSt6vectorIfSaIfEE", !93, i64 0}
!93 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !94, i64 0}
!94 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !95, i64 0}
!95 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!96 = !{!"_ZTSN4dali10ResizeModeE", !14, i64 0}
!97 = !{!"_ZTSN4dali20ResamplingFilterAttrE", !98, i64 0, !98, i64 24, !102, i64 48, !102, i64 72, !102, i64 96, !65, i64 120, !73, i64 124}
!98 = !{!"_ZTSSt6vectorIN4dali7kernels20ResamplingFilterTypeESaIS2_EE", !99, i64 0}
!99 = !{!"_ZTSSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE", !100, i64 0}
!100 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE12_Vector_implE", !101, i64 0}
!101 = !{!"_ZTSNSt12_Vector_baseIN4dali7kernels20ResamplingFilterTypeESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!102 = !{!"_ZTSSt6vectorIN4dali14DALIInterpTypeESaIS1_EE", !103, i64 0}
!103 = !{!"_ZTSSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE", !104, i64 0}
!104 = !{!"_ZTSNSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE12_Vector_implE", !105, i64 0}
!105 = !{!"_ZTSNSt12_Vector_baseIN4dali14DALIInterpTypeESaIS1_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!106 = !{i8 0, i8 2}
!107 = !{}
!108 = !{!16, !16, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass