; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseImageSaveJpeg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::BitBuf" = type { i32, [2048 x [2 x i16]] }

@_ZN4Simd4Base10HuffmanYdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base11HuffmanUVdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base10HuffmanYacE = external dso_local constant [256 x [2 x i16]], align 16
@_ZN4Simd4Base11HuffmanUVacE = external dso_local constant [256 x [2 x i16]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8RgbToYuvEPKhS2_S2_iiiPfS3_S3_i(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196), ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196)) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196), i32 noundef) #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18JpegWriteBlockFullERNS_18OutputMemoryStreamEiiPKhS4_S4_iPKfS6_Pi(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #2 {
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca [64 x float], align 16
  %25 = alloca [64 x float], align 16
  %26 = alloca [64 x float], align 16
  %27 = alloca i8, align 1
  %28 = alloca %"struct.Simd::Base::BitBuf", align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i32 %1, ptr %12, align 4, !tbaa !9
  store i32 %2, ptr %13, align 4, !tbaa !9
  store ptr %3, ptr %14, align 8, !tbaa !5
  store ptr %4, ptr %15, align 8, !tbaa !5
  store ptr %5, ptr %16, align 8, !tbaa !5
  store i32 %6, ptr %17, align 4, !tbaa !9
  store ptr %7, ptr %18, align 8, !tbaa !5
  store ptr %8, ptr %19, align 8, !tbaa !5
  store ptr %9, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  %32 = load ptr, ptr %20, align 8, !tbaa !5
  %33 = getelementptr inbounds i32, ptr %32, i64 0
  store ptr %33, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #4
  %34 = load ptr, ptr %20, align 8, !tbaa !5
  %35 = getelementptr inbounds i32, ptr %34, i64 1
  store ptr %35, ptr %22, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #4
  %36 = load ptr, ptr %20, align 8, !tbaa !5
  %37 = getelementptr inbounds i32, ptr %36, i64 2
  store ptr %37, ptr %23, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 256, ptr %24) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr %25) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr %26) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %27) #4
  %38 = load ptr, ptr %14, align 8, !tbaa !5
  %39 = load ptr, ptr %15, align 8, !tbaa !5
  %40 = icmp eq ptr %38, %39
  br i1 %40, label %41, label %45

41:                                               ; preds = %10
  %42 = load ptr, ptr %14, align 8, !tbaa !5
  %43 = load ptr, ptr %16, align 8, !tbaa !5
  %44 = icmp eq ptr %42, %43
  br label %45

45:                                               ; preds = %41, %10
  %46 = phi i1 [ false, %10 ], [ %44, %41 ]
  %47 = zext i1 %46 to i8
  store i8 %47, ptr %27, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8196, ptr %28) #4
  call void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196) %28)
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #4
  store i32 0, ptr %29, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %135, %45
  %49 = load i32, ptr %29, align 4, !tbaa !9
  %50 = load i32, ptr %13, align 4, !tbaa !9
  %51 = icmp slt i32 %49, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  store i32 2, ptr %30, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #4
  br label %138

53:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %131, %53
  %55 = load i32, ptr %31, align 4, !tbaa !9
  %56 = load i32, ptr %12, align 4, !tbaa !9
  %57 = icmp slt i32 %55, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %54
  store i32 5, ptr %30, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  br label %134

59:                                               ; preds = %54
  %60 = load i8, ptr %27, align 1, !tbaa !11, !range !13, !noundef !14
  %61 = trunc i8 %60 to i1
  br i1 %61, label %62, label %75

62:                                               ; preds = %59
  %63 = load ptr, ptr %14, align 8, !tbaa !5
  %64 = load i32, ptr %31, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds i8, ptr %63, i64 %65
  %67 = load i32, ptr %17, align 4, !tbaa !9
  %68 = load i32, ptr %13, align 4, !tbaa !9
  %69 = load i32, ptr %29, align 4, !tbaa !9
  %70 = sub nsw i32 %68, %69
  %71 = load i32, ptr %12, align 4, !tbaa !9
  %72 = load i32, ptr %31, align 4, !tbaa !9
  %73 = sub nsw i32 %71, %72
  %74 = getelementptr inbounds [64 x float], ptr %24, i64 0, i64 0
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %66, i32 noundef %67, i32 noundef %70, i32 noundef %73, ptr noundef %74, i32 noundef 8)
  br label %98

75:                                               ; preds = %59
  %76 = load ptr, ptr %14, align 8, !tbaa !5
  %77 = load i32, ptr %31, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds i8, ptr %76, i64 %78
  %80 = load ptr, ptr %15, align 8, !tbaa !5
  %81 = load i32, ptr %31, align 4, !tbaa !9
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds i8, ptr %80, i64 %82
  %84 = load ptr, ptr %16, align 8, !tbaa !5
  %85 = load i32, ptr %31, align 4, !tbaa !9
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds i8, ptr %84, i64 %86
  %88 = load i32, ptr %17, align 4, !tbaa !9
  %89 = load i32, ptr %13, align 4, !tbaa !9
  %90 = load i32, ptr %29, align 4, !tbaa !9
  %91 = sub nsw i32 %89, %90
  %92 = load i32, ptr %12, align 4, !tbaa !9
  %93 = load i32, ptr %31, align 4, !tbaa !9
  %94 = sub nsw i32 %92, %93
  %95 = getelementptr inbounds [64 x float], ptr %24, i64 0, i64 0
  %96 = getelementptr inbounds [64 x float], ptr %25, i64 0, i64 0
  %97 = getelementptr inbounds [64 x float], ptr %26, i64 0, i64 0
  call void @_ZN4Simd4Base8RgbToYuvEPKhS2_S2_iiiPfS3_S3_i(ptr noundef %79, ptr noundef %83, ptr noundef %87, i32 noundef %88, i32 noundef %91, i32 noundef %94, ptr noundef %95, ptr noundef %96, ptr noundef %97, i32 noundef 8)
  br label %98

98:                                               ; preds = %75, %62
  %99 = getelementptr inbounds [64 x float], ptr %24, i64 0, i64 0
  %100 = load ptr, ptr %18, align 8, !tbaa !5
  %101 = load ptr, ptr %21, align 8, !tbaa !5
  %102 = load i32, ptr %101, align 4, !tbaa !9
  %103 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %28, ptr noundef %99, i32 noundef 8, ptr noundef %100, i32 noundef %102, ptr noundef @_ZN4Simd4Base10HuffmanYdcE, ptr noundef @_ZN4Simd4Base10HuffmanYacE)
  %104 = load ptr, ptr %21, align 8, !tbaa !5
  store i32 %103, ptr %104, align 4, !tbaa !9
  %105 = load i8, ptr %27, align 1, !tbaa !11, !range !13, !noundef !14
  %106 = trunc i8 %105 to i1
  br i1 %106, label %107, label %108

107:                                              ; preds = %98
  call void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196) %28)
  br label %121

108:                                              ; preds = %98
  %109 = getelementptr inbounds [64 x float], ptr %25, i64 0, i64 0
  %110 = load ptr, ptr %19, align 8, !tbaa !5
  %111 = load ptr, ptr %22, align 8, !tbaa !5
  %112 = load i32, ptr %111, align 4, !tbaa !9
  %113 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %28, ptr noundef %109, i32 noundef 8, ptr noundef %110, i32 noundef %112, ptr noundef @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef @_ZN4Simd4Base11HuffmanUVacE)
  %114 = load ptr, ptr %22, align 8, !tbaa !5
  store i32 %113, ptr %114, align 4, !tbaa !9
  %115 = getelementptr inbounds [64 x float], ptr %26, i64 0, i64 0
  %116 = load ptr, ptr %19, align 8, !tbaa !5
  %117 = load ptr, ptr %23, align 8, !tbaa !5
  %118 = load i32, ptr %117, align 4, !tbaa !9
  %119 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %28, ptr noundef %115, i32 noundef 8, ptr noundef %116, i32 noundef %118, ptr noundef @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef @_ZN4Simd4Base11HuffmanUVacE)
  %120 = load ptr, ptr %23, align 8, !tbaa !5
  store i32 %119, ptr %120, align 4, !tbaa !9
  br label %121

121:                                              ; preds = %108, %107
  %122 = call noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196) %28, i32 noundef 1024)
  br i1 %122, label %123, label %130

123:                                              ; preds = %121
  %124 = load ptr, ptr %11, align 8, !tbaa !5
  %125 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %28, i32 0, i32 1
  %126 = getelementptr inbounds [2048 x [2 x i16]], ptr %125, i64 0, i64 0
  %127 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %28, i32 0, i32 0
  %128 = load i32, ptr %127, align 4, !tbaa !15
  %129 = zext i32 %128 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %124, ptr noundef %126, i64 noundef %129)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %28)
  br label %130

130:                                              ; preds = %123, %121
  br label %131

131:                                              ; preds = %130
  %132 = load i32, ptr %31, align 4, !tbaa !9
  %133 = add nsw i32 %132, 8
  store i32 %133, ptr %31, align 4, !tbaa !9
  br label %54, !llvm.loop !17

134:                                              ; preds = %58
  br label %135

135:                                              ; preds = %134
  %136 = load i32, ptr %29, align 4, !tbaa !9
  %137 = add nsw i32 %136, 8
  store i32 %137, ptr %29, align 4, !tbaa !9
  br label %48, !llvm.loop !19

138:                                              ; preds = %52
  %139 = load ptr, ptr %11, align 8, !tbaa !5
  %140 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %28, i32 0, i32 1
  %141 = getelementptr inbounds [2048 x [2 x i16]], ptr %140, i64 0, i64 0
  %142 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %28, i32 0, i32 0
  %143 = load i32, ptr %142, align 4, !tbaa !15
  %144 = zext i32 %143 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %139, ptr noundef %141, i64 noundef %144)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %28)
  call void @llvm.lifetime.end.p0(i64 8196, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !10, i64 0}
!16 = !{!"_ZTSN4Simd4Base6BitBufE", !10, i64 0, !7, i64 4}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::BitBuf" = type { i32, [2048 x [2 x i16]] }

@_ZN4Simd4Base10HuffmanYdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base11HuffmanUVdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base10HuffmanYacE = external dso_local constant [256 x [2 x i16]], align 16
@_ZN4Simd4Base11HuffmanUVacE = external dso_local constant [256 x [2 x i16]], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8RgbToYuvEPKhS2_S2_iiiPfS3_S3_i(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196), ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196)) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18JpegWriteBlockFullERNS_18OutputMemoryStreamEiiPKhS4_S4_iPKfS6_Pi(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8, ptr nocapture noundef %9) local_unnamed_addr #2 {
  %11 = alloca [64 x float], align 16
  %12 = alloca [64 x float], align 16
  %13 = alloca [64 x float], align 16
  %14 = alloca %"struct.Simd::Base::BitBuf", align 4
  %15 = getelementptr inbounds i8, ptr %9, i64 4
  %16 = getelementptr inbounds i8, ptr %9, i64 8
  call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %11) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %12) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %13) #4
  %17 = icmp eq ptr %3, %4
  %18 = icmp eq ptr %3, %5
  %19 = and i1 %17, %18
  call void @llvm.lifetime.start.p0(i64 8196, ptr nonnull %14) #4
  call void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196) %14)
  %20 = icmp sgt i32 %2, 0
  br i1 %20, label %.preheader.lr.ph, label %._crit_edge49

.preheader.lr.ph:                                 ; preds = %10
  %21 = icmp sgt i32 %1, 0
  %22 = getelementptr inbounds i8, ptr %14, i64 4
  br i1 %21, label %.preheader.lr.ph.split.us, label %._crit_edge49

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  br i1 %19, label %.preheader.us.us, label %.preheader.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us.us.us
  %.04348.us.us = phi i32 [ %37, %._crit_edge.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us ]
  %23 = sub nsw i32 %2, %.04348.us.us
  br label %24

24:                                               ; preds = %34, %.preheader.us.us
  %indvars.iv56 = phi i64 [ %indvars.iv.next57, %34 ], [ 0, %.preheader.us.us ]
  %25 = getelementptr inbounds i8, ptr %3, i64 %indvars.iv56
  %26 = trunc i64 %indvars.iv56 to i32
  %27 = sub i32 %1, %26
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %25, i32 noundef %6, i32 noundef %23, i32 noundef %27, ptr noundef nonnull %11, i32 noundef 8)
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %14, ptr noundef nonnull %11, i32 noundef 8, ptr noundef %7, i32 noundef %28, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %29, ptr %9, align 4, !tbaa !5
  call void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196) %14)
  %30 = call noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196) %14, i32 noundef 1024)
  br i1 %30, label %31, label %34

31:                                               ; preds = %24
  %32 = load i32, ptr %14, align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull %22, i64 noundef %33)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %14)
  br label %34

34:                                               ; preds = %31, %24
  %indvars.iv.next57 = add nuw nsw i64 %indvars.iv56, 8
  %35 = trunc nuw i64 %indvars.iv.next57 to i32
  %36 = icmp slt i32 %35, %1
  br i1 %36, label %24, label %._crit_edge.split.us.us.us, !llvm.loop !11

._crit_edge.split.us.us.us:                       ; preds = %34
  %37 = add nuw nsw i32 %.04348.us.us, 8
  %38 = icmp slt i32 %37, %2
  br i1 %38, label %.preheader.us.us, label %._crit_edge49, !llvm.loop !13

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us51
  %.04348.us = phi i32 [ %59, %._crit_edge.split.us51 ], [ 0, %.preheader.lr.ph.split.us ]
  %39 = sub nsw i32 %2, %.04348.us
  br label %40

40:                                               ; preds = %.preheader.us, %56
  %indvars.iv = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next, %56 ]
  %41 = getelementptr inbounds i8, ptr %3, i64 %indvars.iv
  %42 = getelementptr inbounds i8, ptr %4, i64 %indvars.iv
  %43 = getelementptr inbounds i8, ptr %5, i64 %indvars.iv
  %44 = trunc i64 %indvars.iv to i32
  %45 = sub i32 %1, %44
  call void @_ZN4Simd4Base8RgbToYuvEPKhS2_S2_iiiPfS3_S3_i(ptr noundef %41, ptr noundef %42, ptr noundef %43, i32 noundef %6, i32 noundef %39, i32 noundef %45, ptr noundef nonnull %11, ptr noundef nonnull %12, ptr noundef nonnull %13, i32 noundef 8)
  %46 = load i32, ptr %9, align 4, !tbaa !5
  %47 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %14, ptr noundef nonnull %11, i32 noundef 8, ptr noundef %7, i32 noundef %46, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %47, ptr %9, align 4, !tbaa !5
  %48 = load i32, ptr %15, align 4, !tbaa !5
  %49 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %14, ptr noundef nonnull %12, i32 noundef 8, ptr noundef %8, i32 noundef %48, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVacE)
  store i32 %49, ptr %15, align 4, !tbaa !5
  %50 = load i32, ptr %16, align 4, !tbaa !5
  %51 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %14, ptr noundef nonnull %13, i32 noundef 8, ptr noundef %8, i32 noundef %50, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVacE)
  store i32 %51, ptr %16, align 4, !tbaa !5
  %52 = call noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196) %14, i32 noundef 1024)
  br i1 %52, label %53, label %56

53:                                               ; preds = %40
  %54 = load i32, ptr %14, align 4, !tbaa !9
  %55 = zext i32 %54 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull %22, i64 noundef %55)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %14)
  br label %56

56:                                               ; preds = %53, %40
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 8
  %57 = trunc nuw i64 %indvars.iv.next to i32
  %58 = icmp slt i32 %57, %1
  br i1 %58, label %40, label %._crit_edge.split.us51, !llvm.loop !11

._crit_edge.split.us51:                           ; preds = %56
  %59 = add nuw nsw i32 %.04348.us, 8
  %60 = icmp slt i32 %59, %2
  br i1 %60, label %.preheader.us, label %._crit_edge49, !llvm.loop !13

._crit_edge49:                                    ; preds = %._crit_edge.split.us51, %._crit_edge.split.us.us.us, %.preheader.lr.ph, %10
  %61 = getelementptr inbounds i8, ptr %14, i64 4
  %62 = load i32, ptr %14, align 4, !tbaa !9
  %63 = zext i32 %62 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull %61, i64 noundef %63)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %14)
  call void @llvm.lifetime.end.p0(i64 8196, ptr nonnull %14) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %13) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %12) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %11) #4
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN4Simd4Base6BitBufE", !6, i64 0, !7, i64 4}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass