; LLVM IR from mlcommons/tiny :: benchmark/interface/Drivers/BSP/Components/cs42l51 (cs42l51)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CS42L51_Object_t = type { %struct.CS42L51_IO_t, %struct.cs42l51_ctx_t, i8 }
%struct.CS42L51_IO_t = type { ptr, ptr, i16, ptr, ptr, ptr }
%struct.cs42l51_ctx_t = type { ptr, ptr, ptr }

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Stop(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = call i32 @CS42L51_SetMute(ptr noundef %7, i32 noundef 1)
  store i32 %8, ptr %5, align 4, !tbaa !9
  %9 = load i32, ptr %4, align 4, !tbaa !9
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  br label %60

12:                                               ; preds = %2
  store i8 126, ptr %6, align 1, !tbaa !11
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %13, i32 0, i32 1
  %15 = call i32 @cs42l51_write_reg(ptr noundef %14, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = add nsw i32 %16, %15
  store i32 %17, ptr %5, align 4, !tbaa !9
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %18, i32 0, i32 1
  %20 = call i32 @cs42l51_read_reg(ptr noundef %19, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %21 = load i32, ptr %5, align 4, !tbaa !9
  %22 = add nsw i32 %21, %20
  store i32 %22, ptr %5, align 4, !tbaa !9
  %23 = load i8, ptr %6, align 1, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = or i32 %24, 14
  %26 = trunc i32 %25 to i8
  store i8 %26, ptr %6, align 1, !tbaa !11
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %27, i32 0, i32 1
  %29 = call i32 @cs42l51_write_reg(ptr noundef %28, i16 noundef zeroext 3, ptr noundef %6, i16 noundef zeroext 1)
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = add nsw i32 %30, %29
  store i32 %31, ptr %5, align 4, !tbaa !9
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %32, i32 0, i32 1
  %34 = call i32 @cs42l51_read_reg(ptr noundef %33, i16 noundef zeroext 9, ptr noundef %6, i16 noundef zeroext 1)
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = add nsw i32 %35, %34
  store i32 %36, ptr %5, align 4, !tbaa !9
  %37 = load i8, ptr %6, align 1, !tbaa !11
  %38 = zext i8 %37 to i32
  %39 = and i32 %38, 252
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %6, align 1, !tbaa !11
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %41, i32 0, i32 1
  %43 = call i32 @cs42l51_write_reg(ptr noundef %42, i16 noundef zeroext 9, ptr noundef %6, i16 noundef zeroext 1)
  %44 = load i32, ptr %5, align 4, !tbaa !9
  %45 = add nsw i32 %44, %43
  store i32 %45, ptr %5, align 4, !tbaa !9
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %46, i32 0, i32 1
  %48 = call i32 @cs42l51_read_reg(ptr noundef %47, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %49 = load i32, ptr %5, align 4, !tbaa !9
  %50 = add nsw i32 %49, %48
  store i32 %50, ptr %5, align 4, !tbaa !9
  %51 = load i8, ptr %6, align 1, !tbaa !11
  %52 = zext i8 %51 to i32
  %53 = or i32 %52, 1
  %54 = trunc i32 %53 to i8
  store i8 %54, ptr %6, align 1, !tbaa !11
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.CS42L51_Object_t, ptr %55, i32 0, i32 1
  %57 = call i32 @cs42l51_write_reg(ptr noundef %56, i16 noundef zeroext 2, ptr noundef %6, i16 noundef zeroext 1)
  %58 = load i32, ptr %5, align 4, !tbaa !9
  %59 = add nsw i32 %58, %57
  store i32 %59, ptr %5, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %12, %11
  %61 = load i32, ptr %5, align 4, !tbaa !9
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %64

63:                                               ; preds = %60
  store i32 -1, ptr %5, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %63, %60
  %65 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %65
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @CS42L51_SetMute(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @CS42L51_Stop(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
  %4 = tail call i32 @CS42L51_SetMute(ptr noundef %0, i32 noundef 1)
  %5 = icmp eq i32 %1, 1
  br i1 %5, label %28, label %6

6:                                                ; preds = %2
  store i8 126, ptr %3, align 1, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  %8 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %9 = add nsw i32 %8, %4
  %10 = call i32 @cs42l51_read_reg(ptr noundef nonnull %7, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %11 = add nsw i32 %9, %10
  %12 = load i8, ptr %3, align 1, !tbaa !5
  %13 = or i8 %12, 14
  store i8 %13, ptr %3, align 1, !tbaa !5
  %14 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 3, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %15 = add nsw i32 %11, %14
  %16 = call i32 @cs42l51_read_reg(ptr noundef nonnull %7, i16 noundef zeroext 9, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %17 = add nsw i32 %15, %16
  %18 = load i8, ptr %3, align 1, !tbaa !5
  %19 = and i8 %18, -4
  store i8 %19, ptr %3, align 1, !tbaa !5
  %20 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 9, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %21 = add nsw i32 %17, %20
  %22 = call i32 @cs42l51_read_reg(ptr noundef nonnull %7, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %23 = add nsw i32 %21, %22
  %24 = load i8, ptr %3, align 1, !tbaa !5
  %25 = or i8 %24, 1
  store i8 %25, ptr %3, align 1, !tbaa !5
  %26 = call i32 @cs42l51_write_reg(ptr noundef nonnull %7, i16 noundef zeroext 2, ptr noundef nonnull %3, i16 noundef zeroext 1) #3
  %27 = add nsw i32 %23, %26
  br label %28

28:                                               ; preds = %2, %6
  %.0 = phi i32 [ %4, %2 ], [ %27, %6 ]
  %.not = icmp ne i32 %.0, 0
  %spec.store.select = sext i1 %.not to i32
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  ret i32 %spec.store.select
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @CS42L51_SetMute(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @cs42l51_read_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

declare i32 @cs42l51_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass