; LLVM IR from Dragons-Lake/REI :: sources/REI_Integration/3rdParty/nanovg (nanovg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden float @nvg__tanf(float noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @nvgTransformSkewY(ptr noundef %0, float noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca float, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store float %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds float, ptr %5, i64 0
  store float 1.000000e+00, ptr %6, align 4, !tbaa !9
  %7 = load float, ptr %4, align 4, !tbaa !9
  %8 = call float @nvg__tanf(float noundef %7)
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds float, ptr %9, i64 1
  store float %8, ptr %10, align 4, !tbaa !9
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds float, ptr %11, i64 2
  store float 0.000000e+00, ptr %12, align 4, !tbaa !9
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds float, ptr %13, i64 3
  store float 1.000000e+00, ptr %14, align 4, !tbaa !9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds float, ptr %15, i64 4
  store float 0.000000e+00, ptr %16, align 4, !tbaa !9
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds float, ptr %17, i64 5
  store float 0.000000e+00, ptr %18, align 4, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden float @nvg__tanf(float noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @nvgTransformSkewY(ptr nocapture noundef writeonly %0, float noundef %1) local_unnamed_addr #0 {
  store float 1.000000e+00, ptr %0, align 4, !tbaa !5
  %3 = tail call float @nvg__tanf(float noundef %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 4
  store float %3, ptr %4, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  store <4 x float> <float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00>, ptr %5, align 4, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,TailCallElimPass