; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_gpr_move.simd = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_gpr_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca [4 x i32], align 16
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %7, ptr align 16 @__const.test_asimd_gpr_move.simd, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  store i8 1, ptr %11, align 1, !tbaa !11
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %12, ptr noundef %13)
  store i8 0, ptr %9, align 1, !tbaa !11
  br label %14

14:                                               ; preds = %49, %3
  %15 = load i8, ptr %9, align 1, !tbaa !11
  %16 = zext i8 %15 to i32
  %17 = icmp slt i32 %16, 64
  br i1 %17, label %18, label %52

18:                                               ; preds = %14
  store i8 0, ptr %8, align 1, !tbaa !11
  br label %19

19:                                               ; preds = %45, %18
  %20 = load i8, ptr %8, align 1, !tbaa !11
  %21 = zext i8 %20 to i32
  %22 = icmp slt i32 %21, 32
  br i1 %22, label %23, label %48

23:                                               ; preds = %19
  store i8 0, ptr %10, align 1, !tbaa !11
  br label %24

24:                                               ; preds = %41, %23
  %25 = load i8, ptr %10, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = icmp slt i32 %26, 4
  br i1 %27, label %28, label %44

28:                                               ; preds = %24
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = load i8, ptr %9, align 1, !tbaa !11
  %32 = zext i8 %31 to i32
  %33 = load i8, ptr %8, align 1, !tbaa !11
  %34 = zext i8 %33 to i32
  %35 = load i8, ptr %11, align 1, !tbaa !11
  %36 = sext i8 %35 to i16
  %37 = load i8, ptr %10, align 1, !tbaa !11
  %38 = zext i8 %37 to i64
  %39 = getelementptr inbounds [4 x i32], ptr %7, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %29, i32 noundef %30, i32 noundef %32, i32 noundef %34, i16 noundef signext %36, i32 noundef %40)
  br label %41

41:                                               ; preds = %28
  %42 = load i8, ptr %10, align 1, !tbaa !11
  %43 = add i8 %42, 1
  store i8 %43, ptr %10, align 1, !tbaa !11
  br label %24, !llvm.loop !12

44:                                               ; preds = %24
  br label %45

45:                                               ; preds = %44
  %46 = load i8, ptr %8, align 1, !tbaa !11
  %47 = add i8 %46, 1
  store i8 %47, ptr %8, align 1, !tbaa !11
  br label %19, !llvm.loop !14

48:                                               ; preds = %19
  br label %49

49:                                               ; preds = %48
  %50 = load i8, ptr %9, align 1, !tbaa !11
  %51 = add i8 %50, 1
  store i8 %51, ptr %9, align 1, !tbaa !11
  br label %14, !llvm.loop !15

52:                                               ; preds = %14
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %53, ptr noundef %54)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_gpr_move.simd = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_gpr_move(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %.pre.pre = load i32, ptr @__const.test_asimd_gpr_move.simd, align 16, !tbaa !5
  %.pre29.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_gpr_move.simd, i64 4), align 4, !tbaa !5
  %.pre30.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_gpr_move.simd, i64 8), align 8, !tbaa !5
  %.pre31.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_gpr_move.simd, i64 12), align 4, !tbaa !5
  br label %.preheader19

.preheader19:                                     ; preds = %3, %4
  %indvars.iv25 = phi i32 [ 0, %3 ], [ %indvars.iv.next26, %4 ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader19, %.preheader
  %indvars.iv = phi i32 [ 0, %.preheader19 ], [ %indvars.iv.next, %.preheader ]
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv25, i32 noundef %indvars.iv, i16 noundef signext 1, i32 noundef %.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv25, i32 noundef %indvars.iv, i16 noundef signext 1, i32 noundef %.pre29.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv25, i32 noundef %indvars.iv, i16 noundef signext 1, i32 noundef %.pre30.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv25, i32 noundef %indvars.iv, i16 noundef signext 1, i32 noundef %.pre31.pre) #2
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, 32
  br i1 %exitcond.not, label %4, label %.preheader, !llvm.loop !9

4:                                                ; preds = %.preheader
  %indvars.iv.next26 = add nuw nsw i32 %indvars.iv25, 1
  %exitcond28.not = icmp eq i32 %indvars.iv.next26, 64
  br i1 %exitcond28.not, label %5, label %.preheader19, !llvm.loop !11

5:                                                ; preds = %4
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass