; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_sse_prep_stack(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_avx2_prep_stack(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf16_avx512_prep_stack(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %5, i32 0, i32 6
  %7 = load i32, ptr %6, align 4, !tbaa !11
  %8 = icmp ult i32 %7, 1005
  br i1 %8, label %9, label %12

9:                                                ; preds = %2
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_generator_vcvtneps2bf16_sse_prep_stack(ptr noundef %10, i32 noundef %11)
  br label %39

12:                                               ; preds = %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %13, i32 0, i32 6
  %15 = load i32, ptr %14, align 4, !tbaa !11
  %16 = icmp uge i32 %15, 1006
  br i1 %16, label %17, label %25

17:                                               ; preds = %12
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %18, i32 0, i32 6
  %20 = load i32, ptr %19, align 4, !tbaa !11
  %21 = icmp ult i32 %20, 1051
  br i1 %21, label %22, label %25

22:                                               ; preds = %17
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_generator_vcvtneps2bf16_avx2_prep_stack(ptr noundef %23, i32 noundef %24)
  br label %38

25:                                               ; preds = %17, %12
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %26, i32 noundef -1568407413, i32 noundef %27, i64 noundef 2139095040)
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %28, i32 noundef %29)
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %30, i32 noundef -1568407413, i32 noundef %31, i64 noundef 32767)
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %32, i32 noundef %33)
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %34, i32 noundef -1568407413, i32 noundef %35, i64 noundef 1)
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %36, i32 noundef %37)
  br label %38

38:                                               ; preds = %25, %22
  br label %39

39:                                               ; preds = %38, %9
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_sse_prep_stack(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_vcvtneps2bf16_avx2_prep_stack(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf16_avx512_prep_stack(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = getelementptr inbounds i8, ptr %0, i64 28
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp ult i32 %4, 1005
  br i1 %5, label %6, label %7

6:                                                ; preds = %2
  tail call void @libxsmm_generator_vcvtneps2bf16_sse_prep_stack(ptr noundef nonnull %0, i32 noundef %1)
  br label %11

7:                                                ; preds = %2
  %.not = icmp ne i32 %4, 1005
  %8 = icmp ult i32 %4, 1051
  %or.cond = and i1 %.not, %8
  br i1 %or.cond, label %9, label %10

9:                                                ; preds = %7
  tail call void @libxsmm_generator_vcvtneps2bf16_avx2_prep_stack(ptr noundef nonnull %0, i32 noundef %1)
  br label %11

10:                                               ; preds = %7
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 2139095040) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 32767) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef %1) #2
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef -1568407413, i32 noundef %1, i64 noundef 1) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef %1) #2
  br label %11

11:                                               ; preds = %9, %10, %6
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass