; LLVM IR from NVIDIA/DALI :: dali/operators/numba_function (numba_func_gpu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::GPUBackend" = type { i8 }
%"class.std::vector.116" = type { %"struct.std::_Vector_base.117" }
%"struct.std::_Vector_base.117" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::NumbaFuncImpl" = type { %"class.dali::StatelessOperator", %"class.std::vector.31", %"class.std::vector.31", %"class.std::vector.36", %"class.std::vector.36", %"class.dali::SmallVector", %"class.dali::SmallVector", i64, i64, i8, %"class.dali::SmallVector.42", %"class.dali::SmallVector.42", %"class.dali::SmallVector.47", %"class.dali::SmallVector.47", %"class.std::vector.50", %"class.std::vector.50", %"class.std::vector.55", %"class.std::vector.55", %"class.std::vector.60", %"class.std::vector.60", %"class.std::vector.65", %"class.std::vector.65" }
%"class.dali::StatelessOperator" = type { %"class.dali::Operator" }
%"class.dali::Operator" = type { %"class.dali::OperatorBase" }
%"class.dali::OperatorBase" = type { ptr, %"class.dali::OpSpec", i32, i32, %"class.std::unordered_map" }
%"class.dali::OpSpec" = type { %"class.std::__cxx11::basic_string", ptr, %"class.std::vector", %"class.std::map", %"class.std::vector.6", %"class.std::map", %"class.std::map.11", %"class.std::vector.16", %"class.std::vector.16", %"class.std::map.21" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.6" = type { %"struct.std::_Vector_base.7" }
%"struct.std::_Vector_base.7" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.11" = type { %"class.std::_Rb_tree.12" }
%"class.std::_Rb_tree.12" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.21" = type { %"class.std::_Rb_tree.22" }
%"class.std::_Rb_tree.22" = type { %"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector.31" = type { %"struct.std::_Vector_base.32" }
%"struct.std::_Vector_base.32" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.36" = type { %"struct.std::_Vector_base.37" }
%"struct.std::_Vector_base.37" = type { %"struct.std::_Vector_base<std::vector<void *>, std::allocator<std::vector<void *>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<void *>, std::allocator<std::vector<void *>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<void *>, std::allocator<std::vector<void *>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<void *>, std::allocator<std::vector<void *>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::SmallVector" = type { %union.anon.41, i64 }
%union.anon.41 = type { %struct.anon }
%struct.anon = type { ptr, i64 }
%"class.dali::SmallVector.42" = type { %union.anon.45, i64 }
%union.anon.45 = type { %struct.anon.46, [8 x i8] }
%struct.anon.46 = type { ptr, i64 }
%"class.dali::SmallVector.47" = type { %union.anon.48, i64 }
%union.anon.48 = type { %struct.anon.49, [8 x i8] }
%struct.anon.49 = type { ptr, i64 }
%"class.std::vector.50" = type { %"struct.std::_Vector_base.51" }
%"struct.std::_Vector_base.51" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.55" = type { %"struct.std::_Vector_base.56" }
%"struct.std::_Vector_base.56" = type { %"struct.std::_Vector_base<dali::TensorListShape<DynamicDimensions>, std::allocator<dali::TensorListShape<DynamicDimensions>>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::TensorListShape<DynamicDimensions>, std::allocator<dali::TensorListShape<DynamicDimensions>>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::TensorListShape<DynamicDimensions>, std::allocator<dali::TensorListShape<DynamicDimensions>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::TensorListShape<DynamicDimensions>, std::allocator<dali::TensorListShape<DynamicDimensions>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.60" = type { %"struct.std::_Vector_base.61" }
%"struct.std::_Vector_base.61" = type { %"struct.std::_Vector_base<dali::TensorShape<DynamicDimensions>, std::allocator<dali::TensorShape<DynamicDimensions>>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::TensorShape<DynamicDimensions>, std::allocator<dali::TensorShape<DynamicDimensions>>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::TensorShape<DynamicDimensions>, std::allocator<dali::TensorShape<DynamicDimensions>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::TensorShape<DynamicDimensions>, std::allocator<dali::TensorShape<DynamicDimensions>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.65" = type { %"struct.std::_Vector_base.66" }
%"struct.std::_Vector_base.66" = type { %"struct.std::_Vector_base<dali::NumbaDevArray, std::allocator<dali::NumbaDevArray>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::NumbaDevArray, std::allocator<dali::NumbaDevArray>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::NumbaDevArray, std::allocator<dali::NumbaDevArray>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::NumbaDevArray, std::allocator<dali::NumbaDevArray>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.dali::NumbaDevArray" = type { ptr, ptr, i64, i64, ptr, %"class.dali::span.86", %"class.dali::span" }
%"class.dali::span.86" = type { ptr, i64 }
%"class.dali::span" = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE8NumInputEv(ptr noundef nonnull align 8 dereferenceable(664)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13NumbaFuncImplINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(888) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca %"class.dali::GPUBackend", align 1
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca %"class.dali::GPUBackend", align 1
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca ptr, align 8
  %15 = alloca %"class.dali::GPUBackend", align 1
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"class.std::vector.116", align 8
  %19 = alloca i64, align 8
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca ptr, align 8
  %23 = alloca i64, align 8
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %26 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %27, i32 noundef 0)
  %29 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %28)
  %30 = call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %29)
  store i32 %30, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = call noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE8NumInputEv(ptr noundef nonnull align 8 dereferenceable(664) %31)
  store i32 %32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  store i64 0, ptr %8, align 8, !tbaa !11
  br label %33

33:                                               ; preds = %67, %2
  %34 = load i64, ptr %8, align 8, !tbaa !11
  %35 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 10
  %36 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %35)
  %37 = icmp ult i64 %34, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %33
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  br label %70

39:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %8, align 8, !tbaa !11
  %42 = trunc i64 %41 to i32
  %43 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %40, i32 noundef %42)
  store ptr %43, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %63, %39
  %45 = load i32, ptr %12, align 4, !tbaa !9
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %44
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  br label %66

49:                                               ; preds = %44
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = call noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %50, i32 noundef %51)
  %53 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 21
  %54 = load i32, ptr %5, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = load i64, ptr %8, align 8, !tbaa !11
  %57 = mul i64 %55, %56
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = add i64 %57, %59
  %61 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %60) #6
  %62 = getelementptr inbounds %"struct.dali::NumbaDevArray", ptr %61, i32 0, i32 4
  store ptr %52, ptr %62, align 8, !tbaa !13
  br label %63

63:                                               ; preds = %49
  %64 = load i32, ptr %12, align 4, !tbaa !9
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %12, align 4, !tbaa !9
  br label %44, !llvm.loop !17

66:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  br label %67

67:                                               ; preds = %66
  %68 = load i64, ptr %8, align 8, !tbaa !11
  %69 = add i64 %68, 1
  store i64 %69, ptr %8, align 8, !tbaa !11
  br label %33, !llvm.loop !19

70:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  store i64 0, ptr %13, align 8, !tbaa !11
  br label %71

71:                                               ; preds = %105, %70
  %72 = load i64, ptr %13, align 8, !tbaa !11
  %73 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 11
  %74 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %73)
  %75 = icmp ult i64 %72, %74
  br i1 %75, label %77, label %76

76:                                               ; preds = %71
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  br label %108

77:                                               ; preds = %71
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = load i64, ptr %13, align 8, !tbaa !11
  %80 = trunc i64 %79 to i32
  %81 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %78, i32 noundef %80)
  store ptr %81, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %101, %77
  %83 = load i32, ptr %16, align 4, !tbaa !9
  %84 = load i32, ptr %5, align 4, !tbaa !9
  %85 = icmp slt i32 %83, %84
  br i1 %85, label %87, label %86

86:                                               ; preds = %82
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  br label %104

87:                                               ; preds = %82
  %88 = load ptr, ptr %14, align 8, !tbaa !5
  %89 = load i32, ptr %16, align 4, !tbaa !9
  %90 = call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %88, i32 noundef %89)
  %91 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 20
  %92 = load i32, ptr %5, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = load i64, ptr %13, align 8, !tbaa !11
  %95 = mul i64 %93, %94
  %96 = load i32, ptr %16, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = add i64 %95, %97
  %99 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %98) #6
  %100 = getelementptr inbounds %"struct.dali::NumbaDevArray", ptr %99, i32 0, i32 4
  store ptr %90, ptr %100, align 8, !tbaa !13
  br label %101

101:                                              ; preds = %87
  %102 = load i32, ptr %16, align 4, !tbaa !9
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %16, align 4, !tbaa !9
  br label %82, !llvm.loop !20

104:                                              ; preds = %86
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  br label %105

105:                                              ; preds = %104
  %106 = load i64, ptr %13, align 8, !tbaa !11
  %107 = add i64 %106, 1
  store i64 %107, ptr %13, align 8, !tbaa !11
  br label %71, !llvm.loop !21

108:                                              ; preds = %76
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %109

109:                                              ; preds = %214, %108
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = load i32, ptr %5, align 4, !tbaa !9
  %112 = icmp slt i32 %110, %111
  br i1 %112, label %114, label %113

113:                                              ; preds = %109
  store i32 14, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  br label %222

114:                                              ; preds = %109
  call void @llvm.lifetime.start.p0(i64 24, ptr %18) #6
  call void @_ZNSt6vectorIPvSaIS0_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #6
  store i64 0, ptr %19, align 8, !tbaa !11
  br label %115

115:                                              ; preds = %138, %114
  %116 = load i64, ptr %19, align 8, !tbaa !11
  %117 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 10
  %118 = invoke noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %117)
          to label %119 unwind label %122

119:                                              ; preds = %115
  %120 = icmp ult i64 %116, %118
  br i1 %120, label %126, label %121

121:                                              ; preds = %119
  store i32 17, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #6
  br label %146

122:                                              ; preds = %115
  %123 = landingpad { ptr, i32 }
          cleanup
  %124 = extractvalue { ptr, i32 } %123, 0
  store ptr %124, ptr %20, align 8
  %125 = extractvalue { ptr, i32 } %123, 1
  store i32 %125, ptr %21, align 4
  br label %145

126:                                              ; preds = %119
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #6
  %127 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 21
  %128 = load i64, ptr %19, align 8, !tbaa !11
  %129 = load i32, ptr %5, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = mul i64 %128, %130
  %132 = load i32, ptr %17, align 4, !tbaa !9
  %133 = sext i32 %132 to i64
  %134 = add i64 %131, %133
  %135 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %134) #6
  store ptr %135, ptr %22, align 8, !tbaa !5
  %136 = load ptr, ptr %22, align 8, !tbaa !5
  invoke void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72) %136, ptr noundef nonnull align 8 dereferenceable(24) %18)
          to label %137 unwind label %141

137:                                              ; preds = %126
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  br label %138

138:                                              ; preds = %137
  %139 = load i64, ptr %19, align 8, !tbaa !11
  %140 = add i64 %139, 1
  store i64 %140, ptr %19, align 8, !tbaa !11
  br label %115, !llvm.loop !22

141:                                              ; preds = %126
  %142 = landingpad { ptr, i32 }
          cleanup
  %143 = extractvalue { ptr, i32 } %142, 0
  store ptr %143, ptr %20, align 8
  %144 = extractvalue { ptr, i32 } %142, 1
  store i32 %144, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  br label %145

145:                                              ; preds = %141, %122
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #6
  br label %221

146:                                              ; preds = %121
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #6
  store i64 0, ptr %23, align 8, !tbaa !11
  br label %147

147:                                              ; preds = %170, %146
  %148 = load i64, ptr %23, align 8, !tbaa !11
  %149 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 11
  %150 = invoke noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %149)
          to label %151 unwind label %154

151:                                              ; preds = %147
  %152 = icmp ult i64 %148, %150
  br i1 %152, label %158, label %153

153:                                              ; preds = %151
  store i32 20, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  br label %178

154:                                              ; preds = %147
  %155 = landingpad { ptr, i32 }
          cleanup
  %156 = extractvalue { ptr, i32 } %155, 0
  store ptr %156, ptr %20, align 8
  %157 = extractvalue { ptr, i32 } %155, 1
  store i32 %157, ptr %21, align 4
  br label %177

158:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #6
  %159 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 20
  %160 = load i64, ptr %23, align 8, !tbaa !11
  %161 = load i32, ptr %5, align 4, !tbaa !9
  %162 = sext i32 %161 to i64
  %163 = mul i64 %160, %162
  %164 = load i32, ptr %17, align 4, !tbaa !9
  %165 = sext i32 %164 to i64
  %166 = add i64 %163, %165
  %167 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %159, i64 noundef %166) #6
  store ptr %167, ptr %24, align 8, !tbaa !5
  %168 = load ptr, ptr %24, align 8, !tbaa !5
  invoke void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72) %168, ptr noundef nonnull align 8 dereferenceable(24) %18)
          to label %169 unwind label %173

169:                                              ; preds = %158
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #6
  br label %170

170:                                              ; preds = %169
  %171 = load i64, ptr %23, align 8, !tbaa !11
  %172 = add i64 %171, 1
  store i64 %172, ptr %23, align 8, !tbaa !11
  br label %147, !llvm.loop !23

173:                                              ; preds = %158
  %174 = landingpad { ptr, i32 }
          cleanup
  %175 = extractvalue { ptr, i32 } %174, 0
  store ptr %175, ptr %20, align 8
  %176 = extractvalue { ptr, i32 } %174, 1
  store i32 %176, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #6
  br label %177

177:                                              ; preds = %173, %154
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  br label %221

178:                                              ; preds = %153
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #6
  %179 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 7
  %180 = load i64, ptr %179, align 8, !tbaa !24
  %181 = inttoptr i64 %180 to ptr
  store ptr %181, ptr %25, align 8, !tbaa !5
  %182 = load ptr, ptr %25, align 8, !tbaa !5
  %183 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 5
  %184 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %183, i64 noundef 0)
          to label %185 unwind label %217

185:                                              ; preds = %178
  %186 = load i32, ptr %184, align 4, !tbaa !9
  %187 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 5
  %188 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %187, i64 noundef 1)
          to label %189 unwind label %217

189:                                              ; preds = %185
  %190 = load i32, ptr %188, align 4, !tbaa !9
  %191 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 5
  %192 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %191, i64 noundef 2)
          to label %193 unwind label %217

193:                                              ; preds = %189
  %194 = load i32, ptr %192, align 4, !tbaa !9
  %195 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 6
  %196 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef 0)
          to label %197 unwind label %217

197:                                              ; preds = %193
  %198 = load i32, ptr %196, align 4, !tbaa !9
  %199 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 6
  %200 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %199, i64 noundef 1)
          to label %201 unwind label %217

201:                                              ; preds = %197
  %202 = load i32, ptr %200, align 4, !tbaa !9
  %203 = getelementptr inbounds %"class.dali::NumbaFuncImpl", ptr %26, i32 0, i32 6
  %204 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %203, i64 noundef 2)
          to label %205 unwind label %217

205:                                              ; preds = %201
  %206 = load i32, ptr %204, align 4, !tbaa !9
  %207 = load ptr, ptr %4, align 8, !tbaa !5
  %208 = invoke noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %207)
          to label %209 unwind label %217

209:                                              ; preds = %205
  %210 = call noundef ptr @_ZNSt6vectorIPvSaIS0_EE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #6
  %211 = invoke i32 @cuLaunchKernel(ptr noundef %182, i32 noundef %186, i32 noundef %190, i32 noundef %194, i32 noundef %198, i32 noundef %202, i32 noundef %206, i32 noundef 0, ptr noundef %208, ptr noundef %210, ptr noundef null)
          to label %212 unwind label %217

212:                                              ; preds = %209
  invoke void @_Z9CUDA_CALLI14cudaError_enumEvT_(i32 noundef %211)
          to label %213 unwind label %217

213:                                              ; preds = %212
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #6
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %18) #6
  br label %214

214:                                              ; preds = %213
  %215 = load i32, ptr %17, align 4, !tbaa !9
  %216 = add nsw i32 %215, 1
  store i32 %216, ptr %17, align 4, !tbaa !9
  br label %109, !llvm.loop !91

217:                                              ; preds = %212, %209, %205, %201, %197, %193, %189, %185, %178
  %218 = landingpad { ptr, i32 }
          cleanup
  %219 = extractvalue { ptr, i32 } %218, 0
  store ptr %219, ptr %20, align 8
  %220 = extractvalue { ptr, i32 } %218, 1
  store i32 %220, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #6
  br label %221

221:                                              ; preds = %217, %177, %145
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  br label %223

222:                                              ; preds = %113
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  ret void

223:                                              ; preds = %221
  %224 = load ptr, ptr %20, align 8
  %225 = load i32, ptr %21, align 4
  %226 = insertvalue { ptr, i32 } poison, ptr %224, 0
  %227 = insertvalue { ptr, i32 } %226, i32 %225, 1
  resume { ptr, i32 } %227
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72), ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9CUDA_CALLI14cudaError_enumEvT_(i32 noundef) #1

declare i32 @cuLaunchKernel(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIPvSaIS0_EE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 32}
!14 = !{!"_ZTSN4dali13NumbaDevArrayE", !6, i64 0, !6, i64 8, !12, i64 16, !12, i64 24, !6, i64 32, !15, i64 40, !16, i64 56}
!15 = !{!"_ZTSN4dali4spanIKlLln1EEE", !6, i64 0, !12, i64 8}
!16 = !{!"_ZTSN4dali4spanIlLln1EEE", !6, i64 0, !12, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}
!21 = distinct !{!21, !18}
!22 = distinct !{!22, !18}
!23 = distinct !{!23, !18}
!24 = !{!25, !12, i64 544}
!25 = !{!"_ZTSN4dali13NumbaFuncImplINS_10GPUBackendEEE", !26, i64 0, !63, i64 400, !63, i64 424, !67, i64 448, !67, i64 472, !71, i64 496, !71, i64 520, !12, i64 544, !12, i64 552, !72, i64 560, !73, i64 568, !73, i64 600, !74, i64 632, !74, i64 664, !75, i64 696, !75, i64 720, !79, i64 744, !79, i64 768, !83, i64 792, !83, i64 816, !87, i64 840, !87, i64 864}
!26 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !27, i64 0}
!27 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !28, i64 0}
!28 = !{!"_ZTSN4dali12OperatorBaseE", !29, i64 8, !10, i64 336, !10, i64 340, !58, i64 344}
!29 = !{!"_ZTSN4dali6OpSpecE", !30, i64 0, !6, i64 32, !32, i64 40, !36, i64 64, !44, i64 112, !36, i64 136, !48, i64 184, !51, i64 232, !51, i64 256, !55, i64 280}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !31, i64 0, !12, i64 8, !7, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!32 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !37, i64 0}
!37 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !38, i64 0}
!38 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !39, i64 0, !41, i64 8}
!39 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !40, i64 0}
!40 = !{!"_ZTSSt4lessIvE"}
!41 = !{!"_ZTSSt15_Rb_tree_header", !42, i64 0, !12, i64 32}
!42 = !{!"_ZTSSt18_Rb_tree_node_base", !43, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!43 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!44 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !45, i64 0}
!45 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !46, i64 0}
!46 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !47, i64 0}
!47 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!48 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !49, i64 0}
!49 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !50, i64 0}
!50 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !39, i64 0, !41, i64 8}
!51 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !52, i64 0}
!52 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !53, i64 0}
!53 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!55 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !56, i64 0}
!56 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !57, i64 0}
!57 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !39, i64 0, !41, i64 8}
!58 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !59, i64 0}
!59 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !12, i64 8, !60, i64 16, !12, i64 24, !61, i64 32, !6, i64 48}
!60 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!61 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !62, i64 0, !12, i64 8}
!62 = !{!"float", !7, i64 0}
!63 = !{!"_ZTSSt6vectorIS_IlSaIlEESaIS1_EE", !64, i64 0}
!64 = !{!"_ZTSSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE", !65, i64 0}
!65 = !{!"_ZTSNSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE12_Vector_implE", !66, i64 0}
!66 = !{!"_ZTSNSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!67 = !{!"_ZTSSt6vectorIS_IPvSaIS0_EESaIS2_EE", !68, i64 0}
!68 = !{!"_ZTSSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE", !69, i64 0}
!69 = !{!"_ZTSNSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE12_Vector_implE", !70, i64 0}
!70 = !{!"_ZTSNSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!71 = !{!"_ZTSN4dali11SmallVectorIiLm3ESaIiEEE", !7, i64 0, !12, i64 16}
!72 = !{!"bool", !7, i64 0}
!73 = !{!"_ZTSN4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EEE", !7, i64 0, !12, i64 24}
!74 = !{!"_ZTSN4dali11SmallVectorIiLm6ESaIiEEE", !7, i64 0, !12, i64 24}
!75 = !{!"_ZTSSt6vectorImSaImEE", !76, i64 0}
!76 = !{!"_ZTSSt12_Vector_baseImSaImEE", !77, i64 0}
!77 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !78, i64 0}
!78 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!79 = !{!"_ZTSSt6vectorIN4dali15TensorListShapeILin1EEESaIS2_EE", !80, i64 0}
!80 = !{!"_ZTSSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE", !81, i64 0}
!81 = !{!"_ZTSNSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE12_Vector_implE", !82, i64 0}
!82 = !{!"_ZTSNSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!83 = !{!"_ZTSSt6vectorIN4dali11TensorShapeILin1EEESaIS2_EE", !84, i64 0}
!84 = !{!"_ZTSSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE", !85, i64 0}
!85 = !{!"_ZTSNSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE12_Vector_implE", !86, i64 0}
!86 = !{!"_ZTSNSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!87 = !{!"_ZTSSt6vectorIN4dali13NumbaDevArrayESaIS1_EE", !88, i64 0}
!88 = !{!"_ZTSSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE", !89, i64 0}
!89 = !{!"_ZTSNSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE12_Vector_implE", !90, i64 0}
!90 = !{!"_ZTSNSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!91 = distinct !{!91, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.116" = type { %"struct.std::_Vector_base.117" }
%"struct.std::_Vector_base.117" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE8NumInputEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13NumbaFuncImplINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(888) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector.116", align 8
  %4 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %5 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %4)
  %6 = tail call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %5)
  %7 = tail call noundef i32 @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE8NumInputEv(ptr noundef nonnull align 8 dereferenceable(664) %1)
  %8 = getelementptr inbounds i8, ptr %0, i64 568
  %9 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %.preheader56, label %.lr.ph61

.lr.ph61:                                         ; preds = %2
  %10 = icmp sgt i32 %6, 0
  %11 = getelementptr inbounds i8, ptr %0, i64 864
  %12 = sext i32 %6 to i64
  br i1 %10, label %.lr.ph.us.preheader, label %.lr.ph61.split

.lr.ph.us.preheader:                              ; preds = %.lr.ph61
  %wide.trip.count = zext nneg i32 %6 to i64
  br label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.lr.ph.us.preheader, %._crit_edge.us
  %.059.us = phi i64 [ %22, %._crit_edge.us ], [ 0, %.lr.ph.us.preheader ]
  %13 = trunc i64 %.059.us to i32
  %14 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef %13)
  %15 = mul i64 %.059.us, %12
  br label %16

16:                                               ; preds = %.lr.ph.us, %16
  %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %16 ]
  %17 = trunc nuw nsw i64 %indvars.iv to i32
  %18 = tail call noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %14, i32 noundef %17)
  %19 = add i64 %15, %indvars.iv
  %20 = tail call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %19) #6
  %21 = getelementptr inbounds i8, ptr %20, i64 32
  store ptr %18, ptr %21, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.us, label %16, !llvm.loop !13

._crit_edge.us:                                   ; preds = %16
  %22 = add nuw i64 %.059.us, 1
  %23 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  %24 = icmp ult i64 %22, %23
  br i1 %24, label %.lr.ph.us, label %.preheader56, !llvm.loop !15

.preheader56:                                     ; preds = %.lr.ph61.split, %._crit_edge.us, %2
  %25 = getelementptr inbounds i8, ptr %0, i64 600
  %26 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %25)
  %.not75 = icmp eq i64 %26, 0
  br i1 %.not75, label %.preheader55, label %.lr.ph64

.lr.ph64:                                         ; preds = %.preheader56
  %27 = icmp sgt i32 %6, 0
  %28 = getelementptr inbounds i8, ptr %0, i64 840
  %29 = sext i32 %6 to i64
  br i1 %27, label %.lr.ph.us66.preheader, label %.lr.ph64.split

.lr.ph.us66.preheader:                            ; preds = %.lr.ph64
  %wide.trip.count84 = zext nneg i32 %6 to i64
  br label %.lr.ph.us66

.lr.ph.us66:                                      ; preds = %.lr.ph.us66.preheader, %._crit_edge.us67
  %.05263.us = phi i64 [ %39, %._crit_edge.us67 ], [ 0, %.lr.ph.us66.preheader ]
  %30 = trunc i64 %.05263.us to i32
  %31 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef %30)
  %32 = mul i64 %.05263.us, %29
  br label %33

33:                                               ; preds = %.lr.ph.us66, %33
  %indvars.iv81 = phi i64 [ 0, %.lr.ph.us66 ], [ %indvars.iv.next82, %33 ]
  %34 = trunc nuw nsw i64 %indvars.iv81 to i32
  %35 = tail call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %31, i32 noundef %34)
  %36 = add i64 %32, %indvars.iv81
  %37 = tail call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %36) #6
  %38 = getelementptr inbounds i8, ptr %37, i64 32
  store ptr %35, ptr %38, align 8, !tbaa !5
  %indvars.iv.next82 = add nuw nsw i64 %indvars.iv81, 1
  %exitcond85.not = icmp eq i64 %indvars.iv.next82, %wide.trip.count84
  br i1 %exitcond85.not, label %._crit_edge.us67, label %33, !llvm.loop !16

._crit_edge.us67:                                 ; preds = %33
  %39 = add nuw i64 %.05263.us, 1
  %40 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %25)
  %41 = icmp ult i64 %39, %40
  br i1 %41, label %.lr.ph.us66, label %.preheader55, !llvm.loop !17

.lr.ph61.split:                                   ; preds = %.lr.ph61, %.lr.ph61.split
  %.059 = phi i64 [ %44, %.lr.ph61.split ], [ 0, %.lr.ph61 ]
  %42 = trunc i64 %.059 to i32
  %43 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef %42)
  %44 = add nuw i64 %.059, 1
  %45 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  %46 = icmp ult i64 %44, %45
  br i1 %46, label %.lr.ph61.split, label %.preheader56, !llvm.loop !15

.preheader55:                                     ; preds = %.lr.ph64.split, %._crit_edge.us67, %.preheader56
  %47 = icmp sgt i32 %6, 0
  br i1 %47, label %.lr.ph73, label %._crit_edge74

.lr.ph73:                                         ; preds = %.preheader55
  %48 = getelementptr inbounds i8, ptr %0, i64 864
  %49 = zext nneg i32 %6 to i64
  %50 = getelementptr inbounds i8, ptr %0, i64 840
  %51 = getelementptr inbounds i8, ptr %0, i64 544
  %52 = getelementptr inbounds i8, ptr %0, i64 496
  %53 = getelementptr inbounds i8, ptr %0, i64 520
  br label %59

.lr.ph64.split:                                   ; preds = %.lr.ph64, %.lr.ph64.split
  %.05263 = phi i64 [ %56, %.lr.ph64.split ], [ 0, %.lr.ph64 ]
  %54 = trunc i64 %.05263 to i32
  %55 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef %54)
  %56 = add nuw i64 %.05263, 1
  %57 = tail call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %25)
  %58 = icmp ult i64 %56, %57
  br i1 %58, label %.lr.ph64.split, label %.preheader55, !llvm.loop !17

._crit_edge74:                                    ; preds = %105, %.preheader55
  ret void

59:                                               ; preds = %.lr.ph73, %105
  %indvars.iv86 = phi i64 [ 0, %.lr.ph73 ], [ %indvars.iv.next87, %105 ]
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6
  call void @_ZNSt6vectorIPvSaIS0_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  %60 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  %.not76 = icmp eq i64 %60, 0
  br i1 %.not76, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %65, %59
  %61 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %25)
  %.not77 = icmp eq i64 %61, 0
  br i1 %.not77, label %._crit_edge, label %.lr.ph71

.lr.ph:                                           ; preds = %59, %65
  %.04969 = phi i64 [ %66, %65 ], [ 0, %59 ]
  %62 = mul i64 %.04969, %49
  %63 = add i64 %62, %indvars.iv86
  %64 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %63) #6
  invoke void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72) %64, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %65 unwind label %69

65:                                               ; preds = %.lr.ph
  %66 = add nuw i64 %.04969, 1
  %67 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  %68 = icmp ult i64 %66, %67
  br i1 %68, label %.lr.ph, label %.preheader, !llvm.loop !18

69:                                               ; preds = %.lr.ph
  %70 = landingpad { ptr, i32 }
          cleanup
  br label %108

._crit_edge:                                      ; preds = %77, %.preheader
  %71 = load i64, ptr %51, align 8, !tbaa !19
  %72 = inttoptr i64 %71 to ptr
  %73 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef 0)
          to label %83 unwind label %106

.lr.ph71:                                         ; preds = %.preheader, %77
  %.04570 = phi i64 [ %78, %77 ], [ 0, %.preheader ]
  %74 = mul i64 %.04570, %49
  %75 = add i64 %74, %indvars.iv86
  %76 = call noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %75) #6
  invoke void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72) %76, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %77 unwind label %81

77:                                               ; preds = %.lr.ph71
  %78 = add nuw i64 %.04570, 1
  %79 = call noundef i64 @_ZNK4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %25)
  %80 = icmp ult i64 %78, %79
  br i1 %80, label %.lr.ph71, label %._crit_edge, !llvm.loop !87

81:                                               ; preds = %.lr.ph71
  %82 = landingpad { ptr, i32 }
          cleanup
  br label %108

83:                                               ; preds = %._crit_edge
  %84 = load i32, ptr %73, align 4, !tbaa !88
  %85 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef 1)
          to label %86 unwind label %106

86:                                               ; preds = %83
  %87 = load i32, ptr %85, align 4, !tbaa !88
  %88 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef 2)
          to label %89 unwind label %106

89:                                               ; preds = %86
  %90 = load i32, ptr %88, align 4, !tbaa !88
  %91 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef 0)
          to label %92 unwind label %106

92:                                               ; preds = %89
  %93 = load i32, ptr %91, align 4, !tbaa !88
  %94 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef 1)
          to label %95 unwind label %106

95:                                               ; preds = %92
  %96 = load i32, ptr %94, align 4, !tbaa !88
  %97 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef 2)
          to label %98 unwind label %106

98:                                               ; preds = %95
  %99 = load i32, ptr %97, align 4, !tbaa !88
  %100 = invoke noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %1)
          to label %101 unwind label %106

101:                                              ; preds = %98
  %102 = call noundef ptr @_ZNSt6vectorIPvSaIS0_EE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  %103 = invoke i32 @cuLaunchKernel(ptr noundef %72, i32 noundef %84, i32 noundef %87, i32 noundef %90, i32 noundef %93, i32 noundef %96, i32 noundef %99, i32 noundef 0, ptr noundef %100, ptr noundef %102, ptr noundef null)
          to label %104 unwind label %106

104:                                              ; preds = %101
  invoke void @_Z9CUDA_CALLI14cudaError_enumEvT_(i32 noundef %103)
          to label %105 unwind label %106

105:                                              ; preds = %104
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  %indvars.iv.next87 = add nuw nsw i64 %indvars.iv86, 1
  %exitcond90.not = icmp eq i64 %indvars.iv.next87, %49
  br i1 %exitcond90.not, label %._crit_edge74, label %59, !llvm.loop !89

106:                                              ; preds = %104, %101, %98, %95, %92, %89, %86, %83, %._crit_edge
  %107 = landingpad { ptr, i32 }
          cleanup
  br label %108

108:                                              ; preds = %106, %81, %69
  %.pn = phi { ptr, i32 } [ %70, %69 ], [ %82, %81 ], [ %107, %106 ]
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(72) ptr @_ZNSt6vectorIN4dali13NumbaDevArrayESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13NumbaDevArray8PushArgsERSt6vectorIPvSaIS2_EE(ptr noundef nonnull align 8 dereferenceable(72), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9CUDA_CALLI14cudaError_enumEvT_(i32 noundef) local_unnamed_addr #1

declare i32 @cuLaunchKernel(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4dali11SmallVectorIiLm3ESaIiEEixEl(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIPvSaIS0_EE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTSN4dali13NumbaDevArrayE", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !11, i64 40, !12, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"_ZTSN4dali4spanIKlLln1EEE", !7, i64 0, !10, i64 8}
!12 = !{!"_ZTSN4dali4spanIlLln1EEE", !7, i64 0, !10, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = !{!20, !10, i64 544}
!20 = !{!"_ZTSN4dali13NumbaFuncImplINS_10GPUBackendEEE", !21, i64 0, !59, i64 400, !59, i64 424, !63, i64 448, !63, i64 472, !67, i64 496, !67, i64 520, !10, i64 544, !10, i64 552, !68, i64 560, !69, i64 568, !69, i64 600, !70, i64 632, !70, i64 664, !71, i64 696, !71, i64 720, !75, i64 744, !75, i64 768, !79, i64 792, !79, i64 816, !83, i64 840, !83, i64 864}
!21 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !22, i64 0}
!22 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !23, i64 0}
!23 = !{!"_ZTSN4dali12OperatorBaseE", !24, i64 8, !53, i64 336, !53, i64 340, !54, i64 344}
!24 = !{!"_ZTSN4dali6OpSpecE", !25, i64 0, !7, i64 32, !27, i64 40, !31, i64 64, !39, i64 112, !31, i64 136, !43, i64 184, !46, i64 232, !46, i64 256, !50, i64 280}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !10, i64 8, !8, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !7, i64 0}
!27 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!31 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !32, i64 0}
!32 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !33, i64 0}
!33 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !34, i64 0, !36, i64 8}
!34 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !35, i64 0}
!35 = !{!"_ZTSSt4lessIvE"}
!36 = !{!"_ZTSSt15_Rb_tree_header", !37, i64 0, !10, i64 32}
!37 = !{!"_ZTSSt18_Rb_tree_node_base", !38, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!38 = !{!"_ZTSSt14_Rb_tree_color", !8, i64 0}
!39 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !40, i64 0}
!40 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!43 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !44, i64 0}
!44 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !45, i64 0}
!45 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !34, i64 0, !36, i64 8}
!46 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !47, i64 0}
!47 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !48, i64 0}
!48 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !49, i64 0}
!49 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!50 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !51, i64 0}
!51 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !52, i64 0}
!52 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !34, i64 0, !36, i64 8}
!53 = !{!"int", !8, i64 0}
!54 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !55, i64 0}
!55 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !7, i64 0, !10, i64 8, !56, i64 16, !10, i64 24, !57, i64 32, !7, i64 48}
!56 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !7, i64 0}
!57 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !58, i64 0, !10, i64 8}
!58 = !{!"float", !8, i64 0}
!59 = !{!"_ZTSSt6vectorIS_IlSaIlEESaIS1_EE", !60, i64 0}
!60 = !{!"_ZTSSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE12_Vector_implE", !62, i64 0}
!62 = !{!"_ZTSNSt12_Vector_baseISt6vectorIlSaIlEESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!63 = !{!"_ZTSSt6vectorIS_IPvSaIS0_EESaIS2_EE", !64, i64 0}
!64 = !{!"_ZTSSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE", !65, i64 0}
!65 = !{!"_ZTSNSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE12_Vector_implE", !66, i64 0}
!66 = !{!"_ZTSNSt12_Vector_baseISt6vectorIPvSaIS1_EESaIS3_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!67 = !{!"_ZTSN4dali11SmallVectorIiLm3ESaIiEEE", !8, i64 0, !10, i64 16}
!68 = !{!"bool", !8, i64 0}
!69 = !{!"_ZTSN4dali11SmallVectorI13_DALIDataTypeLm6ESaIS1_EEE", !8, i64 0, !10, i64 24}
!70 = !{!"_ZTSN4dali11SmallVectorIiLm6ESaIiEEE", !8, i64 0, !10, i64 24}
!71 = !{!"_ZTSSt6vectorImSaImEE", !72, i64 0}
!72 = !{!"_ZTSSt12_Vector_baseImSaImEE", !73, i64 0}
!73 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !74, i64 0}
!74 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!75 = !{!"_ZTSSt6vectorIN4dali15TensorListShapeILin1EEESaIS2_EE", !76, i64 0}
!76 = !{!"_ZTSSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE", !77, i64 0}
!77 = !{!"_ZTSNSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE12_Vector_implE", !78, i64 0}
!78 = !{!"_ZTSNSt12_Vector_baseIN4dali15TensorListShapeILin1EEESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!79 = !{!"_ZTSSt6vectorIN4dali11TensorShapeILin1EEESaIS2_EE", !80, i64 0}
!80 = !{!"_ZTSSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE", !81, i64 0}
!81 = !{!"_ZTSNSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE12_Vector_implE", !82, i64 0}
!82 = !{!"_ZTSNSt12_Vector_baseIN4dali11TensorShapeILin1EEESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!83 = !{!"_ZTSSt6vectorIN4dali13NumbaDevArrayESaIS1_EE", !84, i64 0}
!84 = !{!"_ZTSSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE", !85, i64 0}
!85 = !{!"_ZTSNSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE12_Vector_implE", !86, i64 0}
!86 = !{!"_ZTSNSt12_Vector_baseIN4dali13NumbaDevArrayESaIS1_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!87 = distinct !{!87, !14}
!88 = !{!53, !53, i64 0}
!89 = distinct !{!89, !14}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass