; LLVM IR from alekras/ao.rtos.cpp :: Tools/ARM-Raspberry_Pi/Initial_Interactive_Loader (InitialInteractiveLoaderSM)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.InitialInteractiveLoaderSM = type <{ %class.Efsm, i32, i32, i32, i32, i32, i32, i32, [4 x i8], ptr, i32, i32, i32, [4 x i8] }>
%class.Efsm = type { { i64, i64 } }

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN26InitialInteractiveLoaderSM7initialE5PhasePc(ptr noundef nonnull align 8 dereferenceable(68), i32 noundef, ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4EfsmIcE4tranEMS0_Fi5PhasePcE(ptr noundef nonnull align 8 dereferenceable(16), i64, i64) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN26InitialInteractiveLoaderSM4loadE5PhasePc(ptr noundef nonnull align 8 dereferenceable(68) %0, i32 noundef %1, ptr noundef %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca { i64, i64 }, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  %9 = load i32, ptr %5, align 4, !tbaa !9
  switch i32 %9, label %37 [
    i32 0, label %10
    i32 1, label %13
    i32 2, label %36
  ]

10:                                               ; preds = %3
  %11 = getelementptr inbounds %class.InitialInteractiveLoaderSM, ptr %8, i32 0, i32 2
  store i32 0, ptr %11, align 4, !tbaa !11
  %12 = getelementptr inbounds %class.InitialInteractiveLoaderSM, ptr %8, i32 0, i32 1
  store i32 0, ptr %12, align 8, !tbaa !15
  br label %37

13:                                               ; preds = %3
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load i8, ptr %14, align 1, !tbaa !16
  %16 = sext i8 %15 to i32
  switch i32 %16, label %25 [
    i32 10, label %17
    i32 13, label %21
  ]

17:                                               ; preds = %13
  %18 = getelementptr inbounds %class.InitialInteractiveLoaderSM, ptr %8, i32 0, i32 1
  %19 = load i32, ptr %18, align 8, !tbaa !15
  %20 = add nsw i32 %19, 3
  store i32 %20, ptr %18, align 8, !tbaa !15
  br label %26

21:                                               ; preds = %13
  %22 = getelementptr inbounds %class.InitialInteractiveLoaderSM, ptr %8, i32 0, i32 1
  %23 = load i32, ptr %22, align 8, !tbaa !15
  %24 = add nsw i32 %23, 5
  store i32 %24, ptr %22, align 8, !tbaa !15
  br label %26

25:                                               ; preds = %13
  br label %26

26:                                               ; preds = %25, %21, %17
  %27 = getelementptr inbounds %class.InitialInteractiveLoaderSM, ptr %8, i32 0, i32 1
  %28 = load i32, ptr %27, align 8, !tbaa !15
  %29 = icmp sge i32 %28, 3
  br i1 %29, label %30, label %35

30:                                               ; preds = %26
  store { i64, i64 } { i64 ptrtoint (ptr @_ZN26InitialInteractiveLoaderSM7initialE5PhasePc to i64), i64 0 }, ptr %7, align 8, !tbaa !16
  %31 = getelementptr inbounds { i64, i64 }, ptr %7, i32 0, i32 0
  %32 = load i64, ptr %31, align 8
  %33 = getelementptr inbounds { i64, i64 }, ptr %7, i32 0, i32 1
  %34 = load i64, ptr %33, align 8
  call void @_ZN4EfsmIcE4tranEMS0_Fi5PhasePcE(ptr noundef nonnull align 8 dereferenceable(16) %8, i64 %32, i64 %34)
  br label %35

35:                                               ; preds = %30, %26
  br label %37

36:                                               ; preds = %3
  call void @_ZN26InitialInteractiveLoaderSM10runHex2BinEv(ptr noundef nonnull align 8 dereferenceable(68) %8)
  br label %37

37:                                               ; preds = %36, %35, %10, %3
  ret i32 0
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN26InitialInteractiveLoaderSM10runHex2BinEv(ptr noundef nonnull align 8 dereferenceable(68)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS5Phase", !7, i64 0}
!11 = !{!12, !14, i64 20}
!12 = !{!"_ZTS26InitialInteractiveLoaderSM", !13, i64 0, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !6, i64 48, !14, i64 56, !14, i64 60, !14, i64 64}
!13 = !{!"_ZTS4EfsmIcE", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !14, i64 16}
!16 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN26InitialInteractiveLoaderSM7initialE5PhasePc(ptr noundef nonnull align 8 dereferenceable(68), i32 noundef, ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4EfsmIcE4tranEMS0_Fi5PhasePcE(ptr noundef nonnull align 8 dereferenceable(16), i64, i64) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN26InitialInteractiveLoaderSM4loadE5PhasePc(ptr noundef nonnull align 8 dereferenceable(68) %0, i32 noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 align 2 {
  switch i32 %1, label %15 [
    i32 0, label %4
    i32 1, label %7
    i32 2, label %14
  ]

4:                                                ; preds = %3
  %5 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 0, ptr %5, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 0, ptr %6, align 8, !tbaa !12
  br label %15

7:                                                ; preds = %3
  %8 = load i8, ptr %2, align 1, !tbaa !13
  %.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 16
  %.pre = load i32, ptr %.phi.trans.insert, align 8, !tbaa !12
  switch i8 %8, label %._crit_edge [
    i8 10, label %._crit_edge.sink.split
    i8 13, label %9
  ]

9:                                                ; preds = %7
  br label %._crit_edge.sink.split

._crit_edge.sink.split:                           ; preds = %7, %9
  %.sink2 = phi i32 [ 5, %9 ], [ 3, %7 ]
  %10 = add nsw i32 %.pre, %.sink2
  store i32 %10, ptr %.phi.trans.insert, align 8, !tbaa !12
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.sink.split, %7
  %11 = phi i32 [ %.pre, %7 ], [ %10, %._crit_edge.sink.split ]
  %12 = icmp sgt i32 %11, 2
  br i1 %12, label %13, label %15

13:                                               ; preds = %._crit_edge
  tail call void @_ZN4EfsmIcE4tranEMS0_Fi5PhasePcE(ptr noundef nonnull align 8 dereferenceable(16) %0, i64 ptrtoint (ptr @_ZN26InitialInteractiveLoaderSM7initialE5PhasePc to i64), i64 0)
  br label %15

14:                                               ; preds = %3
  tail call void @_ZN26InitialInteractiveLoaderSM10runHex2BinEv(ptr noundef nonnull align 8 dereferenceable(68) %0)
  br label %15

15:                                               ; preds = %._crit_edge, %13, %14, %4, %3
  ret i32 0
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN26InitialInteractiveLoaderSM10runHex2BinEv(ptr noundef nonnull align 8 dereferenceable(68)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 20}
!6 = !{!"_ZTS26InitialInteractiveLoaderSM", !7, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !11, i64 48, !10, i64 56, !10, i64 60, !10, i64 64}
!7 = !{!"_ZTS4EfsmIcE", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!8, !8, i64 0}


; Effective O3 passes: BDCEPass,GVNPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass