; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_hinstrps_avx512(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %12, i32 0, i32 6
  %14 = load i32, ptr %13, align 4, !tbaa !11
  %15 = icmp uge i32 %14, 1101
  %16 = zext i1 %15 to i64
  %17 = select i1 %15, i32 122, i32 121
  %18 = trunc i32 %17 to i8
  store i8 %18, ptr %11, align 1, !tbaa !13
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %19, i32 0, i32 6
  %21 = load i32, ptr %20, align 4, !tbaa !11
  %22 = icmp uge i32 %21, 1101
  br i1 %22, label %23, label %35

23:                                               ; preds = %5
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load i8, ptr %11, align 1, !tbaa !13
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %24, i32 noundef -259181021, i8 noundef signext %25, i32 noundef %26, i32 noundef %27, i32 noundef %28, i32 noundef 78)
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = load i8, ptr %11, align 1, !tbaa !13
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = load i32, ptr %8, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %29, i32 noundef %30, i8 noundef signext %31, i32 noundef %32, i32 noundef %33, i32 noundef %34)
  br label %35

35:                                               ; preds = %23, %5
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load i8, ptr %11, align 1, !tbaa !13
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = load i32, ptr %8, align 4, !tbaa !9
  %40 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %36, i32 noundef -259181021, i8 noundef signext %37, i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef 177)
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = load i8, ptr %11, align 1, !tbaa !13
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %41, i32 noundef %42, i8 noundef signext %43, i32 noundef %44, i32 noundef %45, i32 noundef %46)
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = load i32, ptr %10, align 4, !tbaa !9
  %50 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %47, i32 noundef 806098630, i8 noundef signext 121, i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef 78)
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %51, i32 noundef %52, i8 noundef signext 121, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %56, i32 noundef 806098630, i8 noundef signext 121, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef 1)
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = load i8, ptr %11, align 1, !tbaa !13
  %63 = load i32, ptr %10, align 4, !tbaa !9
  %64 = load i32, ptr %9, align 4, !tbaa !9
  %65 = load i32, ptr %8, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %60, i32 noundef %61, i8 noundef signext %62, i32 noundef %63, i32 noundef %64, i32 noundef %65)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_hinstrps_avx512(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = getelementptr inbounds i8, ptr %0, i64 28
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = icmp ugt i32 %7, 1100
  br i1 %8, label %9, label %10

9:                                                ; preds = %5
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef -259181021, i8 noundef signext 122, i32 noundef %2, i32 noundef %2, i32 noundef %3, i32 noundef 78) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext 122, i32 noundef %2, i32 noundef %3, i32 noundef %2) #2
  br label %10

10:                                               ; preds = %9, %5
  %11 = phi i8 [ 122, %9 ], [ 121, %5 ]
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef -259181021, i8 noundef signext %11, i32 noundef %2, i32 noundef %2, i32 noundef %3, i32 noundef 177) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext %11, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 806098630, i8 noundef signext 121, i32 noundef %4, i32 noundef %4, i32 noundef %3, i32 noundef 78) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext 121, i32 noundef %4, i32 noundef %3, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 806098630, i8 noundef signext 121, i32 noundef %4, i32 noundef %4, i32 noundef %3, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext %11, i32 noundef %4, i32 noundef %3, i32 noundef %2) #2
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass