; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_gather_scatter_avx_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_x86_instruction_unified_vec_move_ext(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13) #0 {
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i8, align 1
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  store ptr %0, ptr %15, align 8, !tbaa !5
  store i32 %1, ptr %16, align 4, !tbaa !9
  store i32 %2, ptr %17, align 4, !tbaa !9
  store i32 %3, ptr %18, align 4, !tbaa !9
  store i32 %4, ptr %19, align 4, !tbaa !9
  store i32 %5, ptr %20, align 4, !tbaa !9
  store i8 %6, ptr %21, align 1, !tbaa !11
  store i32 %7, ptr %22, align 4, !tbaa !9
  store i32 %8, ptr %23, align 4, !tbaa !9
  store i32 %9, ptr %24, align 4, !tbaa !9
  store i32 %10, ptr %25, align 4, !tbaa !9
  store i32 %11, ptr %26, align 4, !tbaa !9
  store i32 %12, ptr %27, align 4, !tbaa !9
  store i32 %13, ptr %28, align 4, !tbaa !9
  %29 = load i32, ptr %23, align 4, !tbaa !9
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %37, label %31

31:                                               ; preds = %14
  %32 = load i32, ptr %23, align 4, !tbaa !9
  %33 = icmp ugt i32 %32, 0
  br i1 %33, label %34, label %49

34:                                               ; preds = %31
  %35 = load i32, ptr %25, align 4, !tbaa !9
  %36 = icmp ugt i32 %35, 0
  br i1 %36, label %37, label %49

37:                                               ; preds = %34, %14
  %38 = load ptr, ptr %15, align 8, !tbaa !5
  %39 = load i32, ptr %16, align 4, !tbaa !9
  %40 = load i32, ptr %17, align 4, !tbaa !9
  %41 = load i32, ptr %18, align 4, !tbaa !9
  %42 = load i32, ptr %19, align 4, !tbaa !9
  %43 = load i32, ptr %20, align 4, !tbaa !9
  %44 = load i8, ptr %21, align 1, !tbaa !11
  %45 = load i32, ptr %22, align 4, !tbaa !9
  %46 = load i32, ptr %23, align 4, !tbaa !9
  %47 = load i32, ptr %24, align 4, !tbaa !9
  %48 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef %43, i8 noundef signext %44, i32 noundef %45, i32 noundef %46, i32 noundef %47, i32 noundef %48)
  br label %49

49:                                               ; preds = %37, %34, %31
  %50 = load i32, ptr %23, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 1
  br i1 %51, label %52, label %67

52:                                               ; preds = %49
  %53 = load i32, ptr %26, align 4, !tbaa !9
  %54 = icmp ugt i32 %53, 0
  br i1 %54, label %55, label %67

55:                                               ; preds = %52
  %56 = load ptr, ptr %15, align 8, !tbaa !5
  %57 = load i32, ptr %17, align 4, !tbaa !9
  %58 = load i32, ptr %18, align 4, !tbaa !9
  %59 = load i32, ptr %19, align 4, !tbaa !9
  %60 = load i32, ptr %20, align 4, !tbaa !9
  %61 = load i32, ptr %26, align 4, !tbaa !9
  %62 = sub i32 %61, 1
  %63 = mul i32 %62, 2
  %64 = add i32 %60, %63
  %65 = load i32, ptr %27, align 4, !tbaa !9
  %66 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %56, i32 noundef -1610334069, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %64, i32 noundef %65, i32 noundef %66)
  br label %67

67:                                               ; preds = %55, %52, %49
  ret void
}

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_x86_instruction_unified_vec_move_ext(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13) local_unnamed_addr #0 {
  %15 = icmp ne i32 %8, 0
  %.not = icmp eq i32 %10, 0
  %or.cond = and i1 %15, %.not
  br i1 %or.cond, label %17, label %16

16:                                               ; preds = %14
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %13) #2
  br label %17

17:                                               ; preds = %14, %16
  %18 = icmp eq i32 %8, 1
  %19 = icmp ne i32 %11, 0
  %or.cond3 = and i1 %18, %19
  br i1 %or.cond3, label %20, label %24

20:                                               ; preds = %17
  %21 = shl i32 %11, 1
  %22 = add i32 %5, -2
  %23 = add i32 %22, %21
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %0, i32 noundef -1610334069, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %23, i32 noundef %12, i32 noundef %13) #2
  br label %24

24:                                               ; preds = %20, %17
  ret void
}

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass