; LLVM IR from libxsmm/libxsmm :: src (generator_packed_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2 {
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i32 %4, ptr %13, align 4, !tbaa !9
  store i32 %5, ptr %14, align 4, !tbaa !9
  store i32 %6, ptr %15, align 4, !tbaa !9
  store i32 %7, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %20, i32 0, i32 6
  %22 = load i32, ptr %21, align 4, !tbaa !11
  %23 = icmp uge i32 %22, 2201
  br i1 %23, label %24, label %29

24:                                               ; preds = %8
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %25, i32 0, i32 6
  %27 = load i32, ptr %26, align 4, !tbaa !11
  %28 = icmp ule i32 %27, 2999
  br label %29

29:                                               ; preds = %24, %8
  %30 = phi i1 [ false, %8 ], [ %28, %24 ]
  %31 = zext i1 %30 to i64
  %32 = select i1 %30, i32 1, i32 0
  store i32 %32, ptr %19, align 4, !tbaa !9
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %158, %29
  %34 = load i32, ptr %17, align 4, !tbaa !9
  %35 = load i32, ptr %13, align 4, !tbaa !9
  %36 = icmp ult i32 %34, %35
  br i1 %36, label %37, label %161

37:                                               ; preds = %33
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %123, %37
  %39 = load i32, ptr %18, align 4, !tbaa !9
  %40 = load i32, ptr %14, align 4, !tbaa !9
  %41 = icmp ult i32 %39, %40
  br i1 %41, label %42, label %126

42:                                               ; preds = %38
  %43 = load ptr, ptr %12, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %43, i32 0, i32 6
  %45 = load i32, ptr %44, align 1, !tbaa !13
  %46 = and i32 4, %45
  %47 = icmp ne i32 0, %46
  br i1 %47, label %48, label %86

48:                                               ; preds = %42
  %49 = load i32, ptr %19, align 4, !tbaa !9
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %51, label %68

51:                                               ; preds = %48
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  %53 = load i32, ptr %17, align 4, !tbaa !9
  %54 = load i32, ptr %14, align 4, !tbaa !9
  %55 = mul i32 %53, %54
  %56 = load i32, ptr %18, align 4, !tbaa !9
  %57 = add i32 %55, %56
  %58 = load i32, ptr %17, align 4, !tbaa !9
  %59 = load i32, ptr %14, align 4, !tbaa !9
  %60 = mul i32 %58, %59
  %61 = load i32, ptr %18, align 4, !tbaa !9
  %62 = add i32 %60, %61
  %63 = load i32, ptr %17, align 4, !tbaa !9
  %64 = load i32, ptr %14, align 4, !tbaa !9
  %65 = mul i32 %63, %64
  %66 = load i32, ptr %18, align 4, !tbaa !9
  %67 = add i32 %65, %66
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %52, i32 noundef 77606915, i32 noundef %57, i32 noundef %62, i8 noundef zeroext -1, i32 noundef %67, i32 noundef 127, i32 noundef 3)
  br label %85

68:                                               ; preds = %48
  %69 = load ptr, ptr %9, align 8, !tbaa !5
  %70 = load i32, ptr %17, align 4, !tbaa !9
  %71 = load i32, ptr %14, align 4, !tbaa !9
  %72 = mul i32 %70, %71
  %73 = load i32, ptr %18, align 4, !tbaa !9
  %74 = add i32 %72, %73
  %75 = load i32, ptr %17, align 4, !tbaa !9
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = mul i32 %75, %76
  %78 = load i32, ptr %18, align 4, !tbaa !9
  %79 = add i32 %77, %78
  %80 = load i32, ptr %17, align 4, !tbaa !9
  %81 = load i32, ptr %14, align 4, !tbaa !9
  %82 = mul i32 %80, %81
  %83 = load i32, ptr %18, align 4, !tbaa !9
  %84 = add i32 %82, %83
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %69, i32 noundef 773856275, i32 noundef %74, i32 noundef %79, i8 noundef zeroext 0, i32 noundef %84, i32 noundef 1)
  br label %85

85:                                               ; preds = %68, %51
  br label %122

86:                                               ; preds = %42
  %87 = load ptr, ptr %9, align 8, !tbaa !5
  %88 = load ptr, ptr %10, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %88, i32 0, i32 5
  %90 = load i32, ptr %89, align 4, !tbaa !17
  %91 = load ptr, ptr %10, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %91, i32 0, i32 24
  %93 = load i32, ptr %92, align 4, !tbaa !19
  %94 = load i32, ptr %17, align 4, !tbaa !9
  %95 = load i32, ptr %14, align 4, !tbaa !9
  %96 = mul i32 %94, %95
  %97 = load i32, ptr %18, align 4, !tbaa !9
  %98 = add i32 %96, %97
  %99 = load ptr, ptr %11, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %99, i32 0, i32 5
  %101 = load i32, ptr %100, align 4, !tbaa !20
  %102 = load i32, ptr %15, align 4, !tbaa !9
  %103 = load i32, ptr %19, align 4, !tbaa !9
  %104 = trunc i32 %103 to i8
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %87, i32 noundef %90, i32 noundef %93, i32 noundef %98, i32 noundef %101, i32 noundef %102, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %104)
  %105 = load ptr, ptr %9, align 8, !tbaa !5
  %106 = load ptr, ptr %10, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %106, i32 0, i32 5
  %108 = load i32, ptr %107, align 4, !tbaa !17
  %109 = load ptr, ptr %10, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %109, i32 0, i32 24
  %111 = load i32, ptr %110, align 4, !tbaa !19
  %112 = load ptr, ptr %10, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %112, i32 0, i32 5
  %114 = load i32, ptr %113, align 4, !tbaa !17
  %115 = load i32, ptr %16, align 4, !tbaa !9
  %116 = zext i32 %115 to i64
  %117 = load ptr, ptr %11, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %117, i32 0, i32 5
  %119 = load i32, ptr %118, align 4, !tbaa !20
  %120 = zext i32 %119 to i64
  %121 = mul nsw i64 %116, %120
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %105, i32 noundef 4096, i32 noundef %108, i32 noundef %111, i32 noundef %114, i64 noundef %121)
  br label %122

122:                                              ; preds = %86, %85
  br label %123

123:                                              ; preds = %122
  %124 = load i32, ptr %18, align 4, !tbaa !9
  %125 = add i32 %124, 1
  store i32 %125, ptr %18, align 4, !tbaa !9
  br label %38, !llvm.loop !23

126:                                              ; preds = %38
  %127 = load ptr, ptr %12, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %127, i32 0, i32 6
  %129 = load i32, ptr %128, align 1, !tbaa !13
  %130 = and i32 4, %129
  %131 = icmp eq i32 0, %130
  br i1 %131, label %132, label %157

132:                                              ; preds = %126
  %133 = load ptr, ptr %9, align 8, !tbaa !5
  %134 = load ptr, ptr %10, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %134, i32 0, i32 5
  %136 = load i32, ptr %135, align 4, !tbaa !17
  %137 = load ptr, ptr %10, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %137, i32 0, i32 24
  %139 = load i32, ptr %138, align 4, !tbaa !19
  %140 = load ptr, ptr %10, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %140, i32 0, i32 5
  %142 = load i32, ptr %141, align 4, !tbaa !17
  %143 = load ptr, ptr %12, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %143, i32 0, i32 5
  %145 = load i32, ptr %144, align 1, !tbaa !25
  %146 = load i32, ptr %14, align 4, !tbaa !9
  %147 = sub i32 %145, %146
  %148 = zext i32 %147 to i64
  %149 = load i32, ptr %16, align 4, !tbaa !9
  %150 = zext i32 %149 to i64
  %151 = mul nsw i64 %148, %150
  %152 = load ptr, ptr %11, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %152, i32 0, i32 5
  %154 = load i32, ptr %153, align 4, !tbaa !20
  %155 = zext i32 %154 to i64
  %156 = mul nsw i64 %151, %155
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %133, i32 noundef 4096, i32 noundef %136, i32 noundef %139, i32 noundef %142, i64 noundef %156)
  br label %157

157:                                              ; preds = %132, %126
  br label %158

158:                                              ; preds = %157
  %159 = load i32, ptr %17, align 4, !tbaa !9
  %160 = add i32 %159, 1
  store i32 %160, ptr %17, align 4, !tbaa !9
  br label %33, !llvm.loop !26

161:                                              ; preds = %33
  %162 = load ptr, ptr %12, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %162, i32 0, i32 6
  %164 = load i32, ptr %163, align 1, !tbaa !13
  %165 = and i32 4, %164
  %166 = icmp eq i32 0, %165
  br i1 %166, label %167, label %193

167:                                              ; preds = %161
  %168 = load ptr, ptr %9, align 8, !tbaa !5
  %169 = load ptr, ptr %10, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %169, i32 0, i32 5
  %171 = load i32, ptr %170, align 4, !tbaa !17
  %172 = load ptr, ptr %10, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %172, i32 0, i32 24
  %174 = load i32, ptr %173, align 4, !tbaa !19
  %175 = load ptr, ptr %10, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %175, i32 0, i32 5
  %177 = load i32, ptr %176, align 4, !tbaa !17
  %178 = load i32, ptr %13, align 4, !tbaa !9
  %179 = zext i32 %178 to i64
  %180 = load ptr, ptr %12, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %180, i32 0, i32 5
  %182 = load i32, ptr %181, align 1, !tbaa !25
  %183 = zext i32 %182 to i64
  %184 = mul nsw i64 %179, %183
  %185 = load i32, ptr %16, align 4, !tbaa !9
  %186 = zext i32 %185 to i64
  %187 = mul nsw i64 %184, %186
  %188 = load ptr, ptr %11, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %188, i32 0, i32 5
  %190 = load i32, ptr %189, align 4, !tbaa !20
  %191 = zext i32 %190 to i64
  %192 = mul nsw i64 %187, %191
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %168, i32 noundef 4097, i32 noundef %171, i32 noundef %174, i32 noundef %177, i64 noundef %192)
  br label %193

193:                                              ; preds = %167, %161
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!14, !10, i64 24}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!18, !10, i64 20}
!18 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!19 = !{!18, !10, i64 96}
!20 = !{!21, !10, i64 20}
!21 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !22, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!22 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!14, !10, i64 20}
!26 = distinct !{!26, !24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_gemm_aarch64_load_C(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #1 {
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %._crit_edge68, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %8
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.fr74 = freeze i32 %10
  %11 = add i32 %.fr74, -2201
  %spec.select = icmp ult i32 %11, 799
  %.not73 = icmp eq i32 %5, 0
  %12 = getelementptr inbounds i8, ptr %3, i64 24
  %13 = getelementptr inbounds i8, ptr %1, i64 20
  %14 = getelementptr inbounds i8, ptr %1, i64 96
  %15 = getelementptr inbounds i8, ptr %2, i64 20
  %16 = zext i1 %spec.select to i8
  %17 = zext i32 %7 to i64
  %18 = getelementptr inbounds i8, ptr %3, i64 20
  br i1 %.not73, label %.preheader, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  br i1 %spec.select, label %.preheader.us.us, label %.preheader.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %30
  %.067.us.us = phi i32 [ %31, %30 ], [ 0, %.preheader.lr.ph.split.us ]
  %19 = mul i32 %.067.us.us, %5
  br label %32

20:                                               ; preds = %._crit_edge.split.us.us.us
  %21 = load i32, ptr %13, align 4, !tbaa !11
  %22 = load i32, ptr %14, align 4, !tbaa !13
  %23 = load i32, ptr %18, align 1, !tbaa !14
  %24 = sub i32 %23, %5
  %25 = zext i32 %24 to i64
  %26 = mul nuw nsw i64 %25, %17
  %27 = load i32, ptr %15, align 4, !tbaa !18
  %28 = zext i32 %27 to i64
  %29 = mul nuw nsw i64 %26, %28
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %21, i32 noundef %22, i32 noundef %21, i64 noundef %29) #2
  br label %30

30:                                               ; preds = %._crit_edge.split.us.us.us, %20
  %31 = add nuw i32 %.067.us.us, 1
  %exitcond79.not = icmp eq i32 %31, %4
  br i1 %exitcond79.not, label %._crit_edge68, label %.preheader.us.us, !llvm.loop !21

32:                                               ; preds = %47, %.preheader.us.us
  %.06266.us.us.us = phi i32 [ 0, %.preheader.us.us ], [ %48, %47 ]
  %33 = load i32, ptr %12, align 1, !tbaa !23
  %34 = and i32 %33, 4
  %.not.us.us.us = icmp eq i32 %34, 0
  br i1 %.not.us.us.us, label %37, label %35

35:                                               ; preds = %32
  %36 = add i32 %.06266.us.us.us, %19
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %36, i32 noundef %36, i8 noundef zeroext -1, i32 noundef %36, i32 noundef 127, i32 noundef 3) #2
  br label %47

37:                                               ; preds = %32
  %38 = load i32, ptr %13, align 4, !tbaa !11
  %39 = load i32, ptr %14, align 4, !tbaa !13
  %40 = add i32 %.06266.us.us.us, %19
  %41 = load i32, ptr %15, align 4, !tbaa !18
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %6, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %16) #2
  %42 = load i32, ptr %13, align 4, !tbaa !11
  %43 = load i32, ptr %14, align 4, !tbaa !13
  %44 = load i32, ptr %15, align 4, !tbaa !18
  %45 = zext i32 %44 to i64
  %46 = mul nuw nsw i64 %45, %17
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %42, i32 noundef %43, i32 noundef %42, i64 noundef %46) #2
  br label %47

47:                                               ; preds = %37, %35
  %48 = add nuw i32 %.06266.us.us.us, 1
  %exitcond78.not = icmp eq i32 %48, %5
  br i1 %exitcond78.not, label %._crit_edge.split.us.us.us, label %32, !llvm.loop !24

._crit_edge.split.us.us.us:                       ; preds = %47
  %49 = load i32, ptr %12, align 1, !tbaa !23
  %50 = and i32 %49, 4
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %20, label %30

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %63
  %.067.us = phi i32 [ %64, %63 ], [ 0, %.preheader.lr.ph.split.us ]
  %52 = mul i32 %.067.us, %5
  br label %65

53:                                               ; preds = %._crit_edge.split.us71
  %54 = load i32, ptr %13, align 4, !tbaa !11
  %55 = load i32, ptr %14, align 4, !tbaa !13
  %56 = load i32, ptr %18, align 1, !tbaa !14
  %57 = sub i32 %56, %5
  %58 = zext i32 %57 to i64
  %59 = mul nuw nsw i64 %58, %17
  %60 = load i32, ptr %15, align 4, !tbaa !18
  %61 = zext i32 %60 to i64
  %62 = mul nuw nsw i64 %59, %61
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %54, i32 noundef %55, i32 noundef %54, i64 noundef %62) #2
  br label %63

63:                                               ; preds = %53, %._crit_edge.split.us71
  %64 = add nuw i32 %.067.us, 1
  %exitcond77.not = icmp eq i32 %64, %4
  br i1 %exitcond77.not, label %._crit_edge68, label %.preheader.us, !llvm.loop !21

65:                                               ; preds = %.preheader.us, %80
  %.06266.us69 = phi i32 [ 0, %.preheader.us ], [ %81, %80 ]
  %66 = load i32, ptr %12, align 1, !tbaa !23
  %67 = and i32 %66, 4
  %.not.us70 = icmp eq i32 %67, 0
  br i1 %.not.us70, label %70, label %68

68:                                               ; preds = %65
  %69 = add i32 %.06266.us69, %52
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 773856275, i32 noundef %69, i32 noundef %69, i8 noundef zeroext 0, i32 noundef %69, i32 noundef 1) #2
  br label %80

70:                                               ; preds = %65
  %71 = load i32, ptr %13, align 4, !tbaa !11
  %72 = load i32, ptr %14, align 4, !tbaa !13
  %73 = add i32 %.06266.us69, %52
  %74 = load i32, ptr %15, align 4, !tbaa !18
  tail call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef %74, i32 noundef %6, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 1, i8 noundef zeroext %16) #2
  %75 = load i32, ptr %13, align 4, !tbaa !11
  %76 = load i32, ptr %14, align 4, !tbaa !13
  %77 = load i32, ptr %15, align 4, !tbaa !18
  %78 = zext i32 %77 to i64
  %79 = mul nuw nsw i64 %78, %17
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %75, i32 noundef %76, i32 noundef %75, i64 noundef %79) #2
  br label %80

80:                                               ; preds = %70, %68
  %81 = add nuw i32 %.06266.us69, 1
  %exitcond.not = icmp eq i32 %81, %5
  br i1 %exitcond.not, label %._crit_edge.split.us71, label %65, !llvm.loop !24

._crit_edge.split.us71:                           ; preds = %80
  %82 = load i32, ptr %12, align 1, !tbaa !23
  %83 = and i32 %82, 4
  %84 = icmp eq i32 %83, 0
  br i1 %84, label %53, label %63

.preheader:                                       ; preds = %.preheader.lr.ph, %97
  %.067 = phi i32 [ %98, %97 ], [ 0, %.preheader.lr.ph ]
  %85 = load i32, ptr %12, align 1, !tbaa !23
  %86 = and i32 %85, 4
  %87 = icmp eq i32 %86, 0
  br i1 %87, label %88, label %97

88:                                               ; preds = %.preheader
  %89 = load i32, ptr %13, align 4, !tbaa !11
  %90 = load i32, ptr %14, align 4, !tbaa !13
  %91 = load i32, ptr %18, align 1, !tbaa !14
  %92 = zext i32 %91 to i64
  %93 = mul nuw nsw i64 %92, %17
  %94 = load i32, ptr %15, align 4, !tbaa !18
  %95 = zext i32 %94 to i64
  %96 = mul nuw nsw i64 %93, %95
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %89, i32 noundef %90, i32 noundef %89, i64 noundef %96) #2
  br label %97

97:                                               ; preds = %.preheader, %88
  %98 = add nuw i32 %.067, 1
  %exitcond80.not = icmp eq i32 %98, %4
  br i1 %exitcond80.not, label %._crit_edge68, label %.preheader, !llvm.loop !21

._crit_edge68:                                    ; preds = %63, %30, %97, %8
  %99 = getelementptr inbounds i8, ptr %3, i64 24
  %100 = load i32, ptr %99, align 1, !tbaa !23
  %101 = and i32 %100, 4
  %102 = icmp eq i32 %101, 0
  br i1 %102, label %103, label %119

103:                                              ; preds = %._crit_edge68
  %104 = getelementptr inbounds i8, ptr %1, i64 20
  %105 = load i32, ptr %104, align 4, !tbaa !11
  %106 = getelementptr inbounds i8, ptr %1, i64 96
  %107 = load i32, ptr %106, align 4, !tbaa !13
  %108 = zext i32 %4 to i64
  %109 = getelementptr inbounds i8, ptr %3, i64 20
  %110 = load i32, ptr %109, align 1, !tbaa !14
  %111 = zext i32 %110 to i64
  %112 = zext i32 %7 to i64
  %113 = getelementptr inbounds i8, ptr %2, i64 20
  %114 = load i32, ptr %113, align 4, !tbaa !18
  %115 = zext i32 %114 to i64
  %116 = mul nuw i64 %112, %108
  %117 = mul i64 %116, %111
  %118 = mul nuw nsw i64 %117, %115
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %105, i32 noundef %107, i32 noundef %105, i64 noundef %118) #2
  br label %119

119:                                              ; preds = %103, %._crit_edge68
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 20}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!12, !10, i64 96}
!14 = !{!15, !10, i64 20}
!15 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !16, i64 33, !16, i64 41, !8, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !17, i64 62, !17, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !17, i64 70, !17, i64 72, !17, i64 74, !17, i64 76, !17, i64 78, !17, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !8, i64 94}
!16 = !{!"long long", !8, i64 0}
!17 = !{!"short", !8, i64 0}
!18 = !{!19, !10, i64 20}
!19 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !8, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !10, i64 460, !8, i64 464, !20, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !7, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !7, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!20 = !{!"libxsmm_tile_config", !8, i64 0, !17, i64 2, !8, i64 4, !17, i64 6, !8, i64 8, !17, i64 10, !8, i64 12, !17, i64 14, !8, i64 16, !17, i64 18, !8, i64 20, !17, i64 22, !8, i64 24, !17, i64 26, !8, i64 28, !17, i64 30, !8, i64 32}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!15, !10, i64 24}
!24 = distinct !{!24, !22}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass