; LLVM IR from NVIDIA/DALI :: dali/core/cuda_event_pool.ll (ZN4dali13CUDAEventPool3GetEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }
%"class.dali::CUDAEventPool" = type <{ i32, [4 x i8], ptr, %"class.std::vector", %"class.dali::yielding_spinlock", [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::yielding_spinlock" = type { %"struct.std::atomic_flag" }
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9CUDA_CALLI9cudaErrorEvT_(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool3GetEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8 %0, ptr noundef nonnull align 8 dereferenceable(41) %1, i32 noundef %2) #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.dali::CUDAEvent", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %11 = load ptr, ptr %5, align 8
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = icmp eq i32 %12, -1
  br i1 %13, label %14, label %16

14:                                               ; preds = %3
  %15 = call i32 @cudaGetDevice(ptr noundef %6)
  call void @_Z9CUDA_CALLI9cudaErrorEvT_(i32 noundef %15)
  br label %16

16:                                               ; preds = %14, %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %17 = load i32, ptr %6, align 4, !tbaa !9
  call void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind writable sret(%"class.dali::CUDAEvent") align 8 %7, ptr noundef nonnull align 8 dereferenceable(41) %11, i32 noundef %17)
  %18 = call noundef zeroext i1 @_ZNK4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEEcvbEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  br i1 %18, label %28, label %19

19:                                               ; preds = %16
  %20 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %11, i32 0, i32 0
  %21 = load i32, ptr %20, align 8, !tbaa !11
  %22 = load i32, ptr %6, align 4, !tbaa !9
  invoke void @_ZN4dali9CUDAEvent15CreateWithFlagsEji(ptr dead_on_unwind writable sret(%"class.dali::CUDAEvent") align 8 %0, i32 noundef %21, i32 noundef %22)
          to label %23 unwind label %24

23:                                               ; preds = %19
  store i32 1, ptr %10, align 4
  br label %30

24:                                               ; preds = %28, %19
  %25 = landingpad { ptr, i32 }
          cleanup
  %26 = extractvalue { ptr, i32 } %25, 0
  store ptr %26, ptr %8, align 8
  %27 = extractvalue { ptr, i32 } %25, 1
  store i32 %27, ptr %9, align 4
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  br label %31

28:                                               ; preds = %16
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %7)
          to label %29 unwind label %24

29:                                               ; preds = %28
  store i32 1, ptr %10, align 4
  br label %30

30:                                               ; preds = %29, %23
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  ret void

31:                                               ; preds = %24
  %32 = load ptr, ptr %8, align 8
  %33 = load i32, ptr %9, align 4
  %34 = insertvalue { ptr, i32 } poison, ptr %32, 0
  %35 = insertvalue { ptr, i32 } %34, i32 %33, 1
  resume { ptr, i32 } %35
}

declare i32 @cudaGetDevice(ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8, ptr noundef nonnull align 8 dereferenceable(41), i32 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEEcvbEv(ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

declare void @_ZN4dali9CUDAEvent15CreateWithFlagsEji(ptr dead_on_unwind writable sret(%"class.dali::CUDAEvent") align 8, i32 noundef, i32 noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTSN4dali13CUDAEventPoolE", !10, i64 0, !6, i64 8, !13, i64 16, !17, i64 40}
!13 = !{!"_ZTSSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSN4dali17yielding_spinlockILi100EEE", !18, i64 0}
!18 = !{!"_ZTSSt11atomic_flag", !19, i64 0}
!19 = !{!"_ZTSSt18__atomic_flag_base", !20, i64 0}
!20 = !{!"bool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9CUDA_CALLI9cudaErrorEvT_(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool3GetEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8 %0, ptr noundef nonnull align 8 dereferenceable(41) %1, i32 noundef %2) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca %"class.dali::CUDAEvent", align 8
  store i32 %2, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %2, -1
  br i1 %6, label %7, label %9

7:                                                ; preds = %3
  %8 = call i32 @cudaGetDevice(ptr noundef nonnull %4)
  call void @_Z9CUDA_CALLI9cudaErrorEvT_(i32 noundef %8)
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %7, %3
  %10 = phi i32 [ %.pre, %7 ], [ %2, %3 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #6
  call void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind nonnull writable sret(%"class.dali::CUDAEvent") align 8 %5, ptr noundef nonnull align 8 dereferenceable(41) %1, i32 noundef %10)
  %11 = call noundef zeroext i1 @_ZNK4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEEcvbEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #6
  br i1 %11, label %17, label %12

12:                                               ; preds = %9
  %13 = load i32, ptr %1, align 8, !tbaa !9
  %14 = load i32, ptr %4, align 4, !tbaa !5
  invoke void @_ZN4dali9CUDAEvent15CreateWithFlagsEji(ptr dead_on_unwind writable sret(%"class.dali::CUDAEvent") align 8 %0, i32 noundef %13, i32 noundef %14)
          to label %18 unwind label %15

15:                                               ; preds = %17, %12
  %16 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
  resume { ptr, i32 } %16

17:                                               ; preds = %9
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %5)
          to label %18 unwind label %15

18:                                               ; preds = %17, %12
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
  ret void
}

declare i32 @cudaGetDevice(ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8, ptr noundef nonnull align 8 dereferenceable(41), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEEcvbEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

declare void @_ZN4dali9CUDAEvent15CreateWithFlagsEji(ptr dead_on_unwind writable sret(%"class.dali::CUDAEvent") align 8, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN4dali13CUDAEventPoolE", !6, i64 0, !11, i64 8, !12, i64 16, !16, i64 40}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"_ZTSSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN4dali13CUDAEventPool10EventEntryESaIS3_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!16 = !{!"_ZTSN4dali17yielding_spinlockILi100EEE", !17, i64 0}
!17 = !{!"_ZTSSt11atomic_flag", !18, i64 0}
!18 = !{!"_ZTSSt18__atomic_flag_base", !19, i64 0}
!19 = !{!"bool", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass