; LLVM IR from libxsmm/libxsmm :: src (generator_packed_spgemm_csc_bsparse_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd = external hidden unnamed_addr constant [425 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) #3 {
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca [28 x [4 x i32]], align 16
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  store ptr %0, ptr %16, align 8, !tbaa !5
  store ptr %1, ptr %17, align 8, !tbaa !5
  store ptr %2, ptr %18, align 8, !tbaa !5
  store ptr %3, ptr %19, align 8, !tbaa !5
  store ptr %4, ptr %20, align 8, !tbaa !5
  store ptr %5, ptr %21, align 8, !tbaa !5
  store ptr %6, ptr %22, align 8, !tbaa !5
  store ptr %7, ptr %23, align 8, !tbaa !5
  store i32 %8, ptr %24, align 4, !tbaa !9
  store i32 %9, ptr %25, align 4, !tbaa !9
  store i32 %10, ptr %26, align 4, !tbaa !9
  store i32 %11, ptr %27, align 4, !tbaa !9
  store i32 %12, ptr %28, align 4, !tbaa !9
  store i32 %13, ptr %29, align 4, !tbaa !9
  store i32 %14, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #5
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #5
  store i32 0, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #5
  store i32 0, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #5
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #5
  %44 = load i32, ptr %25, align 4, !tbaa !9
  %45 = load i32, ptr %24, align 4, !tbaa !9
  %46 = sub i32 %44, %45
  %47 = load i32, ptr %28, align 4, !tbaa !9
  %48 = mul i32 %46, %47
  store i32 %48, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #5
  %49 = load i32, ptr %25, align 4, !tbaa !9
  %50 = load i32, ptr %24, align 4, !tbaa !9
  %51 = sub i32 %49, %50
  store i32 %51, ptr %36, align 4, !tbaa !9
  %52 = load ptr, ptr %23, align 8, !tbaa !5
  %53 = load i32, ptr %28, align 4, !tbaa !9
  %54 = icmp ugt i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %15
  br label %57

56:                                               ; preds = %15
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 300, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd) #6
  unreachable

57:                                               ; preds = %55
  %58 = load i32, ptr %27, align 4, !tbaa !9
  %59 = load i32, ptr %28, align 4, !tbaa !9
  %60 = udiv i32 %58, %59
  %61 = icmp ugt i32 %60, 1
  br i1 %61, label %62, label %71

62:                                               ; preds = %57
  %63 = load ptr, ptr %16, align 8, !tbaa !5
  %64 = load ptr, ptr %17, align 8, !tbaa !5
  %65 = load ptr, ptr %18, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %65, i32 0, i32 25
  %67 = load i32, ptr %66, align 4, !tbaa !11
  %68 = load i32, ptr %27, align 4, !tbaa !9
  %69 = load i32, ptr %28, align 4, !tbaa !9
  %70 = udiv i32 %68, %69
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %63, ptr noundef %64, i32 noundef %67, i32 noundef %70)
  br label %71

71:                                               ; preds = %62, %57
  %72 = load i32, ptr %29, align 4, !tbaa !9
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %74, label %75

74:                                               ; preds = %71
  br label %75

75:                                               ; preds = %74, %71
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %163, %75
  %77 = load i32, ptr %31, align 4, !tbaa !9
  %78 = load i32, ptr %36, align 4, !tbaa !9
  %79 = icmp ult i32 %77, %78
  br i1 %79, label %80, label %166

80:                                               ; preds = %76
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %159, %80
  %82 = load i32, ptr %32, align 4, !tbaa !9
  %83 = load i32, ptr %28, align 4, !tbaa !9
  %84 = icmp ult i32 %82, %83
  br i1 %84, label %85, label %162

85:                                               ; preds = %81
  %86 = load ptr, ptr %20, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 1, !tbaa !13
  %89 = and i32 4, %88
  %90 = icmp ne i32 0, %89
  br i1 %90, label %91, label %101

91:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #5
  %92 = load i32, ptr %31, align 4, !tbaa !9
  %93 = load i32, ptr %28, align 4, !tbaa !9
  %94 = mul i32 %92, %93
  %95 = load i32, ptr %32, align 4, !tbaa !9
  %96 = add i32 %94, %95
  store i32 %96, ptr %37, align 4, !tbaa !9
  %97 = load ptr, ptr %16, align 8, !tbaa !5
  %98 = load i32, ptr %37, align 4, !tbaa !9
  %99 = load i32, ptr %37, align 4, !tbaa !9
  %100 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %97, i32 noundef 773856275, i32 noundef %98, i32 noundef %99, i8 noundef zeroext 0, i32 noundef %100, i32 noundef 1)
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #5
  br label %158

101:                                              ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #5
  %102 = load i32, ptr %31, align 4, !tbaa !9
  %103 = load i32, ptr %28, align 4, !tbaa !9
  %104 = mul i32 %102, %103
  %105 = load i32, ptr %32, align 4, !tbaa !9
  %106 = add i32 %104, %105
  store i32 %106, ptr %38, align 4, !tbaa !9
  %107 = load i32, ptr %32, align 4, !tbaa !9
  %108 = load i32, ptr %28, align 4, !tbaa !9
  %109 = sub i32 %108, 1
  %110 = icmp eq i32 %107, %109
  br i1 %110, label %111, label %115

111:                                              ; preds = %101
  %112 = load i32, ptr %29, align 4, !tbaa !9
  %113 = icmp ne i32 %112, 0
  br i1 %113, label %114, label %115

114:                                              ; preds = %111
  br label %157

115:                                              ; preds = %111, %101
  %116 = load ptr, ptr %16, align 8, !tbaa !5
  %117 = load ptr, ptr %18, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %117, i32 0, i32 24
  %119 = load i32, ptr %118, align 4, !tbaa !17
  %120 = load i32, ptr %24, align 4, !tbaa !9
  %121 = zext i32 %120 to i64
  %122 = load i32, ptr %31, align 4, !tbaa !9
  %123 = zext i32 %122 to i64
  %124 = add nsw i64 %121, %123
  %125 = load i32, ptr %30, align 4, !tbaa !9
  %126 = zext i32 %125 to i64
  %127 = mul nsw i64 %124, %126
  %128 = load ptr, ptr %19, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %128, i32 0, i32 5
  %130 = load i32, ptr %129, align 4, !tbaa !18
  %131 = zext i32 %130 to i64
  %132 = mul nsw i64 %127, %131
  %133 = load i32, ptr %26, align 4, !tbaa !9
  %134 = zext i32 %133 to i64
  %135 = load i32, ptr %32, align 4, !tbaa !9
  %136 = zext i32 %135 to i64
  %137 = add nsw i64 %134, %136
  %138 = load ptr, ptr %19, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %138, i32 0, i32 2
  %140 = load i32, ptr %139, align 8, !tbaa !21
  %141 = zext i32 %140 to i64
  %142 = mul nsw i64 %137, %141
  %143 = load ptr, ptr %19, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %143, i32 0, i32 5
  %145 = load i32, ptr %144, align 4, !tbaa !18
  %146 = zext i32 %145 to i64
  %147 = mul nsw i64 %142, %146
  %148 = add nsw i64 %132, %147
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %116, i32 noundef %119, i64 noundef %148)
  %149 = load ptr, ptr %16, align 8, !tbaa !5
  %150 = load ptr, ptr %18, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %150, i32 0, i32 5
  %152 = load i32, ptr %151, align 4, !tbaa !22
  %153 = load ptr, ptr %18, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %153, i32 0, i32 24
  %155 = load i32, ptr %154, align 4, !tbaa !17
  %156 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %149, i32 noundef 1012942851, i32 noundef %152, i32 noundef %155, i32 noundef 0, i32 noundef %156, i32 noundef 1)
  br label %157

157:                                              ; preds = %115, %114
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #5
  br label %158

158:                                              ; preds = %157, %91
  br label %159

159:                                              ; preds = %158
  %160 = load i32, ptr %32, align 4, !tbaa !9
  %161 = add i32 %160, 1
  store i32 %161, ptr %32, align 4, !tbaa !9
  br label %81, !llvm.loop !23

162:                                              ; preds = %81
  br label %163

163:                                              ; preds = %162
  %164 = load i32, ptr %31, align 4, !tbaa !9
  %165 = add i32 %164, 1
  store i32 %165, ptr %31, align 4, !tbaa !9
  br label %76, !llvm.loop !25

166:                                              ; preds = %76
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %167

167:                                              ; preds = %391, %166
  %168 = load i32, ptr %33, align 4, !tbaa !9
  %169 = load ptr, ptr %20, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %169, i32 0, i32 2
  %171 = load i32, ptr %170, align 1, !tbaa !26
  %172 = icmp ult i32 %168, %171
  br i1 %172, label %173, label %394

173:                                              ; preds = %167
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #5
  store i32 0, ptr %39, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 448, ptr %40) #5
  call void @llvm.memset.p0.i64(ptr align 16 %40, i8 0, i64 448, i1 false)
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %174

174:                                              ; preds = %195, %173
  %175 = load i32, ptr %31, align 4, !tbaa !9
  %176 = load i32, ptr %36, align 4, !tbaa !9
  %177 = icmp ult i32 %175, %176
  br i1 %177, label %178, label %198

178:                                              ; preds = %174
  %179 = load i32, ptr %31, align 4, !tbaa !9
  %180 = zext i32 %179 to i64
  %181 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %180
  %182 = getelementptr inbounds [4 x i32], ptr %181, i64 0, i64 0
  store i32 -1, ptr %182, align 16, !tbaa !9
  %183 = load i32, ptr %31, align 4, !tbaa !9
  %184 = zext i32 %183 to i64
  %185 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %184
  %186 = getelementptr inbounds [4 x i32], ptr %185, i64 0, i64 1
  store i32 -1, ptr %186, align 4, !tbaa !9
  %187 = load i32, ptr %31, align 4, !tbaa !9
  %188 = zext i32 %187 to i64
  %189 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %188
  %190 = getelementptr inbounds [4 x i32], ptr %189, i64 0, i64 2
  store i32 -1, ptr %190, align 8, !tbaa !9
  %191 = load i32, ptr %31, align 4, !tbaa !9
  %192 = zext i32 %191 to i64
  %193 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %192
  %194 = getelementptr inbounds [4 x i32], ptr %193, i64 0, i64 3
  store i32 -1, ptr %194, align 4, !tbaa !9
  br label %195

195:                                              ; preds = %178
  %196 = load i32, ptr %31, align 4, !tbaa !9
  %197 = add i32 %196, 1
  store i32 %197, ptr %31, align 4, !tbaa !9
  br label %174, !llvm.loop !27

198:                                              ; preds = %174
  store i32 0, ptr %34, align 4, !tbaa !9
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %199

199:                                              ; preds = %263, %198
  %200 = load i32, ptr %31, align 4, !tbaa !9
  %201 = load i32, ptr %36, align 4, !tbaa !9
  %202 = icmp ult i32 %200, %201
  br i1 %202, label %203, label %266

203:                                              ; preds = %199
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #5
  %204 = load ptr, ptr %22, align 8, !tbaa !5
  %205 = load i32, ptr %24, align 4, !tbaa !9
  %206 = load i32, ptr %31, align 4, !tbaa !9
  %207 = add i32 %205, %206
  %208 = add i32 %207, 1
  %209 = zext i32 %208 to i64
  %210 = getelementptr inbounds i32, ptr %204, i64 %209
  %211 = load i32, ptr %210, align 4, !tbaa !9
  %212 = load ptr, ptr %22, align 8, !tbaa !5
  %213 = load i32, ptr %24, align 4, !tbaa !9
  %214 = load i32, ptr %31, align 4, !tbaa !9
  %215 = add i32 %213, %214
  %216 = zext i32 %215 to i64
  %217 = getelementptr inbounds i32, ptr %212, i64 %216
  %218 = load i32, ptr %217, align 4, !tbaa !9
  %219 = sub i32 %211, %218
  store i32 %219, ptr %41, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %42) #5
  %220 = load ptr, ptr %22, align 8, !tbaa !5
  %221 = load i32, ptr %24, align 4, !tbaa !9
  %222 = load i32, ptr %31, align 4, !tbaa !9
  %223 = add i32 %221, %222
  %224 = zext i32 %223 to i64
  %225 = getelementptr inbounds i32, ptr %220, i64 %224
  %226 = load i32, ptr %225, align 4, !tbaa !9
  store i32 %226, ptr %42, align 4, !tbaa !9
  store i32 0, ptr %39, align 4, !tbaa !9
  br label %227

227:                                              ; preds = %251, %203
  %228 = load i32, ptr %39, align 4, !tbaa !9
  %229 = load i32, ptr %41, align 4, !tbaa !9
  %230 = icmp ult i32 %228, %229
  br i1 %230, label %231, label %254

231:                                              ; preds = %227
  %232 = load i32, ptr %33, align 4, !tbaa !9
  %233 = load ptr, ptr %21, align 8, !tbaa !5
  %234 = load i32, ptr %42, align 4, !tbaa !9
  %235 = load i32, ptr %39, align 4, !tbaa !9
  %236 = add i32 %234, %235
  %237 = zext i32 %236 to i64
  %238 = getelementptr inbounds i32, ptr %233, i64 %237
  %239 = load i32, ptr %238, align 4, !tbaa !9
  %240 = icmp eq i32 %232, %239
  br i1 %240, label %241, label %250

241:                                              ; preds = %231
  %242 = load i32, ptr %42, align 4, !tbaa !9
  %243 = load i32, ptr %39, align 4, !tbaa !9
  %244 = add i32 %242, %243
  %245 = load i32, ptr %31, align 4, !tbaa !9
  %246 = zext i32 %245 to i64
  %247 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %246
  %248 = getelementptr inbounds [4 x i32], ptr %247, i64 0, i64 0
  store i32 %244, ptr %248, align 16, !tbaa !9
  %249 = load i32, ptr %41, align 4, !tbaa !9
  store i32 %249, ptr %39, align 4, !tbaa !9
  br label %250

250:                                              ; preds = %241, %231
  br label %251

251:                                              ; preds = %250
  %252 = load i32, ptr %39, align 4, !tbaa !9
  %253 = add i32 %252, 1
  store i32 %253, ptr %39, align 4, !tbaa !9
  br label %227, !llvm.loop !28

254:                                              ; preds = %227
  %255 = load i32, ptr %31, align 4, !tbaa !9
  %256 = zext i32 %255 to i64
  %257 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %256
  %258 = getelementptr inbounds [4 x i32], ptr %257, i64 0, i64 0
  %259 = load i32, ptr %258, align 16, !tbaa !9
  %260 = icmp ne i32 %259, -1
  br i1 %260, label %261, label %262

261:                                              ; preds = %254
  store i32 1, ptr %34, align 4, !tbaa !9
  br label %262

262:                                              ; preds = %261, %254
  call void @llvm.lifetime.end.p0(i64 4, ptr %42) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #5
  br label %263

263:                                              ; preds = %262
  %264 = load i32, ptr %31, align 4, !tbaa !9
  %265 = add i32 %264, 1
  store i32 %265, ptr %31, align 4, !tbaa !9
  br label %199, !llvm.loop !29

266:                                              ; preds = %199
  %267 = load i32, ptr %34, align 4, !tbaa !9
  %268 = icmp ne i32 %267, 0
  br i1 %268, label %269, label %389

269:                                              ; preds = %266
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %270

270:                                              ; preds = %385, %269
  %271 = load i32, ptr %32, align 4, !tbaa !9
  %272 = load i32, ptr %28, align 4, !tbaa !9
  %273 = icmp ult i32 %271, %272
  br i1 %273, label %274, label %388

274:                                              ; preds = %270
  %275 = load i32, ptr %32, align 4, !tbaa !9
  %276 = load i32, ptr %28, align 4, !tbaa !9
  %277 = sub i32 %276, 1
  %278 = icmp eq i32 %275, %277
  br i1 %278, label %279, label %283

279:                                              ; preds = %274
  %280 = load i32, ptr %29, align 4, !tbaa !9
  %281 = icmp ne i32 %280, 0
  br i1 %281, label %282, label %283

282:                                              ; preds = %279
  br label %322

283:                                              ; preds = %279, %274
  %284 = load ptr, ptr %16, align 8, !tbaa !5
  %285 = load ptr, ptr %18, align 8, !tbaa !5
  %286 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %285, i32 0, i32 22
  %287 = load i32, ptr %286, align 4, !tbaa !30
  %288 = load i32, ptr %33, align 4, !tbaa !9
  %289 = zext i32 %288 to i64
  %290 = load i32, ptr %30, align 4, !tbaa !9
  %291 = zext i32 %290 to i64
  %292 = mul nsw i64 %289, %291
  %293 = load ptr, ptr %19, align 8, !tbaa !5
  %294 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %293, i32 0, i32 3
  %295 = load i32, ptr %294, align 4, !tbaa !31
  %296 = zext i32 %295 to i64
  %297 = mul nsw i64 %292, %296
  %298 = load i32, ptr %26, align 4, !tbaa !9
  %299 = zext i32 %298 to i64
  %300 = load i32, ptr %32, align 4, !tbaa !9
  %301 = zext i32 %300 to i64
  %302 = add nsw i64 %299, %301
  %303 = load ptr, ptr %19, align 8, !tbaa !5
  %304 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %303, i32 0, i32 2
  %305 = load i32, ptr %304, align 8, !tbaa !21
  %306 = zext i32 %305 to i64
  %307 = mul nsw i64 %302, %306
  %308 = load ptr, ptr %19, align 8, !tbaa !5
  %309 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %308, i32 0, i32 3
  %310 = load i32, ptr %309, align 4, !tbaa !31
  %311 = zext i32 %310 to i64
  %312 = mul nsw i64 %307, %311
  %313 = add nsw i64 %297, %312
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %284, i32 noundef %287, i64 noundef %313)
  %314 = load ptr, ptr %16, align 8, !tbaa !5
  %315 = load ptr, ptr %18, align 8, !tbaa !5
  %316 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %315, i32 0, i32 1
  %317 = load i32, ptr %316, align 4, !tbaa !32
  %318 = load ptr, ptr %18, align 8, !tbaa !5
  %319 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %318, i32 0, i32 22
  %320 = load i32, ptr %319, align 4, !tbaa !30
  %321 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %314, i32 noundef 1012942851, i32 noundef %317, i32 noundef %320, i32 noundef 0, i32 noundef %321, i32 noundef 1)
  br label %322

322:                                              ; preds = %283, %282
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %323

323:                                              ; preds = %381, %322
  %324 = load i32, ptr %31, align 4, !tbaa !9
  %325 = load i32, ptr %36, align 4, !tbaa !9
  %326 = icmp ult i32 %324, %325
  br i1 %326, label %327, label %384

327:                                              ; preds = %323
  %328 = load i32, ptr %31, align 4, !tbaa !9
  %329 = zext i32 %328 to i64
  %330 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %329
  %331 = getelementptr inbounds [4 x i32], ptr %330, i64 0, i64 0
  %332 = load i32, ptr %331, align 16, !tbaa !9
  %333 = icmp ne i32 %332, -1
  br i1 %333, label %334, label %380

334:                                              ; preds = %327
  %335 = load ptr, ptr %16, align 8, !tbaa !5
  %336 = load ptr, ptr %18, align 8, !tbaa !5
  %337 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %336, i32 0, i32 23
  %338 = load i32, ptr %337, align 4, !tbaa !33
  %339 = load i32, ptr %31, align 4, !tbaa !9
  %340 = zext i32 %339 to i64
  %341 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %340
  %342 = getelementptr inbounds [4 x i32], ptr %341, i64 0, i64 0
  %343 = load i32, ptr %342, align 16, !tbaa !9
  %344 = sext i32 %343 to i64
  %345 = load ptr, ptr %19, align 8, !tbaa !5
  %346 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %345, i32 0, i32 3
  %347 = load i32, ptr %346, align 4, !tbaa !31
  %348 = zext i32 %347 to i64
  %349 = mul nsw i64 %344, %348
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %335, i32 noundef %338, i64 noundef %349)
  %350 = load ptr, ptr %16, align 8, !tbaa !5
  %351 = load ptr, ptr %18, align 8, !tbaa !5
  %352 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %351, i32 0, i32 3
  %353 = load i32, ptr %352, align 4, !tbaa !34
  %354 = load ptr, ptr %18, align 8, !tbaa !5
  %355 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %354, i32 0, i32 23
  %356 = load i32, ptr %355, align 4, !tbaa !33
  %357 = load i32, ptr %35, align 4, !tbaa !9
  %358 = add i32 %357, 1
  %359 = load ptr, ptr %19, align 8, !tbaa !5
  %360 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %359, i32 0, i32 3
  %361 = load i32, ptr %360, align 4, !tbaa !31
  %362 = icmp eq i32 %361, 4
  %363 = zext i1 %362 to i64
  %364 = select i1 %362, i32 4, i32 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %350, i32 noundef 1012942851, i32 noundef %353, i32 noundef %356, i32 noundef 0, i32 noundef %358, i32 noundef %364)
  %365 = load ptr, ptr %16, align 8, !tbaa !5
  %366 = load i32, ptr %35, align 4, !tbaa !9
  %367 = load i32, ptr %35, align 4, !tbaa !9
  %368 = add i32 %367, 1
  %369 = load i32, ptr %31, align 4, !tbaa !9
  %370 = load i32, ptr %28, align 4, !tbaa !9
  %371 = mul i32 %369, %370
  %372 = load i32, ptr %32, align 4, !tbaa !9
  %373 = add i32 %371, %372
  %374 = load ptr, ptr %19, align 8, !tbaa !5
  %375 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %374, i32 0, i32 3
  %376 = load i32, ptr %375, align 4, !tbaa !31
  %377 = icmp eq i32 %376, 4
  %378 = zext i1 %377 to i64
  %379 = select i1 %377, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %365, i32 noundef 260050959, i32 noundef %366, i32 noundef %368, i8 noundef zeroext 0, i32 noundef %373, i32 noundef %379)
  br label %380

380:                                              ; preds = %334, %327
  br label %381

381:                                              ; preds = %380
  %382 = load i32, ptr %31, align 4, !tbaa !9
  %383 = add i32 %382, 1
  store i32 %383, ptr %31, align 4, !tbaa !9
  br label %323, !llvm.loop !35

384:                                              ; preds = %323
  br label %385

385:                                              ; preds = %384
  %386 = load i32, ptr %32, align 4, !tbaa !9
  %387 = add i32 %386, 1
  store i32 %387, ptr %32, align 4, !tbaa !9
  br label %270, !llvm.loop !36

388:                                              ; preds = %270
  br label %390

389:                                              ; preds = %266
  br label %390

390:                                              ; preds = %389, %388
  call void @llvm.lifetime.end.p0(i64 448, ptr %40) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #5
  br label %391

391:                                              ; preds = %390
  %392 = load i32, ptr %33, align 4, !tbaa !9
  %393 = add i32 %392, 1
  store i32 %393, ptr %33, align 4, !tbaa !9
  br label %167, !llvm.loop !37

394:                                              ; preds = %167
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %395

395:                                              ; preds = %465, %394
  %396 = load i32, ptr %31, align 4, !tbaa !9
  %397 = load i32, ptr %36, align 4, !tbaa !9
  %398 = icmp ult i32 %396, %397
  br i1 %398, label %399, label %468

399:                                              ; preds = %395
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %400

400:                                              ; preds = %461, %399
  %401 = load i32, ptr %32, align 4, !tbaa !9
  %402 = load i32, ptr %28, align 4, !tbaa !9
  %403 = icmp ult i32 %401, %402
  br i1 %403, label %404, label %464

404:                                              ; preds = %400
  %405 = load i32, ptr %32, align 4, !tbaa !9
  %406 = load i32, ptr %28, align 4, !tbaa !9
  %407 = sub i32 %406, 1
  %408 = icmp eq i32 %405, %407
  br i1 %408, label %409, label %413

409:                                              ; preds = %404
  %410 = load i32, ptr %29, align 4, !tbaa !9
  %411 = icmp ne i32 %410, 0
  br i1 %411, label %412, label %413

412:                                              ; preds = %409
  br label %460

413:                                              ; preds = %409, %404
  call void @llvm.lifetime.start.p0(i64 4, ptr %43) #5
  %414 = load i32, ptr %31, align 4, !tbaa !9
  %415 = load i32, ptr %28, align 4, !tbaa !9
  %416 = mul i32 %414, %415
  %417 = load i32, ptr %32, align 4, !tbaa !9
  %418 = add i32 %416, %417
  store i32 %418, ptr %43, align 4, !tbaa !9
  %419 = load ptr, ptr %16, align 8, !tbaa !5
  %420 = load ptr, ptr %18, align 8, !tbaa !5
  %421 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %420, i32 0, i32 24
  %422 = load i32, ptr %421, align 4, !tbaa !17
  %423 = load i32, ptr %24, align 4, !tbaa !9
  %424 = zext i32 %423 to i64
  %425 = load i32, ptr %31, align 4, !tbaa !9
  %426 = zext i32 %425 to i64
  %427 = add nsw i64 %424, %426
  %428 = load i32, ptr %30, align 4, !tbaa !9
  %429 = zext i32 %428 to i64
  %430 = mul nsw i64 %427, %429
  %431 = load ptr, ptr %19, align 8, !tbaa !5
  %432 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %431, i32 0, i32 5
  %433 = load i32, ptr %432, align 4, !tbaa !18
  %434 = zext i32 %433 to i64
  %435 = mul nsw i64 %430, %434
  %436 = load i32, ptr %26, align 4, !tbaa !9
  %437 = zext i32 %436 to i64
  %438 = load i32, ptr %32, align 4, !tbaa !9
  %439 = zext i32 %438 to i64
  %440 = add nsw i64 %437, %439
  %441 = load ptr, ptr %19, align 8, !tbaa !5
  %442 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %441, i32 0, i32 2
  %443 = load i32, ptr %442, align 8, !tbaa !21
  %444 = zext i32 %443 to i64
  %445 = mul nsw i64 %440, %444
  %446 = load ptr, ptr %19, align 8, !tbaa !5
  %447 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %446, i32 0, i32 5
  %448 = load i32, ptr %447, align 4, !tbaa !18
  %449 = zext i32 %448 to i64
  %450 = mul nsw i64 %445, %449
  %451 = add nsw i64 %435, %450
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %419, i32 noundef %422, i64 noundef %451)
  %452 = load ptr, ptr %16, align 8, !tbaa !5
  %453 = load ptr, ptr %18, align 8, !tbaa !5
  %454 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %453, i32 0, i32 5
  %455 = load i32, ptr %454, align 4, !tbaa !22
  %456 = load ptr, ptr %18, align 8, !tbaa !5
  %457 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %456, i32 0, i32 24
  %458 = load i32, ptr %457, align 4, !tbaa !17
  %459 = load i32, ptr %43, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %452, i32 noundef 1008748547, i32 noundef %455, i32 noundef %458, i32 noundef 0, i32 noundef %459, i32 noundef 1)
  call void @llvm.lifetime.end.p0(i64 4, ptr %43) #5
  br label %460

460:                                              ; preds = %413, %412
  br label %461

461:                                              ; preds = %460
  %462 = load i32, ptr %32, align 4, !tbaa !9
  %463 = add i32 %462, 1
  store i32 %463, ptr %32, align 4, !tbaa !9
  br label %400, !llvm.loop !38

464:                                              ; preds = %400
  br label %465

465:                                              ; preds = %464
  %466 = load i32, ptr %31, align 4, !tbaa !9
  %467 = add i32 %466, 1
  store i32 %467, ptr %31, align 4, !tbaa !9
  br label %395, !llvm.loop !39

468:                                              ; preds = %395
  %469 = load i32, ptr %27, align 4, !tbaa !9
  %470 = load i32, ptr %28, align 4, !tbaa !9
  %471 = udiv i32 %469, %470
  %472 = icmp ugt i32 %471, 1
  br i1 %472, label %473, label %573

473:                                              ; preds = %468
  %474 = load ptr, ptr %16, align 8, !tbaa !5
  %475 = load ptr, ptr %18, align 8, !tbaa !5
  %476 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %475, i32 0, i32 1
  %477 = load i32, ptr %476, align 4, !tbaa !32
  %478 = load ptr, ptr %18, align 8, !tbaa !5
  %479 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %478, i32 0, i32 22
  %480 = load i32, ptr %479, align 4, !tbaa !30
  %481 = load ptr, ptr %18, align 8, !tbaa !5
  %482 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %481, i32 0, i32 1
  %483 = load i32, ptr %482, align 4, !tbaa !32
  %484 = load i32, ptr %28, align 4, !tbaa !9
  %485 = zext i32 %484 to i64
  %486 = load ptr, ptr %19, align 8, !tbaa !5
  %487 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %486, i32 0, i32 2
  %488 = load i32, ptr %487, align 8, !tbaa !21
  %489 = zext i32 %488 to i64
  %490 = mul nsw i64 %485, %489
  %491 = load ptr, ptr %19, align 8, !tbaa !5
  %492 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %491, i32 0, i32 3
  %493 = load i32, ptr %492, align 4, !tbaa !31
  %494 = zext i32 %493 to i64
  %495 = mul nsw i64 %490, %494
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %474, i32 noundef 4096, i32 noundef %477, i32 noundef %480, i32 noundef %483, i64 noundef %495)
  %496 = load ptr, ptr %16, align 8, !tbaa !5
  %497 = load ptr, ptr %18, align 8, !tbaa !5
  %498 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %497, i32 0, i32 5
  %499 = load i32, ptr %498, align 4, !tbaa !22
  %500 = load ptr, ptr %18, align 8, !tbaa !5
  %501 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %500, i32 0, i32 24
  %502 = load i32, ptr %501, align 4, !tbaa !17
  %503 = load ptr, ptr %18, align 8, !tbaa !5
  %504 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %503, i32 0, i32 5
  %505 = load i32, ptr %504, align 4, !tbaa !22
  %506 = load i32, ptr %28, align 4, !tbaa !9
  %507 = zext i32 %506 to i64
  %508 = load ptr, ptr %19, align 8, !tbaa !5
  %509 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %508, i32 0, i32 2
  %510 = load i32, ptr %509, align 8, !tbaa !21
  %511 = zext i32 %510 to i64
  %512 = mul nsw i64 %507, %511
  %513 = load ptr, ptr %19, align 8, !tbaa !5
  %514 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %513, i32 0, i32 5
  %515 = load i32, ptr %514, align 4, !tbaa !18
  %516 = zext i32 %515 to i64
  %517 = mul nsw i64 %512, %516
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %496, i32 noundef 4096, i32 noundef %499, i32 noundef %502, i32 noundef %505, i64 noundef %517)
  %518 = load ptr, ptr %16, align 8, !tbaa !5
  %519 = load ptr, ptr %17, align 8, !tbaa !5
  %520 = load ptr, ptr %18, align 8, !tbaa !5
  %521 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %520, i32 0, i32 25
  %522 = load i32, ptr %521, align 4, !tbaa !11
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %518, ptr noundef %519, i32 noundef %522, i32 noundef 1)
  %523 = load ptr, ptr %16, align 8, !tbaa !5
  %524 = load ptr, ptr %18, align 8, !tbaa !5
  %525 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %524, i32 0, i32 1
  %526 = load i32, ptr %525, align 4, !tbaa !32
  %527 = load ptr, ptr %18, align 8, !tbaa !5
  %528 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %527, i32 0, i32 22
  %529 = load i32, ptr %528, align 4, !tbaa !30
  %530 = load ptr, ptr %18, align 8, !tbaa !5
  %531 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %530, i32 0, i32 1
  %532 = load i32, ptr %531, align 4, !tbaa !32
  %533 = load i32, ptr %27, align 4, !tbaa !9
  %534 = zext i32 %533 to i64
  %535 = load i32, ptr %28, align 4, !tbaa !9
  %536 = zext i32 %535 to i64
  %537 = sdiv i64 %534, %536
  %538 = load ptr, ptr %19, align 8, !tbaa !5
  %539 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %538, i32 0, i32 2
  %540 = load i32, ptr %539, align 8, !tbaa !21
  %541 = zext i32 %540 to i64
  %542 = mul nsw i64 %537, %541
  %543 = load ptr, ptr %19, align 8, !tbaa !5
  %544 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %543, i32 0, i32 3
  %545 = load i32, ptr %544, align 4, !tbaa !31
  %546 = zext i32 %545 to i64
  %547 = mul nsw i64 %542, %546
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %523, i32 noundef 4097, i32 noundef %526, i32 noundef %529, i32 noundef %532, i64 noundef %547)
  %548 = load ptr, ptr %16, align 8, !tbaa !5
  %549 = load ptr, ptr %18, align 8, !tbaa !5
  %550 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %549, i32 0, i32 5
  %551 = load i32, ptr %550, align 4, !tbaa !22
  %552 = load ptr, ptr %18, align 8, !tbaa !5
  %553 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %552, i32 0, i32 24
  %554 = load i32, ptr %553, align 4, !tbaa !17
  %555 = load ptr, ptr %18, align 8, !tbaa !5
  %556 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %555, i32 0, i32 5
  %557 = load i32, ptr %556, align 4, !tbaa !22
  %558 = load i32, ptr %27, align 4, !tbaa !9
  %559 = zext i32 %558 to i64
  %560 = load i32, ptr %28, align 4, !tbaa !9
  %561 = zext i32 %560 to i64
  %562 = sdiv i64 %559, %561
  %563 = load ptr, ptr %19, align 8, !tbaa !5
  %564 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %563, i32 0, i32 2
  %565 = load i32, ptr %564, align 8, !tbaa !21
  %566 = zext i32 %565 to i64
  %567 = mul nsw i64 %562, %566
  %568 = load ptr, ptr %19, align 8, !tbaa !5
  %569 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %568, i32 0, i32 5
  %570 = load i32, ptr %569, align 4, !tbaa !18
  %571 = zext i32 %570 to i64
  %572 = mul nsw i64 %567, %571
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %548, i32 noundef 4097, i32 noundef %551, i32 noundef %554, i32 noundef %557, i64 noundef %572)
  br label %573

573:                                              ; preds = %473, %468
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #5
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 100}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!14, !10, i64 24}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!12, !10, i64 96}
!18 = !{!19, !10, i64 20}
!19 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !20, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!20 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!21 = !{!19, !10, i64 8}
!22 = !{!12, !10, i64 20}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}
!26 = !{!14, !10, i64 8}
!27 = distinct !{!27, !24}
!28 = distinct !{!28, !24}
!29 = distinct !{!29, !24}
!30 = !{!12, !10, i64 88}
!31 = !{!19, !10, i64 12}
!32 = !{!12, !10, i64 4}
!33 = !{!12, !10, i64 92}
!34 = !{!12, !10, i64 12}
!35 = distinct !{!35, !24}
!36 = distinct !{!36, !24}
!37 = distinct !{!37, !24}
!38 = distinct !{!38, !24}
!39 = distinct !{!39, !24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd = external hidden unnamed_addr constant [425 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readnone %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) local_unnamed_addr #3 {
  %16 = alloca [28 x [4 x i32]], align 16
  %17 = sub i32 %9, %8
  %18 = mul i32 %17, %12
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %19, label %20

19:                                               ; preds = %15
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 300, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_asimd) #6
  unreachable

20:                                               ; preds = %15
  %21 = udiv i32 %11, %12
  %22 = icmp ugt i32 %21, 1
  br i1 %22, label %23, label %26

23:                                               ; preds = %20
  %24 = getelementptr inbounds i8, ptr %2, i64 100
  %25 = load i32, ptr %24, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %25, i32 noundef %21) #7
  br label %26

26:                                               ; preds = %23, %20
  %.not237 = icmp eq i32 %9, %8
  br i1 %.not237, label %.preheader208, label %.preheader209.lr.ph

.preheader209.lr.ph:                              ; preds = %26
  %27 = getelementptr inbounds i8, ptr %4, i64 24
  %.not238 = icmp eq i32 %13, 0
  %28 = getelementptr inbounds i8, ptr %2, i64 96
  %29 = zext i32 %8 to i64
  %30 = zext i32 %14 to i64
  %31 = getelementptr inbounds i8, ptr %3, i64 20
  %32 = zext i32 %10 to i64
  %33 = getelementptr inbounds i8, ptr %3, i64 8
  %34 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not238, label %.preheader209.preheader, label %.preheader209.us.preheader

.preheader209.us.preheader:                       ; preds = %.preheader209.lr.ph
  %35 = add i32 %12, -1
  %36 = zext i32 %35 to i64
  %wide.trip.count252 = zext i32 %17 to i64
  %wide.trip.count = zext i32 %12 to i64
  br label %.preheader209.us

.preheader209.preheader:                          ; preds = %.preheader209.lr.ph
  %wide.trip.count263 = zext i32 %17 to i64
  %wide.trip.count258 = zext i32 %12 to i64
  br label %.preheader209

.preheader209.us:                                 ; preds = %.preheader209.us.preheader, %.split.us212
  %indvars.iv249 = phi i64 [ 0, %.preheader209.us.preheader ], [ %indvars.iv.next250, %.split.us212 ]
  %37 = trunc nuw i64 %indvars.iv249 to i32
  %38 = mul i32 %37, %12
  %39 = add nuw nsw i64 %indvars.iv249, %29
  %40 = mul nuw nsw i64 %39, %30
  br label %41

.split.us212:                                     ; preds = %63
  %indvars.iv.next250 = add nuw nsw i64 %indvars.iv249, 1
  %exitcond253.not = icmp eq i64 %indvars.iv.next250, %wide.trip.count252
  br i1 %exitcond253.not, label %.preheader208, label %.preheader209.us, !llvm.loop !10

41:                                               ; preds = %.preheader209.us, %63
  %indvars.iv = phi i64 [ 0, %.preheader209.us ], [ %indvars.iv.next, %63 ]
  %42 = load i32, ptr %27, align 1, !tbaa !12
  %43 = and i32 %42, 4
  %.not204.us214 = icmp eq i32 %43, 0
  br i1 %.not204.us214, label %47, label %44

44:                                               ; preds = %41
  %45 = trunc nuw i64 %indvars.iv to i32
  %46 = add i32 %38, %45
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 773856275, i32 noundef %46, i32 noundef %46, i8 noundef zeroext 0, i32 noundef %46, i32 noundef 1) #7
  br label %63

47:                                               ; preds = %41
  %48 = icmp eq i64 %indvars.iv, %36
  br i1 %48, label %63, label %49

49:                                               ; preds = %47
  %50 = trunc nuw i64 %indvars.iv to i32
  %51 = add i32 %38, %50
  %52 = load i32, ptr %28, align 4, !tbaa !16
  %53 = load i32, ptr %31, align 4, !tbaa !17
  %54 = zext i32 %53 to i64
  %55 = add nuw nsw i64 %indvars.iv, %32
  %56 = load i32, ptr %33, align 8, !tbaa !21
  %57 = zext i32 %56 to i64
  %58 = mul nuw nsw i64 %55, %57
  %59 = add nuw i64 %58, %40
  %60 = mul nuw i64 %59, %54
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %52, i64 noundef %60) #7
  %61 = load i32, ptr %34, align 4, !tbaa !22
  %62 = load i32, ptr %28, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %61, i32 noundef %62, i32 noundef 0, i32 noundef %51, i32 noundef 1) #7
  br label %63

63:                                               ; preds = %49, %47, %44
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.split.us212, label %41, !llvm.loop !23

.preheader209:                                    ; preds = %.preheader209.preheader, %.split.us
  %indvars.iv260 = phi i64 [ 0, %.preheader209.preheader ], [ %indvars.iv.next261, %.split.us ]
  %64 = trunc nuw i64 %indvars.iv260 to i32
  %65 = mul i32 %64, %12
  %66 = add nuw nsw i64 %indvars.iv260, %29
  %67 = mul nuw nsw i64 %66, %30
  br label %68

68:                                               ; preds = %86, %.preheader209
  %indvars.iv254 = phi i64 [ %indvars.iv.next255, %86 ], [ 0, %.preheader209 ]
  %69 = load i32, ptr %27, align 1, !tbaa !12
  %70 = and i32 %69, 4
  %.not204.us = icmp eq i32 %70, 0
  %71 = trunc nuw i64 %indvars.iv254 to i32
  %72 = add i32 %65, %71
  br i1 %.not204.us, label %74, label %73

73:                                               ; preds = %68
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 773856275, i32 noundef %72, i32 noundef %72, i8 noundef zeroext 0, i32 noundef %72, i32 noundef 1) #7
  br label %86

74:                                               ; preds = %68
  %75 = load i32, ptr %28, align 4, !tbaa !16
  %76 = load i32, ptr %31, align 4, !tbaa !17
  %77 = zext i32 %76 to i64
  %78 = add nuw nsw i64 %indvars.iv254, %32
  %79 = load i32, ptr %33, align 8, !tbaa !21
  %80 = zext i32 %79 to i64
  %81 = mul nuw nsw i64 %78, %80
  %82 = add nuw i64 %81, %67
  %83 = mul nuw i64 %82, %77
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %75, i64 noundef %83) #7
  %84 = load i32, ptr %34, align 4, !tbaa !22
  %85 = load i32, ptr %28, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %84, i32 noundef %85, i32 noundef 0, i32 noundef %72, i32 noundef 1) #7
  br label %86

86:                                               ; preds = %74, %73
  %indvars.iv.next255 = add nuw nsw i64 %indvars.iv254, 1
  %exitcond259.not = icmp eq i64 %indvars.iv.next255, %wide.trip.count258
  br i1 %exitcond259.not, label %.split.us, label %68, !llvm.loop !23

.split.us:                                        ; preds = %86
  %indvars.iv.next261 = add nuw nsw i64 %indvars.iv260, 1
  %exitcond264.not = icmp eq i64 %indvars.iv.next261, %wide.trip.count263
  br i1 %exitcond264.not, label %.preheader208, label %.preheader209, !llvm.loop !10

.preheader208:                                    ; preds = %.split.us212, %.split.us, %26
  %87 = getelementptr inbounds i8, ptr %4, i64 8
  %88 = load i32, ptr %87, align 1, !tbaa !24
  %.not239 = icmp eq i32 %88, 0
  br i1 %.not239, label %.preheader205, label %.lr.ph229

.lr.ph229:                                        ; preds = %.preheader208
  %89 = add i32 %12, -1
  %90 = icmp ne i32 %13, 0
  %91 = getelementptr inbounds i8, ptr %2, i64 88
  %92 = zext i32 %14 to i64
  %93 = getelementptr inbounds i8, ptr %3, i64 12
  %94 = zext i32 %10 to i64
  %95 = getelementptr inbounds i8, ptr %3, i64 8
  %96 = getelementptr inbounds i8, ptr %2, i64 4
  %97 = getelementptr inbounds i8, ptr %2, i64 92
  %98 = getelementptr inbounds i8, ptr %2, i64 12
  %99 = add i32 %18, 1
  %100 = xor i32 %8, -1
  %101 = add i32 %100, %9
  %102 = zext i32 %101 to i64
  %103 = shl nuw nsw i64 %102, 4
  %104 = add nuw nsw i64 %103, 16
  %105 = zext i32 %89 to i64
  %umax281 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count271 = zext i32 %17 to i64
  %wide.trip.count282 = zext i32 %umax281 to i64
  %wide.trip.count276 = zext i32 %17 to i64
  br label %136

.preheader205:                                    ; preds = %.loopexit, %.preheader208
  br i1 %.not237, label %._crit_edge233, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader205
  %.not245 = icmp eq i32 %13, 0
  %106 = getelementptr inbounds i8, ptr %2, i64 96
  %107 = zext i32 %8 to i64
  %108 = zext i32 %14 to i64
  %109 = getelementptr inbounds i8, ptr %3, i64 20
  %110 = zext i32 %10 to i64
  %111 = getelementptr inbounds i8, ptr %3, i64 8
  %112 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not245, label %.preheader.preheader, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %113 = add i32 %12, -1
  %114 = zext i32 %113 to i64
  %umax290 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count296 = zext i32 %17 to i64
  %wide.trip.count291 = zext i32 %umax290 to i64
  br label %.preheader.us

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %umax301 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count307 = zext i32 %17 to i64
  %wide.trip.count302 = zext i32 %umax301 to i64
  br label %.preheader

.preheader.us:                                    ; preds = %.preheader.us.preheader, %.split.us234
  %indvars.iv293 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next294, %.split.us234 ]
  %115 = trunc nuw i64 %indvars.iv293 to i32
  %116 = mul i32 %115, %12
  %117 = add nuw nsw i64 %indvars.iv293, %107
  %118 = mul nuw nsw i64 %117, %108
  br label %119

.split.us234:                                     ; preds = %135
  %indvars.iv.next294 = add nuw nsw i64 %indvars.iv293, 1
  %exitcond297.not = icmp eq i64 %indvars.iv.next294, %wide.trip.count296
  br i1 %exitcond297.not, label %._crit_edge233, label %.preheader.us, !llvm.loop !25

119:                                              ; preds = %.preheader.us, %135
  %indvars.iv287 = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next288, %135 ]
  %120 = icmp eq i64 %indvars.iv287, %114
  br i1 %120, label %135, label %121

121:                                              ; preds = %119
  %122 = trunc nuw i64 %indvars.iv287 to i32
  %123 = add i32 %116, %122
  %124 = load i32, ptr %106, align 4, !tbaa !16
  %125 = load i32, ptr %109, align 4, !tbaa !17
  %126 = zext i32 %125 to i64
  %127 = add nuw nsw i64 %indvars.iv287, %110
  %128 = load i32, ptr %111, align 8, !tbaa !21
  %129 = zext i32 %128 to i64
  %130 = mul nuw nsw i64 %127, %129
  %131 = add nuw i64 %130, %118
  %132 = mul nuw i64 %131, %126
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %124, i64 noundef %132) #7
  %133 = load i32, ptr %112, align 4, !tbaa !22
  %134 = load i32, ptr %106, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1008748547, i32 noundef %133, i32 noundef %134, i32 noundef 0, i32 noundef %123, i32 noundef 1) #7
  br label %135

135:                                              ; preds = %121, %119
  %indvars.iv.next288 = add nuw nsw i64 %indvars.iv287, 1
  %exitcond292.not = icmp eq i64 %indvars.iv.next288, %wide.trip.count291
  br i1 %exitcond292.not, label %.split.us234, label %119, !llvm.loop !26

136:                                              ; preds = %.lr.ph229, %.loopexit
  %137 = phi i32 [ %88, %.lr.ph229 ], [ %199, %.loopexit ]
  %indvars.iv284 = phi i64 [ 0, %.lr.ph229 ], [ %indvars.iv.next285, %.loopexit ]
  call void @llvm.lifetime.start.p0(i64 448, ptr nonnull %16) #7
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(448) %16, i8 0, i64 448, i1 false)
  br i1 %.not237, label %.loopexit, label %.lr.ph221.preheader

.lr.ph221.preheader:                              ; preds = %136
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(1) %16, i8 -1, i64 %104, i1 false), !tbaa !27
  br label %.lr.ph221

.lr.ph221:                                        ; preds = %.lr.ph221.preheader, %._crit_edge
  %indvars.iv268 = phi i64 [ 0, %.lr.ph221.preheader ], [ %indvars.iv.next269, %._crit_edge ]
  %.0194219 = phi i32 [ 0, %.lr.ph221.preheader ], [ %spec.select, %._crit_edge ]
  %138 = trunc nuw i64 %indvars.iv268 to i32
  %139 = add i32 %138, %8
  %140 = add i32 %139, 1
  %141 = zext i32 %140 to i64
  %142 = getelementptr inbounds i32, ptr %6, i64 %141
  %143 = load i32, ptr %142, align 4, !tbaa !27
  %144 = zext i32 %139 to i64
  %145 = getelementptr inbounds i32, ptr %6, i64 %144
  %146 = load i32, ptr %145, align 4, !tbaa !27
  %147 = sub i32 %143, %146
  %.not243 = icmp eq i32 %147, 0
  br i1 %.not243, label %._crit_edge, label %.lr.ph218

.lr.ph218:                                        ; preds = %.lr.ph221
  %148 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv268
  br label %149

149:                                              ; preds = %.lr.ph218, %157
  %.0192217 = phi i32 [ 0, %.lr.ph218 ], [ %158, %157 ]
  %150 = add i32 %.0192217, %146
  %151 = zext i32 %150 to i64
  %152 = getelementptr inbounds i32, ptr %5, i64 %151
  %153 = load i32, ptr %152, align 4, !tbaa !27
  %154 = zext i32 %153 to i64
  %155 = icmp eq i64 %indvars.iv284, %154
  br i1 %155, label %156, label %157

156:                                              ; preds = %149
  store i32 %150, ptr %148, align 16, !tbaa !27
  br label %157

157:                                              ; preds = %149, %156
  %.1193 = phi i32 [ %147, %156 ], [ %.0192217, %149 ]
  %158 = add i32 %.1193, 1
  %159 = icmp ult i32 %158, %147
  br i1 %159, label %149, label %._crit_edge, !llvm.loop !28

._crit_edge:                                      ; preds = %157, %.lr.ph221
  %160 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv268
  %161 = load i32, ptr %160, align 16, !tbaa !27
  %.not203 = icmp eq i32 %161, -1
  %spec.select = select i1 %.not203, i32 %.0194219, i32 1
  %indvars.iv.next269 = add nuw nsw i64 %indvars.iv268, 1
  %exitcond272.not = icmp eq i64 %indvars.iv.next269, %wide.trip.count271
  br i1 %exitcond272.not, label %._crit_edge222, label %.lr.ph221, !llvm.loop !29

._crit_edge222:                                   ; preds = %._crit_edge
  %.not201 = icmp eq i32 %spec.select, 0
  br i1 %.not201, label %.loopexit, label %.preheader206

.preheader206:                                    ; preds = %._crit_edge222
  %162 = mul nuw nsw i64 %indvars.iv284, %92
  br label %163

163:                                              ; preds = %.preheader206, %._crit_edge226
  %indvars.iv278 = phi i64 [ 0, %.preheader206 ], [ %indvars.iv.next279, %._crit_edge226 ]
  %164 = icmp eq i64 %indvars.iv278, %105
  %or.cond3 = and i1 %90, %164
  br i1 %or.cond3, label %177, label %165

165:                                              ; preds = %163
  %166 = load i32, ptr %91, align 4, !tbaa !30
  %167 = load i32, ptr %93, align 4, !tbaa !31
  %168 = zext i32 %167 to i64
  %169 = add nuw nsw i64 %indvars.iv278, %94
  %170 = load i32, ptr %95, align 8, !tbaa !21
  %171 = zext i32 %170 to i64
  %172 = mul nuw nsw i64 %169, %171
  %173 = add nuw i64 %172, %162
  %174 = mul nuw i64 %173, %168
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %166, i64 noundef %174) #7
  %175 = load i32, ptr %96, align 4, !tbaa !32
  %176 = load i32, ptr %91, align 4, !tbaa !30
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %175, i32 noundef %176, i32 noundef 0, i32 noundef %18, i32 noundef 1) #7
  br label %177

177:                                              ; preds = %163, %165
  br i1 %.not237, label %._crit_edge226, label %.lr.ph225.preheader

.lr.ph225.preheader:                              ; preds = %177
  %178 = trunc nuw i64 %indvars.iv278 to i32
  br label %.lr.ph225

.lr.ph225:                                        ; preds = %.lr.ph225.preheader, %198
  %indvars.iv273 = phi i64 [ 0, %.lr.ph225.preheader ], [ %indvars.iv.next274, %198 ]
  %179 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv273
  %180 = load i32, ptr %179, align 16, !tbaa !27
  %.not202 = icmp eq i32 %180, -1
  br i1 %.not202, label %198, label %181

181:                                              ; preds = %.lr.ph225
  %182 = load i32, ptr %97, align 4, !tbaa !33
  %183 = sext i32 %180 to i64
  %184 = load i32, ptr %93, align 4, !tbaa !31
  %185 = zext i32 %184 to i64
  %186 = mul nsw i64 %185, %183
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %182, i64 noundef %186) #7
  %187 = load i32, ptr %98, align 4, !tbaa !34
  %188 = load i32, ptr %97, align 4, !tbaa !33
  %189 = load i32, ptr %93, align 4, !tbaa !31
  %190 = icmp eq i32 %189, 4
  %191 = select i1 %190, i32 4, i32 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1012942851, i32 noundef %187, i32 noundef %188, i32 noundef 0, i32 noundef %99, i32 noundef %191) #7
  %192 = trunc nuw i64 %indvars.iv273 to i32
  %193 = mul i32 %192, %12
  %194 = add i32 %193, %178
  %195 = load i32, ptr %93, align 4, !tbaa !31
  %196 = icmp eq i32 %195, 4
  %197 = select i1 %196, i32 5, i32 7
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 260050959, i32 noundef %18, i32 noundef %99, i8 noundef zeroext 0, i32 noundef %194, i32 noundef %197) #7
  br label %198

198:                                              ; preds = %.lr.ph225, %181
  %indvars.iv.next274 = add nuw nsw i64 %indvars.iv273, 1
  %exitcond277.not = icmp eq i64 %indvars.iv.next274, %wide.trip.count276
  br i1 %exitcond277.not, label %._crit_edge226, label %.lr.ph225, !llvm.loop !35

._crit_edge226:                                   ; preds = %198, %177
  %indvars.iv.next279 = add nuw nsw i64 %indvars.iv278, 1
  %exitcond283.not = icmp eq i64 %indvars.iv.next279, %wide.trip.count282
  br i1 %exitcond283.not, label %.loopexit.loopexit, label %163, !llvm.loop !36

.loopexit.loopexit:                               ; preds = %._crit_edge226
  %.pre = load i32, ptr %87, align 1, !tbaa !24
  br label %.loopexit

.loopexit:                                        ; preds = %136, %.loopexit.loopexit, %._crit_edge222
  %199 = phi i32 [ %.pre, %.loopexit.loopexit ], [ %137, %._crit_edge222 ], [ %137, %136 ]
  call void @llvm.lifetime.end.p0(i64 448, ptr nonnull %16) #7
  %indvars.iv.next285 = add nuw nsw i64 %indvars.iv284, 1
  %200 = zext i32 %199 to i64
  %201 = icmp ult i64 %indvars.iv.next285, %200
  br i1 %201, label %136, label %.preheader205, !llvm.loop !37

.preheader:                                       ; preds = %.preheader.preheader, %.split.us231
  %indvars.iv304 = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next305, %.split.us231 ]
  %202 = trunc nuw i64 %indvars.iv304 to i32
  %203 = mul i32 %202, %12
  %204 = add nuw nsw i64 %indvars.iv304, %107
  %205 = mul nuw nsw i64 %204, %108
  br label %206

206:                                              ; preds = %206, %.preheader
  %indvars.iv298 = phi i64 [ %indvars.iv.next299, %206 ], [ 0, %.preheader ]
  %207 = trunc nuw i64 %indvars.iv298 to i32
  %208 = add i32 %203, %207
  %209 = load i32, ptr %106, align 4, !tbaa !16
  %210 = load i32, ptr %109, align 4, !tbaa !17
  %211 = zext i32 %210 to i64
  %212 = add nuw nsw i64 %indvars.iv298, %110
  %213 = load i32, ptr %111, align 8, !tbaa !21
  %214 = zext i32 %213 to i64
  %215 = mul nuw nsw i64 %212, %214
  %216 = add nuw i64 %215, %205
  %217 = mul nuw i64 %216, %211
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %209, i64 noundef %217) #7
  %218 = load i32, ptr %112, align 4, !tbaa !22
  %219 = load i32, ptr %106, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1008748547, i32 noundef %218, i32 noundef %219, i32 noundef 0, i32 noundef %208, i32 noundef 1) #7
  %indvars.iv.next299 = add nuw nsw i64 %indvars.iv298, 1
  %exitcond303.not = icmp eq i64 %indvars.iv.next299, %wide.trip.count302
  br i1 %exitcond303.not, label %.split.us231, label %206, !llvm.loop !26

.split.us231:                                     ; preds = %206
  %indvars.iv.next305 = add nuw nsw i64 %indvars.iv304, 1
  %exitcond308.not = icmp eq i64 %indvars.iv.next305, %wide.trip.count307
  br i1 %exitcond308.not, label %._crit_edge233, label %.preheader, !llvm.loop !25

._crit_edge233:                                   ; preds = %.split.us234, %.split.us231, %.preheader205
  br i1 %22, label %220, label %264

220:                                              ; preds = %._crit_edge233
  %221 = getelementptr inbounds i8, ptr %2, i64 4
  %222 = load i32, ptr %221, align 4, !tbaa !32
  %223 = getelementptr inbounds i8, ptr %2, i64 88
  %224 = load i32, ptr %223, align 4, !tbaa !30
  %225 = zext i32 %12 to i64
  %226 = getelementptr inbounds i8, ptr %3, i64 8
  %227 = load i32, ptr %226, align 8, !tbaa !21
  %228 = zext i32 %227 to i64
  %229 = mul nuw nsw i64 %228, %225
  %230 = getelementptr inbounds i8, ptr %3, i64 12
  %231 = load i32, ptr %230, align 4, !tbaa !31
  %232 = zext i32 %231 to i64
  %233 = mul nuw nsw i64 %229, %232
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %222, i32 noundef %224, i32 noundef %222, i64 noundef %233) #7
  %234 = getelementptr inbounds i8, ptr %2, i64 20
  %235 = load i32, ptr %234, align 4, !tbaa !22
  %236 = getelementptr inbounds i8, ptr %2, i64 96
  %237 = load i32, ptr %236, align 4, !tbaa !16
  %238 = load i32, ptr %226, align 8, !tbaa !21
  %239 = zext i32 %238 to i64
  %240 = mul nuw nsw i64 %239, %225
  %241 = getelementptr inbounds i8, ptr %3, i64 20
  %242 = load i32, ptr %241, align 4, !tbaa !17
  %243 = zext i32 %242 to i64
  %244 = mul nuw nsw i64 %240, %243
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %235, i32 noundef %237, i32 noundef %235, i64 noundef %244) #7
  %245 = getelementptr inbounds i8, ptr %2, i64 100
  %246 = load i32, ptr %245, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %246, i32 noundef 1) #7
  %247 = load i32, ptr %221, align 4, !tbaa !32
  %248 = load i32, ptr %223, align 4, !tbaa !30
  %249 = zext i32 %21 to i64
  %250 = load i32, ptr %226, align 8, !tbaa !21
  %251 = zext i32 %250 to i64
  %252 = mul nuw nsw i64 %251, %249
  %253 = load i32, ptr %230, align 4, !tbaa !31
  %254 = zext i32 %253 to i64
  %255 = mul nuw nsw i64 %252, %254
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %247, i32 noundef %248, i32 noundef %247, i64 noundef %255) #7
  %256 = load i32, ptr %234, align 4, !tbaa !22
  %257 = load i32, ptr %236, align 4, !tbaa !16
  %258 = load i32, ptr %226, align 8, !tbaa !21
  %259 = zext i32 %258 to i64
  %260 = mul nuw nsw i64 %259, %249
  %261 = load i32, ptr %241, align 4, !tbaa !17
  %262 = zext i32 %261 to i64
  %263 = mul nuw nsw i64 %260, %262
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %256, i32 noundef %257, i32 noundef %256, i64 noundef %263) #7
  br label %264

264:                                              ; preds = %220, %._crit_edge233
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 100}
!6 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !7, i64 24}
!13 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !14, i64 33, !14, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !15, i64 62, !15, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !15, i64 70, !15, i64 72, !15, i64 74, !15, i64 76, !15, i64 78, !15, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!14 = !{!"long long", !8, i64 0}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !7, i64 96}
!17 = !{!18, !7, i64 20}
!18 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !19, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !20, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !20, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!19 = !{!"libxsmm_tile_config", !8, i64 0, !15, i64 2, !8, i64 4, !15, i64 6, !8, i64 8, !15, i64 10, !8, i64 12, !15, i64 14, !8, i64 16, !15, i64 18, !8, i64 20, !15, i64 22, !8, i64 24, !15, i64 26, !8, i64 28, !15, i64 30, !8, i64 32}
!20 = !{!"any pointer", !8, i64 0}
!21 = !{!18, !7, i64 8}
!22 = !{!6, !7, i64 20}
!23 = distinct !{!23, !11}
!24 = !{!13, !7, i64 8}
!25 = distinct !{!25, !11}
!26 = distinct !{!26, !11}
!27 = !{!7, !7, i64 0}
!28 = distinct !{!28, !11}
!29 = distinct !{!29, !11}
!30 = !{!6, !7, i64 88}
!31 = !{!18, !7, i64 12}
!32 = !{!6, !7, i64 4}
!33 = !{!6, !7, i64 92}
!34 = !{!6, !7, i64 12}
!35 = distinct !{!35, !11}
!36 = distinct !{!36, !11}
!37 = distinct !{!37, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass