; LLVM IR from ermig1979/Simd :: src/Test/TestResize.ll (ZN4Test24ResizeYuv420pSpecialTestERKNS_7OptionsE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestERKNS_7OptionsE(ptr noundef nonnull align 8 dereferenceable(256) %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  store i8 1, ptr %3, align 1, !tbaa !9
  %4 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %5 = trunc i8 %4 to i1
  br i1 %5, label %6, label %8

6:                                                ; preds = %1
  %7 = call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 0)
  br label %8

8:                                                ; preds = %6, %1
  %9 = phi i1 [ false, %1 ], [ %7, %6 ]
  %10 = zext i1 %9 to i8
  store i8 %10, ptr %3, align 1, !tbaa !9
  %11 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %12 = trunc i8 %11 to i1
  br i1 %12, label %13, label %15

13:                                               ; preds = %8
  %14 = call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 2)
  br label %15

15:                                               ; preds = %13, %8
  %16 = phi i1 [ false, %8 ], [ %14, %13 ]
  %17 = zext i1 %16 to i8
  store i8 %17, ptr %3, align 1, !tbaa !9
  %18 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %19 = trunc i8 %18 to i1
  br i1 %19, label %20, label %22

20:                                               ; preds = %15
  %21 = call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 5)
  br label %22

22:                                               ; preds = %20, %15
  %23 = phi i1 [ false, %15 ], [ %21, %20 ]
  %24 = zext i1 %23 to i8
  store i8 %24, ptr %3, align 1, !tbaa !9
  %25 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %29

27:                                               ; preds = %22
  %28 = call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 6)
  br label %29

29:                                               ; preds = %27, %22
  %30 = phi i1 [ false, %22 ], [ %28, %27 ]
  %31 = zext i1 %30 to i8
  store i8 %31, ptr %3, align 1, !tbaa !9
  %32 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %33 = trunc i8 %32 to i1
  br i1 %33, label %34, label %36

34:                                               ; preds = %29
  %35 = call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 7)
  br label %36

36:                                               ; preds = %34, %29
  %37 = phi i1 [ false, %29 ], [ %35, %34 ]
  %38 = zext i1 %37 to i8
  store i8 %38, ptr %3, align 1, !tbaa !9
  %39 = load i8, ptr %3, align 1, !tbaa !9, !range !11, !noundef !12
  %40 = trunc i8 %39 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  ret i1 %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestERKNS_7OptionsE(ptr nocapture noundef nonnull readnone align 8 dereferenceable(256) %0) local_unnamed_addr #0 {
  %2 = tail call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 0)
  br i1 %2, label %3, label %.critedge7

3:                                                ; preds = %1
  %4 = tail call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 2)
  br i1 %4, label %.critedge, label %.critedge7

.critedge:                                        ; preds = %3
  %5 = tail call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 5)
  br i1 %5, label %.critedge6, label %.critedge7

.critedge6:                                       ; preds = %.critedge
  %6 = tail call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 6)
  br i1 %6, label %7, label %.critedge7

7:                                                ; preds = %.critedge6
  %8 = tail call noundef zeroext i1 @_ZN4Test24ResizeYuv420pSpecialTestE20SimdResizeMethodType(i32 noundef 7)
  br label %.critedge7

.critedge7:                                       ; preds = %.critedge, %1, %3, %7, %.critedge6
  %9 = phi i1 [ false, %.critedge6 ], [ %8, %7 ], [ false, %3 ], [ false, %1 ], [ false, %.critedge ]
  ret i1 %9
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass