; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_descriptor_blob = type { [96 x i8] }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>

@.str = external hidden unnamed_addr constant [27 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [85 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64 = external hidden unnamed_addr constant [675 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [299 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [304 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %28, i32 noundef %29, i32 noundef %30) #0 {
  %32 = alloca ptr, align 8
  %33 = alloca ptr, align 8
  %34 = alloca ptr, align 8
  %35 = alloca ptr, align 8
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  %44 = alloca i32, align 4
  %45 = alloca i32, align 4
  %46 = alloca i32, align 4
  %47 = alloca i32, align 4
  %48 = alloca i32, align 4
  %49 = alloca i32, align 4
  %50 = alloca i32, align 4
  %51 = alloca i32, align 4
  %52 = alloca i32, align 4
  %53 = alloca i32, align 4
  %54 = alloca i32, align 4
  %55 = alloca i32, align 4
  %56 = alloca i32, align 4
  %57 = alloca i32, align 4
  %58 = alloca i32, align 4
  %59 = alloca i32, align 4
  %60 = alloca i32, align 4
  %61 = alloca i32, align 4
  %62 = alloca i32, align 4
  %63 = alloca %struct.libxsmm_descriptor_blob, align 1
  %64 = alloca %struct.libxsmm_mateltwise_kernel_config_struct, align 4
  %65 = alloca %struct.libxsmm_mateltwise_gp_reg_mapping_struct, align 4
  %66 = alloca ptr, align 8
  %67 = alloca i32, align 4
  %68 = alloca i32, align 4
  %69 = alloca i32, align 4
  %70 = alloca i32, align 4
  %71 = alloca i32, align 4
  %72 = alloca i32, align 4
  store ptr %0, ptr %32, align 8, !tbaa !5
  store ptr %1, ptr %33, align 8, !tbaa !5
  store ptr %2, ptr %34, align 8, !tbaa !5
  store ptr %3, ptr %35, align 8, !tbaa !5
  store i32 %4, ptr %36, align 4, !tbaa !9
  store i32 %5, ptr %37, align 4, !tbaa !9
  store i32 %6, ptr %38, align 4, !tbaa !9
  store i32 %7, ptr %39, align 4, !tbaa !9
  store i32 %8, ptr %40, align 4, !tbaa !9
  store i32 %9, ptr %41, align 4, !tbaa !9
  store i32 %10, ptr %42, align 4, !tbaa !9
  store i32 %11, ptr %43, align 4, !tbaa !9
  store i32 %12, ptr %44, align 4, !tbaa !9
  store i32 %13, ptr %45, align 4, !tbaa !9
  store i32 %14, ptr %46, align 4, !tbaa !9
  store i32 %15, ptr %47, align 4, !tbaa !9
  store i32 %16, ptr %48, align 4, !tbaa !9
  store i32 %17, ptr %49, align 4, !tbaa !9
  store i32 %18, ptr %50, align 4, !tbaa !9
  store i32 %19, ptr %51, align 4, !tbaa !9
  store i32 %20, ptr %52, align 4, !tbaa !9
  store i32 %21, ptr %53, align 4, !tbaa !9
  store i32 %22, ptr %54, align 4, !tbaa !9
  store i32 %23, ptr %55, align 4, !tbaa !9
  store i32 %24, ptr %56, align 4, !tbaa !9
  store i32 %25, ptr %57, align 4, !tbaa !9
  store i32 %26, ptr %58, align 4, !tbaa !9
  store i32 %27, ptr %59, align 4, !tbaa !9
  store i32 %28, ptr %60, align 4, !tbaa !9
  store i32 %29, ptr %61, align 4, !tbaa !9
  store i32 %30, ptr %62, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 96, ptr %63) #4
  call void @llvm.lifetime.start.p0(i64 516, ptr %64) #4
  call void @llvm.lifetime.start.p0(i64 148, ptr %65) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %66) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %67) #4
  %73 = load ptr, ptr %35, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %73, i32 0, i32 6
  %75 = load i32, ptr %74, align 1, !tbaa !11
  %76 = and i32 %75, 262144
  %77 = icmp ugt i32 %76, 0
  %78 = zext i1 %77 to i64
  %79 = select i1 %77, i32 1, i32 0
  store i32 %79, ptr %67, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %68) #4
  %80 = load ptr, ptr %35, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %80, i32 0, i32 6
  %82 = load i32, ptr %81, align 1, !tbaa !11
  %83 = and i32 %82, 131072
  %84 = icmp ugt i32 %83, 0
  %85 = zext i1 %84 to i64
  %86 = select i1 %84, i32 1, i32 0
  store i32 %86, ptr %68, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %69) #4
  %87 = load ptr, ptr %35, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %87, i32 0, i32 6
  %89 = load i32, ptr %88, align 1, !tbaa !11
  %90 = and i32 %89, 65536
  %91 = icmp ugt i32 %90, 0
  %92 = zext i1 %91 to i64
  %93 = select i1 %91, i32 1, i32 0
  store i32 %93, ptr %69, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %70) #4
  %94 = load i32, ptr %67, align 4, !tbaa !9
  %95 = icmp eq i32 %94, 1
  br i1 %95, label %102, label %96

96:                                               ; preds = %31
  %97 = load i32, ptr %68, align 4, !tbaa !9
  %98 = icmp eq i32 %97, 1
  br i1 %98, label %102, label %99

99:                                               ; preds = %96
  %100 = load i32, ptr %69, align 4, !tbaa !9
  %101 = icmp eq i32 %100, 1
  br label %102

102:                                              ; preds = %99, %96, %31
  %103 = phi i1 [ true, %96 ], [ true, %31 ], [ %101, %99 ]
  %104 = zext i1 %103 to i64
  %105 = select i1 %103, i32 1, i32 0
  store i32 %105, ptr %70, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %71) #4
  store i32 32, ptr %71, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %72) #4
  store i32 80, ptr %72, align 4, !tbaa !9
  %106 = load ptr, ptr %34, align 8, !tbaa !5
  %107 = load i32, ptr %37, align 4, !tbaa !9
  %108 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %65, i32 0, i32 0
  store i32 %107, ptr %108, align 4, !tbaa !15
  %109 = load ptr, ptr %32, align 8, !tbaa !5
  %110 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %109, i32 noundef 26, i32 noundef %110)
  %111 = load i32, ptr %70, align 4, !tbaa !9
  %112 = icmp sgt i32 %111, 0
  br i1 %112, label %113, label %122

113:                                              ; preds = %102
  %114 = load ptr, ptr %32, align 8, !tbaa !5
  %115 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %114, i32 noundef 20, i32 noundef %115)
  %116 = load ptr, ptr %32, align 8, !tbaa !5
  %117 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %116, i32 noundef %117, i64 noundef 0)
  %118 = load ptr, ptr %32, align 8, !tbaa !5
  %119 = load i32, ptr %42, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %118, i32 noundef %119, i64 noundef 0)
  %120 = load ptr, ptr %32, align 8, !tbaa !5
  %121 = load ptr, ptr %33, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_register_jump_back_label(ptr noundef %120, ptr noundef %121)
  br label %122

122:                                              ; preds = %113, %102
  %123 = load i32, ptr %68, align 4, !tbaa !9
  %124 = icmp sgt i32 %123, 0
  br i1 %124, label %125, label %140

125:                                              ; preds = %122
  %126 = load ptr, ptr %32, align 8, !tbaa !5
  %127 = load i32, ptr %36, align 4, !tbaa !9
  %128 = load i32, ptr %41, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %126, i32 noundef 285212678, i32 noundef %127, i32 noundef %128, i32 noundef 0, i8 noundef zeroext 0)
  %129 = load ptr, ptr %32, align 8, !tbaa !5
  %130 = load i32, ptr %52, align 4, !tbaa !9
  %131 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %129, i32 noundef %130, i32 noundef %131)
  %132 = load ptr, ptr %32, align 8, !tbaa !5
  %133 = load i32, ptr %38, align 4, !tbaa !9
  %134 = load i32, ptr %39, align 4, !tbaa !9
  %135 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %132, i32 noundef -1201649661, i32 noundef %133, i32 noundef %134, i32 noundef 0, i32 noundef %135)
  %136 = load ptr, ptr %32, align 8, !tbaa !5
  %137 = load i32, ptr %38, align 4, !tbaa !9
  %138 = load i32, ptr %36, align 4, !tbaa !9
  %139 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %136, i32 noundef 184549383, i32 noundef %137, i32 noundef %138, i32 noundef %139, i32 noundef 0, i32 noundef 0)
  br label %140

140:                                              ; preds = %125, %122
  %141 = load i32, ptr %69, align 4, !tbaa !9
  %142 = icmp sgt i32 %141, 0
  br i1 %142, label %143, label %151

143:                                              ; preds = %140
  %144 = load ptr, ptr %32, align 8, !tbaa !5
  %145 = load i32, ptr %36, align 4, !tbaa !9
  %146 = load i32, ptr %41, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %144, i32 noundef 285212678, i32 noundef %145, i32 noundef %146, i32 noundef 0, i8 noundef zeroext 0)
  %147 = load ptr, ptr %32, align 8, !tbaa !5
  %148 = load i32, ptr %36, align 4, !tbaa !9
  %149 = load i32, ptr %39, align 4, !tbaa !9
  %150 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %147, i32 noundef -1201649661, i32 noundef %148, i32 noundef %149, i32 noundef 0, i32 noundef %150)
  br label %151

151:                                              ; preds = %143, %140
  %152 = load ptr, ptr %32, align 8, !tbaa !5
  %153 = load i32, ptr %37, align 4, !tbaa !9
  %154 = load i32, ptr %71, align 4, !tbaa !9
  %155 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %152, i32 noundef -1191182330, i32 noundef %153, i32 noundef 127, i32 noundef %154, i32 noundef %155)
  %156 = load i32, ptr %68, align 4, !tbaa !9
  %157 = icmp sgt i32 %156, 0
  br i1 %157, label %161, label %158

158:                                              ; preds = %151
  %159 = load i32, ptr %69, align 4, !tbaa !9
  %160 = icmp sgt i32 %159, 0
  br i1 %160, label %161, label %165

161:                                              ; preds = %158, %151
  %162 = load ptr, ptr %32, align 8, !tbaa !5
  %163 = load i32, ptr %41, align 4, !tbaa !9
  %164 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %162, i32 noundef 285212678, i32 noundef %163, i32 noundef %164, i32 noundef 0, i8 noundef zeroext 0)
  br label %165

165:                                              ; preds = %161, %158
  %166 = load i32, ptr %55, align 4, !tbaa !9
  %167 = icmp ne i32 %166, 0
  br i1 %167, label %168, label %176

168:                                              ; preds = %165
  %169 = load ptr, ptr %32, align 8, !tbaa !5
  %170 = load i32, ptr %53, align 4, !tbaa !9
  %171 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %169, i32 noundef %170, i32 noundef %171)
  %172 = load ptr, ptr %32, align 8, !tbaa !5
  %173 = load i32, ptr %37, align 4, !tbaa !9
  %174 = load i32, ptr %72, align 4, !tbaa !9
  %175 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %172, i32 noundef -1191182330, i32 noundef %173, i32 noundef 127, i32 noundef %174, i32 noundef %175)
  br label %288

176:                                              ; preds = %165
  %177 = load ptr, ptr %32, align 8, !tbaa !5
  %178 = load i32, ptr %54, align 4, !tbaa !9
  %179 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %177, i32 noundef %178, i32 noundef %179)
  %180 = load i32, ptr %70, align 4, !tbaa !9
  %181 = icmp sgt i32 %180, 0
  br i1 %181, label %182, label %283

182:                                              ; preds = %176
  %183 = load ptr, ptr %32, align 8, !tbaa !5
  %184 = load i32, ptr %42, align 4, !tbaa !9
  %185 = load i32, ptr %38, align 4, !tbaa !9
  %186 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %183, i32 noundef 184549383, i32 noundef %184, i32 noundef %185, i32 noundef %186, i32 noundef 0, i32 noundef 0)
  %187 = load ptr, ptr %32, align 8, !tbaa !5
  %188 = load i32, ptr %42, align 4, !tbaa !9
  %189 = load i32, ptr %41, align 4, !tbaa !9
  %190 = load i32, ptr %42, align 4, !tbaa !9
  %191 = load i32, ptr %51, align 4, !tbaa !9
  %192 = icmp eq i32 0, %191
  br i1 %192, label %193, label %194

193:                                              ; preds = %182
  br label %274

194:                                              ; preds = %182
  %195 = load i32, ptr %51, align 4, !tbaa !9
  %196 = icmp eq i32 1, %195
  br i1 %196, label %197, label %198

197:                                              ; preds = %194
  br label %272

198:                                              ; preds = %194
  %199 = load i32, ptr %51, align 4, !tbaa !9
  %200 = icmp eq i32 2, %199
  br i1 %200, label %201, label %202

201:                                              ; preds = %198
  br label %270

202:                                              ; preds = %198
  %203 = load i32, ptr %51, align 4, !tbaa !9
  %204 = icmp eq i32 3, %203
  br i1 %204, label %205, label %206

205:                                              ; preds = %202
  br label %268

206:                                              ; preds = %202
  %207 = load i32, ptr %51, align 4, !tbaa !9
  %208 = icmp eq i32 4, %207
  br i1 %208, label %209, label %210

209:                                              ; preds = %206
  br label %266

210:                                              ; preds = %206
  %211 = load i32, ptr %51, align 4, !tbaa !9
  %212 = icmp eq i32 5, %211
  br i1 %212, label %213, label %214

213:                                              ; preds = %210
  br label %264

214:                                              ; preds = %210
  %215 = load i32, ptr %51, align 4, !tbaa !9
  %216 = icmp eq i32 6, %215
  br i1 %216, label %217, label %218

217:                                              ; preds = %214
  br label %262

218:                                              ; preds = %214
  %219 = load i32, ptr %51, align 4, !tbaa !9
  %220 = icmp eq i32 7, %219
  br i1 %220, label %221, label %222

221:                                              ; preds = %218
  br label %260

222:                                              ; preds = %218
  %223 = load i32, ptr %51, align 4, !tbaa !9
  %224 = icmp eq i32 8, %223
  br i1 %224, label %225, label %226

225:                                              ; preds = %222
  br label %258

226:                                              ; preds = %222
  %227 = load i32, ptr %51, align 4, !tbaa !9
  %228 = icmp eq i32 9, %227
  br i1 %228, label %229, label %230

229:                                              ; preds = %226
  br label %256

230:                                              ; preds = %226
  %231 = load i32, ptr %51, align 4, !tbaa !9
  %232 = icmp eq i32 10, %231
  br i1 %232, label %233, label %234

233:                                              ; preds = %230
  br label %254

234:                                              ; preds = %230
  %235 = load i32, ptr %51, align 4, !tbaa !9
  %236 = icmp eq i32 11, %235
  br i1 %236, label %237, label %238

237:                                              ; preds = %234
  br label %252

238:                                              ; preds = %234
  %239 = load i32, ptr %51, align 4, !tbaa !9
  %240 = icmp eq i32 12, %239
  br i1 %240, label %241, label %242

241:                                              ; preds = %238
  br label %250

242:                                              ; preds = %238
  %243 = load i32, ptr %51, align 4, !tbaa !9
  %244 = icmp eq i32 13, %243
  br i1 %244, label %245, label %246

245:                                              ; preds = %242
  br label %248

246:                                              ; preds = %242
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 103, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

247:                                              ; No predecessors!
  br label %248

248:                                              ; preds = %247, %245
  %249 = phi i32 [ 1, %245 ], [ 0, %247 ]
  br label %250

250:                                              ; preds = %248, %241
  %251 = phi i32 [ 1, %241 ], [ %249, %248 ]
  br label %252

252:                                              ; preds = %250, %237
  %253 = phi i32 [ 2, %237 ], [ %251, %250 ]
  br label %254

254:                                              ; preds = %252, %233
  %255 = phi i32 [ 2, %233 ], [ %253, %252 ]
  br label %256

256:                                              ; preds = %254, %229
  %257 = phi i32 [ 4, %229 ], [ %255, %254 ]
  br label %258

258:                                              ; preds = %256, %225
  %259 = phi i32 [ 4, %225 ], [ %257, %256 ]
  br label %260

260:                                              ; preds = %258, %221
  %261 = phi i32 [ 8, %221 ], [ %259, %258 ]
  br label %262

262:                                              ; preds = %260, %217
  %263 = phi i32 [ 8, %217 ], [ %261, %260 ]
  br label %264

264:                                              ; preds = %262, %213
  %265 = phi i32 [ 1, %213 ], [ %263, %262 ]
  br label %266

266:                                              ; preds = %264, %209
  %267 = phi i32 [ 1, %209 ], [ %265, %264 ]
  br label %268

268:                                              ; preds = %266, %205
  %269 = phi i32 [ 2, %205 ], [ %267, %266 ]
  br label %270

270:                                              ; preds = %268, %201
  %271 = phi i32 [ 2, %201 ], [ %269, %268 ]
  br label %272

272:                                              ; preds = %270, %197
  %273 = phi i32 [ 4, %197 ], [ %271, %270 ]
  br label %274

274:                                              ; preds = %272, %193
  %275 = phi i32 [ 8, %193 ], [ %273, %272 ]
  %276 = sext i32 %275 to i64
  %277 = load i32, ptr %44, align 4, !tbaa !9
  %278 = sext i32 %277 to i64
  %279 = mul nsw i64 %276, %278
  %280 = load i32, ptr %45, align 4, !tbaa !9
  %281 = sext i32 %280 to i64
  %282 = mul nsw i64 %279, %281
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %187, i32 noundef 4096, i32 noundef %188, i32 noundef %189, i32 noundef %190, i64 noundef %282)
  br label %283

283:                                              ; preds = %274, %176
  %284 = load ptr, ptr %32, align 8, !tbaa !5
  %285 = load i32, ptr %37, align 4, !tbaa !9
  %286 = load i32, ptr %72, align 4, !tbaa !9
  %287 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %284, i32 noundef -1191182330, i32 noundef %285, i32 noundef 127, i32 noundef %286, i32 noundef %287)
  br label %288

288:                                              ; preds = %283, %168
  %289 = load i32, ptr %49, align 4, !tbaa !9
  %290 = load i32, ptr %50, align 4, !tbaa !9
  %291 = load i32, ptr %51, align 4, !tbaa !9
  %292 = load i32, ptr %44, align 4, !tbaa !9
  %293 = load i32, ptr %45, align 4, !tbaa !9
  %294 = load i32, ptr %46, align 4, !tbaa !9
  %295 = load i32, ptr %47, align 4, !tbaa !9
  %296 = load i32, ptr %43, align 4, !tbaa !9
  %297 = trunc i32 %296 to i16
  %298 = zext i16 %297 to i32
  %299 = icmp eq i32 0, %298
  br i1 %299, label %305, label %300

300:                                              ; preds = %288
  %301 = load i32, ptr %43, align 4, !tbaa !9
  %302 = trunc i32 %301 to i16
  %303 = zext i16 %302 to i32
  %304 = icmp slt i32 0, %303
  br i1 %304, label %305, label %323

305:                                              ; preds = %300, %288
  %306 = load i32, ptr %43, align 4, !tbaa !9
  %307 = zext i32 %306 to i64
  %308 = mul i64 1, %307
  %309 = icmp ult i64 %308, 65535
  br i1 %309, label %310, label %314

310:                                              ; preds = %305
  %311 = load i32, ptr %43, align 4, !tbaa !9
  %312 = zext i32 %311 to i64
  %313 = mul i64 1, %312
  br label %315

314:                                              ; preds = %305
  br label %315

315:                                              ; preds = %314, %310
  %316 = phi i64 [ %313, %310 ], [ 65535, %314 ]
  %317 = icmp ule i64 %316, 65535
  br i1 %317, label %318, label %323

318:                                              ; preds = %315
  %319 = load i32, ptr %43, align 4, !tbaa !9
  %320 = uitofp i32 %319 to double
  %321 = fcmp ole double 0.000000e+00, %320
  br i1 %321, label %322, label %323

322:                                              ; preds = %318
  br label %324

323:                                              ; preds = %318, %315, %300
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 110, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

324:                                              ; preds = %322
  %325 = load i32, ptr %43, align 4, !tbaa !9
  %326 = trunc i32 %325 to i16
  %327 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef %63, i32 noundef %289, i32 noundef 15, i32 noundef 15, i32 noundef %290, i32 noundef %291, i32 noundef %292, i32 noundef %293, i32 noundef %294, i32 noundef %295, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %326, i8 noundef zeroext 1)
  store ptr %327, ptr %66, align 8, !tbaa !5
  %328 = load ptr, ptr %32, align 8, !tbaa !5
  %329 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef %328, ptr noundef %64, ptr noundef %329)
  %330 = load i32, ptr %43, align 4, !tbaa !9
  %331 = trunc i32 %330 to i16
  %332 = zext i16 %331 to i32
  %333 = icmp eq i32 0, %332
  br i1 %333, label %339, label %334

334:                                              ; preds = %324
  %335 = load i32, ptr %43, align 4, !tbaa !9
  %336 = trunc i32 %335 to i16
  %337 = zext i16 %336 to i32
  %338 = icmp slt i32 0, %337
  br i1 %338, label %339, label %357

339:                                              ; preds = %334, %324
  %340 = load i32, ptr %43, align 4, !tbaa !9
  %341 = zext i32 %340 to i64
  %342 = mul i64 1, %341
  %343 = icmp ult i64 %342, 65535
  br i1 %343, label %344, label %348

344:                                              ; preds = %339
  %345 = load i32, ptr %43, align 4, !tbaa !9
  %346 = zext i32 %345 to i64
  %347 = mul i64 1, %346
  br label %349

348:                                              ; preds = %339
  br label %349

349:                                              ; preds = %348, %344
  %350 = phi i64 [ %347, %344 ], [ 65535, %348 ]
  %351 = icmp ule i64 %350, 65535
  br i1 %351, label %352, label %357

352:                                              ; preds = %349
  %353 = load i32, ptr %43, align 4, !tbaa !9
  %354 = uitofp i32 %353 to double
  %355 = fcmp ole double 0.000000e+00, %354
  br i1 %355, label %356, label %357

356:                                              ; preds = %352
  br label %358

357:                                              ; preds = %352, %349, %334
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 113, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

358:                                              ; preds = %356
  %359 = load i32, ptr %43, align 4, !tbaa !9
  %360 = trunc i32 %359 to i16
  %361 = zext i16 %360 to i32
  %362 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %361)
  %363 = icmp sgt i32 %362, 0
  br i1 %363, label %364, label %368

364:                                              ; preds = %358
  %365 = load ptr, ptr %32, align 8, !tbaa !5
  %366 = load ptr, ptr %33, align 8, !tbaa !5
  %367 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef %365, ptr noundef %366, ptr noundef %65, ptr noundef %64, ptr noundef %367)
  br label %372

368:                                              ; preds = %358
  %369 = load ptr, ptr %32, align 8, !tbaa !5
  %370 = load ptr, ptr %33, align 8, !tbaa !5
  %371 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef %369, ptr noundef %370, ptr noundef %65, ptr noundef %64, ptr noundef %371)
  br label %372

372:                                              ; preds = %368, %364
  %373 = load i32, ptr %55, align 4, !tbaa !9
  %374 = icmp ne i32 %373, 0
  br i1 %374, label %375, label %578

375:                                              ; preds = %372
  %376 = load ptr, ptr %32, align 8, !tbaa !5
  %377 = load i32, ptr %53, align 4, !tbaa !9
  %378 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %376, i32 noundef %377, i32 noundef %378)
  %379 = load ptr, ptr %32, align 8, !tbaa !5
  %380 = load i32, ptr %37, align 4, !tbaa !9
  %381 = load i32, ptr %71, align 4, !tbaa !9
  %382 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %379, i32 noundef -1191182330, i32 noundef %380, i32 noundef 127, i32 noundef %381, i32 noundef %382)
  %383 = load ptr, ptr %32, align 8, !tbaa !5
  %384 = load i32, ptr %54, align 4, !tbaa !9
  %385 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %383, i32 noundef %384, i32 noundef %385)
  %386 = load i32, ptr %70, align 4, !tbaa !9
  %387 = icmp sgt i32 %386, 0
  br i1 %387, label %388, label %489

388:                                              ; preds = %375
  %389 = load ptr, ptr %32, align 8, !tbaa !5
  %390 = load i32, ptr %42, align 4, !tbaa !9
  %391 = load i32, ptr %38, align 4, !tbaa !9
  %392 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %389, i32 noundef 184549383, i32 noundef %390, i32 noundef %391, i32 noundef %392, i32 noundef 0, i32 noundef 0)
  %393 = load ptr, ptr %32, align 8, !tbaa !5
  %394 = load i32, ptr %42, align 4, !tbaa !9
  %395 = load i32, ptr %41, align 4, !tbaa !9
  %396 = load i32, ptr %42, align 4, !tbaa !9
  %397 = load i32, ptr %62, align 4, !tbaa !9
  %398 = icmp eq i32 0, %397
  br i1 %398, label %399, label %400

399:                                              ; preds = %388
  br label %480

400:                                              ; preds = %388
  %401 = load i32, ptr %62, align 4, !tbaa !9
  %402 = icmp eq i32 1, %401
  br i1 %402, label %403, label %404

403:                                              ; preds = %400
  br label %478

404:                                              ; preds = %400
  %405 = load i32, ptr %62, align 4, !tbaa !9
  %406 = icmp eq i32 2, %405
  br i1 %406, label %407, label %408

407:                                              ; preds = %404
  br label %476

408:                                              ; preds = %404
  %409 = load i32, ptr %62, align 4, !tbaa !9
  %410 = icmp eq i32 3, %409
  br i1 %410, label %411, label %412

411:                                              ; preds = %408
  br label %474

412:                                              ; preds = %408
  %413 = load i32, ptr %62, align 4, !tbaa !9
  %414 = icmp eq i32 4, %413
  br i1 %414, label %415, label %416

415:                                              ; preds = %412
  br label %472

416:                                              ; preds = %412
  %417 = load i32, ptr %62, align 4, !tbaa !9
  %418 = icmp eq i32 5, %417
  br i1 %418, label %419, label %420

419:                                              ; preds = %416
  br label %470

420:                                              ; preds = %416
  %421 = load i32, ptr %62, align 4, !tbaa !9
  %422 = icmp eq i32 6, %421
  br i1 %422, label %423, label %424

423:                                              ; preds = %420
  br label %468

424:                                              ; preds = %420
  %425 = load i32, ptr %62, align 4, !tbaa !9
  %426 = icmp eq i32 7, %425
  br i1 %426, label %427, label %428

427:                                              ; preds = %424
  br label %466

428:                                              ; preds = %424
  %429 = load i32, ptr %62, align 4, !tbaa !9
  %430 = icmp eq i32 8, %429
  br i1 %430, label %431, label %432

431:                                              ; preds = %428
  br label %464

432:                                              ; preds = %428
  %433 = load i32, ptr %62, align 4, !tbaa !9
  %434 = icmp eq i32 9, %433
  br i1 %434, label %435, label %436

435:                                              ; preds = %432
  br label %462

436:                                              ; preds = %432
  %437 = load i32, ptr %62, align 4, !tbaa !9
  %438 = icmp eq i32 10, %437
  br i1 %438, label %439, label %440

439:                                              ; preds = %436
  br label %460

440:                                              ; preds = %436
  %441 = load i32, ptr %62, align 4, !tbaa !9
  %442 = icmp eq i32 11, %441
  br i1 %442, label %443, label %444

443:                                              ; preds = %440
  br label %458

444:                                              ; preds = %440
  %445 = load i32, ptr %62, align 4, !tbaa !9
  %446 = icmp eq i32 12, %445
  br i1 %446, label %447, label %448

447:                                              ; preds = %444
  br label %456

448:                                              ; preds = %444
  %449 = load i32, ptr %62, align 4, !tbaa !9
  %450 = icmp eq i32 13, %449
  br i1 %450, label %451, label %452

451:                                              ; preds = %448
  br label %454

452:                                              ; preds = %448
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 126, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

453:                                              ; No predecessors!
  br label %454

454:                                              ; preds = %453, %451
  %455 = phi i32 [ 1, %451 ], [ 0, %453 ]
  br label %456

456:                                              ; preds = %454, %447
  %457 = phi i32 [ 1, %447 ], [ %455, %454 ]
  br label %458

458:                                              ; preds = %456, %443
  %459 = phi i32 [ 2, %443 ], [ %457, %456 ]
  br label %460

460:                                              ; preds = %458, %439
  %461 = phi i32 [ 2, %439 ], [ %459, %458 ]
  br label %462

462:                                              ; preds = %460, %435
  %463 = phi i32 [ 4, %435 ], [ %461, %460 ]
  br label %464

464:                                              ; preds = %462, %431
  %465 = phi i32 [ 4, %431 ], [ %463, %462 ]
  br label %466

466:                                              ; preds = %464, %427
  %467 = phi i32 [ 8, %427 ], [ %465, %464 ]
  br label %468

468:                                              ; preds = %466, %423
  %469 = phi i32 [ 8, %423 ], [ %467, %466 ]
  br label %470

470:                                              ; preds = %468, %419
  %471 = phi i32 [ 1, %419 ], [ %469, %468 ]
  br label %472

472:                                              ; preds = %470, %415
  %473 = phi i32 [ 1, %415 ], [ %471, %470 ]
  br label %474

474:                                              ; preds = %472, %411
  %475 = phi i32 [ 2, %411 ], [ %473, %472 ]
  br label %476

476:                                              ; preds = %474, %407
  %477 = phi i32 [ 2, %407 ], [ %475, %474 ]
  br label %478

478:                                              ; preds = %476, %403
  %479 = phi i32 [ 4, %403 ], [ %477, %476 ]
  br label %480

480:                                              ; preds = %478, %399
  %481 = phi i32 [ 8, %399 ], [ %479, %478 ]
  %482 = sext i32 %481 to i64
  %483 = load i32, ptr %56, align 4, !tbaa !9
  %484 = sext i32 %483 to i64
  %485 = mul nsw i64 %482, %484
  %486 = load i32, ptr %57, align 4, !tbaa !9
  %487 = sext i32 %486 to i64
  %488 = mul nsw i64 %485, %487
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %393, i32 noundef 4096, i32 noundef %394, i32 noundef %395, i32 noundef %396, i64 noundef %488)
  br label %489

489:                                              ; preds = %480, %375
  %490 = load ptr, ptr %32, align 8, !tbaa !5
  %491 = load i32, ptr %37, align 4, !tbaa !9
  %492 = load i32, ptr %72, align 4, !tbaa !9
  %493 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %490, i32 noundef -1191182330, i32 noundef %491, i32 noundef 127, i32 noundef %492, i32 noundef %493)
  %494 = load i32, ptr %60, align 4, !tbaa !9
  %495 = load i32, ptr %61, align 4, !tbaa !9
  %496 = load i32, ptr %62, align 4, !tbaa !9
  %497 = load i32, ptr %56, align 4, !tbaa !9
  %498 = load i32, ptr %57, align 4, !tbaa !9
  %499 = load i32, ptr %58, align 4, !tbaa !9
  %500 = load i32, ptr %59, align 4, !tbaa !9
  %501 = load i32, ptr %55, align 4, !tbaa !9
  %502 = trunc i32 %501 to i16
  %503 = zext i16 %502 to i32
  %504 = icmp eq i32 0, %503
  br i1 %504, label %510, label %505

505:                                              ; preds = %489
  %506 = load i32, ptr %55, align 4, !tbaa !9
  %507 = trunc i32 %506 to i16
  %508 = zext i16 %507 to i32
  %509 = icmp slt i32 0, %508
  br i1 %509, label %510, label %528

510:                                              ; preds = %505, %489
  %511 = load i32, ptr %55, align 4, !tbaa !9
  %512 = zext i32 %511 to i64
  %513 = mul i64 1, %512
  %514 = icmp ult i64 %513, 65535
  br i1 %514, label %515, label %519

515:                                              ; preds = %510
  %516 = load i32, ptr %55, align 4, !tbaa !9
  %517 = zext i32 %516 to i64
  %518 = mul i64 1, %517
  br label %520

519:                                              ; preds = %510
  br label %520

520:                                              ; preds = %519, %515
  %521 = phi i64 [ %518, %515 ], [ 65535, %519 ]
  %522 = icmp ule i64 %521, 65535
  br i1 %522, label %523, label %528

523:                                              ; preds = %520
  %524 = load i32, ptr %55, align 4, !tbaa !9
  %525 = uitofp i32 %524 to double
  %526 = fcmp ole double 0.000000e+00, %525
  br i1 %526, label %527, label %528

527:                                              ; preds = %523
  br label %529

528:                                              ; preds = %523, %520, %505
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 132, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

529:                                              ; preds = %527
  %530 = load i32, ptr %55, align 4, !tbaa !9
  %531 = trunc i32 %530 to i16
  %532 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef %63, i32 noundef %494, i32 noundef 15, i32 noundef 15, i32 noundef %495, i32 noundef %496, i32 noundef %497, i32 noundef %498, i32 noundef %499, i32 noundef %500, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %531, i8 noundef zeroext 1)
  store ptr %532, ptr %66, align 8, !tbaa !5
  %533 = load ptr, ptr %32, align 8, !tbaa !5
  %534 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef %533, ptr noundef %64, ptr noundef %534)
  %535 = load i32, ptr %55, align 4, !tbaa !9
  %536 = trunc i32 %535 to i16
  %537 = zext i16 %536 to i32
  %538 = icmp eq i32 0, %537
  br i1 %538, label %544, label %539

539:                                              ; preds = %529
  %540 = load i32, ptr %55, align 4, !tbaa !9
  %541 = trunc i32 %540 to i16
  %542 = zext i16 %541 to i32
  %543 = icmp slt i32 0, %542
  br i1 %543, label %544, label %562

544:                                              ; preds = %539, %529
  %545 = load i32, ptr %55, align 4, !tbaa !9
  %546 = zext i32 %545 to i64
  %547 = mul i64 1, %546
  %548 = icmp ult i64 %547, 65535
  br i1 %548, label %549, label %553

549:                                              ; preds = %544
  %550 = load i32, ptr %55, align 4, !tbaa !9
  %551 = zext i32 %550 to i64
  %552 = mul i64 1, %551
  br label %554

553:                                              ; preds = %544
  br label %554

554:                                              ; preds = %553, %549
  %555 = phi i64 [ %552, %549 ], [ 65535, %553 ]
  %556 = icmp ule i64 %555, 65535
  br i1 %556, label %557, label %562

557:                                              ; preds = %554
  %558 = load i32, ptr %55, align 4, !tbaa !9
  %559 = uitofp i32 %558 to double
  %560 = fcmp ole double 0.000000e+00, %559
  br i1 %560, label %561, label %562

561:                                              ; preds = %557
  br label %563

562:                                              ; preds = %557, %554, %539
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 135, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

563:                                              ; preds = %561
  %564 = load i32, ptr %55, align 4, !tbaa !9
  %565 = trunc i32 %564 to i16
  %566 = zext i16 %565 to i32
  %567 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %566)
  %568 = icmp sgt i32 %567, 0
  br i1 %568, label %569, label %573

569:                                              ; preds = %563
  %570 = load ptr, ptr %32, align 8, !tbaa !5
  %571 = load ptr, ptr %33, align 8, !tbaa !5
  %572 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef %570, ptr noundef %571, ptr noundef %65, ptr noundef %64, ptr noundef %572)
  br label %577

573:                                              ; preds = %563
  %574 = load ptr, ptr %32, align 8, !tbaa !5
  %575 = load ptr, ptr %33, align 8, !tbaa !5
  %576 = load ptr, ptr %66, align 8, !tbaa !5
  call void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef %574, ptr noundef %575, ptr noundef %65, ptr noundef %64, ptr noundef %576)
  br label %577

577:                                              ; preds = %573, %569
  br label %578

578:                                              ; preds = %577, %372
  %579 = load i32, ptr %70, align 4, !tbaa !9
  %580 = icmp sgt i32 %579, 0
  br i1 %580, label %581, label %598

581:                                              ; preds = %578
  %582 = load i32, ptr %67, align 4, !tbaa !9
  %583 = icmp sgt i32 %582, 0
  br i1 %583, label %584, label %591

584:                                              ; preds = %581
  %585 = load ptr, ptr %32, align 8, !tbaa !5
  %586 = load i32, ptr %36, align 4, !tbaa !9
  %587 = load i32, ptr %41, align 4, !tbaa !9
  %588 = load i32, ptr %36, align 4, !tbaa !9
  %589 = load i32, ptr %48, align 4, !tbaa !9
  %590 = sext i32 %589 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %585, i32 noundef 4096, i32 noundef %586, i32 noundef %587, i32 noundef %588, i64 noundef %590)
  br label %591

591:                                              ; preds = %584, %581
  %592 = load ptr, ptr %32, align 8, !tbaa !5
  %593 = load i32, ptr %39, align 4, !tbaa !9
  %594 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %592, i32 noundef 285212678, i32 noundef %593, i32 noundef %594, i32 noundef 8, i8 noundef zeroext 0)
  %595 = load ptr, ptr %32, align 8, !tbaa !5
  %596 = load ptr, ptr %33, align 8, !tbaa !5
  %597 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %595, ptr noundef %596, i32 noundef %597, i32 noundef 1)
  br label %598

598:                                              ; preds = %591, %578
  call void @llvm.lifetime.end.p0(i64 4, ptr %72) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %71) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %70) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %69) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %68) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %67) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %66) #4
  call void @llvm.lifetime.end.p0(i64 148, ptr %65) #4
  call void @llvm.lifetime.end.p0(i64 516, ptr %64) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr %63) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_register_jump_back_label(ptr noundef, ptr noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #2

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare ptr @libxsmm_meltw_descriptor_init2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext) #2

declare void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef) #2

declare void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !13, i64 33, !13, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!13 = !{!"long long", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_descriptor_blob = type { [96 x i8] }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [27 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [85 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64 = external hidden unnamed_addr constant [675 x i8], align 1
@switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64.1 = private unnamed_addr constant [11 x i64] [i64 2, i64 2, i64 1, i64 2, i64 8, i64 2, i64 4, i64 2, i64 2, i64 2, i64 1], align 8

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readnone %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %28, i32 noundef %29, i32 noundef %30) local_unnamed_addr #0 {
  %32 = alloca %struct.libxsmm_descriptor_blob, align 1
  %33 = alloca %struct.libxsmm_mateltwise_kernel_config_struct, align 4
  %34 = alloca %struct.libxsmm_mateltwise_gp_reg_mapping_struct, align 4
  call void @llvm.lifetime.start.p0(i64 96, ptr nonnull %32) #4
  call void @llvm.lifetime.start.p0(i64 516, ptr nonnull %33) #4
  call void @llvm.lifetime.start.p0(i64 148, ptr nonnull %34) #4
  %35 = getelementptr inbounds i8, ptr %3, i64 24
  %36 = load i32, ptr %35, align 1, !tbaa !5
  %37 = insertelement <4 x i32> poison, i32 %36, i64 0
  %38 = shufflevector <4 x i32> %37, <4 x i32> poison, <4 x i32> zeroinitializer
  %39 = and <4 x i32> %38, <i32 458752, i32 65536, i32 131072, i32 262144>
  %40 = icmp eq <4 x i32> %39, zeroinitializer
  store i32 %5, ptr %34, align 4, !tbaa !12
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 26, i32 noundef %5)
  %41 = extractelement <4 x i1> %40, i64 0
  br i1 %41, label %43, label %42

42:                                               ; preds = %31
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 20, i32 noundef %8)
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %7, i64 noundef 0) #4
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %10, i64 noundef 0) #4
  tail call void @libxsmm_aarch64_instruction_register_jump_back_label(ptr noundef %0, ptr noundef %1) #4
  br label %43

43:                                               ; preds = %42, %31
  %44 = extractelement <4 x i1> %40, i64 2
  br i1 %44, label %46, label %45

45:                                               ; preds = %43
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %4, i32 noundef %9, i32 noundef 0, i8 noundef zeroext 0) #4
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef %20, i32 noundef %6)
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1201649661, i32 noundef %6, i32 noundef %7, i32 noundef 0, i32 noundef %6) #4
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %6, i32 noundef %4, i32 noundef %4, i32 noundef 0, i32 noundef 0) #4
  br label %46

46:                                               ; preds = %45, %43
  %47 = extractelement <4 x i1> %40, i64 1
  br i1 %47, label %49, label %48

48:                                               ; preds = %46
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %4, i32 noundef %9, i32 noundef 0, i8 noundef zeroext 0) #4
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1201649661, i32 noundef %4, i32 noundef %7, i32 noundef 0, i32 noundef %4) #4
  br label %49

49:                                               ; preds = %48, %46
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1191182330, i32 noundef %5, i32 noundef 127, i32 noundef 32, i32 noundef %4) #4
  %50 = and i32 %36, 196608
  %or.cond3.not = icmp eq i32 %50, 0
  br i1 %or.cond3.not, label %52, label %51

51:                                               ; preds = %49
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %9, i32 noundef %4, i32 noundef 0, i8 noundef zeroext 0) #4
  br label %52

52:                                               ; preds = %49, %51
  %.not227 = icmp eq i32 %23, 0
  br i1 %.not227, label %54, label %53

53:                                               ; preds = %52
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef %21, i32 noundef %6)
  br label %67

54:                                               ; preds = %52
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef %22, i32 noundef %6)
  br i1 %41, label %67, label %55

55:                                               ; preds = %54
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %10, i32 noundef %6, i32 noundef %6, i32 noundef 0, i32 noundef 0) #4
  switch i32 %19, label %56 [
    i32 0, label %61
    i32 1, label %.fold.split
  ]

56:                                               ; preds = %55
  %57 = and i32 %19, -2
  %switch.tableidx = add i32 %57, -2
  %58 = icmp ult i32 %switch.tableidx, 11
  br i1 %58, label %switch.hole_check, label %59

59:                                               ; preds = %switch.hole_check, %56
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 103, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

.fold.split:                                      ; preds = %55
  br label %61

switch.hole_check:                                ; preds = %56
  %switch.maskindex = trunc nuw i32 %switch.tableidx to i16
  %switch.shifted = lshr i16 1365, %switch.maskindex
  %switch.lobit = trunc i16 %switch.shifted to i1
  br i1 %switch.lobit, label %switch.lookup, label %59

switch.lookup:                                    ; preds = %switch.hole_check
  %60 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [11 x i64], ptr @switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64.1, i64 0, i64 %60
  %switch.load = load i64, ptr %switch.gep, align 8
  br label %61

61:                                               ; preds = %switch.lookup, %55, %.fold.split
  %62 = phi i64 [ 8, %55 ], [ 4, %.fold.split ], [ %switch.load, %switch.lookup ]
  %63 = sext i32 %12 to i64
  %64 = sext i32 %13 to i64
  %65 = mul nsw i64 %64, %63
  %66 = mul i64 %65, %62
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %10, i32 noundef %9, i32 noundef %10, i64 noundef %66) #4
  br label %67

67:                                               ; preds = %54, %61, %53
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1191182330, i32 noundef %5, i32 noundef 127, i32 noundef 80, i32 noundef %6) #4
  %68 = trunc i32 %11 to i16
  %69 = and i32 %11, 65535
  %70 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef nonnull %32, i32 noundef %17, i32 noundef 15, i32 noundef 15, i32 noundef %18, i32 noundef %19, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %68, i8 noundef zeroext 1) #4
  call void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef %0, ptr noundef nonnull %33, ptr noundef %70) #4
  %71 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %69) #4
  %72 = icmp sgt i32 %71, 0
  br i1 %72, label %73, label %74

73:                                               ; preds = %67
  call void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %34, ptr noundef nonnull %33, ptr noundef %70) #4
  br label %75

74:                                               ; preds = %67
  call void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %34, ptr noundef nonnull %33, ptr noundef %70) #4
  br label %75

75:                                               ; preds = %74, %73
  br i1 %.not227, label %97, label %76

76:                                               ; preds = %75
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef %21, i32 noundef %6)
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1191182330, i32 noundef %5, i32 noundef 127, i32 noundef 32, i32 noundef %6) #4
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef %22, i32 noundef %6)
  br i1 %41, label %89, label %77

77:                                               ; preds = %76
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %10, i32 noundef %6, i32 noundef %6, i32 noundef 0, i32 noundef 0) #4
  switch i32 %30, label %78 [
    i32 0, label %83
    i32 1, label %.fold.split228
  ]

78:                                               ; preds = %77
  %79 = and i32 %30, -2
  %switch.tableidx239 = add i32 %79, -2
  %80 = icmp ult i32 %switch.tableidx239, 11
  br i1 %80, label %switch.hole_check240, label %81

81:                                               ; preds = %switch.hole_check240, %78
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 126, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64) #5
  unreachable

.fold.split228:                                   ; preds = %77
  br label %83

switch.hole_check240:                             ; preds = %78
  %switch.maskindex242 = trunc nuw i32 %switch.tableidx239 to i16
  %switch.shifted243 = lshr i16 1365, %switch.maskindex242
  %switch.lobit244 = trunc i16 %switch.shifted243 to i1
  br i1 %switch.lobit244, label %switch.lookup241, label %81

switch.lookup241:                                 ; preds = %switch.hole_check240
  %82 = zext nneg i32 %switch.tableidx239 to i64
  %switch.gep245 = getelementptr inbounds [11 x i64], ptr @switch.table.libxsmm_generator_gemm_apply_ops_input_tensor_and_store_to_stack_aarch64.1, i64 0, i64 %82
  %switch.load246 = load i64, ptr %switch.gep245, align 8
  br label %83

83:                                               ; preds = %switch.lookup241, %77, %.fold.split228
  %84 = phi i64 [ 8, %77 ], [ 4, %.fold.split228 ], [ %switch.load246, %switch.lookup241 ]
  %85 = sext i32 %24 to i64
  %86 = sext i32 %25 to i64
  %87 = mul nsw i64 %86, %85
  %88 = mul i64 %87, %84
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %10, i32 noundef %9, i32 noundef %10, i64 noundef %88) #4
  br label %89

89:                                               ; preds = %83, %76
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1191182330, i32 noundef %5, i32 noundef 127, i32 noundef 80, i32 noundef %6) #4
  %90 = trunc i32 %23 to i16
  %91 = and i32 %23, 65535
  %92 = call ptr @libxsmm_meltw_descriptor_init2(ptr noundef nonnull %32, i32 noundef %28, i32 noundef 15, i32 noundef 15, i32 noundef %29, i32 noundef %30, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef 0, i32 noundef 0, i16 noundef zeroext 0, i16 noundef zeroext %90, i8 noundef zeroext 1) #4
  call void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef %0, ptr noundef nonnull %33, ptr noundef %92) #4
  %93 = call i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef %91) #4
  %94 = icmp sgt i32 %93, 0
  br i1 %94, label %95, label %96

95:                                               ; preds = %89
  call void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %34, ptr noundef nonnull %33, ptr noundef %92) #4
  br label %97

96:                                               ; preds = %89
  call void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %34, ptr noundef nonnull %33, ptr noundef %92) #4
  br label %97

97:                                               ; preds = %95, %96, %75
  br i1 %41, label %103, label %98

98:                                               ; preds = %97
  %99 = extractelement <4 x i1> %40, i64 3
  br i1 %99, label %102, label %100

100:                                              ; preds = %98
  %101 = sext i32 %16 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %9, i32 noundef %4, i64 noundef %101) #4
  br label %102

102:                                              ; preds = %100, %98
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %7, i32 noundef %7, i32 noundef 8, i8 noundef zeroext 0) #4
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %8, i32 noundef 1) #4
  br label %103

103:                                              ; preds = %102, %97
  call void @llvm.lifetime.end.p0(i64 148, ptr nonnull %34) #4
  call void @llvm.lifetime.end.p0(i64 516, ptr nonnull %33) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr nonnull %32) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_register_jump_back_label(ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

declare ptr @libxsmm_meltw_descriptor_init2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_generator_mateltwise_aarch64_init_micro_kernel_config_fullvector(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @libxsmm_meqn_is_unary_opcode_transform_kernel(i32 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_transform_aarch64_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_generator_unary_binary_aarch64_microkernel(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !10, i64 33, !10, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144}


; Effective O3 passes: ConstantMergePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass