; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_bcastload_masked_vreg_aarch64_asimd(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #1 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i8, align 1
  %16 = alloca i8, align 1
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #3
  %19 = load i32, ptr %14, align 4, !tbaa !9
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %7
  br label %24

22:                                               ; preds = %7
  %23 = load i32, ptr %12, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %22, %21
  %25 = phi i32 [ 0, %21 ], [ %23, %22 ]
  %26 = trunc i32 %25 to i8
  store i8 %26, ptr %15, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #3
  %27 = load ptr, ptr %8, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %27, i32 0, i32 6
  %29 = load i32, ptr %28, align 4, !tbaa !12
  %30 = icmp uge i32 %29, 2201
  br i1 %30, label %31, label %36

31:                                               ; preds = %24
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %32, i32 0, i32 6
  %34 = load i32, ptr %33, align 4, !tbaa !12
  %35 = icmp ule i32 %34, 2999
  br label %36

36:                                               ; preds = %31, %24
  %37 = phi i1 [ false, %24 ], [ %35, %31 ]
  %38 = zext i1 %37 to i32
  %39 = trunc i32 %38 to i8
  store i8 %39, ptr %16, align 1, !tbaa !11
  %40 = load i8, ptr %16, align 1, !tbaa !11
  %41 = icmp ne i8 %40, 0
  br i1 %41, label %42, label %88

42:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %43 = load i32, ptr %12, align 4, !tbaa !9
  %44 = icmp eq i32 %43, 1
  br i1 %44, label %45, label %46

45:                                               ; preds = %42
  br label %57

46:                                               ; preds = %42
  %47 = load i32, ptr %12, align 4, !tbaa !9
  %48 = icmp eq i32 %47, 2
  br i1 %48, label %49, label %50

49:                                               ; preds = %46
  br label %55

50:                                               ; preds = %46
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = icmp eq i32 %51, 4
  %53 = zext i1 %52 to i64
  %54 = select i1 %52, i32 -2059353978, i32 -2050957178
  br label %55

55:                                               ; preds = %50, %49
  %56 = phi i32 [ -2067750778, %49 ], [ %54, %50 ]
  br label %57

57:                                               ; preds = %55, %45
  %58 = phi i32 [ -2076147578, %45 ], [ %56, %55 ]
  store i32 %58, ptr %18, align 4, !tbaa !9
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = load i32, ptr %17, align 4, !tbaa !9
  %61 = load i32, ptr %13, align 4, !tbaa !9
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %67

63:                                               ; preds = %57
  %64 = load i32, ptr %13, align 4, !tbaa !9
  %65 = load i32, ptr %12, align 4, !tbaa !9
  %66 = mul i32 %64, %65
  br label %68

67:                                               ; preds = %57
  br label %68

68:                                               ; preds = %67, %63
  %69 = phi i32 [ %66, %63 ], [ -1, %67 ]
  %70 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %59, i32 noundef %60, i32 noundef %69, i32 noundef %70)
  %71 = load ptr, ptr %8, align 8, !tbaa !5
  %72 = load i32, ptr %18, align 4, !tbaa !9
  %73 = load i32, ptr %9, align 4, !tbaa !9
  %74 = load i32, ptr %11, align 4, !tbaa !9
  %75 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef 127, i32 noundef 0, i32 noundef %74, i32 noundef %75)
  %76 = load i8, ptr %15, align 1, !tbaa !11
  %77 = icmp ne i8 %76, 0
  br i1 %77, label %78, label %84

78:                                               ; preds = %68
  %79 = load ptr, ptr %8, align 8, !tbaa !5
  %80 = load i32, ptr %9, align 4, !tbaa !9
  %81 = load i32, ptr %9, align 4, !tbaa !9
  %82 = load i8, ptr %15, align 1, !tbaa !11
  %83 = zext i8 %82 to i32
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %79, i32 noundef 285212678, i32 noundef %80, i32 noundef %81, i32 noundef %83, i8 noundef zeroext 0)
  br label %84

84:                                               ; preds = %78, %68
  %85 = load ptr, ptr %8, align 8, !tbaa !5
  %86 = load i32, ptr %17, align 4, !tbaa !9
  %87 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %85, i32 noundef %86, i32 noundef -1, i32 noundef %87)
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %148

88:                                               ; preds = %36
  %89 = load i32, ptr %13, align 4, !tbaa !9
  %90 = icmp ne i32 %89, 1
  br i1 %90, label %91, label %133

91:                                               ; preds = %88
  %92 = load i32, ptr %14, align 4, !tbaa !9
  %93 = icmp eq i32 %92, 0
  br i1 %93, label %94, label %102

94:                                               ; preds = %91
  %95 = load ptr, ptr %8, align 8, !tbaa !5
  %96 = load i32, ptr %9, align 4, !tbaa !9
  %97 = load i32, ptr %11, align 4, !tbaa !9
  %98 = load i32, ptr %12, align 4, !tbaa !9
  %99 = icmp eq i32 %98, 4
  %100 = zext i1 %99 to i64
  %101 = select i1 %99, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %95, i32 noundef 222347266, i32 noundef %96, i32 noundef 127, i32 noundef %97, i32 noundef %101)
  br label %110

102:                                              ; preds = %91
  %103 = load ptr, ptr %8, align 8, !tbaa !5
  %104 = load i32, ptr %9, align 4, !tbaa !9
  %105 = load i32, ptr %11, align 4, !tbaa !9
  %106 = load i32, ptr %12, align 4, !tbaa !9
  %107 = icmp eq i32 %106, 4
  %108 = zext i1 %107 to i64
  %109 = select i1 %107, i32 5, i32 7
  call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef %103, i32 noundef 230735875, i32 noundef %104, i32 noundef 63, i32 noundef %105, i32 noundef %109)
  br label %110

110:                                              ; preds = %102, %94
  %111 = load i32, ptr %13, align 4, !tbaa !9
  %112 = icmp ne i32 %111, 0
  br i1 %112, label %113, label %132

113:                                              ; preds = %110
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %114, i32 noundef %115, i64 noundef 0)
  %116 = load i32, ptr %13, align 4, !tbaa !9
  %117 = icmp eq i32 %116, 2
  br i1 %117, label %118, label %122

118:                                              ; preds = %113
  %119 = load ptr, ptr %8, align 8, !tbaa !5
  %120 = load i32, ptr %10, align 4, !tbaa !9
  %121 = load i32, ptr %11, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %119, i32 noundef 1308630046, i32 noundef %120, i32 noundef %121, i16 noundef signext 1, i32 noundef 6)
  br label %131

122:                                              ; preds = %113
  %123 = load i32, ptr %13, align 4, !tbaa !9
  %124 = icmp eq i32 %123, 3
  br i1 %124, label %125, label %129

125:                                              ; preds = %122
  %126 = load ptr, ptr %8, align 8, !tbaa !5
  %127 = load i32, ptr %10, align 4, !tbaa !9
  %128 = load i32, ptr %11, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %126, i32 noundef 1308630046, i32 noundef %127, i32 noundef %128, i16 noundef signext 3, i32 noundef 4)
  br label %130

129:                                              ; preds = %122
  br label %130

130:                                              ; preds = %129, %125
  br label %131

131:                                              ; preds = %130, %118
  br label %132

132:                                              ; preds = %131, %110
  br label %147

133:                                              ; preds = %88
  %134 = load ptr, ptr %8, align 8, !tbaa !5
  %135 = load i32, ptr %11, align 4, !tbaa !9
  %136 = load i32, ptr %11, align 4, !tbaa !9
  %137 = load i32, ptr %11, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %134, i32 noundef 773856275, i32 noundef %135, i32 noundef %136, i8 noundef zeroext 0, i32 noundef %137, i32 noundef 1)
  %138 = load ptr, ptr %8, align 8, !tbaa !5
  %139 = load i32, ptr %9, align 4, !tbaa !9
  %140 = load i8, ptr %15, align 1, !tbaa !11
  %141 = zext i8 %140 to i32
  %142 = load i32, ptr %11, align 4, !tbaa !9
  %143 = load i32, ptr %12, align 4, !tbaa !9
  %144 = icmp eq i32 %143, 4
  %145 = zext i1 %144 to i64
  %146 = select i1 %144, i32 4, i32 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %138, i32 noundef 1010828294, i32 noundef %139, i32 noundef 127, i32 noundef %141, i32 noundef %142, i32 noundef %146)
  br label %147

147:                                              ; preds = %133, %132
  br label %148

148:                                              ; preds = %147, %84
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #3
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_bcastload_masked_vreg_aarch64_asimd(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #1 {
  %8 = icmp eq i32 %6, 0
  %9 = trunc i32 %4 to i8
  %10 = select i1 %8, i8 0, i8 %9
  %11 = getelementptr inbounds i8, ptr %0, i64 28
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = add i32 %12, -3000
  %spec.select = icmp ult i32 %13, -799
  br i1 %spec.select, label %25, label %14

14:                                               ; preds = %7
  switch i32 %4, label %15 [
    i32 1, label %18
    i32 2, label %.fold.split
  ]

15:                                               ; preds = %14
  %16 = icmp eq i32 %4, 4
  %17 = select i1 %16, i32 -2059353978, i32 -2050957178
  br label %18

.fold.split:                                      ; preds = %14
  br label %18

18:                                               ; preds = %14, %.fold.split, %15
  %19 = phi i32 [ -2076147578, %14 ], [ %17, %15 ], [ -2067750778, %.fold.split ]
  %.not61 = icmp eq i32 %5, 0
  %20 = mul i32 %5, %4
  %21 = select i1 %.not61, i32 -1, i32 %20
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef nonnull %0, i32 noundef 0, i32 noundef %21, i32 noundef %2)
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef %19, i32 noundef %1, i32 noundef 127, i32 noundef 0, i32 noundef %3, i32 noundef 0) #2
  %.not62 = icmp eq i8 %10, 0
  br i1 %.not62, label %24, label %22

22:                                               ; preds = %18
  %23 = zext i8 %10 to i32
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef %1, i32 noundef %1, i32 noundef %23, i8 noundef zeroext 0) #2
  br label %24

24:                                               ; preds = %22, %18
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef nonnull %0, i32 noundef 0, i32 noundef -1, i32 noundef %2)
  br label %39

25:                                               ; preds = %7
  %.not59 = icmp eq i32 %5, 1
  br i1 %.not59, label %35, label %26

26:                                               ; preds = %25
  %27 = icmp eq i32 %4, 4
  %28 = select i1 %27, i32 5, i32 7
  br i1 %8, label %29, label %30

29:                                               ; preds = %26
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef nonnull %0, i32 noundef 222347266, i32 noundef %1, i32 noundef 127, i32 noundef %3, i32 noundef %28) #2
  br label %31

30:                                               ; preds = %26
  tail call void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef nonnull %0, i32 noundef 230735875, i32 noundef %1, i32 noundef 63, i32 noundef %3, i32 noundef %28) #2
  br label %31

31:                                               ; preds = %30, %29
  %.not60 = icmp eq i32 %5, 0
  br i1 %.not60, label %39, label %32

32:                                               ; preds = %31
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef %2, i64 noundef 0) #2
  switch i32 %5, label %39 [
    i32 2, label %33
    i32 3, label %34
  ]

33:                                               ; preds = %32
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef nonnull %0, i32 noundef 1308630046, i32 noundef %2, i32 noundef %3, i16 noundef signext 1, i32 noundef 6) #2
  br label %39

34:                                               ; preds = %32
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef nonnull %0, i32 noundef 1308630046, i32 noundef %2, i32 noundef %3, i16 noundef signext 3, i32 noundef 4) #2
  br label %39

35:                                               ; preds = %25
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef nonnull %0, i32 noundef 773856275, i32 noundef %3, i32 noundef %3, i8 noundef zeroext 0, i32 noundef %3, i32 noundef 1) #2
  %36 = zext i8 %10 to i32
  %37 = icmp eq i32 %4, 4
  %38 = select i1 %37, i32 4, i32 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef nonnull %0, i32 noundef 1010828294, i32 noundef %1, i32 noundef 127, i32 noundef %36, i32 noundef %3, i32 noundef %38) #2
  br label %39

39:                                               ; preds = %32, %35, %33, %34, %31, %24
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_struct_r_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass