; LLVM IR from kazunetakahashi/atcoder :: 2019/1109_nikkei2019-2-qual/F.ll (Z9calc_eveniRSt6vectorIS_I5StateSaIS0_EESaIS2_EEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Mint = type { i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I5StateSaIS0_EESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI5StateSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z9calc_eveniRSt6vectorIS_I5StateSaIS0_EESaIS2_EEi(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) #2 {
  %4 = alloca %class.Mint, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %class.Mint, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %13 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %13, ptr %9, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %44, %3
  %15 = load i32, ptr %9, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %47

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %20 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %20, ptr %11, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %40, %19
  %22 = load i32, ptr %11, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %43

26:                                               ; preds = %21
  %27 = load ptr, ptr %6, align 8, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I5StateSaIS0_EESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #3
  %31 = load i32, ptr %11, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI5StateSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #3
  %34 = load i32, ptr %33, align 4, !tbaa !11
  %35 = icmp eq i32 %34, 3
  br i1 %35, label %36, label %39

36:                                               ; preds = %26
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %8, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %36, %26
  br label %40

40:                                               ; preds = %39
  %41 = load i32, ptr %11, align 4, !tbaa !5
  %42 = add nsw i32 %41, 2
  store i32 %42, ptr %11, align 4, !tbaa !5
  br label %21, !llvm.loop !13

43:                                               ; preds = %25
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %9, align 4, !tbaa !5
  %46 = add nsw i32 %45, 2
  store i32 %46, ptr %9, align 4, !tbaa !5
  br label %14, !llvm.loop !15

47:                                               ; preds = %18
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = sdiv i32 %48, 2
  store i32 %49, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @_ZN4MintILx998244353EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8) %12, i64 noundef 2)
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call i64 @_ZN4MintILx998244353EE5powerEx(ptr noundef nonnull align 8 dereferenceable(8) %12, i64 noundef %51)
  %53 = getelementptr inbounds %class.Mint, ptr %4, i32 0, i32 0
  store i64 %52, ptr %53, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  store i32 1, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %54 = getelementptr inbounds %class.Mint, ptr %4, i32 0, i32 0
  %55 = load i64, ptr %54, align 8
  ret i64 %55
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MintILx998244353EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN4MintILx998244353EE5powerEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS5State", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Mint = type { i64 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I5StateSaIS0_EESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI5StateSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z9calc_eveniRSt6vectorIS_I5StateSaIS0_EESaIS2_EEi(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) local_unnamed_addr #2 {
  %4 = alloca %class.Mint, align 8
  %5 = icmp slt i32 %2, %0
  br i1 %5, label %.preheader.us.preheader, label %._crit_edge20

.preheader.us.preheader:                          ; preds = %3
  %6 = sext i32 %2 to i64
  %7 = sext i32 %0 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv23 = phi i64 [ %6, %.preheader.us.preheader ], [ %indvars.iv.next24, %._crit_edge.us ]
  %.01418.us = phi i32 [ 0, %.preheader.us.preheader ], [ %spec.select.us, %._crit_edge.us ]
  br label %8

8:                                                ; preds = %.preheader.us, %8
  %indvars.iv = phi i64 [ %6, %.preheader.us ], [ %indvars.iv.next, %8 ]
  %.116.us = phi i32 [ %.01418.us, %.preheader.us ], [ %spec.select.us, %8 ]
  %9 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I5StateSaIS0_EESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv23) #3
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI5StateSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp eq i32 %11, 3
  %13 = zext i1 %12 to i32
  %spec.select.us = add nsw i32 %.116.us, %13
  %indvars.iv.next = add nsw i64 %indvars.iv, 2
  %14 = icmp slt i64 %indvars.iv.next, %7
  br i1 %14, label %8, label %._crit_edge.us, !llvm.loop !9

._crit_edge.us:                                   ; preds = %8
  %indvars.iv.next24 = add nsw i64 %indvars.iv23, 2
  %15 = icmp slt i64 %indvars.iv.next24, %7
  br i1 %15, label %.preheader.us, label %._crit_edge20.loopexit, !llvm.loop !11

._crit_edge20.loopexit:                           ; preds = %._crit_edge.us
  %16 = sdiv i32 %spec.select.us, 2
  %17 = sext i32 %16 to i64
  br label %._crit_edge20

._crit_edge20:                                    ; preds = %._crit_edge20.loopexit, %3
  %.014.lcssa = phi i64 [ 0, %3 ], [ %17, %._crit_edge20.loopexit ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  call void @_ZN4MintILx998244353EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8) %4, i64 noundef 2)
  %18 = call i64 @_ZN4MintILx998244353EE5powerEx(ptr noundef nonnull align 8 dereferenceable(8) %4, i64 noundef %.014.lcssa)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  ret i64 %18
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MintILx998244353EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN4MintILx998244353EE5powerEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"_ZTS5State", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass