; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base23SynetConvolution16bGemm6GemmNNEmmmPKtmS3_mPfm(ptr noundef nonnull align 8 dereferenceable(432) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9) #1 align 2 {
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i64, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i32, align 4
  %23 = alloca ptr, align 8
  %24 = alloca i64, align 8
  %25 = alloca i64, align 8
  %26 = alloca ptr, align 8
  %27 = alloca float, align 4
  %28 = alloca i64, align 8
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i64 %1, ptr %12, align 8, !tbaa !9
  store i64 %2, ptr %13, align 8, !tbaa !9
  store i64 %3, ptr %14, align 8, !tbaa !9
  store ptr %4, ptr %15, align 8, !tbaa !5
  store i64 %5, ptr %16, align 8, !tbaa !9
  store ptr %6, ptr %17, align 8, !tbaa !5
  store i64 %7, ptr %18, align 8, !tbaa !9
  store ptr %8, ptr %19, align 8, !tbaa !5
  store i64 %9, ptr %20, align 8, !tbaa !9
  %29 = load ptr, ptr %11, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  store i64 0, ptr %21, align 8, !tbaa !9
  br label %30

30:                                               ; preds = %99, %10
  %31 = load i64, ptr %21, align 8, !tbaa !9
  %32 = load i64, ptr %12, align 8, !tbaa !9
  %33 = icmp ult i64 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 2, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  br label %102

35:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #4
  %36 = load ptr, ptr %19, align 8, !tbaa !5
  %37 = load i64, ptr %21, align 8, !tbaa !9
  %38 = load i64, ptr %20, align 8, !tbaa !9
  %39 = mul i64 %37, %38
  %40 = getelementptr inbounds float, ptr %36, i64 %39
  store ptr %40, ptr %23, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #4
  store i64 0, ptr %24, align 8, !tbaa !9
  br label %41

41:                                               ; preds = %50, %35
  %42 = load i64, ptr %24, align 8, !tbaa !9
  %43 = load i64, ptr %13, align 8, !tbaa !9
  %44 = icmp ult i64 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  store i32 5, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #4
  br label %53

46:                                               ; preds = %41
  %47 = load ptr, ptr %23, align 8, !tbaa !5
  %48 = load i64, ptr %24, align 8, !tbaa !9
  %49 = getelementptr inbounds float, ptr %47, i64 %48
  store float 0.000000e+00, ptr %49, align 4, !tbaa !11
  br label %50

50:                                               ; preds = %46
  %51 = load i64, ptr %24, align 8, !tbaa !9
  %52 = add i64 %51, 1
  store i64 %52, ptr %24, align 8, !tbaa !9
  br label %41, !llvm.loop !13

53:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #4
  store i64 0, ptr %25, align 8, !tbaa !9
  br label %54

54:                                               ; preds = %95, %53
  %55 = load i64, ptr %25, align 8, !tbaa !9
  %56 = load i64, ptr %14, align 8, !tbaa !9
  %57 = icmp ult i64 %55, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %54
  store i32 8, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #4
  br label %98

59:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #4
  %60 = load ptr, ptr %17, align 8, !tbaa !5
  %61 = load i64, ptr %25, align 8, !tbaa !9
  %62 = load i64, ptr %18, align 8, !tbaa !9
  %63 = mul i64 %61, %62
  %64 = getelementptr inbounds i16, ptr %60, i64 %63
  store ptr %64, ptr %26, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  %65 = load ptr, ptr %15, align 8, !tbaa !5
  %66 = load i64, ptr %21, align 8, !tbaa !9
  %67 = load i64, ptr %16, align 8, !tbaa !9
  %68 = mul i64 %66, %67
  %69 = load i64, ptr %25, align 8, !tbaa !9
  %70 = add i64 %68, %69
  %71 = getelementptr inbounds i16, ptr %65, i64 %70
  %72 = load i16, ptr %71, align 2, !tbaa !15
  %73 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %72)
  store float %73, ptr %27, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #4
  store i64 0, ptr %28, align 8, !tbaa !9
  br label %74

74:                                               ; preds = %91, %59
  %75 = load i64, ptr %28, align 8, !tbaa !9
  %76 = load i64, ptr %13, align 8, !tbaa !9
  %77 = icmp ult i64 %75, %76
  br i1 %77, label %79, label %78

78:                                               ; preds = %74
  store i32 11, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #4
  br label %94

79:                                               ; preds = %74
  %80 = load float, ptr %27, align 4, !tbaa !11
  %81 = load ptr, ptr %26, align 8, !tbaa !5
  %82 = load i64, ptr %28, align 8, !tbaa !9
  %83 = getelementptr inbounds i16, ptr %81, i64 %82
  %84 = load i16, ptr %83, align 2, !tbaa !15
  %85 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %84)
  %86 = load ptr, ptr %23, align 8, !tbaa !5
  %87 = load i64, ptr %28, align 8, !tbaa !9
  %88 = getelementptr inbounds float, ptr %86, i64 %87
  %89 = load float, ptr %88, align 4, !tbaa !11
  %90 = call float @llvm.fmuladd.f32(float %80, float %85, float %89)
  store float %90, ptr %88, align 4, !tbaa !11
  br label %91

91:                                               ; preds = %79
  %92 = load i64, ptr %28, align 8, !tbaa !9
  %93 = add i64 %92, 1
  store i64 %93, ptr %28, align 8, !tbaa !9
  br label %74, !llvm.loop !17

94:                                               ; preds = %78
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #4
  br label %95

95:                                               ; preds = %94
  %96 = load i64, ptr %25, align 8, !tbaa !9
  %97 = add i64 %96, 1
  store i64 %97, ptr %25, align 8, !tbaa !9
  br label %54, !llvm.loop !18

98:                                               ; preds = %58
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #4
  br label %99

99:                                               ; preds = %98
  %100 = load i64, ptr %21, align 8, !tbaa !9
  %101 = add i64 %100, 1
  store i64 %101, ptr %21, align 8, !tbaa !9
  br label %30, !llvm.loop !19

102:                                              ; preds = %34
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base23SynetConvolution16bGemm6GemmNNEmmmPKtmS3_mPfm(ptr nocapture noundef nonnull readnone align 8 dereferenceable(432) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef readonly %4, i64 noundef %5, ptr nocapture noundef readonly %6, i64 noundef %7, ptr nocapture noundef %8, i64 noundef %9) local_unnamed_addr #0 align 2 {
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph40

.lr.ph40:                                         ; preds = %10
  %.not54 = icmp eq i64 %2, 0
  %.not55 = icmp eq i64 %3, 0
  br i1 %.not55, label %.lr.ph40.split, label %.lr.ph40.split.us

.lr.ph40.split.us:                                ; preds = %.lr.ph40
  br i1 %.not54, label %.preheader.us, label %.lr.ph40.split.us.split.us.preheader

.lr.ph40.split.us.split.us.preheader:             ; preds = %.lr.ph40.split.us
  %11 = shl i64 %9, 2
  %12 = shl nuw i64 %2, 2
  br label %.preheader.us.us

.preheader.us.us:                                 ; preds = %.lr.ph40.split.us.split.us.preheader, %._crit_edge38.split.us.us.us
  %.02939.us.us = phi i64 [ %32, %._crit_edge38.split.us.us.us ], [ 0, %.lr.ph40.split.us.split.us.preheader ]
  %13 = mul i64 %.02939.us.us, %9
  %14 = getelementptr inbounds float, ptr %8, i64 %13
  %15 = mul i64 %11, %.02939.us.us
  %scevgep = getelementptr i8, ptr %8, i64 %15
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep, i8 0, i64 %12, i1 false), !tbaa !5
  %16 = mul i64 %.02939.us.us, %5
  %17 = getelementptr i16, ptr %4, i64 %16
  br label %.lr.ph35.us.us.us

.lr.ph35.us.us.us:                                ; preds = %._crit_edge.us.us.us, %.preheader.us.us
  %.03036.us.us.us = phi i64 [ 0, %.preheader.us.us ], [ %31, %._crit_edge.us.us.us ]
  %18 = mul i64 %.03036.us.us.us, %7
  %19 = getelementptr inbounds i16, ptr %6, i64 %18
  %20 = getelementptr i16, ptr %17, i64 %.03036.us.us.us
  %21 = load i16, ptr %20, align 2, !tbaa !9
  %22 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %21)
  br label %23

23:                                               ; preds = %23, %.lr.ph35.us.us.us
  %.034.us.us.us = phi i64 [ 0, %.lr.ph35.us.us.us ], [ %30, %23 ]
  %24 = getelementptr inbounds i16, ptr %19, i64 %.034.us.us.us
  %25 = load i16, ptr %24, align 2, !tbaa !9
  %26 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %25)
  %27 = getelementptr inbounds float, ptr %14, i64 %.034.us.us.us
  %28 = load float, ptr %27, align 4, !tbaa !5
  %29 = tail call float @llvm.fmuladd.f32(float %22, float %26, float %28)
  store float %29, ptr %27, align 4, !tbaa !5
  %30 = add nuw i64 %.034.us.us.us, 1
  %exitcond.not = icmp eq i64 %30, %2
  br i1 %exitcond.not, label %._crit_edge.us.us.us, label %23, !llvm.loop !11

._crit_edge.us.us.us:                             ; preds = %23
  %31 = add nuw i64 %.03036.us.us.us, 1
  %exitcond60.not = icmp eq i64 %31, %3
  br i1 %exitcond60.not, label %._crit_edge38.split.us.us.us, label %.lr.ph35.us.us.us, !llvm.loop !13

._crit_edge38.split.us.us.us:                     ; preds = %._crit_edge.us.us.us
  %32 = add nuw i64 %.02939.us.us, 1
  %exitcond61.not = icmp eq i64 %32, %1
  br i1 %exitcond61.not, label %._crit_edge, label %.preheader.us.us, !llvm.loop !14

.preheader.us:                                    ; preds = %.lr.ph40.split.us, %._crit_edge38.split.us42
  %.02939.us = phi i64 [ %40, %._crit_edge38.split.us42 ], [ 0, %.lr.ph40.split.us ]
  %33 = mul i64 %.02939.us, %5
  %34 = getelementptr i16, ptr %4, i64 %33
  br label %35

35:                                               ; preds = %.preheader.us, %35
  %.03036.us41 = phi i64 [ 0, %.preheader.us ], [ %39, %35 ]
  %36 = getelementptr i16, ptr %34, i64 %.03036.us41
  %37 = load i16, ptr %36, align 2, !tbaa !9
  %38 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %37)
  %39 = add nuw i64 %.03036.us41, 1
  %exitcond62.not = icmp eq i64 %39, %3
  br i1 %exitcond62.not, label %._crit_edge38.split.us42, label %35, !llvm.loop !13

._crit_edge38.split.us42:                         ; preds = %35
  %40 = add nuw i64 %.02939.us, 1
  %exitcond63.not = icmp eq i64 %40, %1
  br i1 %exitcond63.not, label %._crit_edge, label %.preheader.us, !llvm.loop !14

.lr.ph40.split:                                   ; preds = %.lr.ph40
  br i1 %.not54, label %._crit_edge, label %.lr.ph.us47.preheader

.lr.ph.us47.preheader:                            ; preds = %.lr.ph40.split
  %41 = shl i64 %9, 2
  %42 = shl nuw i64 %2, 2
  %xtraiter = and i64 %1, 7
  %43 = icmp ult i64 %1, 8
  br i1 %43, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.us47.preheader.new

.lr.ph.us47.preheader.new:                        ; preds = %.lr.ph.us47.preheader
  %unroll_iter = and i64 %1, -8
  br label %.lr.ph.us47

.lr.ph.us47:                                      ; preds = %.lr.ph.us47, %.lr.ph.us47.preheader.new
  %.02939.us44 = phi i64 [ 0, %.lr.ph.us47.preheader.new ], [ %59, %.lr.ph.us47 ]
  %niter = phi i64 [ 0, %.lr.ph.us47.preheader.new ], [ %niter.next.7, %.lr.ph.us47 ]
  %44 = mul i64 %41, %.02939.us44
  %scevgep64 = getelementptr i8, ptr %8, i64 %44
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64, i8 0, i64 %42, i1 false), !tbaa !5
  %45 = or disjoint i64 %.02939.us44, 1
  %46 = mul i64 %41, %45
  %scevgep64.1 = getelementptr i8, ptr %8, i64 %46
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.1, i8 0, i64 %42, i1 false), !tbaa !5
  %47 = or disjoint i64 %.02939.us44, 2
  %48 = mul i64 %41, %47
  %scevgep64.2 = getelementptr i8, ptr %8, i64 %48
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.2, i8 0, i64 %42, i1 false), !tbaa !5
  %49 = or disjoint i64 %.02939.us44, 3
  %50 = mul i64 %41, %49
  %scevgep64.3 = getelementptr i8, ptr %8, i64 %50
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.3, i8 0, i64 %42, i1 false), !tbaa !5
  %51 = or disjoint i64 %.02939.us44, 4
  %52 = mul i64 %41, %51
  %scevgep64.4 = getelementptr i8, ptr %8, i64 %52
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.4, i8 0, i64 %42, i1 false), !tbaa !5
  %53 = or disjoint i64 %.02939.us44, 5
  %54 = mul i64 %41, %53
  %scevgep64.5 = getelementptr i8, ptr %8, i64 %54
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.5, i8 0, i64 %42, i1 false), !tbaa !5
  %55 = or disjoint i64 %.02939.us44, 6
  %56 = mul i64 %41, %55
  %scevgep64.6 = getelementptr i8, ptr %8, i64 %56
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.6, i8 0, i64 %42, i1 false), !tbaa !5
  %57 = or disjoint i64 %.02939.us44, 7
  %58 = mul i64 %41, %57
  %scevgep64.7 = getelementptr i8, ptr %8, i64 %58
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.7, i8 0, i64 %42, i1 false), !tbaa !5
  %59 = add nuw i64 %.02939.us44, 8
  %niter.next.7 = add i64 %niter, 8
  %niter.ncmp.7 = icmp eq i64 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.us47, !llvm.loop !14

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph.us47, %.lr.ph.us47.preheader
  %.02939.us44.unr = phi i64 [ 0, %.lr.ph.us47.preheader ], [ %59, %.lr.ph.us47 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.us47.epil

.lr.ph.us47.epil:                                 ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.us47.epil
  %.02939.us44.epil = phi i64 [ %61, %.lr.ph.us47.epil ], [ %.02939.us44.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.us47.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %60 = mul i64 %41, %.02939.us44.epil
  %scevgep64.epil = getelementptr i8, ptr %8, i64 %60
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep64.epil, i8 0, i64 %42, i1 false), !tbaa !5
  %61 = add nuw i64 %.02939.us44.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.us47.epil, !llvm.loop !15

._crit_edge:                                      ; preds = %._crit_edge38.split.us.us.us, %._crit_edge38.split.us42, %._crit_edge.loopexit.unr-lcssa, %.lr.ph.us47.epil, %.lr.ph40.split, %10
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass