; LLVM IR from libxsmm/libxsmm :: src (generator_aarch64_instructions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@stderr = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [86 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@.str.2 = external hidden unnamed_addr constant [98 x i8], align 1
@__func__.libxsmm_aarch64_instruction_restore_regs = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_restore_regs(ptr noundef %0, i16 noundef zeroext %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i16 %1, ptr %4, align 2, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %5, i32 0, i32 6
  %7 = load i32, ptr %6, align 4, !tbaa !11
  %8 = icmp ult i32 %7, 2001
  br i1 %8, label %9, label %20

9:                                                ; preds = %2
  %10 = load ptr, ptr @stderr, align 8, !tbaa !5
  %11 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %10, ptr noundef @.str.2) #3
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !14
  %14 = icmp ult i32 1, %13
  br i1 %14, label %15, label %17

15:                                               ; preds = %9
  %16 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !14
  br label %18

17:                                               ; preds = %9
  br label %18

18:                                               ; preds = %17, %15
  %19 = phi i32 [ %16, %15 ], [ 1, %17 ]
  call void @libxsmm_handle_error(ptr noundef %12, i32 noundef 90000, ptr noundef @__func__.libxsmm_aarch64_instruction_restore_regs, ptr noundef @.str.1, i32 noundef 91, i32 noundef %19)
  br label %106

20:                                               ; preds = %2
  %21 = load i16, ptr %4, align 2, !tbaa !9
  %22 = zext i16 %21 to i32
  %23 = and i32 %22, 1
  %24 = icmp eq i32 %23, 1
  br i1 %24, label %25, label %27

25:                                               ; preds = %20
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %26, i32 noundef 759169031, i32 noundef 63, i32 noundef 176, i32 noundef 8, i32 noundef 9, i32 noundef 6)
  br label %27

27:                                               ; preds = %25, %20
  %28 = load i16, ptr %4, align 2, !tbaa !9
  %29 = zext i16 %28 to i32
  %30 = and i32 %29, 2
  %31 = icmp eq i32 %30, 2
  br i1 %31, label %32, label %34

32:                                               ; preds = %27
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %33, i32 noundef 759169031, i32 noundef 63, i32 noundef 160, i32 noundef 10, i32 noundef 11, i32 noundef 6)
  br label %34

34:                                               ; preds = %32, %27
  %35 = load i16, ptr %4, align 2, !tbaa !9
  %36 = zext i16 %35 to i32
  %37 = and i32 %36, 4
  %38 = icmp eq i32 %37, 4
  br i1 %38, label %39, label %41

39:                                               ; preds = %34
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %40, i32 noundef 759169031, i32 noundef 63, i32 noundef 144, i32 noundef 12, i32 noundef 13, i32 noundef 6)
  br label %41

41:                                               ; preds = %39, %34
  %42 = load i16, ptr %4, align 2, !tbaa !9
  %43 = zext i16 %42 to i32
  %44 = and i32 %43, 8
  %45 = icmp eq i32 %44, 8
  br i1 %45, label %46, label %48

46:                                               ; preds = %41
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %47, i32 noundef 759169031, i32 noundef 63, i32 noundef 128, i32 noundef 14, i32 noundef 15, i32 noundef 6)
  br label %48

48:                                               ; preds = %46, %41
  %49 = load i16, ptr %4, align 2, !tbaa !9
  %50 = zext i16 %49 to i32
  %51 = and i32 %50, 16
  %52 = icmp eq i32 %51, 16
  br i1 %52, label %53, label %55

53:                                               ; preds = %48
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %54, i32 noundef 692060167, i32 noundef 63, i32 noundef 112, i32 noundef 48, i32 noundef 49)
  br label %55

55:                                               ; preds = %53, %48
  %56 = load i16, ptr %4, align 2, !tbaa !9
  %57 = zext i16 %56 to i32
  %58 = and i32 %57, 32
  %59 = icmp eq i32 %58, 32
  br i1 %59, label %60, label %62

60:                                               ; preds = %55
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %61, i32 noundef 692060167, i32 noundef 63, i32 noundef 96, i32 noundef 50, i32 noundef 51)
  br label %62

62:                                               ; preds = %60, %55
  %63 = load i16, ptr %4, align 2, !tbaa !9
  %64 = zext i16 %63 to i32
  %65 = and i32 %64, 64
  %66 = icmp eq i32 %65, 64
  br i1 %66, label %67, label %69

67:                                               ; preds = %62
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %68, i32 noundef 692060167, i32 noundef 63, i32 noundef 80, i32 noundef 52, i32 noundef 53)
  br label %69

69:                                               ; preds = %67, %62
  %70 = load i16, ptr %4, align 2, !tbaa !9
  %71 = zext i16 %70 to i32
  %72 = and i32 %71, 128
  %73 = icmp eq i32 %72, 128
  br i1 %73, label %74, label %76

74:                                               ; preds = %69
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %75, i32 noundef 692060167, i32 noundef 63, i32 noundef 64, i32 noundef 54, i32 noundef 55)
  br label %76

76:                                               ; preds = %74, %69
  %77 = load i16, ptr %4, align 2, !tbaa !9
  %78 = zext i16 %77 to i32
  %79 = and i32 %78, 256
  %80 = icmp eq i32 %79, 256
  br i1 %80, label %81, label %83

81:                                               ; preds = %76
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %82, i32 noundef 692060167, i32 noundef 63, i32 noundef 48, i32 noundef 56, i32 noundef 57)
  br label %83

83:                                               ; preds = %81, %76
  %84 = load i16, ptr %4, align 2, !tbaa !9
  %85 = zext i16 %84 to i32
  %86 = and i32 %85, 512
  %87 = icmp eq i32 %86, 512
  br i1 %87, label %88, label %90

88:                                               ; preds = %83
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %89, i32 noundef 692060167, i32 noundef 63, i32 noundef 32, i32 noundef 58, i32 noundef 59)
  br label %90

90:                                               ; preds = %88, %83
  %91 = load i16, ptr %4, align 2, !tbaa !9
  %92 = zext i16 %91 to i32
  %93 = and i32 %92, 1024
  %94 = icmp eq i32 %93, 1024
  br i1 %94, label %95, label %97

95:                                               ; preds = %90
  %96 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %96, i32 noundef 692060167, i32 noundef 63, i32 noundef 16, i32 noundef 60, i32 noundef 61)
  br label %97

97:                                               ; preds = %95, %90
  %98 = load i16, ptr %4, align 2, !tbaa !9
  %99 = zext i16 %98 to i32
  %100 = and i32 %99, 2048
  %101 = icmp eq i32 %100, 2048
  br i1 %101, label %102, label %104

102:                                              ; preds = %97
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %103, i32 noundef -1186988026, i32 noundef 63, i32 noundef 63, i32 noundef 0, i32 noundef 62)
  br label %104

104:                                              ; preds = %102, %97
  %105 = load ptr, ptr %3, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %105, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 192, i8 noundef zeroext 0)
  br label %106

106:                                              ; preds = %104, %18
  ret void
}

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !13, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28}
!13 = !{!"int", !7, i64 0}
!14 = !{!13, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [86 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@.str.2 = external hidden unnamed_addr constant [98 x i8], align 1
@__func__.libxsmm_aarch64_instruction_restore_regs = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_restore_regs(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 28
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp ult i32 %4, 2001
  br i1 %5, label %6, label %13

6:                                                ; preds = %2
  %7 = load ptr, ptr @stderr, align 8, !tbaa !11
  %8 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %7, ptr noundef nonnull @.str.2) #3
  %9 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !12
  %10 = icmp ugt i32 %9, 1
  %11 = load i32, ptr @libxsmm_verbosity, align 4
  %12 = select i1 %10, i32 %11, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_aarch64_instruction_restore_regs, ptr noundef nonnull @.str.1, i32 noundef 91, i32 noundef %12) #4
  br label %51

13:                                               ; preds = %2
  %14 = zext i16 %1 to i32
  %15 = and i32 %14, 1
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %17, label %16

16:                                               ; preds = %13
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef nonnull %0, i32 noundef 759169031, i32 noundef 63, i32 noundef 176, i32 noundef 8, i32 noundef 9, i32 noundef 6)
  br label %17

17:                                               ; preds = %16, %13
  %18 = and i32 %14, 2
  %.not26 = icmp eq i32 %18, 0
  br i1 %.not26, label %20, label %19

19:                                               ; preds = %17
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef nonnull %0, i32 noundef 759169031, i32 noundef 63, i32 noundef 160, i32 noundef 10, i32 noundef 11, i32 noundef 6)
  br label %20

20:                                               ; preds = %19, %17
  %21 = and i32 %14, 4
  %.not27 = icmp eq i32 %21, 0
  br i1 %.not27, label %23, label %22

22:                                               ; preds = %20
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef nonnull %0, i32 noundef 759169031, i32 noundef 63, i32 noundef 144, i32 noundef 12, i32 noundef 13, i32 noundef 6)
  br label %23

23:                                               ; preds = %22, %20
  %24 = and i32 %14, 8
  %.not28 = icmp eq i32 %24, 0
  br i1 %.not28, label %26, label %25

25:                                               ; preds = %23
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef nonnull %0, i32 noundef 759169031, i32 noundef 63, i32 noundef 128, i32 noundef 14, i32 noundef 15, i32 noundef 6)
  br label %26

26:                                               ; preds = %25, %23
  %27 = and i32 %14, 16
  %.not29 = icmp eq i32 %27, 0
  br i1 %.not29, label %29, label %28

28:                                               ; preds = %26
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 112, i32 noundef 48, i32 noundef 49)
  br label %29

29:                                               ; preds = %28, %26
  %30 = and i32 %14, 32
  %.not30 = icmp eq i32 %30, 0
  br i1 %.not30, label %32, label %31

31:                                               ; preds = %29
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 96, i32 noundef 50, i32 noundef 51)
  br label %32

32:                                               ; preds = %31, %29
  %33 = and i32 %14, 64
  %.not31 = icmp eq i32 %33, 0
  br i1 %.not31, label %35, label %34

34:                                               ; preds = %32
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 80, i32 noundef 52, i32 noundef 53)
  br label %35

35:                                               ; preds = %34, %32
  %36 = and i32 %14, 128
  %.not32 = icmp eq i32 %36, 0
  br i1 %.not32, label %38, label %37

37:                                               ; preds = %35
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 64, i32 noundef 54, i32 noundef 55)
  br label %38

38:                                               ; preds = %37, %35
  %39 = and i32 %14, 256
  %.not33 = icmp eq i32 %39, 0
  br i1 %.not33, label %41, label %40

40:                                               ; preds = %38
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 48, i32 noundef 56, i32 noundef 57)
  br label %41

41:                                               ; preds = %40, %38
  %42 = and i32 %14, 512
  %.not34 = icmp eq i32 %42, 0
  br i1 %.not34, label %44, label %43

43:                                               ; preds = %41
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 32, i32 noundef 58, i32 noundef 59)
  br label %44

44:                                               ; preds = %43, %41
  %45 = and i32 %14, 1024
  %.not35 = icmp eq i32 %45, 0
  br i1 %.not35, label %47, label %46

46:                                               ; preds = %44
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 692060167, i32 noundef 63, i32 noundef 16, i32 noundef 60, i32 noundef 61)
  br label %47

47:                                               ; preds = %46, %44
  %48 = and i32 %14, 2048
  %.not36 = icmp eq i32 %48, 0
  br i1 %.not36, label %50, label %49

49:                                               ; preds = %47
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef 63, i32 noundef 63, i32 noundef 0, i32 noundef 62)
  br label %50

50:                                               ; preds = %49, %47
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 192, i8 noundef zeroext 0)
  br label %51

51:                                               ; preds = %50, %6
  ret void
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!10, !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass