; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }
%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_b = external hidden unnamed_addr constant [6 x i32], align 16
@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_a = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__func__.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla = external hidden unnamed_addr constant [54 x i8], align 1
@.str = external hidden unnamed_addr constant [78 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #2 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca [6 x i32], align 16
  %24 = alloca [2 x i32], align 4
  %25 = alloca [2 x i32], align 4
  %26 = alloca [24 x i32], align 16
  %27 = alloca i8, align 1
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 2, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 32, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %30, i32 0, i32 4
  %32 = load i32, ptr %31, align 1, !tbaa !11
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %33, i32 0, i32 3
  %35 = load i32, ptr %34, align 4, !tbaa !15
  %36 = mul i32 %32, %35
  store i32 %36, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %23) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %23, ptr align 16 @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_b, i64 24, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %24, ptr align 4 @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_zip, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %25, ptr align 4 @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_a, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 96, ptr %26) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %26, ptr align 16 @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 96, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %27) #4
  store i8 0, ptr %27, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #4
  store i32 0, ptr %28, align 4, !tbaa !9
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %45, %7
  %38 = load i32, ptr %18, align 4, !tbaa !9
  %39 = icmp ult i32 %38, 6
  br i1 %39, label %40, label %48

40:                                               ; preds = %37
  %41 = load i32, ptr %18, align 4, !tbaa !9
  %42 = load i32, ptr %18, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %43
  store i32 %41, ptr %44, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %40
  %46 = load i32, ptr %18, align 4, !tbaa !9
  %47 = add i32 %46, 1
  store i32 %47, ptr %18, align 4, !tbaa !9
  br label %37, !llvm.loop !19

48:                                               ; preds = %37
  %49 = load i32, ptr %14, align 4, !tbaa !9
  %50 = load i32, ptr %12, align 4, !tbaa !9
  %51 = udiv i32 %50, 4
  store i32 %51, ptr %15, align 4, !tbaa !9
  %52 = load i32, ptr %13, align 4, !tbaa !9
  %53 = udiv i32 %52, 2
  store i32 %53, ptr %16, align 4, !tbaa !9
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %54, i32 0, i32 8
  %56 = getelementptr inbounds [3 x i8], ptr %55, i64 0, i64 0
  %57 = call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef %56)
  %58 = icmp eq i32 2, %57
  br i1 %58, label %59, label %60

59:                                               ; preds = %48
  store i32 1849748499, ptr %28, align 4, !tbaa !9
  br label %119

60:                                               ; preds = %48
  %61 = load ptr, ptr %11, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %61, i32 0, i32 8
  %63 = getelementptr inbounds [3 x i8], ptr %62, i64 0, i64 0
  %64 = call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef %63)
  %65 = icmp eq i32 12, %64
  br i1 %65, label %66, label %109

66:                                               ; preds = %60
  %67 = load ptr, ptr %11, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %67, i32 0, i32 6
  %69 = load i32, ptr %68, align 1, !tbaa !21
  %70 = and i32 %69, 256
  %71 = icmp ugt i32 %70, 0
  br i1 %71, label %72, label %79

72:                                               ; preds = %66
  %73 = load ptr, ptr %11, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %73, i32 0, i32 6
  %75 = load i32, ptr %74, align 1, !tbaa !21
  %76 = and i32 %75, 512
  %77 = icmp ugt i32 %76, 0
  br i1 %77, label %78, label %79

78:                                               ; preds = %72
  store i32 1853924371, ptr %28, align 4, !tbaa !9
  br label %108

79:                                               ; preds = %72, %66
  %80 = load ptr, ptr %11, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %80, i32 0, i32 6
  %82 = load i32, ptr %81, align 1, !tbaa !21
  %83 = and i32 %82, 256
  %84 = icmp eq i32 %83, 0
  br i1 %84, label %85, label %92

85:                                               ; preds = %79
  %86 = load ptr, ptr %11, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 1, !tbaa !21
  %89 = and i32 %88, 512
  %90 = icmp ugt i32 %89, 0
  br i1 %90, label %91, label %92

91:                                               ; preds = %85
  store i32 1317055507, ptr %28, align 4, !tbaa !9
  br label %107

92:                                               ; preds = %85, %79
  %93 = load ptr, ptr %11, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %93, i32 0, i32 6
  %95 = load i32, ptr %94, align 1, !tbaa !21
  %96 = and i32 %95, 256
  %97 = icmp ugt i32 %96, 0
  br i1 %97, label %98, label %105

98:                                               ; preds = %92
  %99 = load ptr, ptr %11, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %99, i32 0, i32 6
  %101 = load i32, ptr %100, align 1, !tbaa !21
  %102 = and i32 %101, 512
  %103 = icmp eq i32 %102, 0
  br i1 %103, label %104, label %105

104:                                              ; preds = %98
  store i32 1317055507, ptr %28, align 4, !tbaa !9
  store i8 1, ptr %27, align 1, !tbaa !18
  br label %106

105:                                              ; preds = %98, %92
  store i32 1317053459, ptr %28, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %105, %104
  br label %107

107:                                              ; preds = %106, %91
  br label %108

108:                                              ; preds = %107, %78
  br label %118

109:                                              ; preds = %60
  %110 = load ptr, ptr %8, align 8, !tbaa !5
  %111 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %112 = icmp ult i32 1, %111
  br i1 %112, label %113, label %115

113:                                              ; preds = %109
  %114 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %116

115:                                              ; preds = %109
  br label %116

116:                                              ; preds = %115, %113
  %117 = phi i32 [ %114, %113 ], [ 1, %115 ]
  call void @libxsmm_handle_error(ptr noundef %110, i32 noundef 90033, ptr noundef @__func__.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla, ptr noundef @.str, i32 noundef 537, i32 noundef %117)
  store i32 1, ptr %29, align 4
  br label %361

118:                                              ; preds = %108
  br label %119

119:                                              ; preds = %118, %59
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %120

120:                                              ; preds = %211, %119
  %121 = load i32, ptr %18, align 4, !tbaa !9
  %122 = load i32, ptr %16, align 4, !tbaa !9
  %123 = icmp ult i32 %121, %122
  br i1 %123, label %124, label %214

124:                                              ; preds = %120
  %125 = load ptr, ptr %8, align 8, !tbaa !5
  %126 = load ptr, ptr %9, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %126, i32 0, i32 3
  %128 = load i32, ptr %127, align 4, !tbaa !22
  %129 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  %130 = load i32, ptr %129, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %125, i32 noundef 1027604486, i32 noundef %128, i32 noundef 127, i32 noundef 0, i32 noundef %130, i32 noundef 1)
  %131 = load ptr, ptr %8, align 8, !tbaa !5
  %132 = load ptr, ptr %9, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %132, i32 0, i32 3
  %134 = load i32, ptr %133, align 4, !tbaa !22
  %135 = load ptr, ptr %9, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %135, i32 0, i32 22
  %137 = load i32, ptr %136, align 4, !tbaa !24
  %138 = load ptr, ptr %9, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %138, i32 0, i32 3
  %140 = load i32, ptr %139, align 4, !tbaa !22
  %141 = load i32, ptr %22, align 4, !tbaa !9
  %142 = zext i32 %141 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %131, i32 noundef 4096, i32 noundef %134, i32 noundef %137, i32 noundef %140, i64 noundef %142)
  %143 = load ptr, ptr %8, align 8, !tbaa !5
  %144 = load ptr, ptr %9, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %144, i32 0, i32 3
  %146 = load i32, ptr %145, align 4, !tbaa !22
  %147 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  %148 = load i32, ptr %147, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %143, i32 noundef 1027604486, i32 noundef %146, i32 noundef 127, i32 noundef 0, i32 noundef %148, i32 noundef 1)
  %149 = load i32, ptr %18, align 4, !tbaa !9
  %150 = add i32 %149, 1
  %151 = load i32, ptr %16, align 4, !tbaa !9
  %152 = icmp ne i32 %150, %151
  br i1 %152, label %153, label %166

153:                                              ; preds = %124
  %154 = load ptr, ptr %8, align 8, !tbaa !5
  %155 = load ptr, ptr %9, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %155, i32 0, i32 3
  %157 = load i32, ptr %156, align 4, !tbaa !22
  %158 = load ptr, ptr %9, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %158, i32 0, i32 22
  %160 = load i32, ptr %159, align 4, !tbaa !24
  %161 = load ptr, ptr %9, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %161, i32 0, i32 3
  %163 = load i32, ptr %162, align 4, !tbaa !22
  %164 = load i32, ptr %22, align 4, !tbaa !9
  %165 = zext i32 %164 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %154, i32 noundef 4096, i32 noundef %157, i32 noundef %160, i32 noundef %163, i64 noundef %165)
  br label %188

166:                                              ; preds = %124
  %167 = load ptr, ptr %8, align 8, !tbaa !5
  %168 = load ptr, ptr %9, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %168, i32 0, i32 3
  %170 = load i32, ptr %169, align 4, !tbaa !22
  %171 = load ptr, ptr %9, align 8, !tbaa !5
  %172 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %171, i32 0, i32 22
  %173 = load i32, ptr %172, align 4, !tbaa !24
  %174 = load ptr, ptr %9, align 8, !tbaa !5
  %175 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %174, i32 0, i32 3
  %176 = load i32, ptr %175, align 4, !tbaa !22
  %177 = load i32, ptr %16, align 4, !tbaa !9
  %178 = zext i32 %177 to i64
  %179 = sub nsw i64 %178, 1
  %180 = load i32, ptr %22, align 4, !tbaa !9
  %181 = zext i32 %180 to i64
  %182 = mul nsw i64 %179, %181
  %183 = mul nsw i64 %182, 2
  %184 = load i32, ptr %22, align 4, !tbaa !9
  %185 = zext i32 %184 to i64
  %186 = add nsw i64 %183, %185
  %187 = sub nsw i64 %186, 16
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %167, i32 noundef 4097, i32 noundef %170, i32 noundef %173, i32 noundef %176, i64 noundef %187)
  br label %188

188:                                              ; preds = %166, %153
  %189 = load ptr, ptr %8, align 8, !tbaa !5
  %190 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  %191 = load i32, ptr %190, align 4, !tbaa !9
  %192 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  %193 = load i32, ptr %192, align 4, !tbaa !9
  %194 = load i32, ptr %18, align 4, !tbaa !9
  %195 = mul i32 2, %194
  %196 = add i32 %195, 0
  %197 = zext i32 %196 to i64
  %198 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %197
  %199 = load i32, ptr %198, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %189, i32 noundef 234895363, i32 noundef %191, i32 noundef %193, i8 noundef zeroext 0, i32 noundef %199, i32 noundef 7)
  %200 = load ptr, ptr %8, align 8, !tbaa !5
  %201 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 0
  %202 = load i32, ptr %201, align 4, !tbaa !9
  %203 = getelementptr inbounds [2 x i32], ptr %24, i64 0, i64 1
  %204 = load i32, ptr %203, align 4, !tbaa !9
  %205 = load i32, ptr %18, align 4, !tbaa !9
  %206 = mul i32 2, %205
  %207 = add i32 %206, 1
  %208 = zext i32 %207 to i64
  %209 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %208
  %210 = load i32, ptr %209, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %200, i32 noundef 234911747, i32 noundef %202, i32 noundef %204, i8 noundef zeroext 0, i32 noundef %210, i32 noundef 7)
  br label %211

211:                                              ; preds = %188
  %212 = load i32, ptr %18, align 4, !tbaa !9
  %213 = add i32 %212, 1
  store i32 %213, ptr %18, align 4, !tbaa !9
  br label %120, !llvm.loop !25

214:                                              ; preds = %120
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %215

215:                                              ; preds = %357, %214
  %216 = load i32, ptr %20, align 4, !tbaa !9
  %217 = load i32, ptr %17, align 4, !tbaa !9
  %218 = icmp ult i32 %216, %217
  br i1 %218, label %219, label %360

219:                                              ; preds = %215
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %220

220:                                              ; preds = %328, %219
  %221 = load i32, ptr %19, align 4, !tbaa !9
  %222 = load i32, ptr %15, align 4, !tbaa !9
  %223 = icmp ult i32 %221, %222
  br i1 %223, label %224, label %331

224:                                              ; preds = %220
  %225 = load ptr, ptr %8, align 8, !tbaa !5
  %226 = load ptr, ptr %9, align 8, !tbaa !5
  %227 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %226, i32 0, i32 1
  %228 = load i32, ptr %227, align 4, !tbaa !26
  %229 = load i32, ptr %21, align 4, !tbaa !9
  %230 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 0
  %231 = load i32, ptr %230, align 4, !tbaa !9
  %232 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 1
  %233 = load i32, ptr %232, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %225, i32 noundef 750780423, i32 noundef %228, i32 noundef %229, i32 noundef %231, i32 noundef %233, i32 noundef 1)
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %234

234:                                              ; preds = %324, %224
  %235 = load i32, ptr %18, align 4, !tbaa !9
  %236 = load i32, ptr %16, align 4, !tbaa !9
  %237 = icmp ult i32 %235, %236
  br i1 %237, label %238, label %327

238:                                              ; preds = %234
  %239 = load ptr, ptr %8, align 8, !tbaa !5
  %240 = load i32, ptr %28, align 4, !tbaa !9
  %241 = load i8, ptr %27, align 1, !tbaa !18
  %242 = sext i8 %241 to i32
  %243 = icmp eq i32 %242, 0
  br i1 %243, label %244, label %252

244:                                              ; preds = %238
  %245 = load i32, ptr %18, align 4, !tbaa !9
  %246 = mul i32 2, %245
  %247 = load i32, ptr %20, align 4, !tbaa !9
  %248 = add i32 %246, %247
  %249 = zext i32 %248 to i64
  %250 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %249
  %251 = load i32, ptr %250, align 4, !tbaa !9
  br label %255

252:                                              ; preds = %238
  %253 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 0
  %254 = load i32, ptr %253, align 4, !tbaa !9
  br label %255

255:                                              ; preds = %252, %244
  %256 = phi i32 [ %251, %244 ], [ %254, %252 ]
  %257 = load i8, ptr %27, align 1, !tbaa !18
  %258 = sext i8 %257 to i32
  %259 = icmp eq i32 %258, 0
  br i1 %259, label %260, label %263

260:                                              ; preds = %255
  %261 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 0
  %262 = load i32, ptr %261, align 4, !tbaa !9
  br label %271

263:                                              ; preds = %255
  %264 = load i32, ptr %18, align 4, !tbaa !9
  %265 = mul i32 2, %264
  %266 = load i32, ptr %20, align 4, !tbaa !9
  %267 = add i32 %265, %266
  %268 = zext i32 %267 to i64
  %269 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %268
  %270 = load i32, ptr %269, align 4, !tbaa !9
  br label %271

271:                                              ; preds = %263, %260
  %272 = phi i32 [ %262, %260 ], [ %270, %263 ]
  %273 = load i32, ptr %18, align 4, !tbaa !9
  %274 = mul i32 8, %273
  %275 = load i32, ptr %19, align 4, !tbaa !9
  %276 = mul i32 2, %275
  %277 = add i32 %274, %276
  %278 = zext i32 %277 to i64
  %279 = getelementptr inbounds [24 x i32], ptr %26, i64 0, i64 %278
  %280 = load i32, ptr %279, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %239, i32 noundef %240, i32 noundef %256, i32 noundef %272, i8 noundef zeroext 0, i32 noundef %280, i32 noundef 3)
  %281 = load ptr, ptr %8, align 8, !tbaa !5
  %282 = load i32, ptr %28, align 4, !tbaa !9
  %283 = load i8, ptr %27, align 1, !tbaa !18
  %284 = sext i8 %283 to i32
  %285 = icmp eq i32 %284, 0
  br i1 %285, label %286, label %294

286:                                              ; preds = %271
  %287 = load i32, ptr %18, align 4, !tbaa !9
  %288 = mul i32 2, %287
  %289 = load i32, ptr %20, align 4, !tbaa !9
  %290 = add i32 %288, %289
  %291 = zext i32 %290 to i64
  %292 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %291
  %293 = load i32, ptr %292, align 4, !tbaa !9
  br label %297

294:                                              ; preds = %271
  %295 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 1
  %296 = load i32, ptr %295, align 4, !tbaa !9
  br label %297

297:                                              ; preds = %294, %286
  %298 = phi i32 [ %293, %286 ], [ %296, %294 ]
  %299 = load i8, ptr %27, align 1, !tbaa !18
  %300 = sext i8 %299 to i32
  %301 = icmp eq i32 %300, 0
  br i1 %301, label %302, label %305

302:                                              ; preds = %297
  %303 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 1
  %304 = load i32, ptr %303, align 4, !tbaa !9
  br label %313

305:                                              ; preds = %297
  %306 = load i32, ptr %18, align 4, !tbaa !9
  %307 = mul i32 2, %306
  %308 = load i32, ptr %20, align 4, !tbaa !9
  %309 = add i32 %307, %308
  %310 = zext i32 %309 to i64
  %311 = getelementptr inbounds [6 x i32], ptr %23, i64 0, i64 %310
  %312 = load i32, ptr %311, align 4, !tbaa !9
  br label %313

313:                                              ; preds = %305, %302
  %314 = phi i32 [ %304, %302 ], [ %312, %305 ]
  %315 = load i32, ptr %18, align 4, !tbaa !9
  %316 = mul i32 8, %315
  %317 = load i32, ptr %19, align 4, !tbaa !9
  %318 = mul i32 2, %317
  %319 = add i32 %316, %318
  %320 = add i32 %319, 1
  %321 = zext i32 %320 to i64
  %322 = getelementptr inbounds [24 x i32], ptr %26, i64 0, i64 %321
  %323 = load i32, ptr %322, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %281, i32 noundef %282, i32 noundef %298, i32 noundef %314, i8 noundef zeroext 0, i32 noundef %323, i32 noundef 3)
  br label %324

324:                                              ; preds = %313
  %325 = load i32, ptr %18, align 4, !tbaa !9
  %326 = add i32 %325, 1
  store i32 %326, ptr %18, align 4, !tbaa !9
  br label %234, !llvm.loop !27

327:                                              ; preds = %234
  br label %328

328:                                              ; preds = %327
  %329 = load i32, ptr %19, align 4, !tbaa !9
  %330 = add i32 %329, 1
  store i32 %330, ptr %19, align 4, !tbaa !9
  br label %220, !llvm.loop !28

331:                                              ; preds = %220
  %332 = load i32, ptr %12, align 4, !tbaa !9
  %333 = load ptr, ptr %11, align 8, !tbaa !5
  %334 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %333, i32 0, i32 3
  %335 = load i32, ptr %334, align 1, !tbaa !29
  %336 = icmp ne i32 %332, %335
  br i1 %336, label %337, label %356

337:                                              ; preds = %331
  %338 = load ptr, ptr %8, align 8, !tbaa !5
  %339 = load ptr, ptr %9, align 8, !tbaa !5
  %340 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %339, i32 0, i32 1
  %341 = load i32, ptr %340, align 4, !tbaa !26
  %342 = load ptr, ptr %9, align 8, !tbaa !5
  %343 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %342, i32 0, i32 22
  %344 = load i32, ptr %343, align 4, !tbaa !24
  %345 = load ptr, ptr %9, align 8, !tbaa !5
  %346 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %345, i32 0, i32 1
  %347 = load i32, ptr %346, align 4, !tbaa !26
  %348 = load ptr, ptr %11, align 8, !tbaa !5
  %349 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %348, i32 0, i32 3
  %350 = load i32, ptr %349, align 1, !tbaa !29
  %351 = zext i32 %350 to i64
  %352 = load i32, ptr %12, align 4, !tbaa !9
  %353 = zext i32 %352 to i64
  %354 = sub nsw i64 %351, %353
  %355 = mul nsw i64 %354, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %338, i32 noundef 4096, i32 noundef %341, i32 noundef %344, i32 noundef %347, i64 noundef %355)
  br label %356

356:                                              ; preds = %337, %331
  br label %357

357:                                              ; preds = %356
  %358 = load i32, ptr %20, align 4, !tbaa !9
  %359 = add i32 %358, 1
  store i32 %359, ptr %20, align 4, !tbaa !9
  br label %215, !llvm.loop !30

360:                                              ; preds = %215
  store i32 0, ptr %29, align 4
  br label %361

361:                                              ; preds = %360, %116
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 96, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  %362 = load i32, ptr %29, align 4
  switch i32 %362, label %364 [
    i32 0, label %363
    i32 1, label %363
  ]

363:                                              ; preds = %361, %361
  ret void

364:                                              ; preds = %361
  unreachable
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !13, i64 33, !13, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!13 = !{!"long long", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !10, i64 12}
!16 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !17, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!17 = !{!"libxsmm_tile_config", !7, i64 0, !14, i64 2, !7, i64 4, !14, i64 6, !7, i64 8, !14, i64 10, !7, i64 12, !14, i64 14, !7, i64 16, !14, i64 18, !7, i64 20, !14, i64 22, !7, i64 24, !14, i64 26, !7, i64 28, !14, i64 30, !7, i64 32}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!12, !10, i64 24}
!22 = !{!23, !10, i64 12}
!23 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!24 = !{!23, !10, i64 88}
!25 = distinct !{!25, !20}
!26 = !{!23, !10, i64 4}
!27 = distinct !{!27, !20}
!28 = distinct !{!28, !20}
!29 = !{!12, !10, i64 12}
!30 = distinct !{!30, !20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_zip = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_a = external hidden unnamed_addr constant [2 x i32], align 4
@__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c = external hidden unnamed_addr constant [24 x i32], align 16
@__func__.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla = external hidden unnamed_addr constant [54 x i8], align 1
@.str = external hidden unnamed_addr constant [78 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #2 {
  %8 = alloca [6 x i32], align 16
  %9 = getelementptr inbounds i8, ptr %3, i64 16
  %10 = load i32, ptr %9, align 1, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %2, i64 12
  %12 = load i32, ptr %11, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %8) #3
  %.sroa.010.0.copyload = load i32, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_zip, align 4
  %.sroa.613.0.copyload = load i32, ptr getelementptr inbounds (i8, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_zip, i64 4), align 4
  %.sroa.0.0.copyload = load i32, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_a, align 4
  %.sroa.6.0.copyload = load i32, ptr getelementptr inbounds (i8, ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_a, i64 4), align 4
  store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, ptr %8, align 16, !tbaa !16
  %13 = getelementptr inbounds i8, ptr %8, i64 16
  store i32 4, ptr %13, align 16, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %8, i64 20
  store i32 5, ptr %14, align 4, !tbaa !16
  %15 = mul i32 %12, %10
  %16 = lshr i32 %4, 2
  %17 = lshr i32 %5, 1
  %18 = getelementptr inbounds i8, ptr %3, i64 29
  %19 = tail call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef nonnull %18) #3
  %20 = icmp eq i32 %19, 2
  br i1 %20, label %34, label %21

21:                                               ; preds = %7
  %22 = tail call i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef nonnull %18) #3
  %23 = icmp eq i32 %22, 12
  br i1 %23, label %24, label %29

24:                                               ; preds = %21
  %25 = getelementptr inbounds i8, ptr %3, i64 24
  %26 = load i32, ptr %25, align 1, !tbaa !17
  %.fr142 = freeze i32 %26
  %27 = and i32 %.fr142, 768
  switch i32 %27, label %28 [
    i32 768, label %34
    i32 512, label %.fold.split
  ]

28:                                               ; preds = %24
  %or.cond112 = icmp ne i32 %27, 256
  %spec.select113 = select i1 %or.cond112, i32 1317053459, i32 1317055507
  br label %34

29:                                               ; preds = %21
  %30 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !16
  %31 = icmp ugt i32 %30, 1
  %32 = load i32, ptr @libxsmm_verbosity, align 4
  %33 = select i1 %31, i32 %32, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90033, ptr noundef nonnull @__func__.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla, ptr noundef nonnull @.str, i32 noundef 537, i32 noundef %33) #3
  br label %.loopexit

.fold.split:                                      ; preds = %24
  br label %34

34:                                               ; preds = %24, %.fold.split, %28, %7
  %.fr = phi i1 [ true, %7 ], [ true, %24 ], [ %or.cond112, %28 ], [ true, %.fold.split ]
  %.0 = phi i32 [ 1849748499, %7 ], [ 1853924371, %24 ], [ %spec.select113, %28 ], [ 1317055507, %.fold.split ]
  %.not = icmp ult i32 %5, 2
  br i1 %.not, label %.preheader115.thread, label %.lr.ph

.lr.ph:                                           ; preds = %34
  %35 = getelementptr inbounds i8, ptr %1, i64 12
  %36 = getelementptr inbounds i8, ptr %1, i64 88
  %37 = zext i32 %15 to i64
  %38 = and i32 %5, -2
  %39 = zext i32 %38 to i64
  %40 = add nsw i64 %39, -2
  %41 = mul i64 %40, %37
  %42 = add nsw i64 %37, -16
  %43 = add i64 %42, %41
  %44 = zext nneg i32 %17 to i64
  br label %164

.preheader115:                                    ; preds = %173
  %.not139 = icmp ult i32 %4, 4
  %45 = getelementptr inbounds i8, ptr %1, i64 4
  %46 = getelementptr inbounds i8, ptr %3, i64 12
  %47 = getelementptr inbounds i8, ptr %1, i64 88
  %48 = zext i32 %4 to i64
  br i1 %.not139, label %.preheader115.split, label %.preheader115.split.us

.preheader115.thread:                             ; preds = %34
  %.not139165 = icmp ult i32 %4, 4
  %49 = getelementptr inbounds i8, ptr %1, i64 4
  %50 = getelementptr inbounds i8, ptr %3, i64 12
  %51 = getelementptr inbounds i8, ptr %1, i64 88
  %52 = zext i32 %4 to i64
  br i1 %.not139165, label %.preheader115.split, label %.preheader.us.preheader

.preheader115.split.us:                           ; preds = %.preheader115
  br i1 %.not, label %.preheader.us.preheader, label %.preheader.us.us.preheader

.preheader.us.us.preheader:                       ; preds = %.preheader115.split.us
  %wide.trip.count158 = zext nneg i32 %17 to i64
  br i1 %.fr, label %.lr.ph119.us.us.us.us, label %.lr.ph119.us.us132.us

.preheader.us.preheader:                          ; preds = %.preheader115.thread, %.preheader115.split.us
  %53 = phi ptr [ %45, %.preheader115.split.us ], [ %49, %.preheader115.thread ]
  %54 = phi ptr [ %46, %.preheader115.split.us ], [ %50, %.preheader115.thread ]
  %55 = phi ptr [ %47, %.preheader115.split.us ], [ %51, %.preheader115.thread ]
  %56 = phi i64 [ %48, %.preheader115.split.us ], [ %52, %.preheader115.thread ]
  br label %154

57:                                               ; preds = %._crit_edge122.split.us.us.us
  %58 = load i32, ptr %45, align 4, !tbaa !18
  %59 = load i32, ptr %47, align 4, !tbaa !20
  %60 = zext i32 %122 to i64
  %61 = sub nsw i64 %60, %48
  %62 = shl nsw i64 %61, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %58, i32 noundef %59, i32 noundef %58, i64 noundef %62) #3
  br label %.preheader.us.us.1

.preheader.us.us.1:                               ; preds = %._crit_edge122.split.us.us.us, %57
  %wide.trip.count158.1 = zext nneg i32 %17 to i64
  br i1 %.fr, label %.lr.ph119.us.us.us.us.1, label %.lr.ph119.us.us132.us.1

.lr.ph119.us.us132.us.1:                          ; preds = %.preheader.us.us.1, %._crit_edge.split.us124.us.us.1
  %.099120.us.us133.us.1 = phi i32 [ %80, %._crit_edge.split.us124.us.us.1 ], [ 0, %.preheader.us.us.1 ]
  %63 = load i32, ptr %45, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %63, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %64 = shl nuw nsw i32 %.099120.us.us133.us.1, 1
  br label %65

65:                                               ; preds = %65, %.lr.ph119.us.us132.us.1
  %indvars.iv149.1 = phi i64 [ %indvars.iv.next150.1, %65 ], [ 0, %.lr.ph119.us.us132.us.1 ]
  %66 = shl nuw i64 %indvars.iv149.1, 1
  %67 = or disjoint i64 %66, 1
  %68 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %67
  %69 = load i32, ptr %68, align 4, !tbaa !16
  %70 = trunc nuw nsw i64 %indvars.iv149.1 to i32
  %71 = shl i32 %70, 3
  %72 = add i32 %71, %64
  %73 = zext i32 %72 to i64
  %74 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %73
  %75 = load i32, ptr %74, align 8, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %.sroa.0.0.copyload, i32 noundef %69, i8 noundef zeroext 0, i32 noundef %75, i32 noundef 3) #3
  %76 = or disjoint i32 %72, 1
  %77 = zext i32 %76 to i64
  %78 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %77
  %79 = load i32, ptr %78, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %.sroa.6.0.copyload, i32 noundef %69, i8 noundef zeroext 0, i32 noundef %79, i32 noundef 3) #3
  %indvars.iv.next150.1 = add nuw nsw i64 %indvars.iv149.1, 1
  %exitcond153.1.not = icmp eq i64 %indvars.iv.next150.1, %wide.trip.count158.1
  br i1 %exitcond153.1.not, label %._crit_edge.split.us124.us.us.1, label %65, !llvm.loop !21

._crit_edge.split.us124.us.us.1:                  ; preds = %65
  %80 = add nuw nsw i32 %.099120.us.us133.us.1, 1
  %exitcond154.1.not = icmp eq i32 %80, %16
  br i1 %exitcond154.1.not, label %._crit_edge122.split.us.us.us.1, label %.lr.ph119.us.us132.us.1, !llvm.loop !23

.lr.ph119.us.us.us.us.1:                          ; preds = %.preheader.us.us.1, %._crit_edge.split.us.us.us.us.us.1
  %.099120.us.us.us.us.1 = phi i32 [ %97, %._crit_edge.split.us.us.us.us.us.1 ], [ 0, %.preheader.us.us.1 ]
  %81 = load i32, ptr %45, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %81, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %82 = shl nuw nsw i32 %.099120.us.us.us.us.1, 1
  br label %.thread.us.us.us.us.us.1

.thread.us.us.us.us.us.1:                         ; preds = %.thread.us.us.us.us.us.1, %.lr.ph119.us.us.us.us.1
  %indvars.iv155.1 = phi i64 [ %indvars.iv.next156.1, %.thread.us.us.us.us.us.1 ], [ 0, %.lr.ph119.us.us.us.us.1 ]
  %83 = shl nuw i64 %indvars.iv155.1, 1
  %84 = or disjoint i64 %83, 1
  %85 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %84
  %86 = load i32, ptr %85, align 4, !tbaa !16
  %87 = trunc nuw nsw i64 %indvars.iv155.1 to i32
  %88 = shl i32 %87, 3
  %89 = add i32 %88, %82
  %90 = zext i32 %89 to i64
  %91 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %90
  %92 = load i32, ptr %91, align 8, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %86, i32 noundef %.sroa.0.0.copyload, i8 noundef zeroext 0, i32 noundef %92, i32 noundef 3) #3
  %93 = or disjoint i32 %89, 1
  %94 = zext i32 %93 to i64
  %95 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %94
  %96 = load i32, ptr %95, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %86, i32 noundef %.sroa.6.0.copyload, i8 noundef zeroext 0, i32 noundef %96, i32 noundef 3) #3
  %indvars.iv.next156.1 = add nuw nsw i64 %indvars.iv155.1, 1
  %exitcond159.1.not = icmp eq i64 %indvars.iv.next156.1, %wide.trip.count158.1
  br i1 %exitcond159.1.not, label %._crit_edge.split.us.us.us.us.us.1, label %.thread.us.us.us.us.us.1, !llvm.loop !21

._crit_edge.split.us.us.us.us.us.1:               ; preds = %.thread.us.us.us.us.us.1
  %97 = add nuw nsw i32 %.099120.us.us.us.us.1, 1
  %exitcond160.1.not = icmp eq i32 %97, %16
  br i1 %exitcond160.1.not, label %._crit_edge122.split.us.us.us.1, label %.lr.ph119.us.us.us.us.1, !llvm.loop !23

._crit_edge122.split.us.us.us.1:                  ; preds = %._crit_edge.split.us124.us.us.1, %._crit_edge.split.us.us.us.us.us.1
  %98 = load i32, ptr %46, align 1, !tbaa !24
  %.not108.us.us.1 = icmp eq i32 %98, %4
  br i1 %.not108.us.us.1, label %.loopexit, label %99

99:                                               ; preds = %._crit_edge122.split.us.us.us.1
  %100 = load i32, ptr %45, align 4, !tbaa !18
  %101 = load i32, ptr %47, align 4, !tbaa !20
  %102 = zext i32 %98 to i64
  %103 = sub nsw i64 %102, %48
  %104 = shl nsw i64 %103, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %100, i32 noundef %101, i32 noundef %100, i64 noundef %104) #3
  br label %.loopexit

.lr.ph119.us.us132.us:                            ; preds = %.preheader.us.us.preheader, %._crit_edge.split.us124.us.us
  %.099120.us.us133.us = phi i32 [ %121, %._crit_edge.split.us124.us.us ], [ 0, %.preheader.us.us.preheader ]
  %105 = load i32, ptr %45, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %105, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %106 = shl nuw nsw i32 %.099120.us.us133.us, 1
  br label %107

107:                                              ; preds = %107, %.lr.ph119.us.us132.us
  %indvars.iv149 = phi i64 [ %indvars.iv.next150, %107 ], [ 0, %.lr.ph119.us.us132.us ]
  %108 = shl nuw i64 %indvars.iv149, 1
  %109 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %108
  %110 = load i32, ptr %109, align 8, !tbaa !16
  %111 = trunc nuw nsw i64 %indvars.iv149 to i32
  %112 = shl i32 %111, 3
  %113 = add i32 %112, %106
  %114 = zext i32 %113 to i64
  %115 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %114
  %116 = load i32, ptr %115, align 8, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %.sroa.0.0.copyload, i32 noundef %110, i8 noundef zeroext 0, i32 noundef %116, i32 noundef 3) #3
  %117 = or disjoint i32 %113, 1
  %118 = zext i32 %117 to i64
  %119 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %.sroa.6.0.copyload, i32 noundef %110, i8 noundef zeroext 0, i32 noundef %120, i32 noundef 3) #3
  %indvars.iv.next150 = add nuw nsw i64 %indvars.iv149, 1
  %exitcond153.not = icmp eq i64 %indvars.iv.next150, %wide.trip.count158
  br i1 %exitcond153.not, label %._crit_edge.split.us124.us.us, label %107, !llvm.loop !21

._crit_edge.split.us124.us.us:                    ; preds = %107
  %121 = add nuw nsw i32 %.099120.us.us133.us, 1
  %exitcond154.not = icmp eq i32 %121, %16
  br i1 %exitcond154.not, label %._crit_edge122.split.us.us.us, label %.lr.ph119.us.us132.us, !llvm.loop !23

._crit_edge122.split.us.us.us:                    ; preds = %._crit_edge.split.us124.us.us, %._crit_edge.split.us.us.us.us.us
  %122 = load i32, ptr %46, align 1, !tbaa !24
  %.not108.us.us = icmp eq i32 %122, %4
  br i1 %.not108.us.us, label %.preheader.us.us.1, label %57

.lr.ph119.us.us.us.us:                            ; preds = %.preheader.us.us.preheader, %._crit_edge.split.us.us.us.us.us
  %.099120.us.us.us.us = phi i32 [ %138, %._crit_edge.split.us.us.us.us.us ], [ 0, %.preheader.us.us.preheader ]
  %123 = load i32, ptr %45, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %123, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %124 = shl nuw nsw i32 %.099120.us.us.us.us, 1
  br label %.thread.us.us.us.us.us

.thread.us.us.us.us.us:                           ; preds = %.thread.us.us.us.us.us, %.lr.ph119.us.us.us.us
  %indvars.iv155 = phi i64 [ %indvars.iv.next156, %.thread.us.us.us.us.us ], [ 0, %.lr.ph119.us.us.us.us ]
  %125 = shl nuw i64 %indvars.iv155, 1
  %126 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %125
  %127 = load i32, ptr %126, align 8, !tbaa !16
  %128 = trunc nuw nsw i64 %indvars.iv155 to i32
  %129 = shl i32 %128, 3
  %130 = add i32 %129, %124
  %131 = zext i32 %130 to i64
  %132 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %131
  %133 = load i32, ptr %132, align 8, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %127, i32 noundef %.sroa.0.0.copyload, i8 noundef zeroext 0, i32 noundef %133, i32 noundef 3) #3
  %134 = or disjoint i32 %130, 1
  %135 = zext i32 %134 to i64
  %136 = getelementptr inbounds [24 x i32], ptr @__const.libxsmm_generator_gemm_aarch64_microkernel_asimd_mmla.l_vr_c, i64 0, i64 %135
  %137 = load i32, ptr %136, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.0, i32 noundef %127, i32 noundef %.sroa.6.0.copyload, i8 noundef zeroext 0, i32 noundef %137, i32 noundef 3) #3
  %indvars.iv.next156 = add nuw nsw i64 %indvars.iv155, 1
  %exitcond159.not = icmp eq i64 %indvars.iv.next156, %wide.trip.count158
  br i1 %exitcond159.not, label %._crit_edge.split.us.us.us.us.us, label %.thread.us.us.us.us.us, !llvm.loop !21

._crit_edge.split.us.us.us.us.us:                 ; preds = %.thread.us.us.us.us.us
  %138 = add nuw nsw i32 %.099120.us.us.us.us, 1
  %exitcond160.not = icmp eq i32 %138, %16
  br i1 %exitcond160.not, label %._crit_edge122.split.us.us.us, label %.lr.ph119.us.us.us.us, !llvm.loop !23

139:                                              ; preds = %._crit_edge122.split.us130
  %140 = load i32, ptr %53, align 4, !tbaa !18
  %141 = load i32, ptr %55, align 4, !tbaa !20
  %142 = zext i32 %157 to i64
  %143 = sub nsw i64 %142, %56
  %144 = shl nsw i64 %143, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %140, i32 noundef %141, i32 noundef %140, i64 noundef %144) #3
  br label %.preheader.us.1.preheader

.preheader.us.1.preheader:                        ; preds = %139, %._crit_edge122.split.us130
  br label %.preheader.us.1

.preheader.us.1:                                  ; preds = %.preheader.us.1.preheader, %.preheader.us.1
  %.099120.us129.1 = phi i32 [ %146, %.preheader.us.1 ], [ 0, %.preheader.us.1.preheader ]
  %145 = load i32, ptr %53, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %145, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %146 = add nuw nsw i32 %.099120.us129.1, 1
  %exitcond164.1.not = icmp eq i32 %146, %16
  br i1 %exitcond164.1.not, label %._crit_edge122.split.us130.1, label %.preheader.us.1, !llvm.loop !23

._crit_edge122.split.us130.1:                     ; preds = %.preheader.us.1
  %147 = load i32, ptr %54, align 1, !tbaa !24
  %.not108.us.1 = icmp eq i32 %147, %4
  br i1 %.not108.us.1, label %.loopexit, label %148

148:                                              ; preds = %._crit_edge122.split.us130.1
  %149 = load i32, ptr %53, align 4, !tbaa !18
  %150 = load i32, ptr %55, align 4, !tbaa !20
  %151 = zext i32 %147 to i64
  %152 = sub nsw i64 %151, %56
  %153 = shl nsw i64 %152, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %149, i32 noundef %150, i32 noundef %149, i64 noundef %153) #3
  br label %.loopexit

154:                                              ; preds = %.preheader.us.preheader, %154
  %.099120.us129 = phi i32 [ 0, %.preheader.us.preheader ], [ %156, %154 ]
  %155 = load i32, ptr %53, align 4, !tbaa !18
  tail call void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef %0, i32 noundef 750780423, i32 noundef %155, i32 noundef 32, i32 noundef %.sroa.0.0.copyload, i32 noundef %.sroa.6.0.copyload, i32 noundef 1) #3
  %156 = add nuw nsw i32 %.099120.us129, 1
  %exitcond164.not = icmp eq i32 %156, %16
  br i1 %exitcond164.not, label %._crit_edge122.split.us130, label %154, !llvm.loop !23

._crit_edge122.split.us130:                       ; preds = %154
  %157 = load i32, ptr %54, align 1, !tbaa !24
  %.not108.us = icmp eq i32 %157, %4
  br i1 %.not108.us, label %.preheader.us.1.preheader, label %139

.preheader115.split:                              ; preds = %.preheader115.thread, %.preheader115
  %158 = phi i64 [ %52, %.preheader115.thread ], [ %48, %.preheader115 ]
  %159 = phi ptr [ %51, %.preheader115.thread ], [ %47, %.preheader115 ]
  %160 = phi ptr [ %50, %.preheader115.thread ], [ %46, %.preheader115 ]
  %161 = phi ptr [ %49, %.preheader115.thread ], [ %45, %.preheader115 ]
  %162 = load i32, ptr %160, align 1, !tbaa !24
  %163 = icmp eq i32 %162, %4
  br i1 %163, label %.loopexit, label %.preheader.1

164:                                              ; preds = %.lr.ph, %173
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %173 ]
  %165 = load i32, ptr %35, align 4, !tbaa !25
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %165, i32 noundef 127, i32 noundef 0, i32 noundef %.sroa.010.0.copyload, i32 noundef 1) #3
  %166 = load i32, ptr %35, align 4, !tbaa !25
  %167 = load i32, ptr %36, align 4, !tbaa !20
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %166, i32 noundef %167, i32 noundef %166, i64 noundef %37) #3
  %168 = load i32, ptr %35, align 4, !tbaa !25
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %168, i32 noundef 127, i32 noundef 0, i32 noundef %.sroa.613.0.copyload, i32 noundef 1) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not109 = icmp eq i64 %indvars.iv.next, %44
  %169 = load i32, ptr %35, align 4, !tbaa !25
  %170 = load i32, ptr %36, align 4, !tbaa !20
  br i1 %.not109, label %172, label %171

171:                                              ; preds = %164
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %169, i32 noundef %170, i32 noundef %169, i64 noundef %37) #3
  br label %173

172:                                              ; preds = %164
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %169, i32 noundef %170, i32 noundef %169, i64 noundef %43) #3
  br label %173

173:                                              ; preds = %172, %171
  %174 = shl nuw i64 %indvars.iv, 1
  %175 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %174
  %176 = load i32, ptr %175, align 8, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 234895363, i32 noundef %.sroa.010.0.copyload, i32 noundef %.sroa.613.0.copyload, i8 noundef zeroext 0, i32 noundef %176, i32 noundef 7) #3
  %177 = or disjoint i64 %174, 1
  %178 = getelementptr inbounds [6 x i32], ptr %8, i64 0, i64 %177
  %179 = load i32, ptr %178, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 234911747, i32 noundef %.sroa.010.0.copyload, i32 noundef %.sroa.613.0.copyload, i8 noundef zeroext 0, i32 noundef %179, i32 noundef 7) #3
  %exitcond.not = icmp eq i64 %indvars.iv.next, %44
  br i1 %exitcond.not, label %.preheader115, label %164, !llvm.loop !26

.preheader.1:                                     ; preds = %.preheader115.split
  %180 = load i32, ptr %161, align 4, !tbaa !18
  %181 = load i32, ptr %159, align 4, !tbaa !20
  %182 = zext i32 %162 to i64
  %183 = sub nsw i64 %182, %158
  %184 = shl nsw i64 %183, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %180, i32 noundef %181, i32 noundef %180, i64 noundef %184) #3
  %.pre = load i32, ptr %160, align 1, !tbaa !24
  %.not108.1 = icmp eq i32 %.pre, %4
  br i1 %.not108.1, label %.loopexit, label %185

185:                                              ; preds = %.preheader.1
  %186 = load i32, ptr %161, align 4, !tbaa !18
  %187 = load i32, ptr %159, align 4, !tbaa !20
  %188 = zext i32 %.pre to i64
  %189 = sub nsw i64 %188, %158
  %190 = shl nsw i64 %189, 3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %186, i32 noundef %187, i32 noundef %186, i64 noundef %190) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader.1, %185, %.preheader115.split, %._crit_edge122.split.us130.1, %148, %._crit_edge122.split.us.us.us.1, %99, %29
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %8) #3
  ret void
}

declare i32 @LIBXSMM_GEMM_GETENUM_AB_COMMON_PREC(ptr noundef) local_unnamed_addr #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_asimd_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !10, i64 33, !10, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!13, !7, i64 12}
!13 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !14, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !15, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !15, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!14 = !{!"libxsmm_tile_config", !8, i64 0, !11, i64 2, !8, i64 4, !11, i64 6, !8, i64 8, !11, i64 10, !8, i64 12, !11, i64 14, !8, i64 16, !11, i64 18, !8, i64 20, !11, i64 22, !8, i64 24, !11, i64 26, !8, i64 28, !11, i64 30, !8, i64 32}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !7, i64 24}
!18 = !{!19, !7, i64 4}
!19 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!20 = !{!19, !7, i64 88}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = distinct !{!23, !22}
!24 = !{!6, !7, i64 12}
!25 = !{!19, !7, i64 12}
!26 = distinct !{!26, !22}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SLPVectorizerPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass