; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetActivation.ll (ZN4Simd4Base26SynetPreluLayerForwardNchwEPKfS2_mmPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base26SynetPreluLayerForwardNchwEPKfS2_mmPf(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca float, align 4
  %14 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %15 = load i64, ptr %9, align 8, !tbaa !9
  %16 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %15, i64 noundef 4)
  store i64 %16, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %17

17:                                               ; preds = %104, %5
  %18 = load i64, ptr %12, align 8, !tbaa !9
  %19 = load i64, ptr %8, align 8, !tbaa !9
  %20 = icmp ult i64 %18, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %107

22:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = load i64, ptr %12, align 8, !tbaa !9
  %25 = getelementptr inbounds float, ptr %23, i64 %24
  %26 = load float, ptr %25, align 4, !tbaa !11
  store float %26, ptr %13, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !9
  br label %27

27:                                               ; preds = %76, %22
  %28 = load i64, ptr %14, align 8, !tbaa !9
  %29 = load i64, ptr %11, align 8, !tbaa !9
  %30 = icmp ult i64 %28, %29
  br i1 %30, label %31, label %79

31:                                               ; preds = %27
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i64, ptr %14, align 8, !tbaa !9
  %34 = add i64 %33, 0
  %35 = getelementptr inbounds float, ptr %32, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !11
  %37 = load float, ptr %13, align 4, !tbaa !11
  %38 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %36, float noundef %37)
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = load i64, ptr %14, align 8, !tbaa !9
  %41 = add i64 %40, 0
  %42 = getelementptr inbounds float, ptr %39, i64 %41
  store float %38, ptr %42, align 4, !tbaa !11
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = load i64, ptr %14, align 8, !tbaa !9
  %45 = add i64 %44, 1
  %46 = getelementptr inbounds float, ptr %43, i64 %45
  %47 = load float, ptr %46, align 4, !tbaa !11
  %48 = load float, ptr %13, align 4, !tbaa !11
  %49 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %47, float noundef %48)
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = load i64, ptr %14, align 8, !tbaa !9
  %52 = add i64 %51, 1
  %53 = getelementptr inbounds float, ptr %50, i64 %52
  store float %49, ptr %53, align 4, !tbaa !11
  %54 = load ptr, ptr %6, align 8, !tbaa !5
  %55 = load i64, ptr %14, align 8, !tbaa !9
  %56 = add i64 %55, 2
  %57 = getelementptr inbounds float, ptr %54, i64 %56
  %58 = load float, ptr %57, align 4, !tbaa !11
  %59 = load float, ptr %13, align 4, !tbaa !11
  %60 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %58, float noundef %59)
  %61 = load ptr, ptr %10, align 8, !tbaa !5
  %62 = load i64, ptr %14, align 8, !tbaa !9
  %63 = add i64 %62, 2
  %64 = getelementptr inbounds float, ptr %61, i64 %63
  store float %60, ptr %64, align 4, !tbaa !11
  %65 = load ptr, ptr %6, align 8, !tbaa !5
  %66 = load i64, ptr %14, align 8, !tbaa !9
  %67 = add i64 %66, 3
  %68 = getelementptr inbounds float, ptr %65, i64 %67
  %69 = load float, ptr %68, align 4, !tbaa !11
  %70 = load float, ptr %13, align 4, !tbaa !11
  %71 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %69, float noundef %70)
  %72 = load ptr, ptr %10, align 8, !tbaa !5
  %73 = load i64, ptr %14, align 8, !tbaa !9
  %74 = add i64 %73, 3
  %75 = getelementptr inbounds float, ptr %72, i64 %74
  store float %71, ptr %75, align 4, !tbaa !11
  br label %76

76:                                               ; preds = %31
  %77 = load i64, ptr %14, align 8, !tbaa !9
  %78 = add i64 %77, 4
  store i64 %78, ptr %14, align 8, !tbaa !9
  br label %27, !llvm.loop !13

79:                                               ; preds = %27
  br label %80

80:                                               ; preds = %94, %79
  %81 = load i64, ptr %14, align 8, !tbaa !9
  %82 = load i64, ptr %9, align 8, !tbaa !9
  %83 = icmp ult i64 %81, %82
  br i1 %83, label %84, label %97

84:                                               ; preds = %80
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  %86 = load i64, ptr %14, align 8, !tbaa !9
  %87 = getelementptr inbounds float, ptr %85, i64 %86
  %88 = load float, ptr %87, align 4, !tbaa !11
  %89 = load float, ptr %13, align 4, !tbaa !11
  %90 = call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %88, float noundef %89)
  %91 = load ptr, ptr %10, align 8, !tbaa !5
  %92 = load i64, ptr %14, align 8, !tbaa !9
  %93 = getelementptr inbounds float, ptr %91, i64 %92
  store float %90, ptr %93, align 4, !tbaa !11
  br label %94

94:                                               ; preds = %84
  %95 = load i64, ptr %14, align 8, !tbaa !9
  %96 = add i64 %95, 1
  store i64 %96, ptr %14, align 8, !tbaa !9
  br label %80, !llvm.loop !15

97:                                               ; preds = %80
  %98 = load i64, ptr %9, align 8, !tbaa !9
  %99 = load ptr, ptr %6, align 8, !tbaa !5
  %100 = getelementptr inbounds float, ptr %99, i64 %98
  store ptr %100, ptr %6, align 8, !tbaa !5
  %101 = load i64, ptr %9, align 8, !tbaa !9
  %102 = load ptr, ptr %10, align 8, !tbaa !5
  %103 = getelementptr inbounds float, ptr %102, i64 %101
  store ptr %103, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %104

104:                                              ; preds = %97
  %105 = load i64, ptr %12, align 8, !tbaa !9
  %106 = add i64 %105, 1
  store i64 %106, ptr %12, align 8, !tbaa !9
  br label %17, !llvm.loop !16

107:                                              ; preds = %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef, float noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base26SynetPreluLayerForwardNchwEPKfS2_mmPf(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #1 {
  %6 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %3, i64 noundef 4)
  %.not = icmp eq i64 %2, 0
  br i1 %.not, label %._crit_edge52, label %.lr.ph51

.lr.ph51:                                         ; preds = %5
  %.not60 = icmp eq i64 %6, 0
  br i1 %.not60, label %.lr.ph51.split, label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.lr.ph51, %._crit_edge.us
  %.04049.us = phi ptr [ %9, %._crit_edge.us ], [ %0, %.lr.ph51 ]
  %.04148.us = phi i64 [ %11, %._crit_edge.us ], [ 0, %.lr.ph51 ]
  %.04247.us = phi ptr [ %10, %._crit_edge.us ], [ %4, %.lr.ph51 ]
  %7 = getelementptr inbounds float, ptr %1, i64 %.04148.us
  %8 = load float, ptr %7, align 4, !tbaa !5
  br label %18

._crit_edge.us:                                   ; preds = %.lr.ph46.us, %..preheader_crit_edge.us
  %9 = getelementptr inbounds float, ptr %.04049.us, i64 %3
  %10 = getelementptr inbounds float, ptr %.04247.us, i64 %3
  %11 = add nuw i64 %.04148.us, 1
  %exitcond.not = icmp eq i64 %11, %2
  br i1 %exitcond.not, label %._crit_edge52, label %.lr.ph.us, !llvm.loop !9

.lr.ph46.us:                                      ; preds = %..preheader_crit_edge.us, %.lr.ph46.us
  %.145.us = phi i64 [ %16, %.lr.ph46.us ], [ %38, %..preheader_crit_edge.us ]
  %12 = getelementptr inbounds float, ptr %.04049.us, i64 %.145.us
  %13 = load float, ptr %12, align 4, !tbaa !5
  %14 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %13, float noundef %8)
  %15 = getelementptr inbounds float, ptr %.04247.us, i64 %.145.us
  store float %14, ptr %15, align 4, !tbaa !5
  %16 = add nuw i64 %.145.us, 1
  %17 = icmp ult i64 %16, %3
  br i1 %17, label %.lr.ph46.us, label %._crit_edge.us, !llvm.loop !11

18:                                               ; preds = %.lr.ph.us, %18
  %.044.us = phi i64 [ 0, %.lr.ph.us ], [ %38, %18 ]
  %19 = getelementptr inbounds float, ptr %.04049.us, i64 %.044.us
  %20 = load float, ptr %19, align 4, !tbaa !5
  %21 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %20, float noundef %8)
  %22 = getelementptr inbounds float, ptr %.04247.us, i64 %.044.us
  store float %21, ptr %22, align 4, !tbaa !5
  %23 = or disjoint i64 %.044.us, 1
  %24 = getelementptr inbounds float, ptr %.04049.us, i64 %23
  %25 = load float, ptr %24, align 4, !tbaa !5
  %26 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %25, float noundef %8)
  %27 = getelementptr inbounds float, ptr %.04247.us, i64 %23
  store float %26, ptr %27, align 4, !tbaa !5
  %28 = or disjoint i64 %.044.us, 2
  %29 = getelementptr inbounds float, ptr %.04049.us, i64 %28
  %30 = load float, ptr %29, align 4, !tbaa !5
  %31 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %30, float noundef %8)
  %32 = getelementptr inbounds float, ptr %.04247.us, i64 %28
  store float %31, ptr %32, align 4, !tbaa !5
  %33 = or disjoint i64 %.044.us, 3
  %34 = getelementptr inbounds float, ptr %.04049.us, i64 %33
  %35 = load float, ptr %34, align 4, !tbaa !5
  %36 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %35, float noundef %8)
  %37 = getelementptr inbounds float, ptr %.04247.us, i64 %33
  store float %36, ptr %37, align 4, !tbaa !5
  %38 = add i64 %.044.us, 4
  %39 = icmp ult i64 %38, %6
  br i1 %39, label %18, label %..preheader_crit_edge.us, !llvm.loop !12

..preheader_crit_edge.us:                         ; preds = %18
  %40 = icmp ult i64 %38, %3
  br i1 %40, label %.lr.ph46.us, label %._crit_edge.us

.lr.ph51.split:                                   ; preds = %.lr.ph51
  %.not61 = icmp eq i64 %3, 0
  br i1 %.not61, label %._crit_edge52, label %.preheader.us53

.preheader.us53:                                  ; preds = %.lr.ph51.split, %._crit_edge.us59
  %.04049.us54 = phi ptr [ %49, %._crit_edge.us59 ], [ %0, %.lr.ph51.split ]
  %.04148.us55 = phi i64 [ %51, %._crit_edge.us59 ], [ 0, %.lr.ph51.split ]
  %.04247.us56 = phi ptr [ %50, %._crit_edge.us59 ], [ %4, %.lr.ph51.split ]
  %41 = getelementptr inbounds float, ptr %1, i64 %.04148.us55
  %42 = load float, ptr %41, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %.preheader.us53, %43
  %.145.us57 = phi i64 [ 0, %.preheader.us53 ], [ %48, %43 ]
  %44 = getelementptr inbounds float, ptr %.04049.us54, i64 %.145.us57
  %45 = load float, ptr %44, align 4, !tbaa !5
  %46 = tail call noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef %45, float noundef %42)
  %47 = getelementptr inbounds float, ptr %.04247.us56, i64 %.145.us57
  store float %46, ptr %47, align 4, !tbaa !5
  %48 = add nuw i64 %.145.us57, 1
  %exitcond64.not = icmp eq i64 %48, %3
  br i1 %exitcond64.not, label %._crit_edge.us59, label %43, !llvm.loop !11

._crit_edge.us59:                                 ; preds = %43
  %49 = getelementptr inbounds float, ptr %.04049.us54, i64 %3
  %50 = getelementptr inbounds float, ptr %.04247.us56, i64 %3
  %51 = add nuw i64 %.04148.us55, 1
  %exitcond65.not = icmp eq i64 %51, %2
  br i1 %exitcond65.not, label %._crit_edge52, label %.preheader.us53, !llvm.loop !9

._crit_edge52:                                    ; preds = %._crit_edge.us, %._crit_edge.us59, %.lr.ph51.split, %5
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base12SynetRelu32fEff(float noundef, float noundef) local_unnamed_addr #0

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass