; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseHog.ll (ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::(anonymous namespace)::Buffer" = type { i32, ptr, ptr, ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [63 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [73 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf = external hidden unnamed_addr constant [114 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base18AddRowToHistogramsEPiPfmmmmmmS2_(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7) #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca %"struct.Simd::Base::(anonymous namespace)::Buffer", align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca i64, align 8
  %24 = alloca float, align 4
  %25 = alloca float, align 4
  %26 = alloca float, align 4
  %27 = alloca ptr, align 8
  %28 = alloca i32, align 4
  %29 = alloca float, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca float, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store i64 %4, ptr %13, align 8, !tbaa !9
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  store ptr %7, ptr %16, align 8, !tbaa !5
  %33 = load i64, ptr %11, align 8, !tbaa !9
  %34 = load i64, ptr %13, align 8, !tbaa !9
  %35 = urem i64 %33, %34
  %36 = icmp eq i64 %35, 0
  br i1 %36, label %37, label %46

37:                                               ; preds = %8
  %38 = load i64, ptr %12, align 8, !tbaa !9
  %39 = load i64, ptr %14, align 8, !tbaa !9
  %40 = urem i64 %38, %39
  %41 = icmp eq i64 %40, 0
  br i1 %41, label %42, label %46

42:                                               ; preds = %37
  %43 = load i64, ptr %15, align 8, !tbaa !9
  %44 = urem i64 %43, 2
  %45 = icmp eq i64 %44, 0
  br label %46

46:                                               ; preds = %42, %37, %8
  %47 = phi i1 [ false, %37 ], [ false, %8 ], [ %45, %42 ]
  br i1 %47, label %48, label %49

48:                                               ; preds = %46
  br label %51

49:                                               ; preds = %46
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 169, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf) #7
  unreachable

50:                                               ; No predecessors!
  br label %51

51:                                               ; preds = %50, %48
  call void @llvm.lifetime.start.p0(i64 48, ptr %17) #8
  %52 = load i64, ptr %11, align 8, !tbaa !9
  %53 = load i64, ptr %15, align 8, !tbaa !9
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Emm(ptr noundef nonnull align 8 dereferenceable(48) %17, i64 noundef %52, i64 noundef %53)
  %54 = load ptr, ptr %16, align 8, !tbaa !5
  %55 = load i64, ptr %15, align 8, !tbaa !9
  %56 = load i64, ptr %11, align 8, !tbaa !9
  %57 = load i64, ptr %13, align 8, !tbaa !9
  %58 = udiv i64 %56, %57
  %59 = mul i64 %55, %58
  %60 = load i64, ptr %12, align 8, !tbaa !9
  %61 = load i64, ptr %14, align 8, !tbaa !9
  %62 = udiv i64 %60, %61
  %63 = mul i64 %59, %62
  %64 = mul i64 %63, 4
  call void @llvm.memset.p0.i64(ptr align 4 %54, i8 0, i64 %64, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #8
  store i64 1, ptr %18, align 8, !tbaa !9
  br label %65

65:                                               ; preds = %202, %51
  %66 = load i64, ptr %18, align 8, !tbaa !9
  %67 = load i64, ptr %12, align 8, !tbaa !9
  %68 = sub i64 %67, 1
  %69 = icmp ult i64 %66, %68
  br i1 %69, label %71, label %70

70:                                               ; preds = %65
  store i32 2, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #8
  br label %210

71:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #8
  %72 = load ptr, ptr %9, align 8, !tbaa !5
  %73 = load i64, ptr %10, align 8, !tbaa !9
  %74 = load i64, ptr %18, align 8, !tbaa !9
  %75 = mul i64 %73, %74
  %76 = getelementptr inbounds i8, ptr %72, i64 %75
  store ptr %76, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #8
  %77 = load ptr, ptr %20, align 8, !tbaa !5
  %78 = load i64, ptr %10, align 8, !tbaa !9
  %79 = sub i64 0, %78
  %80 = getelementptr inbounds i8, ptr %77, i64 %79
  store ptr %80, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #8
  %81 = load ptr, ptr %20, align 8, !tbaa !5
  %82 = load i64, ptr %10, align 8, !tbaa !9
  %83 = getelementptr inbounds i8, ptr %81, i64 %82
  store ptr %83, ptr %22, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #8
  store i64 1, ptr %23, align 8, !tbaa !9
  br label %84

84:                                               ; preds = %186, %71
  %85 = load i64, ptr %23, align 8, !tbaa !9
  %86 = load i64, ptr %11, align 8, !tbaa !9
  %87 = sub i64 %86, 1
  %88 = icmp ult i64 %85, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %84
  store i32 5, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  br label %189

90:                                               ; preds = %84
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #8
  %91 = load ptr, ptr %22, align 8, !tbaa !5
  %92 = load i64, ptr %23, align 8, !tbaa !9
  %93 = getelementptr inbounds i8, ptr %91, i64 %92
  %94 = load i8, ptr %93, align 1, !tbaa !11
  %95 = zext i8 %94 to i32
  %96 = load ptr, ptr %21, align 8, !tbaa !5
  %97 = load i64, ptr %23, align 8, !tbaa !9
  %98 = getelementptr inbounds i8, ptr %96, i64 %97
  %99 = load i8, ptr %98, align 1, !tbaa !11
  %100 = zext i8 %99 to i32
  %101 = sub nsw i32 %95, %100
  %102 = sitofp i32 %101 to float
  store float %102, ptr %24, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #8
  %103 = load ptr, ptr %20, align 8, !tbaa !5
  %104 = load i64, ptr %23, align 8, !tbaa !9
  %105 = add i64 %104, 1
  %106 = getelementptr inbounds i8, ptr %103, i64 %105
  %107 = load i8, ptr %106, align 1, !tbaa !11
  %108 = zext i8 %107 to i32
  %109 = load ptr, ptr %20, align 8, !tbaa !5
  %110 = load i64, ptr %23, align 8, !tbaa !9
  %111 = sub i64 %110, 1
  %112 = getelementptr inbounds i8, ptr %109, i64 %111
  %113 = load i8, ptr %112, align 1, !tbaa !11
  %114 = zext i8 %113 to i32
  %115 = sub nsw i32 %108, %114
  %116 = sitofp i32 %115 to float
  store float %116, ptr %25, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #8
  %117 = load float, ptr %25, align 4, !tbaa !12
  %118 = load float, ptr %25, align 4, !tbaa !12
  %119 = load float, ptr %24, align 4, !tbaa !12
  %120 = load float, ptr %24, align 4, !tbaa !12
  %121 = fmul float %119, %120
  %122 = call float @llvm.fmuladd.f32(float %117, float %118, float %121)
  %123 = invoke noundef float @_ZSt4sqrtf(float noundef %122)
          to label %124 unwind label %131

124:                                              ; preds = %90
  store float %123, ptr %26, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #8
  store float 0.000000e+00, ptr %29, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #8
  store i32 0, ptr %30, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #8
  store i32 0, ptr %31, align 4, !tbaa !14
  br label %125

125:                                              ; preds = %172, %124
  %126 = load i32, ptr %31, align 4, !tbaa !14
  %127 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 0
  %128 = load i32, ptr %127, align 8, !tbaa !16
  %129 = icmp slt i32 %126, %128
  br i1 %129, label %135, label %130

130:                                              ; preds = %125
  store i32 8, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #8
  br label %175

131:                                              ; preds = %90
  %132 = landingpad { ptr, i32 }
          cleanup
  %133 = extractvalue { ptr, i32 } %132, 0
  store ptr %133, ptr %27, align 8
  %134 = extractvalue { ptr, i32 } %132, 1
  store i32 %134, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  br label %209

135:                                              ; preds = %125
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #8
  %136 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 1
  %137 = load ptr, ptr %136, align 8, !tbaa !18
  %138 = load i32, ptr %31, align 4, !tbaa !14
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds float, ptr %137, i64 %139
  %141 = load float, ptr %140, align 4, !tbaa !12
  %142 = load float, ptr %25, align 4, !tbaa !12
  %143 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 2
  %144 = load ptr, ptr %143, align 8, !tbaa !19
  %145 = load i32, ptr %31, align 4, !tbaa !14
  %146 = sext i32 %145 to i64
  %147 = getelementptr inbounds float, ptr %144, i64 %146
  %148 = load float, ptr %147, align 4, !tbaa !12
  %149 = load float, ptr %24, align 4, !tbaa !12
  %150 = fmul float %148, %149
  %151 = call float @llvm.fmuladd.f32(float %141, float %142, float %150)
  store float %151, ptr %32, align 4, !tbaa !12
  %152 = load float, ptr %32, align 4, !tbaa !12
  %153 = load float, ptr %29, align 4, !tbaa !12
  %154 = fcmp ogt float %152, %153
  br i1 %154, label %155, label %158

155:                                              ; preds = %135
  %156 = load float, ptr %32, align 4, !tbaa !12
  store float %156, ptr %29, align 4, !tbaa !12
  %157 = load i32, ptr %31, align 4, !tbaa !14
  store i32 %157, ptr %30, align 4, !tbaa !14
  br label %171

158:                                              ; preds = %135
  %159 = load float, ptr %32, align 4, !tbaa !12
  %160 = fneg float %159
  %161 = load float, ptr %29, align 4, !tbaa !12
  %162 = fcmp ogt float %160, %161
  br i1 %162, label %163, label %170

163:                                              ; preds = %158
  %164 = load float, ptr %32, align 4, !tbaa !12
  %165 = fneg float %164
  store float %165, ptr %29, align 4, !tbaa !12
  %166 = load i32, ptr %31, align 4, !tbaa !14
  %167 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 0
  %168 = load i32, ptr %167, align 8, !tbaa !16
  %169 = add nsw i32 %166, %168
  store i32 %169, ptr %30, align 4, !tbaa !14
  br label %170

170:                                              ; preds = %163, %158
  br label %171

171:                                              ; preds = %170, %155
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #8
  br label %172

172:                                              ; preds = %171
  %173 = load i32, ptr %31, align 4, !tbaa !14
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %31, align 4, !tbaa !14
  br label %125, !llvm.loop !20

175:                                              ; preds = %130
  %176 = load float, ptr %26, align 4, !tbaa !12
  %177 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 4
  %178 = load ptr, ptr %177, align 8, !tbaa !22
  %179 = load i64, ptr %23, align 8, !tbaa !9
  %180 = getelementptr inbounds float, ptr %178, i64 %179
  store float %176, ptr %180, align 4, !tbaa !12
  %181 = load i32, ptr %30, align 4, !tbaa !14
  %182 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 3
  %183 = load ptr, ptr %182, align 8, !tbaa !23
  %184 = load i64, ptr %23, align 8, !tbaa !9
  %185 = getelementptr inbounds i32, ptr %183, i64 %184
  store i32 %181, ptr %185, align 4, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  br label %186

186:                                              ; preds = %175
  %187 = load i64, ptr %23, align 8, !tbaa !9
  %188 = add i64 %187, 1
  store i64 %188, ptr %23, align 8, !tbaa !9
  br label %84, !llvm.loop !24

189:                                              ; preds = %89
  %190 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 3
  %191 = load ptr, ptr %190, align 8, !tbaa !23
  %192 = getelementptr inbounds %"struct.Simd::Base::(anonymous namespace)::Buffer", ptr %17, i32 0, i32 4
  %193 = load ptr, ptr %192, align 8, !tbaa !22
  %194 = load i64, ptr %18, align 8, !tbaa !9
  %195 = load i64, ptr %11, align 8, !tbaa !9
  %196 = load i64, ptr %12, align 8, !tbaa !9
  %197 = load i64, ptr %13, align 8, !tbaa !9
  %198 = load i64, ptr %14, align 8, !tbaa !9
  %199 = load i64, ptr %15, align 8, !tbaa !9
  %200 = load ptr, ptr %16, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base18AddRowToHistogramsEPiPfmmmmmmS2_(ptr noundef %191, ptr noundef %193, i64 noundef %194, i64 noundef %195, i64 noundef %196, i64 noundef %197, i64 noundef %198, i64 noundef %199, ptr noundef %200)
          to label %201 unwind label %205

201:                                              ; preds = %189
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  br label %202

202:                                              ; preds = %201
  %203 = load i64, ptr %18, align 8, !tbaa !9
  %204 = add i64 %203, 1
  store i64 %204, ptr %18, align 8, !tbaa !9
  br label %65, !llvm.loop !25

205:                                              ; preds = %189
  %206 = landingpad { ptr, i32 }
          cleanup
  %207 = extractvalue { ptr, i32 } %206, 0
  store ptr %207, ptr %27, align 8
  %208 = extractvalue { ptr, i32 } %206, 1
  store i32 %208, ptr %28, align 4
  br label %209

209:                                              ; preds = %205, %131
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #8
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %17) #8
  call void @llvm.lifetime.end.p0(i64 48, ptr %17) #8
  br label %211

210:                                              ; preds = %70
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %17) #8
  call void @llvm.lifetime.end.p0(i64 48, ptr %17) #8
  ret void

211:                                              ; preds = %209
  %212 = load ptr, ptr %27, align 8
  %213 = load i32, ptr %28, align 4
  %214 = insertvalue { ptr, i32 } poison, ptr %212, 0
  %215 = insertvalue { ptr, i32 } %214, i32 %213, 1
  resume { ptr, i32 } %215
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Emm(ptr noundef nonnull align 8 dereferenceable(48), i64 noundef, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4sqrtf(float noundef) #5

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"_ZTSN4Simd4Base12_GLOBAL__N_16BufferE", !15, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!18 = !{!17, !6, i64 8}
!19 = !{!17, !6, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!17, !6, i64 32}
!23 = !{!17, !6, i64 24}
!24 = distinct !{!24, !21}
!25 = distinct !{!25, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::(anonymous namespace)::Buffer" = type { i32, ptr, ptr, ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [63 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [73 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf = external hidden unnamed_addr constant [114 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base18AddRowToHistogramsEPiPfmmmmmmS2_(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca %"struct.Simd::Base::(anonymous namespace)::Buffer", align 8
  %10 = urem i64 %2, %4
  %11 = udiv i64 %2, %4
  %12 = icmp eq i64 %10, 0
  br i1 %12, label %13, label %.critedge

13:                                               ; preds = %8
  %14 = urem i64 %3, %5
  %15 = udiv i64 %3, %5
  %16 = and i64 %6, 1
  %17 = or i64 %14, %16
  %or.cond = icmp eq i64 %17, 0
  br i1 %or.cond, label %18, label %.critedge

.critedge:                                        ; preds = %13, %8
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 169, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base22HogDirectionHistogramsEPKhmmmmmmPf) #7
  unreachable

18:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %9) #8
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Emm(ptr noundef nonnull align 8 dereferenceable(48) %9, i64 noundef %2, i64 noundef %6)
  %19 = shl i64 %6, 2
  %20 = mul i64 %19, %11
  %21 = mul i64 %20, %15
  call void @llvm.memset.p0.i64(ptr align 4 %7, i8 0, i64 %21, i1 false)
  %22 = add i64 %3, -1
  %23 = icmp ugt i64 %22, 1
  br i1 %23, label %.lr.ph83, label %._crit_edge84

.lr.ph83:                                         ; preds = %18
  %24 = sub i64 0, %1
  %25 = add i64 %2, -1
  %26 = icmp ugt i64 %25, 1
  %27 = getelementptr inbounds i8, ptr %9, i64 8
  %28 = getelementptr inbounds i8, ptr %9, i64 16
  %29 = getelementptr inbounds i8, ptr %9, i64 32
  %30 = getelementptr inbounds i8, ptr %9, i64 24
  br i1 %26, label %.lr.ph79.us, label %.lr.ph83.split

.lr.ph79.us:                                      ; preds = %.lr.ph83, %35
  %.081.us = phi i64 [ %36, %35 ], [ 1, %.lr.ph83 ]
  %31 = mul i64 %.081.us, %1
  %32 = getelementptr inbounds i8, ptr %0, i64 %31
  %33 = getelementptr inbounds i8, ptr %32, i64 %24
  %34 = getelementptr inbounds i8, ptr %32, i64 %1
  %invariant.gep.us = getelementptr i8, ptr %32, i64 -1
  br label %37

35:                                               ; preds = %._crit_edge80.us
  %36 = add nuw i64 %.081.us, 1
  %exitcond89.not = icmp eq i64 %36, %22
  br i1 %exitcond89.not, label %._crit_edge84, label %.lr.ph79.us, !llvm.loop !5

37:                                               ; preds = %.lr.ph79.us, %._crit_edge.us
  %.06877.us = phi i64 [ 1, %.lr.ph79.us ], [ %46, %._crit_edge.us ]
  %38 = getelementptr inbounds i8, ptr %34, i64 %.06877.us
  %39 = load i8, ptr %38, align 1, !tbaa !7
  %40 = zext i8 %39 to i32
  %41 = getelementptr inbounds i8, ptr %33, i64 %.06877.us
  %42 = load i8, ptr %41, align 1, !tbaa !7
  %43 = zext i8 %42 to i32
  %44 = sub nsw i32 %40, %43
  %45 = sitofp i32 %44 to float
  %46 = add nuw i64 %.06877.us, 1
  %47 = getelementptr inbounds i8, ptr %32, i64 %46
  %48 = load i8, ptr %47, align 1, !tbaa !7
  %49 = zext i8 %48 to i32
  %gep.us = getelementptr i8, ptr %invariant.gep.us, i64 %.06877.us
  %50 = load i8, ptr %gep.us, align 1, !tbaa !7
  %51 = zext i8 %50 to i32
  %52 = sub nsw i32 %49, %51
  %53 = sitofp i32 %52 to float
  %54 = fmul float %45, %45
  %55 = call float @llvm.fmuladd.f32(float %53, float %53, float %54)
  %56 = call noundef float @_ZSt4sqrtf(float noundef %55)
  %57 = load i32, ptr %9, align 8, !tbaa !10
  %58 = icmp sgt i32 %57, 0
  br i1 %58, label %.lr.ph.us, label %._crit_edge.us

._crit_edge.us.loopexit.unr-lcssa:                ; preds = %101, %.lr.ph.us
  %.1.us.lcssa.ph = phi i32 [ poison, %.lr.ph.us ], [ %.1.us.1, %101 ]
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next.1, %101 ]
  %.06575.us.unr = phi i32 [ 0, %.lr.ph.us ], [ %.1.us.1, %101 ]
  %.06674.us.unr = phi float [ 0.000000e+00, %.lr.ph.us ], [ %.167.us.1, %101 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge.us, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.us.loopexit.unr-lcssa
  %indvars86.epil = trunc i64 %indvars.iv.unr to i32
  %59 = getelementptr inbounds float, ptr %102, i64 %indvars.iv.unr
  %60 = load float, ptr %59, align 4, !tbaa !14
  %61 = getelementptr inbounds float, ptr %103, i64 %indvars.iv.unr
  %62 = load float, ptr %61, align 4, !tbaa !14
  %63 = fmul float %62, %45
  %64 = call float @llvm.fmuladd.f32(float %60, float %53, float %63)
  %65 = fcmp ogt float %64, %.06674.us.unr
  br i1 %65, label %._crit_edge.us, label %66

66:                                               ; preds = %.epil.preheader
  %67 = fneg float %64
  %68 = fcmp olt float %.06674.us.unr, %67
  br i1 %68, label %69, label %._crit_edge.us

69:                                               ; preds = %66
  %70 = add nuw nsw i32 %57, %indvars86.epil
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.loopexit.unr-lcssa, %69, %66, %.epil.preheader, %37
  %.065.lcssa.us = phi i32 [ 0, %37 ], [ %.1.us.lcssa.ph, %._crit_edge.us.loopexit.unr-lcssa ], [ %70, %69 ], [ %.06575.us.unr, %66 ], [ %indvars86.epil, %.epil.preheader ]
  %71 = load ptr, ptr %29, align 8, !tbaa !16
  %72 = getelementptr inbounds float, ptr %71, i64 %.06877.us
  store float %56, ptr %72, align 4, !tbaa !14
  %73 = load ptr, ptr %30, align 8, !tbaa !17
  %74 = getelementptr inbounds i32, ptr %73, i64 %.06877.us
  store i32 %.065.lcssa.us, ptr %74, align 4, !tbaa !18
  %exitcond88.not = icmp eq i64 %46, %25
  br i1 %exitcond88.not, label %._crit_edge80.us, label %37, !llvm.loop !19

75:                                               ; preds = %101, %.lr.ph.us.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.us.new ], [ %indvars.iv.next.1, %101 ]
  %.06575.us = phi i32 [ 0, %.lr.ph.us.new ], [ %.1.us.1, %101 ]
  %.06674.us = phi float [ 0.000000e+00, %.lr.ph.us.new ], [ %.167.us.1, %101 ]
  %niter = phi i64 [ 0, %.lr.ph.us.new ], [ %niter.next.1, %101 ]
  %indvars86 = trunc i64 %indvars.iv to i32
  %76 = getelementptr inbounds float, ptr %102, i64 %indvars.iv
  %77 = load float, ptr %76, align 4, !tbaa !14
  %78 = getelementptr inbounds float, ptr %103, i64 %indvars.iv
  %79 = load float, ptr %78, align 4, !tbaa !14
  %80 = fmul float %79, %45
  %81 = call float @llvm.fmuladd.f32(float %77, float %53, float %80)
  %82 = fcmp ogt float %81, %.06674.us
  br i1 %82, label %88, label %83

83:                                               ; preds = %75
  %84 = fneg float %81
  %85 = fcmp olt float %.06674.us, %84
  br i1 %85, label %86, label %88

86:                                               ; preds = %83
  %87 = add nuw nsw i32 %57, %indvars86
  br label %88

88:                                               ; preds = %86, %83, %75
  %.167.us = phi float [ %84, %86 ], [ %.06674.us, %83 ], [ %81, %75 ]
  %.1.us = phi i32 [ %87, %86 ], [ %.06575.us, %83 ], [ %indvars86, %75 ]
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %indvars86.1 = trunc i64 %indvars.iv.next to i32
  %89 = getelementptr inbounds float, ptr %102, i64 %indvars.iv.next
  %90 = load float, ptr %89, align 4, !tbaa !14
  %91 = getelementptr inbounds float, ptr %103, i64 %indvars.iv.next
  %92 = load float, ptr %91, align 4, !tbaa !14
  %93 = fmul float %92, %45
  %94 = call float @llvm.fmuladd.f32(float %90, float %53, float %93)
  %95 = fcmp ogt float %94, %.167.us
  br i1 %95, label %101, label %96

96:                                               ; preds = %88
  %97 = fneg float %94
  %98 = fcmp olt float %.167.us, %97
  br i1 %98, label %99, label %101

99:                                               ; preds = %96
  %100 = add nuw nsw i32 %57, %indvars86.1
  br label %101

101:                                              ; preds = %99, %96, %88
  %.167.us.1 = phi float [ %97, %99 ], [ %.167.us, %96 ], [ %94, %88 ]
  %.1.us.1 = phi i32 [ %100, %99 ], [ %.1.us, %96 ], [ %indvars86.1, %88 ]
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.us.loopexit.unr-lcssa, label %75, !llvm.loop !20

.lr.ph.us:                                        ; preds = %37
  %102 = load ptr, ptr %27, align 8, !tbaa !21
  %103 = load ptr, ptr %28, align 8, !tbaa !22
  %wide.trip.count = zext nneg i32 %57 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %104 = icmp eq i32 %57, 1
  br i1 %104, label %._crit_edge.us.loopexit.unr-lcssa, label %.lr.ph.us.new

.lr.ph.us.new:                                    ; preds = %.lr.ph.us
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  br label %75

._crit_edge80.us:                                 ; preds = %._crit_edge.us
  invoke void @_ZN4Simd4Base18AddRowToHistogramsEPiPfmmmmmmS2_(ptr noundef nonnull %73, ptr noundef nonnull %71, i64 noundef %.081.us, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7)
          to label %35 unwind label %.split.us

.split.us:                                        ; preds = %._crit_edge80.us
  %105 = landingpad { ptr, i32 }
          cleanup
  br label %111

._crit_edge84:                                    ; preds = %108, %35, %18
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %9) #8
  call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %9) #8
  ret void

.lr.ph83.split:                                   ; preds = %.lr.ph83, %108
  %.081 = phi i64 [ %109, %108 ], [ 1, %.lr.ph83 ]
  %106 = load ptr, ptr %30, align 8, !tbaa !17
  %107 = load ptr, ptr %29, align 8, !tbaa !16
  invoke void @_ZN4Simd4Base18AddRowToHistogramsEPiPfmmmmmmS2_(ptr noundef %106, ptr noundef %107, i64 noundef %.081, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noundef %7)
          to label %108 unwind label %.split

108:                                              ; preds = %.lr.ph83.split
  %109 = add nuw i64 %.081, 1
  %exitcond.not = icmp eq i64 %109, %22
  br i1 %exitcond.not, label %._crit_edge84, label %.lr.ph83.split, !llvm.loop !5

.split:                                           ; preds = %.lr.ph83.split
  %110 = landingpad { ptr, i32 }
          cleanup
  br label %111

111:                                              ; preds = %.split.us, %.split
  %.us-phi = phi { ptr, i32 } [ %110, %.split ], [ %105, %.split.us ]
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48) %9) #8
  call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %9) #8
  resume { ptr, i32 } %.us-phi
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Emm(ptr noundef nonnull align 8 dereferenceable(48), i64 noundef, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4sqrtf(float noundef) local_unnamed_addr #5

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"_ZTSN4Simd4Base12_GLOBAL__N_16BufferE", !12, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !8, i64 0}
!16 = !{!11, !13, i64 32}
!17 = !{!11, !13, i64 24}
!18 = !{!12, !12, i64 0}
!19 = distinct !{!19, !6}
!20 = distinct !{!20, !6}
!21 = !{!11, !13, i64 8}
!22 = !{!11, !13, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass