; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @test_tile_extract(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %11, ptr noundef %12)
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %41, %3
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = icmp ult i32 %14, 16
  br i1 %15, label %16, label %44

16:                                               ; preds = %13
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %37, %16
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = icmp ult i32 %18, 8
  br i1 %19, label %20, label %40

20:                                               ; preds = %17
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %33, %20
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp ult i32 %22, 32
  br i1 %23, label %24, label %36

24:                                               ; preds = %21
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %26, i32 0, i32 6
  %28 = load i32, ptr %27, align 4, !tbaa !11
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_tile_extract(ptr noundef %25, i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31, i32 noundef 127, i32 noundef %32)
  br label %33

33:                                               ; preds = %24
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = add i32 %34, 1
  store i32 %35, ptr %9, align 4, !tbaa !9
  br label %21, !llvm.loop !13

36:                                               ; preds = %21
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = add i32 %38, 1
  store i32 %39, ptr %8, align 4, !tbaa !9
  br label %17, !llvm.loop !15

40:                                               ; preds = %17
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = add i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !9
  br label %13, !llvm.loop !16

44:                                               ; preds = %13
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %73, %44
  %46 = load i32, ptr %10, align 4, !tbaa !9
  %47 = icmp ult i32 %46, 16
  br i1 %47, label %48, label %76

48:                                               ; preds = %45
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %49

49:                                               ; preds = %69, %48
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = icmp ult i32 %50, 8
  br i1 %51, label %52, label %72

52:                                               ; preds = %49
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %65, %52
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = icmp ult i32 %54, 32
  br i1 %55, label %56, label %68

56:                                               ; preds = %53
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %58, i32 0, i32 6
  %60 = load i32, ptr %59, align 4, !tbaa !11
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = load i32, ptr %8, align 4, !tbaa !9
  %63 = load i32, ptr %10, align 4, !tbaa !9
  %64 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_tile_extract(ptr noundef %57, i32 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef 0, i32 noundef %63, i32 noundef %64)
  br label %65

65:                                               ; preds = %56
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = add i32 %66, 1
  store i32 %67, ptr %9, align 4, !tbaa !9
  br label %53, !llvm.loop !17

68:                                               ; preds = %53
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = add i32 %70, 1
  store i32 %71, ptr %8, align 4, !tbaa !9
  br label %49, !llvm.loop !18

72:                                               ; preds = %49
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %10, align 4, !tbaa !9
  %75 = add i32 %74, 1
  store i32 %75, ptr %10, align 4, !tbaa !9
  br label %45, !llvm.loop !19

76:                                               ; preds = %45
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %77, ptr noundef %78)
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

declare void @libxsmm_x86_instruction_tile_extract(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_tile_extract(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %4 = getelementptr inbounds i8, ptr %1, i64 28
  br label %.preheader34

.preheader34:                                     ; preds = %3, %22
  %.03037 = phi i32 [ 0, %3 ], [ %23, %22 ]
  br label %5

5:                                                ; preds = %.preheader34, %5
  %.02735 = phi i32 [ 0, %.preheader34 ], [ %7, %5 ]
  %6 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef %1, i32 noundef %6, i32 noundef %2, i32 noundef 0, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735) #2
  %7 = add nuw nsw i32 %.02735, 1
  %exitcond.not = icmp eq i32 %7, 32
  br i1 %exitcond.not, label %.preheader33.1, label %5, !llvm.loop !11

.preheader33.1:                                   ; preds = %5, %.preheader33.1
  %.02735.1 = phi i32 [ %9, %.preheader33.1 ], [ 0, %5 ]
  %8 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %8, i32 noundef %2, i32 noundef 1, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.1) #2
  %9 = add nuw nsw i32 %.02735.1, 1
  %exitcond.1.not = icmp eq i32 %9, 32
  br i1 %exitcond.1.not, label %.preheader33.2, label %.preheader33.1, !llvm.loop !11

.preheader33.2:                                   ; preds = %.preheader33.1, %.preheader33.2
  %.02735.2 = phi i32 [ %11, %.preheader33.2 ], [ 0, %.preheader33.1 ]
  %10 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %10, i32 noundef %2, i32 noundef 2, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.2) #2
  %11 = add nuw nsw i32 %.02735.2, 1
  %exitcond.2.not = icmp eq i32 %11, 32
  br i1 %exitcond.2.not, label %.preheader33.3, label %.preheader33.2, !llvm.loop !11

.preheader33.3:                                   ; preds = %.preheader33.2, %.preheader33.3
  %.02735.3 = phi i32 [ %13, %.preheader33.3 ], [ 0, %.preheader33.2 ]
  %12 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %12, i32 noundef %2, i32 noundef 3, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.3) #2
  %13 = add nuw nsw i32 %.02735.3, 1
  %exitcond.3.not = icmp eq i32 %13, 32
  br i1 %exitcond.3.not, label %.preheader33.4, label %.preheader33.3, !llvm.loop !11

.preheader33.4:                                   ; preds = %.preheader33.3, %.preheader33.4
  %.02735.4 = phi i32 [ %15, %.preheader33.4 ], [ 0, %.preheader33.3 ]
  %14 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %14, i32 noundef %2, i32 noundef 4, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.4) #2
  %15 = add nuw nsw i32 %.02735.4, 1
  %exitcond.4.not = icmp eq i32 %15, 32
  br i1 %exitcond.4.not, label %.preheader33.5, label %.preheader33.4, !llvm.loop !11

.preheader33.5:                                   ; preds = %.preheader33.4, %.preheader33.5
  %.02735.5 = phi i32 [ %17, %.preheader33.5 ], [ 0, %.preheader33.4 ]
  %16 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %16, i32 noundef %2, i32 noundef 5, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.5) #2
  %17 = add nuw nsw i32 %.02735.5, 1
  %exitcond.5.not = icmp eq i32 %17, 32
  br i1 %exitcond.5.not, label %.preheader33.6, label %.preheader33.5, !llvm.loop !11

.preheader33.6:                                   ; preds = %.preheader33.5, %.preheader33.6
  %.02735.6 = phi i32 [ %19, %.preheader33.6 ], [ 0, %.preheader33.5 ]
  %18 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %18, i32 noundef %2, i32 noundef 6, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.6) #2
  %19 = add nuw nsw i32 %.02735.6, 1
  %exitcond.6.not = icmp eq i32 %19, 32
  br i1 %exitcond.6.not, label %.preheader33.7, label %.preheader33.6, !llvm.loop !11

.preheader33.7:                                   ; preds = %.preheader33.6, %.preheader33.7
  %.02735.7 = phi i32 [ %21, %.preheader33.7 ], [ 0, %.preheader33.6 ]
  %20 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %20, i32 noundef %2, i32 noundef 7, i32 noundef %.03037, i32 noundef 127, i32 noundef %.02735.7) #2
  %21 = add nuw nsw i32 %.02735.7, 1
  %exitcond.7.not = icmp eq i32 %21, 32
  br i1 %exitcond.7.not, label %22, label %.preheader33.7, !llvm.loop !11

22:                                               ; preds = %.preheader33.7
  %23 = add nuw nsw i32 %.03037, 1
  %exitcond42.not = icmp eq i32 %23, 16
  br i1 %exitcond42.not, label %.preheader31, label %.preheader34, !llvm.loop !13

.preheader31:                                     ; preds = %22, %41
  %.040 = phi i32 [ %42, %41 ], [ 0, %22 ]
  br label %24

24:                                               ; preds = %.preheader31, %24
  %.138 = phi i32 [ 0, %.preheader31 ], [ %26, %24 ]
  %25 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %25, i32 noundef %2, i32 noundef 0, i32 noundef 0, i32 noundef %.040, i32 noundef %.138) #2
  %26 = add nuw nsw i32 %.138, 1
  %exitcond43.not = icmp eq i32 %26, 32
  br i1 %exitcond43.not, label %.preheader.1, label %24, !llvm.loop !14

.preheader.1:                                     ; preds = %24, %.preheader.1
  %.138.1 = phi i32 [ %28, %.preheader.1 ], [ 0, %24 ]
  %27 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %27, i32 noundef %2, i32 noundef 1, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.1) #2
  %28 = add nuw nsw i32 %.138.1, 1
  %exitcond43.1.not = icmp eq i32 %28, 32
  br i1 %exitcond43.1.not, label %.preheader.2, label %.preheader.1, !llvm.loop !14

.preheader.2:                                     ; preds = %.preheader.1, %.preheader.2
  %.138.2 = phi i32 [ %30, %.preheader.2 ], [ 0, %.preheader.1 ]
  %29 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %29, i32 noundef %2, i32 noundef 2, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.2) #2
  %30 = add nuw nsw i32 %.138.2, 1
  %exitcond43.2.not = icmp eq i32 %30, 32
  br i1 %exitcond43.2.not, label %.preheader.3, label %.preheader.2, !llvm.loop !14

.preheader.3:                                     ; preds = %.preheader.2, %.preheader.3
  %.138.3 = phi i32 [ %32, %.preheader.3 ], [ 0, %.preheader.2 ]
  %31 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %31, i32 noundef %2, i32 noundef 3, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.3) #2
  %32 = add nuw nsw i32 %.138.3, 1
  %exitcond43.3.not = icmp eq i32 %32, 32
  br i1 %exitcond43.3.not, label %.preheader.4, label %.preheader.3, !llvm.loop !14

.preheader.4:                                     ; preds = %.preheader.3, %.preheader.4
  %.138.4 = phi i32 [ %34, %.preheader.4 ], [ 0, %.preheader.3 ]
  %33 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %33, i32 noundef %2, i32 noundef 4, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.4) #2
  %34 = add nuw nsw i32 %.138.4, 1
  %exitcond43.4.not = icmp eq i32 %34, 32
  br i1 %exitcond43.4.not, label %.preheader.5, label %.preheader.4, !llvm.loop !14

.preheader.5:                                     ; preds = %.preheader.4, %.preheader.5
  %.138.5 = phi i32 [ %36, %.preheader.5 ], [ 0, %.preheader.4 ]
  %35 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %35, i32 noundef %2, i32 noundef 5, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.5) #2
  %36 = add nuw nsw i32 %.138.5, 1
  %exitcond43.5.not = icmp eq i32 %36, 32
  br i1 %exitcond43.5.not, label %.preheader.6, label %.preheader.5, !llvm.loop !14

.preheader.6:                                     ; preds = %.preheader.5, %.preheader.6
  %.138.6 = phi i32 [ %38, %.preheader.6 ], [ 0, %.preheader.5 ]
  %37 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %37, i32 noundef %2, i32 noundef 6, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.6) #2
  %38 = add nuw nsw i32 %.138.6, 1
  %exitcond43.6.not = icmp eq i32 %38, 32
  br i1 %exitcond43.6.not, label %.preheader.7, label %.preheader.6, !llvm.loop !14

.preheader.7:                                     ; preds = %.preheader.6, %.preheader.7
  %.138.7 = phi i32 [ %40, %.preheader.7 ], [ 0, %.preheader.6 ]
  %39 = load i32, ptr %4, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_tile_extract(ptr noundef nonnull %1, i32 noundef %39, i32 noundef %2, i32 noundef 7, i32 noundef 0, i32 noundef %.040, i32 noundef %.138.7) #2
  %40 = add nuw nsw i32 %.138.7, 1
  %exitcond43.7.not = icmp eq i32 %40, 32
  br i1 %exitcond43.7.not, label %41, label %.preheader.7, !llvm.loop !14

41:                                               ; preds = %.preheader.7
  %42 = add nuw nsw i32 %.040, 1
  %exitcond45.not = icmp eq i32 %42, 16
  br i1 %exitcond45.not, label %43, label %.preheader31, !llvm.loop !15

43:                                               ; preds = %41
  tail call void @dump_code_buffer(ptr noundef nonnull %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_x86_instruction_tile_extract(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass