; LLVM IR from alekras/ao.rtos.cpp :: Tools/ARM-Raspberry_Pi/Initial_Interactive_Loader (periph)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pAUX_MU_IO_REG = external dso_local global ptr, align 8
@flag = external dso_local global i8, align 1
@txhead = external dso_local global i32, align 4
@txtail = external dso_local global i32, align 4
@txbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IER_REG = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @sendString(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %7, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  br label %8

8:                                                ; preds = %43, %1
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = load i8, ptr %9, align 1, !tbaa !9
  %11 = sext i8 %10 to i32
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %53

13:                                               ; preds = %8
  %14 = load volatile i32, ptr @txtail, align 4, !tbaa !10
  %15 = load volatile i32, ptr @txhead, align 4, !tbaa !10
  %16 = sub i32 %14, %15
  store i32 %16, ptr %4, align 4, !tbaa !10
  %17 = load i32, ptr %4, align 4, !tbaa !10
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %19, label %43

19:                                               ; preds = %13
  %20 = load i32, ptr %4, align 4, !tbaa !10
  %21 = icmp slt i32 %20, 3
  br i1 %21, label %22, label %43

22:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !10
  br label %23

23:                                               ; preds = %38, %22
  %24 = load i32, ptr %5, align 4, !tbaa !10
  %25 = icmp slt i32 %24, 1000
  br i1 %25, label %27, label %26

26:                                               ; preds = %23
  store i32 4, ptr %6, align 4
  br label %41

27:                                               ; preds = %23
  %28 = load volatile i32, ptr @txtail, align 4, !tbaa !10
  %29 = load volatile i32, ptr @txhead, align 4, !tbaa !10
  %30 = sub i32 %28, %29
  store i32 %30, ptr %4, align 4, !tbaa !10
  %31 = load i32, ptr %4, align 4, !tbaa !10
  %32 = icmp sgt i32 %31, 0
  br i1 %32, label %33, label %37

33:                                               ; preds = %27
  %34 = load i32, ptr %4, align 4, !tbaa !10
  %35 = icmp sgt i32 %34, 20
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 4, ptr %6, align 4
  br label %41

37:                                               ; preds = %33, %27
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %5, align 4, !tbaa !10
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %5, align 4, !tbaa !10
  br label %23, !llvm.loop !12

41:                                               ; preds = %36, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %42

42:                                               ; preds = %41
  br label %43

43:                                               ; preds = %42, %19, %13
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds i8, ptr %44, i32 1
  store ptr %45, ptr %3, align 8, !tbaa !5
  %46 = load i8, ptr %44, align 1, !tbaa !9
  %47 = load volatile i32, ptr @txhead, align 4, !tbaa !10
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %48
  store volatile i8 %46, ptr %49, align 1, !tbaa !9
  %50 = load volatile i32, ptr @txhead, align 4, !tbaa !10
  %51 = add i32 %50, 1
  %52 = and i32 %51, 255
  store volatile i32 %52, ptr @txhead, align 4, !tbaa !10
  br label %8, !llvm.loop !14

53:                                               ; preds = %8
  %54 = load volatile i8, ptr @flag, align 1, !tbaa !15, !range !17, !noundef !18
  %55 = trunc i8 %54 to i1
  br i1 %55, label %67, label %56

56:                                               ; preds = %53
  %57 = load volatile i32, ptr @txtail, align 4, !tbaa !10
  %58 = zext i32 %57 to i64
  %59 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %58
  %60 = load volatile i8, ptr %59, align 1, !tbaa !9
  %61 = zext i8 %60 to i32
  %62 = load ptr, ptr @pAUX_MU_IO_REG, align 8, !tbaa !5
  store volatile i32 %61, ptr %62, align 4, !tbaa !10
  %63 = load volatile i32, ptr @txtail, align 4, !tbaa !10
  %64 = add i32 %63, 1
  %65 = and i32 %64, 255
  store volatile i32 %65, ptr @txtail, align 4, !tbaa !10
  %66 = load ptr, ptr @pAUX_MU_IER_REG, align 8, !tbaa !5
  store volatile i32 7, ptr %66, align 4, !tbaa !10
  store volatile i8 1, ptr @flag, align 1, !tbaa !15
  br label %67

67:                                               ; preds = %56, %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = !{!16, !16, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{i8 0, i8 2}
!18 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pAUX_MU_IO_REG = external dso_local local_unnamed_addr global ptr, align 8
@flag = external dso_local global i8, align 1
@txhead = external dso_local global i32, align 4
@txtail = external dso_local global i32, align 4
@txbuffer = external dso_local global [256 x i8], align 16
@pAUX_MU_IER_REG = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress nofree norecurse nounwind uwtable
define dso_local void @sendString(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = load i8, ptr %0, align 1, !tbaa !5
  %.not13 = icmp eq i8 %2, 0
  br i1 %.not13, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.loopexit
  %3 = phi i8 [ %20, %.loopexit ], [ %2, %1 ]
  %.01114 = phi ptr [ %13, %.loopexit ], [ %0, %1 ]
  %4 = load volatile i32, ptr @txtail, align 4, !tbaa !8
  %5 = load volatile i32, ptr @txhead, align 4, !tbaa !8
  %6 = sub i32 %5, %4
  %or.cond = icmp ugt i32 %6, -3
  br i1 %or.cond, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %.lr.ph, %.preheader
  %.012 = phi i32 [ %11, %.preheader ], [ 0, %.lr.ph ]
  %7 = load volatile i32, ptr @txtail, align 4, !tbaa !8
  %8 = load volatile i32, ptr @txhead, align 4, !tbaa !8
  %9 = sub i32 %7, %8
  %10 = icmp slt i32 %9, 21
  %11 = add nuw nsw i32 %.012, 1
  %12 = icmp ult i32 %.012, 999
  %or.cond15 = select i1 %10, i1 %12, i1 false
  br i1 %or.cond15, label %.preheader, label %.loopexit, !llvm.loop !10

.loopexit:                                        ; preds = %.preheader, %.lr.ph
  %13 = getelementptr inbounds i8, ptr %.01114, i64 1
  %14 = load volatile i32, ptr @txhead, align 4, !tbaa !8
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %15
  store volatile i8 %3, ptr %16, align 1, !tbaa !5
  %17 = load volatile i32, ptr @txhead, align 4, !tbaa !8
  %18 = add i32 %17, 1
  %19 = and i32 %18, 255
  store volatile i32 %19, ptr @txhead, align 4, !tbaa !8
  %20 = load i8, ptr %13, align 1, !tbaa !5
  %.not = icmp eq i8 %20, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !12

._crit_edge:                                      ; preds = %.loopexit, %1
  %21 = load volatile i8, ptr @flag, align 1, !tbaa !13, !range !15, !noundef !16
  %22 = trunc nuw i8 %21 to i1
  br i1 %22, label %34, label %23

23:                                               ; preds = %._crit_edge
  %24 = load volatile i32, ptr @txtail, align 4, !tbaa !8
  %25 = zext i32 %24 to i64
  %26 = getelementptr inbounds [256 x i8], ptr @txbuffer, i64 0, i64 %25
  %27 = load volatile i8, ptr %26, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  %29 = load ptr, ptr @pAUX_MU_IO_REG, align 8, !tbaa !17
  store volatile i32 %28, ptr %29, align 4, !tbaa !8
  %30 = load volatile i32, ptr @txtail, align 4, !tbaa !8
  %31 = add i32 %30, 1
  %32 = and i32 %31, 255
  store volatile i32 %32, ptr @txtail, align 4, !tbaa !8
  %33 = load ptr, ptr @pAUX_MU_IER_REG, align 8, !tbaa !17
  store volatile i32 7, ptr %33, align 4, !tbaa !8
  store volatile i8 1, ptr @flag, align 1, !tbaa !13
  br label %34

34:                                               ; preds = %23, %._crit_edge
  ret void
}

attributes #0 = { mustprogress nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !6, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!18, !18, i64 0}
!18 = !{!"any pointer", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass