; LLVM IR from NVIDIA/DALI :: dali/pipeline/operator/builtin (make_contiguous)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CPUBackend" = type { i8 }
%"struct.dali::DomainTimeRange" = type { i8 }
%"struct.dali::TensorListShape" = type { %"struct.dali::TensorListShapeBase.base", i32 }
%"struct.dali::TensorListShapeBase.base" = type <{ %"class.std::vector.28", i32 }>
%"class.std::vector.28" = type { %"struct.std::_Vector_base.29" }
%"struct.std::_Vector_base.29" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::function.79" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%class.anon = type { i32, ptr, ptr }
%"class.dali::MakeContiguousBase" = type <{ %"class.dali::StatelessOperator", %"class.dali::TensorList", i8, i8, [2 x i8], i32, i32, [4 x i8] }>
%"class.dali::StatelessOperator" = type { %"class.dali::Operator" }
%"class.dali::Operator" = type { %"class.dali::OperatorBase" }
%"class.dali::OperatorBase" = type { ptr, %"class.dali::OpSpec", i32, i32, %"class.std::unordered_map" }
%"class.dali::OpSpec" = type { %"class.std::__cxx11::basic_string", ptr, %"class.std::vector.33", %"class.std::map", %"class.std::vector.38", %"class.std::map", %"class.std::map.43", %"class.std::vector.48", %"class.std::vector.48", %"class.std::map.53" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.33" = type { %"struct.std::_Vector_base.34" }
%"struct.std::_Vector_base.34" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.38" = type { %"struct.std::_Vector_base.39" }
%"struct.std::_Vector_base.39" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.43" = type { %"class.std::_Rb_tree.44" }
%"class.std::_Rb_tree.44" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.48" = type { %"struct.std::_Vector_base.49" }
%"struct.std::_Vector_base.49" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.53" = type { %"class.std::_Rb_tree.54" }
%"class.std::_Rb_tree.54" = type { %"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.dali::TensorList" = type { %"class.dali::Buffer", %"class.std::vector", %"class.dali::TensorList<dali::CPUBackend>::State", i8, i32, i32, i32, %"class.dali::TypeInfo", %"struct.dali::TensorListShape", %"class.dali::TensorLayout", %"class.dali::AccessOrder", %"class.dali::CUDASharedEvent" }
%"class.dali::Buffer" = type <{ ptr, %"class.dali::TypeInfo", %"class.std::shared_ptr.22", %"class.std::function", i64, i64, i32, [4 x i8], %"class.dali::AccessOrder", i8, i8, [6 x i8] }>
%"class.std::shared_ptr.22" = type { %"class.std::__shared_ptr.23" }
%"class.std::__shared_ptr.23" = type { ptr, %"class.std::__shared_count" }
%"class.std::__shared_count" = type { ptr }
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::Tensor<dali::CPUBackend>, std::allocator<dali::Tensor<dali::CPUBackend>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::TensorList<dali::CPUBackend>::State" = type { i8, i8 }
%"class.dali::TypeInfo" = type { ptr, i32, i64, %"class.std::basic_string_view" }
%"class.std::basic_string_view" = type { i64, ptr }
%"class.dali::TensorLayout" = type { [16 x i8] }
%"class.dali::AccessOrder" = type <{ ptr, i32, [4 x i8] }>
%"class.dali::CUDASharedEvent" = type { %"class.std::shared_ptr.22" }

@.str.4 = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali17MakeContiguousCPU7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(716) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.dali::CPUBackend", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.dali::CPUBackend", align 1
  %9 = alloca %"struct.dali::DomainTimeRange", align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca %"struct.dali::TensorListShape", align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca %"class.std::function.79", align 8
  %17 = alloca %class.anon, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %18 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10CPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %19, i32 noundef 0)
  store ptr %20, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %21, i32 noundef 0)
  store ptr %22, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #6
  call void @_ZN4dali15DomainTimeRangeC2EPKcj(ptr noundef nonnull align 1 dereferenceable(1) %9, ptr noundef @.str.4, i32 noundef 255)
  %23 = getelementptr inbounds %"class.dali::MakeContiguousBase", ptr %18, i32 0, i32 3
  %24 = load i8, ptr %23, align 1, !tbaa !9, !range !76, !noundef !77
  %25 = trunc i8 %24 to i1
  br i1 %25, label %26, label %34

26:                                               ; preds = %2
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  invoke void @_ZN4dali10TensorListINS_10CPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304) %27, ptr noundef nonnull align 8 dereferenceable(304) %28)
          to label %29 unwind label %30

29:                                               ; preds = %26
  br label %98

30:                                               ; preds = %26
  %31 = landingpad { ptr, i32 }
          cleanup
  %32 = extractvalue { ptr, i32 } %31, 0
  store ptr %32, ptr %10, align 8
  %33 = extractvalue { ptr, i32 } %31, 1
  store i32 %33, ptr %11, align 4
  br label %99

34:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = call noundef i32 @_ZNK4dali10TensorListINS_10CPUBackendEE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(304) %35) #6
  store i32 %36, ptr %12, align 4, !tbaa !78
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = invoke noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %38)
          to label %40 unwind label %54

40:                                               ; preds = %34
  invoke void @_ZN4dali10TensorListINS_10CPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %37, ptr noundef nonnull align 1 dereferenceable(16) %39)
          to label %41 unwind label %54

41:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 32, ptr %13) #6
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %42)
          to label %44 unwind label %58

44:                                               ; preds = %41
  invoke void @_ZN4dali15TensorListShapeILin1EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %13, ptr noundef nonnull align 8 dereferenceable(32) %43)
          to label %45 unwind label %58

45:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE13GetThreadPoolEv(ptr noundef nonnull align 8 dereferenceable(664) %46)
          to label %48 unwind label %62

48:                                               ; preds = %45
  store ptr %47, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  store i32 0, ptr %15, align 4, !tbaa !78
  br label %49

49:                                               ; preds = %80, %48
  %50 = load i32, ptr %15, align 4, !tbaa !78
  %51 = load i32, ptr %12, align 4, !tbaa !78
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %66, label %53

53:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  br label %92

54:                                               ; preds = %40, %34
  %55 = landingpad { ptr, i32 }
          cleanup
  %56 = extractvalue { ptr, i32 } %55, 0
  store ptr %56, ptr %10, align 8
  %57 = extractvalue { ptr, i32 } %55, 1
  store i32 %57, ptr %11, align 4
  br label %97

58:                                               ; preds = %44, %41
  %59 = landingpad { ptr, i32 }
          cleanup
  %60 = extractvalue { ptr, i32 } %59, 0
  store ptr %60, ptr %10, align 8
  %61 = extractvalue { ptr, i32 } %59, 1
  store i32 %61, ptr %11, align 4
  br label %96

62:                                               ; preds = %92, %45
  %63 = landingpad { ptr, i32 }
          cleanup
  %64 = extractvalue { ptr, i32 } %63, 0
  store ptr %64, ptr %10, align 8
  %65 = extractvalue { ptr, i32 } %63, 1
  store i32 %65, ptr %11, align 4
  br label %95

66:                                               ; preds = %49
  %67 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %17) #6
  %68 = getelementptr inbounds %class.anon, ptr %17, i32 0, i32 0
  %69 = load i32, ptr %15, align 4, !tbaa !78
  store i32 %69, ptr %68, align 8, !tbaa !79
  %70 = getelementptr inbounds %class.anon, ptr %17, i32 0, i32 1
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %71, ptr %70, align 8, !tbaa !5
  %72 = getelementptr inbounds %class.anon, ptr %17, i32 0, i32 2
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %73, ptr %72, align 8, !tbaa !5
  invoke void @"_ZNSt8functionIFviEEC2IZN4dali17MakeContiguousCPU7RunImplERNS3_9WorkspaceEE3$_0vEEOT_"(ptr noundef nonnull align 8 dereferenceable(32) %16, ptr noundef nonnull align 8 dereferenceable(24) %17)
          to label %74 unwind label %83

74:                                               ; preds = %66
  %75 = load i32, ptr %15, align 4, !tbaa !78
  %76 = sext i32 %75 to i64
  %77 = invoke noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28) %13, i64 noundef %76)
          to label %78 unwind label %87

78:                                               ; preds = %74
  invoke void @_ZN4dali10ThreadPool7AddWorkESt8functionIFviEElb(ptr noundef nonnull align 8 dereferenceable(224) %67, ptr noundef %16, i64 noundef %77, i1 noundef zeroext false)
          to label %79 unwind label %87

79:                                               ; preds = %78
  call void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %16) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  br label %80

80:                                               ; preds = %79
  %81 = load i32, ptr %15, align 4, !tbaa !78
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %15, align 4, !tbaa !78
  br label %49, !llvm.loop !81

83:                                               ; preds = %66
  %84 = landingpad { ptr, i32 }
          cleanup
  %85 = extractvalue { ptr, i32 } %84, 0
  store ptr %85, ptr %10, align 8
  %86 = extractvalue { ptr, i32 } %84, 1
  store i32 %86, ptr %11, align 4
  br label %91

87:                                               ; preds = %78, %74
  %88 = landingpad { ptr, i32 }
          cleanup
  %89 = extractvalue { ptr, i32 } %88, 0
  store ptr %89, ptr %10, align 8
  %90 = extractvalue { ptr, i32 } %88, 1
  store i32 %90, ptr %11, align 4
  call void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %16) #6
  br label %91

91:                                               ; preds = %87, %83
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  br label %95

92:                                               ; preds = %53
  %93 = load ptr, ptr %14, align 8, !tbaa !5
  invoke void @_ZN4dali10ThreadPool6RunAllEb(ptr noundef nonnull align 8 dereferenceable(224) %93, i1 noundef zeroext true)
          to label %94 unwind label %62

94:                                               ; preds = %92
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  br label %98

95:                                               ; preds = %91, %62
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #6
  br label %96

96:                                               ; preds = %95, %58
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #6
  br label %97

97:                                               ; preds = %96, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  br label %99

98:                                               ; preds = %94, %29
  call void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret void

99:                                               ; preds = %97, %30
  call void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br label %100

100:                                              ; preds = %99
  %101 = load ptr, ptr %10, align 8
  %102 = load i32, ptr %11, align 4
  %103 = insertvalue { ptr, i32 } poison, ptr %101, 0
  %104 = insertvalue { ptr, i32 } %103, i32 %102, 1
  resume { ptr, i32 } %104
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10CPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15DomainTimeRangeC2EPKcj(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i32 noundef) unnamed_addr #2 align 2

declare void @_ZN4dali10TensorListINS_10CPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali10TensorListINS_10CPUBackendEE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(304)) #2 align 2

declare void @_ZN4dali10TensorListINS_10CPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali15TensorListShapeILin1EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE13GetThreadPoolEv(ptr noundef nonnull align 8 dereferenceable(664)) #5 align 2

declare void @_ZN4dali10ThreadPool7AddWorkESt8functionIFviEElb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef, i64 noundef, i1 noundef zeroext) #3

; Function Attrs: mustprogress uwtable
declare hidden void @"_ZNSt8functionIFviEEC2IZN4dali17MakeContiguousCPU7RunImplERNS3_9WorkspaceEE3$_0vEEOT_"(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28), i64 noundef) #1 align 2

declare void @_ZN4dali10ThreadPool6RunAllEb(ptr noundef nonnull align 8 dereferenceable(224), i1 noundef zeroext) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(28)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !61, i64 705}
!10 = !{!"_ZTSN4dali18MakeContiguousBaseINS_10CPUBackendEEE", !11, i64 0, !50, i64 400, !61, i64 704, !61, i64 705, !44, i64 708, !75, i64 712}
!11 = !{!"_ZTSN4dali17StatelessOperatorINS_10CPUBackendEEE", !12, i64 0}
!12 = !{!"_ZTSN4dali8OperatorINS_10CPUBackendEEE", !13, i64 0}
!13 = !{!"_ZTSN4dali12OperatorBaseE", !14, i64 8, !44, i64 336, !44, i64 340, !45, i64 344}
!14 = !{!"_ZTSN4dali6OpSpecE", !15, i64 0, !6, i64 32, !18, i64 40, !22, i64 64, !30, i64 112, !22, i64 136, !34, i64 184, !37, i64 232, !37, i64 256, !41, i64 280}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !16, i64 0, !17, i64 8, !7, i64 16}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !23, i64 0}
!23 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !24, i64 0}
!24 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!25 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !26, i64 0}
!26 = !{!"_ZTSSt4lessIvE"}
!27 = !{!"_ZTSSt15_Rb_tree_header", !28, i64 0, !17, i64 32}
!28 = !{!"_ZTSSt18_Rb_tree_node_base", !29, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!29 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!30 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!34 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !35, i64 0}
!35 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !36, i64 0}
!36 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!37 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !42, i64 0}
!42 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !43, i64 0}
!43 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !25, i64 0, !27, i64 8}
!44 = !{!"int", !7, i64 0}
!45 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !46, i64 0}
!46 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !17, i64 8, !47, i64 16, !17, i64 24, !48, i64 32, !6, i64 48}
!47 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!48 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !49, i64 0, !17, i64 8}
!49 = !{!"float", !7, i64 0}
!50 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEEE", !51, i64 0, !62, i64 144, !66, i64 168, !61, i64 170, !44, i64 172, !44, i64 176, !44, i64 180, !52, i64 184, !67, i64 224, !73, i64 256, !60, i64 272, !74, i64 288}
!51 = !{!"_ZTSN4dali6BufferINS_10CPUBackendEEE", !52, i64 8, !55, i64 48, !58, i64 64, !17, i64 96, !17, i64 104, !44, i64 112, !60, i64 120, !61, i64 136, !61, i64 137}
!52 = !{!"_ZTSN4dali8TypeInfoE", !6, i64 0, !53, i64 8, !17, i64 16, !54, i64 24}
!53 = !{!"_ZTS13_DALIDataType", !7, i64 0}
!54 = !{!"_ZTSSt17basic_string_viewIcSt11char_traitsIcEE", !17, i64 0, !6, i64 8}
!55 = !{!"_ZTSSt10shared_ptrIvE", !56, i64 0}
!56 = !{!"_ZTSSt12__shared_ptrIvLN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0, !57, i64 8}
!57 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0}
!58 = !{!"_ZTSSt8functionIFSt10shared_ptrIhEmEE", !59, i64 0, !6, i64 24}
!59 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!60 = !{!"_ZTSN4dali11AccessOrderE", !6, i64 0, !44, i64 8}
!61 = !{!"bool", !7, i64 0}
!62 = !{!"_ZTSSt6vectorIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !63, i64 0}
!63 = !{!"_ZTSSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !64, i64 0}
!64 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE12_Vector_implE", !65, i64 0}
!65 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!66 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEE5StateE", !61, i64 0, !61, i64 1}
!67 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !68, i64 0, !44, i64 28}
!68 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !69, i64 0, !44, i64 24}
!69 = !{!"_ZTSSt6vectorIlSaIlEE", !70, i64 0}
!70 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !71, i64 0}
!71 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !72, i64 0}
!72 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!73 = !{!"_ZTSN4dali12TensorLayoutE", !7, i64 0}
!74 = !{!"_ZTSN4dali15CUDASharedEventE", !55, i64 0}
!75 = !{!"_ZTSN4dali18MakeContiguousModeE", !7, i64 0}
!76 = !{i8 0, i8 2}
!77 = !{}
!78 = !{!44, !44, i64 0}
!79 = !{!80, !44, i64 0}
!80 = !{!"_ZTSZN4dali17MakeContiguousCPU7RunImplERNS_9WorkspaceEE3$_0", !44, i64 0, !6, i64 8, !6, i64 16}
!81 = distinct !{!81, !82}
!82 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.dali::DomainTimeRange" = type { i8 }
%"struct.dali::TensorListShape" = type { %"struct.dali::TensorListShapeBase.base", i32 }
%"struct.dali::TensorListShapeBase.base" = type <{ %"class.std::vector.28", i32 }>
%"class.std::vector.28" = type { %"struct.std::_Vector_base.29" }
%"struct.std::_Vector_base.29" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::function.79" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%class.anon = type { i32, ptr, ptr }

@.str.4 = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali17MakeContiguousCPU7RunImplERNS_9WorkspaceE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(716) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"struct.dali::DomainTimeRange", align 1
  %4 = alloca %"struct.dali::TensorListShape", align 8
  %5 = alloca %"class.std::function.79", align 8
  %6 = alloca %class.anon, align 8
  %7 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10CPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %8 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #6
  call void @_ZN4dali15DomainTimeRangeC2EPKcj(ptr noundef nonnull align 1 dereferenceable(1) %3, ptr noundef nonnull @.str.4, i32 noundef 255)
  %9 = getelementptr inbounds i8, ptr %0, i64 705
  %10 = load i8, ptr %9, align 1, !tbaa !5, !range !75, !noundef !76
  %11 = trunc nuw i8 %10 to i1
  br i1 %11, label %12, label %15

12:                                               ; preds = %2
  invoke void @_ZN4dali10TensorListINS_10CPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304) %8, ptr noundef nonnull align 8 dereferenceable(304) %7)
          to label %45 unwind label %13

13:                                               ; preds = %12
  %14 = landingpad { ptr, i32 }
          cleanup
  br label %46

15:                                               ; preds = %2
  %16 = call noundef i32 @_ZNK4dali10TensorListINS_10CPUBackendEE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(304) %7) #6
  %17 = call noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %7)
  invoke void @_ZN4dali10TensorListINS_10CPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %8, ptr noundef nonnull align 1 dereferenceable(16) %17)
          to label %18 unwind label %25

18:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #6
  %19 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %7)
  invoke void @_ZN4dali15TensorListShapeILin1EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %4, ptr noundef nonnull align 8 dereferenceable(32) %19)
          to label %20 unwind label %27

20:                                               ; preds = %18
  %21 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE13GetThreadPoolEv(ptr noundef nonnull align 8 dereferenceable(664) %1)
          to label %.preheader unwind label %29

.preheader:                                       ; preds = %20
  %22 = icmp sgt i32 %16, 0
  br i1 %22, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %23 = getelementptr inbounds i8, ptr %6, i64 8
  %24 = getelementptr inbounds i8, ptr %6, i64 16
  %wide.trip.count = zext nneg i32 %16 to i64
  br label %31

._crit_edge:                                      ; preds = %36, %.preheader
  invoke void @_ZN4dali10ThreadPool6RunAllEb(ptr noundef nonnull align 8 dereferenceable(224) %21, i1 noundef zeroext true)
          to label %42 unwind label %29

25:                                               ; preds = %15
  %26 = landingpad { ptr, i32 }
          cleanup
  br label %46

27:                                               ; preds = %18
  %28 = landingpad { ptr, i32 }
          cleanup
  br label %44

29:                                               ; preds = %._crit_edge, %20
  %30 = landingpad { ptr, i32 }
          cleanup
  br label %43

31:                                               ; preds = %.lr.ph, %36
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %36 ]
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #6
  %32 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %32, ptr %6, align 8, !tbaa !77
  store ptr %7, ptr %23, align 8, !tbaa !79
  store ptr %8, ptr %24, align 8, !tbaa !79
  invoke void @"_ZNSt8functionIFviEEC2IZN4dali17MakeContiguousCPU7RunImplERNS3_9WorkspaceEE3$_0vEEOT_"(ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull align 8 dereferenceable(24) %6)
          to label %33 unwind label %37

33:                                               ; preds = %31
  %34 = invoke noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28) %4, i64 noundef %indvars.iv)
          to label %35 unwind label %39

35:                                               ; preds = %33
  invoke void @_ZN4dali10ThreadPool7AddWorkESt8functionIFviEElb(ptr noundef nonnull align 8 dereferenceable(224) %21, ptr noundef nonnull %5, i64 noundef %34, i1 noundef zeroext false)
          to label %36 unwind label %39

36:                                               ; preds = %35
  call void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #6
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %31, !llvm.loop !80

37:                                               ; preds = %31
  %38 = landingpad { ptr, i32 }
          cleanup
  br label %41

39:                                               ; preds = %35, %33
  %40 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #6
  br label %41

41:                                               ; preds = %39, %37
  %.pn = phi { ptr, i32 } [ %40, %39 ], [ %38, %37 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #6
  br label %43

42:                                               ; preds = %._crit_edge
  call void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #6
  br label %45

43:                                               ; preds = %41, %29
  %.pn.pn = phi { ptr, i32 } [ %.pn, %41 ], [ %30, %29 ]
  call void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #6
  br label %44

44:                                               ; preds = %43, %27
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %43 ], [ %28, %27 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #6
  br label %46

45:                                               ; preds = %12, %42
  call void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #6
  ret void

46:                                               ; preds = %25, %44, %13
  %.pn30 = phi { ptr, i32 } [ %14, %13 ], [ %.pn.pn.pn, %44 ], [ %26, %25 ]
  call void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #6
  resume { ptr, i32 } %.pn30
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10CPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10CPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15DomainTimeRangeC2EPKcj(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i32 noundef) unnamed_addr #2 align 2

declare void @_ZN4dali10TensorListINS_10CPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali10TensorListINS_10CPUBackendEE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #2 align 2

declare void @_ZN4dali10TensorListINS_10CPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10CPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali15TensorListShapeILin1EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE13GetThreadPoolEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #5 align 2

declare void @_ZN4dali10ThreadPool7AddWorkESt8functionIFviEElb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef, i64 noundef, i1 noundef zeroext) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare hidden void @"_ZNSt8functionIFviEEC2IZN4dali17MakeContiguousCPU7RunImplERNS3_9WorkspaceEE3$_0vEEOT_"(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28), i64 noundef) local_unnamed_addr #1 align 2

declare void @_ZN4dali10ThreadPool6RunAllEb(ptr noundef nonnull align 8 dereferenceable(224), i1 noundef zeroext) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EED2Ev(ptr noundef nonnull align 8 dereferenceable(28)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali15DomainTimeRangeD2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt14_Function_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !60, i64 705}
!6 = !{!"_ZTSN4dali18MakeContiguousBaseINS_10CPUBackendEEE", !7, i64 0, !49, i64 400, !60, i64 704, !60, i64 705, !43, i64 708, !74, i64 712}
!7 = !{!"_ZTSN4dali17StatelessOperatorINS_10CPUBackendEEE", !8, i64 0}
!8 = !{!"_ZTSN4dali8OperatorINS_10CPUBackendEEE", !9, i64 0}
!9 = !{!"_ZTSN4dali12OperatorBaseE", !10, i64 8, !43, i64 336, !43, i64 340, !44, i64 344}
!10 = !{!"_ZTSN4dali6OpSpecE", !11, i64 0, !13, i64 32, !17, i64 40, !21, i64 64, !29, i64 112, !21, i64 136, !33, i64 184, !36, i64 232, !36, i64 256, !40, i64 280}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !16, i64 8, !14, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !14, i64 0}
!14 = !{!"omnipotent char", !15, i64 0}
!15 = !{!"Simple C++ TBAA"}
!16 = !{!"long", !14, i64 0}
!17 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!21 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !22, i64 0}
!22 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !23, i64 0}
!23 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!24 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !25, i64 0}
!25 = !{!"_ZTSSt4lessIvE"}
!26 = !{!"_ZTSSt15_Rb_tree_header", !27, i64 0, !16, i64 32}
!27 = !{!"_ZTSSt18_Rb_tree_node_base", !28, i64 0, !13, i64 8, !13, i64 16, !13, i64 24}
!28 = !{!"_ZTSSt14_Rb_tree_color", !14, i64 0}
!29 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!33 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !34, i64 0}
!34 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !35, i64 0}
!35 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!36 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!40 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !41, i64 0}
!41 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !42, i64 0}
!42 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !24, i64 0, !26, i64 8}
!43 = !{!"int", !14, i64 0}
!44 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !45, i64 0}
!45 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !13, i64 0, !16, i64 8, !46, i64 16, !16, i64 24, !47, i64 32, !13, i64 48}
!46 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !13, i64 0}
!47 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !48, i64 0, !16, i64 8}
!48 = !{!"float", !14, i64 0}
!49 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEEE", !50, i64 0, !61, i64 144, !65, i64 168, !60, i64 170, !43, i64 172, !43, i64 176, !43, i64 180, !51, i64 184, !66, i64 224, !72, i64 256, !59, i64 272, !73, i64 288}
!50 = !{!"_ZTSN4dali6BufferINS_10CPUBackendEEE", !51, i64 8, !54, i64 48, !57, i64 64, !16, i64 96, !16, i64 104, !43, i64 112, !59, i64 120, !60, i64 136, !60, i64 137}
!51 = !{!"_ZTSN4dali8TypeInfoE", !13, i64 0, !52, i64 8, !16, i64 16, !53, i64 24}
!52 = !{!"_ZTS13_DALIDataType", !14, i64 0}
!53 = !{!"_ZTSSt17basic_string_viewIcSt11char_traitsIcEE", !16, i64 0, !13, i64 8}
!54 = !{!"_ZTSSt10shared_ptrIvE", !55, i64 0}
!55 = !{!"_ZTSSt12__shared_ptrIvLN9__gnu_cxx12_Lock_policyE2EE", !13, i64 0, !56, i64 8}
!56 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !13, i64 0}
!57 = !{!"_ZTSSt8functionIFSt10shared_ptrIhEmEE", !58, i64 0, !13, i64 24}
!58 = !{!"_ZTSSt14_Function_base", !14, i64 0, !13, i64 16}
!59 = !{!"_ZTSN4dali11AccessOrderE", !13, i64 0, !43, i64 8}
!60 = !{!"bool", !14, i64 0}
!61 = !{!"_ZTSSt6vectorIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !62, i64 0}
!62 = !{!"_ZTSSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE", !63, i64 0}
!63 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE12_Vector_implE", !64, i64 0}
!64 = !{!"_ZTSNSt12_Vector_baseIN4dali6TensorINS0_10CPUBackendEEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!65 = !{!"_ZTSN4dali10TensorListINS_10CPUBackendEE5StateE", !60, i64 0, !60, i64 1}
!66 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !67, i64 0, !43, i64 28}
!67 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !68, i64 0, !43, i64 24}
!68 = !{!"_ZTSSt6vectorIlSaIlEE", !69, i64 0}
!69 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !70, i64 0}
!70 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !71, i64 0}
!71 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!72 = !{!"_ZTSN4dali12TensorLayoutE", !14, i64 0}
!73 = !{!"_ZTSN4dali15CUDASharedEventE", !54, i64 0}
!74 = !{!"_ZTSN4dali18MakeContiguousModeE", !14, i64 0}
!75 = !{i8 0, i8 2}
!76 = !{}
!77 = !{!78, !43, i64 0}
!78 = !{!"_ZTSZN4dali17MakeContiguousCPU7RunImplERNS_9WorkspaceEE3$_0", !43, i64 0, !13, i64 8, !13, i64 16}
!79 = !{!13, !13, i64 0}
!80 = distinct !{!80, !81}
!81 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass