; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_unary_binary_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %1, i32 noundef %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6, i8 noundef zeroext %7, i8 noundef zeroext %8, ptr noundef %9) #1 {
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca i8, align 1
  %17 = alloca i8, align 1
  %18 = alloca i8, align 1
  %19 = alloca i8, align 1
  %20 = alloca ptr, align 8
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i32 %1, ptr %12, align 4, !tbaa !9
  store i32 %2, ptr %13, align 4, !tbaa !9
  store i8 %3, ptr %14, align 1, !tbaa !11
  store i8 %4, ptr %15, align 1, !tbaa !11
  store i8 %5, ptr %16, align 1, !tbaa !11
  store i8 %6, ptr %17, align 1, !tbaa !11
  store i8 %7, ptr %18, align 1, !tbaa !11
  store i8 %8, ptr %19, align 1, !tbaa !11
  store ptr %9, ptr %20, align 8, !tbaa !5
  %21 = load i32, ptr %12, align 4, !tbaa !9
  %22 = urem i32 %21, 2
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %32

24:                                               ; preds = %10
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = load i8, ptr %16, align 1, !tbaa !11
  %27 = zext i8 %26 to i32
  %28 = load i8, ptr %14, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  %30 = load i8, ptr %17, align 1, !tbaa !11
  %31 = zext i8 %30 to i32
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %25, i32 noundef 236985363, i32 noundef %27, i32 noundef %29, i8 noundef zeroext 0, i32 noundef %31, i32 noundef 1)
  br label %40

32:                                               ; preds = %10
  %33 = load ptr, ptr %11, align 8, !tbaa !5
  %34 = load i8, ptr %16, align 1, !tbaa !11
  %35 = zext i8 %34 to i32
  %36 = load i8, ptr %15, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = load i8, ptr %17, align 1, !tbaa !11
  %39 = zext i8 %38 to i32
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %33, i32 noundef 236985363, i32 noundef %35, i32 noundef %37, i8 noundef zeroext 0, i32 noundef %39, i32 noundef 1)
  br label %40

40:                                               ; preds = %32, %24
  %41 = load ptr, ptr %11, align 8, !tbaa !5
  %42 = load i8, ptr %17, align 1, !tbaa !11
  %43 = zext i8 %42 to i32
  %44 = load i8, ptr %17, align 1, !tbaa !11
  %45 = zext i8 %44 to i32
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %41, i32 noundef 238139394, i32 noundef %43, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %45, i32 noundef 5)
  %46 = load i32, ptr %12, align 4, !tbaa !9
  %47 = urem i32 %46, 2
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %71

49:                                               ; preds = %40
  %50 = load i32, ptr %12, align 4, !tbaa !9
  %51 = load i32, ptr %13, align 4, !tbaa !9
  %52 = sub i32 %51, 1
  %53 = icmp eq i32 %50, %52
  br i1 %53, label %54, label %64

54:                                               ; preds = %49
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = load i8, ptr %19, align 1, !tbaa !11
  %57 = zext i8 %56 to i32
  %58 = load i8, ptr %17, align 1, !tbaa !11
  %59 = zext i8 %58 to i32
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %55, i32 noundef 1006633990, i32 noundef %57, i32 noundef 127, i32 noundef 1, i32 noundef %59, i32 noundef 0)
  %60 = load ptr, ptr %20, align 8, !tbaa !5
  %61 = getelementptr inbounds i32, ptr %60, i64 0
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = add i32 %62, 1
  store i32 %63, ptr %61, align 4, !tbaa !9
  br label %70

64:                                               ; preds = %49
  %65 = load ptr, ptr %11, align 8, !tbaa !5
  %66 = load i8, ptr %19, align 1, !tbaa !11
  %67 = zext i8 %66 to i32
  %68 = load i8, ptr %17, align 1, !tbaa !11
  %69 = zext i8 %68 to i32
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %65, i32 noundef 1023410182, i32 noundef %67, i32 noundef 127, i32 noundef 0, i32 noundef %69, i32 noundef 0)
  br label %70

70:                                               ; preds = %64, %54
  br label %93

71:                                               ; preds = %40
  %72 = load ptr, ptr %11, align 8, !tbaa !5
  %73 = load i8, ptr %19, align 1, !tbaa !11
  %74 = zext i8 %73 to i32
  %75 = load i8, ptr %18, align 1, !tbaa !11
  %76 = zext i8 %75 to i32
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %72, i32 noundef 1027604486, i32 noundef %74, i32 noundef 127, i32 noundef 0, i32 noundef %76, i32 noundef 0)
  %77 = load ptr, ptr %11, align 8, !tbaa !5
  %78 = load i8, ptr %17, align 1, !tbaa !11
  %79 = zext i8 %78 to i32
  %80 = load i8, ptr %18, align 1, !tbaa !11
  %81 = zext i8 %80 to i32
  %82 = load i8, ptr %17, align 1, !tbaa !11
  %83 = zext i8 %82 to i32
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %77, i32 noundef 245373971, i32 noundef %79, i32 noundef %81, i8 noundef zeroext 0, i32 noundef %83, i32 noundef 5)
  %84 = load ptr, ptr %11, align 8, !tbaa !5
  %85 = load i8, ptr %19, align 1, !tbaa !11
  %86 = zext i8 %85 to i32
  %87 = load i8, ptr %17, align 1, !tbaa !11
  %88 = zext i8 %87 to i32
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %84, i32 noundef 1006633990, i32 noundef %86, i32 noundef 127, i32 noundef 1, i32 noundef %88, i32 noundef 0)
  %89 = load ptr, ptr %20, align 8, !tbaa !5
  %90 = getelementptr inbounds i32, ptr %89, i64 0
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = add i32 %91, 1
  store i32 %92, ptr %90, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %71, %70
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %1, i32 noundef %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6, i8 noundef zeroext %7, i8 noundef zeroext %8, ptr nocapture noundef %9) local_unnamed_addr #1 {
  %11 = and i32 %1, 1
  %12 = icmp eq i32 %11, 0
  %13 = zext i8 %5 to i32
  %14 = zext i8 %6 to i32
  br i1 %12, label %15, label %24

15:                                               ; preds = %10
  %16 = zext i8 %3 to i32
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 236985363, i32 noundef %13, i32 noundef %16, i8 noundef zeroext 0, i32 noundef %14, i32 noundef 1) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 238139394, i32 noundef %14, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %14, i32 noundef 5) #2
  %17 = add i32 %2, -1
  %18 = icmp eq i32 %17, %1
  %19 = zext i8 %8 to i32
  br i1 %18, label %20, label %23

20:                                               ; preds = %15
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1006633990, i32 noundef %19, i32 noundef 127, i32 noundef 1, i32 noundef %14, i32 noundef 0) #2
  %21 = load i32, ptr %9, align 4, !tbaa !5
  %22 = add i32 %21, 1
  store i32 %22, ptr %9, align 4, !tbaa !5
  br label %30

23:                                               ; preds = %15
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1023410182, i32 noundef %19, i32 noundef 127, i32 noundef 0, i32 noundef %14, i32 noundef 0) #2
  br label %30

24:                                               ; preds = %10
  %25 = zext i8 %4 to i32
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 236985363, i32 noundef %13, i32 noundef %25, i8 noundef zeroext 0, i32 noundef %14, i32 noundef 1) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 238139394, i32 noundef %14, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %14, i32 noundef 5) #2
  %26 = zext i8 %8 to i32
  %27 = zext i8 %7 to i32
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %26, i32 noundef 127, i32 noundef 0, i32 noundef %27, i32 noundef 0) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245373971, i32 noundef %14, i32 noundef %27, i8 noundef zeroext 0, i32 noundef %14, i32 noundef 5) #2
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1006633990, i32 noundef %26, i32 noundef 127, i32 noundef 1, i32 noundef %14, i32 noundef 0) #2
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = add i32 %28, 1
  store i32 %29, ptr %9, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %20, %23, %24
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass