; LLVM IR from abeaumont/competitive-programming :: cses/1736.ll (Z3incxxxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.node = type { i64, i64, i64 }

@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushxxx(i64 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3incxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store i64 %3, ptr %9, align 8, !tbaa !5
  store i64 %4, ptr %10, align 8, !tbaa !5
  %13 = load i64, ptr %7, align 8, !tbaa !5
  %14 = load i64, ptr %9, align 8, !tbaa !5
  %15 = icmp slt i64 %13, %14
  br i1 %15, label %20, label %16

16:                                               ; preds = %5
  %17 = load i64, ptr %10, align 8, !tbaa !5
  %18 = load i64, ptr %6, align 8, !tbaa !5
  %19 = icmp slt i64 %17, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %16, %5
  br label %103

21:                                               ; preds = %16
  %22 = load i64, ptr %6, align 8, !tbaa !5
  %23 = load i64, ptr %9, align 8, !tbaa !5
  %24 = icmp sle i64 %22, %23
  br i1 %24, label %25, label %66

25:                                               ; preds = %21
  %26 = load i64, ptr %10, align 8, !tbaa !5
  %27 = load i64, ptr %7, align 8, !tbaa !5
  %28 = icmp sle i64 %26, %27
  br i1 %28, label %29, label %66

29:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %30 = load i64, ptr %9, align 8, !tbaa !5
  %31 = load i64, ptr %6, align 8, !tbaa !5
  %32 = sub nsw i64 %30, %31
  %33 = add nsw i64 %32, 1
  store i64 %33, ptr %11, align 8, !tbaa !5
  %34 = load i64, ptr %8, align 8, !tbaa !5
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %34) #3
  %36 = getelementptr inbounds %struct.node, ptr %35, i32 0, i32 1
  %37 = load i64, ptr %36, align 8, !tbaa !9
  %38 = add nsw i64 %37, 1
  store i64 %38, ptr %36, align 8, !tbaa !9
  %39 = load i64, ptr %11, align 8, !tbaa !5
  %40 = load i64, ptr %8, align 8, !tbaa !5
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %40) #3
  %42 = getelementptr inbounds %struct.node, ptr %41, i32 0, i32 0
  %43 = load i64, ptr %42, align 8, !tbaa !11
  %44 = add nsw i64 %43, %39
  store i64 %44, ptr %42, align 8, !tbaa !11
  %45 = load i64, ptr %10, align 8, !tbaa !5
  %46 = load i64, ptr %9, align 8, !tbaa !5
  %47 = sub nsw i64 %45, %46
  %48 = load i64, ptr %10, align 8, !tbaa !5
  %49 = load i64, ptr %9, align 8, !tbaa !5
  %50 = sub nsw i64 %48, %49
  %51 = add nsw i64 %50, 1
  %52 = mul nsw i64 %47, %51
  %53 = sdiv i64 %52, 2
  %54 = load i64, ptr %11, align 8, !tbaa !5
  %55 = load i64, ptr %10, align 8, !tbaa !5
  %56 = load i64, ptr %9, align 8, !tbaa !5
  %57 = sub nsw i64 %55, %56
  %58 = add nsw i64 %57, 1
  %59 = mul nsw i64 %54, %58
  %60 = add nsw i64 %53, %59
  %61 = load i64, ptr %8, align 8, !tbaa !5
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %61) #3
  %63 = getelementptr inbounds %struct.node, ptr %62, i32 0, i32 2
  %64 = load i64, ptr %63, align 8, !tbaa !12
  %65 = add nsw i64 %64, %60
  store i64 %65, ptr %63, align 8, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %103

66:                                               ; preds = %25, %21
  %67 = load i64, ptr %9, align 8, !tbaa !5
  %68 = load i64, ptr %10, align 8, !tbaa !5
  %69 = load i64, ptr %8, align 8, !tbaa !5
  call void @_Z4pushxxx(i64 noundef %67, i64 noundef %68, i64 noundef %69)
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %70 = load i64, ptr %9, align 8, !tbaa !5
  %71 = load i64, ptr %10, align 8, !tbaa !5
  %72 = add nsw i64 %70, %71
  %73 = sdiv i64 %72, 2
  store i64 %73, ptr %12, align 8, !tbaa !5
  %74 = load i64, ptr %6, align 8, !tbaa !5
  %75 = load i64, ptr %7, align 8, !tbaa !5
  %76 = load i64, ptr %8, align 8, !tbaa !5
  %77 = mul nsw i64 %76, 2
  %78 = load i64, ptr %9, align 8, !tbaa !5
  %79 = load i64, ptr %12, align 8, !tbaa !5
  call void @_Z3incxxxxx(i64 noundef %74, i64 noundef %75, i64 noundef %77, i64 noundef %78, i64 noundef %79)
  %80 = load i64, ptr %6, align 8, !tbaa !5
  %81 = load i64, ptr %7, align 8, !tbaa !5
  %82 = load i64, ptr %8, align 8, !tbaa !5
  %83 = mul nsw i64 %82, 2
  %84 = add nsw i64 %83, 1
  %85 = load i64, ptr %12, align 8, !tbaa !5
  %86 = add nsw i64 %85, 1
  %87 = load i64, ptr %10, align 8, !tbaa !5
  call void @_Z3incxxxxx(i64 noundef %80, i64 noundef %81, i64 noundef %84, i64 noundef %86, i64 noundef %87)
  %88 = load i64, ptr %8, align 8, !tbaa !5
  %89 = mul nsw i64 2, %88
  %90 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %89) #3
  %91 = getelementptr inbounds %struct.node, ptr %90, i32 0, i32 2
  %92 = load i64, ptr %91, align 8, !tbaa !12
  %93 = load i64, ptr %8, align 8, !tbaa !5
  %94 = mul nsw i64 2, %93
  %95 = add nsw i64 %94, 1
  %96 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %95) #3
  %97 = getelementptr inbounds %struct.node, ptr %96, i32 0, i32 2
  %98 = load i64, ptr %97, align 8, !tbaa !12
  %99 = add nsw i64 %92, %98
  %100 = load i64, ptr %8, align 8, !tbaa !5
  %101 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %100) #3
  %102 = getelementptr inbounds %struct.node, ptr %101, i32 0, i32 2
  store i64 %99, ptr %102, align 8, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %103

103:                                              ; preds = %66, %29, %20
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS4node", !6, i64 0, !6, i64 8, !6, i64 16}
!11 = !{!10, !6, i64 0}
!12 = !{!10, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@t = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3incxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4) local_unnamed_addr #0 {
  %6 = icmp slt i64 %1, %3
  %7 = icmp slt i64 %4, %0
  %or.cond = or i1 %6, %7
  br i1 %or.cond, label %common.ret44, label %8

8:                                                ; preds = %5
  %.not = icmp sgt i64 %0, %3
  %.not42 = icmp sgt i64 %4, %1
  %or.cond43 = or i1 %.not, %.not42
  br i1 %or.cond43, label %29, label %9

9:                                                ; preds = %8
  %10 = sub nsw i64 %3, %0
  %11 = add nsw i64 %10, 1
  %12 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %2) #1
  %13 = getelementptr inbounds i8, ptr %12, i64 8
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = add nsw i64 %14, 1
  store i64 %15, ptr %13, align 8, !tbaa !5
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %2) #1
  %17 = load i64, ptr %16, align 8, !tbaa !10
  %18 = add nsw i64 %17, %11
  store i64 %18, ptr %16, align 8, !tbaa !10
  %19 = sub nsw i64 %4, %3
  %20 = add nsw i64 %19, 1
  %21 = mul nsw i64 %20, %19
  %22 = sdiv i64 %21, 2
  %23 = mul nsw i64 %20, %11
  %24 = add nsw i64 %22, %23
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %2) #1
  %26 = getelementptr inbounds i8, ptr %25, i64 16
  %27 = load i64, ptr %26, align 8, !tbaa !11
  %28 = add nsw i64 %24, %27
  store i64 %28, ptr %26, align 8, !tbaa !11
  br label %common.ret44

common.ret44:                                     ; preds = %5, %9, %29
  ret void

29:                                               ; preds = %8
  tail call void @_Z4pushxxx(i64 noundef %3, i64 noundef %4, i64 noundef %2)
  %30 = add nsw i64 %4, %3
  %31 = sdiv i64 %30, 2
  %32 = shl nsw i64 %2, 1
  tail call void @_Z3incxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %32, i64 noundef %3, i64 noundef %31)
  %33 = or disjoint i64 %32, 1
  %34 = add nsw i64 %31, 1
  tail call void @_Z3incxxxxx(i64 noundef %0, i64 noundef %1, i64 noundef %33, i64 noundef %34, i64 noundef %4)
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %32) #1
  %36 = getelementptr inbounds i8, ptr %35, i64 16
  %37 = load i64, ptr %36, align 8, !tbaa !11
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %33) #1
  %39 = getelementptr inbounds i8, ptr %38, i64 16
  %40 = load i64, ptr %39, align 8, !tbaa !11
  %41 = add nsw i64 %40, %37
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @t, i64 noundef %2) #1
  %43 = getelementptr inbounds i8, ptr %42, i64 16
  store i64 %41, ptr %43, align 8, !tbaa !11
  br label %common.ret44
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS4node", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!6, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass