; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fGemm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.9" = type { %"struct.std::_Vector_base.10" }
%"struct.std::_Vector_base.10" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::allocator.0" = type { i8 }
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.Simd::Base::SynetConvolution32fGemmNT" = type { %"class.Simd::SynetConvolution32f", i64, i64, i64, i64, i64, i64, i64 }
%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }

@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZTVN4Simd4Base25SynetConvolution32fGemmNTE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8
@.str.5 = external hidden unnamed_addr constant [13 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE = external hidden unnamed_addr constant [84 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef nonnull align 8 dereferenceable(180)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd9ConvParam5Is1x1Ev(ptr noundef nonnull align 8 dereferenceable(180)) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.9") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32)) #3

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(496) %0, ptr noundef nonnull align 8 dereferenceable(180) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::vector.9", align 8
  %8 = alloca ptr, align 8
  %9 = alloca %"class.std::__cxx11::basic_string", align 8
  %10 = alloca %"class.std::allocator.0", align 1
  %11 = alloca ptr, align 8
  %12 = alloca %"class.std::__cxx11::basic_string", align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %13 = load ptr, ptr %3, align 8
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440) %13, ptr noundef nonnull align 8 dereferenceable(180) %14)
  store ptr getelementptr inbounds inrange(-16, 64) ({ [10 x ptr] }, ptr @_ZTVN4Simd4Base25SynetConvolution32fGemmNTE, i32 0, i32 0, i32 2), ptr %13, align 8, !tbaa !9
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %15, i32 0, i32 20
  %17 = load i64, ptr %16, align 8, !tbaa !11
  %18 = icmp eq i64 %17, 1
  br i1 %18, label %19, label %20

19:                                               ; preds = %2
  br label %22

20:                                               ; preds = %2
  call void @__assert_fail(ptr noundef @.str.5, ptr noundef @.str.1, i32 noundef 600, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE) #7
  unreachable

21:                                               ; No predecessors!
  br label %22

22:                                               ; preds = %21, %19
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %23, i32 0, i32 1
  %25 = load i32, ptr %24, align 8, !tbaa !17
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %46

27:                                               ; preds = %22
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %28, i32 0, i32 5
  %30 = load i64, ptr %29, align 8, !tbaa !21
  %31 = icmp eq i64 %30, 1
  br i1 %31, label %32, label %36

32:                                               ; preds = %27
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = invoke noundef zeroext i1 @_ZNK4Simd9ConvParam5Is1x1Ev(ptr noundef nonnull align 8 dereferenceable(180) %33)
          to label %35 unwind label %40

35:                                               ; preds = %32
  br label %36

36:                                               ; preds = %35, %27
  %37 = phi i1 [ false, %27 ], [ %34, %35 ]
  br i1 %37, label %38, label %39

38:                                               ; preds = %36
  br label %45

39:                                               ; preds = %36
  call void @__assert_fail(ptr noundef @.str.6, ptr noundef @.str.1, i32 noundef 602, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE) #7
  unreachable

40:                                               ; preds = %32
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %5, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %6, align 4
  br label %138

44:                                               ; No predecessors!
  br label %45

45:                                               ; preds = %44, %38
  br label %46

46:                                               ; preds = %45, %22
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %47, i32 0, i32 5
  %49 = load i64, ptr %48, align 8, !tbaa !21
  %50 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 1
  store i64 %49, ptr %50, align 8, !tbaa !22
  %51 = load ptr, ptr %4, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %51, i32 0, i32 6
  %53 = load i64, ptr %52, align 8, !tbaa !40
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %54, i32 0, i32 7
  %56 = load i64, ptr %55, align 8, !tbaa !41
  %57 = mul i64 %53, %56
  %58 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 2
  store i64 %57, ptr %58, align 8, !tbaa !42
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %59, i32 0, i32 0
  %61 = load i64, ptr %60, align 8, !tbaa !43
  %62 = load ptr, ptr %4, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %62, i32 0, i32 10
  %64 = load i64, ptr %63, align 8, !tbaa !44
  %65 = mul i64 %61, %64
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %66, i32 0, i32 11
  %68 = load i64, ptr %67, align 8, !tbaa !45
  %69 = mul i64 %65, %68
  %70 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 3
  store i64 %69, ptr %70, align 8, !tbaa !46
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %71, i32 0, i32 3
  %73 = load i64, ptr %72, align 8, !tbaa !47
  %74 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 4
  store i64 %73, ptr %74, align 8, !tbaa !48
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %75, i32 0, i32 0
  %77 = load i64, ptr %76, align 8, !tbaa !43
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %78, i32 0, i32 1
  %80 = load i64, ptr %79, align 8, !tbaa !49
  %81 = mul i64 %77, %80
  %82 = load ptr, ptr %4, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %82, i32 0, i32 2
  %84 = load i64, ptr %83, align 8, !tbaa !50
  %85 = mul i64 %81, %84
  %86 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 5
  store i64 %85, ptr %86, align 8, !tbaa !51
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %87, i32 0, i32 0
  %89 = load i64, ptr %88, align 8, !tbaa !43
  %90 = load ptr, ptr %4, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %90, i32 0, i32 10
  %92 = load i64, ptr %91, align 8, !tbaa !44
  %93 = mul i64 %89, %92
  %94 = load ptr, ptr %4, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %94, i32 0, i32 11
  %96 = load i64, ptr %95, align 8, !tbaa !45
  %97 = mul i64 %93, %96
  %98 = load ptr, ptr %4, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %98, i32 0, i32 6
  %100 = load i64, ptr %99, align 8, !tbaa !40
  %101 = mul i64 %97, %100
  %102 = load ptr, ptr %4, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %102, i32 0, i32 7
  %104 = load i64, ptr %103, align 8, !tbaa !41
  %105 = mul i64 %101, %104
  %106 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 6
  store i64 %105, ptr %106, align 8, !tbaa !52
  %107 = load ptr, ptr %4, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %107, i32 0, i32 5
  %109 = load i64, ptr %108, align 8, !tbaa !21
  %110 = load ptr, ptr %4, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %110, i32 0, i32 6
  %112 = load i64, ptr %111, align 8, !tbaa !40
  %113 = mul i64 %109, %112
  %114 = load ptr, ptr %4, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %114, i32 0, i32 7
  %116 = load i64, ptr %115, align 8, !tbaa !41
  %117 = mul i64 %113, %116
  %118 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fGemmNT", ptr %13, i32 0, i32 7
  store i64 %117, ptr %118, align 8, !tbaa !53
  %119 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %13, i32 0, i32 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  store ptr @_ZN4Simd4Base9Gemm32fNTEmmmPKfS2_mS2_mS2_Pfm, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #8
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #8
  call void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #8
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32) %9, ptr noundef @.str.2, ptr noundef nonnull align 1 dereferenceable(1) %10)
          to label %120 unwind label %124

120:                                              ; preds = %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #8
  store ptr null, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %12) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #8
  invoke void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind writable sret(%"class.std::vector.9") align 8 %7, ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(32) %9, ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(32) %12)
          to label %121 unwind label %128

121:                                              ; preds = %120
  invoke void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %119, ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %122 unwind label %132

122:                                              ; preds = %121
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #8
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #8
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #8
  %123 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %13, i32 0, i32 13
  store ptr @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf, ptr %123, align 8, !tbaa !54
  ret void

124:                                              ; preds = %46
  %125 = landingpad { ptr, i32 }
          cleanup
  %126 = extractvalue { ptr, i32 } %125, 0
  store ptr %126, ptr %5, align 8
  %127 = extractvalue { ptr, i32 } %125, 1
  store i32 %127, ptr %6, align 4
  br label %137

128:                                              ; preds = %120
  %129 = landingpad { ptr, i32 }
          cleanup
  %130 = extractvalue { ptr, i32 } %129, 0
  store ptr %130, ptr %5, align 8
  %131 = extractvalue { ptr, i32 } %129, 1
  store i32 %131, ptr %6, align 4
  br label %136

132:                                              ; preds = %121
  %133 = landingpad { ptr, i32 }
          cleanup
  %134 = extractvalue { ptr, i32 } %133, 0
  store ptr %134, ptr %5, align 8
  %135 = extractvalue { ptr, i32 } %133, 1
  store i32 %135, ptr %6, align 4
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #8
  br label %136

136:                                              ; preds = %132, %128
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #8
  br label %137

137:                                              ; preds = %136, %124
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #8
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #8
  br label %138

138:                                              ; preds = %137, %40
  call void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440) %13) #8
  br label %139

139:                                              ; preds = %138
  %140 = load ptr, ptr %5, align 8
  %141 = load i32, ptr %6, align 4
  %142 = insertvalue { ptr, i32 } poison, ptr %140, 0
  %143 = insertvalue { ptr, i32 } %142, i32 %141, 1
  resume { ptr, i32 } %143
}

declare void @_ZN4Simd4Base9Gemm32fNTEmmmPKfS2_mS2_mS2_Pfm(i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 144}
!12 = !{!"_ZTS25SimdConvolutionParameters", !13, i64 0, !13, i64 8, !13, i64 16, !14, i64 24, !15, i64 28, !13, i64 32, !13, i64 40, !13, i64 48, !14, i64 56, !15, i64 60, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !16, i64 152}
!13 = !{!"long", !7, i64 0}
!14 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!17 = !{!18, !19, i64 160}
!18 = !{!"_ZTSN4Simd9ConvParamE", !12, i64 0, !19, i64 160, !13, i64 168, !20, i64 176}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!12, !13, i64 32}
!22 = !{!23, !13, i64 440}
!23 = !{!"_ZTSN4Simd4Base25SynetConvolution32fGemmNTE", !24, i64 0, !13, i64 440, !13, i64 448, !13, i64 456, !13, i64 464, !13, i64 472, !13, i64 480, !13, i64 488}
!24 = !{!"_ZTSN4Simd19SynetConvolution32fE", !25, i64 0, !18, i64 8, !26, i64 192, !27, i64 208, !27, i64 212, !6, i64 216, !6, i64 224, !6, i64 232, !28, i64 240, !35, i64 304, !26, i64 368, !6, i64 384, !6, i64 392, !6, i64 400, !33, i64 408}
!25 = !{!"_ZTSN4Simd9DeletableE"}
!26 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !13, i64 8}
!27 = !{!"float", !7, i64 0}
!28 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !6, i64 0, !29, i64 8, !33, i64 32}
!29 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !34, i64 0, !13, i64 8, !7, i64 16}
!34 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!35 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !6, i64 0, !36, i64 8, !33, i64 32}
!36 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!40 = !{!12, !13, i64 40}
!41 = !{!12, !13, i64 48}
!42 = !{!23, !13, i64 448}
!43 = !{!12, !13, i64 0}
!44 = !{!12, !13, i64 64}
!45 = !{!12, !13, i64 72}
!46 = !{!23, !13, i64 456}
!47 = !{!18, !13, i64 168}
!48 = !{!23, !13, i64 464}
!49 = !{!12, !13, i64 8}
!50 = !{!12, !13, i64 16}
!51 = !{!23, !13, i64 472}
!52 = !{!23, !13, i64 480}
!53 = !{!23, !13, i64 488}
!54 = !{!24, !6, i64 400}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.9" = type { %"struct.std::_Vector_base.10" }
%"struct.std::_Vector_base.10" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::GemmFunc, std::allocator<Simd::GemmFunc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::allocator.0" = type { i8 }

@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZTVN4Simd4Base25SynetConvolution32fGemmNTE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8
@.str.5 = external hidden unnamed_addr constant [13 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE = external hidden unnamed_addr constant [84 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef nonnull align 8 dereferenceable(180)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd9ConvParam5Is1x1Ev(ptr noundef nonnull align 8 dereferenceable(180)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.9") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(496) %0, ptr noundef nonnull align 8 dereferenceable(180) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector.9", align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.std::__cxx11::basic_string", align 8
  %6 = alloca %"class.std::allocator.0", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.std::__cxx11::basic_string", align 8
  tail call void @_ZN4Simd19SynetConvolution32fC2ERKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(440) %0, ptr noundef nonnull align 8 dereferenceable(180) %1)
  store ptr getelementptr inbounds inrange(-16, 64) (i8, ptr @_ZTVN4Simd4Base25SynetConvolution32fGemmNTE, i64 16), ptr %0, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %1, i64 144
  %10 = load i64, ptr %9, align 8, !tbaa !8
  %11 = icmp eq i64 %10, 1
  br i1 %11, label %13, label %12

12:                                               ; preds = %2
  tail call void @__assert_fail(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.1, i32 noundef 600, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE) #7
  unreachable

13:                                               ; preds = %2
  %14 = getelementptr inbounds i8, ptr %1, i64 160
  %15 = load i32, ptr %14, align 8, !tbaa !15
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %25, label %16

16:                                               ; preds = %13
  %17 = getelementptr inbounds i8, ptr %1, i64 32
  %18 = load i64, ptr %17, align 8, !tbaa !19
  %19 = icmp eq i64 %18, 1
  br i1 %19, label %20, label %.critedge

20:                                               ; preds = %16
  %21 = invoke noundef zeroext i1 @_ZNK4Simd9ConvParam5Is1x1Ev(ptr noundef nonnull align 8 dereferenceable(180) %1)
          to label %22 unwind label %23

22:                                               ; preds = %20
  br i1 %21, label %25, label %.critedge

.critedge:                                        ; preds = %16, %22
  tail call void @__assert_fail(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.1, i32 noundef 602, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetConvolution32fGemmNTC2ERKNS_9ConvParamE) #7
  unreachable

23:                                               ; preds = %20
  %24 = landingpad { ptr, i32 }
          cleanup
  br label %70

25:                                               ; preds = %22, %13
  %26 = getelementptr inbounds i8, ptr %1, i64 32
  %27 = load i64, ptr %26, align 8, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %0, i64 440
  store i64 %27, ptr %28, align 8, !tbaa !20
  %29 = getelementptr inbounds i8, ptr %1, i64 40
  %30 = load i64, ptr %29, align 8, !tbaa !39
  %31 = getelementptr inbounds i8, ptr %1, i64 48
  %32 = load i64, ptr %31, align 8, !tbaa !40
  %33 = mul i64 %32, %30
  %34 = getelementptr inbounds i8, ptr %0, i64 448
  store i64 %33, ptr %34, align 8, !tbaa !41
  %35 = load i64, ptr %1, align 8, !tbaa !42
  %36 = getelementptr inbounds i8, ptr %1, i64 64
  %37 = load i64, ptr %36, align 8, !tbaa !43
  %38 = mul i64 %37, %35
  %39 = getelementptr inbounds i8, ptr %1, i64 72
  %40 = load i64, ptr %39, align 8, !tbaa !44
  %41 = mul i64 %38, %40
  %42 = getelementptr inbounds i8, ptr %0, i64 456
  store i64 %41, ptr %42, align 8, !tbaa !45
  %43 = getelementptr inbounds i8, ptr %1, i64 168
  %44 = load i64, ptr %43, align 8, !tbaa !46
  %45 = getelementptr inbounds i8, ptr %0, i64 464
  store i64 %44, ptr %45, align 8, !tbaa !47
  %46 = getelementptr inbounds i8, ptr %1, i64 8
  %47 = load i64, ptr %46, align 8, !tbaa !48
  %48 = mul i64 %47, %35
  %49 = getelementptr inbounds i8, ptr %1, i64 16
  %50 = load i64, ptr %49, align 8, !tbaa !49
  %51 = mul i64 %48, %50
  %52 = getelementptr inbounds i8, ptr %0, i64 472
  store i64 %51, ptr %52, align 8, !tbaa !50
  %53 = mul i64 %33, %41
  %54 = getelementptr inbounds i8, ptr %0, i64 480
  store i64 %53, ptr %54, align 8, !tbaa !51
  %55 = mul i64 %33, %27
  %56 = getelementptr inbounds i8, ptr %0, i64 488
  store i64 %55, ptr %56, align 8, !tbaa !52
  %57 = getelementptr inbounds i8, ptr %0, i64 240
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #8
  store ptr @_ZN4Simd4Base9Gemm32fNTEmmmPKfS2_mS2_mS2_Pfm, ptr %4, align 8, !tbaa !53
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #8
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #8
  call void @_ZNSaIcEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #8
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_(ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull @.str.2, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %58 unwind label %62

58:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #8
  store ptr null, ptr %7, align 8, !tbaa !53
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %8) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #8
  invoke void @_ZN4Simd13InitGemmFuncsERKPFvmmmPKfS1_mS1_mS1_PfmERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES6_SE_(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.9") align 8 %3, ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(32) %8)
          to label %59 unwind label %64

59:                                               ; preds = %58
  invoke void @_ZN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEE4InitERKSt6vectorIS1_SaIS1_EE(ptr noundef nonnull align 8 dereferenceable(64) %57, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %60 unwind label %66

60:                                               ; preds = %59
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #8
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #8
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #8
  %61 = getelementptr inbounds i8, ptr %0, i64 400
  store ptr @_ZN4Simd4Base28ConvolutionBiasAndActivationEPKfmm29SimdConvolutionActivationTypeS2_8SimdBoolPf, ptr %61, align 8, !tbaa !54
  ret void

62:                                               ; preds = %25
  %63 = landingpad { ptr, i32 }
          cleanup
  br label %69

64:                                               ; preds = %58
  %65 = landingpad { ptr, i32 }
          cleanup
  br label %68

66:                                               ; preds = %59
  %67 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIN4Simd8GemmFuncESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #8
  br label %68

68:                                               ; preds = %66, %64
  %.pn = phi { ptr, i32 } [ %67, %66 ], [ %65, %64 ]
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #8
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #8
  br label %69

69:                                               ; preds = %68, %62
  %.pn.pn = phi { ptr, i32 } [ %.pn, %68 ], [ %63, %62 ]
  call void @_ZNSt15__new_allocatorIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #8
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #8
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #8
  br label %70

70:                                               ; preds = %69, %23
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %69 ], [ %24, %23 ]
  call void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440) %0) #8
  resume { ptr, i32 } %.pn.pn.pn
}

declare void @_ZN4Simd4Base9Gemm32fNTEmmmPKfS2_mS2_mS2_Pfm(i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, i64 noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32fD2Ev(ptr noundef nonnull align 8 dereferenceable(440)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 144}
!9 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !12, i64 24, !13, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !12, i64 56, !13, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !14, i64 152}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !11, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !11, i64 0}
!14 = !{!"_ZTS29SimdConvolutionActivationType", !11, i64 0}
!15 = !{!16, !17, i64 160}
!16 = !{!"_ZTSN4Simd9ConvParamE", !9, i64 0, !17, i64 160, !10, i64 168, !18, i64 176}
!17 = !{!"_ZTS8SimdBool", !11, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !11, i64 0}
!19 = !{!9, !10, i64 32}
!20 = !{!21, !10, i64 440}
!21 = !{!"_ZTSN4Simd4Base25SynetConvolution32fGemmNTE", !22, i64 0, !10, i64 440, !10, i64 448, !10, i64 456, !10, i64 464, !10, i64 472, !10, i64 480, !10, i64 488}
!22 = !{!"_ZTSN4Simd19SynetConvolution32fE", !23, i64 0, !16, i64 8, !24, i64 192, !26, i64 208, !26, i64 212, !25, i64 216, !25, i64 224, !25, i64 232, !27, i64 240, !34, i64 304, !24, i64 368, !25, i64 384, !25, i64 392, !25, i64 400, !32, i64 408}
!23 = !{!"_ZTSN4Simd9DeletableE"}
!24 = !{!"_ZTSN4Simd5ArrayIfEE", !25, i64 0, !10, i64 8}
!25 = !{!"any pointer", !11, i64 0}
!26 = !{!"float", !11, i64 0}
!27 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !25, i64 0, !28, i64 8, !32, i64 32}
!28 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !25, i64 0, !25, i64 8, !25, i64 16}
!32 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !33, i64 0, !10, i64 8, !11, i64 16}
!33 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !25, i64 0}
!34 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !25, i64 0, !35, i64 8, !32, i64 32}
!35 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !25, i64 0, !25, i64 8, !25, i64 16}
!39 = !{!9, !10, i64 40}
!40 = !{!9, !10, i64 48}
!41 = !{!21, !10, i64 448}
!42 = !{!9, !10, i64 0}
!43 = !{!9, !10, i64 64}
!44 = !{!9, !10, i64 72}
!45 = !{!21, !10, i64 456}
!46 = !{!16, !10, i64 168}
!47 = !{!21, !10, i64 464}
!48 = !{!9, !10, i64 8}
!49 = !{!9, !10, i64 16}
!50 = !{!21, !10, i64 472}
!51 = !{!21, !10, i64 480}
!52 = !{!21, !10, i64 488}
!53 = !{!25, !25, i64 0}
!54 = !{!22, !25, i64 400}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass