; LLVM IR from libxsmm/libxsmm :: src (generator_common_rv64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_rv64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_bcastload_masked_vreg_rv64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #1 {
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i8, align 1
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store i32 %1, ptr %11, align 4, !tbaa !9
  store i32 %2, ptr %12, align 4, !tbaa !9
  store i32 %3, ptr %13, align 4, !tbaa !9
  store i32 %4, ptr %14, align 4, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %19) #3
  %22 = load i32, ptr %18, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %9
  br label %27

25:                                               ; preds = %9
  %26 = load i32, ptr %14, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %25, %24
  %28 = phi i32 [ 0, %24 ], [ %26, %25 ]
  %29 = trunc i32 %28 to i8
  store i8 %29, ptr %19, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %30 = load i32, ptr %14, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 1
  br i1 %31, label %32, label %33

32:                                               ; preds = %27
  br label %44

33:                                               ; preds = %27
  %34 = load i32, ptr %14, align 4, !tbaa !9
  %35 = icmp eq i32 %34, 2
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  br label %42

37:                                               ; preds = %33
  %38 = load i32, ptr %14, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 4
  %40 = zext i1 %39 to i64
  %41 = select i1 %39, i32 24583, i32 28679
  br label %42

42:                                               ; preds = %37, %36
  %43 = phi i32 [ 20487, %36 ], [ %41, %37 ]
  br label %44

44:                                               ; preds = %42, %32
  %45 = phi i32 [ 7, %32 ], [ %43, %42 ]
  store i32 %45, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %46 = load i32, ptr %14, align 4, !tbaa !9
  %47 = icmp eq i32 %46, 1
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  br label %60

49:                                               ; preds = %44
  %50 = load i32, ptr %14, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 2
  br i1 %51, label %52, label %53

52:                                               ; preds = %49
  br label %58

53:                                               ; preds = %49
  %54 = load i32, ptr %14, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 4
  %56 = zext i1 %55 to i64
  %57 = select i1 %55, i32 2, i32 3
  br label %58

58:                                               ; preds = %53, %52
  %59 = phi i32 [ 1, %52 ], [ %57, %53 ]
  br label %60

60:                                               ; preds = %58, %48
  %61 = phi i32 [ 0, %48 ], [ %59, %58 ]
  store i32 %61, ptr %21, align 4, !tbaa !9
  %62 = load i32, ptr %15, align 4, !tbaa !9
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %64, label %68

64:                                               ; preds = %60
  %65 = load ptr, ptr %10, align 8, !tbaa !5
  %66 = load i32, ptr %17, align 4, !tbaa !9
  %67 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef %65, i32 noundef %66, i32 noundef 31, i32 noundef %67, i32 noundef 0)
  br label %68

68:                                               ; preds = %64, %60
  %69 = load ptr, ptr %10, align 8, !tbaa !5
  %70 = load i32, ptr %20, align 4, !tbaa !9
  %71 = load i32, ptr %11, align 4, !tbaa !9
  %72 = load i32, ptr %12, align 4, !tbaa !9
  %73 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_move(ptr noundef %69, i32 noundef %70, i32 noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef 1)
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %74, i32 noundef 1107300439, i32 noundef 0, i32 noundef %75, i32 noundef 10, i32 noundef 1)
  %76 = load ptr, ptr %10, align 8, !tbaa !5
  %77 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %76, i32 noundef 1577078871, i32 noundef 10, i32 noundef 0, i32 noundef %77, i32 noundef 1)
  %78 = load i8, ptr %19, align 1, !tbaa !11
  %79 = icmp ne i8 %78, 0
  br i1 %79, label %80, label %86

80:                                               ; preds = %68
  %81 = load ptr, ptr %10, align 8, !tbaa !5
  %82 = load i32, ptr %11, align 4, !tbaa !9
  %83 = load i32, ptr %11, align 4, !tbaa !9
  %84 = load i8, ptr %19, align 1, !tbaa !11
  %85 = zext i8 %84 to i32
  call void @libxsmm_rv64_instruction_alu_compute_imm12(ptr noundef %81, i32 noundef 19, i32 noundef %82, i32 noundef %83, i32 noundef %85)
  br label %86

86:                                               ; preds = %80, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %19) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_rv64_instruction_rvv_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_rv64_instruction_rvv_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_rv64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_bcastload_masked_vreg_rv64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #1 {
  %10 = icmp eq i32 %8, 0
  %11 = trunc i32 %4 to i8
  %12 = select i1 %10, i8 0, i8 %11
  switch i32 %4, label %13 [
    i32 1, label %.thread27
    i32 2, label %.thread27.fold.split
  ]

13:                                               ; preds = %9
  %14 = icmp eq i32 %4, 4
  %15 = select i1 %14, i32 24583, i32 28679
  %16 = select i1 %14, i32 2, i32 3
  br label %.thread27

.thread27.fold.split:                             ; preds = %9
  br label %.thread27

.thread27:                                        ; preds = %9, %.thread27.fold.split, %13
  %17 = phi i32 [ %15, %13 ], [ 7, %9 ], [ 20487, %.thread27.fold.split ]
  %18 = phi i32 [ %16, %13 ], [ 0, %9 ], [ 1, %.thread27.fold.split ]
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %20, label %19

19:                                               ; preds = %.thread27
  tail call void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef %0, i32 noundef %7, i32 noundef 31, i32 noundef %18, i32 noundef 0) #2
  br label %20

20:                                               ; preds = %19, %.thread27
  tail call void @libxsmm_rv64_instruction_rvv_move(ptr noundef %0, i32 noundef %17, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef 1) #2
  tail call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %0, i32 noundef 1107300439, i32 noundef 0, i32 noundef %3, i32 noundef 10, i32 noundef 1) #2
  tail call void @libxsmm_rv64_instruction_rvv_compute(ptr noundef %0, i32 noundef 1577078871, i32 noundef 10, i32 noundef 0, i32 noundef %3, i32 noundef 1) #2
  %.not26 = icmp eq i8 %12, 0
  br i1 %.not26, label %23, label %21

21:                                               ; preds = %20
  %22 = zext i8 %12 to i32
  tail call void @libxsmm_rv64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 19, i32 noundef %1, i32 noundef %1, i32 noundef %22) #2
  br label %23

23:                                               ; preds = %21, %20
  ret void
}

declare void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_rv64_instruction_rvv_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_rv64_instruction_rvv_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass