; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetActivation.ll (ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr noundef %0, i64 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = getelementptr inbounds float, ptr %15, i64 0
  %17 = load float, ptr %16, align 4, !tbaa !11
  store float %17, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  %19 = getelementptr inbounds float, ptr %18, i64 0
  %20 = load float, ptr %19, align 4, !tbaa !11
  store float %20, ptr %12, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %21 = load i64, ptr %7, align 8, !tbaa !9
  %22 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %21, i64 noundef 4)
  store i64 %22, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !9
  br label %23

23:                                               ; preds = %76, %5
  %24 = load i64, ptr %14, align 8, !tbaa !9
  %25 = load i64, ptr %13, align 8, !tbaa !9
  %26 = icmp ult i64 %24, %25
  br i1 %26, label %27, label %79

27:                                               ; preds = %23
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i64, ptr %14, align 8, !tbaa !9
  %30 = add i64 %29, 0
  %31 = getelementptr inbounds float, ptr %28, i64 %30
  %32 = load float, ptr %31, align 4, !tbaa !11
  %33 = load float, ptr %11, align 4, !tbaa !11
  %34 = load float, ptr %12, align 4, !tbaa !11
  %35 = call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %32, float noundef %33, float noundef %34)
  %36 = load ptr, ptr %10, align 8, !tbaa !5
  %37 = load i64, ptr %14, align 8, !tbaa !9
  %38 = add i64 %37, 0
  %39 = getelementptr inbounds float, ptr %36, i64 %38
  store float %35, ptr %39, align 4, !tbaa !11
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = load i64, ptr %14, align 8, !tbaa !9
  %42 = add i64 %41, 1
  %43 = getelementptr inbounds float, ptr %40, i64 %42
  %44 = load float, ptr %43, align 4, !tbaa !11
  %45 = load float, ptr %11, align 4, !tbaa !11
  %46 = load float, ptr %12, align 4, !tbaa !11
  %47 = call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %44, float noundef %45, float noundef %46)
  %48 = load ptr, ptr %10, align 8, !tbaa !5
  %49 = load i64, ptr %14, align 8, !tbaa !9
  %50 = add i64 %49, 1
  %51 = getelementptr inbounds float, ptr %48, i64 %50
  store float %47, ptr %51, align 4, !tbaa !11
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = load i64, ptr %14, align 8, !tbaa !9
  %54 = add i64 %53, 2
  %55 = getelementptr inbounds float, ptr %52, i64 %54
  %56 = load float, ptr %55, align 4, !tbaa !11
  %57 = load float, ptr %11, align 4, !tbaa !11
  %58 = load float, ptr %12, align 4, !tbaa !11
  %59 = call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %56, float noundef %57, float noundef %58)
  %60 = load ptr, ptr %10, align 8, !tbaa !5
  %61 = load i64, ptr %14, align 8, !tbaa !9
  %62 = add i64 %61, 2
  %63 = getelementptr inbounds float, ptr %60, i64 %62
  store float %59, ptr %63, align 4, !tbaa !11
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = load i64, ptr %14, align 8, !tbaa !9
  %66 = add i64 %65, 3
  %67 = getelementptr inbounds float, ptr %64, i64 %66
  %68 = load float, ptr %67, align 4, !tbaa !11
  %69 = load float, ptr %11, align 4, !tbaa !11
  %70 = load float, ptr %12, align 4, !tbaa !11
  %71 = call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %68, float noundef %69, float noundef %70)
  %72 = load ptr, ptr %10, align 8, !tbaa !5
  %73 = load i64, ptr %14, align 8, !tbaa !9
  %74 = add i64 %73, 3
  %75 = getelementptr inbounds float, ptr %72, i64 %74
  store float %71, ptr %75, align 4, !tbaa !11
  br label %76

76:                                               ; preds = %27
  %77 = load i64, ptr %14, align 8, !tbaa !9
  %78 = add i64 %77, 4
  store i64 %78, ptr %14, align 8, !tbaa !9
  br label %23, !llvm.loop !13

79:                                               ; preds = %23
  br label %80

80:                                               ; preds = %95, %79
  %81 = load i64, ptr %14, align 8, !tbaa !9
  %82 = load i64, ptr %7, align 8, !tbaa !9
  %83 = icmp ult i64 %81, %82
  br i1 %83, label %84, label %98

84:                                               ; preds = %80
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  %86 = load i64, ptr %14, align 8, !tbaa !9
  %87 = getelementptr inbounds float, ptr %85, i64 %86
  %88 = load float, ptr %87, align 4, !tbaa !11
  %89 = load float, ptr %11, align 4, !tbaa !11
  %90 = load float, ptr %12, align 4, !tbaa !11
  %91 = call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %88, float noundef %89, float noundef %90)
  %92 = load ptr, ptr %10, align 8, !tbaa !5
  %93 = load i64, ptr %14, align 8, !tbaa !9
  %94 = getelementptr inbounds float, ptr %92, i64 %93
  store float %91, ptr %94, align 4, !tbaa !11
  br label %95

95:                                               ; preds = %84
  %96 = load i64, ptr %14, align 8, !tbaa !9
  %97 = add i64 %96, 1
  store i64 %97, ptr %14, align 8, !tbaa !9
  br label %80, !llvm.loop !15

98:                                               ; preds = %80
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef, float noundef, float noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base14SynetHswish32fEPKfmS2_S2_Pf(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #1 {
  %6 = load float, ptr %2, align 4, !tbaa !5
  %7 = load float, ptr %3, align 4, !tbaa !5
  %8 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 4)
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %5
  %.0.lcssa = phi i64 [ 0, %5 ], [ %29, %.lr.ph ]
  %9 = icmp ult i64 %.0.lcssa, %1
  br i1 %9, label %.lr.ph40, label %._crit_edge

.lr.ph:                                           ; preds = %5, %.lr.ph
  %.038 = phi i64 [ %29, %.lr.ph ], [ 0, %5 ]
  %10 = getelementptr inbounds float, ptr %0, i64 %.038
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %11, float noundef %6, float noundef %7)
  %13 = getelementptr inbounds float, ptr %4, i64 %.038
  store float %12, ptr %13, align 4, !tbaa !5
  %14 = or disjoint i64 %.038, 1
  %15 = getelementptr inbounds float, ptr %0, i64 %14
  %16 = load float, ptr %15, align 4, !tbaa !5
  %17 = tail call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %16, float noundef %6, float noundef %7)
  %18 = getelementptr inbounds float, ptr %4, i64 %14
  store float %17, ptr %18, align 4, !tbaa !5
  %19 = or disjoint i64 %.038, 2
  %20 = getelementptr inbounds float, ptr %0, i64 %19
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = tail call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %21, float noundef %6, float noundef %7)
  %23 = getelementptr inbounds float, ptr %4, i64 %19
  store float %22, ptr %23, align 4, !tbaa !5
  %24 = or disjoint i64 %.038, 3
  %25 = getelementptr inbounds float, ptr %0, i64 %24
  %26 = load float, ptr %25, align 4, !tbaa !5
  %27 = tail call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %26, float noundef %6, float noundef %7)
  %28 = getelementptr inbounds float, ptr %4, i64 %24
  store float %27, ptr %28, align 4, !tbaa !5
  %29 = add i64 %.038, 4
  %30 = icmp ult i64 %29, %8
  br i1 %30, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph40:                                         ; preds = %.preheader, %.lr.ph40
  %.139 = phi i64 [ %35, %.lr.ph40 ], [ %.0.lcssa, %.preheader ]
  %31 = getelementptr inbounds float, ptr %0, i64 %.139
  %32 = load float, ptr %31, align 4, !tbaa !5
  %33 = tail call noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef %32, float noundef %6, float noundef %7)
  %34 = getelementptr inbounds float, ptr %4, i64 %.139
  store float %33, ptr %34, align 4, !tbaa !5
  %35 = add i64 %.139, 1
  %exitcond.not = icmp eq i64 %35, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph40, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph40, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd4Base14SynetHswish32fEfff(float noundef, float noundef, float noundef) local_unnamed_addr #0

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass