; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseAbsGradientSaturatedSum)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base23AbsGradientSaturatedSumEPKhmmmPhm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i64 %1, ptr %8, align 8, !tbaa !9
  store i64 %2, ptr %9, align 8, !tbaa !9
  store i64 %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !5
  store i64 %5, ptr %12, align 8, !tbaa !9
  %18 = load ptr, ptr %11, align 8, !tbaa !5
  %19 = load i64, ptr %9, align 8, !tbaa !9
  call void @llvm.memset.p0.i64(ptr align 1 %18, i8 0, i64 %19, i1 false)
  %20 = load i64, ptr %8, align 8, !tbaa !9
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %21, i64 %20
  store ptr %22, ptr %7, align 8, !tbaa !5
  %23 = load i64, ptr %12, align 8, !tbaa !9
  %24 = load ptr, ptr %11, align 8, !tbaa !5
  %25 = getelementptr inbounds i8, ptr %24, i64 %23
  store ptr %25, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  store i64 2, ptr %13, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %91, %6
  %27 = load i64, ptr %13, align 8, !tbaa !9
  %28 = load i64, ptr %10, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  br label %94

31:                                               ; preds = %26
  %32 = load ptr, ptr %11, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %32, i64 0
  store i8 0, ptr %33, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  store i64 1, ptr %15, align 8, !tbaa !9
  br label %34

34:                                               ; preds = %77, %31
  %35 = load i64, ptr %15, align 8, !tbaa !9
  %36 = load i64, ptr %9, align 8, !tbaa !9
  %37 = sub i64 %36, 1
  %38 = icmp ult i64 %35, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %34
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  br label %80

40:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = load i64, ptr %15, align 8, !tbaa !9
  %43 = load i64, ptr %8, align 8, !tbaa !9
  %44 = sub i64 %42, %43
  %45 = getelementptr inbounds i8, ptr %41, i64 %44
  %46 = load i8, ptr %45, align 1, !tbaa !11
  %47 = zext i8 %46 to i32
  %48 = load ptr, ptr %7, align 8, !tbaa !5
  %49 = load i64, ptr %15, align 8, !tbaa !9
  %50 = load i64, ptr %8, align 8, !tbaa !9
  %51 = add i64 %49, %50
  %52 = getelementptr inbounds i8, ptr %48, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !11
  %54 = zext i8 %53 to i32
  %55 = call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %47, i32 noundef %54)
  store i32 %55, ptr %16, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = load i64, ptr %15, align 8, !tbaa !9
  %58 = sub i64 %57, 1
  %59 = getelementptr inbounds i8, ptr %56, i64 %58
  %60 = load i8, ptr %59, align 1, !tbaa !11
  %61 = zext i8 %60 to i32
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = load i64, ptr %15, align 8, !tbaa !9
  %64 = add i64 %63, 1
  %65 = getelementptr inbounds i8, ptr %62, i64 %64
  %66 = load i8, ptr %65, align 1, !tbaa !11
  %67 = zext i8 %66 to i32
  %68 = call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %61, i32 noundef %67)
  store i32 %68, ptr %17, align 4, !tbaa !12
  %69 = load i32, ptr %17, align 4, !tbaa !12
  %70 = load i32, ptr %16, align 4, !tbaa !12
  %71 = add nsw i32 %69, %70
  %72 = call noundef i32 @_ZN4Simd4Base5MinU8Eii(i32 noundef %71, i32 noundef 255)
  %73 = trunc i32 %72 to i8
  %74 = load ptr, ptr %11, align 8, !tbaa !5
  %75 = load i64, ptr %15, align 8, !tbaa !9
  %76 = getelementptr inbounds i8, ptr %74, i64 %75
  store i8 %73, ptr %76, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %77

77:                                               ; preds = %40
  %78 = load i64, ptr %15, align 8, !tbaa !9
  %79 = add i64 %78, 1
  store i64 %79, ptr %15, align 8, !tbaa !9
  br label %34, !llvm.loop !14

80:                                               ; preds = %39
  %81 = load ptr, ptr %11, align 8, !tbaa !5
  %82 = load i64, ptr %9, align 8, !tbaa !9
  %83 = sub i64 %82, 1
  %84 = getelementptr inbounds i8, ptr %81, i64 %83
  store i8 0, ptr %84, align 1, !tbaa !11
  %85 = load i64, ptr %8, align 8, !tbaa !9
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = getelementptr inbounds i8, ptr %86, i64 %85
  store ptr %87, ptr %7, align 8, !tbaa !5
  %88 = load i64, ptr %12, align 8, !tbaa !9
  %89 = load ptr, ptr %11, align 8, !tbaa !5
  %90 = getelementptr inbounds i8, ptr %89, i64 %88
  store ptr %90, ptr %11, align 8, !tbaa !5
  br label %91

91:                                               ; preds = %80
  %92 = load i64, ptr %13, align 8, !tbaa !9
  %93 = add i64 %92, 1
  store i64 %93, ptr %13, align 8, !tbaa !9
  br label %26, !llvm.loop !16

94:                                               ; preds = %30
  %95 = load ptr, ptr %11, align 8, !tbaa !5
  %96 = load i64, ptr %9, align 8, !tbaa !9
  call void @llvm.memset.p0.i64(ptr align 1 %95, i8 0, i64 %96, i1 false)
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base5MinU8Eii(i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base23AbsGradientSaturatedSumEPKhmmmPhm(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4, i64 noundef %5) local_unnamed_addr #0 {
  tail call void @llvm.memset.p0.i64(ptr align 1 %4, i8 0, i64 %2, i1 false)
  %.03441 = getelementptr inbounds i8, ptr %4, i64 %5
  %7 = icmp ugt i64 %3, 2
  br i1 %7, label %.lr.ph47, label %._crit_edge48

.lr.ph47:                                         ; preds = %6
  %8 = add i64 %2, -1
  %9 = icmp ugt i64 %8, 1
  br i1 %9, label %.lr.ph.us, label %.lr.ph47.split.preheader

.lr.ph47.split.preheader:                         ; preds = %.lr.ph47
  %10 = add i64 %3, -2
  %11 = add i64 %3, -3
  %xtraiter = and i64 %10, 3
  %12 = icmp ult i64 %11, 3
  br i1 %12, label %._crit_edge48.loopexit57.unr-lcssa, label %.lr.ph47.split.preheader.new

.lr.ph47.split.preheader.new:                     ; preds = %.lr.ph47.split.preheader
  %unroll_iter = and i64 %10, -4
  br label %.lr.ph47.split

.lr.ph.us:                                        ; preds = %.lr.ph47, %._crit_edge.us
  %.03445.us = phi ptr [ %.034.us, %._crit_edge.us ], [ %.03441, %.lr.ph47 ]
  %.pn3843.us = phi ptr [ %.044.us, %._crit_edge.us ], [ %0, %.lr.ph47 ]
  %.03642.us = phi i64 [ %35, %._crit_edge.us ], [ 2, %.lr.ph47 ]
  %.044.us = getelementptr inbounds i8, ptr %.pn3843.us, i64 %1
  store i8 0, ptr %.03445.us, align 1, !tbaa !5
  br label %13

13:                                               ; preds = %.lr.ph.us, %13
  %.03539.us = phi i64 [ 1, %.lr.ph.us ], [ %25, %13 ]
  %14 = getelementptr inbounds i8, ptr %.pn3843.us, i64 %.03539.us
  %15 = load i8, ptr %14, align 1, !tbaa !5
  %16 = zext i8 %15 to i32
  %17 = getelementptr i8, ptr %.044.us, i64 %.03539.us
  %18 = getelementptr i8, ptr %17, i64 %1
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = tail call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %16, i32 noundef %20)
  %22 = getelementptr i8, ptr %17, i64 -1
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %24 = zext i8 %23 to i32
  %25 = add nuw i64 %.03539.us, 1
  %26 = getelementptr inbounds i8, ptr %.044.us, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  %29 = tail call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %24, i32 noundef %28)
  %30 = add nsw i32 %29, %21
  %31 = tail call noundef i32 @_ZN4Simd4Base5MinU8Eii(i32 noundef %30, i32 noundef 255)
  %32 = trunc i32 %31 to i8
  %33 = getelementptr inbounds i8, ptr %.03445.us, i64 %.03539.us
  store i8 %32, ptr %33, align 1, !tbaa !5
  %exitcond51.not = icmp eq i64 %25, %8
  br i1 %exitcond51.not, label %._crit_edge.us, label %13, !llvm.loop !8

._crit_edge.us:                                   ; preds = %13
  %34 = getelementptr inbounds i8, ptr %.03445.us, i64 %8
  store i8 0, ptr %34, align 1, !tbaa !5
  %35 = add nuw i64 %.03642.us, 1
  %.034.us = getelementptr inbounds i8, ptr %.03445.us, i64 %5
  %exitcond52.not = icmp eq i64 %35, %3
  br i1 %exitcond52.not, label %._crit_edge48, label %.lr.ph.us, !llvm.loop !10

._crit_edge48.loopexit57.unr-lcssa:               ; preds = %.lr.ph47.split, %.lr.ph47.split.preheader
  %.034.lcssa58.ph = phi ptr [ poison, %.lr.ph47.split.preheader ], [ %.034.3, %.lr.ph47.split ]
  %.03445.unr = phi ptr [ %.03441, %.lr.ph47.split.preheader ], [ %.034.3, %.lr.ph47.split ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge48, label %.lr.ph47.split.epil

.lr.ph47.split.epil:                              ; preds = %._crit_edge48.loopexit57.unr-lcssa, %.lr.ph47.split.epil
  %.03445.epil = phi ptr [ %.034.epil, %.lr.ph47.split.epil ], [ %.03445.unr, %._crit_edge48.loopexit57.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph47.split.epil ], [ 0, %._crit_edge48.loopexit57.unr-lcssa ]
  store i8 0, ptr %.03445.epil, align 1, !tbaa !5
  %36 = getelementptr inbounds i8, ptr %.03445.epil, i64 %8
  store i8 0, ptr %36, align 1, !tbaa !5
  %.034.epil = getelementptr inbounds i8, ptr %.03445.epil, i64 %5
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge48, label %.lr.ph47.split.epil, !llvm.loop !11

._crit_edge48:                                    ; preds = %._crit_edge48.loopexit57.unr-lcssa, %.lr.ph47.split.epil, %._crit_edge.us, %6
  %.034.lcssa = phi ptr [ %.03441, %6 ], [ %.034.us, %._crit_edge.us ], [ %.034.lcssa58.ph, %._crit_edge48.loopexit57.unr-lcssa ], [ %.034.epil, %.lr.ph47.split.epil ]
  tail call void @llvm.memset.p0.i64(ptr align 1 %.034.lcssa, i8 0, i64 %2, i1 false)
  ret void

.lr.ph47.split:                                   ; preds = %.lr.ph47.split, %.lr.ph47.split.preheader.new
  %.03445 = phi ptr [ %.03441, %.lr.ph47.split.preheader.new ], [ %.034.3, %.lr.ph47.split ]
  %niter = phi i64 [ 0, %.lr.ph47.split.preheader.new ], [ %niter.next.3, %.lr.ph47.split ]
  store i8 0, ptr %.03445, align 1, !tbaa !5
  %37 = getelementptr inbounds i8, ptr %.03445, i64 %8
  store i8 0, ptr %37, align 1, !tbaa !5
  %.034 = getelementptr inbounds i8, ptr %.03445, i64 %5
  store i8 0, ptr %.034, align 1, !tbaa !5
  %38 = getelementptr inbounds i8, ptr %.034, i64 %8
  store i8 0, ptr %38, align 1, !tbaa !5
  %.034.1 = getelementptr inbounds i8, ptr %.034, i64 %5
  store i8 0, ptr %.034.1, align 1, !tbaa !5
  %39 = getelementptr inbounds i8, ptr %.034.1, i64 %8
  store i8 0, ptr %39, align 1, !tbaa !5
  %.034.2 = getelementptr inbounds i8, ptr %.034.1, i64 %5
  store i8 0, ptr %.034.2, align 1, !tbaa !5
  %40 = getelementptr inbounds i8, ptr %.034.2, i64 %8
  store i8 0, ptr %40, align 1, !tbaa !5
  %.034.3 = getelementptr inbounds i8, ptr %.034.2, i64 %5
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge48.loopexit57.unr-lcssa, label %.lr.ph47.split, !llvm.loop !10
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base5MinU8Eii(i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass