; LLVM IR from NVIDIA/DALI :: dali/core/cuda_event_pool.ll (ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unique_lock" = type <{ ptr, i8, [7 x i8] }>
%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }
%"class.dali::CUDAEventPool" = type <{ i32, [4 x i8], ptr, %"class.std::vector", %"class.dali::yielding_spinlock", [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::yielding_spinlock" = type { %"struct.std::atomic_flag" }
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%"struct.dali::CUDAEventPool::EventEntry" = type { %"class.dali::CUDAEvent", ptr }

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [74 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi = external hidden unnamed_addr constant [49 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @cudaGetDevice(ptr noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #5 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8)) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi(ptr noundef nonnull align 8 dereferenceable(41) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i32 noundef %2) #7 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::unique_lock", align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca %"class.dali::CUDAEvent", align 8
  %12 = alloca i1, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %13 = load ptr, ptr %4, align 8
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %3
  %17 = call i32 @cudaGetDevice(ptr noundef %6)
  br label %18

18:                                               ; preds = %16, %3
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = icmp sge i32 %19, 0
  br i1 %20, label %21, label %27

21:                                               ; preds = %18
  %22 = load i32, ptr %6, align 4, !tbaa !9
  %23 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 3
  %24 = call noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %23) #9
  %25 = trunc i64 %24 to i32
  %26 = icmp slt i32 %22, %25
  br label %27

27:                                               ; preds = %21, %18
  %28 = phi i1 [ false, %18 ], [ %26, %21 ]
  br i1 %28, label %29, label %30

29:                                               ; preds = %27
  br label %32

30:                                               ; preds = %27
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 74, ptr noundef @__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi) #10
  unreachable

31:                                               ; No predecessors!
  br label %32

32:                                               ; preds = %31, %29
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #9
  %33 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 4
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(9) %7, ptr noundef nonnull align 1 dereferenceable(1) %33)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #9
  %34 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 2
  %35 = invoke noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8) %34)
          to label %36 unwind label %47

36:                                               ; preds = %32
  store ptr %35, ptr %8, align 8, !tbaa !5
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = icmp ne ptr %37, null
  br i1 %38, label %63, label %39

39:                                               ; preds = %36
  invoke void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9) %7)
          to label %40 unwind label %47

40:                                               ; preds = %39
  %41 = invoke noalias noundef nonnull ptr @_Znwm(i64 noundef 16) #11
          to label %42 unwind label %47

42:                                               ; preds = %40
  store i1 true, ptr %12, align 1
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(8) %43)
          to label %44 unwind label %51

44:                                               ; preds = %42
  invoke void @_ZN4dali13CUDAEventPool10EventEntryC2ENS_9CUDAEventEPS1_(ptr noundef nonnull align 8 dereferenceable(16) %41, ptr noundef %11, ptr noundef null)
          to label %45 unwind label %55

45:                                               ; preds = %44
  store i1 false, ptr %12, align 1
  store ptr %41, ptr %8, align 8, !tbaa !5
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %11) #9
  invoke void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE4lockEv(ptr noundef nonnull align 8 dereferenceable(9) %7)
          to label %46 unwind label %47

46:                                               ; preds = %45
  br label %69

47:                                               ; preds = %69, %63, %45, %40, %39, %32
  %48 = landingpad { ptr, i32 }
          cleanup
  %49 = extractvalue { ptr, i32 } %48, 0
  store ptr %49, ptr %9, align 8
  %50 = extractvalue { ptr, i32 } %48, 1
  store i32 %50, ptr %10, align 4
  br label %76

51:                                               ; preds = %42
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %9, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %10, align 4
  br label %59

55:                                               ; preds = %44
  %56 = landingpad { ptr, i32 }
          cleanup
  %57 = extractvalue { ptr, i32 } %56, 0
  store ptr %57, ptr %9, align 8
  %58 = extractvalue { ptr, i32 } %56, 1
  store i32 %58, ptr %10, align 4
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %11) #9
  br label %59

59:                                               ; preds = %55, %51
  %60 = load i1, ptr %12, align 1
  br i1 %60, label %61, label %62

61:                                               ; preds = %59
  call void @_ZdlPvm(ptr noundef %41, i64 noundef 16) #12
  br label %62

62:                                               ; preds = %61, %59
  br label %76

63:                                               ; preds = %36
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = load ptr, ptr %8, align 8, !tbaa !5
  %66 = getelementptr inbounds %"struct.dali::CUDAEventPool::EventEntry", ptr %65, i32 0, i32 0
  %67 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali9CUDAEventaSEOS0_(ptr noundef nonnull align 8 dereferenceable(8) %66, ptr noundef nonnull align 8 dereferenceable(8) %64)
          to label %68 unwind label %47

68:                                               ; preds = %63
  br label %69

69:                                               ; preds = %68, %46
  %70 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 3
  %71 = load i32, ptr %6, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %72) #9
  %74 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8) %73, ptr noundef %74)
          to label %75 unwind label %47

75:                                               ; preds = %69
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #9
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %7) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #9
  ret void

76:                                               ; preds = %62, %47
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #9
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %7) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #9
  br label %77

77:                                               ; preds = %76
  %78 = load ptr, ptr %9, align 8
  %79 = load i32, ptr %10, align 4
  %80 = insertvalue { ptr, i32 } poison, ptr %78, 0
  %81 = insertvalue { ptr, i32 } %80, i32 %79, 1
  resume { ptr, i32 } %81
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9)) #7 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #8

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13CUDAEventPool10EventEntryC2ENS_9CUDAEventEPS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE4lockEv(ptr noundef nonnull align 8 dereferenceable(9)) #7 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali9CUDAEventaSEOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9)) unnamed_addr #5 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }
attributes #11 = { builtin allocsize(0) }
attributes #12 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unique_lock" = type <{ ptr, i8, [7 x i8] }>
%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [74 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi = external hidden unnamed_addr constant [49 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @cudaGetDevice(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi(ptr noundef nonnull align 8 dereferenceable(41) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i32 noundef %2) local_unnamed_addr #7 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::unique_lock", align 8
  %6 = alloca %"class.dali::CUDAEvent", align 8
  store i32 %2, ptr %4, align 4, !tbaa !5
  %7 = icmp slt i32 %2, 0
  br i1 %7, label %8, label %.thread

8:                                                ; preds = %3
  %9 = call i32 @cudaGetDevice(ptr noundef nonnull %4)
  %.pr = load i32, ptr %4, align 4, !tbaa !5
  %10 = icmp sgt i32 %.pr, -1
  br i1 %10, label %.thread, label %.critedge

.thread:                                          ; preds = %3, %8
  %11 = phi i32 [ %.pr, %8 ], [ %2, %3 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 16
  %13 = call noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #9
  %14 = trunc i64 %13 to i32
  %15 = icmp slt i32 %11, %14
  br i1 %15, label %16, label %.critedge

.critedge:                                        ; preds = %8, %.thread
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 74, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool3PutEONS_9CUDAEventEi) #10
  unreachable

16:                                               ; preds = %.thread
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #9
  %17 = getelementptr inbounds i8, ptr %0, i64 40
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(9) %5, ptr noundef nonnull align 1 dereferenceable(1) %17)
  %18 = getelementptr inbounds i8, ptr %0, i64 8
  %19 = call noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8) %18)
  %.not = icmp eq ptr %19, null
  br i1 %.not, label %20, label %33

20:                                               ; preds = %16
  invoke void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9) %5)
          to label %21 unwind label %26

21:                                               ; preds = %20
  %22 = invoke noalias noundef nonnull dereferenceable(16) ptr @_Znwm(i64 noundef 16) #11
          to label %23 unwind label %26

23:                                               ; preds = %21
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %1)
          to label %24 unwind label %28

24:                                               ; preds = %23
  invoke void @_ZN4dali13CUDAEventPool10EventEntryC2ENS_9CUDAEventEPS1_(ptr noundef nonnull align 8 dereferenceable(16) %22, ptr noundef nonnull %6, ptr noundef null)
          to label %25 unwind label %30

25:                                               ; preds = %24
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %6) #9
  invoke void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE4lockEv(ptr noundef nonnull align 8 dereferenceable(9) %5)
          to label %35 unwind label %26

26:                                               ; preds = %33, %25, %21, %20
  %27 = landingpad { ptr, i32 }
          cleanup
  br label %39

28:                                               ; preds = %23
  %29 = landingpad { ptr, i32 }
          cleanup
  br label %32

30:                                               ; preds = %24
  %31 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %6) #9
  br label %32

32:                                               ; preds = %28, %30
  %.pn = phi { ptr, i32 } [ %31, %30 ], [ %29, %28 ]
  call void @_ZdlPvm(ptr noundef nonnull %22, i64 noundef 16) #12
  br label %39

33:                                               ; preds = %16
  %34 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali9CUDAEventaSEOS0_(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull align 8 dereferenceable(8) %1)
          to label %35 unwind label %26

35:                                               ; preds = %33, %25
  %.010 = phi ptr [ %19, %33 ], [ %22, %25 ]
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %37) #9
  call void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8) %38, ptr noundef nonnull %.010)
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %5) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #9
  ret void

39:                                               ; preds = %32, %26
  %.pn14 = phi { ptr, i32 } [ %27, %26 ], [ %.pn, %32 ]
  call void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9) %5) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #9
  resume { ptr, i32 } %.pn14
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE6unlockEv(ptr noundef nonnull align 8 dereferenceable(9)) local_unnamed_addr #7 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #8

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali13CUDAEventPool10EventEntryC2ENS_9CUDAEventEPS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEE4lockEv(ptr noundef nonnull align 8 dereferenceable(9)) local_unnamed_addr #7 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN4dali9CUDAEventaSEOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt11unique_lockIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(9)) unnamed_addr #5 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }
attributes #11 = { builtin allocsize(0) }
attributes #12 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass