; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src (tx_queue_create)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_QUEUE_STRUCT = type { i64, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, ptr }

@_tx_queue_created_count = external global i64, align 8
@_tx_queue_created_ptr = external global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_tx_queue_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i64 %4, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.memset.p0.i64(ptr align 8 %16, i8 0, i64 104, i1 false)
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %18, i32 0, i32 1
  store ptr %17, ptr %19, align 8, !tbaa !13
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %21, i32 0, i32 2
  store i32 %20, ptr %22, align 8, !tbaa !15
  %23 = load i64, ptr %10, align 8, !tbaa !11
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = zext i32 %24 to i64
  %26 = mul i64 %25, 8
  %27 = udiv i64 %23, %26
  %28 = trunc i64 %27 to i32
  store i32 %28, ptr %12, align 4, !tbaa !9
  %29 = load i32, ptr %12, align 4, !tbaa !9
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = mul i32 %29, %30
  store i32 %31, ptr %13, align 4, !tbaa !9
  %32 = load ptr, ptr %9, align 8, !tbaa !5
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %33, i32 0, i32 6
  store ptr %32, ptr %34, align 8, !tbaa !16
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %35, i32 0, i32 6
  %37 = load ptr, ptr %36, align 8, !tbaa !16
  %38 = load i32, ptr %13, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds i64, ptr %37, i64 %39
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %41, i32 0, i32 7
  store ptr %40, ptr %42, align 8, !tbaa !17
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %44, i32 0, i32 8
  store ptr %43, ptr %45, align 8, !tbaa !18
  %46 = load ptr, ptr %9, align 8, !tbaa !5
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %47, i32 0, i32 9
  store ptr %46, ptr %48, align 8, !tbaa !19
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %50, i32 0, i32 5
  store i32 %49, ptr %51, align 4, !tbaa !20
  %52 = load i32, ptr %12, align 4, !tbaa !9
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %53, i32 0, i32 3
  store i32 %52, ptr %54, align 4, !tbaa !21
  %55 = call i32 @__disable_interrupts()
  store i32 %55, ptr %11, align 4, !tbaa !9
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %56, i32 0, i32 0
  store i64 1364542805, ptr %57, align 8, !tbaa !22
  %58 = load i64, ptr @_tx_queue_created_count, align 8, !tbaa !11
  %59 = icmp eq i64 %58, 0
  br i1 %59, label %60, label %68

60:                                               ; preds = %5
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %61, ptr @_tx_queue_created_ptr, align 8, !tbaa !5
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %63, i32 0, i32 12
  store ptr %62, ptr %64, align 8, !tbaa !23
  %65 = load ptr, ptr %6, align 8, !tbaa !5
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %66, i32 0, i32 13
  store ptr %65, ptr %67, align 8, !tbaa !24
  br label %85

68:                                               ; preds = %5
  %69 = load ptr, ptr @_tx_queue_created_ptr, align 8, !tbaa !5
  store ptr %69, ptr %14, align 8, !tbaa !5
  %70 = load ptr, ptr %14, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %70, i32 0, i32 13
  %72 = load ptr, ptr %71, align 8, !tbaa !24
  store ptr %72, ptr %15, align 8, !tbaa !5
  %73 = load ptr, ptr %6, align 8, !tbaa !5
  %74 = load ptr, ptr %14, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %74, i32 0, i32 13
  store ptr %73, ptr %75, align 8, !tbaa !24
  %76 = load ptr, ptr %6, align 8, !tbaa !5
  %77 = load ptr, ptr %15, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %77, i32 0, i32 12
  store ptr %76, ptr %78, align 8, !tbaa !23
  %79 = load ptr, ptr %15, align 8, !tbaa !5
  %80 = load ptr, ptr %6, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %80, i32 0, i32 13
  store ptr %79, ptr %81, align 8, !tbaa !24
  %82 = load ptr, ptr %14, align 8, !tbaa !5
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %83, i32 0, i32 12
  store ptr %82, ptr %84, align 8, !tbaa !23
  br label %85

85:                                               ; preds = %68, %60
  %86 = load i64, ptr @_tx_queue_created_count, align 8, !tbaa !11
  %87 = add i64 %86, 1
  store i64 %87, ptr @_tx_queue_created_count, align 8, !tbaa !11
  %88 = load i32, ptr %11, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %88)
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 8}
!14 = !{!"TX_QUEUE_STRUCT", !12, i64 0, !6, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !10, i64 72, !6, i64 80, !6, i64 88, !6, i64 96}
!15 = !{!14, !10, i64 16}
!16 = !{!14, !6, i64 32}
!17 = !{!14, !6, i64 40}
!18 = !{!14, !6, i64 48}
!19 = !{!14, !6, i64 56}
!20 = !{!14, !10, i64 28}
!21 = !{!14, !10, i64 20}
!22 = !{!14, !12, i64 0}
!23 = !{!14, !6, i64 80}
!24 = !{!14, !6, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_tx_queue_created_count = external local_unnamed_addr global i64, align 8
@_tx_queue_created_ptr = external local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @_tx_queue_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #0 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(104) %0, i8 0, i64 104, i1 false)
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 %2, ptr %7, align 8, !tbaa !12
  %8 = zext i32 %2 to i64
  %9 = shl nuw nsw i64 %8, 3
  %10 = udiv i64 %4, %9
  %11 = trunc i64 %10 to i32
  %12 = mul i32 %11, %2
  %13 = getelementptr inbounds i8, ptr %0, i64 32
  store ptr %3, ptr %13, align 8, !tbaa !13
  %14 = zext i32 %12 to i64
  %15 = getelementptr inbounds i64, ptr %3, i64 %14
  %16 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr %15, ptr %16, align 8, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %3, ptr %17, align 8, !tbaa !15
  %18 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %3, ptr %18, align 8, !tbaa !16
  %19 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %11, ptr %19, align 4, !tbaa !17
  %20 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %11, ptr %20, align 4, !tbaa !18
  %21 = tail call i32 @__disable_interrupts()
  store i64 1364542805, ptr %0, align 8, !tbaa !19
  %22 = load i64, ptr @_tx_queue_created_count, align 8, !tbaa !20
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %29, label %24

24:                                               ; preds = %5
  %25 = load ptr, ptr @_tx_queue_created_ptr, align 8, !tbaa !21
  %26 = getelementptr inbounds i8, ptr %25, i64 88
  %27 = load ptr, ptr %26, align 8, !tbaa !22
  store ptr %0, ptr %26, align 8, !tbaa !22
  %28 = getelementptr inbounds i8, ptr %27, i64 80
  br label %29

29:                                               ; preds = %5, %24
  %.sink38 = phi ptr [ %28, %24 ], [ @_tx_queue_created_ptr, %5 ]
  %.sink37 = phi ptr [ %25, %24 ], [ %0, %5 ]
  %.sink = phi ptr [ %27, %24 ], [ %0, %5 ]
  store ptr %0, ptr %.sink38, align 8, !tbaa !21
  %30 = getelementptr inbounds i8, ptr %0, i64 80
  store ptr %.sink37, ptr %30, align 8
  %31 = getelementptr inbounds i8, ptr %0, i64 88
  store ptr %.sink, ptr %31, align 8
  %32 = add i64 %22, 1
  store i64 %32, ptr @_tx_queue_created_count, align 8, !tbaa !20
  tail call void @__restore_interrupt(i32 noundef %21)
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TX_QUEUE_STRUCT", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !11, i64 72, !10, i64 80, !10, i64 88, !10, i64 96}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 16}
!13 = !{!6, !10, i64 32}
!14 = !{!6, !10, i64 40}
!15 = !{!6, !10, i64 48}
!16 = !{!6, !10, i64 56}
!17 = !{!6, !11, i64 28}
!18 = !{!6, !11, i64 20}
!19 = !{!6, !7, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{!10, !10, i64 0}
!22 = !{!6, !10, i64 88}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass