; LLVM IR from mlcommons/tiny :: benchmark/interface/Drivers/BSP/Components/st7789h2 (st7789h2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ST7789H2_Object_t = type { %struct.ST7789H2_IO_t, %struct.ST7789H2_ctx_t, i8, i32 }
%struct.ST7789H2_IO_t = type { ptr, ptr, i16, ptr, ptr, ptr, ptr }
%struct.ST7789H2_ctx_t = type { ptr, ptr, ptr, ptr }

; Function Attrs: nounwind uwtable
declare dso_local i32 @ST7789H2_SetCursor(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @ST7789H2_DrawHLine(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca [2 x i8], align 1
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = call i32 @ST7789H2_SetCursor(ptr noundef %14, i32 noundef %15, i32 noundef %16)
  %18 = load i32, ptr %11, align 4, !tbaa !9
  %19 = add nsw i32 %18, %17
  store i32 %19, ptr %11, align 4, !tbaa !9
  %20 = load i32, ptr %10, align 4, !tbaa !9
  %21 = and i32 %20, 255
  %22 = trunc i32 %21 to i8
  %23 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  store i8 %22, ptr %23, align 1, !tbaa !11
  %24 = load i32, ptr %10, align 4, !tbaa !9
  %25 = lshr i32 %24, 8
  %26 = and i32 %25, 255
  %27 = trunc i32 %26 to i8
  %28 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 1
  store i8 %27, ptr %28, align 1, !tbaa !11
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.ST7789H2_Object_t, ptr %29, i32 0, i32 1
  %31 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %32 = call i32 @st7789h2_write_reg(ptr noundef %30, i16 noundef zeroext 44, ptr noundef %31, i32 noundef 1)
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = add nsw i32 %33, %32
  store i32 %34, ptr %11, align 4, !tbaa !9
  store i32 1, ptr %13, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %46, %5
  %36 = load i32, ptr %13, align 4, !tbaa !9
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = icmp ult i32 %36, %37
  br i1 %38, label %39, label %49

39:                                               ; preds = %35
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.ST7789H2_Object_t, ptr %40, i32 0, i32 1
  %42 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %43 = call i32 @st7789h2_write_reg(ptr noundef %41, i16 noundef zeroext 60, ptr noundef %42, i32 noundef 1)
  %44 = load i32, ptr %11, align 4, !tbaa !9
  %45 = add nsw i32 %44, %43
  store i32 %45, ptr %11, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %39
  %47 = load i32, ptr %13, align 4, !tbaa !9
  %48 = add i32 %47, 1
  store i32 %48, ptr %13, align 4, !tbaa !9
  br label %35, !llvm.loop !12

49:                                               ; preds = %35
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = load i32, ptr %9, align 4, !tbaa !9
  %52 = add i32 %50, %51
  %53 = icmp eq i32 %52, 240
  br i1 %53, label %54, label %70

54:                                               ; preds = %49
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = load i32, ptr %9, align 4, !tbaa !9
  %58 = add i32 %56, %57
  %59 = sub i32 %58, 1
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = call i32 @ST7789H2_SetCursor(ptr noundef %55, i32 noundef %59, i32 noundef %60)
  %62 = load i32, ptr %11, align 4, !tbaa !9
  %63 = add nsw i32 %62, %61
  store i32 %63, ptr %11, align 4, !tbaa !9
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.ST7789H2_Object_t, ptr %64, i32 0, i32 1
  %66 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %67 = call i32 @st7789h2_write_reg(ptr noundef %65, i16 noundef zeroext 44, ptr noundef %66, i32 noundef 1)
  %68 = load i32, ptr %11, align 4, !tbaa !9
  %69 = add nsw i32 %68, %67
  store i32 %69, ptr %11, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %54, %49
  %71 = load i32, ptr %11, align 4, !tbaa !9
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %74

73:                                               ; preds = %70
  store i32 -1, ptr %11, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %73, %70
  %75 = load i32, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret i32 %75
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @st7789h2_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @ST7789H2_SetCursor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @ST7789H2_DrawHLine(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = alloca [2 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %6) #3
  %7 = tail call i32 @ST7789H2_SetCursor(ptr noundef %0, i32 noundef %1, i32 noundef %2)
  %8 = trunc i32 %4 to i8
  store i8 %8, ptr %6, align 1, !tbaa !5
  %9 = lshr i32 %4, 8
  %10 = trunc i32 %9 to i8
  %11 = getelementptr inbounds i8, ptr %6, i64 1
  store i8 %10, ptr %11, align 1, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %0, i64 56
  %13 = call i32 @st7789h2_write_reg(ptr noundef nonnull %12, i16 noundef zeroext 44, ptr noundef nonnull %6, i32 noundef 1) #3
  %14 = add nsw i32 %13, %7
  %15 = icmp ugt i32 %3, 1
  br i1 %15, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %5, %.lr.ph
  %.027 = phi i32 [ %18, %.lr.ph ], [ 1, %5 ]
  %.02326 = phi i32 [ %17, %.lr.ph ], [ %14, %5 ]
  %16 = call i32 @st7789h2_write_reg(ptr noundef nonnull %12, i16 noundef zeroext 60, ptr noundef nonnull %6, i32 noundef 1) #3
  %17 = add nsw i32 %16, %.02326
  %18 = add nuw i32 %.027, 1
  %exitcond.not = icmp eq i32 %18, %3
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !8

._crit_edge:                                      ; preds = %.lr.ph, %5
  %.023.lcssa = phi i32 [ %14, %5 ], [ %17, %.lr.ph ]
  %19 = add i32 %3, %1
  %20 = icmp eq i32 %19, 240
  br i1 %20, label %21, label %26

21:                                               ; preds = %._crit_edge
  %22 = call i32 @ST7789H2_SetCursor(ptr noundef %0, i32 noundef 239, i32 noundef %2)
  %23 = add nsw i32 %22, %.023.lcssa
  %24 = call i32 @st7789h2_write_reg(ptr noundef nonnull %12, i16 noundef zeroext 44, ptr noundef nonnull %6, i32 noundef 1) #3
  %25 = add nsw i32 %23, %24
  br label %26

26:                                               ; preds = %21, %._crit_edge
  %.1 = phi i32 [ %25, %21 ], [ %.023.lcssa, %._crit_edge ]
  %.not = icmp ne i32 %.1, 0
  %spec.store.select = sext i1 %.not to i32
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %6) #3
  ret i32 %spec.store.select
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @st7789h2_write_reg(ptr noundef, i16 noundef zeroext, ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass