; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src/tx_thread_preemption_cha_cd03558a (change)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_priority_list = external global [32 x ptr], align 16
@_tx_thread_preempted_maps = external global [1 x i64], align 8
@_tx_thread_highest_priority = external global i32, align 4
@_tx_thread_execute_ptr = external global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_tx_thread_preemption_change(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !9
  %10 = call i32 @__disable_interrupts()
  store i32 %10, ptr %7, align 4, !tbaa !9
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %12, i32 0, i32 32
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = icmp ugt i32 %11, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %3
  store i32 24, ptr %9, align 4, !tbaa !9
  br label %107

17:                                               ; preds = %3
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %18, i32 0, i32 32
  %20 = load i32, ptr %19, align 8, !tbaa !11
  %21 = load i32, ptr %5, align 4, !tbaa !9
  %22 = icmp eq i32 %20, %21
  br i1 %22, label %23, label %43

23:                                               ; preds = %17
  %24 = load ptr, ptr %4, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %24, i32 0, i32 11
  %26 = load i32, ptr %25, align 8, !tbaa !15
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %27
  %29 = load ptr, ptr %28, align 8, !tbaa !5
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = icmp eq ptr %29, %30
  br i1 %31, label %32, label %42

32:                                               ; preds = %23
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %33, i32 0, i32 11
  %35 = load i32, ptr %34, align 8, !tbaa !15
  %36 = zext i32 %35 to i64
  %37 = shl i64 1, %36
  store i64 %37, ptr %8, align 8, !tbaa !16
  %38 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !16
  %39 = load i64, ptr %8, align 8, !tbaa !16
  %40 = xor i64 %39, -1
  %41 = and i64 %38, %40
  store i64 %41, ptr @_tx_thread_preempted_maps, align 8, !tbaa !16
  br label %42

42:                                               ; preds = %32, %23
  br label %43

43:                                               ; preds = %42, %17
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %44, i32 0, i32 33
  %46 = load i32, ptr %45, align 4, !tbaa !17
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 %46, ptr %47, align 4, !tbaa !9
  %48 = load i32, ptr %5, align 4, !tbaa !9
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %49, i32 0, i32 33
  store i32 %48, ptr %50, align 4, !tbaa !17
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %52, i32 0, i32 34
  %54 = load i32, ptr %53, align 8, !tbaa !18
  %55 = icmp ult i32 %51, %54
  br i1 %55, label %56, label %60

56:                                               ; preds = %43
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %58, i32 0, i32 15
  store i32 %57, ptr %59, align 8, !tbaa !19
  br label %66

60:                                               ; preds = %43
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %61, i32 0, i32 34
  %63 = load i32, ptr %62, align 8, !tbaa !18
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %64, i32 0, i32 15
  store i32 %63, ptr %65, align 8, !tbaa !19
  br label %66

66:                                               ; preds = %60, %56
  %67 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %68, i32 0, i32 11
  %70 = load i32, ptr %69, align 8, !tbaa !15
  %71 = icmp ult i32 %67, %70
  br i1 %71, label %72, label %106

72:                                               ; preds = %66
  %73 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  %74 = load i32, ptr %5, align 4, !tbaa !9
  %75 = icmp ult i32 %73, %74
  br i1 %75, label %76, label %105

76:                                               ; preds = %72
  %77 = load ptr, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = icmp eq ptr %77, %78
  br i1 %79, label %80, label %104

80:                                               ; preds = %76
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %81, i32 0, i32 15
  %83 = load i32, ptr %82, align 8, !tbaa !19
  %84 = load ptr, ptr %4, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %84, i32 0, i32 11
  %86 = load i32, ptr %85, align 8, !tbaa !15
  %87 = icmp ne i32 %83, %86
  br i1 %87, label %88, label %97

88:                                               ; preds = %80
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %89, i32 0, i32 11
  %91 = load i32, ptr %90, align 8, !tbaa !15
  %92 = zext i32 %91 to i64
  %93 = shl i64 1, %92
  store i64 %93, ptr %8, align 8, !tbaa !16
  %94 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !16
  %95 = load i64, ptr %8, align 8, !tbaa !16
  %96 = or i64 %94, %95
  store i64 %96, ptr @_tx_thread_preempted_maps, align 8, !tbaa !16
  br label %97

97:                                               ; preds = %88, %80
  %98 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !9
  %99 = zext i32 %98 to i64
  %100 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %99
  %101 = load ptr, ptr %100, align 8, !tbaa !5
  store ptr %101, ptr @_tx_thread_execute_ptr, align 8, !tbaa !5
  %102 = load i32, ptr %7, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %102)
  call void @_tx_thread_system_preempt_check()
  %103 = call i32 @__disable_interrupts()
  store i32 %103, ptr %7, align 4, !tbaa !9
  br label %104

104:                                              ; preds = %97, %76
  br label %105

105:                                              ; preds = %104, %72
  br label %106

106:                                              ; preds = %105, %66
  br label %107

107:                                              ; preds = %106, %16
  %108 = load i32, ptr %7, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %108)
  %109 = load i32, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret i32 %109
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) #2

declare void @_tx_thread_system_preempt_check() #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 280}
!12 = !{!"TX_THREAD_STRUCT", !13, i64 0, !13, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !6, i64 112, !6, i64 120, !13, i64 128, !14, i64 136, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !13, i64 224, !6, i64 232, !10, i64 240, !10, i64 244, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !6, i64 296, !6, i64 304, !6, i64 312, !13, i64 320}
!13 = !{!"long", !7, i64 0}
!14 = !{!"TX_TIMER_INTERNAL_STRUCT", !13, i64 0, !13, i64 8, !6, i64 16, !13, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!15 = !{!12, !10, i64 88}
!16 = !{!13, !13, i64 0}
!17 = !{!12, !10, i64 284}
!18 = !{!12, !10, i64 288}
!19 = !{!12, !10, i64 104}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_tx_thread_priority_list = external local_unnamed_addr global [32 x ptr], align 16
@_tx_thread_preempted_maps = external local_unnamed_addr global [1 x i64], align 8
@_tx_thread_highest_priority = external local_unnamed_addr global i32, align 4
@_tx_thread_execute_ptr = external local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 25) i32 @_tx_thread_preemption_change(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = tail call i32 @__disable_interrupts()
  %5 = getelementptr inbounds i8, ptr %0, i64 280
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp ult i32 %6, %1
  br i1 %7, label %46, label %8

8:                                                ; preds = %3
  %9 = icmp eq i32 %6, %1
  br i1 %9, label %10, label %22

10:                                               ; preds = %8
  %11 = getelementptr inbounds i8, ptr %0, i64 88
  %12 = load i32, ptr %11, align 8, !tbaa !13
  %13 = zext i32 %12 to i64
  %14 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %13
  %15 = load ptr, ptr %14, align 8, !tbaa !14
  %16 = icmp eq ptr %15, %0
  br i1 %16, label %17, label %22

17:                                               ; preds = %10
  %18 = shl nuw i64 1, %13
  %19 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %20 = xor i64 %18, -1
  %21 = and i64 %19, %20
  store i64 %21, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %22

22:                                               ; preds = %10, %17, %8
  %23 = getelementptr inbounds i8, ptr %0, i64 284
  %24 = load i32, ptr %23, align 4, !tbaa !16
  store i32 %24, ptr %2, align 4, !tbaa !17
  store i32 %1, ptr %23, align 4, !tbaa !16
  %25 = getelementptr inbounds i8, ptr %0, i64 288
  %26 = load i32, ptr %25, align 8, !tbaa !18
  %spec.select = tail call i32 @llvm.umin.i32(i32 %26, i32 %1)
  %27 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 %spec.select, ptr %27, align 8
  %28 = load i32, ptr @_tx_thread_highest_priority, align 4, !tbaa !17
  %29 = getelementptr inbounds i8, ptr %0, i64 88
  %30 = load i32, ptr %29, align 8, !tbaa !13
  %31 = icmp ult i32 %28, %30
  %32 = icmp ult i32 %28, %1
  %or.cond = and i1 %32, %31
  %33 = load ptr, ptr @_tx_thread_execute_ptr, align 8
  %34 = icmp eq ptr %33, %0
  %or.cond35 = select i1 %or.cond, i1 %34, i1 false
  br i1 %or.cond35, label %35, label %46

35:                                               ; preds = %22
  %.not = icmp eq i32 %spec.select, %30
  br i1 %.not, label %41, label %36

36:                                               ; preds = %35
  %37 = zext nneg i32 %30 to i64
  %38 = shl nuw i64 1, %37
  %39 = load i64, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  %40 = or i64 %39, %38
  store i64 %40, ptr @_tx_thread_preempted_maps, align 8, !tbaa !15
  br label %41

41:                                               ; preds = %36, %35
  %42 = zext i32 %28 to i64
  %43 = getelementptr inbounds [32 x ptr], ptr @_tx_thread_priority_list, i64 0, i64 %42
  %44 = load ptr, ptr %43, align 8, !tbaa !14
  store ptr %44, ptr @_tx_thread_execute_ptr, align 8, !tbaa !14
  tail call void @__restore_interrupt(i32 noundef %4)
  tail call void @_tx_thread_system_preempt_check() #4
  %45 = tail call i32 @__disable_interrupts()
  br label %46

46:                                               ; preds = %3, %22, %41
  %.027 = phi i32 [ %45, %41 ], [ %4, %22 ], [ %4, %3 ]
  %.0 = phi i32 [ 0, %41 ], [ 0, %22 ], [ 24, %3 ]
  tail call void @__restore_interrupt(i32 noundef %.027)
  ret i32 %.0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) local_unnamed_addr #1

declare void @_tx_thread_system_preempt_check() local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 280}
!6 = !{!"TX_THREAD_STRUCT", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !10, i64 112, !10, i64 120, !7, i64 128, !12, i64 136, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !7, i64 224, !10, i64 232, !11, i64 240, !11, i64 244, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !11, i64 280, !11, i64 284, !11, i64 288, !11, i64 292, !10, i64 296, !10, i64 304, !10, i64 312, !7, i64 320}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"TX_TIMER_INTERNAL_STRUCT", !7, i64 0, !7, i64 8, !10, i64 16, !7, i64 24, !10, i64 32, !10, i64 40, !10, i64 48}
!13 = !{!6, !11, i64 88}
!14 = !{!10, !10, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!6, !11, i64 284}
!17 = !{!11, !11, i64 0}
!18 = !{!6, !11, i64 288}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass