; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_compute.tuple = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_compute(ptr noundef %0, ptr noundef %1, i32 noundef %2, i8 noundef zeroext %3, i8 noundef zeroext %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca [3 x i32], align 4
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca i8, align 1
  %17 = alloca i8, align 1
  %18 = alloca i8, align 1
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i8 %3, ptr %9, align 1, !tbaa !11
  store i8 %4, ptr %10, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr %12) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 @__const.test_asimd_compute.tuple, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #4
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %19, ptr noundef %20)
  %21 = load i8, ptr %10, align 1, !tbaa !11
  %22 = zext i8 %21 to i32
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %116

24:                                               ; preds = %5
  store i8 0, ptr %11, align 1, !tbaa !11
  br label %25

25:                                               ; preds = %112, %24
  %26 = load i8, ptr %11, align 1, !tbaa !11
  %27 = zext i8 %26 to i32
  %28 = icmp slt i32 %27, 32
  br i1 %28, label %29, label %115

29:                                               ; preds = %25
  store i8 0, ptr %13, align 1, !tbaa !11
  br label %30

30:                                               ; preds = %108, %29
  %31 = load i8, ptr %13, align 1, !tbaa !11
  %32 = zext i8 %31 to i32
  %33 = icmp slt i32 %32, 32
  br i1 %33, label %34, label %111

34:                                               ; preds = %30
  store i8 0, ptr %14, align 1, !tbaa !11
  br label %35

35:                                               ; preds = %104, %34
  %36 = load i8, ptr %14, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = icmp slt i32 %37, 32
  br i1 %38, label %39, label %107

39:                                               ; preds = %35
  store i8 0, ptr %15, align 1, !tbaa !11
  br label %40

40:                                               ; preds = %100, %39
  %41 = load i8, ptr %15, align 1, !tbaa !11
  %42 = zext i8 %41 to i32
  %43 = icmp slt i32 %42, 3
  br i1 %43, label %44, label %103

44:                                               ; preds = %40
  %45 = load i8, ptr %9, align 1, !tbaa !11
  %46 = zext i8 %45 to i32
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %61

48:                                               ; preds = %44
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = load i8, ptr %13, align 1, !tbaa !11
  %52 = zext i8 %51 to i32
  %53 = load i8, ptr %14, align 1, !tbaa !11
  %54 = zext i8 %53 to i32
  %55 = load i8, ptr %11, align 1, !tbaa !11
  %56 = zext i8 %55 to i32
  %57 = load i8, ptr %15, align 1, !tbaa !11
  %58 = zext i8 %57 to i64
  %59 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %49, i32 noundef %50, i32 noundef %52, i32 noundef %54, i8 noundef zeroext 0, i32 noundef %56, i32 noundef %60)
  br label %99

61:                                               ; preds = %44
  %62 = load i8, ptr %9, align 1, !tbaa !11
  %63 = zext i8 %62 to i32
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %97

65:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #4
  store i8 4, ptr %17, align 1, !tbaa !11
  %66 = load i8, ptr %15, align 1, !tbaa !11
  %67 = zext i8 %66 to i64
  %68 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %67
  %69 = load i32, ptr %68, align 4, !tbaa !9
  %70 = icmp eq i32 %69, 7
  br i1 %70, label %71, label %72

71:                                               ; preds = %65
  store i8 2, ptr %17, align 1, !tbaa !11
  br label %72

72:                                               ; preds = %71, %65
  store i8 0, ptr %16, align 1, !tbaa !11
  br label %73

73:                                               ; preds = %93, %72
  %74 = load i8, ptr %16, align 1, !tbaa !11
  %75 = zext i8 %74 to i32
  %76 = load i8, ptr %17, align 1, !tbaa !11
  %77 = zext i8 %76 to i32
  %78 = icmp slt i32 %75, %77
  br i1 %78, label %79, label %96

79:                                               ; preds = %73
  %80 = load ptr, ptr %7, align 8, !tbaa !5
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = load i8, ptr %13, align 1, !tbaa !11
  %83 = zext i8 %82 to i32
  %84 = load i8, ptr %14, align 1, !tbaa !11
  %85 = zext i8 %84 to i32
  %86 = load i8, ptr %16, align 1, !tbaa !11
  %87 = load i8, ptr %11, align 1, !tbaa !11
  %88 = zext i8 %87 to i32
  %89 = load i8, ptr %15, align 1, !tbaa !11
  %90 = zext i8 %89 to i64
  %91 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %90
  %92 = load i32, ptr %91, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %80, i32 noundef %81, i32 noundef %83, i32 noundef %85, i8 noundef zeroext %86, i32 noundef %88, i32 noundef %92)
  br label %93

93:                                               ; preds = %79
  %94 = load i8, ptr %16, align 1, !tbaa !11
  %95 = add i8 %94, 1
  store i8 %95, ptr %16, align 1, !tbaa !11
  br label %73, !llvm.loop !12

96:                                               ; preds = %73
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #4
  br label %98

97:                                               ; preds = %61
  br label %98

98:                                               ; preds = %97, %96
  br label %99

99:                                               ; preds = %98, %48
  br label %100

100:                                              ; preds = %99
  %101 = load i8, ptr %15, align 1, !tbaa !11
  %102 = add i8 %101, 1
  store i8 %102, ptr %15, align 1, !tbaa !11
  br label %40, !llvm.loop !14

103:                                              ; preds = %40
  br label %104

104:                                              ; preds = %103
  %105 = load i8, ptr %14, align 1, !tbaa !11
  %106 = add i8 %105, 1
  store i8 %106, ptr %14, align 1, !tbaa !11
  br label %35, !llvm.loop !15

107:                                              ; preds = %35
  br label %108

108:                                              ; preds = %107
  %109 = load i8, ptr %13, align 1, !tbaa !11
  %110 = add i8 %109, 1
  store i8 %110, ptr %13, align 1, !tbaa !11
  br label %30, !llvm.loop !16

111:                                              ; preds = %30
  br label %112

112:                                              ; preds = %111
  %113 = load i8, ptr %11, align 1, !tbaa !11
  %114 = add i8 %113, 1
  store i8 %114, ptr %11, align 1, !tbaa !11
  br label %25, !llvm.loop !17

115:                                              ; preds = %25
  br label %217

116:                                              ; preds = %5
  store i8 127, ptr %14, align 1, !tbaa !11
  store i8 0, ptr %11, align 1, !tbaa !11
  br label %117

117:                                              ; preds = %213, %116
  %118 = load i8, ptr %11, align 1, !tbaa !11
  %119 = zext i8 %118 to i32
  %120 = icmp slt i32 %119, 32
  br i1 %120, label %121, label %216

121:                                              ; preds = %117
  store i8 0, ptr %13, align 1, !tbaa !11
  br label %122

122:                                              ; preds = %209, %121
  %123 = load i8, ptr %13, align 1, !tbaa !11
  %124 = zext i8 %123 to i32
  %125 = icmp slt i32 %124, 32
  br i1 %125, label %126, label %212

126:                                              ; preds = %122
  store i8 0, ptr %15, align 1, !tbaa !11
  br label %127

127:                                              ; preds = %205, %126
  %128 = load i8, ptr %15, align 1, !tbaa !11
  %129 = zext i8 %128 to i32
  %130 = icmp slt i32 %129, 3
  br i1 %130, label %131, label %208

131:                                              ; preds = %127
  %132 = load i8, ptr %9, align 1, !tbaa !11
  %133 = zext i8 %132 to i32
  %134 = icmp eq i32 %133, 0
  br i1 %134, label %135, label %148

135:                                              ; preds = %131
  %136 = load ptr, ptr %7, align 8, !tbaa !5
  %137 = load i32, ptr %8, align 4, !tbaa !9
  %138 = load i8, ptr %13, align 1, !tbaa !11
  %139 = zext i8 %138 to i32
  %140 = load i8, ptr %14, align 1, !tbaa !11
  %141 = zext i8 %140 to i32
  %142 = load i8, ptr %11, align 1, !tbaa !11
  %143 = zext i8 %142 to i32
  %144 = load i8, ptr %15, align 1, !tbaa !11
  %145 = zext i8 %144 to i64
  %146 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %145
  %147 = load i32, ptr %146, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %136, i32 noundef %137, i32 noundef %139, i32 noundef %141, i8 noundef zeroext 0, i32 noundef %143, i32 noundef %147)
  br label %204

148:                                              ; preds = %131
  %149 = load i8, ptr %9, align 1, !tbaa !11
  %150 = zext i8 %149 to i32
  %151 = icmp eq i32 %150, 1
  br i1 %151, label %152, label %184

152:                                              ; preds = %148
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #4
  store i8 4, ptr %18, align 1, !tbaa !11
  %153 = load i8, ptr %15, align 1, !tbaa !11
  %154 = zext i8 %153 to i64
  %155 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %154
  %156 = load i32, ptr %155, align 4, !tbaa !9
  %157 = icmp eq i32 %156, 7
  br i1 %157, label %158, label %159

158:                                              ; preds = %152
  store i8 2, ptr %18, align 1, !tbaa !11
  br label %159

159:                                              ; preds = %158, %152
  store i8 0, ptr %16, align 1, !tbaa !11
  br label %160

160:                                              ; preds = %180, %159
  %161 = load i8, ptr %16, align 1, !tbaa !11
  %162 = zext i8 %161 to i32
  %163 = load i8, ptr %18, align 1, !tbaa !11
  %164 = zext i8 %163 to i32
  %165 = icmp slt i32 %162, %164
  br i1 %165, label %166, label %183

166:                                              ; preds = %160
  %167 = load ptr, ptr %7, align 8, !tbaa !5
  %168 = load i32, ptr %8, align 4, !tbaa !9
  %169 = load i8, ptr %13, align 1, !tbaa !11
  %170 = zext i8 %169 to i32
  %171 = load i8, ptr %14, align 1, !tbaa !11
  %172 = zext i8 %171 to i32
  %173 = load i8, ptr %16, align 1, !tbaa !11
  %174 = load i8, ptr %11, align 1, !tbaa !11
  %175 = zext i8 %174 to i32
  %176 = load i8, ptr %15, align 1, !tbaa !11
  %177 = zext i8 %176 to i64
  %178 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %177
  %179 = load i32, ptr %178, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %167, i32 noundef %168, i32 noundef %170, i32 noundef %172, i8 noundef zeroext %173, i32 noundef %175, i32 noundef %179)
  br label %180

180:                                              ; preds = %166
  %181 = load i8, ptr %16, align 1, !tbaa !11
  %182 = add i8 %181, 1
  store i8 %182, ptr %16, align 1, !tbaa !11
  br label %160, !llvm.loop !18

183:                                              ; preds = %160
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #4
  br label %203

184:                                              ; preds = %148
  %185 = load i8, ptr %9, align 1, !tbaa !11
  %186 = zext i8 %185 to i32
  %187 = icmp eq i32 %186, 2
  br i1 %187, label %188, label %201

188:                                              ; preds = %184
  %189 = load ptr, ptr %7, align 8, !tbaa !5
  %190 = load i32, ptr %8, align 4, !tbaa !9
  %191 = load i8, ptr %13, align 1, !tbaa !11
  %192 = zext i8 %191 to i32
  %193 = load i8, ptr %14, align 1, !tbaa !11
  %194 = zext i8 %193 to i32
  %195 = load i8, ptr %11, align 1, !tbaa !11
  %196 = zext i8 %195 to i32
  %197 = load i8, ptr %15, align 1, !tbaa !11
  %198 = zext i8 %197 to i64
  %199 = getelementptr inbounds [3 x i32], ptr %12, i64 0, i64 %198
  %200 = load i32, ptr %199, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %189, i32 noundef %190, i32 noundef %192, i32 noundef %194, i8 noundef zeroext 28, i32 noundef %196, i32 noundef %200)
  br label %202

201:                                              ; preds = %184
  br label %202

202:                                              ; preds = %201, %188
  br label %203

203:                                              ; preds = %202, %183
  br label %204

204:                                              ; preds = %203, %135
  br label %205

205:                                              ; preds = %204
  %206 = load i8, ptr %15, align 1, !tbaa !11
  %207 = add i8 %206, 1
  store i8 %207, ptr %15, align 1, !tbaa !11
  br label %127, !llvm.loop !19

208:                                              ; preds = %127
  br label %209

209:                                              ; preds = %208
  %210 = load i8, ptr %13, align 1, !tbaa !11
  %211 = add i8 %210, 1
  store i8 %211, ptr %13, align 1, !tbaa !11
  br label %122, !llvm.loop !20

212:                                              ; preds = %122
  br label %213

213:                                              ; preds = %212
  %214 = load i8, ptr %11, align 1, !tbaa !11
  %215 = add i8 %214, 1
  store i8 %215, ptr %11, align 1, !tbaa !11
  br label %117, !llvm.loop !21

216:                                              ; preds = %117
  br label %217

217:                                              ; preds = %216, %115
  %218 = load ptr, ptr %7, align 8, !tbaa !5
  %219 = load ptr, ptr %6, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %218, ptr noundef %219)
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}
!17 = distinct !{!17, !13}
!18 = distinct !{!18, !13}
!19 = distinct !{!19, !13}
!20 = distinct !{!20, !13}
!21 = distinct !{!21, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_asimd_compute.tuple = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_asimd_compute(ptr noundef %0, ptr noundef %1, i32 noundef %2, i8 noundef zeroext %3, i8 noundef zeroext %4) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %6 = icmp eq i8 %4, 0
  br i1 %6, label %.preheader80, label %.preheader85

.preheader85:                                     ; preds = %5
  switch i8 %3, label %.loopexit81 [
    i8 0, label %.preheader84.us.preheader
    i8 1, label %.preheader84.us112.preheader
    i8 2, label %.preheader84.us117.preheader
  ]

.preheader84.us117.preheader:                     ; preds = %.preheader85
  %.pre.pre = load i32, ptr @__const.test_asimd_compute.tuple, align 4, !tbaa !5
  %.pre225.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 4), align 4, !tbaa !5
  %.pre226.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 8), align 4, !tbaa !5
  br label %.preheader84.us117

.preheader84.us112.preheader:                     ; preds = %.preheader85
  %.pre227.pre = load i32, ptr @__const.test_asimd_compute.tuple, align 4, !tbaa !5
  %7 = icmp eq i32 %.pre227.pre, 7
  %8 = select i1 %7, i32 2, i32 4
  %9 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 4), align 4
  %10 = icmp eq i32 %9, 7
  %11 = select i1 %10, i32 2, i32 4
  %12 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 8), align 4
  %13 = icmp eq i32 %12, 7
  %14 = select i1 %13, i32 2, i32 4
  br label %.preheader84.us112

.preheader84.us.preheader:                        ; preds = %.preheader85
  %.pre228.pre = load i32, ptr @__const.test_asimd_compute.tuple, align 4, !tbaa !5
  %.pre229.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 4), align 4, !tbaa !5
  %.pre230.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 8), align 4, !tbaa !5
  br label %.preheader84.us

.preheader84.us:                                  ; preds = %.preheader84.us.preheader, %.split97.us.us
  %indvars.iv185 = phi i32 [ 0, %.preheader84.us.preheader ], [ %indvars.iv.next186, %.split97.us.us ]
  br label %.preheader83.us.us

.preheader83.us.us:                               ; preds = %.preheader83.us.us, %.preheader84.us
  %indvars.iv181 = phi i32 [ %indvars.iv.next182, %.preheader83.us.us ], [ 0, %.preheader84.us ]
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv181, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %indvars.iv185, i32 noundef %.pre228.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv181, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %indvars.iv185, i32 noundef %.pre229.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv181, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %indvars.iv185, i32 noundef %.pre230.pre) #2
  %indvars.iv.next182 = add nuw nsw i32 %indvars.iv181, 1
  %exitcond184.not = icmp eq i32 %indvars.iv.next182, 32
  br i1 %exitcond184.not, label %.split97.us.us, label %.preheader83.us.us, !llvm.loop !9

.split97.us.us:                                   ; preds = %.preheader83.us.us
  %indvars.iv.next186 = add nuw nsw i32 %indvars.iv185, 1
  %exitcond188.not = icmp eq i32 %indvars.iv.next186, 32
  br i1 %exitcond188.not, label %.loopexit81, label %.preheader84.us, !llvm.loop !11

.preheader84.us112:                               ; preds = %.preheader84.us112.preheader, %.split97.split.us.us
  %indvars.iv173 = phi i32 [ 0, %.preheader84.us112.preheader ], [ %indvars.iv.next174, %.split97.split.us.us ]
  br label %.preheader83.us99.us

.preheader83.us99.us:                             ; preds = %.loopexit82.us.us.us.2, %.preheader84.us112
  %indvars.iv169 = phi i32 [ %indvars.iv.next170, %.loopexit82.us.us.us.2 ], [ 0, %.preheader84.us112 ]
  br label %15

15:                                               ; preds = %15, %.preheader83.us99.us
  %indvars.iv161 = phi i32 [ %indvars.iv.next162, %15 ], [ 0, %.preheader83.us99.us ]
  %16 = trunc nuw nsw i32 %indvars.iv161 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv169, i32 noundef 127, i8 noundef zeroext %16, i32 noundef %indvars.iv173, i32 noundef %.pre227.pre) #2
  %indvars.iv.next162 = add nuw nsw i32 %indvars.iv161, 1
  %exitcond164.not = icmp eq i32 %indvars.iv.next162, %8
  br i1 %exitcond164.not, label %.loopexit82.us.us.us, label %15, !llvm.loop !12

.loopexit82.us.us.us:                             ; preds = %15, %.loopexit82.us.us.us
  %indvars.iv161.1 = phi i32 [ %indvars.iv.next162.1, %.loopexit82.us.us.us ], [ 0, %15 ]
  %17 = trunc nuw nsw i32 %indvars.iv161.1 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv169, i32 noundef 127, i8 noundef zeroext %17, i32 noundef %indvars.iv173, i32 noundef %9) #2
  %indvars.iv.next162.1 = add nuw nsw i32 %indvars.iv161.1, 1
  %exitcond164.1.not = icmp eq i32 %indvars.iv.next162.1, %11
  br i1 %exitcond164.1.not, label %.loopexit82.us.us.us.1, label %.loopexit82.us.us.us, !llvm.loop !12

.loopexit82.us.us.us.1:                           ; preds = %.loopexit82.us.us.us, %.loopexit82.us.us.us.1
  %indvars.iv161.2 = phi i32 [ %indvars.iv.next162.2, %.loopexit82.us.us.us.1 ], [ 0, %.loopexit82.us.us.us ]
  %18 = trunc nuw nsw i32 %indvars.iv161.2 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv169, i32 noundef 127, i8 noundef zeroext %18, i32 noundef %indvars.iv173, i32 noundef %12) #2
  %indvars.iv.next162.2 = add nuw nsw i32 %indvars.iv161.2, 1
  %exitcond164.2.not = icmp eq i32 %indvars.iv.next162.2, %14
  br i1 %exitcond164.2.not, label %.loopexit82.us.us.us.2, label %.loopexit82.us.us.us.1, !llvm.loop !12

.loopexit82.us.us.us.2:                           ; preds = %.loopexit82.us.us.us.1
  %indvars.iv.next170 = add nuw nsw i32 %indvars.iv169, 1
  %exitcond172.not = icmp eq i32 %indvars.iv.next170, 32
  br i1 %exitcond172.not, label %.split97.split.us.us, label %.preheader83.us99.us, !llvm.loop !9

.split97.split.us.us:                             ; preds = %.loopexit82.us.us.us.2
  %indvars.iv.next174 = add nuw nsw i32 %indvars.iv173, 1
  %exitcond176.not = icmp eq i32 %indvars.iv.next174, 32
  br i1 %exitcond176.not, label %.loopexit81, label %.preheader84.us112, !llvm.loop !11

.preheader84.us117:                               ; preds = %.preheader84.us117.preheader, %.split97.split.split.us.us
  %indvars.iv157 = phi i32 [ 0, %.preheader84.us117.preheader ], [ %indvars.iv.next158, %.split97.split.split.us.us ]
  br label %.preheader83.us104.us

.preheader83.us104.us:                            ; preds = %.preheader83.us104.us, %.preheader84.us117
  %indvars.iv = phi i32 [ %indvars.iv.next, %.preheader83.us104.us ], [ 0, %.preheader84.us117 ]
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv, i32 noundef 127, i8 noundef zeroext 28, i32 noundef %indvars.iv157, i32 noundef %.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv, i32 noundef 127, i8 noundef zeroext 28, i32 noundef %indvars.iv157, i32 noundef %.pre225.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv, i32 noundef 127, i8 noundef zeroext 28, i32 noundef %indvars.iv157, i32 noundef %.pre226.pre) #2
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %exitcond.not = icmp eq i32 %indvars.iv.next, 32
  br i1 %exitcond.not, label %.split97.split.split.us.us, label %.preheader83.us104.us, !llvm.loop !9

.split97.split.split.us.us:                       ; preds = %.preheader83.us104.us
  %indvars.iv.next158 = add nuw nsw i32 %indvars.iv157, 1
  %exitcond160.not = icmp eq i32 %indvars.iv.next158, 32
  br i1 %exitcond160.not, label %.loopexit81, label %.preheader84.us117, !llvm.loop !11

.preheader80:                                     ; preds = %5
  switch i8 %3, label %.loopexit81 [
    i8 0, label %.preheader79.us.preheader
    i8 1, label %.preheader79.us146.preheader
  ]

.preheader79.us146.preheader:                     ; preds = %.preheader80
  %.pre231.pre.pre = load i32, ptr @__const.test_asimd_compute.tuple, align 4, !tbaa !5
  %19 = icmp eq i32 %.pre231.pre.pre, 7
  %20 = select i1 %19, i32 2, i32 4
  %21 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 4), align 4
  %22 = icmp eq i32 %21, 7
  %23 = select i1 %22, i32 2, i32 4
  %24 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 8), align 4
  %25 = icmp eq i32 %24, 7
  %26 = select i1 %25, i32 2, i32 4
  br label %.preheader79.us146

.preheader79.us.preheader:                        ; preds = %.preheader80
  %.pre232.pre.pre = load i32, ptr @__const.test_asimd_compute.tuple, align 4, !tbaa !5
  %.pre233.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 4), align 4, !tbaa !5
  %.pre234.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_asimd_compute.tuple, i64 8), align 4, !tbaa !5
  br label %.preheader79.us

.preheader79.us:                                  ; preds = %.preheader79.us.preheader, %.split.us.us
  %indvars.iv221 = phi i32 [ 0, %.preheader79.us.preheader ], [ %indvars.iv.next222, %.split.us.us ]
  br label %.preheader78.us.us

.preheader78.us.us:                               ; preds = %.split128.us.us.us, %.preheader79.us
  %indvars.iv217 = phi i32 [ %indvars.iv.next218, %.split128.us.us.us ], [ 0, %.preheader79.us ]
  br label %.preheader.us.us.us

.preheader.us.us.us:                              ; preds = %.preheader.us.us.us, %.preheader78.us.us
  %indvars.iv213 = phi i32 [ %indvars.iv.next214, %.preheader.us.us.us ], [ 0, %.preheader78.us.us ]
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv217, i32 noundef %indvars.iv213, i8 noundef zeroext 0, i32 noundef %indvars.iv221, i32 noundef %.pre232.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv217, i32 noundef %indvars.iv213, i8 noundef zeroext 0, i32 noundef %indvars.iv221, i32 noundef %.pre233.pre.pre) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv217, i32 noundef %indvars.iv213, i8 noundef zeroext 0, i32 noundef %indvars.iv221, i32 noundef %.pre234.pre.pre) #2
  %indvars.iv.next214 = add nuw nsw i32 %indvars.iv213, 1
  %exitcond216.not = icmp eq i32 %indvars.iv.next214, 32
  br i1 %exitcond216.not, label %.split128.us.us.us, label %.preheader.us.us.us, !llvm.loop !13

.split128.us.us.us:                               ; preds = %.preheader.us.us.us
  %indvars.iv.next218 = add nuw nsw i32 %indvars.iv217, 1
  %exitcond220.not = icmp eq i32 %indvars.iv.next218, 32
  br i1 %exitcond220.not, label %.split.us.us, label %.preheader78.us.us, !llvm.loop !14

.split.us.us:                                     ; preds = %.split128.us.us.us
  %indvars.iv.next222 = add nuw nsw i32 %indvars.iv221, 1
  %exitcond224.not = icmp eq i32 %indvars.iv.next222, 32
  br i1 %exitcond224.not, label %.loopexit81, label %.preheader79.us, !llvm.loop !15

.preheader79.us146:                               ; preds = %.preheader79.us146.preheader, %.split.split142.us.us
  %indvars.iv205 = phi i32 [ 0, %.preheader79.us146.preheader ], [ %indvars.iv.next206, %.split.split142.us.us ]
  br label %.preheader78.us137.us

.preheader78.us137.us:                            ; preds = %.split128.split.us.us.us, %.preheader79.us146
  %indvars.iv201 = phi i32 [ %indvars.iv.next202, %.split128.split.us.us.us ], [ 0, %.preheader79.us146 ]
  br label %.preheader.us130.us.us

.preheader.us130.us.us:                           ; preds = %.loopexit.us.us.us.us.2, %.preheader78.us137.us
  %indvars.iv197 = phi i32 [ %indvars.iv.next198, %.loopexit.us.us.us.us.2 ], [ 0, %.preheader78.us137.us ]
  br label %27

27:                                               ; preds = %27, %.preheader.us130.us.us
  %indvars.iv189 = phi i32 [ %indvars.iv.next190, %27 ], [ 0, %.preheader.us130.us.us ]
  %28 = trunc nuw nsw i32 %indvars.iv189 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv201, i32 noundef %indvars.iv197, i8 noundef zeroext %28, i32 noundef %indvars.iv205, i32 noundef %.pre231.pre.pre) #2
  %indvars.iv.next190 = add nuw nsw i32 %indvars.iv189, 1
  %exitcond192.not = icmp eq i32 %indvars.iv.next190, %20
  br i1 %exitcond192.not, label %.loopexit.us.us.us.us, label %27, !llvm.loop !16

.loopexit.us.us.us.us:                            ; preds = %27, %.loopexit.us.us.us.us
  %indvars.iv189.1 = phi i32 [ %indvars.iv.next190.1, %.loopexit.us.us.us.us ], [ 0, %27 ]
  %29 = trunc nuw nsw i32 %indvars.iv189.1 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv201, i32 noundef %indvars.iv197, i8 noundef zeroext %29, i32 noundef %indvars.iv205, i32 noundef %21) #2
  %indvars.iv.next190.1 = add nuw nsw i32 %indvars.iv189.1, 1
  %exitcond192.1.not = icmp eq i32 %indvars.iv.next190.1, %23
  br i1 %exitcond192.1.not, label %.loopexit.us.us.us.us.1, label %.loopexit.us.us.us.us, !llvm.loop !16

.loopexit.us.us.us.us.1:                          ; preds = %.loopexit.us.us.us.us, %.loopexit.us.us.us.us.1
  %indvars.iv189.2 = phi i32 [ %indvars.iv.next190.2, %.loopexit.us.us.us.us.1 ], [ 0, %.loopexit.us.us.us.us ]
  %30 = trunc nuw nsw i32 %indvars.iv189.2 to i8
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %1, i32 noundef %2, i32 noundef %indvars.iv201, i32 noundef %indvars.iv197, i8 noundef zeroext %30, i32 noundef %indvars.iv205, i32 noundef %24) #2
  %indvars.iv.next190.2 = add nuw nsw i32 %indvars.iv189.2, 1
  %exitcond192.2.not = icmp eq i32 %indvars.iv.next190.2, %26
  br i1 %exitcond192.2.not, label %.loopexit.us.us.us.us.2, label %.loopexit.us.us.us.us.1, !llvm.loop !16

.loopexit.us.us.us.us.2:                          ; preds = %.loopexit.us.us.us.us.1
  %indvars.iv.next198 = add nuw nsw i32 %indvars.iv197, 1
  %exitcond200.not = icmp eq i32 %indvars.iv.next198, 32
  br i1 %exitcond200.not, label %.split128.split.us.us.us, label %.preheader.us130.us.us, !llvm.loop !13

.split128.split.us.us.us:                         ; preds = %.loopexit.us.us.us.us.2
  %indvars.iv.next202 = add nuw nsw i32 %indvars.iv201, 1
  %exitcond204.not = icmp eq i32 %indvars.iv.next202, 32
  br i1 %exitcond204.not, label %.split.split142.us.us, label %.preheader78.us137.us, !llvm.loop !14

.split.split142.us.us:                            ; preds = %.split128.split.us.us.us
  %indvars.iv.next206 = add nuw nsw i32 %indvars.iv205, 1
  %exitcond208.not = icmp eq i32 %indvars.iv.next206, 32
  br i1 %exitcond208.not, label %.loopexit81, label %.preheader79.us146, !llvm.loop !15

.loopexit81:                                      ; preds = %.split97.split.split.us.us, %.split97.split.us.us, %.split97.us.us, %.split.split142.us.us, %.split.us.us, %.preheader80, %.preheader85
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass