; LLVM IR from stillwater-sc/universal :: c_api/pure_c/posit (posit8)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.posit8_u = type { [1 x i8] }

@__const.posit8_addMagnitude.p = external hidden unnamed_addr constant %union.posit8_u, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: inlinehint nounwind uwtable
declare signext i8 @posit8_decode_regime(i8 noundef zeroext, ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i1 @posit8_isnar(i8) #2

; Function Attrs: nounwind uwtable
define dso_local i8 @posit8_addMagnitude(i8 %0, i8 %1) #3 {
  %3 = alloca %union.posit8_u, align 1
  %4 = alloca %union.posit8_u, align 1
  %5 = alloca %union.posit8_u, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  %11 = alloca i8, align 1
  %12 = alloca i16, align 2
  %13 = alloca i8, align 1
  %14 = alloca i16, align 2
  %15 = alloca i8, align 1
  %16 = alloca i8, align 1
  %17 = getelementptr inbounds %union.posit8_u, ptr %4, i32 0, i32 0
  store i8 %0, ptr %17, align 1
  %18 = getelementptr inbounds %union.posit8_u, ptr %5, i32 0, i32 0
  store i8 %1, ptr %18, align 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %3, ptr align 1 @__const.posit8_addMagnitude.p, i64 1, i1 false)
  %19 = getelementptr inbounds %union.posit8_u, ptr %4, i32 0, i32 0
  %20 = load i8, ptr %19, align 1
  %21 = call zeroext i1 @posit8_isnar(i8 %20)
  br i1 %21, label %26, label %22

22:                                               ; preds = %2
  %23 = getelementptr inbounds %union.posit8_u, ptr %5, i32 0, i32 0
  %24 = load i8, ptr %23, align 1
  %25 = call zeroext i1 @posit8_isnar(i8 %24)
  br i1 %25, label %26, label %27

26:                                               ; preds = %22, %2
  br label %140

27:                                               ; preds = %22
  %28 = getelementptr inbounds %union.posit8_u, ptr %4, i32 0, i32 0
  %29 = load i8, ptr %28, align 1
  %30 = call zeroext i1 @posit8_iszero(i8 %29)
  br i1 %30, label %35, label %31

31:                                               ; preds = %27
  %32 = getelementptr inbounds %union.posit8_u, ptr %5, i32 0, i32 0
  %33 = load i8, ptr %32, align 1
  %34 = call zeroext i1 @posit8_iszero(i8 %33)
  br i1 %34, label %35, label %42

35:                                               ; preds = %31, %27
  %36 = load i8, ptr %4, align 1, !tbaa !5
  %37 = zext i8 %36 to i32
  %38 = load i8, ptr %5, align 1, !tbaa !5
  %39 = zext i8 %38 to i32
  %40 = or i32 %37, %39
  %41 = trunc i32 %40 to i8
  store i8 %41, ptr %3, align 1, !tbaa !5
  br label %140

42:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  %43 = load i8, ptr %4, align 1, !tbaa !5
  %44 = zext i8 %43 to i32
  %45 = and i32 %44, 128
  %46 = icmp ne i32 %45, 0
  %47 = zext i1 %46 to i8
  store i8 %47, ptr %6, align 1, !tbaa !8
  %48 = load i8, ptr %6, align 1, !tbaa !8, !range !10, !noundef !11
  %49 = trunc i8 %48 to i1
  br i1 %49, label %50, label %61

50:                                               ; preds = %42
  %51 = load i8, ptr %4, align 1, !tbaa !5
  %52 = zext i8 %51 to i32
  %53 = sub nsw i32 0, %52
  %54 = and i32 %53, 255
  %55 = trunc i32 %54 to i8
  store i8 %55, ptr %4, align 1, !tbaa !5
  %56 = load i8, ptr %5, align 1, !tbaa !5
  %57 = zext i8 %56 to i32
  %58 = sub nsw i32 0, %57
  %59 = and i32 %58, 255
  %60 = trunc i32 %59 to i8
  store i8 %60, ptr %5, align 1, !tbaa !5
  br label %61

61:                                               ; preds = %50, %42
  %62 = load i8, ptr %4, align 1, !tbaa !5
  %63 = zext i8 %62 to i32
  %64 = load i8, ptr %5, align 1, !tbaa !5
  %65 = zext i8 %64 to i32
  %66 = icmp slt i32 %63, %65
  br i1 %66, label %67, label %71

67:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  %68 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %68, ptr %7, align 1, !tbaa !5
  %69 = load i8, ptr %5, align 1, !tbaa !5
  store i8 %69, ptr %4, align 1, !tbaa !5
  %70 = load i8, ptr %7, align 1, !tbaa !5
  store i8 %70, ptr %5, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  br label %71

71:                                               ; preds = %67, %61
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  store i8 0, ptr %8, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  %72 = load i8, ptr %4, align 1, !tbaa !5
  %73 = call signext i8 @posit8_decode_regime(i8 noundef zeroext %72, ptr noundef %8)
  store i8 %73, ptr %9, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #4
  %74 = load i8, ptr %8, align 1, !tbaa !5
  %75 = zext i8 %74 to i32
  %76 = or i32 128, %75
  %77 = shl i32 %76, 7
  %78 = trunc i32 %77 to i16
  store i16 %78, ptr %10, align 2, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  %79 = load i8, ptr %5, align 1, !tbaa !5
  %80 = call signext i8 @posit8_decode_regime(i8 noundef zeroext %79, ptr noundef %8)
  store i8 %80, ptr %11, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #4
  %81 = load i8, ptr %8, align 1, !tbaa !5
  %82 = zext i8 %81 to i32
  %83 = or i32 128, %82
  %84 = shl i32 %83, 7
  %85 = trunc i32 %84 to i16
  store i16 %85, ptr %12, align 2, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #4
  %86 = load i8, ptr %9, align 1, !tbaa !5
  %87 = sext i8 %86 to i32
  %88 = load i8, ptr %11, align 1, !tbaa !5
  %89 = sext i8 %88 to i32
  %90 = sub nsw i32 %87, %89
  %91 = trunc i32 %90 to i8
  store i8 %91, ptr %13, align 1, !tbaa !5
  %92 = load i8, ptr %13, align 1, !tbaa !5
  %93 = sext i8 %92 to i32
  %94 = icmp sgt i32 %93, 7
  br i1 %94, label %95, label %96

95:                                               ; preds = %71
  store i16 0, ptr %12, align 2, !tbaa !12
  br label %103

96:                                               ; preds = %71
  %97 = load i8, ptr %13, align 1, !tbaa !5
  %98 = sext i8 %97 to i32
  %99 = load i16, ptr %12, align 2, !tbaa !12
  %100 = zext i16 %99 to i32
  %101 = ashr i32 %100, %98
  %102 = trunc i32 %101 to i16
  store i16 %102, ptr %12, align 2, !tbaa !12
  br label %103

103:                                              ; preds = %96, %95
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #4
  %104 = load i16, ptr %10, align 2, !tbaa !12
  %105 = zext i16 %104 to i32
  %106 = load i16, ptr %12, align 2, !tbaa !12
  %107 = zext i16 %106 to i32
  %108 = add nsw i32 %105, %107
  %109 = trunc i32 %108 to i16
  store i16 %109, ptr %14, align 2, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #4
  %110 = load i16, ptr %14, align 2, !tbaa !12
  %111 = zext i16 %110 to i32
  %112 = and i32 32768, %111
  %113 = icmp ne i32 %112, 0
  %114 = zext i1 %113 to i8
  store i8 %114, ptr %15, align 1, !tbaa !8
  %115 = load i8, ptr %15, align 1, !tbaa !8, !range !10, !noundef !11
  %116 = trunc i8 %115 to i1
  br i1 %116, label %117, label %124

117:                                              ; preds = %103
  %118 = load i8, ptr %9, align 1, !tbaa !5
  %119 = add i8 %118, 1
  store i8 %119, ptr %9, align 1, !tbaa !5
  %120 = load i16, ptr %14, align 2, !tbaa !12
  %121 = zext i16 %120 to i32
  %122 = ashr i32 %121, 1
  %123 = trunc i32 %122 to i16
  store i16 %123, ptr %14, align 2, !tbaa !12
  br label %124

124:                                              ; preds = %117, %103
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #4
  %125 = load i8, ptr %9, align 1, !tbaa !5
  %126 = load i16, ptr %14, align 2, !tbaa !12
  %127 = call zeroext i8 @posit8_round(i8 noundef signext %125, i16 noundef zeroext %126)
  store i8 %127, ptr %16, align 1, !tbaa !5
  %128 = load i8, ptr %6, align 1, !tbaa !8, !range !10, !noundef !11
  %129 = trunc i8 %128 to i1
  br i1 %129, label %130, label %134

130:                                              ; preds = %124
  %131 = load i8, ptr %16, align 1, !tbaa !5
  %132 = zext i8 %131 to i32
  %133 = sub nsw i32 0, %132
  br label %137

134:                                              ; preds = %124
  %135 = load i8, ptr %16, align 1, !tbaa !5
  %136 = zext i8 %135 to i32
  br label %137

137:                                              ; preds = %134, %130
  %138 = phi i32 [ %133, %130 ], [ %136, %134 ]
  %139 = trunc i32 %138 to i8
  store i8 %139, ptr %3, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  br label %140

140:                                              ; preds = %137, %35, %26
  %141 = getelementptr inbounds %union.posit8_u, ptr %3, i32 0, i32 0
  %142 = load i8, ptr %141, align 1
  ret i8 %142
}

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i1 @posit8_iszero(i8) #2

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i8 @posit8_round(i8 noundef signext, i16 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"_Bool", !6, i64 0}
!10 = !{i8 0, i8 2}
!11 = !{}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.posit8_u = type { [1 x i8] }

@__const.posit8_addMagnitude.p = external hidden unnamed_addr constant %union.posit8_u, align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare signext i8 @posit8_decode_regime(i8 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i1 @posit8_isnar(i8) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i8 @posit8_addMagnitude(i8 %0, i8 %1) local_unnamed_addr #2 {
  %3 = alloca i8, align 1
  %.sroa.032.0.copyload = load i8, ptr @__const.posit8_addMagnitude.p, align 1
  %4 = tail call zeroext i1 @posit8_isnar(i8 %0)
  br i1 %4, label %39, label %5

5:                                                ; preds = %2
  %6 = tail call zeroext i1 @posit8_isnar(i8 %1)
  br i1 %6, label %39, label %7

7:                                                ; preds = %5
  %8 = tail call zeroext i1 @posit8_iszero(i8 %0)
  br i1 %8, label %11, label %9

9:                                                ; preds = %7
  %10 = tail call zeroext i1 @posit8_iszero(i8 %1)
  br i1 %10, label %11, label %13

11:                                               ; preds = %9, %7
  %12 = or i8 %1, %0
  br label %39

13:                                               ; preds = %9
  %.not = icmp sgt i8 %0, -1
  %14 = sub i8 0, %1
  %.sroa.0.0 = select i1 %.not, i8 %1, i8 %14
  %.sroa.024.0 = tail call i8 @llvm.abs.i8(i8 %0, i1 false)
  %.sroa.0.1 = tail call i8 @llvm.umin.i8(i8 %.sroa.024.0, i8 %.sroa.0.0)
  %.sroa.024.1 = tail call i8 @llvm.umax.i8(i8 %.sroa.024.0, i8 %.sroa.0.0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  store i8 0, ptr %3, align 1, !tbaa !5
  %15 = call signext i8 @posit8_decode_regime(i8 noundef zeroext %.sroa.024.1, ptr noundef nonnull %3)
  %16 = load i8, ptr %3, align 1, !tbaa !5
  %17 = or i8 %16, -128
  %18 = zext i8 %17 to i32
  %19 = shl nuw nsw i32 %18, 7
  %20 = call signext i8 @posit8_decode_regime(i8 noundef zeroext %.sroa.0.1, ptr noundef nonnull %3)
  %21 = sub i8 %15, %20
  %22 = icmp sgt i8 %21, 7
  br i1 %22, label %30, label %23

23:                                               ; preds = %13
  %24 = load i8, ptr %3, align 1, !tbaa !5
  %25 = or i8 %24, -128
  %26 = zext i8 %25 to i32
  %27 = shl nuw nsw i32 %26, 7
  %28 = zext nneg i8 %21 to i32
  %29 = lshr i32 %27, %28
  br label %30

30:                                               ; preds = %13, %23
  %.033 = phi i32 [ %29, %23 ], [ 0, %13 ]
  %31 = add nuw nsw i32 %.033, %19
  %32 = trunc nuw i32 %31 to i16
  %33 = lshr i32 %31, 15
  %34 = trunc nuw nsw i32 %33 to i8
  %.034 = add i8 %15, %34
  %35 = trunc nuw nsw i32 %33 to i16
  %.0 = lshr i16 %32, %35
  %36 = call zeroext i8 @posit8_round(i8 noundef signext %.034, i16 noundef zeroext %.0)
  %37 = sub i8 0, %36
  %38 = select i1 %.not, i8 %36, i8 %37
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  br label %39

39:                                               ; preds = %2, %5, %30, %11
  %.sroa.032.0 = phi i8 [ %.sroa.032.0.copyload, %2 ], [ %.sroa.032.0.copyload, %5 ], [ %12, %11 ], [ %38, %30 ]
  ret i8 %.sroa.032.0
}

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i1 @posit8_iszero(i8) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare zeroext i8 @posit8_round(i8 noundef signext, i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.abs.i8(i8, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.umin.i8(i8, i8) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.umax.i8(i8, i8) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass