; LLVM IR from mnovak42/hepemshow :: Simulation/src/Hist.ll (ZN4Hist4FillEd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Hist = type <{ %"class.std::__cxx11::basic_string", %"class.std::vector", %"class.std::vector", double, double, double, double, double, i32, [4 x i8] }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Hist4FillEd(ptr noundef nonnull align 8 dereferenceable(124) %0, double noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  %6 = load ptr, ptr %3, align 8
  %7 = load double, ptr %4, align 8, !tbaa !9
  %8 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 3
  %9 = load double, ptr %8, align 8, !tbaa !11
  %10 = fcmp olt double %7, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  br label %50

12:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %13 = load double, ptr %4, align 8, !tbaa !9
  %14 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 4
  %15 = load double, ptr %14, align 8, !tbaa !21
  %16 = fcmp oeq double %13, %15
  br i1 %16, label %17, label %21

17:                                               ; preds = %12
  %18 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 8
  %19 = load i32, ptr %18, align 8, !tbaa !22
  %20 = sub nsw i32 %19, 1
  br label %30

21:                                               ; preds = %12
  %22 = load double, ptr %4, align 8, !tbaa !9
  %23 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 3
  %24 = load double, ptr %23, align 8, !tbaa !11
  %25 = fsub double %22, %24
  %26 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 6
  %27 = load double, ptr %26, align 8, !tbaa !23
  %28 = fmul double %25, %27
  %29 = fptosi double %28 to i32
  br label %30

30:                                               ; preds = %21, %17
  %31 = phi i32 [ %20, %17 ], [ %29, %21 ]
  store i32 %31, ptr %5, align 4, !tbaa !24
  %32 = load i32, ptr %5, align 4, !tbaa !24
  %33 = icmp sgt i32 %32, -1
  br i1 %33, label %34, label %49

34:                                               ; preds = %30
  %35 = load i32, ptr %5, align 4, !tbaa !24
  %36 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 8
  %37 = load i32, ptr %36, align 8, !tbaa !22
  %38 = icmp slt i32 %35, %37
  br i1 %38, label %39, label %49

39:                                               ; preds = %34
  %40 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 2
  %41 = load i32, ptr %5, align 4, !tbaa !24
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #2
  %44 = load double, ptr %43, align 8, !tbaa !9
  %45 = fadd double %44, 1.000000e+00
  store double %45, ptr %43, align 8, !tbaa !9
  %46 = getelementptr inbounds %class.Hist, ptr %6, i32 0, i32 7
  %47 = load double, ptr %46, align 8, !tbaa !25
  %48 = fadd double %47, 1.000000e+00
  store double %48, ptr %46, align 8, !tbaa !25
  br label %49

49:                                               ; preds = %39, %34, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %50

50:                                               ; preds = %49, %11
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !10, i64 80}
!12 = !{!"_ZTS4Hist", !13, i64 0, !16, i64 32, !16, i64 56, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !20, i64 120}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"int", !7, i64 0}
!21 = !{!12, !10, i64 88}
!22 = !{!12, !20, i64 120}
!23 = !{!12, !10, i64 104}
!24 = !{!20, !20, i64 0}
!25 = !{!12, !10, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Hist4FillEd(ptr noundef nonnull align 8 dereferenceable(124) %0, double noundef %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 80
  %4 = load double, ptr %3, align 8, !tbaa !5
  %5 = fcmp ogt double %4, %1
  br i1 %5, label %34, label %6

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 88
  %8 = load double, ptr %7, align 8, !tbaa !19
  %9 = fcmp oeq double %8, %1
  br i1 %9, label %10, label %14

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %0, i64 120
  %12 = load i32, ptr %11, align 8
  %13 = add nsw i32 %12, -1
  br label %20

14:                                               ; preds = %6
  %15 = fsub double %1, %4
  %16 = getelementptr inbounds i8, ptr %0, i64 104
  %17 = load double, ptr %16, align 8, !tbaa !20
  %18 = fmul double %15, %17
  %19 = fptosi double %18 to i32
  %.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 120
  %.pre = load i32, ptr %.phi.trans.insert, align 8
  br label %20

20:                                               ; preds = %14, %10
  %21 = phi i32 [ %12, %10 ], [ %.pre, %14 ]
  %22 = phi i32 [ %13, %10 ], [ %19, %14 ]
  %23 = icmp sgt i32 %22, -1
  %24 = icmp slt i32 %22, %21
  %or.cond = select i1 %23, i1 %24, i1 false
  br i1 %or.cond, label %25, label %34

25:                                               ; preds = %20
  %26 = getelementptr inbounds i8, ptr %0, i64 56
  %27 = zext nneg i32 %22 to i64
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %27) #1
  %29 = load double, ptr %28, align 8, !tbaa !21
  %30 = fadd double %29, 1.000000e+00
  store double %30, ptr %28, align 8, !tbaa !21
  %31 = getelementptr inbounds i8, ptr %0, i64 112
  %32 = load double, ptr %31, align 8, !tbaa !22
  %33 = fadd double %32, 1.000000e+00
  store double %33, ptr %31, align 8, !tbaa !22
  br label %34

34:                                               ; preds = %20, %25, %2
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !17, i64 80}
!6 = !{!"_ZTS4Hist", !7, i64 0, !13, i64 32, !13, i64 56, !17, i64 80, !17, i64 88, !17, i64 96, !17, i64 104, !17, i64 112, !18, i64 120}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!17 = !{!"double", !10, i64 0}
!18 = !{!"int", !10, i64 0}
!19 = !{!6, !17, i64 88}
!20 = !{!6, !17, i64 104}
!21 = !{!17, !17, i64 0}
!22 = !{!6, !17, i64 112}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass