; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseReorder.ll (ZN4Simd4Base12Reorder64bitEPKhmPh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [14 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder64bitEPKhmPh = external hidden unnamed_addr constant [66 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12Reorder64bitEPKhmPh(ptr noundef %0, i64 noundef %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load i64, ptr %5, align 8, !tbaa !9
  %9 = urem i64 %8, 8
  %10 = icmp eq i64 %9, 0
  br i1 %10, label %11, label %12

11:                                               ; preds = %3
  br label %14

12:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 77, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder64bitEPKhmPh) #4
  unreachable

13:                                               ; No predecessors!
  br label %14

14:                                               ; preds = %13, %11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 0, ptr %7, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %27, %14
  %16 = load i64, ptr %7, align 8, !tbaa !9
  %17 = load i64, ptr %5, align 8, !tbaa !9
  %18 = icmp ult i64 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  br label %30

20:                                               ; preds = %15
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = load i64, ptr %7, align 8, !tbaa !9
  %23 = getelementptr inbounds i8, ptr %21, i64 %22
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load i64, ptr %7, align 8, !tbaa !9
  %26 = getelementptr inbounds i8, ptr %24, i64 %25
  call void @_ZN4Simd4Base12Reorder64bitEPKhPh(ptr noundef %23, ptr noundef %26)
  br label %27

27:                                               ; preds = %20
  %28 = load i64, ptr %7, align 8, !tbaa !9
  %29 = add i64 %28, 8
  store i64 %29, ptr %7, align 8, !tbaa !9
  br label %15, !llvm.loop !11

30:                                               ; preds = %19
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base12Reorder64bitEPKhPh(ptr noundef, ptr noundef) #3

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [14 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder64bitEPKhmPh = external hidden unnamed_addr constant [66 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base12Reorder64bitEPKhmPh(ptr noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = and i64 %1, 7
  %5 = icmp eq i64 %4, 0
  br i1 %5, label %.preheader, label %6

.preheader:                                       ; preds = %3
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

6:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 77, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder64bitEPKhmPh) #3
  unreachable

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.07 = phi i64 [ %9, %.lr.ph ], [ 0, %.preheader ]
  %7 = getelementptr inbounds i8, ptr %0, i64 %.07
  %8 = getelementptr inbounds i8, ptr %2, i64 %.07
  tail call void @_ZN4Simd4Base12Reorder64bitEPKhPh(ptr noundef %7, ptr noundef %8)
  %9 = add i64 %.07, 8
  %10 = icmp ult i64 %9, %1
  br i1 %10, label %.lr.ph, label %._crit_edge, !llvm.loop !5
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base12Reorder64bitEPKhPh(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass