; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_transform_aarch64_sve)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }

@.str = external hidden unnamed_addr constant [98 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel = external hidden unnamed_addr constant [72 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9, i32 noundef %10) #2 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store i32 %2, ptr %14, align 4, !tbaa !9
  store i32 %3, ptr %15, align 4, !tbaa !9
  store i32 %4, ptr %16, align 4, !tbaa !9
  store i32 %5, ptr %17, align 4, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !9
  store i32 %7, ptr %19, align 4, !tbaa !9
  store ptr %8, ptr %20, align 8, !tbaa !5
  store ptr %9, ptr %21, align 8, !tbaa !5
  store i32 %10, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %31 = load ptr, ptr %21, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %31, i32 0, i32 0
  %33 = load i32, ptr %32, align 1, !tbaa !11
  %34 = urem i32 %33, 16
  store i32 %34, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %35 = load ptr, ptr %21, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 1, !tbaa !14
  %38 = urem i32 %37, 4
  store i32 %38, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  store i32 1, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  store i32 2, ptr %26, align 4, !tbaa !9
  %39 = load i32, ptr %22, align 4, !tbaa !9
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %53

41:                                               ; preds = %11
  %42 = load i32, ptr %24, align 4, !tbaa !9
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %53

44:                                               ; preds = %41
  %45 = load ptr, ptr %12, align 8, !tbaa !5
  %46 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %47 = icmp ult i32 1, %46
  br i1 %47, label %48, label %50

48:                                               ; preds = %44
  %49 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %51

50:                                               ; preds = %44
  br label %51

51:                                               ; preds = %50, %48
  %52 = phi i32 [ %49, %48 ], [ 1, %50 ]
  call void @libxsmm_handle_error(ptr noundef %45, i32 noundef 90000, ptr noundef @__func__.libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel, ptr noundef @.str, i32 noundef 336, i32 noundef %52)
  store i32 1, ptr %27, align 4
  br label %353

53:                                               ; preds = %41, %11
  %54 = load i32, ptr %23, align 4, !tbaa !9
  %55 = icmp ugt i32 %54, 0
  br i1 %55, label %56, label %75

56:                                               ; preds = %53
  %57 = load ptr, ptr %12, align 8, !tbaa !5
  %58 = load i32, ptr %25, align 4, !tbaa !9
  %59 = load i32, ptr %23, align 4, !tbaa !9
  %60 = load ptr, ptr %20, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %60, i32 0, i32 2
  %62 = load i32, ptr %61, align 4, !tbaa !15
  %63 = mul i32 %59, %62
  %64 = load i32, ptr %19, align 4, !tbaa !9
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %57, i32 noundef %58, i32 noundef %63, i32 noundef %64)
  %65 = load ptr, ptr %12, align 8, !tbaa !5
  %66 = load i32, ptr %26, align 4, !tbaa !9
  %67 = load i32, ptr %23, align 4, !tbaa !9
  %68 = urem i32 %67, 4
  %69 = mul i32 %68, 4
  %70 = load ptr, ptr %20, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %70, i32 0, i32 5
  %72 = load i32, ptr %71, align 4, !tbaa !17
  %73 = mul i32 %69, %72
  %74 = load i32, ptr %19, align 4, !tbaa !9
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %65, i32 noundef %66, i32 noundef %73, i32 noundef %74)
  br label %75

75:                                               ; preds = %56, %53
  %76 = load ptr, ptr %21, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %76, i32 0, i32 0
  %78 = load i32, ptr %77, align 1, !tbaa !11
  %79 = icmp uge i32 %78, 16
  br i1 %79, label %80, label %227

80:                                               ; preds = %75
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  %81 = load ptr, ptr %21, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %81, i32 0, i32 0
  %83 = load i32, ptr %82, align 1, !tbaa !11
  %84 = udiv i32 %83, 16
  %85 = mul i32 %84, 16
  store i32 %85, ptr %28, align 4, !tbaa !9
  %86 = load ptr, ptr %21, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %86, i32 0, i32 1
  %88 = load i32, ptr %87, align 1, !tbaa !14
  %89 = icmp uge i32 %88, 4
  br i1 %89, label %90, label %186

90:                                               ; preds = %80
  %91 = load ptr, ptr %12, align 8, !tbaa !5
  %92 = load ptr, ptr %13, align 8, !tbaa !5
  %93 = load i32, ptr %18, align 4, !tbaa !9
  %94 = load ptr, ptr %21, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %94, i32 0, i32 1
  %96 = load i32, ptr %95, align 1, !tbaa !14
  %97 = udiv i32 %96, 4
  %98 = mul i32 %97, 4
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %91, ptr noundef %92, i32 noundef %93, i32 noundef %98)
  %99 = load ptr, ptr %12, align 8, !tbaa !5
  %100 = load ptr, ptr %13, align 8, !tbaa !5
  %101 = load i32, ptr %17, align 4, !tbaa !9
  %102 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %99, ptr noundef %100, i32 noundef %101, i32 noundef %102)
  %103 = load ptr, ptr %12, align 8, !tbaa !5
  %104 = load ptr, ptr %13, align 8, !tbaa !5
  %105 = load i32, ptr %15, align 4, !tbaa !9
  %106 = load i32, ptr %16, align 4, !tbaa !9
  %107 = load i32, ptr %17, align 4, !tbaa !9
  %108 = load i32, ptr %18, align 4, !tbaa !9
  %109 = load i32, ptr %19, align 4, !tbaa !9
  %110 = load ptr, ptr %20, align 8, !tbaa !5
  %111 = load ptr, ptr %21, align 8, !tbaa !5
  call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %103, ptr noundef %104, i32 noundef %105, i32 noundef %106, i32 noundef %107, i32 noundef %108, i32 noundef %109, ptr noundef %110, ptr noundef %111, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  %112 = load ptr, ptr %12, align 8, !tbaa !5
  %113 = load i32, ptr %15, align 4, !tbaa !9
  %114 = load i32, ptr %19, align 4, !tbaa !9
  %115 = load i32, ptr %15, align 4, !tbaa !9
  %116 = load ptr, ptr %20, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %116, i32 0, i32 2
  %118 = load i32, ptr %117, align 4, !tbaa !15
  %119 = zext i32 %118 to i64
  %120 = mul nsw i64 16, %119
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %112, i32 noundef 4096, i32 noundef %113, i32 noundef %114, i32 noundef %115, i64 noundef %120)
  %121 = load ptr, ptr %12, align 8, !tbaa !5
  %122 = load i32, ptr %16, align 4, !tbaa !9
  %123 = load i32, ptr %19, align 4, !tbaa !9
  %124 = load i32, ptr %16, align 4, !tbaa !9
  %125 = load ptr, ptr %20, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %125, i32 0, i32 5
  %127 = load i32, ptr %126, align 4, !tbaa !17
  %128 = zext i32 %127 to i64
  %129 = mul nsw i64 64, %128
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %121, i32 noundef 4096, i32 noundef %122, i32 noundef %123, i32 noundef %124, i64 noundef %129)
  %130 = load ptr, ptr %12, align 8, !tbaa !5
  %131 = load ptr, ptr %13, align 8, !tbaa !5
  %132 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %130, ptr noundef %131, i32 noundef %132, i32 noundef 16)
  %133 = load ptr, ptr %21, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %133, i32 0, i32 2
  %135 = load i32, ptr %134, align 1, !tbaa !18
  %136 = mul i32 4, %135
  %137 = load i32, ptr %28, align 4, !tbaa !9
  %138 = icmp ugt i32 %136, %137
  br i1 %138, label %139, label %157

139:                                              ; preds = %90
  %140 = load ptr, ptr %12, align 8, !tbaa !5
  %141 = load i32, ptr %15, align 4, !tbaa !9
  %142 = load i32, ptr %19, align 4, !tbaa !9
  %143 = load i32, ptr %15, align 4, !tbaa !9
  %144 = load ptr, ptr %21, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %144, i32 0, i32 2
  %146 = load i32, ptr %145, align 1, !tbaa !18
  %147 = zext i32 %146 to i64
  %148 = mul nsw i64 4, %147
  %149 = load i32, ptr %28, align 4, !tbaa !9
  %150 = zext i32 %149 to i64
  %151 = sub nsw i64 %148, %150
  %152 = load ptr, ptr %20, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %152, i32 0, i32 2
  %154 = load i32, ptr %153, align 4, !tbaa !15
  %155 = zext i32 %154 to i64
  %156 = mul nsw i64 %151, %155
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %140, i32 noundef 4096, i32 noundef %141, i32 noundef %142, i32 noundef %143, i64 noundef %156)
  br label %157

157:                                              ; preds = %139, %90
  %158 = load ptr, ptr %21, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %158, i32 0, i32 3
  %160 = load i32, ptr %159, align 1, !tbaa !19
  %161 = load i32, ptr %28, align 4, !tbaa !9
  %162 = icmp ugt i32 %160, %161
  br i1 %162, label %163, label %182

163:                                              ; preds = %157
  %164 = load ptr, ptr %12, align 8, !tbaa !5
  %165 = load i32, ptr %16, align 4, !tbaa !9
  %166 = load i32, ptr %19, align 4, !tbaa !9
  %167 = load i32, ptr %16, align 4, !tbaa !9
  %168 = load ptr, ptr %21, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %168, i32 0, i32 3
  %170 = load i32, ptr %169, align 1, !tbaa !19
  %171 = zext i32 %170 to i64
  %172 = mul nsw i64 4, %171
  %173 = load i32, ptr %28, align 4, !tbaa !9
  %174 = zext i32 %173 to i64
  %175 = mul nsw i64 4, %174
  %176 = sub nsw i64 %172, %175
  %177 = load ptr, ptr %20, align 8, !tbaa !5
  %178 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %177, i32 0, i32 5
  %179 = load i32, ptr %178, align 4, !tbaa !17
  %180 = zext i32 %179 to i64
  %181 = mul nsw i64 %176, %180
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %164, i32 noundef 4096, i32 noundef %165, i32 noundef %166, i32 noundef %167, i64 noundef %181)
  br label %182

182:                                              ; preds = %163, %157
  %183 = load ptr, ptr %12, align 8, !tbaa !5
  %184 = load ptr, ptr %13, align 8, !tbaa !5
  %185 = load i32, ptr %18, align 4, !tbaa !9
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %183, ptr noundef %184, i32 noundef %185, i32 noundef 4)
  br label %186

186:                                              ; preds = %182, %80
  %187 = load i32, ptr %24, align 4, !tbaa !9
  %188 = icmp ne i32 %187, 0
  br i1 %188, label %189, label %226

189:                                              ; preds = %186
  %190 = load ptr, ptr %12, align 8, !tbaa !5
  %191 = load ptr, ptr %13, align 8, !tbaa !5
  %192 = load i32, ptr %17, align 4, !tbaa !9
  %193 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %190, ptr noundef %191, i32 noundef %192, i32 noundef %193)
  %194 = load ptr, ptr %12, align 8, !tbaa !5
  %195 = load ptr, ptr %13, align 8, !tbaa !5
  %196 = load i32, ptr %15, align 4, !tbaa !9
  %197 = load i32, ptr %16, align 4, !tbaa !9
  %198 = load i32, ptr %17, align 4, !tbaa !9
  %199 = load i32, ptr %18, align 4, !tbaa !9
  %200 = load i32, ptr %19, align 4, !tbaa !9
  %201 = load ptr, ptr %20, align 8, !tbaa !5
  %202 = load ptr, ptr %21, align 8, !tbaa !5
  %203 = load i32, ptr %24, align 4, !tbaa !9
  %204 = sub i32 4, %203
  call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %194, ptr noundef %195, i32 noundef %196, i32 noundef %197, i32 noundef %198, i32 noundef %199, i32 noundef %200, ptr noundef %201, ptr noundef %202, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %204)
  %205 = load ptr, ptr %12, align 8, !tbaa !5
  %206 = load i32, ptr %15, align 4, !tbaa !9
  %207 = load i32, ptr %19, align 4, !tbaa !9
  %208 = load i32, ptr %15, align 4, !tbaa !9
  %209 = load ptr, ptr %20, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %209, i32 0, i32 2
  %211 = load i32, ptr %210, align 4, !tbaa !15
  %212 = zext i32 %211 to i64
  %213 = mul nsw i64 16, %212
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %205, i32 noundef 4096, i32 noundef %206, i32 noundef %207, i32 noundef %208, i64 noundef %213)
  %214 = load ptr, ptr %12, align 8, !tbaa !5
  %215 = load i32, ptr %16, align 4, !tbaa !9
  %216 = load i32, ptr %19, align 4, !tbaa !9
  %217 = load i32, ptr %16, align 4, !tbaa !9
  %218 = load ptr, ptr %20, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %218, i32 0, i32 5
  %220 = load i32, ptr %219, align 4, !tbaa !17
  %221 = zext i32 %220 to i64
  %222 = mul nsw i64 64, %221
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %214, i32 noundef 4096, i32 noundef %215, i32 noundef %216, i32 noundef %217, i64 noundef %222)
  %223 = load ptr, ptr %12, align 8, !tbaa !5
  %224 = load ptr, ptr %13, align 8, !tbaa !5
  %225 = load i32, ptr %17, align 4, !tbaa !9
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %223, ptr noundef %224, i32 noundef %225, i32 noundef 16)
  br label %226

226:                                              ; preds = %189, %186
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  br label %227

227:                                              ; preds = %226, %75
  %228 = load i32, ptr %23, align 4, !tbaa !9
  %229 = icmp ugt i32 %228, 0
  br i1 %229, label %230, label %352

230:                                              ; preds = %227
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #3
  store i32 32, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #3
  store i32 80, ptr %30, align 4, !tbaa !9
  %231 = load ptr, ptr %12, align 8, !tbaa !5
  %232 = load i32, ptr %14, align 4, !tbaa !9
  %233 = load i32, ptr %29, align 4, !tbaa !9
  %234 = load i32, ptr %15, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %231, i32 noundef -1186988026, i32 noundef %232, i32 noundef 127, i32 noundef %233, i32 noundef %234)
  %235 = load ptr, ptr %12, align 8, !tbaa !5
  %236 = load i32, ptr %14, align 4, !tbaa !9
  %237 = load i32, ptr %30, align 4, !tbaa !9
  %238 = load i32, ptr %16, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %235, i32 noundef -1186988026, i32 noundef %236, i32 noundef 127, i32 noundef %237, i32 noundef %238)
  %239 = load ptr, ptr %21, align 8, !tbaa !5
  %240 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %239, i32 0, i32 0
  %241 = load i32, ptr %240, align 1, !tbaa !11
  %242 = udiv i32 %241, 16
  %243 = icmp ugt i32 %242, 0
  br i1 %243, label %244, label %276

244:                                              ; preds = %230
  %245 = load ptr, ptr %12, align 8, !tbaa !5
  %246 = load i32, ptr %15, align 4, !tbaa !9
  %247 = load i32, ptr %19, align 4, !tbaa !9
  %248 = load i32, ptr %15, align 4, !tbaa !9
  %249 = load ptr, ptr %21, align 8, !tbaa !5
  %250 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %249, i32 0, i32 0
  %251 = load i32, ptr %250, align 1, !tbaa !11
  %252 = zext i32 %251 to i64
  %253 = sdiv i64 %252, 16
  %254 = mul nsw i64 %253, 16
  %255 = load ptr, ptr %20, align 8, !tbaa !5
  %256 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %255, i32 0, i32 2
  %257 = load i32, ptr %256, align 4, !tbaa !15
  %258 = zext i32 %257 to i64
  %259 = mul nsw i64 %254, %258
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %245, i32 noundef 4096, i32 noundef %246, i32 noundef %247, i32 noundef %248, i64 noundef %259)
  %260 = load ptr, ptr %12, align 8, !tbaa !5
  %261 = load i32, ptr %16, align 4, !tbaa !9
  %262 = load i32, ptr %19, align 4, !tbaa !9
  %263 = load i32, ptr %16, align 4, !tbaa !9
  %264 = load ptr, ptr %21, align 8, !tbaa !5
  %265 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %264, i32 0, i32 0
  %266 = load i32, ptr %265, align 1, !tbaa !11
  %267 = zext i32 %266 to i64
  %268 = sdiv i64 %267, 16
  %269 = mul nsw i64 %268, 16
  %270 = mul nsw i64 %269, 4
  %271 = load ptr, ptr %20, align 8, !tbaa !5
  %272 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %271, i32 0, i32 5
  %273 = load i32, ptr %272, align 4, !tbaa !17
  %274 = zext i32 %273 to i64
  %275 = mul nsw i64 %270, %274
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %260, i32 noundef 4096, i32 noundef %261, i32 noundef %262, i32 noundef %263, i64 noundef %275)
  br label %276

276:                                              ; preds = %244, %230
  %277 = load ptr, ptr %21, align 8, !tbaa !5
  %278 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %277, i32 0, i32 1
  %279 = load i32, ptr %278, align 1, !tbaa !14
  %280 = icmp uge i32 %279, 4
  br i1 %280, label %281, label %333

281:                                              ; preds = %276
  %282 = load ptr, ptr %12, align 8, !tbaa !5
  %283 = load ptr, ptr %13, align 8, !tbaa !5
  %284 = load i32, ptr %18, align 4, !tbaa !9
  %285 = load ptr, ptr %21, align 8, !tbaa !5
  %286 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %285, i32 0, i32 1
  %287 = load i32, ptr %286, align 1, !tbaa !14
  %288 = udiv i32 %287, 4
  %289 = mul i32 %288, 4
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %282, ptr noundef %283, i32 noundef %284, i32 noundef %289)
  %290 = load ptr, ptr %12, align 8, !tbaa !5
  %291 = load ptr, ptr %13, align 8, !tbaa !5
  %292 = load i32, ptr %15, align 4, !tbaa !9
  %293 = load i32, ptr %16, align 4, !tbaa !9
  %294 = load i32, ptr %17, align 4, !tbaa !9
  %295 = load i32, ptr %18, align 4, !tbaa !9
  %296 = load i32, ptr %19, align 4, !tbaa !9
  %297 = load ptr, ptr %20, align 8, !tbaa !5
  %298 = load ptr, ptr %21, align 8, !tbaa !5
  %299 = load i32, ptr %23, align 4, !tbaa !9
  %300 = load i32, ptr %25, align 4, !tbaa !9
  %301 = load i32, ptr %26, align 4, !tbaa !9
  call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %290, ptr noundef %291, i32 noundef %292, i32 noundef %293, i32 noundef %294, i32 noundef %295, i32 noundef %296, ptr noundef %297, ptr noundef %298, i32 noundef %299, i32 noundef %300, i32 noundef %301, i32 noundef 0)
  %302 = load ptr, ptr %12, align 8, !tbaa !5
  %303 = load i32, ptr %15, align 4, !tbaa !9
  %304 = load i32, ptr %19, align 4, !tbaa !9
  %305 = load i32, ptr %15, align 4, !tbaa !9
  %306 = load ptr, ptr %21, align 8, !tbaa !5
  %307 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %306, i32 0, i32 2
  %308 = load i32, ptr %307, align 1, !tbaa !18
  %309 = zext i32 %308 to i64
  %310 = mul nsw i64 4, %309
  %311 = load ptr, ptr %20, align 8, !tbaa !5
  %312 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %311, i32 0, i32 2
  %313 = load i32, ptr %312, align 4, !tbaa !15
  %314 = zext i32 %313 to i64
  %315 = mul nsw i64 %310, %314
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %302, i32 noundef 4096, i32 noundef %303, i32 noundef %304, i32 noundef %305, i64 noundef %315)
  %316 = load ptr, ptr %12, align 8, !tbaa !5
  %317 = load i32, ptr %16, align 4, !tbaa !9
  %318 = load i32, ptr %19, align 4, !tbaa !9
  %319 = load i32, ptr %16, align 4, !tbaa !9
  %320 = load ptr, ptr %21, align 8, !tbaa !5
  %321 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %320, i32 0, i32 3
  %322 = load i32, ptr %321, align 1, !tbaa !19
  %323 = zext i32 %322 to i64
  %324 = mul nsw i64 4, %323
  %325 = load ptr, ptr %20, align 8, !tbaa !5
  %326 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %325, i32 0, i32 5
  %327 = load i32, ptr %326, align 4, !tbaa !17
  %328 = zext i32 %327 to i64
  %329 = mul nsw i64 %324, %328
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %316, i32 noundef 4096, i32 noundef %317, i32 noundef %318, i32 noundef %319, i64 noundef %329)
  %330 = load ptr, ptr %12, align 8, !tbaa !5
  %331 = load ptr, ptr %13, align 8, !tbaa !5
  %332 = load i32, ptr %18, align 4, !tbaa !9
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %330, ptr noundef %331, i32 noundef %332, i32 noundef 4)
  br label %333

333:                                              ; preds = %281, %276
  %334 = load i32, ptr %24, align 4, !tbaa !9
  %335 = icmp ne i32 %334, 0
  br i1 %335, label %336, label %351

336:                                              ; preds = %333
  %337 = load ptr, ptr %12, align 8, !tbaa !5
  %338 = load ptr, ptr %13, align 8, !tbaa !5
  %339 = load i32, ptr %15, align 4, !tbaa !9
  %340 = load i32, ptr %16, align 4, !tbaa !9
  %341 = load i32, ptr %17, align 4, !tbaa !9
  %342 = load i32, ptr %18, align 4, !tbaa !9
  %343 = load i32, ptr %19, align 4, !tbaa !9
  %344 = load ptr, ptr %20, align 8, !tbaa !5
  %345 = load ptr, ptr %21, align 8, !tbaa !5
  %346 = load i32, ptr %23, align 4, !tbaa !9
  %347 = load i32, ptr %25, align 4, !tbaa !9
  %348 = load i32, ptr %26, align 4, !tbaa !9
  %349 = load i32, ptr %24, align 4, !tbaa !9
  %350 = sub i32 4, %349
  call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %337, ptr noundef %338, i32 noundef %339, i32 noundef %340, i32 noundef %341, i32 noundef %342, i32 noundef %343, ptr noundef %344, ptr noundef %345, i32 noundef %346, i32 noundef %347, i32 noundef %348, i32 noundef %350)
  br label %351

351:                                              ; preds = %336, %333
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #3
  br label %352

352:                                              ; preds = %351, %227
  store i32 0, ptr %27, align 4
  br label %353

353:                                              ; preds = %352, %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  %354 = load i32, ptr %27, align 4
  switch i32 %354, label %356 [
    i32 0, label %355
    i32 1, label %355
  ]

355:                                              ; preds = %353, %353
  ret void

356:                                              ; preds = %353
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 27, !13, i64 29, !7, i64 31}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !10, i64 4}
!15 = !{!16, !10, i64 8}
!16 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!17 = !{!16, !10, i64 20}
!18 = !{!12, !10, i64 8}
!19 = !{!12, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [98 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel = external hidden unnamed_addr constant [72 x i8], align 1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9, i32 noundef %10) local_unnamed_addr #1 {
  %12 = load i32, ptr %9, align 1, !tbaa !5
  %13 = and i32 %12, 15
  %14 = getelementptr inbounds i8, ptr %9, i64 4
  %15 = load i32, ptr %14, align 1, !tbaa !11
  %16 = and i32 %15, 3
  %17 = icmp eq i32 %10, 0
  %18 = icmp ne i32 %16, 0
  %or.cond = select i1 %17, i1 %18, i1 false
  br i1 %or.cond, label %19, label %24

19:                                               ; preds = %11
  %20 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !12
  %21 = icmp ugt i32 %20, 1
  %22 = load i32, ptr @libxsmm_verbosity, align 4
  %23 = select i1 %21, i32 %22, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel, ptr noundef nonnull @.str, i32 noundef 336, i32 noundef %23) #2
  br label %129

24:                                               ; preds = %11
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %34, label %25

25:                                               ; preds = %24
  %26 = getelementptr inbounds i8, ptr %8, i64 8
  %27 = load i32, ptr %26, align 4, !tbaa !13
  %28 = mul i32 %27, %13
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 1, i32 noundef %28, i32 noundef %7) #2
  %29 = shl i32 %12, 2
  %30 = and i32 %29, 12
  %31 = getelementptr inbounds i8, ptr %8, i64 20
  %32 = load i32, ptr %31, align 4, !tbaa !15
  %33 = mul i32 %32, %30
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 2, i32 noundef %33, i32 noundef %7) #2
  %.pre = load i32, ptr %9, align 1, !tbaa !5
  br label %34

34:                                               ; preds = %25, %24
  %35 = phi i32 [ %.pre, %25 ], [ %12, %24 ]
  %36 = icmp ugt i32 %35, 15
  br i1 %36, label %37, label %87

37:                                               ; preds = %34
  %38 = and i32 %35, -16
  %39 = load i32, ptr %14, align 1, !tbaa !11
  %40 = icmp ugt i32 %39, 3
  br i1 %40, label %41, label %76

41:                                               ; preds = %37
  %42 = and i32 %39, -4
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %6, i32 noundef %42) #2
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %5, i32 noundef %38) #2
  tail call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr noundef %1, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef nonnull %9, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  %43 = getelementptr inbounds i8, ptr %8, i64 8
  %44 = load i32, ptr %43, align 4, !tbaa !13
  %45 = zext i32 %44 to i64
  %46 = shl nuw nsw i64 %45, 4
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %7, i32 noundef %3, i64 noundef %46) #2
  %47 = getelementptr inbounds i8, ptr %8, i64 20
  %48 = load i32, ptr %47, align 4, !tbaa !15
  %49 = zext i32 %48 to i64
  %50 = shl nuw nsw i64 %49, 6
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %7, i32 noundef %4, i64 noundef %50) #2
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %5, i32 noundef 16) #2
  %51 = getelementptr inbounds i8, ptr %9, i64 8
  %52 = load i32, ptr %51, align 1, !tbaa !16
  %53 = shl i32 %52, 2
  %54 = icmp ugt i32 %53, %38
  br i1 %54, label %55, label %63

55:                                               ; preds = %41
  %56 = zext i32 %52 to i64
  %57 = shl nuw nsw i64 %56, 2
  %58 = zext i32 %38 to i64
  %59 = sub nsw i64 %57, %58
  %60 = load i32, ptr %43, align 4, !tbaa !13
  %61 = zext i32 %60 to i64
  %62 = mul nsw i64 %59, %61
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %7, i32 noundef %3, i64 noundef %62) #2
  br label %63

63:                                               ; preds = %55, %41
  %64 = getelementptr inbounds i8, ptr %9, i64 12
  %65 = load i32, ptr %64, align 1, !tbaa !17
  %66 = icmp ugt i32 %65, %38
  br i1 %66, label %67, label %75

67:                                               ; preds = %63
  %68 = zext i32 %65 to i64
  %69 = zext i32 %38 to i64
  %70 = sub nsw i64 %68, %69
  %71 = shl nsw i64 %70, 2
  %72 = load i32, ptr %47, align 4, !tbaa !15
  %73 = zext i32 %72 to i64
  %74 = mul nsw i64 %71, %73
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %7, i32 noundef %4, i64 noundef %74) #2
  br label %75

75:                                               ; preds = %67, %63
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %6, i32 noundef 4) #2
  br label %76

76:                                               ; preds = %75, %37
  br i1 %18, label %77, label %87

77:                                               ; preds = %76
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %5, i32 noundef %38) #2
  %78 = sub nuw nsw i32 4, %16
  tail call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr noundef %1, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef nonnull %9, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %78)
  %79 = getelementptr inbounds i8, ptr %8, i64 8
  %80 = load i32, ptr %79, align 4, !tbaa !13
  %81 = zext i32 %80 to i64
  %82 = shl nuw nsw i64 %81, 4
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %7, i32 noundef %3, i64 noundef %82) #2
  %83 = getelementptr inbounds i8, ptr %8, i64 20
  %84 = load i32, ptr %83, align 4, !tbaa !15
  %85 = zext i32 %84 to i64
  %86 = shl nuw nsw i64 %85, 6
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %7, i32 noundef %4, i64 noundef %86) #2
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %5, i32 noundef 16) #2
  br label %87

87:                                               ; preds = %76, %77, %34
  br i1 %.not, label %129, label %88

88:                                               ; preds = %87
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1186988026, i32 noundef %2, i32 noundef 127, i32 noundef 32, i32 noundef %3) #2
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef -1186988026, i32 noundef %2, i32 noundef 127, i32 noundef 80, i32 noundef %4) #2
  %89 = load i32, ptr %9, align 1, !tbaa !5
  %.not174 = icmp ult i32 %89, 16
  br i1 %.not174, label %105, label %90

90:                                               ; preds = %88
  %91 = and i32 %89, -16
  %92 = zext i32 %91 to i64
  %93 = getelementptr inbounds i8, ptr %8, i64 8
  %94 = load i32, ptr %93, align 4, !tbaa !13
  %95 = zext i32 %94 to i64
  %96 = mul nuw nsw i64 %95, %92
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %7, i32 noundef %3, i64 noundef %96) #2
  %97 = load i32, ptr %9, align 1, !tbaa !5
  %98 = and i32 %97, -16
  %99 = zext i32 %98 to i64
  %100 = shl nuw nsw i64 %99, 2
  %101 = getelementptr inbounds i8, ptr %8, i64 20
  %102 = load i32, ptr %101, align 4, !tbaa !15
  %103 = zext i32 %102 to i64
  %104 = mul nuw nsw i64 %100, %103
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %7, i32 noundef %4, i64 noundef %104) #2
  br label %105

105:                                              ; preds = %90, %88
  %106 = load i32, ptr %14, align 1, !tbaa !11
  %107 = icmp ugt i32 %106, 3
  br i1 %107, label %108, label %126

108:                                              ; preds = %105
  %109 = and i32 %106, -4
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %6, i32 noundef %109) #2
  tail call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr noundef %1, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef nonnull %9, i32 noundef %13, i32 noundef 1, i32 noundef 2, i32 noundef 0)
  %110 = getelementptr inbounds i8, ptr %9, i64 8
  %111 = load i32, ptr %110, align 1, !tbaa !16
  %112 = zext i32 %111 to i64
  %113 = shl nuw nsw i64 %112, 2
  %114 = getelementptr inbounds i8, ptr %8, i64 8
  %115 = load i32, ptr %114, align 4, !tbaa !13
  %116 = zext i32 %115 to i64
  %117 = mul nuw nsw i64 %113, %116
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %7, i32 noundef %3, i64 noundef %117) #2
  %118 = getelementptr inbounds i8, ptr %9, i64 12
  %119 = load i32, ptr %118, align 1, !tbaa !17
  %120 = zext i32 %119 to i64
  %121 = shl nuw nsw i64 %120, 2
  %122 = getelementptr inbounds i8, ptr %8, i64 20
  %123 = load i32, ptr %122, align 4, !tbaa !15
  %124 = zext i32 %123 to i64
  %125 = mul nuw nsw i64 %121, %124
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %4, i32 noundef %7, i32 noundef %4, i64 noundef %125) #2
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %6, i32 noundef 4) #2
  br label %126

126:                                              ; preds = %108, %105
  br i1 %18, label %127, label %129

127:                                              ; preds = %126
  %128 = sub nuw nsw i32 4, %16
  tail call void @libxsmm_generator_transform_norm_to_vnni4_16bit_aarch64_sve_microkernel_block(ptr noundef %0, ptr noundef %1, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef nonnull %9, i32 noundef %13, i32 noundef 1, i32 noundef 2, i32 noundef %128)
  br label %129

129:                                              ; preds = %87, %127, %126, %19
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"libxsmm_meltw_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !10, i64 27, !10, i64 29, !8, i64 31}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"libxsmm_mateltwise_kernel_config_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !7, i64 392, !7, i64 396, !7, i64 400, !7, i64 404, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !7, i64 428, !7, i64 432, !7, i64 436, !7, i64 440, !7, i64 444, !7, i64 448, !7, i64 452, !7, i64 456, !7, i64 460, !7, i64 464, !7, i64 468, !7, i64 472, !7, i64 476, !7, i64 480, !7, i64 484, !7, i64 488, !7, i64 492, !7, i64 496, !7, i64 500, !7, i64 504, !7, i64 508, !8, i64 512}
!15 = !{!14, !7, i64 20}
!16 = !{!6, !7, i64 8}
!17 = !{!6, !7, i64 12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass