; LLVM IR from abeaumont/competitive-programming :: cses/1735.ll (Z3sumiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.node = type { i64, i64, i64 }

@tree = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z3sumiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = load i32, ptr %10, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %20, label %16

16:                                               ; preds = %5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr %11, align 4, !tbaa !5
  %19 = icmp sgt i32 %17, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %16, %5
  store i64 0, ptr %6, align 8
  br label %60

21:                                               ; preds = %16
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = load i32, ptr %10, align 4, !tbaa !5
  %24 = icmp sle i32 %22, %23
  br i1 %24, label %25, label %35

25:                                               ; preds = %21
  %26 = load i32, ptr %11, align 4, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = icmp sle i32 %26, %27
  br i1 %28, label %29, label %35

29:                                               ; preds = %25
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %31) #3
  %33 = getelementptr inbounds %struct.node, ptr %32, i32 0, i32 0
  %34 = load i64, ptr %33, align 8, !tbaa !9
  store i64 %34, ptr %6, align 8
  br label %60

35:                                               ; preds = %25, %21
  %36 = load i32, ptr %10, align 4, !tbaa !5
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z4pushiii(i32 noundef %36, i32 noundef %37, i32 noundef %38)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %41 = add nsw i32 %39, %40
  %42 = sdiv i32 %41, 2
  store i32 %42, ptr %12, align 4, !tbaa !5
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !5
  %46 = mul nsw i32 2, %45
  %47 = load i32, ptr %10, align 4, !tbaa !5
  %48 = load i32, ptr %12, align 4, !tbaa !5
  %49 = call noundef i64 @_Z3sumiiiii(i32 noundef %43, i32 noundef %44, i32 noundef %46, i32 noundef %47, i32 noundef %48)
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = mul nsw i32 2, %52
  %54 = add nsw i32 %53, 1
  %55 = load i32, ptr %12, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = call noundef i64 @_Z3sumiiiii(i32 noundef %50, i32 noundef %51, i32 noundef %54, i32 noundef %56, i32 noundef %57)
  %59 = add nsw i64 %49, %58
  store i64 %59, ptr %6, align 8
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %60

60:                                               ; preds = %35, %29, %20
  %61 = load i64, ptr %6, align 8
  ret i64 %61
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl" = type { %"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<node, std::allocator<node>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@tree = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z3sumiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp sgt i32 %0, %4
  %7 = icmp slt i32 %1, %3
  %or.cond38 = or i1 %6, %7
  br i1 %or.cond38, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %.not29 = icmp sgt i32 %4, %1
  br i1 %.not29, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr3341.us = phi i32 [ %13, %tailrecurse.us ], [ %3, %.lr.ph ]
  %.tr3240.us = phi i32 [ %12, %tailrecurse.us ], [ %2, %.lr.ph ]
  %accumulator.tr39.us = phi i64 [ %14, %tailrecurse.us ], [ 0, %.lr.ph ]
  tail call void @_Z4pushiii(i32 noundef %.tr3341.us, i32 noundef %4, i32 noundef %.tr3240.us)
  %8 = add nsw i32 %.tr3341.us, %4
  %9 = sdiv i32 %8, 2
  %10 = shl nsw i32 %.tr3240.us, 1
  %11 = tail call noundef i64 @_Z3sumiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %10, i32 noundef %.tr3341.us, i32 noundef %9)
  %12 = or disjoint i32 %10, 1
  %13 = add nsw i32 %9, 1
  %14 = add nsw i64 %11, %accumulator.tr39.us
  %.not53 = icmp slt i32 %9, %1
  br i1 %.not53, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr3341 = phi i32 [ %23, %tailrecurse ], [ %3, %.lr.ph ]
  %.tr3240 = phi i32 [ %22, %tailrecurse ], [ %2, %.lr.ph ]
  %accumulator.tr39 = phi i64 [ %24, %tailrecurse ], [ 0, %.lr.ph ]
  %.not = icmp slt i32 %.tr3341, %0
  br i1 %.not, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %15 = sext i32 %.tr3240 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %15) #1
  %17 = load i64, ptr %16, align 8, !tbaa !5
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  tail call void @_Z4pushiii(i32 noundef %.tr3341, i32 noundef %4, i32 noundef %.tr3240)
  %18 = add nsw i32 %.tr3341, %4
  %19 = sdiv i32 %18, 2
  %20 = shl nsw i32 %.tr3240, 1
  %21 = tail call noundef i64 @_Z3sumiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %20, i32 noundef %.tr3341, i32 noundef %19)
  %22 = or disjoint i32 %20, 1
  %23 = add nsw i32 %19, 1
  %24 = add nsw i64 %21, %accumulator.tr39
  %.not52 = icmp slt i32 %19, %1
  br i1 %.not52, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %5, %.split.us
  %accumulator.tr37 = phi i64 [ %accumulator.tr39, %.split.us ], [ 0, %5 ], [ %14, %tailrecurse.us ], [ %24, %tailrecurse ]
  %.0 = phi i64 [ %17, %.split.us ], [ 0, %5 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr37
  ret i64 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4node", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass