; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_sve_memcpy(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i32 noundef %6, i32 noundef %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i8 %1, ptr %10, align 1, !tbaa !9
  store i8 %2, ptr %11, align 1, !tbaa !9
  store i8 %3, ptr %12, align 1, !tbaa !9
  store i8 %4, ptr %13, align 1, !tbaa !9
  store i8 %5, ptr %14, align 1, !tbaa !9
  store i32 %6, ptr %15, align 4, !tbaa !10
  store i32 %7, ptr %16, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %22 = load i32, ptr %16, align 4, !tbaa !10
  %23 = shl i32 1, %22
  %24 = load i32, ptr %15, align 4, !tbaa !10
  %25 = mul i32 %23, %24
  store i32 %25, ptr %17, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %26, i32 0, i32 6
  %28 = load i32, ptr %27, align 4, !tbaa !12
  %29 = call i32 @libxsmm_cpuid_vlen32(i32 noundef %28)
  %30 = mul nsw i32 4, %29
  store i32 %30, ptr %18, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %31 = load i32, ptr %17, align 4, !tbaa !10
  %32 = load i32, ptr %18, align 4, !tbaa !10
  %33 = urem i32 %31, %32
  store i32 %33, ptr %19, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %34 = load i32, ptr %17, align 4, !tbaa !10
  %35 = load i32, ptr %19, align 4, !tbaa !10
  %36 = sub i32 %34, %35
  store i32 %36, ptr %21, align 4, !tbaa !10
  store i32 0, ptr %20, align 4, !tbaa !10
  br label %37

37:                                               ; preds = %70, %8
  %38 = load i32, ptr %20, align 4, !tbaa !10
  %39 = load i32, ptr %18, align 4, !tbaa !10
  %40 = add i32 %38, %39
  %41 = load i32, ptr %17, align 4, !tbaa !10
  %42 = icmp ule i32 %40, %41
  br i1 %42, label %43, label %74

43:                                               ; preds = %37
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = load i8, ptr %10, align 1, !tbaa !9
  %46 = zext i8 %45 to i32
  %47 = load i8, ptr %13, align 1, !tbaa !9
  %48 = zext i8 %47 to i32
  %49 = load i8, ptr %14, align 1, !tbaa !9
  %50 = zext i8 %49 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %44, i32 noundef -2055192570, i32 noundef %46, i32 noundef 0, i32 noundef 0, i32 noundef %48, i32 noundef %50)
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  %52 = load i8, ptr %11, align 1, !tbaa !9
  %53 = zext i8 %52 to i32
  %54 = load i8, ptr %13, align 1, !tbaa !9
  %55 = zext i8 %54 to i32
  %56 = load i8, ptr %14, align 1, !tbaa !9
  %57 = zext i8 %56 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %51, i32 noundef -444579834, i32 noundef %53, i32 noundef 0, i32 noundef 0, i32 noundef %55, i32 noundef %57)
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = load i8, ptr %10, align 1, !tbaa !9
  %60 = zext i8 %59 to i32
  %61 = load i8, ptr %10, align 1, !tbaa !9
  %62 = zext i8 %61 to i32
  %63 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %58, i32 noundef 285212678, i32 noundef %60, i32 noundef %62, i32 noundef %63, i8 noundef zeroext 0)
  %64 = load ptr, ptr %9, align 8, !tbaa !5
  %65 = load i8, ptr %11, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = load i8, ptr %11, align 1, !tbaa !9
  %68 = zext i8 %67 to i32
  %69 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %64, i32 noundef 285212678, i32 noundef %66, i32 noundef %68, i32 noundef %69, i8 noundef zeroext 0)
  br label %70

70:                                               ; preds = %43
  %71 = load i32, ptr %18, align 4, !tbaa !10
  %72 = load i32, ptr %20, align 4, !tbaa !10
  %73 = add i32 %72, %71
  store i32 %73, ptr %20, align 4, !tbaa !10
  br label %37, !llvm.loop !14

74:                                               ; preds = %37
  %75 = load i32, ptr %19, align 4, !tbaa !10
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %98

77:                                               ; preds = %74
  %78 = load ptr, ptr %9, align 8, !tbaa !5
  %79 = load i8, ptr %14, align 1, !tbaa !9
  %80 = zext i8 %79 to i32
  %81 = load i32, ptr %19, align 4, !tbaa !10
  %82 = load i8, ptr %12, align 1, !tbaa !9
  %83 = zext i8 %82 to i32
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %78, i32 noundef %80, i32 noundef %81, i32 noundef %83)
  %84 = load ptr, ptr %9, align 8, !tbaa !5
  %85 = load i8, ptr %10, align 1, !tbaa !9
  %86 = zext i8 %85 to i32
  %87 = load i8, ptr %13, align 1, !tbaa !9
  %88 = zext i8 %87 to i32
  %89 = load i8, ptr %14, align 1, !tbaa !9
  %90 = zext i8 %89 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %84, i32 noundef -1522491258, i32 noundef %86, i32 noundef 0, i32 noundef 0, i32 noundef %88, i32 noundef %90)
  %91 = load ptr, ptr %9, align 8, !tbaa !5
  %92 = load i8, ptr %11, align 1, !tbaa !9
  %93 = zext i8 %92 to i32
  %94 = load i8, ptr %13, align 1, !tbaa !9
  %95 = zext i8 %94 to i32
  %96 = load i8, ptr %14, align 1, !tbaa !9
  %97 = zext i8 %96 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %91, i32 noundef -448733050, i32 noundef %93, i32 noundef 0, i32 noundef 0, i32 noundef %95, i32 noundef %97)
  br label %98

98:                                               ; preds = %77, %74
  %99 = load i32, ptr %21, align 4, !tbaa !10
  %100 = icmp ugt i32 %99, 0
  br i1 %100, label %101, label %114

101:                                              ; preds = %98
  %102 = load ptr, ptr %9, align 8, !tbaa !5
  %103 = load i8, ptr %10, align 1, !tbaa !9
  %104 = zext i8 %103 to i32
  %105 = load i8, ptr %10, align 1, !tbaa !9
  %106 = zext i8 %105 to i32
  %107 = load i32, ptr %21, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %102, i32 noundef 1358954502, i32 noundef %104, i32 noundef %106, i32 noundef %107, i8 noundef zeroext 0)
  %108 = load ptr, ptr %9, align 8, !tbaa !5
  %109 = load i8, ptr %11, align 1, !tbaa !9
  %110 = zext i8 %109 to i32
  %111 = load i8, ptr %11, align 1, !tbaa !9
  %112 = zext i8 %111 to i32
  %113 = load i32, ptr %21, align 4, !tbaa !10
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %108, i32 noundef 1358954502, i32 noundef %110, i32 noundef %112, i32 noundef %113, i8 noundef zeroext 0)
  br label %114

114:                                              ; preds = %101, %98
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_aarch64_instruction_sve_memcpy(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #0 {
  %9 = shl i32 %6, %7
  %10 = getelementptr inbounds i8, ptr %0, i64 28
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = tail call i32 @libxsmm_cpuid_vlen32(i32 noundef %11) #2
  %13 = shl nsw i32 %12, 2
  %14 = urem i32 %9, %13
  %15 = sub nuw i32 %9, %14
  %.not54 = icmp ugt i32 %13, %9
  br i1 %.not54, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %8
  %16 = zext i8 %1 to i32
  %17 = zext i8 %4 to i32
  %18 = zext i8 %5 to i32
  %19 = zext i8 %2 to i32
  br label %20

20:                                               ; preds = %.lr.ph, %20
  %21 = phi i32 [ %13, %.lr.ph ], [ %22, %20 ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -2055192570, i32 noundef %16, i32 noundef 0, i32 noundef 0, i32 noundef %17, i32 noundef %18) #2
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -444579834, i32 noundef %19, i32 noundef 0, i32 noundef 0, i32 noundef %17, i32 noundef %18) #2
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %16, i32 noundef %16, i32 noundef %13, i8 noundef zeroext 0) #2
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef %19, i32 noundef %19, i32 noundef %13, i8 noundef zeroext 0) #2
  %22 = add i32 %21, %13
  %.not = icmp ugt i32 %22, %9
  br i1 %.not, label %._crit_edge, label %20, !llvm.loop !11

._crit_edge:                                      ; preds = %20, %8
  %.not52 = icmp eq i32 %14, 0
  br i1 %.not52, label %29, label %23

23:                                               ; preds = %._crit_edge
  %24 = zext i8 %5 to i32
  %25 = zext i8 %3 to i32
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef %24, i32 noundef %14, i32 noundef %25)
  %26 = zext i8 %1 to i32
  %27 = zext i8 %4 to i32
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1522491258, i32 noundef %26, i32 noundef 0, i32 noundef 0, i32 noundef %27, i32 noundef %24) #2
  %28 = zext i8 %2 to i32
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -448733050, i32 noundef %28, i32 noundef 0, i32 noundef 0, i32 noundef %27, i32 noundef %24) #2
  br label %29

29:                                               ; preds = %23, %._crit_edge
  %.not53 = icmp eq i32 %9, %14
  br i1 %.not53, label %33, label %30

30:                                               ; preds = %29
  %31 = zext i8 %1 to i32
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 1358954502, i32 noundef %31, i32 noundef %31, i32 noundef %15, i8 noundef zeroext 0) #2
  %32 = zext i8 %2 to i32
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 1358954502, i32 noundef %32, i32 noundef %32, i32 noundef %15, i8 noundef zeroext 0) #2
  br label %33

33:                                               ; preds = %30, %29
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass