; LLVM IR from Tudor67/Competitive-Programming :: Codeforces/#672#div2/C2/C2.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca %"class.std::allocator", align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  %12 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %1, ptr noundef %2)
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #5
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %14 = add nsw i32 %13, 2
  %15 = sext i32 %14 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #5
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %15, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %16 unwind label %22

16:                                               ; preds = %0
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %32, %16
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = icmp sle i32 %18, %19
  br i1 %20, label %26, label %21

21:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %39

22:                                               ; preds = %0
  %23 = landingpad { ptr, i32 }
          cleanup
  %24 = extractvalue { ptr, i32 } %23, 0
  store ptr %24, ptr %5, align 8
  %25 = extractvalue { ptr, i32 } %23, 1
  store i32 %25, ptr %6, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #5
  br label %225

26:                                               ; preds = %17
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %28) #5
  %30 = invoke i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %29)
          to label %31 unwind label %35

31:                                               ; preds = %26
  br label %32

32:                                               ; preds = %31
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %7, align 4, !tbaa !5
  br label %17, !llvm.loop !9

35:                                               ; preds = %26
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %5, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %224

39:                                               ; preds = %21
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #5
  store i32 -1, ptr %40, align 4, !tbaa !5
  %41 = load i32, ptr %1, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %43) #5
  store i32 -1, ptr %44, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 0, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 1, ptr %9, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %111, %39
  %46 = load i32, ptr %9, align 4, !tbaa !5
  %47 = load i32, ptr %1, align 4, !tbaa !5
  %48 = icmp sle i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %114

50:                                               ; preds = %45
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = sub nsw i32 %51, 1
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %53) #5
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %57) #5
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = icmp slt i32 %55, %59
  br i1 %60, label %61, label %80

61:                                               ; preds = %50
  %62 = load i32, ptr %9, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %63) #5
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = load i32, ptr %9, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %68) #5
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = icmp sgt i32 %65, %70
  br i1 %71, label %72, label %80

72:                                               ; preds = %61
  %73 = load i32, ptr %9, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %74) #5
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = load i64, ptr %8, align 8, !tbaa !11
  %79 = add nsw i64 %78, %77
  store i64 %79, ptr %8, align 8, !tbaa !11
  br label %80

80:                                               ; preds = %72, %61, %50
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = sub nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %83) #5
  %85 = load i32, ptr %84, align 4, !tbaa !5
  %86 = load i32, ptr %9, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %87) #5
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %90 = icmp sgt i32 %85, %89
  br i1 %90, label %91, label %110

91:                                               ; preds = %80
  %92 = load i32, ptr %9, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %93) #5
  %95 = load i32, ptr %94, align 4, !tbaa !5
  %96 = load i32, ptr %9, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %98) #5
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = icmp slt i32 %95, %100
  br i1 %101, label %102, label %110

102:                                              ; preds = %91
  %103 = load i32, ptr %9, align 4, !tbaa !5
  %104 = sext i32 %103 to i64
  %105 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %104) #5
  %106 = load i32, ptr %105, align 4, !tbaa !5
  %107 = sext i32 %106 to i64
  %108 = load i64, ptr %8, align 8, !tbaa !11
  %109 = sub nsw i64 %108, %107
  store i64 %109, ptr %8, align 8, !tbaa !11
  br label %110

110:                                              ; preds = %102, %91, %80
  br label %111

111:                                              ; preds = %110
  %112 = load i32, ptr %9, align 4, !tbaa !5
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %9, align 4, !tbaa !5
  br label %45, !llvm.loop !13

114:                                              ; preds = %49
  %115 = load i64, ptr %8, align 8, !tbaa !11
  %116 = invoke i32 (ptr, ...) @printf(ptr noundef @.str.2, i64 noundef %115)
          to label %117 unwind label %150

117:                                              ; preds = %114
  br label %118

118:                                              ; preds = %219, %117
  %119 = load i32, ptr %2, align 4, !tbaa !5
  %120 = icmp sgt i32 %119, 0
  br i1 %120, label %121, label %222

121:                                              ; preds = %118
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %122 = invoke i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.3, ptr noundef %10, ptr noundef %11)
          to label %123 unwind label %154

123:                                              ; preds = %121
  %124 = load i32, ptr %10, align 4, !tbaa !5
  %125 = sub nsw i32 %124, 1
  %126 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %125, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %126, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %127 = load i32, ptr %10, align 4, !tbaa !5
  %128 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %127, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %128, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %129 = load i32, ptr %10, align 4, !tbaa !5
  %130 = add nsw i32 %129, 1
  %131 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %130, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %131, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %132 = load i32, ptr %10, align 4, !tbaa !5
  %133 = load i32, ptr %11, align 4, !tbaa !5
  %134 = icmp ne i32 %132, %133
  br i1 %134, label %135, label %170

135:                                              ; preds = %123
  %136 = load i32, ptr %11, align 4, !tbaa !5
  %137 = sub nsw i32 %136, 1
  %138 = load i32, ptr %10, align 4, !tbaa !5
  %139 = icmp ne i32 %137, %138
  br i1 %139, label %140, label %158

140:                                              ; preds = %135
  %141 = load i32, ptr %11, align 4, !tbaa !5
  %142 = sub nsw i32 %141, 1
  %143 = load i32, ptr %10, align 4, !tbaa !5
  %144 = add nsw i32 %143, 1
  %145 = icmp ne i32 %142, %144
  br i1 %145, label %146, label %158

146:                                              ; preds = %140
  %147 = load i32, ptr %11, align 4, !tbaa !5
  %148 = sub nsw i32 %147, 1
  %149 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %148, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %149, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %158

150:                                              ; preds = %114
  %151 = landingpad { ptr, i32 }
          cleanup
  %152 = extractvalue { ptr, i32 } %151, 0
  store ptr %152, ptr %5, align 8
  %153 = extractvalue { ptr, i32 } %151, 1
  store i32 %153, ptr %6, align 4
  br label %223

154:                                              ; preds = %215, %121
  %155 = landingpad { ptr, i32 }
          cleanup
  %156 = extractvalue { ptr, i32 } %155, 0
  store ptr %156, ptr %5, align 8
  %157 = extractvalue { ptr, i32 } %155, 1
  store i32 %157, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %223

158:                                              ; preds = %146, %140, %135
  %159 = load i32, ptr %11, align 4, !tbaa !5
  %160 = load i32, ptr %10, align 4, !tbaa !5
  %161 = add nsw i32 %160, 1
  %162 = icmp ne i32 %159, %161
  br i1 %162, label %163, label %166

163:                                              ; preds = %158
  %164 = load i32, ptr %11, align 4, !tbaa !5
  %165 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %164, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %165, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %166

166:                                              ; preds = %163, %158
  %167 = load i32, ptr %11, align 4, !tbaa !5
  %168 = add nsw i32 %167, 1
  %169 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %168, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %169, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %170

170:                                              ; preds = %166, %123
  %171 = load i32, ptr %10, align 4, !tbaa !5
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %172) #5
  %174 = load i32, ptr %11, align 4, !tbaa !5
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %175) #5
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %173, ptr noundef nonnull align 4 dereferenceable(4) %176) #5
  %177 = load i32, ptr %10, align 4, !tbaa !5
  %178 = sub nsw i32 %177, 1
  %179 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %178, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %179, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %180 = load i32, ptr %10, align 4, !tbaa !5
  %181 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %180, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %181, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %182 = load i32, ptr %10, align 4, !tbaa !5
  %183 = add nsw i32 %182, 1
  %184 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %183, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %184, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %185 = load i32, ptr %10, align 4, !tbaa !5
  %186 = load i32, ptr %11, align 4, !tbaa !5
  %187 = icmp ne i32 %185, %186
  br i1 %187, label %188, label %215

188:                                              ; preds = %170
  %189 = load i32, ptr %11, align 4, !tbaa !5
  %190 = sub nsw i32 %189, 1
  %191 = load i32, ptr %10, align 4, !tbaa !5
  %192 = icmp ne i32 %190, %191
  br i1 %192, label %193, label %203

193:                                              ; preds = %188
  %194 = load i32, ptr %11, align 4, !tbaa !5
  %195 = sub nsw i32 %194, 1
  %196 = load i32, ptr %10, align 4, !tbaa !5
  %197 = add nsw i32 %196, 1
  %198 = icmp ne i32 %195, %197
  br i1 %198, label %199, label %203

199:                                              ; preds = %193
  %200 = load i32, ptr %11, align 4, !tbaa !5
  %201 = sub nsw i32 %200, 1
  %202 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %201, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %202, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %203

203:                                              ; preds = %199, %193, %188
  %204 = load i32, ptr %11, align 4, !tbaa !5
  %205 = load i32, ptr %10, align 4, !tbaa !5
  %206 = add nsw i32 %205, 1
  %207 = icmp ne i32 %204, %206
  br i1 %207, label %208, label %211

208:                                              ; preds = %203
  %209 = load i32, ptr %11, align 4, !tbaa !5
  %210 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %209, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %210, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %211

211:                                              ; preds = %208, %203
  %212 = load i32, ptr %11, align 4, !tbaa !5
  %213 = add nsw i32 %212, 1
  %214 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %213, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %214, ptr noundef nonnull align 8 dereferenceable(8) %8)
  br label %215

215:                                              ; preds = %211, %170
  %216 = load i64, ptr %8, align 8, !tbaa !11
  %217 = invoke i32 (ptr, ...) @printf(ptr noundef @.str.2, i64 noundef %216)
          to label %218 unwind label %154

218:                                              ; preds = %215
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %219

219:                                              ; preds = %218
  %220 = load i32, ptr %2, align 4, !tbaa !5
  %221 = add nsw i32 %220, -1
  store i32 %221, ptr %2, align 4, !tbaa !5
  br label %118, !llvm.loop !14

222:                                              ; preds = %118
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
  ret void

223:                                              ; preds = %154, %150
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %224

224:                                              ; preds = %223, %35
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  br label %225

225:                                              ; preds = %224, %22
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
  br label %226

226:                                              ; preds = %225
  %227 = load ptr, ptr %5, align 8
  %228 = load i32, ptr %6, align 4
  %229 = insertvalue { ptr, i32 } poison, ptr %227, 0
  %230 = insertvalue { ptr, i32 } %229, i32 %228, 1
  resume { ptr, i32 } %230
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca %"class.std::allocator", align 1
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #5
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = add nsw i32 %9, 2
  %11 = sext i32 %10 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #5
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %11, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %12 unwind label %20

12:                                               ; preds = %0
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %.not35 = icmp slt i32 %13, 1
  br i1 %.not35, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %12
  %14 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #5
  store i32 -1, ptr %14, align 4, !tbaa !5
  %15 = load i32, ptr %1, align 4, !tbaa !5
  %16 = add nsw i32 %15, 1
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %17) #5
  store i32 -1, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  store i64 0, ptr %5, align 8, !tbaa !9
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %.not2537 = icmp slt i32 %19, 1
  br i1 %.not2537, label %._crit_edge41, label %.lr.ph40

20:                                               ; preds = %0
  %21 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  resume { ptr, i32 } %21

.lr.ph:                                           ; preds = %12, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %12 ]
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv) #5
  %23 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %22)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %24 = load i32, ptr %1, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %.not.not = icmp slt i64 %indvars.iv, %25
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !11

._crit_edge41:                                    ; preds = %67, %._crit_edge
  %26 = phi i64 [ 0, %._crit_edge ], [ %68, %67 ]
  %27 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i64 noundef %26)
  %.pr = load i32, ptr %2, align 4, !tbaa !5
  %28 = icmp sgt i32 %.pr, 0
  br i1 %28, label %.lr.ph43, label %._crit_edge44

.lr.ph40:                                         ; preds = %._crit_edge, %67
  %29 = phi i64 [ %68, %67 ], [ 0, %._crit_edge ]
  %indvars.iv46 = phi i64 [ %indvars.iv.next47.pre-phi, %67 ], [ 1, %._crit_edge ]
  %30 = add nsw i64 %indvars.iv46, -1
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %30) #5
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp slt i32 %32, %34
  br i1 %35, label %36, label %48

36:                                               ; preds = %.lr.ph40
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = add nuw nsw i64 %indvars.iv46, 1
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %39) #5
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = icmp sgt i32 %38, %41
  br i1 %42, label %43, label %48

43:                                               ; preds = %36
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = add nsw i64 %29, %46
  store i64 %47, ptr %5, align 8, !tbaa !9
  br label %48

48:                                               ; preds = %43, %36, %.lr.ph40
  %49 = phi i64 [ %47, %43 ], [ %29, %36 ], [ %29, %.lr.ph40 ]
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %30) #5
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = icmp sgt i32 %51, %53
  br i1 %54, label %55, label %._crit_edge55

._crit_edge55:                                    ; preds = %48
  %.pre56 = add nuw nsw i64 %indvars.iv46, 1
  br label %67

55:                                               ; preds = %48
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = add nuw nsw i64 %indvars.iv46, 1
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %58) #5
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = icmp slt i32 %57, %60
  br i1 %61, label %62, label %67

62:                                               ; preds = %55
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv46) #5
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = sub nsw i64 %49, %65
  store i64 %66, ptr %5, align 8, !tbaa !9
  br label %67

67:                                               ; preds = %._crit_edge55, %55, %62
  %indvars.iv.next47.pre-phi = phi i64 [ %.pre56, %._crit_edge55 ], [ %58, %55 ], [ %58, %62 ]
  %68 = phi i64 [ %49, %._crit_edge55 ], [ %49, %55 ], [ %66, %62 ]
  %69 = load i32, ptr %1, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %.not25.not = icmp slt i64 %indvars.iv46, %70
  br i1 %.not25.not, label %.lr.ph40, label %._crit_edge41, !llvm.loop !13

.lr.ph43:                                         ; preds = %._crit_edge41, %129
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #5
  %71 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.3, ptr noundef nonnull %6, ptr noundef nonnull %7)
  %72 = load i32, ptr %6, align 4, !tbaa !5
  %73 = add nsw i32 %72, -1
  %74 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %73, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %74, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %75 = load i32, ptr %6, align 4, !tbaa !5
  %76 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %75, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %76, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %78, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %79, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %80 = load i32, ptr %6, align 4, !tbaa !5
  %81 = load i32, ptr %7, align 4, !tbaa !5
  %.not26 = icmp eq i32 %80, %81
  br i1 %.not26, label %97, label %82

82:                                               ; preds = %.lr.ph43
  %83 = add nsw i32 %81, -1
  %.not27 = icmp eq i32 %83, %80
  %84 = add i32 %80, 2
  %.not28 = icmp eq i32 %81, %84
  %or.cond = or i1 %.not28, %.not27
  br i1 %or.cond, label %87, label %85

85:                                               ; preds = %82
  %86 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %83, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %86, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.pre = load i32, ptr %7, align 4, !tbaa !5
  %.pre49 = load i32, ptr %6, align 4, !tbaa !5
  br label %87

87:                                               ; preds = %85, %82
  %88 = phi i32 [ %.pre49, %85 ], [ %80, %82 ]
  %89 = phi i32 [ %.pre, %85 ], [ %81, %82 ]
  %90 = add nsw i32 %88, 1
  %.not29 = icmp eq i32 %89, %90
  br i1 %.not29, label %93, label %91

91:                                               ; preds = %87
  %92 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %89, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %92, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.pre50 = load i32, ptr %7, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %91, %87
  %94 = phi i32 [ %.pre50, %91 ], [ %89, %87 ]
  %95 = add nsw i32 %94, 1
  %96 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z5eraseiRSt6vectorIiSaIiEEiRx(i32 noundef %95, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %96, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.pre51 = load i32, ptr %6, align 4, !tbaa !5
  br label %97

97:                                               ; preds = %93, %.lr.ph43
  %98 = phi i32 [ %.pre51, %93 ], [ %80, %.lr.ph43 ]
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %99) #5
  %101 = load i32, ptr %7, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %102) #5
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %100, ptr noundef nonnull align 4 dereferenceable(4) %103) #5
  %104 = load i32, ptr %6, align 4, !tbaa !5
  %105 = add nsw i32 %104, -1
  %106 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %105, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %106, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %107 = load i32, ptr %6, align 4, !tbaa !5
  %108 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %107, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %108, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  %111 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %110, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %111, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %112 = load i32, ptr %6, align 4, !tbaa !5
  %113 = load i32, ptr %7, align 4, !tbaa !5
  %.not30 = icmp eq i32 %112, %113
  br i1 %.not30, label %129, label %114

114:                                              ; preds = %97
  %115 = add nsw i32 %113, -1
  %.not31 = icmp eq i32 %115, %112
  %116 = add i32 %112, 2
  %.not32 = icmp eq i32 %113, %116
  %or.cond34 = or i1 %.not32, %.not31
  br i1 %or.cond34, label %119, label %117

117:                                              ; preds = %114
  %118 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %115, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %118, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.pre52 = load i32, ptr %7, align 4, !tbaa !5
  %.pre53 = load i32, ptr %6, align 4, !tbaa !5
  br label %119

119:                                              ; preds = %117, %114
  %120 = phi i32 [ %.pre53, %117 ], [ %112, %114 ]
  %121 = phi i32 [ %.pre52, %117 ], [ %113, %114 ]
  %122 = add nsw i32 %120, 1
  %.not33 = icmp eq i32 %121, %122
  br i1 %.not33, label %125, label %123

123:                                              ; preds = %119
  %124 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %121, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %124, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.pre54 = load i32, ptr %7, align 4, !tbaa !5
  br label %125

125:                                              ; preds = %123, %119
  %126 = phi i32 [ %.pre54, %123 ], [ %121, %119 ]
  %127 = add nsw i32 %126, 1
  %128 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z6insertiRSt6vectorIiSaIiEEiRx(i32 noundef %127, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %128, ptr noundef nonnull align 8 dereferenceable(8) %5)
  br label %129

129:                                              ; preds = %125, %97
  %130 = load i64, ptr %5, align 8, !tbaa !9
  %131 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i64 noundef %130)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  %132 = load i32, ptr %2, align 4, !tbaa !5
  %133 = add nsw i32 %132, -1
  store i32 %133, ptr %2, align 4, !tbaa !5
  %134 = icmp sgt i32 %132, 1
  br i1 %134, label %.lr.ph43, label %._crit_edge44, !llvm.loop !14

._crit_edge44:                                    ; preds = %129, %._crit_edge41
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass