; LLVM IR from abeaumont/competitive-programming :: kattis/unfairplay.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local global i32, align 4
@flow = external dso_local global i32, align 4
@l = external dso_local global %"class.std::vector", align 8
@p = external dso_local global %"class.std::vector", align 8
@c = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr @k, align 4, !tbaa !5
  %10 = sub nsw i32 %9, 1
  %11 = icmp eq i32 %8, %10
  br i1 %11, label %12, label %51

12:                                               ; preds = %2
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = load i32, ptr @flow, align 4, !tbaa !5
  %15 = add nsw i32 %14, %13
  store i32 %15, ptr @flow, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %21, %12
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = load i32, ptr @k, align 4, !tbaa !5
  %19 = sub nsw i32 %18, 2
  %20 = icmp ne i32 %17, %19
  br i1 %20, label %21, label %50

21:                                               ; preds = %16
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %24) #4
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %27) #4
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = sub nsw i32 %32, %22
  store i32 %33, ptr %31, align 4, !tbaa !5
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %36) #4
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %39) #4
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %42) #4
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = add nsw i32 %44, %34
  store i32 %45, ptr %43, align 4, !tbaa !5
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %47) #4
  %49 = load i32, ptr %48, align 4, !tbaa !5
  store i32 %49, ptr %4, align 4, !tbaa !5
  br label %16, !llvm.loop !9

50:                                               ; preds = %16
  store i1 true, ptr %3, align 1
  br label %101

51:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %95, %51
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = load i32, ptr @k, align 4, !tbaa !5
  %55 = icmp slt i32 %53, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %52
  store i32 4, ptr %7, align 4
  br label %98

57:                                               ; preds = %52
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @l, i64 noundef %59) #4
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @l, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  %67 = icmp eq i32 %61, %66
  br i1 %67, label %68, label %94

68:                                               ; preds = %57
  %69 = load i32, ptr %4, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %70) #4
  %72 = load i32, ptr %6, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %73) #4
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = icmp sgt i32 %75, 0
  br i1 %76, label %77, label %94

77:                                               ; preds = %68
  %78 = load i32, ptr %4, align 4, !tbaa !5
  %79 = load i32, ptr %6, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %80) #4
  store i32 %78, ptr %81, align 4, !tbaa !5
  %82 = load i32, ptr %6, align 4, !tbaa !5
  %83 = load i32, ptr %4, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %84) #4
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #4
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %88, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %82, i32 noundef %90)
  br i1 %91, label %92, label %93

92:                                               ; preds = %77
  store i1 true, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %98

93:                                               ; preds = %77
  br label %94

94:                                               ; preds = %93, %68, %57
  br label %95

95:                                               ; preds = %94
  %96 = load i32, ptr %6, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %6, align 4, !tbaa !5
  br label %52, !llvm.loop !11

98:                                               ; preds = %92, %56
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %99 = load i32, ptr %7, align 4
  switch i32 %99, label %103 [
    i32 4, label %100
    i32 1, label %101
  ]

100:                                              ; preds = %98
  store i1 false, ptr %3, align 1
  br label %101

101:                                              ; preds = %100, %98, %50
  %102 = load i1, ptr %3, align 1
  ret i1 %102

103:                                              ; preds = %98
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@k = external dso_local local_unnamed_addr global i32, align 4
@flow = external dso_local local_unnamed_addr global i32, align 4
@l = external dso_local global %"class.std::vector", align 8
@p = external dso_local global %"class.std::vector", align 8
@c = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  store i32 %1, ptr %3, align 4, !tbaa !5
  %4 = load i32, ptr @k, align 4, !tbaa !5
  %5 = add nsw i32 %4, -1
  %6 = icmp eq i32 %5, %0
  br i1 %6, label %8, label %.preheader

.preheader:                                       ; preds = %2
  %.not2426 = icmp sgt i32 %4, 0
  br i1 %.not2426, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %7 = sext i32 %0 to i64
  br label %31

8:                                                ; preds = %2
  %9 = load i32, ptr @flow, align 4, !tbaa !5
  %10 = add nsw i32 %9, %1
  store i32 %10, ptr @flow, align 4, !tbaa !5
  %11 = add nsw i32 %4, -2
  %.not30 = icmp eq i32 %11, %0
  br i1 %.not30, label %.loopexit, label %.lr.ph32

.lr.ph32:                                         ; preds = %8, %.lr.ph32
  %.02031 = phi i32 [ %28, %.lr.ph32 ], [ %0, %8 ]
  %12 = sext i32 %.02031 to i64
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %12) #2
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %15) #2
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %12) #2
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = sub nsw i32 %18, %1
  store i32 %19, ptr %17, align 4, !tbaa !5
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %12) #2
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %12) #2
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %23) #2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i32 %25, %1
  store i32 %26, ptr %24, align 4, !tbaa !5
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %12) #2
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = load i32, ptr @k, align 4, !tbaa !5
  %30 = add nsw i32 %29, -2
  %.not = icmp eq i32 %28, %30
  br i1 %.not, label %.loopexit, label %.lr.ph32, !llvm.loop !9

31:                                               ; preds = %.lr.ph, %51
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %51 ]
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @l, i64 noundef %indvars.iv) #2
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @l, i64 noundef %7) #2
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  %37 = icmp eq i32 %33, %36
  br i1 %37, label %38, label %51

38:                                               ; preds = %31
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %7) #2
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %indvars.iv) #2
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = icmp sgt i32 %41, 0
  br i1 %42, label %43, label %51

43:                                               ; preds = %38
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @p, i64 noundef %indvars.iv) #2
  store i32 %0, ptr %44, align 4, !tbaa !5
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %7) #2
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv) #2
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %46, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = trunc nuw nsw i64 %indvars.iv to i32
  %50 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %49, i32 noundef %48)
  br i1 %50, label %.loopexit, label %51

51:                                               ; preds = %31, %38, %43
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %52 = load i32, ptr @k, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %.not24 = icmp slt i64 %indvars.iv.next, %53
  br i1 %.not24, label %31, label %.loopexit, !llvm.loop !11

.loopexit:                                        ; preds = %43, %51, %.lr.ph32, %.preheader, %8
  %.1 = phi i1 [ true, %8 ], [ false, %.preheader ], [ true, %.lr.ph32 ], [ true, %43 ], [ false, %51 ]
  ret i1 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass