; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_tanh_ps_rational_78_avx(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15) #2 {
  %17 = alloca ptr, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  store ptr %0, ptr %17, align 8, !tbaa !5
  store i32 %1, ptr %18, align 4, !tbaa !9
  store i32 %2, ptr %19, align 4, !tbaa !9
  store i32 %3, ptr %20, align 4, !tbaa !9
  store i32 %4, ptr %21, align 4, !tbaa !9
  store i32 %5, ptr %22, align 4, !tbaa !9
  store i32 %6, ptr %23, align 4, !tbaa !9
  store i32 %7, ptr %24, align 4, !tbaa !9
  store i32 %8, ptr %25, align 4, !tbaa !9
  store i32 %9, ptr %26, align 4, !tbaa !9
  store i32 %10, ptr %27, align 4, !tbaa !9
  store i32 %11, ptr %28, align 4, !tbaa !9
  store i32 %12, ptr %29, align 4, !tbaa !9
  store i32 %13, ptr %30, align 4, !tbaa !9
  store i32 %14, ptr %31, align 4, !tbaa !9
  store i32 %15, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #3
  %35 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %35, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #3
  %36 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %36, ptr %34, align 4, !tbaa !9
  %37 = load ptr, ptr %17, align 8, !tbaa !5
  %38 = load i32, ptr %18, align 4, !tbaa !9
  %39 = load i32, ptr %18, align 4, !tbaa !9
  %40 = load i32, ptr %19, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %37, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %38, i32 noundef %39, i32 noundef %40)
  %41 = load ptr, ptr %17, align 8, !tbaa !5
  %42 = load i32, ptr %19, align 4, !tbaa !9
  %43 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %41, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %42, i32 noundef %43)
  %44 = load ptr, ptr %17, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %44, i32 0, i32 6
  %46 = load i32, ptr %45, align 4, !tbaa !11
  %47 = icmp eq i32 %46, 1005
  br i1 %47, label %48, label %73

48:                                               ; preds = %16
  %49 = load ptr, ptr %17, align 8, !tbaa !5
  %50 = load i32, ptr %25, align 4, !tbaa !9
  %51 = load i32, ptr %20, align 4, !tbaa !9
  %52 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %49, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %50, i32 noundef %51, i32 noundef %52)
  %53 = load ptr, ptr %17, align 8, !tbaa !5
  %54 = load i32, ptr %24, align 4, !tbaa !9
  %55 = load i32, ptr %20, align 4, !tbaa !9
  %56 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %53, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %54, i32 noundef %55, i32 noundef %56)
  %57 = load ptr, ptr %17, align 8, !tbaa !5
  %58 = load i32, ptr %19, align 4, !tbaa !9
  %59 = load i32, ptr %20, align 4, !tbaa !9
  %60 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %57, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %58, i32 noundef %59, i32 noundef %60)
  %61 = load ptr, ptr %17, align 8, !tbaa !5
  %62 = load i32, ptr %23, align 4, !tbaa !9
  %63 = load i32, ptr %20, align 4, !tbaa !9
  %64 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %61, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %62, i32 noundef %63, i32 noundef %64)
  %65 = load ptr, ptr %17, align 8, !tbaa !5
  %66 = load i32, ptr %19, align 4, !tbaa !9
  %67 = load i32, ptr %20, align 4, !tbaa !9
  %68 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %65, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %66, i32 noundef %67, i32 noundef %68)
  %69 = load ptr, ptr %17, align 8, !tbaa !5
  %70 = load i32, ptr %22, align 4, !tbaa !9
  %71 = load i32, ptr %20, align 4, !tbaa !9
  %72 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %69, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %70, i32 noundef %71, i32 noundef %72)
  br label %86

73:                                               ; preds = %16
  %74 = load ptr, ptr %17, align 8, !tbaa !5
  %75 = load i32, ptr %24, align 4, !tbaa !9
  %76 = load i32, ptr %25, align 4, !tbaa !9
  %77 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %74, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %75, i32 noundef %76, i32 noundef %77)
  %78 = load ptr, ptr %17, align 8, !tbaa !5
  %79 = load i32, ptr %23, align 4, !tbaa !9
  %80 = load i32, ptr %19, align 4, !tbaa !9
  %81 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %78, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %79, i32 noundef %80, i32 noundef %81)
  %82 = load ptr, ptr %17, align 8, !tbaa !5
  %83 = load i32, ptr %22, align 4, !tbaa !9
  %84 = load i32, ptr %19, align 4, !tbaa !9
  %85 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %82, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %83, i32 noundef %84, i32 noundef %85)
  br label %86

86:                                               ; preds = %73, %48
  %87 = load ptr, ptr %17, align 8, !tbaa !5
  %88 = load i32, ptr %20, align 4, !tbaa !9
  %89 = load i32, ptr %18, align 4, !tbaa !9
  %90 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %87, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %88, i32 noundef %89, i32 noundef %90)
  %91 = load ptr, ptr %17, align 8, !tbaa !5
  %92 = load i32, ptr %19, align 4, !tbaa !9
  %93 = load i32, ptr %28, align 4, !tbaa !9
  %94 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %91, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %92, i32 noundef %93, i32 noundef %94)
  %95 = load ptr, ptr %17, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %95, i32 0, i32 6
  %97 = load i32, ptr %96, align 4, !tbaa !11
  %98 = icmp eq i32 %97, 1005
  br i1 %98, label %99, label %124

99:                                               ; preds = %86
  %100 = load ptr, ptr %17, align 8, !tbaa !5
  %101 = load i32, ptr %19, align 4, !tbaa !9
  %102 = load i32, ptr %21, align 4, !tbaa !9
  %103 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %100, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %101, i32 noundef %102, i32 noundef %103)
  %104 = load ptr, ptr %17, align 8, !tbaa !5
  %105 = load i32, ptr %27, align 4, !tbaa !9
  %106 = load i32, ptr %21, align 4, !tbaa !9
  %107 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %104, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %105, i32 noundef %106, i32 noundef %107)
  %108 = load ptr, ptr %17, align 8, !tbaa !5
  %109 = load i32, ptr %19, align 4, !tbaa !9
  %110 = load i32, ptr %21, align 4, !tbaa !9
  %111 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %108, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %109, i32 noundef %110, i32 noundef %111)
  %112 = load ptr, ptr %17, align 8, !tbaa !5
  %113 = load i32, ptr %26, align 4, !tbaa !9
  %114 = load i32, ptr %21, align 4, !tbaa !9
  %115 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %112, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %113, i32 noundef %114, i32 noundef %115)
  %116 = load ptr, ptr %17, align 8, !tbaa !5
  %117 = load i32, ptr %19, align 4, !tbaa !9
  %118 = load i32, ptr %21, align 4, !tbaa !9
  %119 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %116, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %117, i32 noundef %118, i32 noundef %119)
  %120 = load ptr, ptr %17, align 8, !tbaa !5
  %121 = load i32, ptr %22, align 4, !tbaa !9
  %122 = load i32, ptr %21, align 4, !tbaa !9
  %123 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %120, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %121, i32 noundef %122, i32 noundef %123)
  br label %137

124:                                              ; preds = %86
  %125 = load ptr, ptr %17, align 8, !tbaa !5
  %126 = load i32, ptr %27, align 4, !tbaa !9
  %127 = load i32, ptr %19, align 4, !tbaa !9
  %128 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %125, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %126, i32 noundef %127, i32 noundef %128)
  %129 = load ptr, ptr %17, align 8, !tbaa !5
  %130 = load i32, ptr %26, align 4, !tbaa !9
  %131 = load i32, ptr %19, align 4, !tbaa !9
  %132 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %129, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %130, i32 noundef %131, i32 noundef %132)
  %133 = load ptr, ptr %17, align 8, !tbaa !5
  %134 = load i32, ptr %22, align 4, !tbaa !9
  %135 = load i32, ptr %19, align 4, !tbaa !9
  %136 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %133, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %134, i32 noundef %135, i32 noundef %136)
  br label %137

137:                                              ; preds = %124, %99
  %138 = load ptr, ptr %17, align 8, !tbaa !5
  %139 = load i32, ptr %21, align 4, !tbaa !9
  %140 = load i32, ptr %21, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %138, i32 noundef 1610879059, i8 noundef signext 121, i32 noundef %139, i32 noundef %140)
  %141 = load ptr, ptr %17, align 8, !tbaa !5
  %142 = load i32, ptr %21, align 4, !tbaa !9
  %143 = load i32, ptr %20, align 4, !tbaa !9
  %144 = load i32, ptr %19, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %141, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %142, i32 noundef %143, i32 noundef %144)
  %145 = load ptr, ptr %17, align 8, !tbaa !5
  %146 = load i32, ptr %29, align 4, !tbaa !9
  %147 = load i32, ptr %18, align 4, !tbaa !9
  %148 = load i32, ptr %33, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %145, i32 noundef 806098626, i8 noundef signext 121, i32 noundef %146, i32 noundef %147, i32 noundef %148, i32 noundef 17)
  %149 = load ptr, ptr %17, align 8, !tbaa !5
  %150 = load i32, ptr %30, align 4, !tbaa !9
  %151 = load i32, ptr %18, align 4, !tbaa !9
  %152 = load i32, ptr %34, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %149, i32 noundef 806098626, i8 noundef signext 121, i32 noundef %150, i32 noundef %151, i32 noundef %152, i32 noundef 30)
  %153 = load ptr, ptr %17, align 8, !tbaa !5
  %154 = load i32, ptr %19, align 4, !tbaa !9
  %155 = load i32, ptr %18, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %153, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %154, i32 noundef %155)
  %156 = load ptr, ptr %17, align 8, !tbaa !5
  %157 = load i32, ptr %18, align 4, !tbaa !9
  %158 = load i32, ptr %31, align 4, !tbaa !9
  %159 = load i32, ptr %18, align 4, !tbaa !9
  %160 = load i32, ptr %33, align 4, !tbaa !9
  %161 = shl i32 %160, 4
  %162 = trunc i32 %161 to i16
  %163 = zext i16 %162 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %156, i32 noundef 1879912522, i8 noundef signext 121, i32 noundef %157, i32 noundef %158, i32 noundef %159, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %163)
  %164 = load ptr, ptr %17, align 8, !tbaa !5
  %165 = load i32, ptr %18, align 4, !tbaa !9
  %166 = load i32, ptr %32, align 4, !tbaa !9
  %167 = load i32, ptr %18, align 4, !tbaa !9
  %168 = load i32, ptr %34, align 4, !tbaa !9
  %169 = shl i32 %168, 4
  %170 = trunc i32 %169 to i16
  %171 = zext i16 %170 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %164, i32 noundef 1879912522, i8 noundef signext 121, i32 noundef %165, i32 noundef %166, i32 noundef %167, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %171)
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_tanh_ps_rational_78_avx(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15) local_unnamed_addr #1 {
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %1, i32 noundef %1, i32 noundef %2) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %0, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %2, i32 noundef %3) #2
  %17 = getelementptr inbounds i8, ptr %0, i64 28
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp eq i32 %18, 1005
  br i1 %19, label %20, label %21

20:                                               ; preds = %16
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %8, i32 noundef %3, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %7, i32 noundef %3, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %2, i32 noundef %3, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %6, i32 noundef %3, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %2, i32 noundef %3, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %5, i32 noundef %3, i32 noundef %3) #2
  br label %22

21:                                               ; preds = %16
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %7, i32 noundef %8, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %6, i32 noundef %2, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %5, i32 noundef %2, i32 noundef %3) #2
  br label %22

22:                                               ; preds = %21, %20
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %3, i32 noundef %1, i32 noundef %3) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %2, i32 noundef %11, i32 noundef %4) #2
  %23 = load i32, ptr %17, align 4, !tbaa !5
  %24 = icmp eq i32 %23, 1005
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %2, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %10, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %2, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %9, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %2, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574232, i8 noundef signext 121, i32 noundef %5, i32 noundef %4, i32 noundef %4) #2
  br label %27

26:                                               ; preds = %22
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %10, i32 noundef %2, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %9, i32 noundef %2, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805643944, i8 noundef signext 121, i32 noundef %5, i32 noundef %2, i32 noundef %4) #2
  br label %27

27:                                               ; preds = %26, %25
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 1610879059, i8 noundef signext 121, i32 noundef %4, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805574233, i8 noundef signext 121, i32 noundef %4, i32 noundef %3, i32 noundef %2) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 806098626, i8 noundef signext 121, i32 noundef %12, i32 noundef %1, i32 noundef %3, i32 noundef 17) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 806098626, i8 noundef signext 121, i32 noundef %13, i32 noundef %1, i32 noundef %4, i32 noundef 30) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %2, i32 noundef %1) #2
  %28 = shl i32 %3, 4
  %29 = and i32 %28, 65520
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef nonnull %0, i32 noundef 1879912522, i8 noundef signext 121, i32 noundef %1, i32 noundef %14, i32 noundef %1, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %29) #2
  %30 = shl i32 %4, 4
  %31 = and i32 %30, 65520
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef nonnull %0, i32 noundef 1879912522, i8 noundef signext 121, i32 noundef %1, i32 noundef %15, i32 noundef %1, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %31) #2
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass