; LLVM IR from libxsmm/libxsmm :: src (generator_gemm_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>

@.str.1 = external hidden unnamed_addr constant [85 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [306 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [316 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd = external hidden unnamed_addr constant [281 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [316 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [276 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [276 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [276 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #1 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca [3 x i32], align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %2, ptr %12, align 8, !tbaa !5
  store i32 %3, ptr %13, align 4, !tbaa !9
  store i32 %4, ptr %14, align 4, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 0, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %22) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  store i32 0, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  store i32 0, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  store i32 0, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  store i32 0, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #4
  store i32 0, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #4
  store i32 0, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #4
  store i32 0, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  store i32 0, ptr %31, align 4, !tbaa !9
  %34 = load i32, ptr %17, align 4, !tbaa !9
  %35 = load i32, ptr %15, align 4, !tbaa !9
  %36 = udiv i32 %34, %35
  %37 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  store i32 %36, ptr %37, align 4, !tbaa !9
  %38 = load i32, ptr %17, align 4, !tbaa !9
  %39 = load i32, ptr %15, align 4, !tbaa !9
  %40 = urem i32 %38, %39
  %41 = load i32, ptr %15, align 4, !tbaa !9
  %42 = udiv i32 %41, 2
  %43 = udiv i32 %40, %42
  %44 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 1
  store i32 %43, ptr %44, align 4, !tbaa !9
  %45 = load i32, ptr %17, align 4, !tbaa !9
  %46 = load i32, ptr %15, align 4, !tbaa !9
  %47 = urem i32 %45, %46
  %48 = load i32, ptr %15, align 4, !tbaa !9
  %49 = udiv i32 %48, 2
  %50 = urem i32 %47, %49
  %51 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 2
  store i32 %50, ptr %51, align 4, !tbaa !9
  %52 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 1
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = add i32 %53, %55
  %57 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 2
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = add i32 %56, %58
  store i32 %59, ptr %23, align 4, !tbaa !9
  %60 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 1
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = icmp ugt i32 %61, 0
  br i1 %62, label %63, label %67

63:                                               ; preds = %9
  %64 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 2
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = icmp ugt i32 %65, 0
  br label %67

67:                                               ; preds = %63, %9
  %68 = phi i1 [ false, %9 ], [ %66, %63 ]
  %69 = zext i1 %68 to i64
  %70 = select i1 %68, i32 1, i32 0
  store i32 %70, ptr %31, align 4, !tbaa !9
  %71 = load i32, ptr %16, align 4, !tbaa !9
  %72 = load i32, ptr %18, align 4, !tbaa !9
  %73 = load i32, ptr %23, align 4, !tbaa !9
  %74 = mul i32 %72, %73
  %75 = sub i32 %71, %74
  store i32 %75, ptr %19, align 4, !tbaa !9
  store i32 0, ptr %25, align 4, !tbaa !9
  %76 = load ptr, ptr %12, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %76, i32 0, i32 31
  %78 = load i32, ptr %77, align 4, !tbaa !11
  %79 = icmp eq i32 %78, 0
  br i1 %79, label %80, label %448

80:                                               ; preds = %67
  store i32 1, ptr %26, align 4, !tbaa !9
  store i32 2, ptr %27, align 4, !tbaa !9
  store i32 3, ptr %28, align 4, !tbaa !9
  store i32 4, ptr %29, align 4, !tbaa !9
  %81 = load i32, ptr %19, align 4, !tbaa !9
  %82 = icmp ule i32 %81, 4
  br i1 %82, label %83, label %102

83:                                               ; preds = %80
  %84 = load ptr, ptr %10, align 8, !tbaa !5
  %85 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %84, i32 noundef 6, i32 noundef %85)
  %86 = load i32, ptr %19, align 4, !tbaa !9
  store i32 %86, ptr %20, align 4, !tbaa !9
  br label %87

87:                                               ; preds = %98, %83
  %88 = load i32, ptr %20, align 4, !tbaa !9
  %89 = icmp ule i32 %88, 4
  br i1 %89, label %90, label %101

90:                                               ; preds = %87
  %91 = load ptr, ptr %10, align 8, !tbaa !5
  %92 = load i32, ptr %14, align 4, !tbaa !9
  %93 = load i32, ptr %20, align 4, !tbaa !9
  %94 = load i32, ptr %19, align 4, !tbaa !9
  %95 = sub i32 %93, %94
  %96 = mul i32 %95, 64
  %97 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %91, i32 noundef 1023410182, i32 noundef %92, i32 noundef 127, i32 noundef %96, i32 noundef %97, i32 noundef 1)
  br label %98

98:                                               ; preds = %90
  %99 = load i32, ptr %20, align 4, !tbaa !9
  %100 = add i32 %99, 1
  store i32 %100, ptr %20, align 4, !tbaa !9
  br label %87, !llvm.loop !15

101:                                              ; preds = %87
  br label %102

102:                                              ; preds = %101, %80
  %103 = load ptr, ptr %10, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %103, i32 noundef 1358954502, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0)
  %104 = load ptr, ptr %10, align 8, !tbaa !5
  %105 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %104, i32 noundef %105, i64 noundef 8589934593)
  %106 = load ptr, ptr %10, align 8, !tbaa !5
  %107 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %106, i32 noundef %107, i64 noundef 34359738372)
  %108 = load ptr, ptr %10, align 8, !tbaa !5
  %109 = load i32, ptr %13, align 4, !tbaa !9
  %110 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %108, i32 noundef 687865863, i32 noundef 63, i32 noundef 16, i32 noundef %109, i32 noundef %110)
  %111 = load ptr, ptr %10, align 8, !tbaa !5
  %112 = load i32, ptr %28, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %111, i32 noundef 1027604486, i32 noundef 63, i32 noundef 127, i32 noundef 16, i32 noundef %112, i32 noundef 1)
  %113 = load ptr, ptr %10, align 8, !tbaa !5
  %114 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %113, i32 noundef %114, i64 noundef 137438953488)
  %115 = load ptr, ptr %10, align 8, !tbaa !5
  %116 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %115, i32 noundef %116, i64 noundef 549755813952)
  %117 = load ptr, ptr %10, align 8, !tbaa !5
  %118 = load i32, ptr %13, align 4, !tbaa !9
  %119 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %117, i32 noundef 687865863, i32 noundef 63, i32 noundef 0, i32 noundef %118, i32 noundef %119)
  %120 = load ptr, ptr %10, align 8, !tbaa !5
  %121 = load i32, ptr %29, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %120, i32 noundef 1027604486, i32 noundef 63, i32 noundef 127, i32 noundef 0, i32 noundef %121, i32 noundef 1)
  %122 = load ptr, ptr %10, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %122, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0)
  %123 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %123, ptr %30, align 4, !tbaa !9
  %124 = load ptr, ptr %10, align 8, !tbaa !5
  %125 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %124, i32 noundef 8, i32 noundef %125)
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %126

126:                                              ; preds = %422, %102
  %127 = load i32, ptr %20, align 4, !tbaa !9
  %128 = load i32, ptr %18, align 4, !tbaa !9
  %129 = icmp ult i32 %127, %128
  br i1 %129, label %130, label %425

130:                                              ; preds = %126
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #4
  store i32 0, ptr %32, align 4, !tbaa !9
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %131

131:                                              ; preds = %405, %130
  %132 = load i32, ptr %21, align 4, !tbaa !9
  %133 = load i32, ptr %23, align 4, !tbaa !9
  %134 = icmp ult i32 %132, %133
  br i1 %134, label %135, label %408

135:                                              ; preds = %131
  %136 = load i32, ptr %19, align 4, !tbaa !9
  %137 = load i32, ptr %21, align 4, !tbaa !9
  %138 = add i32 %136, %137
  %139 = load i32, ptr %23, align 4, !tbaa !9
  %140 = load i32, ptr %20, align 4, !tbaa !9
  %141 = mul i32 %139, %140
  %142 = add i32 %138, %141
  store i32 %142, ptr %24, align 4, !tbaa !9
  %143 = load i32, ptr %19, align 4, !tbaa !9
  %144 = icmp ule i32 %143, 4
  br i1 %144, label %145, label %160

145:                                              ; preds = %135
  %146 = load i32, ptr %24, align 4, !tbaa !9
  %147 = icmp ule i32 %146, 4
  br i1 %147, label %148, label %159

148:                                              ; preds = %145
  %149 = load ptr, ptr %10, align 8, !tbaa !5
  %150 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %149, i32 noundef 6, i32 noundef %150)
  %151 = load ptr, ptr %10, align 8, !tbaa !5
  %152 = load i32, ptr %14, align 4, !tbaa !9
  %153 = load i32, ptr %24, align 4, !tbaa !9
  %154 = load i32, ptr %19, align 4, !tbaa !9
  %155 = sub i32 %153, %154
  %156 = mul i32 %155, 64
  %157 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %151, i32 noundef 1027604486, i32 noundef %152, i32 noundef 127, i32 noundef %156, i32 noundef %157, i32 noundef 1)
  %158 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %158, ptr %24, align 4, !tbaa !9
  br label %159

159:                                              ; preds = %148, %145
  br label %160

160:                                              ; preds = %159, %135
  %161 = load i32, ptr %21, align 4, !tbaa !9
  %162 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %163 = load i32, ptr %162, align 4, !tbaa !9
  %164 = icmp uge i32 %161, %163
  br i1 %164, label %165, label %202

165:                                              ; preds = %160
  %166 = load i32, ptr %31, align 4, !tbaa !9
  %167 = icmp ugt i32 %166, 0
  br i1 %167, label %168, label %201

168:                                              ; preds = %165
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #4
  %169 = load i32, ptr %19, align 4, !tbaa !9
  %170 = load i32, ptr %21, align 4, !tbaa !9
  %171 = add i32 %169, %170
  %172 = add i32 %171, 1
  %173 = load i32, ptr %23, align 4, !tbaa !9
  %174 = load i32, ptr %20, align 4, !tbaa !9
  %175 = mul i32 %173, %174
  %176 = add i32 %172, %175
  store i32 %176, ptr %33, align 4, !tbaa !9
  %177 = load i32, ptr %19, align 4, !tbaa !9
  %178 = icmp ule i32 %177, 4
  br i1 %178, label %179, label %194

179:                                              ; preds = %168
  %180 = load i32, ptr %33, align 4, !tbaa !9
  %181 = icmp ule i32 %180, 4
  br i1 %181, label %182, label %193

182:                                              ; preds = %179
  %183 = load ptr, ptr %10, align 8, !tbaa !5
  %184 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %183, i32 noundef 6, i32 noundef %184)
  %185 = load ptr, ptr %10, align 8, !tbaa !5
  %186 = load i32, ptr %14, align 4, !tbaa !9
  %187 = load i32, ptr %33, align 4, !tbaa !9
  %188 = load i32, ptr %19, align 4, !tbaa !9
  %189 = sub i32 %187, %188
  %190 = mul i32 %189, 64
  %191 = load i32, ptr %26, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %185, i32 noundef 1027604486, i32 noundef %186, i32 noundef 127, i32 noundef %190, i32 noundef %191, i32 noundef 1)
  %192 = load i32, ptr %26, align 4, !tbaa !9
  store i32 %192, ptr %33, align 4, !tbaa !9
  br label %193

193:                                              ; preds = %182, %179
  br label %194

194:                                              ; preds = %193, %168
  %195 = load ptr, ptr %10, align 8, !tbaa !5
  %196 = load i32, ptr %14, align 4, !tbaa !9
  %197 = load i32, ptr %33, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %195, i32 noundef 234896406, i32 noundef %196, i32 noundef %197, i16 noundef signext 0, i32 noundef 4)
  %198 = load ptr, ptr %10, align 8, !tbaa !5
  %199 = load i32, ptr %14, align 4, !tbaa !9
  %200 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %198, i32 noundef 1308630046, i32 noundef %199, i32 noundef %200, i16 noundef signext 2, i32 noundef 4)
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #4
  br label %201

201:                                              ; preds = %194, %165
  br label %202

202:                                              ; preds = %201, %160
  %203 = load ptr, ptr %10, align 8, !tbaa !5
  %204 = load i32, ptr %24, align 4, !tbaa !9
  %205 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %203, i32 noundef 245417994, i32 noundef %204, i32 noundef 127, i8 noundef zeroext 0, i32 noundef %205, i32 noundef 5)
  %206 = load ptr, ptr %10, align 8, !tbaa !5
  %207 = load i32, ptr %21, align 4, !tbaa !9
  %208 = load i32, ptr %23, align 4, !tbaa !9
  %209 = load i32, ptr %28, align 4, !tbaa !9
  %210 = trunc i32 %209 to i8
  %211 = zext i8 %210 to i32
  %212 = icmp eq i32 0, %211
  br i1 %212, label %218, label %213

213:                                              ; preds = %202
  %214 = load i32, ptr %28, align 4, !tbaa !9
  %215 = trunc i32 %214 to i8
  %216 = zext i8 %215 to i32
  %217 = icmp slt i32 0, %216
  br i1 %217, label %218, label %236

218:                                              ; preds = %213, %202
  %219 = load i32, ptr %28, align 4, !tbaa !9
  %220 = zext i32 %219 to i64
  %221 = mul i64 1, %220
  %222 = icmp ult i64 %221, 255
  br i1 %222, label %223, label %227

223:                                              ; preds = %218
  %224 = load i32, ptr %28, align 4, !tbaa !9
  %225 = zext i32 %224 to i64
  %226 = mul i64 1, %225
  br label %228

227:                                              ; preds = %218
  br label %228

228:                                              ; preds = %227, %223
  %229 = phi i64 [ %226, %223 ], [ 255, %227 ]
  %230 = icmp ule i64 %229, 255
  br i1 %230, label %231, label %236

231:                                              ; preds = %228
  %232 = load i32, ptr %28, align 4, !tbaa !9
  %233 = uitofp i32 %232 to double
  %234 = fcmp ole double 0.000000e+00, %233
  br i1 %234, label %235, label %236

235:                                              ; preds = %231
  br label %237

236:                                              ; preds = %231, %228, %213
  call void @__assert_fail(ptr noundef @.str.9, ptr noundef @.str.1, i32 noundef 792, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

237:                                              ; preds = %235
  %238 = load i32, ptr %28, align 4, !tbaa !9
  %239 = trunc i32 %238 to i8
  %240 = load i32, ptr %29, align 4, !tbaa !9
  %241 = trunc i32 %240 to i8
  %242 = zext i8 %241 to i32
  %243 = icmp eq i32 0, %242
  br i1 %243, label %249, label %244

244:                                              ; preds = %237
  %245 = load i32, ptr %29, align 4, !tbaa !9
  %246 = trunc i32 %245 to i8
  %247 = zext i8 %246 to i32
  %248 = icmp slt i32 0, %247
  br i1 %248, label %249, label %267

249:                                              ; preds = %244, %237
  %250 = load i32, ptr %29, align 4, !tbaa !9
  %251 = zext i32 %250 to i64
  %252 = mul i64 1, %251
  %253 = icmp ult i64 %252, 255
  br i1 %253, label %254, label %258

254:                                              ; preds = %249
  %255 = load i32, ptr %29, align 4, !tbaa !9
  %256 = zext i32 %255 to i64
  %257 = mul i64 1, %256
  br label %259

258:                                              ; preds = %249
  br label %259

259:                                              ; preds = %258, %254
  %260 = phi i64 [ %257, %254 ], [ 255, %258 ]
  %261 = icmp ule i64 %260, 255
  br i1 %261, label %262, label %267

262:                                              ; preds = %259
  %263 = load i32, ptr %29, align 4, !tbaa !9
  %264 = uitofp i32 %263 to double
  %265 = fcmp ole double 0.000000e+00, %264
  br i1 %265, label %266, label %267

266:                                              ; preds = %262
  br label %268

267:                                              ; preds = %262, %259, %244
  call void @__assert_fail(ptr noundef @.str.10, ptr noundef @.str.1, i32 noundef 792, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

268:                                              ; preds = %266
  %269 = load i32, ptr %29, align 4, !tbaa !9
  %270 = trunc i32 %269 to i8
  %271 = load i32, ptr %25, align 4, !tbaa !9
  %272 = trunc i32 %271 to i8
  %273 = zext i8 %272 to i32
  %274 = icmp eq i32 0, %273
  br i1 %274, label %280, label %275

275:                                              ; preds = %268
  %276 = load i32, ptr %25, align 4, !tbaa !9
  %277 = trunc i32 %276 to i8
  %278 = zext i8 %277 to i32
  %279 = icmp slt i32 0, %278
  br i1 %279, label %280, label %298

280:                                              ; preds = %275, %268
  %281 = load i32, ptr %25, align 4, !tbaa !9
  %282 = zext i32 %281 to i64
  %283 = mul i64 1, %282
  %284 = icmp ult i64 %283, 255
  br i1 %284, label %285, label %289

285:                                              ; preds = %280
  %286 = load i32, ptr %25, align 4, !tbaa !9
  %287 = zext i32 %286 to i64
  %288 = mul i64 1, %287
  br label %290

289:                                              ; preds = %280
  br label %290

290:                                              ; preds = %289, %285
  %291 = phi i64 [ %288, %285 ], [ 255, %289 ]
  %292 = icmp ule i64 %291, 255
  br i1 %292, label %293, label %298

293:                                              ; preds = %290
  %294 = load i32, ptr %25, align 4, !tbaa !9
  %295 = uitofp i32 %294 to double
  %296 = fcmp ole double 0.000000e+00, %295
  br i1 %296, label %297, label %298

297:                                              ; preds = %293
  br label %299

298:                                              ; preds = %293, %290, %275
  call void @__assert_fail(ptr noundef @.str.11, ptr noundef @.str.1, i32 noundef 793, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

299:                                              ; preds = %297
  %300 = load i32, ptr %25, align 4, !tbaa !9
  %301 = trunc i32 %300 to i8
  %302 = load i32, ptr %26, align 4, !tbaa !9
  %303 = trunc i32 %302 to i8
  %304 = zext i8 %303 to i32
  %305 = icmp eq i32 0, %304
  br i1 %305, label %311, label %306

306:                                              ; preds = %299
  %307 = load i32, ptr %26, align 4, !tbaa !9
  %308 = trunc i32 %307 to i8
  %309 = zext i8 %308 to i32
  %310 = icmp slt i32 0, %309
  br i1 %310, label %311, label %329

311:                                              ; preds = %306, %299
  %312 = load i32, ptr %26, align 4, !tbaa !9
  %313 = zext i32 %312 to i64
  %314 = mul i64 1, %313
  %315 = icmp ult i64 %314, 255
  br i1 %315, label %316, label %320

316:                                              ; preds = %311
  %317 = load i32, ptr %26, align 4, !tbaa !9
  %318 = zext i32 %317 to i64
  %319 = mul i64 1, %318
  br label %321

320:                                              ; preds = %311
  br label %321

321:                                              ; preds = %320, %316
  %322 = phi i64 [ %319, %316 ], [ 255, %320 ]
  %323 = icmp ule i64 %322, 255
  br i1 %323, label %324, label %329

324:                                              ; preds = %321
  %325 = load i32, ptr %26, align 4, !tbaa !9
  %326 = uitofp i32 %325 to double
  %327 = fcmp ole double 0.000000e+00, %326
  br i1 %327, label %328, label %329

328:                                              ; preds = %324
  br label %330

329:                                              ; preds = %324, %321, %306
  call void @__assert_fail(ptr noundef @.str.12, ptr noundef @.str.1, i32 noundef 793, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

330:                                              ; preds = %328
  %331 = load i32, ptr %26, align 4, !tbaa !9
  %332 = trunc i32 %331 to i8
  %333 = load i32, ptr %27, align 4, !tbaa !9
  %334 = trunc i32 %333 to i8
  %335 = zext i8 %334 to i32
  %336 = icmp eq i32 0, %335
  br i1 %336, label %342, label %337

337:                                              ; preds = %330
  %338 = load i32, ptr %27, align 4, !tbaa !9
  %339 = trunc i32 %338 to i8
  %340 = zext i8 %339 to i32
  %341 = icmp slt i32 0, %340
  br i1 %341, label %342, label %360

342:                                              ; preds = %337, %330
  %343 = load i32, ptr %27, align 4, !tbaa !9
  %344 = zext i32 %343 to i64
  %345 = mul i64 1, %344
  %346 = icmp ult i64 %345, 255
  br i1 %346, label %347, label %351

347:                                              ; preds = %342
  %348 = load i32, ptr %27, align 4, !tbaa !9
  %349 = zext i32 %348 to i64
  %350 = mul i64 1, %349
  br label %352

351:                                              ; preds = %342
  br label %352

352:                                              ; preds = %351, %347
  %353 = phi i64 [ %350, %347 ], [ 255, %351 ]
  %354 = icmp ule i64 %353, 255
  br i1 %354, label %355, label %360

355:                                              ; preds = %352
  %356 = load i32, ptr %27, align 4, !tbaa !9
  %357 = uitofp i32 %356 to double
  %358 = fcmp ole double 0.000000e+00, %357
  br i1 %358, label %359, label %360

359:                                              ; preds = %355
  br label %361

360:                                              ; preds = %355, %352, %337
  call void @__assert_fail(ptr noundef @.str.13, ptr noundef @.str.1, i32 noundef 793, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

361:                                              ; preds = %359
  %362 = load i32, ptr %27, align 4, !tbaa !9
  %363 = trunc i32 %362 to i8
  %364 = load i32, ptr %30, align 4, !tbaa !9
  %365 = trunc i32 %364 to i8
  %366 = zext i8 %365 to i32
  %367 = icmp eq i32 0, %366
  br i1 %367, label %373, label %368

368:                                              ; preds = %361
  %369 = load i32, ptr %30, align 4, !tbaa !9
  %370 = trunc i32 %369 to i8
  %371 = zext i8 %370 to i32
  %372 = icmp slt i32 0, %371
  br i1 %372, label %373, label %391

373:                                              ; preds = %368, %361
  %374 = load i32, ptr %30, align 4, !tbaa !9
  %375 = zext i32 %374 to i64
  %376 = mul i64 1, %375
  %377 = icmp ult i64 %376, 255
  br i1 %377, label %378, label %382

378:                                              ; preds = %373
  %379 = load i32, ptr %30, align 4, !tbaa !9
  %380 = zext i32 %379 to i64
  %381 = mul i64 1, %380
  br label %383

382:                                              ; preds = %373
  br label %383

383:                                              ; preds = %382, %378
  %384 = phi i64 [ %381, %378 ], [ 255, %382 ]
  %385 = icmp ule i64 %384, 255
  br i1 %385, label %386, label %391

386:                                              ; preds = %383
  %387 = load i32, ptr %30, align 4, !tbaa !9
  %388 = uitofp i32 %387 to double
  %389 = fcmp ole double 0.000000e+00, %388
  br i1 %389, label %390, label %391

390:                                              ; preds = %386
  br label %392

391:                                              ; preds = %386, %383, %368
  call void @__assert_fail(ptr noundef @.str.7, ptr noundef @.str.1, i32 noundef 794, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd) #5
  unreachable

392:                                              ; preds = %390
  %393 = load i32, ptr %30, align 4, !tbaa !9
  %394 = trunc i32 %393 to i8
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %206, i32 noundef %207, i32 noundef %208, i8 noundef zeroext %239, i8 noundef zeroext %270, i8 noundef zeroext %301, i8 noundef zeroext %332, i8 noundef zeroext %363, i8 noundef zeroext %394, ptr noundef %32)
  %395 = load i32, ptr %21, align 4, !tbaa !9
  %396 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %397 = load i32, ptr %396, align 4, !tbaa !9
  %398 = icmp uge i32 %395, %397
  br i1 %398, label %399, label %404

399:                                              ; preds = %392
  %400 = load i32, ptr %31, align 4, !tbaa !9
  %401 = icmp ugt i32 %400, 0
  br i1 %401, label %402, label %403

402:                                              ; preds = %399
  br label %408

403:                                              ; preds = %399
  br label %404

404:                                              ; preds = %403, %392
  br label %405

405:                                              ; preds = %404
  %406 = load i32, ptr %21, align 4, !tbaa !9
  %407 = add i32 %406, 1
  store i32 %407, ptr %21, align 4, !tbaa !9
  br label %131, !llvm.loop !17

408:                                              ; preds = %402, %131
  %409 = load ptr, ptr %10, align 8, !tbaa !5
  %410 = load i32, ptr %30, align 4, !tbaa !9
  %411 = load i32, ptr %14, align 4, !tbaa !9
  %412 = load i32, ptr %30, align 4, !tbaa !9
  %413 = load ptr, ptr %11, align 8, !tbaa !5
  %414 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %413, i32 0, i32 30
  %415 = load i32, ptr %414, align 1, !tbaa !18
  %416 = zext i32 %415 to i64
  %417 = load i32, ptr %32, align 4, !tbaa !9
  %418 = zext i32 %417 to i64
  %419 = mul nsw i64 %418, 8
  %420 = sub nsw i64 %416, %419
  %421 = sdiv i64 %420, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %409, i32 noundef 4096, i32 noundef %410, i32 noundef %411, i32 noundef %412, i64 noundef %421)
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #4
  br label %422

422:                                              ; preds = %408
  %423 = load i32, ptr %20, align 4, !tbaa !9
  %424 = add i32 %423, 1
  store i32 %424, ptr %20, align 4, !tbaa !9
  br label %126, !llvm.loop !21

425:                                              ; preds = %126
  %426 = load i32, ptr %19, align 4, !tbaa !9
  %427 = icmp ule i32 %426, 4
  br i1 %427, label %428, label %447

428:                                              ; preds = %425
  %429 = load ptr, ptr %10, align 8, !tbaa !5
  %430 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %429, i32 noundef 6, i32 noundef %430)
  %431 = load i32, ptr %19, align 4, !tbaa !9
  store i32 %431, ptr %20, align 4, !tbaa !9
  br label %432

432:                                              ; preds = %443, %428
  %433 = load i32, ptr %20, align 4, !tbaa !9
  %434 = icmp ule i32 %433, 4
  br i1 %434, label %435, label %446

435:                                              ; preds = %432
  %436 = load ptr, ptr %10, align 8, !tbaa !5
  %437 = load i32, ptr %14, align 4, !tbaa !9
  %438 = load i32, ptr %20, align 4, !tbaa !9
  %439 = load i32, ptr %19, align 4, !tbaa !9
  %440 = sub i32 %438, %439
  %441 = mul i32 %440, 64
  %442 = load i32, ptr %20, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %436, i32 noundef 1027604486, i32 noundef %437, i32 noundef 127, i32 noundef %441, i32 noundef %442, i32 noundef 1)
  br label %443

443:                                              ; preds = %435
  %444 = load i32, ptr %20, align 4, !tbaa !9
  %445 = add i32 %444, 1
  store i32 %445, ptr %20, align 4, !tbaa !9
  br label %432, !llvm.loop !22

446:                                              ; preds = %432
  br label %447

447:                                              ; preds = %446, %425
  br label %448

448:                                              ; preds = %447, %67
  %449 = load ptr, ptr %10, align 8, !tbaa !5
  %450 = load i32, ptr %25, align 4, !tbaa !9
  %451 = load i32, ptr %25, align 4, !tbaa !9
  %452 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %449, i32 noundef 773856275, i32 noundef %450, i32 noundef %451, i8 noundef zeroext 0, i32 noundef %452, i32 noundef 1)
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %453

453:                                              ; preds = %530, %448
  %454 = load i32, ptr %20, align 4, !tbaa !9
  %455 = load i32, ptr %18, align 4, !tbaa !9
  %456 = icmp ult i32 %454, %455
  br i1 %456, label %457, label %533

457:                                              ; preds = %453
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %458

458:                                              ; preds = %475, %457
  %459 = load i32, ptr %21, align 4, !tbaa !9
  %460 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %461 = load i32, ptr %460, align 4, !tbaa !9
  %462 = icmp ult i32 %459, %461
  br i1 %462, label %463, label %478

463:                                              ; preds = %458
  %464 = load i32, ptr %19, align 4, !tbaa !9
  %465 = load i32, ptr %21, align 4, !tbaa !9
  %466 = add i32 %464, %465
  %467 = load i32, ptr %23, align 4, !tbaa !9
  %468 = load i32, ptr %20, align 4, !tbaa !9
  %469 = mul i32 %467, %468
  %470 = add i32 %466, %469
  store i32 %470, ptr %24, align 4, !tbaa !9
  %471 = load ptr, ptr %10, align 8, !tbaa !5
  %472 = load i32, ptr %24, align 4, !tbaa !9
  %473 = load i32, ptr %25, align 4, !tbaa !9
  %474 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %471, i32 noundef 237040651, i32 noundef %472, i32 noundef %473, i8 noundef zeroext 0, i32 noundef %474, i32 noundef 5)
  br label %475

475:                                              ; preds = %463
  %476 = load i32, ptr %21, align 4, !tbaa !9
  %477 = add i32 %476, 1
  store i32 %477, ptr %21, align 4, !tbaa !9
  br label %458, !llvm.loop !23

478:                                              ; preds = %458
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %479

479:                                              ; preds = %499, %478
  %480 = load i32, ptr %21, align 4, !tbaa !9
  %481 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 1
  %482 = load i32, ptr %481, align 4, !tbaa !9
  %483 = icmp ult i32 %480, %482
  br i1 %483, label %484, label %502

484:                                              ; preds = %479
  %485 = load i32, ptr %19, align 4, !tbaa !9
  %486 = load i32, ptr %21, align 4, !tbaa !9
  %487 = add i32 %485, %486
  %488 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %489 = load i32, ptr %488, align 4, !tbaa !9
  %490 = add i32 %487, %489
  %491 = load i32, ptr %23, align 4, !tbaa !9
  %492 = load i32, ptr %20, align 4, !tbaa !9
  %493 = mul i32 %491, %492
  %494 = add i32 %490, %493
  store i32 %494, ptr %24, align 4, !tbaa !9
  %495 = load ptr, ptr %10, align 8, !tbaa !5
  %496 = load i32, ptr %24, align 4, !tbaa !9
  %497 = load i32, ptr %25, align 4, !tbaa !9
  %498 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %495, i32 noundef 237040651, i32 noundef %496, i32 noundef %497, i8 noundef zeroext 0, i32 noundef %498, i32 noundef 4)
  br label %499

499:                                              ; preds = %484
  %500 = load i32, ptr %21, align 4, !tbaa !9
  %501 = add i32 %500, 1
  store i32 %501, ptr %21, align 4, !tbaa !9
  br label %479, !llvm.loop !24

502:                                              ; preds = %479
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %503

503:                                              ; preds = %526, %502
  %504 = load i32, ptr %21, align 4, !tbaa !9
  %505 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 2
  %506 = load i32, ptr %505, align 4, !tbaa !9
  %507 = icmp ult i32 %504, %506
  br i1 %507, label %508, label %529

508:                                              ; preds = %503
  %509 = load i32, ptr %19, align 4, !tbaa !9
  %510 = load i32, ptr %21, align 4, !tbaa !9
  %511 = add i32 %509, %510
  %512 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 0
  %513 = load i32, ptr %512, align 4, !tbaa !9
  %514 = add i32 %511, %513
  %515 = getelementptr inbounds [3 x i32], ptr %22, i64 0, i64 1
  %516 = load i32, ptr %515, align 4, !tbaa !9
  %517 = add i32 %514, %516
  %518 = load i32, ptr %23, align 4, !tbaa !9
  %519 = load i32, ptr %20, align 4, !tbaa !9
  %520 = mul i32 %518, %519
  %521 = add i32 %517, %520
  store i32 %521, ptr %24, align 4, !tbaa !9
  %522 = load ptr, ptr %10, align 8, !tbaa !5
  %523 = load i32, ptr %24, align 4, !tbaa !9
  %524 = load i32, ptr %25, align 4, !tbaa !9
  %525 = load i32, ptr %24, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %522, i32 noundef 237040651, i32 noundef %523, i32 noundef %524, i8 noundef zeroext 0, i32 noundef %525, i32 noundef 5)
  br label %526

526:                                              ; preds = %508
  %527 = load i32, ptr %21, align 4, !tbaa !9
  %528 = add i32 %527, 1
  store i32 %528, ptr %21, align 4, !tbaa !9
  br label %503, !llvm.loop !25

529:                                              ; preds = %503
  br label %530

530:                                              ; preds = %529
  %531 = load i32, ptr %20, align 4, !tbaa !9
  %532 = add i32 %531, 1
  store i32 %532, ptr %20, align 4, !tbaa !9
  br label %453, !llvm.loop !26

533:                                              ; preds = %453
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 124}
!12 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !13, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!13 = !{!"libxsmm_tile_config", !7, i64 0, !14, i64 2, !7, i64 4, !14, i64 6, !7, i64 8, !14, i64 10, !7, i64 12, !14, i64 14, !7, i64 16, !14, i64 18, !7, i64 20, !14, i64 22, !7, i64 24, !14, i64 26, !7, i64 28, !14, i64 30, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = !{!19, !10, i64 90}
!19 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !20, i64 33, !20, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !14, i64 62, !14, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !14, i64 70, !14, i64 72, !14, i64 74, !14, i64 76, !14, i64 78, !14, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!20 = !{!"long long", !7, i64 0}
!21 = distinct !{!21, !16}
!22 = distinct !{!22, !16}
!23 = distinct !{!23, !16}
!24 = distinct !{!24, !16}
!25 = distinct !{!25, !16}
!26 = distinct !{!26, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_asimd_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gemm_apply_relu_fusion_2dregblock_aarch64_asimd(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #1 {
  %10 = alloca i32, align 4
  %11 = udiv i32 %7, %5
  %12 = urem i32 %7, %5
  %13 = lshr i32 %5, 1
  %14 = udiv i32 %12, %13
  %15 = urem i32 %12, %13
  %16 = add i32 %14, %11
  %17 = add i32 %16, %15
  %18 = icmp ule i32 %13, %12
  %19 = icmp ne i32 %15, 0
  %20 = and i1 %18, %19
  %21 = mul i32 %17, %8
  %22 = sub i32 %6, %21
  %23 = getelementptr inbounds i8, ptr %2, i64 124
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %.loopexit

26:                                               ; preds = %9
  %27 = icmp ult i32 %22, 5
  br i1 %27, label %28, label %.loopexit219

28:                                               ; preds = %26
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 6, i32 noundef %4)
  br label %29

29:                                               ; preds = %28, %29
  %.0202222 = phi i32 [ %22, %28 ], [ %32, %29 ]
  %30 = sub nuw nsw i32 %.0202222, %22
  %31 = shl nuw nsw i32 %30, 6
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1023410182, i32 noundef %4, i32 noundef 127, i32 noundef %31, i32 noundef %.0202222, i32 noundef 1) #3
  %32 = add nuw nsw i32 %.0202222, 1
  %33 = icmp ult i32 %.0202222, 4
  br i1 %33, label %29, label %.loopexit219, !llvm.loop !13

.loopexit219:                                     ; preds = %29, %26
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 1358954502, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %3, i64 noundef 8589934593) #3
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %4, i64 noundef 34359738372) #3
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %0, i32 noundef 687865863, i32 noundef 63, i32 noundef 16, i32 noundef %3, i32 noundef %4) #3
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef 63, i32 noundef 127, i32 noundef 16, i32 noundef 3, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %3, i64 noundef 137438953488) #3
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %4, i64 noundef 549755813952) #3
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %0, i32 noundef 687865863, i32 noundef 63, i32 noundef 0, i32 noundef %3, i32 noundef %4) #3
  tail call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef 63, i32 noundef 127, i32 noundef 0, i32 noundef 4, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0) #3
  tail call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 8, i32 noundef %3)
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph232

.lr.ph232:                                        ; preds = %.loopexit219
  %.not254 = icmp eq i32 %17, 0
  %34 = trunc i32 %3 to i8
  %35 = getelementptr inbounds i8, ptr %1, i64 90
  br i1 %.not254, label %.loopexit218, label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.lr.ph232, %..loopexit218_crit_edge.us
  %.1230.us = phi i32 [ %58, %..loopexit218_crit_edge.us ], [ 0, %.lr.ph232 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  store i32 0, ptr %10, align 4, !tbaa !15
  %36 = mul i32 %.1230.us, %17
  br i1 %27, label %.lr.ph.split.us239, label %.lr.ph.split.us.us

.lr.ph.split.split.us242:                         ; preds = %.lr.ph.split.us239, %44
  %.0203223.us233 = phi i32 [ %45, %44 ], [ 0, %.lr.ph.split.us239 ]
  %37 = add i32 %.0203223.us233, %22
  %38 = add i32 %37, %36
  %39 = icmp ult i32 %38, 5
  br i1 %39, label %40, label %43

40:                                               ; preds = %.lr.ph.split.split.us242
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 6, i32 noundef %4)
  %41 = sub nsw i32 %38, %22
  %42 = shl nsw i32 %41, 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %4, i32 noundef 127, i32 noundef %42, i32 noundef 0, i32 noundef 1) #3
  br label %43

43:                                               ; preds = %40, %.lr.ph.split.split.us242
  %.0201.us = phi i32 [ 0, %40 ], [ %38, %.lr.ph.split.split.us242 ]
  %.not256 = icmp ult i32 %.0203223.us233, %11
  br i1 %.not256, label %44, label %.split.us234

44:                                               ; preds = %43
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245417994, i32 noundef %.0201.us, i32 noundef 127, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 5) #3
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %.0203223.us233, i32 noundef %17, i8 noundef zeroext 3, i8 noundef zeroext 4, i8 noundef zeroext 0, i8 noundef zeroext 1, i8 noundef zeroext 2, i8 noundef zeroext %34, ptr noundef nonnull %10) #3
  %45 = add nuw i32 %.0203223.us233, 1
  %46 = icmp ult i32 %45, %17
  br i1 %46, label %.lr.ph.split.split.us242, label %..loopexit218_crit_edge.us, !llvm.loop !16

47:                                               ; preds = %.split.us234
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 6, i32 noundef %4)
  %48 = sub nsw i32 %59, %22
  %49 = shl nsw i32 %48, 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %4, i32 noundef 127, i32 noundef %49, i32 noundef 1, i32 noundef 1) #3
  br label %50

50:                                               ; preds = %.split.us234, %47
  %.0.us = phi i32 [ 1, %47 ], [ %59, %.split.us234 ]
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 234896406, i32 noundef %4, i32 noundef %.0.us, i16 noundef signext 0, i32 noundef 4) #3
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 1308630046, i32 noundef %4, i32 noundef %.us-phi.us, i16 noundef signext 2, i32 noundef 4) #3
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245417994, i32 noundef %.us-phi.us, i32 noundef 127, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 5) #3
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %.us-phi226.us, i32 noundef %17, i8 noundef zeroext 3, i8 noundef zeroext 4, i8 noundef zeroext 0, i8 noundef zeroext 1, i8 noundef zeroext 2, i8 noundef zeroext %34, ptr noundef nonnull %10) #3
  br label %..loopexit218_crit_edge.us

..loopexit218_crit_edge.us:                       ; preds = %.lr.ph.split.us.split.us.us, %63, %72, %44, %50
  %51 = load i32, ptr %35, align 1, !tbaa !17
  %52 = zext i32 %51 to i64
  %53 = load i32, ptr %10, align 4, !tbaa !15
  %54 = zext i32 %53 to i64
  %55 = shl nuw nsw i64 %54, 3
  %56 = sub nsw i64 %52, %55
  %57 = sdiv i64 %56, 8
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %3, i64 noundef %57) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  %58 = add nuw i32 %.1230.us, 1
  %exitcond.not = icmp eq i32 %58, %8
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.us, !llvm.loop !20

.lr.ph.split.us239:                               ; preds = %.lr.ph.us
  br i1 %20, label %.lr.ph.split.split.us242, label %.lr.ph.split.split.us.us

.split.us234:                                     ; preds = %.lr.ph.split.us.split.us244, %43
  %.pre-phi = phi i32 [ %38, %43 ], [ %62, %.lr.ph.split.us.split.us244 ]
  %.us-phi.us = phi i32 [ %.0201.us, %43 ], [ %62, %.lr.ph.split.us.split.us244 ]
  %.us-phi226.us = phi i32 [ %.0203223.us233, %43 ], [ %.0203223.us.us240, %.lr.ph.split.us.split.us244 ]
  %59 = add i32 %.pre-phi, 1
  %60 = icmp ult i32 %59, 5
  %or.cond5.us = select i1 %27, i1 %60, i1 false
  br i1 %or.cond5.us, label %47, label %50

.lr.ph.split.us.us:                               ; preds = %.lr.ph.us
  br i1 %20, label %.lr.ph.split.us.split.us244, label %.lr.ph.split.us.split.us.us

.lr.ph.split.us.split.us244:                      ; preds = %.lr.ph.split.us.us, %63
  %.0203223.us.us240 = phi i32 [ %64, %63 ], [ 0, %.lr.ph.split.us.us ]
  %61 = add i32 %.0203223.us.us240, %22
  %62 = add i32 %61, %36
  %.not255 = icmp ult i32 %.0203223.us.us240, %11
  br i1 %.not255, label %63, label %.split.us234

63:                                               ; preds = %.lr.ph.split.us.split.us244
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245417994, i32 noundef %62, i32 noundef 127, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 5) #3
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %.0203223.us.us240, i32 noundef %17, i8 noundef zeroext 3, i8 noundef zeroext 4, i8 noundef zeroext 0, i8 noundef zeroext 1, i8 noundef zeroext 2, i8 noundef zeroext %34, ptr noundef nonnull %10) #3
  %64 = add nuw i32 %.0203223.us.us240, 1
  %65 = icmp ult i32 %64, %17
  br i1 %65, label %.lr.ph.split.us.split.us244, label %..loopexit218_crit_edge.us, !llvm.loop !16

.lr.ph.split.split.us.us:                         ; preds = %.lr.ph.split.us239, %72
  %.0203223.us227.us = phi i32 [ %73, %72 ], [ 0, %.lr.ph.split.us239 ]
  %66 = add i32 %.0203223.us227.us, %22
  %67 = add i32 %66, %36
  %68 = icmp ult i32 %67, 5
  br i1 %68, label %69, label %72

69:                                               ; preds = %.lr.ph.split.split.us.us
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 6, i32 noundef %4)
  %70 = sub nsw i32 %67, %22
  %71 = shl nsw i32 %70, 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %4, i32 noundef 127, i32 noundef %71, i32 noundef 0, i32 noundef 1) #3
  br label %72

72:                                               ; preds = %69, %.lr.ph.split.split.us.us
  %.0201.us228.us = phi i32 [ 0, %69 ], [ %67, %.lr.ph.split.split.us.us ]
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245417994, i32 noundef %.0201.us228.us, i32 noundef 127, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 5) #3
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %.0203223.us227.us, i32 noundef %17, i8 noundef zeroext 3, i8 noundef zeroext 4, i8 noundef zeroext 0, i8 noundef zeroext 1, i8 noundef zeroext 2, i8 noundef zeroext %34, ptr noundef nonnull %10) #3
  %73 = add nuw i32 %.0203223.us227.us, 1
  %74 = icmp ult i32 %73, %17
  br i1 %74, label %.lr.ph.split.split.us.us, label %..loopexit218_crit_edge.us, !llvm.loop !16

.lr.ph.split.us.split.us.us:                      ; preds = %.lr.ph.split.us.us, %.lr.ph.split.us.split.us.us
  %.0203223.us.us.us = phi i32 [ %77, %.lr.ph.split.us.split.us.us ], [ 0, %.lr.ph.split.us.us ]
  %75 = add i32 %.0203223.us.us.us, %22
  %76 = add i32 %75, %36
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245417994, i32 noundef %76, i32 noundef 127, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 5) #3
  call void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef %0, i32 noundef %.0203223.us.us.us, i32 noundef %17, i8 noundef zeroext 3, i8 noundef zeroext 4, i8 noundef zeroext 0, i8 noundef zeroext 1, i8 noundef zeroext 2, i8 noundef zeroext %34, ptr noundef nonnull %10) #3
  %77 = add nuw i32 %.0203223.us.us.us, 1
  %78 = icmp ult i32 %77, %17
  br i1 %78, label %.lr.ph.split.us.split.us.us, label %..loopexit218_crit_edge.us, !llvm.loop !16

.loopexit218:                                     ; preds = %.lr.ph232, %.loopexit218
  %.1230 = phi i32 [ %82, %.loopexit218 ], [ 0, %.lr.ph232 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  %79 = load i32, ptr %35, align 1, !tbaa !17
  %80 = lshr i32 %79, 3
  %81 = zext nneg i32 %80 to i64
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %3, i32 noundef %4, i32 noundef %3, i64 noundef %81) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  %82 = add nuw i32 %.1230, 1
  %exitcond274.not = icmp eq i32 %82, %8
  br i1 %exitcond274.not, label %._crit_edge, label %.loopexit218, !llvm.loop !20

._crit_edge:                                      ; preds = %..loopexit218_crit_edge.us, %.loopexit218, %.loopexit219
  br i1 %27, label %83, label %.loopexit

83:                                               ; preds = %._crit_edge
  call void @libxsmm_generator_gemm_getval_stack_var_aarch64(ptr noundef %0, i32 noundef 6, i32 noundef %4)
  br label %84

84:                                               ; preds = %83, %84
  %.2245 = phi i32 [ %22, %83 ], [ %87, %84 ]
  %85 = sub nuw nsw i32 %.2245, %22
  %86 = shl nuw nsw i32 %85, 6
  call void @libxsmm_aarch64_instruction_asimd_move(ptr noundef %0, i32 noundef 1027604486, i32 noundef %4, i32 noundef 127, i32 noundef %86, i32 noundef %.2245, i32 noundef 1) #3
  %87 = add nuw nsw i32 %.2245, 1
  %88 = icmp ult i32 %.2245, 4
  br i1 %88, label %84, label %.loopexit, !llvm.loop !21

.loopexit:                                        ; preds = %84, %._crit_edge, %9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 773856275, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 0, i32 noundef 1) #3
  %.not257 = icmp eq i32 %8, 0
  br i1 %.not257, label %._crit_edge253, label %.preheader217.lr.ph

.preheader217.lr.ph:                              ; preds = %.loopexit
  %.not258 = icmp ugt i32 %5, %7
  %.not259 = icmp ugt i32 %13, %12
  %89 = add i32 %22, %11
  %.not260 = icmp eq i32 %15, 0
  %90 = add i32 %16, %22
  br label %.preheader217

.preheader217:                                    ; preds = %.preheader217.lr.ph, %._crit_edge251
  %.3252 = phi i32 [ 0, %.preheader217.lr.ph ], [ %109, %._crit_edge251 ]
  br i1 %.not258, label %.preheader216, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader217
  %91 = mul i32 %.3252, %17
  %92 = add i32 %91, %22
  br label %95

.preheader216:                                    ; preds = %95, %.preheader217
  br i1 %.not259, label %.preheader, label %.lr.ph248

.lr.ph248:                                        ; preds = %.preheader216
  %93 = mul i32 %.3252, %17
  %94 = add i32 %89, %93
  br label %101

95:                                               ; preds = %.lr.ph, %95
  %.1204246 = phi i32 [ 0, %.lr.ph ], [ %97, %95 ]
  %96 = add i32 %92, %.1204246
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237040651, i32 noundef %96, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %96, i32 noundef 5) #3
  %97 = add nuw i32 %.1204246, 1
  %98 = icmp ult i32 %97, %11
  br i1 %98, label %95, label %.preheader216, !llvm.loop !22

.preheader:                                       ; preds = %101, %.preheader216
  br i1 %.not260, label %._crit_edge251, label %.lr.ph250

.lr.ph250:                                        ; preds = %.preheader
  %99 = mul i32 %.3252, %17
  %100 = add i32 %90, %99
  br label %105

101:                                              ; preds = %.lr.ph248, %101
  %.2205247 = phi i32 [ 0, %.lr.ph248 ], [ %103, %101 ]
  %102 = add i32 %94, %.2205247
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237040651, i32 noundef %102, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %102, i32 noundef 4) #3
  %103 = add nuw i32 %.2205247, 1
  %104 = icmp ult i32 %103, %14
  br i1 %104, label %101, label %.preheader, !llvm.loop !23

105:                                              ; preds = %.lr.ph250, %105
  %.3206249 = phi i32 [ 0, %.lr.ph250 ], [ %107, %105 ]
  %106 = add i32 %100, %.3206249
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 237040651, i32 noundef %106, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %106, i32 noundef 5) #3
  %107 = add nuw nsw i32 %.3206249, 1
  %108 = icmp ult i32 %107, %15
  br i1 %108, label %105, label %._crit_edge251, !llvm.loop !24

._crit_edge251:                                   ; preds = %105, %.preheader
  %109 = add nuw i32 %.3252, 1
  %exitcond275.not = icmp eq i32 %109, %8
  br i1 %exitcond275.not, label %._crit_edge253, label %.preheader217, !llvm.loop !25

._crit_edge253:                                   ; preds = %._crit_edge251, %.loopexit
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_asimd(ptr noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 124}
!6 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !10, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !12, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !12, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"libxsmm_tile_config", !8, i64 0, !11, i64 2, !8, i64 4, !11, i64 6, !8, i64 8, !11, i64 10, !8, i64 12, !11, i64 14, !8, i64 16, !11, i64 18, !8, i64 20, !11, i64 22, !8, i64 24, !11, i64 26, !8, i64 28, !11, i64 30, !8, i64 32}
!11 = !{!"short", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !14}
!17 = !{!18, !7, i64 90}
!18 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !19, i64 33, !19, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !11, i64 62, !11, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !11, i64 70, !11, i64 72, !11, i64 74, !11, i64 76, !11, i64 78, !11, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!19 = !{!"long long", !8, i64 0}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}
!22 = distinct !{!22, !14}
!23 = distinct !{!23, !14}
!24 = distinct !{!24, !14}
!25 = distinct !{!25, !14}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass