; LLVM IR from abeaumont/competitive-programming :: codechef/feb18/chanoq.ll (Z6insertRSt6vectorI4nodeSaIS0_EEiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32, %"class.std::vector.0" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6insertRSt6vectorI4nodeSaIS0_EEiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %11 = load i32, ptr %8, align 4, !tbaa !9
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  %13 = load i32, ptr %7, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %14) #2
  %16 = getelementptr inbounds %struct.node, ptr %15, i32 0, i32 0
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = icmp sle i32 %11, %17
  br i1 %18, label %19, label %34

19:                                               ; preds = %5
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #2
  %25 = getelementptr inbounds %struct.node, ptr %24, i32 0, i32 1
  %26 = load i32, ptr %25, align 4, !tbaa !17
  %27 = icmp sge i32 %20, %26
  br i1 %27, label %28, label %34

28:                                               ; preds = %19
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #2
  %33 = getelementptr inbounds %struct.node, ptr %32, i32 0, i32 2
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %33, ptr noundef nonnull align 4 dereferenceable(4) %10)
  br label %70

34:                                               ; preds = %19, %5
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = mul nsw i32 %37, 2
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %39) #2
  %41 = getelementptr inbounds %struct.node, ptr %40, i32 0, i32 1
  %42 = load i32, ptr %41, align 4, !tbaa !17
  %43 = icmp sle i32 %35, %42
  br i1 %43, label %44, label %51

44:                                               ; preds = %34
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = mul nsw i32 %46, 2
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = load i32, ptr %9, align 4, !tbaa !9
  %50 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6insertRSt6vectorI4nodeSaIS0_EEiiii(ptr noundef nonnull align 8 dereferenceable(24) %45, i32 noundef %47, i32 noundef %48, i32 noundef %49, i32 noundef %50)
  br label %51

51:                                               ; preds = %44, %34
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = mul nsw i32 %54, 2
  %56 = add nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %57) #2
  %59 = getelementptr inbounds %struct.node, ptr %58, i32 0, i32 0
  %60 = load i32, ptr %59, align 8, !tbaa !11
  %61 = icmp sge i32 %52, %60
  br i1 %61, label %62, label %70

62:                                               ; preds = %51
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = mul nsw i32 %64, 2
  %66 = add nsw i32 %65, 1
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6insertRSt6vectorI4nodeSaIS0_EEiiii(ptr noundef nonnull align 8 dereferenceable(24) %63, i32 noundef %66, i32 noundef %67, i32 noundef %68, i32 noundef %69)
  br label %70

70:                                               ; preds = %62, %51, %28
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS4node", !10, i64 0, !10, i64 4, !13, i64 8}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!12, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6insertRSt6vectorI4nodeSaIS0_EEiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = alloca i32, align 4
  br label %tailrecurse

tailrecurse:                                      ; preds = %24, %5
  %.tr25 = phi i32 [ %1, %5 ], [ %25, %24 ]
  %7 = sext i32 %.tr25 to i64
  %8 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %7) #2
  %9 = load i32, ptr %8, align 8, !tbaa !5
  %.not = icmp slt i32 %9, %2
  br i1 %.not, label %17, label %10

10:                                               ; preds = %tailrecurse
  %11 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %7) #2
  %12 = getelementptr inbounds i8, ptr %11, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !15
  %.not22 = icmp sgt i32 %13, %3
  br i1 %.not22, label %17, label %14

14:                                               ; preds = %10
  store i32 %4, ptr %6, align 4, !tbaa !16
  %15 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %7) #2
  %16 = getelementptr inbounds i8, ptr %15, i64 8
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %16, ptr noundef nonnull align 4 dereferenceable(4) %6)
  br label %.loopexit

17:                                               ; preds = %10, %tailrecurse
  %18 = shl nsw i32 %.tr25, 1
  %19 = sext i32 %18 to i64
  %20 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %19) #2
  %21 = getelementptr inbounds i8, ptr %20, i64 4
  %22 = load i32, ptr %21, align 4, !tbaa !15
  %.not23 = icmp slt i32 %22, %2
  br i1 %.not23, label %24, label %23

23:                                               ; preds = %17
  tail call void @_Z6insertRSt6vectorI4nodeSaIS0_EEiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %18, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %24

24:                                               ; preds = %23, %17
  %25 = or disjoint i32 %18, 1
  %26 = sext i32 %25 to i64
  %27 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %26) #2
  %28 = load i32, ptr %27, align 8, !tbaa !5
  %.not24 = icmp sgt i32 %28, %3
  br i1 %.not24, label %.loopexit, label %tailrecurse

.loopexit:                                        ; preds = %24, %14
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorI4nodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4node", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIiSaIiEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!7, !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass