; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseResizerBilinear.ll (ZN4Simd4Base19ResizerByteBilinearC2ERKNS_8ResParamE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::ResizerByteBilinear" = type { %"class.Simd::Resizer", %"struct.Simd::Array", %"struct.Simd::Array", %"struct.Simd::Array", %"struct.Simd::Array", [2 x %"struct.Simd::Array"] }
%"class.Simd::Resizer" = type { %"struct.Simd::Deletable", %"struct.Simd::ResParam" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ResParam" = type { i32, i32, i64, i64, i64, i64, i64, i64 }
%"struct.Simd::Array" = type { ptr, i64 }

@_ZTVN4Simd4Base19ResizerByteBilinearE = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base19ResizerByteBilinearC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64) %7, ptr noundef nonnull align 8 dereferenceable(56) %8)
  store ptr getelementptr inbounds inrange(-16, 24) ({ [5 x ptr] }, ptr @_ZTVN4Simd4Base19ResizerByteBilinearE, i32 0, i32 0, i32 2), ptr %7, align 8, !tbaa !9
  %9 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 1
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %10 unwind label %49

10:                                               ; preds = %2
  %11 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 2
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %11, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %12 unwind label %53

12:                                               ; preds = %10
  %13 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 3
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %13, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %14 unwind label %57

14:                                               ; preds = %12
  %15 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 4
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %15, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %16 unwind label %61

16:                                               ; preds = %14
  %17 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 5
  %18 = getelementptr inbounds [2 x %"struct.Simd::Array"], ptr %17, i32 0, i32 0
  %19 = getelementptr inbounds %"struct.Simd::Array", ptr %18, i64 2
  br label %20

20:                                               ; preds = %22, %16
  %21 = phi ptr [ %18, %16 ], [ %23, %22 ]
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %21, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %22 unwind label %65

22:                                               ; preds = %20
  %23 = getelementptr inbounds %"struct.Simd::Array", ptr %21, i64 1
  %24 = icmp eq ptr %23, %19
  br i1 %24, label %25, label %20

25:                                               ; preds = %22
  %26 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 3
  %27 = getelementptr inbounds %"class.Simd::Resizer", ptr %7, i32 0, i32 1
  %28 = getelementptr inbounds %"struct.Simd::ResParam", ptr %27, i32 0, i32 5
  %29 = load i64, ptr %28, align 8, !tbaa !11
  invoke void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %26, i64 noundef %29, i1 noundef zeroext false, i64 noundef 8)
          to label %30 unwind label %75

30:                                               ; preds = %25
  %31 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 4
  %32 = getelementptr inbounds %"class.Simd::Resizer", ptr %7, i32 0, i32 1
  %33 = getelementptr inbounds %"struct.Simd::ResParam", ptr %32, i32 0, i32 5
  %34 = load i64, ptr %33, align 8, !tbaa !11
  invoke void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %31, i64 noundef %34, i1 noundef zeroext false, i64 noundef 8)
          to label %35 unwind label %75

35:                                               ; preds = %30
  %36 = getelementptr inbounds %"class.Simd::Resizer", ptr %7, i32 0, i32 1
  %37 = getelementptr inbounds %"struct.Simd::ResParam", ptr %36, i32 0, i32 3
  %38 = load i64, ptr %37, align 8, !tbaa !18
  %39 = getelementptr inbounds %"class.Simd::Resizer", ptr %7, i32 0, i32 1
  %40 = getelementptr inbounds %"struct.Simd::ResParam", ptr %39, i32 0, i32 5
  %41 = load i64, ptr %40, align 8, !tbaa !11
  %42 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 4
  %43 = getelementptr inbounds %"struct.Simd::Array", ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %43, align 8, !tbaa !19
  %45 = getelementptr inbounds %"class.Simd::Base::ResizerByteBilinear", ptr %7, i32 0, i32 3
  %46 = getelementptr inbounds %"struct.Simd::Array", ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !22
  invoke void @_ZN4Simd4Base19ResizerByteBilinear18EstimateIndexAlphaEmmmPiS2_(ptr noundef nonnull align 8 dereferenceable(160) %7, i64 noundef %38, i64 noundef %41, i64 noundef 1, ptr noundef %44, ptr noundef %47)
          to label %48 unwind label %75

48:                                               ; preds = %35
  ret void

49:                                               ; preds = %2
  %50 = landingpad { ptr, i32 }
          cleanup
  %51 = extractvalue { ptr, i32 } %50, 0
  store ptr %51, ptr %5, align 8
  %52 = extractvalue { ptr, i32 } %50, 1
  store i32 %52, ptr %6, align 4
  br label %90

53:                                               ; preds = %10
  %54 = landingpad { ptr, i32 }
          cleanup
  %55 = extractvalue { ptr, i32 } %54, 0
  store ptr %55, ptr %5, align 8
  %56 = extractvalue { ptr, i32 } %54, 1
  store i32 %56, ptr %6, align 4
  br label %89

57:                                               ; preds = %12
  %58 = landingpad { ptr, i32 }
          cleanup
  %59 = extractvalue { ptr, i32 } %58, 0
  store ptr %59, ptr %5, align 8
  %60 = extractvalue { ptr, i32 } %58, 1
  store i32 %60, ptr %6, align 4
  br label %88

61:                                               ; preds = %14
  %62 = landingpad { ptr, i32 }
          cleanup
  %63 = extractvalue { ptr, i32 } %62, 0
  store ptr %63, ptr %5, align 8
  %64 = extractvalue { ptr, i32 } %62, 1
  store i32 %64, ptr %6, align 4
  br label %87

65:                                               ; preds = %20
  %66 = landingpad { ptr, i32 }
          cleanup
  %67 = extractvalue { ptr, i32 } %66, 0
  store ptr %67, ptr %5, align 8
  %68 = extractvalue { ptr, i32 } %66, 1
  store i32 %68, ptr %6, align 4
  %69 = icmp eq ptr %18, %21
  br i1 %69, label %74, label %70

70:                                               ; preds = %70, %65
  %71 = phi ptr [ %21, %65 ], [ %72, %70 ]
  %72 = getelementptr inbounds %"struct.Simd::Array", ptr %71, i64 -1
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %72) #4
  %73 = icmp eq ptr %72, %18
  br i1 %73, label %74, label %70

74:                                               ; preds = %70, %65
  br label %86

75:                                               ; preds = %35, %30, %25
  %76 = landingpad { ptr, i32 }
          cleanup
  %77 = extractvalue { ptr, i32 } %76, 0
  store ptr %77, ptr %5, align 8
  %78 = extractvalue { ptr, i32 } %76, 1
  store i32 %78, ptr %6, align 4
  %79 = getelementptr inbounds [2 x %"struct.Simd::Array"], ptr %17, i32 0, i32 0
  %80 = getelementptr inbounds %"struct.Simd::Array", ptr %79, i64 2
  br label %81

81:                                               ; preds = %81, %75
  %82 = phi ptr [ %80, %75 ], [ %83, %81 ]
  %83 = getelementptr inbounds %"struct.Simd::Array", ptr %82, i64 -1
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %83) #4
  %84 = icmp eq ptr %83, %79
  br i1 %84, label %85, label %81

85:                                               ; preds = %81
  br label %86

86:                                               ; preds = %85, %74
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %15) #4
  br label %87

87:                                               ; preds = %86, %61
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %13) #4
  br label %88

88:                                               ; preds = %87, %57
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #4
  br label %89

89:                                               ; preds = %88, %53
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %9) #4
  br label %90

90:                                               ; preds = %89, %49
  call void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %7) #4
  br label %91

91:                                               ; preds = %90
  %92 = load ptr, ptr %5, align 8
  %93 = load i32, ptr %6, align 4
  %94 = insertvalue { ptr, i32 } poison, ptr %92, 0
  %95 = insertvalue { ptr, i32 } %94, i32 %93, 1
  resume { ptr, i32 } %95
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base19ResizerByteBilinear18EstimateIndexAlphaEmmmPiS2_(ptr noundef nonnull align 8 dereferenceable(160), i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !17, i64 40}
!12 = !{!"_ZTSN4Simd7ResizerE", !13, i64 0, !14, i64 8}
!13 = !{!"_ZTSN4Simd9DeletableE"}
!14 = !{!"_ZTSN4Simd8ResParamE", !15, i64 0, !16, i64 4, !17, i64 8, !17, i64 16, !17, i64 24, !17, i64 32, !17, i64 40, !17, i64 48}
!15 = !{!"_ZTS21SimdResizeChannelType", !7, i64 0}
!16 = !{!"_ZTS20SimdResizeMethodType", !7, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!12, !17, i64 24}
!19 = !{!20, !6, i64 112}
!20 = !{!"_ZTSN4Simd4Base19ResizerByteBilinearE", !12, i64 0, !21, i64 64, !21, i64 80, !21, i64 96, !21, i64 112, !7, i64 128}
!21 = !{!"_ZTSN4Simd5ArrayIiEE", !6, i64 0, !17, i64 8}
!22 = !{!20, !6, i64 96}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4Simd4Base19ResizerByteBilinearE = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base19ResizerByteBilinearC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  store ptr getelementptr inbounds inrange(-16, 24) (i8, ptr @_ZTVN4Simd4Base19ResizerByteBilinearE, i64 16), ptr %0, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 64
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %3, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %4 unwind label %23

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 80
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %5, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %6 unwind label %25

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 96
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %7, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %8 unwind label %27

8:                                                ; preds = %6
  %9 = getelementptr inbounds i8, ptr %0, i64 112
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader27.preheader unwind label %29

.preheader27.preheader:                           ; preds = %8
  %.ptr.ptr = getelementptr inbounds i8, ptr %0, i64 128
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %.preheader27.1 unwind label %.thread

.thread:                                          ; preds = %.preheader27.preheader
  %10 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit

.preheader27.1:                                   ; preds = %.preheader27.preheader
  %.ptr.ptr.1 = getelementptr inbounds i8, ptr %0, i64 144
  invoke void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr.1, i64 noundef 0, i1 noundef zeroext false, i64 noundef 8)
          to label %11 unwind label %.preheader.preheader

11:                                               ; preds = %.preheader27.1
  %12 = getelementptr inbounds i8, ptr %0, i64 40
  %13 = load i64, ptr %12, align 8, !tbaa !8
  invoke void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %7, i64 noundef %13, i1 noundef zeroext false, i64 noundef 8)
          to label %14 unwind label %.loopexit.loopexit

14:                                               ; preds = %11
  %15 = load i64, ptr %12, align 8, !tbaa !8
  invoke void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef %15, i1 noundef zeroext false, i64 noundef 8)
          to label %16 unwind label %.loopexit.loopexit

16:                                               ; preds = %14
  %17 = getelementptr inbounds i8, ptr %0, i64 24
  %18 = load i64, ptr %17, align 8, !tbaa !16
  %19 = load i64, ptr %12, align 8, !tbaa !8
  %20 = load ptr, ptr %9, align 8, !tbaa !17
  %21 = load ptr, ptr %7, align 8, !tbaa !21
  invoke void @_ZN4Simd4Base19ResizerByteBilinear18EstimateIndexAlphaEmmmPiS2_(ptr noundef nonnull align 8 dereferenceable(160) %0, i64 noundef %18, i64 noundef %19, i64 noundef 1, ptr noundef %20, ptr noundef %21)
          to label %22 unwind label %.loopexit.loopexit

22:                                               ; preds = %16
  ret void

23:                                               ; preds = %2
  %24 = landingpad { ptr, i32 }
          cleanup
  br label %36

25:                                               ; preds = %4
  %26 = landingpad { ptr, i32 }
          cleanup
  br label %35

27:                                               ; preds = %6
  %28 = landingpad { ptr, i32 }
          cleanup
  br label %34

29:                                               ; preds = %8
  %30 = landingpad { ptr, i32 }
          cleanup
  br label %33

.preheader.preheader:                             ; preds = %.preheader27.1
  %31 = landingpad { ptr, i32 }
          cleanup
  %.ptr16 = getelementptr inbounds i8, ptr %0, i64 128
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %.ptr16) #4
  br label %.loopexit

.loopexit.loopexit:                               ; preds = %16, %14, %11
  %32 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr.1) #4
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %.ptr.ptr) #4
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader.preheader, %.thread, %.loopexit.loopexit
  %.pn = phi { ptr, i32 } [ %32, %.loopexit.loopexit ], [ %10, %.thread ], [ %31, %.preheader.preheader ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %9) #4
  br label %33

33:                                               ; preds = %.loopexit, %29
  %.pn.pn = phi { ptr, i32 } [ %.pn, %.loopexit ], [ %30, %29 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #4
  br label %34

34:                                               ; preds = %33, %27
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %33 ], [ %28, %27 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %5) #4
  br label %35

35:                                               ; preds = %34, %25
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %34 ], [ %26, %25 ]
  tail call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %3) #4
  br label %36

36:                                               ; preds = %35, %23
  %.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn, %35 ], [ %24, %23 ]
  tail call void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(64) %0) #4
  resume { ptr, i32 } %.pn.pn.pn.pn.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd7ResizerC2ERKNS_8ResParamE(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base19ResizerByteBilinear18EstimateIndexAlphaEmmmPiS2_(ptr noundef nonnull align 8 dereferenceable(160), i64 noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd9DeletableD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !15, i64 40}
!9 = !{!"_ZTSN4Simd7ResizerE", !10, i64 0, !11, i64 8}
!10 = !{!"_ZTSN4Simd9DeletableE"}
!11 = !{!"_ZTSN4Simd8ResParamE", !12, i64 0, !14, i64 4, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48}
!12 = !{!"_ZTS21SimdResizeChannelType", !13, i64 0}
!13 = !{!"omnipotent char", !7, i64 0}
!14 = !{!"_ZTS20SimdResizeMethodType", !13, i64 0}
!15 = !{!"long", !13, i64 0}
!16 = !{!9, !15, i64 24}
!17 = !{!18, !20, i64 112}
!18 = !{!"_ZTSN4Simd4Base19ResizerByteBilinearE", !9, i64 0, !19, i64 64, !19, i64 80, !19, i64 96, !19, i64 112, !13, i64 128}
!19 = !{!"_ZTSN4Simd5ArrayIiEE", !20, i64 0, !15, i64 8}
!20 = !{!"any pointer", !13, i64 0}
!21 = !{!18, !20, i64 96}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass