; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src (txe_queue_create)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }
%struct.TX_QUEUE_STRUCT = type { i64, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, ptr }

@_tx_thread_preempt_disable = external global i32, align 4
@_tx_queue_created_ptr = external global ptr, align 8
@_tx_queue_created_count = external global i64, align 8
@_tx_thread_current_ptr = external global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8
@_tx_thread_system_state = external global i64, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_queue_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i64 %4, ptr %11, align 8, !tbaa !11
  store i32 %5, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  store i32 0, ptr %14, align 4, !tbaa !9
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = icmp eq ptr %18, null
  br i1 %19, label %20, label %21

20:                                               ; preds = %6
  store i32 9, ptr %14, align 4, !tbaa !9
  br label %103

21:                                               ; preds = %6
  %22 = load i32, ptr %12, align 4, !tbaa !9
  %23 = zext i32 %22 to i64
  %24 = icmp ne i64 %23, 104
  br i1 %24, label %25, label %26

25:                                               ; preds = %21
  store i32 9, ptr %14, align 4, !tbaa !9
  br label %102

26:                                               ; preds = %21
  %27 = call i32 @__disable_interrupts()
  store i32 %27, ptr %13, align 4, !tbaa !9
  %28 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %29 = add i32 %28, 1
  store volatile i32 %29, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %30 = load i32, ptr %13, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %30)
  %31 = load ptr, ptr @_tx_queue_created_ptr, align 8, !tbaa !5
  store ptr %31, ptr %16, align 8, !tbaa !5
  store i64 0, ptr %15, align 8, !tbaa !11
  br label %32

32:                                               ; preds = %46, %26
  %33 = load i64, ptr %15, align 8, !tbaa !11
  %34 = load i64, ptr @_tx_queue_created_count, align 8, !tbaa !11
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %36, label %49

36:                                               ; preds = %32
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load ptr, ptr %16, align 8, !tbaa !5
  %39 = icmp eq ptr %37, %38
  br i1 %39, label %40, label %41

40:                                               ; preds = %36
  br label %49

41:                                               ; preds = %36
  %42 = load ptr, ptr %16, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.TX_QUEUE_STRUCT, ptr %42, i32 0, i32 12
  %44 = load ptr, ptr %43, align 8, !tbaa !13
  store ptr %44, ptr %16, align 8, !tbaa !5
  br label %45

45:                                               ; preds = %41
  br label %46

46:                                               ; preds = %45
  %47 = load i64, ptr %15, align 8, !tbaa !11
  %48 = add i64 %47, 1
  store i64 %48, ptr %15, align 8, !tbaa !11
  br label %32, !llvm.loop !15

49:                                               ; preds = %40, %32
  %50 = call i32 @__disable_interrupts()
  store i32 %50, ptr %13, align 4, !tbaa !9
  %51 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %52 = add i32 %51, -1
  store volatile i32 %52, ptr @_tx_thread_preempt_disable, align 4, !tbaa !9
  %53 = load i32, ptr %13, align 4, !tbaa !9
  call void @__restore_interrupt(i32 noundef %53)
  call void @_tx_thread_system_preempt_check()
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = load ptr, ptr %16, align 8, !tbaa !5
  %56 = icmp eq ptr %54, %55
  br i1 %56, label %57, label %58

57:                                               ; preds = %49
  store i32 9, ptr %14, align 4, !tbaa !9
  br label %101

58:                                               ; preds = %49
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = icmp eq ptr %59, null
  br i1 %60, label %61, label %62

61:                                               ; preds = %58
  store i32 3, ptr %14, align 4, !tbaa !9
  br label %100

62:                                               ; preds = %58
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = icmp ult i32 %63, 1
  br i1 %64, label %65, label %66

65:                                               ; preds = %62
  store i32 5, ptr %14, align 4, !tbaa !9
  br label %99

66:                                               ; preds = %62
  %67 = load i32, ptr %9, align 4, !tbaa !9
  %68 = icmp ugt i32 %67, 16
  br i1 %68, label %69, label %70

69:                                               ; preds = %66
  store i32 5, ptr %14, align 4, !tbaa !9
  br label %98

70:                                               ; preds = %66
  %71 = load i64, ptr %11, align 8, !tbaa !11
  %72 = udiv i64 %71, 8
  %73 = load i32, ptr %9, align 4, !tbaa !9
  %74 = zext i32 %73 to i64
  %75 = icmp ult i64 %72, %74
  br i1 %75, label %76, label %77

76:                                               ; preds = %70
  store i32 5, ptr %14, align 4, !tbaa !9
  br label %97

77:                                               ; preds = %70
  %78 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  store ptr %78, ptr %17, align 8, !tbaa !5
  %79 = load ptr, ptr %17, align 8, !tbaa !5
  %80 = icmp eq ptr %79, @_tx_timer_thread
  br i1 %80, label %81, label %82

81:                                               ; preds = %77
  store i32 19, ptr %14, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %81, %77
  %83 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !11
  %84 = call i32 @_tx_ipsr_get()
  %85 = zext i32 %84 to i64
  %86 = or i64 %83, %85
  %87 = icmp ne i64 %86, 0
  br i1 %87, label %88, label %96

88:                                               ; preds = %82
  %89 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !11
  %90 = call i32 @_tx_ipsr_get()
  %91 = zext i32 %90 to i64
  %92 = or i64 %89, %91
  %93 = icmp ult i64 %92, 4042322160
  br i1 %93, label %94, label %95

94:                                               ; preds = %88
  store i32 19, ptr %14, align 4, !tbaa !9
  br label %95

95:                                               ; preds = %94, %88
  br label %96

96:                                               ; preds = %95, %82
  br label %97

97:                                               ; preds = %96, %76
  br label %98

98:                                               ; preds = %97, %69
  br label %99

99:                                               ; preds = %98, %65
  br label %100

100:                                              ; preds = %99, %61
  br label %101

101:                                              ; preds = %100, %57
  br label %102

102:                                              ; preds = %101, %25
  br label %103

103:                                              ; preds = %102, %20
  %104 = load i32, ptr %14, align 4, !tbaa !9
  %105 = icmp eq i32 %104, 0
  br i1 %105, label %106, label %113

106:                                              ; preds = %103
  %107 = load ptr, ptr %7, align 8, !tbaa !5
  %108 = load ptr, ptr %8, align 8, !tbaa !5
  %109 = load i32, ptr %9, align 4, !tbaa !9
  %110 = load ptr, ptr %10, align 8, !tbaa !5
  %111 = load i64, ptr %11, align 8, !tbaa !11
  %112 = call i32 @_tx_queue_create(ptr noundef %107, ptr noundef %108, i32 noundef %109, ptr noundef %110, i64 noundef %111)
  store i32 %112, ptr %14, align 4, !tbaa !9
  br label %113

113:                                              ; preds = %106, %103
  %114 = load i32, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  ret i32 %114
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) #2

declare void @_tx_thread_system_preempt_check() #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() #2

declare i32 @_tx_queue_create(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 80}
!14 = !{!"TX_QUEUE_STRUCT", !12, i64 0, !6, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !10, i64 72, !6, i64 80, !6, i64 88, !6, i64 96}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_preempt_disable = external global i32, align 4
@_tx_queue_created_ptr = external local_unnamed_addr global ptr, align 8
@_tx_queue_created_count = external local_unnamed_addr global i64, align 8
@_tx_thread_current_ptr = external local_unnamed_addr global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8
@_tx_thread_system_state = external global i64, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_queue_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp ne ptr %0, null
  %.not = icmp eq i32 %5, 104
  %or.cond29 = and i1 %7, %.not
  br i1 %or.cond29, label %8, label %.thread

8:                                                ; preds = %6
  %9 = tail call i32 @__disable_interrupts()
  %10 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  %11 = add i32 %10, 1
  store volatile i32 %11, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  tail call void @__restore_interrupt(i32 noundef %9)
  %12 = load i64, ptr @_tx_queue_created_count, align 8, !tbaa !9
  %.036 = load ptr, ptr @_tx_queue_created_ptr, align 8, !tbaa !11
  %13 = icmp eq i64 %12, 0
  %14 = icmp eq ptr %.036, %0
  %or.cond37 = select i1 %13, i1 true, i1 %14
  br i1 %or.cond37, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %8, %.lr.ph
  %.039 = phi ptr [ %.0, %.lr.ph ], [ %.036, %8 ]
  %.02338 = phi i64 [ %16, %.lr.ph ], [ 0, %8 ]
  %15 = getelementptr inbounds i8, ptr %.039, i64 80
  %16 = add nuw i64 %.02338, 1
  %.0 = load ptr, ptr %15, align 8, !tbaa !11
  %17 = icmp uge i64 %16, %12
  %18 = icmp eq ptr %.0, %0
  %or.cond = select i1 %17, i1 true, i1 %18
  br i1 %or.cond, label %._crit_edge, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph, %8
  %.lcssa = phi i1 [ %14, %8 ], [ %18, %.lr.ph ]
  %19 = tail call i32 @__disable_interrupts()
  %20 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  %21 = add i32 %20, -1
  store volatile i32 %21, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  tail call void @__restore_interrupt(i32 noundef %19)
  tail call void @_tx_thread_system_preempt_check() #3
  br i1 %.lcssa, label %.thread, label %22

22:                                               ; preds = %._crit_edge
  %23 = icmp eq ptr %3, null
  br i1 %23, label %.thread, label %24

24:                                               ; preds = %22
  %25 = add i32 %2, -17
  %or.cond30 = icmp ult i32 %25, -16
  %26 = lshr i64 %4, 3
  %27 = zext nneg i32 %2 to i64
  %28 = icmp ult i64 %26, %27
  %or.cond33 = select i1 %or.cond30, i1 true, i1 %28
  br i1 %or.cond33, label %.thread, label %29

29:                                               ; preds = %24
  %30 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !11
  %.not35 = icmp eq ptr %30, @_tx_timer_thread
  %31 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %32 = tail call i32 @_tx_ipsr_get()
  %33 = zext i32 %32 to i64
  %34 = or i64 %31, %33
  %.not27 = icmp eq i64 %34, 0
  br i1 %.not27, label %42, label %35

35:                                               ; preds = %29
  %36 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %37 = tail call i32 @_tx_ipsr_get()
  %38 = zext i32 %37 to i64
  %39 = or i64 %36, %38
  %40 = icmp ult i64 %39, 4042322160
  %brmerge = select i1 %40, i1 true, i1 %.not35
  %41 = select i1 %40, i1 true, i1 %.not35
  %.mux = select i1 %41, i32 19, i32 0
  br i1 %brmerge, label %.thread, label %43

42:                                               ; preds = %29
  br i1 %.not35, label %.thread, label %43

43:                                               ; preds = %35, %42
  %44 = tail call i32 @_tx_queue_create(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %2, ptr noundef nonnull %3, i64 noundef %4) #3
  br label %.thread

.thread:                                          ; preds = %35, %24, %22, %._crit_edge, %6, %43, %42
  %.2 = phi i32 [ %44, %43 ], [ 19, %42 ], [ 5, %24 ], [ 3, %22 ], [ 9, %._crit_edge ], [ 9, %6 ], [ %.mux, %35 ]
  ret i32 %.2
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) local_unnamed_addr #1

declare void @_tx_thread_system_preempt_check() local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() local_unnamed_addr #1

declare i32 @_tx_queue_create(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass