; LLVM IR from libxsmm/libxsmm :: tests (atomics)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [48 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [65 x i8], align 1
@__PRETTY_FUNCTION__.main = external hidden unnamed_addr constant [15 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [48 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [40 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [45 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [45 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 64
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 64, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 1051981, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 25071975, ptr %5, align 4, !tbaa !5
  %9 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %9, ptr %6, align 4, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = atomicrmw or ptr %5, i32 0 seq_cst, align 4
  %12 = or i32 %11, 0
  %13 = icmp ne i32 %10, %12
  br i1 %13, label %14, label %15

14:                                               ; preds = %0
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %14, %0
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sub nsw i32 %17, 24019994
  store i32 %18, ptr %5, align 4, !tbaa !5
  %19 = icmp ne i32 %16, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %20, %15
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = atomicrmw add ptr %5, i32 24019994 seq_cst, align 4
  %24 = icmp ne i32 %22, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %21
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %25, %21
  br label %27

27:                                               ; preds = %26
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
  %28 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %28, ptr %6, align 4, !tbaa !5
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !10
  br label %29

29:                                               ; preds = %27
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = xor i32 %31, %32
  store i32 %33, ptr %5, align 4, !tbaa !5
  %34 = load i32, ptr %6, align 4, !tbaa !5
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = xor i32 %34, %35
  store i32 %36, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %5, align 4, !tbaa !5
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = xor i32 %37, %38
  store i32 %39, ptr %5, align 4, !tbaa !5
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = or i32 %41, %40
  store i32 %42, ptr %5, align 4, !tbaa !5
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = icmp ne i32 25071975, %43
  br i1 %44, label %45, label %46

45:                                               ; preds = %30
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %45, %30
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = or i32 25071975, %47
  %49 = load i32, ptr %5, align 4, !tbaa !5
  %50 = icmp ne i32 %48, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %46
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %51, %46
  %53 = load i32, ptr %2, align 64, !tbaa !5
  %54 = icmp eq i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %52
  store i32 1, ptr %2, align 64, !tbaa !5
  br label %57

56:                                               ; preds = %52
  br label %57

57:                                               ; preds = %56, %55
  %58 = phi i32 [ 1, %55 ], [ 0, %56 ]
  %59 = icmp eq i32 1, %58
  br i1 %59, label %60, label %79

60:                                               ; preds = %57
  %61 = atomicrmw or ptr %2, i32 1 seq_cst, align 64
  %62 = icmp eq i32 0, %61
  br i1 %62, label %63, label %64

63:                                               ; preds = %60
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %63, %60
  %65 = load i32, ptr %2, align 64, !tbaa !5
  %66 = icmp ne i32 0, %65
  br i1 %66, label %67, label %68

67:                                               ; preds = %64
  br label %69

68:                                               ; preds = %64
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 47, ptr noundef @__PRETTY_FUNCTION__.main) #5
  unreachable

69:                                               ; preds = %67
  store i32 0, ptr %2, align 64, !tbaa !5
  %70 = load i32, ptr %2, align 64, !tbaa !5
  %71 = icmp eq i32 0, %70
  br i1 %71, label %72, label %73

72:                                               ; preds = %69
  br label %74

73:                                               ; preds = %69
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 47, ptr noundef @__PRETTY_FUNCTION__.main) #5
  unreachable

74:                                               ; preds = %72
  %75 = load i32, ptr %2, align 64, !tbaa !5
  %76 = icmp ne i32 0, %75
  br i1 %76, label %77, label %78

77:                                               ; preds = %74
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %77, %74
  br label %80

79:                                               ; preds = %57
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %79, %78
  %81 = ptrtoint ptr %2 to i64
  %82 = and i64 %81, 3
  %83 = icmp eq i64 0, %82
  br i1 %83, label %84, label %85

84:                                               ; preds = %80
  br label %86

85:                                               ; preds = %80
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 54, ptr noundef @__PRETTY_FUNCTION__.main) #5
  unreachable

86:                                               ; preds = %84
  br label %87

87:                                               ; preds = %117, %86
  %88 = atomicrmw or ptr %2, i32 1 seq_cst, align 64
  %89 = icmp eq i32 0, %88
  %90 = xor i1 %89, true
  br i1 %90, label %91, label %118

91:                                               ; preds = %87
  br label %92

92:                                               ; preds = %91
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %111, %92
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %94

94:                                               ; preds = %99, %93
  %95 = load i32, ptr %8, align 4, !tbaa !5
  %96 = load i32, ptr %7, align 4, !tbaa !5
  %97 = icmp slt i32 %95, %96
  br i1 %97, label %98, label %102

98:                                               ; preds = %94
  call void @llvm.x86.sse2.pause()
  br label %99

99:                                               ; preds = %98
  %100 = load i32, ptr %8, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %8, align 4, !tbaa !5
  br label %94, !llvm.loop !11

102:                                              ; preds = %94
  %103 = load i32, ptr %7, align 4, !tbaa !5
  %104 = icmp slt i32 %103, 4096
  br i1 %104, label %105, label %108

105:                                              ; preds = %102
  %106 = load i32, ptr %7, align 4, !tbaa !5
  %107 = mul nsw i32 %106, 2
  store i32 %107, ptr %7, align 4, !tbaa !5
  br label %110

108:                                              ; preds = %102
  store i32 4096, ptr %7, align 4, !tbaa !5
  %109 = call i32 @sched_yield() #3
  br label %110

110:                                              ; preds = %108, %105
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %111

111:                                              ; preds = %110
  %112 = load i32, ptr %2, align 64, !tbaa !5
  %113 = and i32 %112, 1
  %114 = icmp ne i32 0, %113
  br i1 %114, label %93, label %115, !llvm.loop !13

115:                                              ; preds = %111
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %116

116:                                              ; preds = %115
  br label %117

117:                                              ; preds = %116
  br label %87, !llvm.loop !14

118:                                              ; preds = %87
  %119 = load i32, ptr %2, align 64, !tbaa !5
  %120 = icmp ne i32 0, %119
  br i1 %120, label %121, label %122

121:                                              ; preds = %118
  br label %123

122:                                              ; preds = %118
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.1, i32 noundef 54, ptr noundef @__PRETTY_FUNCTION__.main) #5
  unreachable

123:                                              ; preds = %121
  %124 = load i32, ptr %2, align 64, !tbaa !5
  %125 = icmp eq i32 0, %124
  br i1 %125, label %126, label %127

126:                                              ; preds = %123
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %127

127:                                              ; preds = %126, %123
  %128 = atomicrmw or ptr %2, i32 1 seq_cst, align 64
  %129 = icmp eq i32 0, %128
  br i1 %129, label %130, label %131

130:                                              ; preds = %127
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %131

131:                                              ; preds = %130, %127
  %132 = atomicrmw or ptr %2, i32 1 seq_cst, align 64
  %133 = icmp eq i32 0, %132
  br i1 %133, label %134, label %135

134:                                              ; preds = %131
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %135

135:                                              ; preds = %134, %131
  %136 = load i32, ptr %2, align 64, !tbaa !5
  %137 = icmp eq i32 0, %136
  br i1 %137, label %138, label %139

138:                                              ; preds = %135
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %139

139:                                              ; preds = %138, %135
  %140 = load i32, ptr %2, align 64, !tbaa !5
  %141 = icmp ne i32 0, %140
  br i1 %141, label %142, label %143

142:                                              ; preds = %139
  br label %144

143:                                              ; preds = %139
  call void @__assert_fail(ptr noundef @.str.5, ptr noundef @.str.1, i32 noundef 63, ptr noundef @__PRETTY_FUNCTION__.main) #5
  unreachable

144:                                              ; preds = %142
  store atomic i32 0, ptr %2 release, align 64
  %145 = load i32, ptr %2, align 64, !tbaa !5
  %146 = icmp ne i32 0, %145
  br i1 %146, label %147, label %148

147:                                              ; preds = %144
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %148

148:                                              ; preds = %147, %144
  %149 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  ret i32 %149
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nounwind
declare void @llvm.x86.sse2.pause() #3

; Function Attrs: nounwind
declare i32 @sched_yield() #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2168084445}
!10 = !{i64 2168084522}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [48 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [65 x i8], align 1
@__PRETTY_FUNCTION__.main = external hidden unnamed_addr constant [15 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [45 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [45 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 64
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
  store i32 0, ptr %1, align 64, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  store i32 25071975, ptr %2, align 4, !tbaa !5
  %3 = atomicrmw or ptr %2, i32 0 seq_cst, align 4
  %4 = load i32, ptr %2, align 4, !tbaa !5
  %5 = add nsw i32 %4, -24019994
  store i32 %5, ptr %2, align 4, !tbaa !5
  %6 = atomicrmw add ptr %2, i32 24019994 seq_cst, align 4
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !10
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = or i32 %7, 1051981
  store i32 %8, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr %1, align 64, !tbaa !5
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %11, label %.critedge

11:                                               ; preds = %0
  store i32 1, ptr %1, align 64, !tbaa !5
  %12 = atomicrmw or ptr %1, i32 1 seq_cst, align 64
  %13 = load i32, ptr %1, align 64, !tbaa !5
  %.not23 = icmp eq i32 %13, 0
  br i1 %.not23, label %14, label %15

14:                                               ; preds = %11
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 47, ptr noundef nonnull @__PRETTY_FUNCTION__.main) #5
  unreachable

15:                                               ; preds = %11
  %16 = icmp eq i32 %12, 0
  %.not = icmp ne i32 %3, 25071975
  %.not19 = icmp ne i32 %5, 1051981
  %.not20 = icmp ne i32 %6, 1051981
  %.not21 = icmp ne i32 %7, 25071975
  %17 = select i1 %16, i1 true, i1 %.not21
  %18 = select i1 %17, i1 true, i1 %.not20
  %19 = select i1 %18, i1 true, i1 %.not19
  %narrow = select i1 %19, i1 true, i1 %.not
  %spec.select28 = zext i1 %narrow to i32
  store i32 0, ptr %1, align 64, !tbaa !5
  br label %.critedge

.critedge:                                        ; preds = %0, %15
  %.6 = phi i32 [ %spec.select28, %15 ], [ 1, %0 ]
  %20 = atomicrmw or ptr %1, i32 1 seq_cst, align 64
  %.not2433 = icmp eq i32 %20, 0
  br i1 %.not2433, label %._crit_edge34, label %.preheader

.preheader:                                       ; preds = %.critedge, %.preheader.split.us
  %21 = load i32, ptr %1, align 64
  %.fr35 = freeze i32 %21
  %22 = and i32 %.fr35, 1
  %.not27 = icmp eq i32 %22, 0
  br i1 %.not27, label %.preheader.split.us, label %.preheader.split, !llvm.loop !11

.preheader.split.us:                              ; preds = %.preheader
  call void @llvm.x86.sse2.pause()
  %23 = atomicrmw or ptr %1, i32 1 seq_cst, align 64
  %.not24 = icmp eq i32 %23, 0
  br i1 %.not24, label %._crit_edge34, label %.preheader, !llvm.loop !13

.preheader.split:                                 ; preds = %.preheader, %.preheader.split.backedge
  %.016 = phi i32 [ %.016.be, %.preheader.split.backedge ], [ 1, %.preheader ]
  %24 = icmp sgt i32 %.016, 0
  br i1 %24, label %.lr.ph.preheader, label %._crit_edge.thread

.lr.ph.preheader:                                 ; preds = %.preheader.split
  %xtraiter = and i32 %.016, 7
  %25 = icmp ult i32 %.016, 8
  br i1 %25, label %._crit_edge.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %.016, 2147483640
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.7, %.lr.ph ]
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  call void @llvm.x86.sse2.pause()
  %niter.next.7 = add i32 %niter, 8
  %niter.ncmp.7 = icmp eq i32 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.unr-lcssa, label %.lr.ph, !llvm.loop !14

._crit_edge.unr-lcssa:                            ; preds = %.lr.ph, %.lr.ph.preheader
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.unr-lcssa, %.lr.ph.epil
  %epil.iter = phi i32 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.unr-lcssa ]
  call void @llvm.x86.sse2.pause()
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.unr-lcssa
  %26 = icmp slt i32 %.016, 4096
  br i1 %26, label %._crit_edge.thread, label %28

._crit_edge.thread:                               ; preds = %.preheader.split, %._crit_edge
  %27 = shl i32 %.016, 1
  br label %.preheader.split.backedge

28:                                               ; preds = %._crit_edge
  %29 = call i32 @sched_yield() #3
  br label %.preheader.split.backedge

.preheader.split.backedge:                        ; preds = %28, %._crit_edge.thread
  %.016.be = phi i32 [ %27, %._crit_edge.thread ], [ 4096, %28 ]
  br label %.preheader.split

._crit_edge34:                                    ; preds = %.preheader.split.us, %.critedge
  %30 = load i32, ptr %1, align 64, !tbaa !5
  %.not25 = icmp eq i32 %30, 0
  br i1 %.not25, label %31, label %32

31:                                               ; preds = %._crit_edge34
  call void @__assert_fail(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.1, i32 noundef 54, ptr noundef nonnull @__PRETTY_FUNCTION__.main) #5
  unreachable

32:                                               ; preds = %._crit_edge34
  %33 = atomicrmw or ptr %1, i32 1 seq_cst, align 64
  %34 = atomicrmw or ptr %1, i32 1 seq_cst, align 64
  %35 = load i32, ptr %1, align 64, !tbaa !5
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %32
  call void @__assert_fail(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.1, i32 noundef 63, ptr noundef nonnull @__PRETTY_FUNCTION__.main) #5
  unreachable

38:                                               ; preds = %32
  %39 = icmp eq i32 %34, 0
  %40 = icmp eq i32 %33, 0
  %41 = select i1 %39, i1 true, i1 %40
  %.9 = select i1 %41, i32 1, i32 %.6
  store atomic i32 0, ptr %1 release, align 64
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
  ret i32 %.9
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare void @llvm.x86.sse2.pause() #3

; Function Attrs: nounwind
declare i32 @sched_yield() local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2168084445}
!10 = !{i64 2168084522}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass