; LLVM IR from cryspen/libcrux :: sys/hacl/c/src/msvc (Hacl_RSAPSS)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [70 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @Hacl_RSAPSS_rsapss_sign(i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @Hacl_RSAPSS_rsapss_skey_sign(i8 noundef zeroext %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, ptr noundef %10, ptr noundef %11) #0 {
  %13 = alloca i1, align 1
  %14 = alloca i8, align 1
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  %26 = alloca ptr, align 8
  %27 = alloca i8, align 1
  %28 = alloca i32, align 4
  store i8 %0, ptr %14, align 1, !tbaa !5
  store i32 %1, ptr %15, align 4, !tbaa !8
  store i32 %2, ptr %16, align 4, !tbaa !8
  store i32 %3, ptr %17, align 4, !tbaa !8
  store ptr %4, ptr %18, align 8, !tbaa !10
  store ptr %5, ptr %19, align 8, !tbaa !10
  store ptr %6, ptr %20, align 8, !tbaa !10
  store i32 %7, ptr %21, align 4, !tbaa !8
  store ptr %8, ptr %22, align 8, !tbaa !10
  store i32 %9, ptr %23, align 4, !tbaa !8
  store ptr %10, ptr %24, align 8, !tbaa !10
  store ptr %11, ptr %25, align 8, !tbaa !10
  br label %29

29:                                               ; preds = %12
  %30 = load i32, ptr %15, align 4, !tbaa !8
  %31 = sub i32 %30, 1
  %32 = udiv i32 %31, 64
  %33 = add i32 %32, 1
  %34 = mul i32 2, %33
  %35 = load i32, ptr %16, align 4, !tbaa !8
  %36 = sub i32 %35, 1
  %37 = udiv i32 %36, 64
  %38 = add i32 %34, %37
  %39 = add i32 %38, 1
  %40 = load i32, ptr %17, align 4, !tbaa !8
  %41 = sub i32 %40, 1
  %42 = udiv i32 %41, 64
  %43 = add i32 %39, %42
  %44 = add i32 %43, 1
  %45 = zext i32 %44 to i64
  %46 = icmp ugt i64 %45, 2305843009213693951
  br i1 %46, label %47, label %49

47:                                               ; preds = %29
  %48 = call i32 (ptr, ...) @printf(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 805)
  call void @exit(i32 noundef 253) #6
  unreachable

49:                                               ; preds = %29
  br label %50

50:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #7
  %51 = load i32, ptr %15, align 4, !tbaa !8
  %52 = sub i32 %51, 1
  %53 = udiv i32 %52, 64
  %54 = add i32 %53, 1
  %55 = mul i32 2, %54
  %56 = load i32, ptr %16, align 4, !tbaa !8
  %57 = sub i32 %56, 1
  %58 = udiv i32 %57, 64
  %59 = add i32 %55, %58
  %60 = add i32 %59, 1
  %61 = load i32, ptr %17, align 4, !tbaa !8
  %62 = sub i32 %61, 1
  %63 = udiv i32 %62, 64
  %64 = add i32 %60, %63
  %65 = add i32 %64, 1
  %66 = zext i32 %65 to i64
  %67 = mul i64 %66, 8
  %68 = alloca i8, i64 %67, align 16
  store ptr %68, ptr %26, align 8, !tbaa !10
  %69 = load ptr, ptr %26, align 8, !tbaa !10
  %70 = load i32, ptr %15, align 4, !tbaa !8
  %71 = sub i32 %70, 1
  %72 = udiv i32 %71, 64
  %73 = add i32 %72, 1
  %74 = mul i32 2, %73
  %75 = load i32, ptr %16, align 4, !tbaa !8
  %76 = sub i32 %75, 1
  %77 = udiv i32 %76, 64
  %78 = add i32 %74, %77
  %79 = add i32 %78, 1
  %80 = load i32, ptr %17, align 4, !tbaa !8
  %81 = sub i32 %80, 1
  %82 = udiv i32 %81, 64
  %83 = add i32 %79, %82
  %84 = add i32 %83, 1
  %85 = zext i32 %84 to i64
  %86 = mul i64 %85, 8
  call void @llvm.memset.p0.i64(ptr align 8 %69, i8 0, i64 %86, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %27) #7
  %87 = load i32, ptr %15, align 4, !tbaa !8
  %88 = load i32, ptr %16, align 4, !tbaa !8
  %89 = load i32, ptr %17, align 4, !tbaa !8
  %90 = load ptr, ptr %18, align 8, !tbaa !10
  %91 = load ptr, ptr %19, align 8, !tbaa !10
  %92 = load ptr, ptr %20, align 8, !tbaa !10
  %93 = load ptr, ptr %26, align 8, !tbaa !10
  %94 = call zeroext i1 @load_skey(i32 noundef %87, i32 noundef %88, i32 noundef %89, ptr noundef %90, ptr noundef %91, ptr noundef %92, ptr noundef %93)
  %95 = zext i1 %94 to i8
  store i8 %95, ptr %27, align 1, !tbaa !12
  %96 = load i8, ptr %27, align 1, !tbaa !12, !range !14, !noundef !15
  %97 = trunc i8 %96 to i1
  br i1 %97, label %98, label %110

98:                                               ; preds = %50
  %99 = load i8, ptr %14, align 1, !tbaa !5
  %100 = load i32, ptr %15, align 4, !tbaa !8
  %101 = load i32, ptr %16, align 4, !tbaa !8
  %102 = load i32, ptr %17, align 4, !tbaa !8
  %103 = load ptr, ptr %26, align 8, !tbaa !10
  %104 = load i32, ptr %21, align 4, !tbaa !8
  %105 = load ptr, ptr %22, align 8, !tbaa !10
  %106 = load i32, ptr %23, align 4, !tbaa !8
  %107 = load ptr, ptr %24, align 8, !tbaa !10
  %108 = load ptr, ptr %25, align 8, !tbaa !10
  %109 = call zeroext i1 @Hacl_RSAPSS_rsapss_sign(i8 noundef zeroext %99, i32 noundef %100, i32 noundef %101, i32 noundef %102, ptr noundef %103, i32 noundef %104, ptr noundef %105, i32 noundef %106, ptr noundef %107, ptr noundef %108)
  store i1 %109, ptr %13, align 1
  store i32 1, ptr %28, align 4
  br label %111

110:                                              ; preds = %50
  store i1 false, ptr %13, align 1
  store i32 1, ptr %28, align 4
  br label %111

111:                                              ; preds = %110, %98
  call void @llvm.lifetime.end.p0(i64 1, ptr %27) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #7
  %112 = load i1, ptr %13, align 1
  ret i1 %112
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @load_skey(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_Bool", !6, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @Hacl_RSAPSS_rsapss_sign(i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @Hacl_RSAPSS_rsapss_skey_sign(i8 noundef zeroext %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, i32 noundef %9, ptr noundef %10, ptr noundef %11) local_unnamed_addr #0 {
  %13 = add i32 %1, -1
  %14 = lshr i32 %13, 5
  %15 = and i32 %14, 134217726
  %16 = add i32 %2, -1
  %17 = lshr i32 %16, 6
  %18 = add i32 %3, -1
  %19 = lshr i32 %18, 6
  %20 = add nuw nsw i32 %15, 4
  %21 = add nuw nsw i32 %20, %17
  %22 = add nuw nsw i32 %21, %19
  %23 = zext nneg i32 %22 to i64
  %24 = shl nuw nsw i64 %23, 3
  %25 = alloca i8, i64 %24, align 16
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(1) %25, i8 0, i64 %24, i1 false)
  %26 = call zeroext i1 @load_skey(i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef nonnull %25)
  br i1 %26, label %27, label %29

27:                                               ; preds = %12
  %28 = call zeroext i1 @Hacl_RSAPSS_rsapss_sign(i8 noundef zeroext %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull %25, i32 noundef %7, ptr noundef %8, i32 noundef %9, ptr noundef %10, ptr noundef %11)
  br label %29

29:                                               ; preds = %12, %27
  %.0 = phi i1 [ %28, %27 ], [ false, %12 ]
  ret i1 %.0
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @load_skey(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass