; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetInnerProduct32f)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::InnerProductParam32f" = type { i64, i64, i64, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4Simd4Base24SynetInnerProduct32fProd10PreferableERKNS_20InnerProductParam32fE(ptr noundef nonnull align 8 dereferenceable(32) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds %"struct.Simd::InnerProductParam32f", ptr %3, i32 0, i32 4
  %5 = load i32, ptr %4, align 4, !tbaa !9
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %28

7:                                                ; preds = %1
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = getelementptr inbounds %"struct.Simd::InnerProductParam32f", ptr %8, i32 0, i32 0
  %10 = load i64, ptr %9, align 8, !tbaa !14
  %11 = icmp eq i64 %10, 1
  br i1 %11, label %12, label %28

12:                                               ; preds = %7
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = getelementptr inbounds %"struct.Simd::InnerProductParam32f", ptr %13, i32 0, i32 2
  %15 = load i64, ptr %14, align 8, !tbaa !15
  %16 = icmp uge i64 %15, 4
  br i1 %16, label %17, label %28

17:                                               ; preds = %12
  %18 = call noundef i64 @_ZN4Simd4Base10AlgCacheL3Ev()
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %"struct.Simd::InnerProductParam32f", ptr %19, i32 0, i32 1
  %21 = load i64, ptr %20, align 8, !tbaa !16
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = getelementptr inbounds %"struct.Simd::InnerProductParam32f", ptr %22, i32 0, i32 2
  %24 = load i64, ptr %23, align 8, !tbaa !15
  %25 = mul i64 %21, %24
  %26 = mul i64 %25, 4
  %27 = icmp ugt i64 %18, %26
  br label %28

28:                                               ; preds = %17, %12, %7, %1
  %29 = phi i1 [ false, %12 ], [ false, %7 ], [ false, %1 ], [ %27, %17 ]
  ret i1 %29
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd4Base10AlgCacheL3Ev() #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 28}
!10 = !{!"_ZTSN4Simd20InnerProductParam32fE", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 28}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS8SimdBool", !7, i64 0}
!13 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!14 = !{!10, !11, i64 0}
!15 = !{!10, !11, i64 16}
!16 = !{!10, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN4Simd4Base24SynetInnerProduct32fProd10PreferableERKNS_20InnerProductParam32fE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 28
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = icmp eq i32 %3, 0
  %5 = load i64, ptr %0, align 8
  %6 = icmp eq i64 %5, 1
  %or.cond = select i1 %4, i1 %6, i1 false
  br i1 %or.cond, label %7, label %19

7:                                                ; preds = %1
  %8 = getelementptr inbounds i8, ptr %0, i64 16
  %9 = load i64, ptr %8, align 8, !tbaa !12
  %10 = icmp ugt i64 %9, 3
  br i1 %10, label %11, label %19

11:                                               ; preds = %7
  %12 = tail call noundef i64 @_ZN4Simd4Base10AlgCacheL3Ev()
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  %14 = load i64, ptr %13, align 8, !tbaa !13
  %15 = load i64, ptr %8, align 8, !tbaa !12
  %16 = shl i64 %14, 2
  %17 = mul i64 %16, %15
  %18 = icmp ugt i64 %12, %17
  br label %19

19:                                               ; preds = %11, %7, %1
  %20 = phi i1 [ false, %7 ], [ false, %1 ], [ %18, %11 ]
  ret i1 %20
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd4Base10AlgCacheL3Ev() local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 28}
!6 = !{!"_ZTSN4Simd20InnerProductParam32fE", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS8SimdBool", !8, i64 0}
!11 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass