; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::MergConvParam" = type <{ [3 x %"struct.Simd::ConvParam"], i64, i32, [4 x i8] }>
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base29SynetMergedConvolution16bInitEmPK25SimdConvolutionParametersm8SimdBool(i64 noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3) #1 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca %"struct.Simd::MergConvParam", align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store i64 %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 568, ptr %10) #4
  %14 = load i64, ptr %6, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !9
  %16 = load i64, ptr %8, align 8, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !11
  call void @_ZN4Simd13MergConvParamC2EmPK25SimdConvolutionParametersm8SimdBool26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(564) %10, i64 noundef %14, ptr noundef %15, i64 noundef %16, i32 noundef %17, i32 noundef 0)
  %18 = call noundef zeroext i1 @_ZN4Simd13MergConvParam5ValidE18SimdTensorDataTypeS1_(ptr noundef nonnull align 8 dereferenceable(564) %10, i32 noundef 0, i32 noundef 7)
  br i1 %18, label %20, label %19

19:                                               ; preds = %4
  store ptr null, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %27

20:                                               ; preds = %4
  %21 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 1024) #5
  invoke void @_ZN4Simd4Base25SynetMergedConvolution16bC1ERKNS_13MergConvParamE(ptr noundef nonnull align 8 dereferenceable(1024) %21, ptr noundef nonnull align 8 dereferenceable(564) %10)
          to label %22 unwind label %23

22:                                               ; preds = %20
  store ptr %21, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %27

23:                                               ; preds = %20
  %24 = landingpad { ptr, i32 }
          cleanup
  %25 = extractvalue { ptr, i32 } %24, 0
  store ptr %25, ptr %12, align 8
  %26 = extractvalue { ptr, i32 } %24, 1
  store i32 %26, ptr %13, align 4
  call void @_ZdlPvm(ptr noundef %21, i64 noundef 1024) #6
  call void @llvm.lifetime.end.p0(i64 568, ptr %10) #4
  br label %29

27:                                               ; preds = %22, %19
  call void @llvm.lifetime.end.p0(i64 568, ptr %10) #4
  %28 = load ptr, ptr %5, align 8
  ret ptr %28

29:                                               ; preds = %23
  %30 = load ptr, ptr %12, align 8
  %31 = load i32, ptr %13, align 4
  %32 = insertvalue { ptr, i32 } poison, ptr %30, 0
  %33 = insertvalue { ptr, i32 } %32, i32 %31, 1
  resume { ptr, i32 } %33
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd13MergConvParamC2EmPK25SimdConvolutionParametersm8SimdBool26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(564), i64 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd13MergConvParam5ValidE18SimdTensorDataTypeS1_(ptr noundef nonnull align 8 dereferenceable(564), i32 noundef, i32 noundef) #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

declare void @_ZN4Simd4Base25SynetMergedConvolution16bC1ERKNS_13MergConvParamE(ptr, ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS8SimdBool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::MergConvParam" = type <{ [3 x %"struct.Simd::ConvParam"], i64, i32, [4 x i8] }>
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN4Simd4Base29SynetMergedConvolution16bInitEmPK25SimdConvolutionParametersm8SimdBool(i64 noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"struct.Simd::MergConvParam", align 8
  call void @llvm.lifetime.start.p0(i64 568, ptr nonnull %5) #4
  call void @_ZN4Simd13MergConvParamC2EmPK25SimdConvolutionParametersm8SimdBool26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(564) %5, i64 noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef 0)
  %6 = call noundef zeroext i1 @_ZN4Simd13MergConvParam5ValidE18SimdTensorDataTypeS1_(ptr noundef nonnull align 8 dereferenceable(564) %5, i32 noundef 0, i32 noundef 7)
  br i1 %6, label %7, label %11

7:                                                ; preds = %4
  %8 = call noalias noundef nonnull dereferenceable(1024) ptr @_Znwm(i64 noundef 1024) #5
  invoke void @_ZN4Simd4Base25SynetMergedConvolution16bC1ERKNS_13MergConvParamE(ptr noundef nonnull align 8 dereferenceable(1024) %8, ptr noundef nonnull align 8 dereferenceable(564) %5)
          to label %11 unwind label %9

9:                                                ; preds = %7
  %10 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %8, i64 noundef 1024) #6
  call void @llvm.lifetime.end.p0(i64 568, ptr nonnull %5) #4
  resume { ptr, i32 } %10

11:                                               ; preds = %7, %4
  %.0 = phi ptr [ null, %4 ], [ %8, %7 ]
  call void @llvm.lifetime.end.p0(i64 568, ptr nonnull %5) #4
  ret ptr %.0
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd13MergConvParamC2EmPK25SimdConvolutionParametersm8SimdBool26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(564), i64 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd13MergConvParam5ValidE18SimdTensorDataTypeS1_(ptr noundef nonnull align 8 dereferenceable(564), i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare void @_ZN4Simd4Base25SynetMergedConvolution16bC1ERKNS_13MergConvParamE(ptr, ptr) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass