; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetScale.ll (ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetScale8i" = type { %"struct.Simd::Deletable", %"struct.Simd::CvtParam", %"struct.Simd::CvtParam", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Base::Scale8iParam" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Base::Scale8iParam" = type { i64, i64, i64, i32, i32, i32, i32 }

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_ = external hidden unnamed_addr constant [93 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100)) #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_(ptr noundef nonnull align 8 dereferenceable(288) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #4 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %15 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #8
  %16 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 5
  store ptr %16, ptr %9, align 8, !tbaa !5
  %17 = load ptr, ptr %8, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %46

19:                                               ; preds = %4
  %20 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 1
  %21 = load ptr, ptr %8, align 8, !tbaa !5
  %22 = getelementptr inbounds ptr, ptr %21, i64 0
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = load ptr, ptr %8, align 8, !tbaa !5
  %25 = getelementptr inbounds ptr, ptr %24, i64 1
  %26 = load ptr, ptr %25, align 8, !tbaa !5
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %27, i32 0, i32 1
  %29 = load i64, ptr %28, align 8, !tbaa !9
  %30 = load ptr, ptr %9, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %30, i32 0, i32 6
  %32 = load i32, ptr %31, align 4, !tbaa !15
  call void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100) %20, ptr noundef %23, ptr noundef %26, i64 noundef %29, i32 noundef %32)
  %33 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 2
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = getelementptr inbounds ptr, ptr %34, i64 2
  %36 = load ptr, ptr %35, align 8, !tbaa !5
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = getelementptr inbounds ptr, ptr %37, i64 3
  %39 = load ptr, ptr %38, align 8, !tbaa !5
  %40 = load ptr, ptr %9, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %40, i32 0, i32 1
  %42 = load i64, ptr %41, align 8, !tbaa !9
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %43, i32 0, i32 6
  %45 = load i32, ptr %44, align 4, !tbaa !15
  call void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100) %33, ptr noundef %36, ptr noundef %39, i64 noundef %42, i32 noundef %45)
  br label %60

46:                                               ; preds = %4
  %47 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 1
  %48 = call noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100) %47)
  %49 = icmp ne i64 %48, 0
  br i1 %49, label %50, label %54

50:                                               ; preds = %46
  %51 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 2
  %52 = call noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100) %51)
  %53 = icmp ne i64 %52, 0
  br label %54

54:                                               ; preds = %50, %46
  %55 = phi i1 [ false, %46 ], [ %53, %50 ]
  br i1 %55, label %56, label %57

56:                                               ; preds = %54
  br label %59

57:                                               ; preds = %54
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 150, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_) #9
  unreachable

58:                                               ; No predecessors!
  br label %59

59:                                               ; preds = %58, %56
  br label %60

60:                                               ; preds = %59, %19
  %61 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %62 = load ptr, ptr %9, align 8, !tbaa !5
  %63 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %62, i32 0, i32 1
  %64 = load i64, ptr %63, align 8, !tbaa !9
  call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %61, i64 noundef %64, i1 noundef zeroext false, i64 noundef 8)
  %65 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %66 = load ptr, ptr %9, align 8, !tbaa !5
  %67 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %66, i32 0, i32 1
  %68 = load i64, ptr %67, align 8, !tbaa !9
  call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %65, i64 noundef %68, i1 noundef zeroext false, i64 noundef 8)
  %69 = load ptr, ptr %9, align 8, !tbaa !5
  %70 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %69, i32 0, i32 3
  %71 = load i32, ptr %70, align 8, !tbaa !16
  %72 = icmp eq i32 %71, 3
  br i1 %72, label %73, label %102

73:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #8
  store i64 0, ptr %10, align 8, !tbaa !17
  br label %74

74:                                               ; preds = %98, %73
  %75 = load i64, ptr %10, align 8, !tbaa !17
  %76 = load ptr, ptr %9, align 8, !tbaa !5
  %77 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %76, i32 0, i32 1
  %78 = load i64, ptr %77, align 8, !tbaa !9
  %79 = icmp ult i64 %75, %78
  br i1 %79, label %81, label %80

80:                                               ; preds = %74
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #8
  br label %101

81:                                               ; preds = %74
  %82 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 1
  %83 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %82, i32 0, i32 3
  %84 = load i64, ptr %10, align 8, !tbaa !17
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %83, i64 noundef %84)
  %86 = load float, ptr %85, align 4, !tbaa !18
  %87 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %88 = load i64, ptr %10, align 8, !tbaa !17
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %87, i64 noundef %88)
  store float %86, ptr %89, align 4, !tbaa !18
  %90 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 1
  %91 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %90, i32 0, i32 4
  %92 = load i64, ptr %10, align 8, !tbaa !17
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %91, i64 noundef %92)
  %94 = load float, ptr %93, align 4, !tbaa !18
  %95 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %96 = load i64, ptr %10, align 8, !tbaa !17
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %95, i64 noundef %96)
  store float %94, ptr %97, align 4, !tbaa !18
  br label %98

98:                                               ; preds = %81
  %99 = load i64, ptr %10, align 8, !tbaa !17
  %100 = add i64 %99, 1
  store i64 %100, ptr %10, align 8, !tbaa !17
  br label %74, !llvm.loop !20

101:                                              ; preds = %80
  br label %121

102:                                              ; preds = %60
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #8
  store i64 0, ptr %11, align 8, !tbaa !17
  br label %103

103:                                              ; preds = %117, %102
  %104 = load i64, ptr %11, align 8, !tbaa !17
  %105 = load ptr, ptr %9, align 8, !tbaa !5
  %106 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %105, i32 0, i32 1
  %107 = load i64, ptr %106, align 8, !tbaa !9
  %108 = icmp ult i64 %104, %107
  br i1 %108, label %110, label %109

109:                                              ; preds = %103
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  br label %120

110:                                              ; preds = %103
  %111 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %112 = load i64, ptr %11, align 8, !tbaa !17
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %111, i64 noundef %112)
  store float 1.000000e+00, ptr %113, align 4, !tbaa !18
  %114 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %115 = load i64, ptr %11, align 8, !tbaa !17
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %114, i64 noundef %115)
  store float 0.000000e+00, ptr %116, align 4, !tbaa !18
  br label %117

117:                                              ; preds = %110
  %118 = load i64, ptr %11, align 8, !tbaa !17
  %119 = add i64 %118, 1
  store i64 %119, ptr %11, align 8, !tbaa !17
  br label %103, !llvm.loop !22

120:                                              ; preds = %109
  br label %121

121:                                              ; preds = %120, %101
  %122 = load ptr, ptr %7, align 8, !tbaa !5
  %123 = icmp ne ptr %122, null
  br i1 %123, label %124, label %165

124:                                              ; preds = %121
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #8
  store i64 0, ptr %12, align 8, !tbaa !17
  br label %125

125:                                              ; preds = %161, %124
  %126 = load i64, ptr %12, align 8, !tbaa !17
  %127 = load ptr, ptr %9, align 8, !tbaa !5
  %128 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %127, i32 0, i32 1
  %129 = load i64, ptr %128, align 8, !tbaa !9
  %130 = icmp ult i64 %126, %129
  br i1 %130, label %132, label %131

131:                                              ; preds = %125
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #8
  br label %164

132:                                              ; preds = %125
  %133 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %134 = load i64, ptr %12, align 8, !tbaa !17
  %135 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %133, i64 noundef %134)
  %136 = load float, ptr %135, align 4, !tbaa !18
  %137 = load ptr, ptr %6, align 8, !tbaa !5
  %138 = load i64, ptr %12, align 8, !tbaa !17
  %139 = getelementptr inbounds float, ptr %137, i64 %138
  %140 = load float, ptr %139, align 4, !tbaa !18
  %141 = fmul float %136, %140
  %142 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %143 = load i64, ptr %12, align 8, !tbaa !17
  %144 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %142, i64 noundef %143)
  store float %141, ptr %144, align 4, !tbaa !18
  %145 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %146 = load i64, ptr %12, align 8, !tbaa !17
  %147 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %145, i64 noundef %146)
  %148 = load float, ptr %147, align 4, !tbaa !18
  %149 = load ptr, ptr %6, align 8, !tbaa !5
  %150 = load i64, ptr %12, align 8, !tbaa !17
  %151 = getelementptr inbounds float, ptr %149, i64 %150
  %152 = load float, ptr %151, align 4, !tbaa !18
  %153 = load ptr, ptr %7, align 8, !tbaa !5
  %154 = load i64, ptr %12, align 8, !tbaa !17
  %155 = getelementptr inbounds float, ptr %153, i64 %154
  %156 = load float, ptr %155, align 4, !tbaa !18
  %157 = call float @llvm.fmuladd.f32(float %148, float %152, float %156)
  %158 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %159 = load i64, ptr %12, align 8, !tbaa !17
  %160 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %158, i64 noundef %159)
  store float %157, ptr %160, align 4, !tbaa !18
  br label %161

161:                                              ; preds = %132
  %162 = load i64, ptr %12, align 8, !tbaa !17
  %163 = add i64 %162, 1
  store i64 %163, ptr %12, align 8, !tbaa !17
  br label %125, !llvm.loop !23

164:                                              ; preds = %131
  br label %202

165:                                              ; preds = %121
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #8
  store i64 0, ptr %13, align 8, !tbaa !17
  br label %166

166:                                              ; preds = %198, %165
  %167 = load i64, ptr %13, align 8, !tbaa !17
  %168 = load ptr, ptr %9, align 8, !tbaa !5
  %169 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %168, i32 0, i32 1
  %170 = load i64, ptr %169, align 8, !tbaa !9
  %171 = icmp ult i64 %167, %170
  br i1 %171, label %173, label %172

172:                                              ; preds = %166
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #8
  br label %201

173:                                              ; preds = %166
  %174 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %175 = load i64, ptr %13, align 8, !tbaa !17
  %176 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %174, i64 noundef %175)
  %177 = load float, ptr %176, align 4, !tbaa !18
  %178 = load ptr, ptr %6, align 8, !tbaa !5
  %179 = load i64, ptr %13, align 8, !tbaa !17
  %180 = getelementptr inbounds float, ptr %178, i64 %179
  %181 = load float, ptr %180, align 4, !tbaa !18
  %182 = fmul float %177, %181
  %183 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %184 = load i64, ptr %13, align 8, !tbaa !17
  %185 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %183, i64 noundef %184)
  store float %182, ptr %185, align 4, !tbaa !18
  %186 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %187 = load i64, ptr %13, align 8, !tbaa !17
  %188 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %186, i64 noundef %187)
  %189 = load float, ptr %188, align 4, !tbaa !18
  %190 = load ptr, ptr %6, align 8, !tbaa !5
  %191 = load i64, ptr %13, align 8, !tbaa !17
  %192 = getelementptr inbounds float, ptr %190, i64 %191
  %193 = load float, ptr %192, align 4, !tbaa !18
  %194 = fmul float %189, %193
  %195 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %196 = load i64, ptr %13, align 8, !tbaa !17
  %197 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %195, i64 noundef %196)
  store float %194, ptr %197, align 4, !tbaa !18
  br label %198

198:                                              ; preds = %173
  %199 = load i64, ptr %13, align 8, !tbaa !17
  %200 = add i64 %199, 1
  store i64 %200, ptr %13, align 8, !tbaa !17
  br label %166, !llvm.loop !24

201:                                              ; preds = %172
  br label %202

202:                                              ; preds = %201, %164
  %203 = load ptr, ptr %9, align 8, !tbaa !5
  %204 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %203, i32 0, i32 4
  %205 = load i32, ptr %204, align 4, !tbaa !25
  %206 = icmp eq i32 %205, 3
  br i1 %206, label %207, label %251

207:                                              ; preds = %202
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #8
  store i64 0, ptr %14, align 8, !tbaa !17
  br label %208

208:                                              ; preds = %247, %207
  %209 = load i64, ptr %14, align 8, !tbaa !17
  %210 = load ptr, ptr %9, align 8, !tbaa !5
  %211 = getelementptr inbounds %"struct.Simd::Base::Scale8iParam", ptr %210, i32 0, i32 1
  %212 = load i64, ptr %211, align 8, !tbaa !9
  %213 = icmp ult i64 %209, %212
  br i1 %213, label %215, label %214

214:                                              ; preds = %208
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #8
  br label %250

215:                                              ; preds = %208
  %216 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %217 = load i64, ptr %14, align 8, !tbaa !17
  %218 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %216, i64 noundef %217)
  %219 = load float, ptr %218, align 4, !tbaa !18
  %220 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 2
  %221 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %220, i32 0, i32 1
  %222 = load i64, ptr %14, align 8, !tbaa !17
  %223 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %221, i64 noundef %222)
  %224 = load float, ptr %223, align 4, !tbaa !18
  %225 = fmul float %219, %224
  %226 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 3
  %227 = load i64, ptr %14, align 8, !tbaa !17
  %228 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %226, i64 noundef %227)
  store float %225, ptr %228, align 4, !tbaa !18
  %229 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %230 = load i64, ptr %14, align 8, !tbaa !17
  %231 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %229, i64 noundef %230)
  %232 = load float, ptr %231, align 4, !tbaa !18
  %233 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 2
  %234 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %233, i32 0, i32 1
  %235 = load i64, ptr %14, align 8, !tbaa !17
  %236 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %234, i64 noundef %235)
  %237 = load float, ptr %236, align 4, !tbaa !18
  %238 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 2
  %239 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %238, i32 0, i32 2
  %240 = load i64, ptr %14, align 8, !tbaa !17
  %241 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %239, i64 noundef %240)
  %242 = load float, ptr %241, align 4, !tbaa !18
  %243 = call float @llvm.fmuladd.f32(float %232, float %237, float %242)
  %244 = getelementptr inbounds %"class.Simd::Base::SynetScale8i", ptr %15, i32 0, i32 4
  %245 = load i64, ptr %14, align 8, !tbaa !17
  %246 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %244, i64 noundef %245)
  store float %243, ptr %246, align 4, !tbaa !18
  br label %247

247:                                              ; preds = %215
  %248 = load i64, ptr %14, align 8, !tbaa !17
  %249 = add i64 %248, 1
  store i64 %249, ptr %14, align 8, !tbaa !17
  br label %208, !llvm.loop !26

250:                                              ; preds = %214
  br label %251

251:                                              ; preds = %250, %202
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #8
  ret void
}

declare void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100), ptr noundef, ptr noundef, i64 noundef, i32 noundef) #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #6 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #7 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"_ZTSN4Simd4Base12Scale8iParamE", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !12, i64 28, !13, i64 32, !14, i64 36}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!14 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!15 = !{!10, !14, i64 36}
!16 = !{!10, !12, i64 24}
!17 = !{!11, !11, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}
!23 = distinct !{!23, !21}
!24 = distinct !{!24, !21}
!25 = !{!10, !12, i64 28}
!26 = distinct !{!26, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_ = external hidden unnamed_addr constant [93 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_(ptr noundef nonnull align 8 dereferenceable(288) %0, ptr nocapture noundef readonly %1, ptr noundef readonly %2, ptr noundef readonly %3) local_unnamed_addr #3 align 2 {
  %.not = icmp eq ptr %3, null
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  br i1 %.not, label %21, label %6

6:                                                ; preds = %4
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %3, i64 8
  %9 = load ptr, ptr %8, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 256
  %11 = load i64, ptr %10, align 8, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %0, i64 284
  %13 = load i32, ptr %12, align 4, !tbaa !15
  tail call void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100) %5, ptr noundef %7, ptr noundef %9, i64 noundef %11, i32 noundef %13)
  %14 = getelementptr inbounds i8, ptr %0, i64 112
  %15 = getelementptr inbounds i8, ptr %3, i64 16
  %16 = load ptr, ptr %15, align 8, !tbaa !5
  %17 = getelementptr inbounds i8, ptr %3, i64 24
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  %19 = load i64, ptr %10, align 8, !tbaa !9
  %20 = load i32, ptr %12, align 4, !tbaa !15
  tail call void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100) %14, ptr noundef %16, ptr noundef %18, i64 noundef %19, i32 noundef %20)
  br label %26

21:                                               ; preds = %4
  %22 = tail call noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100) %5)
  %.not66 = icmp eq i64 %22, 0
  br i1 %.not66, label %.critedge, label %23

23:                                               ; preds = %21
  %24 = getelementptr inbounds i8, ptr %0, i64 112
  %25 = tail call noundef i64 @_ZNK4Simd8CvtParam4SizeEv(ptr noundef nonnull align 8 dereferenceable(100) %24)
  %.not67 = icmp eq i64 %25, 0
  br i1 %.not67, label %.critedge, label %26

.critedge:                                        ; preds = %21, %23
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 150, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base12SynetScale8i9SetParamsEPKfS3_PKS3_) #7
  unreachable

26:                                               ; preds = %23, %6
  %27 = getelementptr inbounds i8, ptr %0, i64 216
  %28 = getelementptr inbounds i8, ptr %0, i64 256
  %29 = load i64, ptr %28, align 8, !tbaa !9
  tail call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %29, i1 noundef zeroext false, i64 noundef 8)
  %30 = getelementptr inbounds i8, ptr %0, i64 232
  %31 = load i64, ptr %28, align 8, !tbaa !9
  tail call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %31, i1 noundef zeroext false, i64 noundef 8)
  %32 = getelementptr inbounds i8, ptr %0, i64 272
  %33 = load i32, ptr %32, align 8, !tbaa !16
  %34 = icmp eq i32 %33, 3
  %35 = load i64, ptr %28, align 8
  %.not88 = icmp eq i64 %35, 0
  br i1 %34, label %.preheader73, label %.preheader75

.preheader75:                                     ; preds = %26
  br i1 %.not88, label %.loopexit74, label %.lr.ph

.preheader73:                                     ; preds = %26
  br i1 %.not88, label %.loopexit74, label %.lr.ph79

.lr.ph79:                                         ; preds = %.preheader73
  %36 = getelementptr inbounds i8, ptr %0, i64 56
  %37 = getelementptr inbounds i8, ptr %0, i64 72
  br label %38

38:                                               ; preds = %.lr.ph79, %38
  %.06378 = phi i64 [ 0, %.lr.ph79 ], [ %45, %38 ]
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %36, i64 noundef %.06378)
  %40 = load float, ptr %39, align 4, !tbaa !17
  %41 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06378)
  store float %40, ptr %41, align 4, !tbaa !17
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %37, i64 noundef %.06378)
  %43 = load float, ptr %42, align 4, !tbaa !17
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06378)
  store float %43, ptr %44, align 4, !tbaa !17
  %45 = add nuw i64 %.06378, 1
  %46 = load i64, ptr %28, align 8
  %47 = icmp ult i64 %45, %46
  br i1 %47, label %38, label %.loopexit74, !llvm.loop !19

.lr.ph:                                           ; preds = %.preheader75, %.lr.ph
  %.06277 = phi i64 [ %50, %.lr.ph ], [ 0, %.preheader75 ]
  %48 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06277)
  store float 1.000000e+00, ptr %48, align 4, !tbaa !17
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06277)
  store float 0.000000e+00, ptr %49, align 4, !tbaa !17
  %50 = add nuw i64 %.06277, 1
  %51 = load i64, ptr %28, align 8
  %52 = icmp ult i64 %50, %51
  br i1 %52, label %.lr.ph, label %.loopexit74, !llvm.loop !21

.loopexit74:                                      ; preds = %.lr.ph, %38, %.preheader75, %.preheader73
  %53 = phi i64 [ 0, %.preheader75 ], [ 0, %.preheader73 ], [ %46, %38 ], [ %51, %.lr.ph ]
  %.not68 = icmp eq ptr %2, null
  %.not90 = icmp eq i64 %53, 0
  br i1 %.not68, label %.preheader69, label %.preheader71

.preheader71:                                     ; preds = %.loopexit74
  br i1 %.not90, label %.loopexit, label %.lr.ph81

.preheader69:                                     ; preds = %.loopexit74
  br i1 %.not90, label %.loopexit, label %.lr.ph83

.lr.ph81:                                         ; preds = %.preheader71, %.lr.ph81
  %.06180 = phi i64 [ %67, %.lr.ph81 ], [ 0, %.preheader71 ]
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06180)
  %55 = load float, ptr %54, align 4, !tbaa !17
  %56 = getelementptr inbounds float, ptr %1, i64 %.06180
  %57 = load float, ptr %56, align 4, !tbaa !17
  %58 = fmul float %55, %57
  %59 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06180)
  store float %58, ptr %59, align 4, !tbaa !17
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06180)
  %61 = load float, ptr %60, align 4, !tbaa !17
  %62 = load float, ptr %56, align 4, !tbaa !17
  %63 = getelementptr inbounds float, ptr %2, i64 %.06180
  %64 = load float, ptr %63, align 4, !tbaa !17
  %65 = tail call float @llvm.fmuladd.f32(float %61, float %62, float %64)
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06180)
  store float %65, ptr %66, align 4, !tbaa !17
  %67 = add nuw i64 %.06180, 1
  %68 = load i64, ptr %28, align 8
  %69 = icmp ult i64 %67, %68
  br i1 %69, label %.lr.ph81, label %.loopexit70, !llvm.loop !22

.lr.ph83:                                         ; preds = %.preheader69, %.lr.ph83
  %.06082 = phi i64 [ %81, %.lr.ph83 ], [ 0, %.preheader69 ]
  %70 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06082)
  %71 = load float, ptr %70, align 4, !tbaa !17
  %72 = getelementptr inbounds float, ptr %1, i64 %.06082
  %73 = load float, ptr %72, align 4, !tbaa !17
  %74 = fmul float %71, %73
  %75 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.06082)
  store float %74, ptr %75, align 4, !tbaa !17
  %76 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06082)
  %77 = load float, ptr %76, align 4, !tbaa !17
  %78 = load float, ptr %72, align 4, !tbaa !17
  %79 = fmul float %77, %78
  %80 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.06082)
  store float %79, ptr %80, align 4, !tbaa !17
  %81 = add nuw i64 %.06082, 1
  %82 = load i64, ptr %28, align 8
  %83 = icmp ult i64 %81, %82
  br i1 %83, label %.lr.ph83, label %.loopexit70, !llvm.loop !23

.loopexit70:                                      ; preds = %.lr.ph81, %.lr.ph83
  %84 = phi i64 [ %82, %.lr.ph83 ], [ %68, %.lr.ph81 ]
  %85 = getelementptr inbounds i8, ptr %0, i64 276
  %86 = load i32, ptr %85, align 4, !tbaa !24
  %87 = icmp eq i32 %86, 3
  %88 = icmp ne i64 %84, 0
  %or.cond = and i1 %87, %88
  br i1 %or.cond, label %.lr.ph85, label %.loopexit

.lr.ph85:                                         ; preds = %.loopexit70
  %89 = getelementptr inbounds i8, ptr %0, i64 128
  %90 = getelementptr inbounds i8, ptr %0, i64 144
  br label %91

91:                                               ; preds = %.lr.ph85, %91
  %.084 = phi i64 [ 0, %.lr.ph85 ], [ %106, %91 ]
  %92 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.084)
  %93 = load float, ptr %92, align 4, !tbaa !17
  %94 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %89, i64 noundef %.084)
  %95 = load float, ptr %94, align 4, !tbaa !17
  %96 = fmul float %93, %95
  %97 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %27, i64 noundef %.084)
  store float %96, ptr %97, align 4, !tbaa !17
  %98 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.084)
  %99 = load float, ptr %98, align 4, !tbaa !17
  %100 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %89, i64 noundef %.084)
  %101 = load float, ptr %100, align 4, !tbaa !17
  %102 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %90, i64 noundef %.084)
  %103 = load float, ptr %102, align 4, !tbaa !17
  %104 = tail call float @llvm.fmuladd.f32(float %99, float %101, float %103)
  %105 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.084)
  store float %104, ptr %105, align 4, !tbaa !17
  %106 = add nuw i64 %.084, 1
  %107 = load i64, ptr %28, align 8, !tbaa !9
  %108 = icmp ult i64 %106, %107
  br i1 %108, label %91, label %.loopexit, !llvm.loop !25

.loopexit:                                        ; preds = %91, %.preheader69, %.preheader71, %.loopexit70
  ret void
}

declare void @_ZN4Simd8CvtParam4InitEPKfS2_m26SimdSynetCompatibilityType(ptr noundef nonnull align 8 dereferenceable(100), ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #6 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"_ZTSN4Simd4Base12Scale8iParamE", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !12, i64 28, !13, i64 32, !14, i64 36}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!14 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!15 = !{!10, !14, i64 36}
!16 = !{!10, !12, i64 24}
!17 = !{!18, !18, i64 0}
!18 = !{!"float", !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = distinct !{!22, !20}
!23 = distinct !{!23, !20}
!24 = !{!10, !12, i64 28}
!25 = distinct !{!25, !20}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass