; LLVM IR from libxsmm/libxsmm :: src (generator_matequation_regblocks_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef, i32 noundef) #1

declare i32 @libxsmm_generator_aarch64_get_sve_type(i8 noundef zeroext) #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_mateqn_compute_ternary_op_2d_reg_block_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #2 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i8, align 1
  %29 = alloca i8, align 1
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store i32 %2, ptr %12, align 4, !tbaa !9
  store i32 %3, ptr %13, align 4, !tbaa !9
  store i32 %4, ptr %14, align 4, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %32 = load ptr, ptr %11, align 8, !tbaa !5
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %32, i32 noundef %33)
  store i32 %34, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %35 = load ptr, ptr %11, align 8, !tbaa !5
  %36 = load i32, ptr %14, align 4, !tbaa !9
  %37 = call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %35, i32 noundef %36)
  store i32 %37, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = load i32, ptr %15, align 4, !tbaa !9
  %40 = call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %38, i32 noundef %39)
  store i32 %40, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  store i32 0, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %28) #3
  %41 = load ptr, ptr %10, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %41, i32 0, i32 6
  %43 = load i32, ptr %42, align 4, !tbaa !11
  %44 = icmp uge i32 %43, 2201
  br i1 %44, label %45, label %50

45:                                               ; preds = %9
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %46, i32 0, i32 6
  %48 = load i32, ptr %47, align 4, !tbaa !11
  %49 = icmp ule i32 %48, 2999
  br label %50

50:                                               ; preds = %45, %9
  %51 = phi i1 [ false, %9 ], [ %49, %45 ]
  %52 = zext i1 %51 to i32
  %53 = trunc i32 %52 to i8
  store i8 %53, ptr %28, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 1, ptr %29) #3
  store i8 0, ptr %29, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #3
  %54 = load i32, ptr %18, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 0
  %56 = zext i1 %55 to i64
  %57 = select i1 %55, i32 8, i32 4
  %58 = trunc i32 %57 to i8
  %59 = call i32 @libxsmm_generator_aarch64_get_sve_type(i8 noundef zeroext %58)
  store i32 %59, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #3
  %60 = load i32, ptr %18, align 4, !tbaa !9
  %61 = icmp eq i32 %60, 0
  %62 = zext i1 %61 to i64
  %63 = select i1 %61, i32 7, i32 5
  store i32 %63, ptr %31, align 4, !tbaa !9
  %64 = load i32, ptr %12, align 4, !tbaa !9
  switch i32 %64, label %71 [
    i32 1, label %65
  ]

65:                                               ; preds = %50
  %66 = load i8, ptr %28, align 1, !tbaa !13
  %67 = zext i8 %66 to i32
  %68 = icmp ne i32 %67, 0
  %69 = zext i1 %68 to i64
  %70 = select i1 %68, i32 1696596099, i32 237030411
  store i32 %70, ptr %27, align 4, !tbaa !9
  br label %72

71:                                               ; preds = %50
  br label %72

72:                                               ; preds = %71, %65
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %161, %72
  %74 = load i32, ptr %23, align 4, !tbaa !9
  %75 = load i32, ptr %17, align 4, !tbaa !9
  %76 = icmp ult i32 %74, %75
  br i1 %76, label %77, label %164

77:                                               ; preds = %73
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %157, %77
  %79 = load i32, ptr %22, align 4, !tbaa !9
  %80 = load i32, ptr %16, align 4, !tbaa !9
  %81 = icmp ult i32 %79, %80
  br i1 %81, label %82, label %160

82:                                               ; preds = %78
  %83 = load i32, ptr %19, align 4, !tbaa !9
  %84 = load i32, ptr %23, align 4, !tbaa !9
  %85 = load i32, ptr %16, align 4, !tbaa !9
  %86 = mul i32 %84, %85
  %87 = add i32 %83, %86
  %88 = load i32, ptr %22, align 4, !tbaa !9
  %89 = add i32 %87, %88
  store i32 %89, ptr %24, align 4, !tbaa !9
  %90 = load i32, ptr %20, align 4, !tbaa !9
  %91 = load i32, ptr %23, align 4, !tbaa !9
  %92 = load i32, ptr %16, align 4, !tbaa !9
  %93 = mul i32 %91, %92
  %94 = add i32 %90, %93
  %95 = load i32, ptr %22, align 4, !tbaa !9
  %96 = add i32 %94, %95
  store i32 %96, ptr %25, align 4, !tbaa !9
  %97 = load i32, ptr %21, align 4, !tbaa !9
  %98 = load i32, ptr %23, align 4, !tbaa !9
  %99 = load i32, ptr %16, align 4, !tbaa !9
  %100 = mul i32 %98, %99
  %101 = add i32 %97, %100
  %102 = load i32, ptr %22, align 4, !tbaa !9
  %103 = add i32 %101, %102
  store i32 %103, ptr %26, align 4, !tbaa !9
  %104 = load i32, ptr %12, align 4, !tbaa !9
  %105 = icmp eq i32 %104, 4
  br i1 %105, label %106, label %136

106:                                              ; preds = %82
  %107 = load i8, ptr %28, align 1, !tbaa !13
  %108 = icmp ne i8 %107, 0
  br i1 %108, label %109, label %124

109:                                              ; preds = %106
  %110 = load ptr, ptr %10, align 8, !tbaa !5
  %111 = load i32, ptr %24, align 4, !tbaa !9
  %112 = load i32, ptr %26, align 4, !tbaa !9
  %113 = load i32, ptr %26, align 4, !tbaa !9
  %114 = load i8, ptr %29, align 1, !tbaa !13
  %115 = zext i8 %114 to i32
  %116 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %110, i32 noundef 1694500867, i32 noundef %111, i32 noundef %112, i8 noundef zeroext 0, i32 noundef %113, i32 noundef %115, i32 noundef %116)
  %117 = load ptr, ptr %10, align 8, !tbaa !5
  %118 = load i32, ptr %25, align 4, !tbaa !9
  %119 = load i32, ptr %26, align 4, !tbaa !9
  %120 = load i32, ptr %26, align 4, !tbaa !9
  %121 = load i8, ptr %29, align 1, !tbaa !13
  %122 = zext i8 %121 to i32
  %123 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %117, i32 noundef 1694499843, i32 noundef %118, i32 noundef %119, i8 noundef zeroext 0, i32 noundef %120, i32 noundef %122, i32 noundef %123)
  br label %135

124:                                              ; preds = %106
  %125 = load ptr, ptr %10, align 8, !tbaa !5
  %126 = load i32, ptr %24, align 4, !tbaa !9
  %127 = load i32, ptr %26, align 4, !tbaa !9
  %128 = load i32, ptr %26, align 4, !tbaa !9
  %129 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %125, i32 noundef 773905419, i32 noundef %126, i32 noundef %127, i8 noundef zeroext 0, i32 noundef %128, i32 noundef %129)
  %130 = load ptr, ptr %10, align 8, !tbaa !5
  %131 = load i32, ptr %25, align 4, !tbaa !9
  %132 = load i32, ptr %26, align 4, !tbaa !9
  %133 = load i32, ptr %26, align 4, !tbaa !9
  %134 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %130, i32 noundef 245421067, i32 noundef %131, i32 noundef %132, i8 noundef zeroext 0, i32 noundef %133, i32 noundef %134)
  br label %135

135:                                              ; preds = %124, %109
  br label %156

136:                                              ; preds = %82
  %137 = load i8, ptr %28, align 1, !tbaa !13
  %138 = icmp ne i8 %137, 0
  br i1 %138, label %139, label %148

139:                                              ; preds = %136
  %140 = load ptr, ptr %10, align 8, !tbaa !5
  %141 = load i32, ptr %27, align 4, !tbaa !9
  %142 = load i32, ptr %24, align 4, !tbaa !9
  %143 = load i32, ptr %25, align 4, !tbaa !9
  %144 = load i32, ptr %26, align 4, !tbaa !9
  %145 = load i8, ptr %29, align 1, !tbaa !13
  %146 = zext i8 %145 to i32
  %147 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %140, i32 noundef %141, i32 noundef %142, i32 noundef %143, i8 noundef zeroext 0, i32 noundef %144, i32 noundef %146, i32 noundef %147)
  br label %155

148:                                              ; preds = %136
  %149 = load ptr, ptr %10, align 8, !tbaa !5
  %150 = load i32, ptr %27, align 4, !tbaa !9
  %151 = load i32, ptr %24, align 4, !tbaa !9
  %152 = load i32, ptr %25, align 4, !tbaa !9
  %153 = load i32, ptr %26, align 4, !tbaa !9
  %154 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %149, i32 noundef %150, i32 noundef %151, i32 noundef %152, i8 noundef zeroext 0, i32 noundef %153, i32 noundef %154)
  br label %155

155:                                              ; preds = %148, %139
  br label %156

156:                                              ; preds = %155, %135
  br label %157

157:                                              ; preds = %156
  %158 = load i32, ptr %22, align 4, !tbaa !9
  %159 = add i32 %158, 1
  store i32 %159, ptr %22, align 4, !tbaa !9
  br label %78, !llvm.loop !14

160:                                              ; preds = %78
  br label %161

161:                                              ; preds = %160
  %162 = load i32, ptr %23, align 4, !tbaa !9
  %163 = add i32 %162, 1
  store i32 %163, ptr %23, align 4, !tbaa !9
  br label %73, !llvm.loop !16

164:                                              ; preds = %73
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @libxsmm_generator_aarch64_get_sve_type(i8 noundef zeroext) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_mateqn_compute_ternary_op_2d_reg_block_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #1 {
  %10 = tail call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %1, i32 noundef %3) #2
  %11 = tail call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %1, i32 noundef %4) #2
  %12 = tail call i32 @libxsmm_generator_matequation_regblocks_get_start_of_register_block(ptr noundef %1, i32 noundef %5) #2
  %13 = getelementptr inbounds i8, ptr %0, i64 28
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = add i32 %14, -3000
  %spec.select = icmp ult i32 %15, -799
  %16 = icmp eq i32 %8, 0
  %17 = select i1 %16, i8 8, i8 4
  %18 = tail call i32 @libxsmm_generator_aarch64_get_sve_type(i8 noundef zeroext %17) #2
  %19 = select i1 %16, i32 7, i32 5
  %cond = icmp eq i32 %2, 1
  %20 = select i1 %spec.select, i32 237030411, i32 1696596099
  %.068 = select i1 %cond, i32 %20, i32 0
  %.not = icmp eq i32 %7, 0
  %.not87 = icmp eq i32 %6, 0
  %or.cond = or i1 %.not, %.not87
  br i1 %or.cond, label %._crit_edge76, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %9
  %21 = icmp eq i32 %2, 4
  br i1 %21, label %.preheader.lr.ph.split.us.split.us, label %.preheader.lr.ph.split.us.split

.preheader.lr.ph.split.us.split.us:               ; preds = %.preheader.lr.ph.split.us
  br i1 %spec.select, label %.preheader.us.us.us, label %.preheader.us.us

.preheader.us.us.us:                              ; preds = %.preheader.lr.ph.split.us.split.us, %._crit_edge.split.us.split.us.us.us.us
  %.06775.us.us.us = phi i32 [ %31, %._crit_edge.split.us.split.us.us.us.us ], [ 0, %.preheader.lr.ph.split.us.split.us ]
  %22 = mul i32 %.06775.us.us.us, %6
  %23 = add i32 %22, %10
  %24 = add i32 %22, %11
  %25 = add i32 %22, %12
  br label %26

26:                                               ; preds = %26, %.preheader.us.us.us
  %.073.us.us.us.us.us = phi i32 [ 0, %.preheader.us.us.us ], [ %30, %26 ]
  %27 = add i32 %23, %.073.us.us.us.us.us
  %28 = add i32 %24, %.073.us.us.us.us.us
  %29 = add i32 %25, %.073.us.us.us.us.us
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 773905419, i32 noundef %27, i32 noundef %29, i8 noundef zeroext 0, i32 noundef %29, i32 noundef %19) #2
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef 245421067, i32 noundef %28, i32 noundef %29, i8 noundef zeroext 0, i32 noundef %29, i32 noundef %19) #2
  %30 = add nuw i32 %.073.us.us.us.us.us, 1
  %exitcond97.not = icmp eq i32 %30, %6
  br i1 %exitcond97.not, label %._crit_edge.split.us.split.us.us.us.us, label %26, !llvm.loop !11

._crit_edge.split.us.split.us.us.us.us:           ; preds = %26
  %31 = add nuw i32 %.06775.us.us.us, 1
  %exitcond98.not = icmp eq i32 %31, %7
  br i1 %exitcond98.not, label %._crit_edge76, label %.preheader.us.us.us, !llvm.loop !13

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us.split.us, %._crit_edge.split.us.split.us81.us
  %.06775.us.us = phi i32 [ %41, %._crit_edge.split.us.split.us81.us ], [ 0, %.preheader.lr.ph.split.us.split.us ]
  %32 = mul i32 %.06775.us.us, %6
  %33 = add i32 %32, %10
  %34 = add i32 %32, %11
  %35 = add i32 %32, %12
  br label %36

36:                                               ; preds = %.preheader.us.us, %36
  %.073.us.us80.us = phi i32 [ 0, %.preheader.us.us ], [ %40, %36 ]
  %37 = add i32 %33, %.073.us.us80.us
  %38 = add i32 %34, %.073.us.us80.us
  %39 = add i32 %35, %.073.us.us80.us
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1694500867, i32 noundef %37, i32 noundef %39, i8 noundef zeroext 0, i32 noundef %39, i32 noundef 0, i32 noundef %18) #2
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1694499843, i32 noundef %38, i32 noundef %39, i8 noundef zeroext 0, i32 noundef %39, i32 noundef 0, i32 noundef %18) #2
  %40 = add nuw i32 %.073.us.us80.us, 1
  %exitcond95.not = icmp eq i32 %40, %6
  br i1 %exitcond95.not, label %._crit_edge.split.us.split.us81.us, label %36, !llvm.loop !11

._crit_edge.split.us.split.us81.us:               ; preds = %36
  %41 = add nuw i32 %.06775.us.us, 1
  %exitcond96.not = icmp eq i32 %41, %7
  br i1 %exitcond96.not, label %._crit_edge76, label %.preheader.us.us, !llvm.loop !13

.preheader.lr.ph.split.us.split:                  ; preds = %.preheader.lr.ph.split.us
  br i1 %spec.select, label %.preheader.us.us85, label %.preheader.us

.preheader.us.us85:                               ; preds = %.preheader.lr.ph.split.us.split, %._crit_edge.split.split.us.us.us
  %.06775.us.us86 = phi i32 [ %51, %._crit_edge.split.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us.split ]
  %42 = mul i32 %.06775.us.us86, %6
  %43 = add i32 %42, %10
  %44 = add i32 %42, %11
  %45 = add i32 %42, %12
  br label %46

46:                                               ; preds = %46, %.preheader.us.us85
  %.073.us74.us.us = phi i32 [ 0, %.preheader.us.us85 ], [ %50, %46 ]
  %47 = add i32 %43, %.073.us74.us.us
  %48 = add i32 %44, %.073.us74.us.us
  %49 = add i32 %45, %.073.us74.us.us
  tail call void @libxsmm_aarch64_instruction_asimd_compute(ptr noundef %0, i32 noundef %.068, i32 noundef %47, i32 noundef %48, i8 noundef zeroext 0, i32 noundef %49, i32 noundef %19) #2
  %50 = add nuw i32 %.073.us74.us.us, 1
  %exitcond93.not = icmp eq i32 %50, %6
  br i1 %exitcond93.not, label %._crit_edge.split.split.us.us.us, label %46, !llvm.loop !11

._crit_edge.split.split.us.us.us:                 ; preds = %46
  %51 = add nuw i32 %.06775.us.us86, 1
  %exitcond94.not = icmp eq i32 %51, %7
  br i1 %exitcond94.not, label %._crit_edge76, label %.preheader.us.us85, !llvm.loop !13

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us.split, %._crit_edge.split.split.us78
  %.06775.us = phi i32 [ %61, %._crit_edge.split.split.us78 ], [ 0, %.preheader.lr.ph.split.us.split ]
  %52 = mul i32 %.06775.us, %6
  %53 = add i32 %52, %10
  %54 = add i32 %52, %11
  %55 = add i32 %52, %12
  br label %56

56:                                               ; preds = %.preheader.us, %56
  %.073.us77 = phi i32 [ 0, %.preheader.us ], [ %60, %56 ]
  %57 = add i32 %53, %.073.us77
  %58 = add i32 %54, %.073.us77
  %59 = add i32 %55, %.073.us77
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef %.068, i32 noundef %57, i32 noundef %58, i8 noundef zeroext 0, i32 noundef %59, i32 noundef 0, i32 noundef %18) #2
  %60 = add nuw i32 %.073.us77, 1
  %exitcond.not = icmp eq i32 %60, %6
  br i1 %exitcond.not, label %._crit_edge.split.split.us78, label %56, !llvm.loop !11

._crit_edge.split.split.us78:                     ; preds = %56
  %61 = add nuw i32 %.06775.us, 1
  %exitcond92.not = icmp eq i32 %61, %7
  br i1 %exitcond92.not, label %._crit_edge76, label %.preheader.us, !llvm.loop !13

._crit_edge76:                                    ; preds = %._crit_edge.split.split.us78, %._crit_edge.split.split.us.us.us, %._crit_edge.split.us.split.us81.us, %._crit_edge.split.us.split.us.us.us.us, %9
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass