; LLVM IR from libxsmm/libxsmm :: src (generator_aarch64_reference)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.libxsmm_ref_code_pointer = type { ptr }
%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_aarch64_reference_kernel(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %union.libxsmm_ref_code_pointer, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = icmp eq i32 %19, 0
  %21 = zext i1 %20 to i64
  %22 = select i1 %20, i64 96, i64 32
  store i64 %22, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  store i64 0, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #7
  store ptr null, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #7
  store ptr null, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #7
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !13
  store ptr %25, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  store i32 33, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  store i32 34, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #7
  store ptr null, ptr %14, align 8, !tbaa !15
  %26 = load i64, ptr %7, align 8, !tbaa !11
  %27 = call noalias ptr @malloc(i64 noundef %26) #8
  store ptr %27, ptr %9, align 8, !tbaa !5
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  %29 = load i64, ptr %7, align 8, !tbaa !11
  call void @llvm.memset.p0.i64(ptr align 1 %28, i8 0, i64 %29, i1 false)
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 0
  br i1 %31, label %32, label %37

32:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #7
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %33, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #7
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %34, ptr %16, align 8, !tbaa !5
  %35 = load ptr, ptr %16, align 8, !tbaa !5
  %36 = load ptr, ptr %15, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %35, ptr align 1 %36, i64 95, i1 false), !tbaa.struct !16
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  br label %42

37:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #7
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %38, ptr %17, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  %39 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %39, ptr %18, align 8, !tbaa !5
  %40 = load ptr, ptr %18, align 8, !tbaa !5
  %41 = load ptr, ptr %17, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %40, ptr align 1 %41, i64 32, i1 false), !tbaa.struct !19
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #7
  br label %42

42:                                               ; preds = %37, %32
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %43, ptr %10, align 8, !tbaa !5
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_open_stream(ptr noundef %44, i16 noundef zeroext 3072)
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %45, i32 noundef 285212678, i32 noundef 63, i32 noundef 61, i32 noundef 0, i8 noundef zeroext 0)
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %46, i32 noundef 285212678, i32 noundef 63, i32 noundef %47, i32 noundef 0, i8 noundef zeroext 0)
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = load i32, ptr %13, align 4, !tbaa !9
  %50 = load i32, ptr %12, align 4, !tbaa !9
  %51 = load i32, ptr %13, align 4, !tbaa !9
  %52 = load i64, ptr %7, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %48, i32 noundef 4097, i32 noundef %49, i32 noundef %50, i32 noundef %51, i64 noundef %52)
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %53, i32 noundef 285212678, i32 noundef %54, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0)
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = load i32, ptr %12, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %55, i32 noundef %56, i64 noundef -64)
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %57, i32 noundef 285212678, i32 noundef 63, i32 noundef %58, i32 noundef 0, i8 noundef zeroext 0)
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = load i32, ptr %13, align 4, !tbaa !9
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %59, i32 noundef 167772167, i32 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef 0, i32 noundef 0)
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %63, i32 noundef 285212678, i32 noundef %64, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0)
  store i64 0, ptr %8, align 8, !tbaa !11
  br label %65

65:                                               ; preds = %100, %42
  %66 = load i64, ptr %8, align 8, !tbaa !11
  %67 = load i64, ptr %7, align 8, !tbaa !11
  %68 = udiv i64 %67, 32
  %69 = icmp ult i64 %66, %68
  br i1 %69, label %70, label %103

70:                                               ; preds = %65
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = load i32, ptr %12, align 4, !tbaa !9
  %73 = load ptr, ptr %10, align 8, !tbaa !5
  %74 = getelementptr inbounds i64, ptr %73, i64 0
  %75 = load i64, ptr %74, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %71, i32 noundef %72, i64 noundef %75)
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = load i32, ptr %13, align 4, !tbaa !9
  %78 = load ptr, ptr %10, align 8, !tbaa !5
  %79 = getelementptr inbounds i64, ptr %78, i64 1
  %80 = load i64, ptr %79, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %76, i32 noundef %77, i64 noundef %80)
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = load i32, ptr %12, align 4, !tbaa !9
  %83 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %81, i32 noundef 687865863, i32 noundef 63, i32 noundef 0, i32 noundef %82, i32 noundef %83)
  %84 = load ptr, ptr %4, align 8, !tbaa !5
  %85 = load i32, ptr %12, align 4, !tbaa !9
  %86 = load ptr, ptr %10, align 8, !tbaa !5
  %87 = getelementptr inbounds i64, ptr %86, i64 2
  %88 = load i64, ptr %87, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %84, i32 noundef %85, i64 noundef %88)
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  %90 = load i32, ptr %13, align 4, !tbaa !9
  %91 = load ptr, ptr %10, align 8, !tbaa !5
  %92 = getelementptr inbounds i64, ptr %91, i64 3
  %93 = load i64, ptr %92, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %89, i32 noundef %90, i64 noundef %93)
  %94 = load ptr, ptr %4, align 8, !tbaa !5
  %95 = load i32, ptr %12, align 4, !tbaa !9
  %96 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef %94, i32 noundef 687865863, i32 noundef 63, i32 noundef 16, i32 noundef %95, i32 noundef %96)
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %97, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0)
  %98 = load ptr, ptr %10, align 8, !tbaa !5
  %99 = getelementptr inbounds i64, ptr %98, i64 4
  store ptr %99, ptr %10, align 8, !tbaa !5
  br label %100

100:                                              ; preds = %70
  %101 = load i64, ptr %8, align 8, !tbaa !11
  %102 = add i64 %101, 1
  store i64 %102, ptr %8, align 8, !tbaa !11
  br label %65, !llvm.loop !20

103:                                              ; preds = %65
  %104 = load ptr, ptr %4, align 8, !tbaa !5
  %105 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %104, i32 noundef 285212678, i32 noundef 63, i32 noundef %105, i32 noundef 0, i8 noundef zeroext 0)
  %106 = load ptr, ptr %4, align 8, !tbaa !5
  %107 = load i32, ptr %13, align 4, !tbaa !9
  %108 = load i32, ptr %12, align 4, !tbaa !9
  %109 = load i32, ptr %13, align 4, !tbaa !9
  %110 = load i64, ptr %7, align 8, !tbaa !11
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %106, i32 noundef 4097, i32 noundef %107, i32 noundef %108, i32 noundef %109, i64 noundef %110)
  %111 = load ptr, ptr %4, align 8, !tbaa !5
  %112 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %111, i32 noundef 285212678, i32 noundef %112, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0)
  %113 = load ptr, ptr %4, align 8, !tbaa !5
  %114 = load i32, ptr %12, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %113, i32 noundef 285212678, i32 noundef 63, i32 noundef %114, i32 noundef 0, i8 noundef zeroext 0)
  %115 = load i32, ptr %6, align 4, !tbaa !9
  %116 = icmp eq i32 %115, 0
  br i1 %116, label %117, label %121

117:                                              ; preds = %103
  store ptr @libxsmm_reference_gemm, ptr %14, align 8, !tbaa !15
  %118 = load ptr, ptr %4, align 8, !tbaa !5
  %119 = load i32, ptr %13, align 4, !tbaa !9
  %120 = load i64, ptr %14, align 8, !tbaa !15
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %118, i32 noundef %119, i64 noundef %120)
  br label %125

121:                                              ; preds = %103
  store ptr @libxsmm_reference_elementwise, ptr %14, align 8, !tbaa !15
  %122 = load ptr, ptr %4, align 8, !tbaa !5
  %123 = load i32, ptr %13, align 4, !tbaa !9
  %124 = load i64, ptr %14, align 8, !tbaa !15
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %122, i32 noundef %123, i64 noundef %124)
  br label %125

125:                                              ; preds = %121, %117
  %126 = load ptr, ptr %11, align 8, !tbaa !5
  %127 = load ptr, ptr %4, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %127, i32 0, i32 2
  %129 = load i32, ptr %128, align 4, !tbaa !22
  %130 = add i32 %129, 1
  store i32 %130, ptr %128, align 4, !tbaa !22
  %131 = zext i32 %129 to i64
  %132 = getelementptr inbounds i8, ptr %126, i64 %131
  store i8 64, ptr %132, align 1, !tbaa !15
  %133 = load ptr, ptr %11, align 8, !tbaa !5
  %134 = load ptr, ptr %4, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %134, i32 0, i32 2
  %136 = load i32, ptr %135, align 4, !tbaa !22
  %137 = add i32 %136, 1
  store i32 %137, ptr %135, align 4, !tbaa !22
  %138 = zext i32 %136 to i64
  %139 = getelementptr inbounds i8, ptr %133, i64 %138
  store i8 0, ptr %139, align 1, !tbaa !15
  %140 = load ptr, ptr %11, align 8, !tbaa !5
  %141 = load ptr, ptr %4, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %141, i32 0, i32 2
  %143 = load i32, ptr %142, align 4, !tbaa !22
  %144 = add i32 %143, 1
  store i32 %144, ptr %142, align 4, !tbaa !22
  %145 = zext i32 %143 to i64
  %146 = getelementptr inbounds i8, ptr %140, i64 %145
  store i8 63, ptr %146, align 1, !tbaa !15
  %147 = load ptr, ptr %11, align 8, !tbaa !5
  %148 = load ptr, ptr %4, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %148, i32 0, i32 2
  %150 = load i32, ptr %149, align 4, !tbaa !22
  %151 = add i32 %150, 1
  store i32 %151, ptr %149, align 4, !tbaa !22
  %152 = zext i32 %150 to i64
  %153 = getelementptr inbounds i8, ptr %147, i64 %152
  store i8 -42, ptr %153, align 1, !tbaa !15
  %154 = load ptr, ptr %4, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %154, i32 noundef 285212678, i32 noundef 61, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0)
  %155 = load ptr, ptr %4, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_close_stream(ptr noundef %155, i16 noundef zeroext 3072)
  %156 = load ptr, ptr %9, align 8, !tbaa !5
  call void @free(ptr noundef %156) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_aarch64_instruction_open_stream(ptr noundef, i16 noundef zeroext) #5

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #5

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #5

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #5

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #5

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #5

declare void @libxsmm_reference_gemm(ptr noundef, ptr noundef) #5

declare void @libxsmm_reference_elementwise(ptr noundef, ptr noundef) #5

declare void @libxsmm_aarch64_instruction_close_stream(ptr noundef, i16 noundef zeroext) #5

; Function Attrs: nounwind
declare void @free(ptr noundef) #6

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!15 = !{!7, !7, i64 0}
!16 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9, i64 12, i64 4, !9, i64 16, i64 4, !9, i64 20, i64 4, !9, i64 24, i64 4, !9, i64 28, i64 1, !15, i64 29, i64 3, !15, i64 32, i64 1, !15, i64 33, i64 8, !11, i64 41, i64 8, !11, i64 49, i64 1, !15, i64 50, i64 4, !9, i64 54, i64 4, !9, i64 58, i64 4, !9, i64 62, i64 2, !17, i64 64, i64 2, !17, i64 66, i64 1, !15, i64 67, i64 1, !15, i64 68, i64 1, !15, i64 69, i64 1, !15, i64 70, i64 2, !17, i64 72, i64 2, !17, i64 74, i64 2, !17, i64 76, i64 2, !17, i64 78, i64 2, !17, i64 80, i64 2, !17, i64 82, i64 4, !9, i64 86, i64 4, !9, i64 90, i64 4, !9, i64 94, i64 1, !15}
!17 = !{!18, !18, i64 0}
!18 = !{!"short", !7, i64 0}
!19 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9, i64 12, i64 4, !9, i64 16, i64 4, !9, i64 20, i64 4, !9, i64 24, i64 1, !15, i64 25, i64 1, !15, i64 26, i64 1, !15, i64 27, i64 2, !17, i64 29, i64 2, !17, i64 31, i64 1, !15}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!14, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_aarch64_reference_kernel(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %2, 0
  %5 = select i1 %4, i64 96, i64 32
  %6 = load ptr, ptr %0, align 8, !tbaa !5
  %calloc = tail call ptr @calloc(i64 1, i64 %5)
  br i1 %4, label %7, label %8

7:                                                ; preds = %3
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(95) %calloc, ptr noundef nonnull align 1 dereferenceable(95) %1, i64 95, i1 false), !tbaa.struct !11
  br label %9

8:                                                ; preds = %3
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(32) %calloc, ptr noundef nonnull align 1 dereferenceable(32) %1, i64 32, i1 false), !tbaa.struct !18
  br label %9

9:                                                ; preds = %8, %7
  tail call void @libxsmm_aarch64_instruction_open_stream(ptr noundef nonnull %0, i16 noundef zeroext 3072) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 61, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 34, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4097, i32 noundef 34, i32 noundef 33, i32 noundef 34, i64 noundef %5) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 34, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 33, i64 noundef -64) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 34, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef nonnull %0, i32 noundef 167772167, i32 noundef 34, i32 noundef 33, i32 noundef 34, i32 noundef 0, i32 noundef 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 34, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0) #5
  %10 = lshr exact i64 %5, 5
  br label %11

11:                                               ; preds = %9, %11
  %.088 = phi i64 [ 0, %9 ], [ %20, %11 ]
  %.08687 = phi ptr [ %calloc, %9 ], [ %19, %11 ]
  %12 = load i64, ptr %.08687, align 8, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 33, i64 noundef %12) #5
  %13 = getelementptr inbounds i8, ptr %.08687, i64 8
  %14 = load i64, ptr %13, align 8, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 34, i64 noundef %14) #5
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 687865863, i32 noundef 63, i32 noundef 0, i32 noundef 33, i32 noundef 34) #5
  %15 = getelementptr inbounds i8, ptr %.08687, i64 16
  %16 = load i64, ptr %15, align 8, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 33, i64 noundef %16) #5
  %17 = getelementptr inbounds i8, ptr %.08687, i64 24
  %18 = load i64, ptr %17, align 8, !tbaa !14
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 34, i64 noundef %18) #5
  tail call void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef nonnull %0, i32 noundef 687865863, i32 noundef 63, i32 noundef 16, i32 noundef 33, i32 noundef 34) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 63, i32 noundef 32, i8 noundef zeroext 0) #5
  %19 = getelementptr inbounds i8, ptr %.08687, i64 32
  %20 = add nuw nsw i64 %.088, 1
  %exitcond.not = icmp eq i64 %20, %10
  br i1 %exitcond.not, label %21, label %11, !llvm.loop !19

21:                                               ; preds = %11
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 34, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4097, i32 noundef 34, i32 noundef 33, i32 noundef 34, i64 noundef %5) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 34, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 63, i32 noundef 33, i32 noundef 0, i8 noundef zeroext 0) #5
  %. = select i1 %4, i64 ptrtoint (ptr @libxsmm_reference_gemm to i64), i64 ptrtoint (ptr @libxsmm_reference_elementwise to i64)
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 34, i64 noundef %.) #5
  %22 = getelementptr inbounds i8, ptr %0, i64 12
  %23 = load i32, ptr %22, align 4, !tbaa !21
  %24 = add i32 %23, 1
  store i32 %24, ptr %22, align 4, !tbaa !21
  %25 = zext i32 %23 to i64
  %26 = getelementptr inbounds i8, ptr %6, i64 %25
  store i8 64, ptr %26, align 1, !tbaa !13
  %27 = load i32, ptr %22, align 4, !tbaa !21
  %28 = add i32 %27, 1
  store i32 %28, ptr %22, align 4, !tbaa !21
  %29 = zext i32 %27 to i64
  %30 = getelementptr inbounds i8, ptr %6, i64 %29
  store i8 0, ptr %30, align 1, !tbaa !13
  %31 = load i32, ptr %22, align 4, !tbaa !21
  %32 = add i32 %31, 1
  store i32 %32, ptr %22, align 4, !tbaa !21
  %33 = zext i32 %31 to i64
  %34 = getelementptr inbounds i8, ptr %6, i64 %33
  store i8 63, ptr %34, align 1, !tbaa !13
  %35 = load i32, ptr %22, align 4, !tbaa !21
  %36 = add i32 %35, 1
  store i32 %36, ptr %22, align 4, !tbaa !21
  %37 = zext i32 %35 to i64
  %38 = getelementptr inbounds i8, ptr %6, i64 %37
  store i8 -42, ptr %38, align 1, !tbaa !13
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef nonnull %0, i32 noundef 285212678, i32 noundef 61, i32 noundef 63, i32 noundef 0, i8 noundef zeroext 0) #5
  tail call void @libxsmm_aarch64_instruction_close_stream(ptr noundef nonnull %0, i16 noundef zeroext 3072) #5
  tail call void @free(ptr noundef %calloc) #5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

declare void @libxsmm_aarch64_instruction_open_stream(ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_pair_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_reference_gemm(ptr noundef, ptr noundef) #2

declare void @libxsmm_reference_elementwise(ptr noundef, ptr noundef) #2

declare void @libxsmm_aarch64_instruction_close_stream(ptr noundef, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: nofree nounwind willreturn allockind("alloc,zeroed") allocsize(0,1) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @calloc(i64 noundef, i64 noundef) local_unnamed_addr #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind willreturn allockind("alloc,zeroed") allocsize(0,1) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{i64 0, i64 4, !12, i64 4, i64 4, !12, i64 8, i64 4, !12, i64 12, i64 4, !12, i64 16, i64 4, !12, i64 20, i64 4, !12, i64 24, i64 4, !12, i64 28, i64 1, !13, i64 29, i64 3, !13, i64 32, i64 1, !13, i64 33, i64 8, !14, i64 41, i64 8, !14, i64 49, i64 1, !13, i64 50, i64 4, !12, i64 54, i64 4, !12, i64 58, i64 4, !12, i64 62, i64 2, !16, i64 64, i64 2, !16, i64 66, i64 1, !13, i64 67, i64 1, !13, i64 68, i64 1, !13, i64 69, i64 1, !13, i64 70, i64 2, !16, i64 72, i64 2, !16, i64 74, i64 2, !16, i64 76, i64 2, !16, i64 78, i64 2, !16, i64 80, i64 2, !16, i64 82, i64 4, !12, i64 86, i64 4, !12, i64 90, i64 4, !12, i64 94, i64 1, !13}
!12 = !{!10, !10, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long long", !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !8, i64 0}
!18 = !{i64 0, i64 4, !12, i64 4, i64 4, !12, i64 8, i64 4, !12, i64 12, i64 4, !12, i64 16, i64 4, !12, i64 20, i64 4, !12, i64 24, i64 1, !13, i64 25, i64 1, !13, i64 26, i64 1, !13, i64 27, i64 2, !16, i64 29, i64 2, !16, i64 31, i64 1, !13}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!6, !10, i64 12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass