; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynet.ll (ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf = external hidden unnamed_addr constant [101 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf(ptr noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3, ptr noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !11
  store ptr %4, ptr %10, align 8, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !11
  %18 = icmp eq i32 %17, 1
  br i1 %18, label %19, label %66

19:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %20

20:                                               ; preds = %29, %19
  %21 = load i64, ptr %11, align 8, !tbaa !9
  %22 = load i64, ptr %7, align 8, !tbaa !9
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  br label %32

25:                                               ; preds = %20
  %26 = load ptr, ptr %10, align 8, !tbaa !5
  %27 = load i64, ptr %11, align 8, !tbaa !9
  %28 = getelementptr inbounds float, ptr %26, i64 %27
  store float 0.000000e+00, ptr %28, align 4, !tbaa !13
  br label %29

29:                                               ; preds = %25
  %30 = load i64, ptr %11, align 8, !tbaa !9
  %31 = add i64 %30, 1
  store i64 %31, ptr %11, align 8, !tbaa !9
  br label %20, !llvm.loop !15

32:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %33

33:                                               ; preds = %62, %32
  %34 = load i64, ptr %12, align 8, !tbaa !9
  %35 = load i64, ptr %8, align 8, !tbaa !9
  %36 = icmp ult i64 %34, %35
  br i1 %36, label %38, label %37

37:                                               ; preds = %33
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  br label %65

38:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  store i64 0, ptr %14, align 8, !tbaa !9
  br label %39

39:                                               ; preds = %55, %38
  %40 = load i64, ptr %14, align 8, !tbaa !9
  %41 = load i64, ptr %7, align 8, !tbaa !9
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  store i32 8, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  br label %58

44:                                               ; preds = %39
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i64, ptr %14, align 8, !tbaa !9
  %47 = getelementptr inbounds i16, ptr %45, i64 %46
  %48 = load i16, ptr %47, align 2, !tbaa !17
  %49 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %48)
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = load i64, ptr %14, align 8, !tbaa !9
  %52 = getelementptr inbounds float, ptr %50, i64 %51
  %53 = load float, ptr %52, align 4, !tbaa !13
  %54 = fadd float %53, %49
  store float %54, ptr %52, align 4, !tbaa !13
  br label %55

55:                                               ; preds = %44
  %56 = load i64, ptr %14, align 8, !tbaa !9
  %57 = add i64 %56, 1
  store i64 %57, ptr %14, align 8, !tbaa !9
  br label %39, !llvm.loop !19

58:                                               ; preds = %43
  %59 = load i64, ptr %7, align 8, !tbaa !9
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds i16, ptr %60, i64 %59
  store ptr %61, ptr %6, align 8, !tbaa !5
  br label %62

62:                                               ; preds = %58
  %63 = load i64, ptr %12, align 8, !tbaa !9
  %64 = add i64 %63, 1
  store i64 %64, ptr %12, align 8, !tbaa !9
  br label %33, !llvm.loop !20

65:                                               ; preds = %37
  br label %108

66:                                               ; preds = %5
  %67 = load i32, ptr %9, align 4, !tbaa !11
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %106

69:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  store i64 0, ptr %15, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %102, %69
  %71 = load i64, ptr %15, align 8, !tbaa !9
  %72 = load i64, ptr %7, align 8, !tbaa !9
  %73 = icmp ult i64 %71, %72
  br i1 %73, label %75, label %74

74:                                               ; preds = %70
  store i32 11, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  br label %105

75:                                               ; preds = %70
  %76 = load ptr, ptr %10, align 8, !tbaa !5
  %77 = load i64, ptr %15, align 8, !tbaa !9
  %78 = getelementptr inbounds float, ptr %76, i64 %77
  store float 0.000000e+00, ptr %78, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  store i64 0, ptr %16, align 8, !tbaa !9
  br label %79

79:                                               ; preds = %95, %75
  %80 = load i64, ptr %16, align 8, !tbaa !9
  %81 = load i64, ptr %8, align 8, !tbaa !9
  %82 = icmp ult i64 %80, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %79
  store i32 14, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  br label %98

84:                                               ; preds = %79
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  %86 = load i64, ptr %16, align 8, !tbaa !9
  %87 = getelementptr inbounds i16, ptr %85, i64 %86
  %88 = load i16, ptr %87, align 2, !tbaa !17
  %89 = call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %88)
  %90 = load ptr, ptr %10, align 8, !tbaa !5
  %91 = load i64, ptr %15, align 8, !tbaa !9
  %92 = getelementptr inbounds float, ptr %90, i64 %91
  %93 = load float, ptr %92, align 4, !tbaa !13
  %94 = fadd float %93, %89
  store float %94, ptr %92, align 4, !tbaa !13
  br label %95

95:                                               ; preds = %84
  %96 = load i64, ptr %16, align 8, !tbaa !9
  %97 = add i64 %96, 1
  store i64 %97, ptr %16, align 8, !tbaa !9
  br label %79, !llvm.loop !21

98:                                               ; preds = %83
  %99 = load i64, ptr %8, align 8, !tbaa !9
  %100 = load ptr, ptr %6, align 8, !tbaa !5
  %101 = getelementptr inbounds i16, ptr %100, i64 %99
  store ptr %101, ptr %6, align 8, !tbaa !5
  br label %102

102:                                              ; preds = %98
  %103 = load i64, ptr %15, align 8, !tbaa !9
  %104 = add i64 %103, 1
  store i64 %104, ptr %15, align 8, !tbaa !9
  br label %70, !llvm.loop !22

105:                                              ; preds = %74
  br label %107

106:                                              ; preds = %66
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 60, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf) #5
  unreachable

107:                                              ; preds = %105
  br label %108

108:                                              ; preds = %107, %65
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !18, i64 0}
!18 = !{!"short", !7, i64 0}
!19 = distinct !{!19, !16}
!20 = distinct !{!20, !16}
!21 = distinct !{!21, !16}
!22 = distinct !{!22, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf = external hidden unnamed_addr constant [101 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i32 noundef %3, ptr nocapture noundef %4) local_unnamed_addr #0 {
  switch i32 %3, label %28 [
    i32 1, label %.preheader41
    i32 0, label %.preheader42
  ]

.preheader42:                                     ; preds = %5
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %.loopexit, label %.lr.ph47

.lr.ph47:                                         ; preds = %.preheader42
  %.not54 = icmp eq i64 %2, 0
  br i1 %.not54, label %.lr.ph47.split.preheader, label %.lr.ph.us

.lr.ph47.split.preheader:                         ; preds = %.lr.ph47
  %6 = shl nuw i64 %1, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %4, i8 0, i64 %6, i1 false), !tbaa !5
  br label %.loopexit

.lr.ph.us:                                        ; preds = %.lr.ph47, %._crit_edge.us
  %.03246.us = phi i64 [ %16, %._crit_edge.us ], [ 0, %.lr.ph47 ]
  %.145.us = phi ptr [ %15, %._crit_edge.us ], [ %0, %.lr.ph47 ]
  %7 = getelementptr inbounds float, ptr %4, i64 %.03246.us
  store float 0.000000e+00, ptr %7, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %.lr.ph.us, %8
  %.044.us = phi i64 [ 0, %.lr.ph.us ], [ %14, %8 ]
  %9 = getelementptr inbounds i16, ptr %.145.us, i64 %.044.us
  %10 = load i16, ptr %9, align 2, !tbaa !9
  %11 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %10)
  %12 = load float, ptr %7, align 4, !tbaa !5
  %13 = fadd float %11, %12
  store float %13, ptr %7, align 4, !tbaa !5
  %14 = add nuw i64 %.044.us, 1
  %exitcond.not = icmp eq i64 %14, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %8, !llvm.loop !11

._crit_edge.us:                                   ; preds = %8
  %15 = getelementptr inbounds i16, ptr %.145.us, i64 %2
  %16 = add nuw i64 %.03246.us, 1
  %exitcond61.not = icmp eq i64 %16, %1
  br i1 %exitcond61.not, label %.loopexit, label %.lr.ph.us, !llvm.loop !13

.preheader41:                                     ; preds = %5
  %.not55 = icmp eq i64 %1, 0
  br i1 %.not55, label %.loopexit, label %.preheader40.thread

.preheader40.thread:                              ; preds = %.preheader41
  %17 = shl nuw i64 %1, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %4, i8 0, i64 %17, i1 false), !tbaa !5
  %.not5664 = icmp eq i64 %2, 0
  br i1 %.not5664, label %.loopexit, label %.preheader.us

.preheader.us:                                    ; preds = %.preheader40.thread, %._crit_edge.us53
  %.03452.us = phi i64 [ %27, %._crit_edge.us53 ], [ 0, %.preheader40.thread ]
  %.03651.us = phi ptr [ %26, %._crit_edge.us53 ], [ %0, %.preheader40.thread ]
  br label %18

18:                                               ; preds = %.preheader.us, %18
  %.03349.us = phi i64 [ 0, %.preheader.us ], [ %25, %18 ]
  %19 = getelementptr inbounds i16, ptr %.03651.us, i64 %.03349.us
  %20 = load i16, ptr %19, align 2, !tbaa !9
  %21 = tail call noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext %20)
  %22 = getelementptr inbounds float, ptr %4, i64 %.03349.us
  %23 = load float, ptr %22, align 4, !tbaa !5
  %24 = fadd float %21, %23
  store float %24, ptr %22, align 4, !tbaa !5
  %25 = add nuw i64 %.03349.us, 1
  %exitcond62.not = icmp eq i64 %25, %1
  br i1 %exitcond62.not, label %._crit_edge.us53, label %18, !llvm.loop !14

._crit_edge.us53:                                 ; preds = %18
  %26 = getelementptr inbounds i16, ptr %.03651.us, i64 %1
  %27 = add nuw i64 %.03452.us, 1
  %exitcond63.not = icmp eq i64 %27, %2
  br i1 %exitcond63.not, label %.loopexit, label %.preheader.us, !llvm.loop !15

28:                                               ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 60, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base18SynetChannelSum16bEPKtmm20SimdTensorFormatTypePf) #4
  unreachable

.loopexit:                                        ; preds = %._crit_edge.us, %._crit_edge.us53, %.preheader41, %.preheader40.thread, %.lr.ph47.split.preheader, %.preheader42
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base17BFloat16ToFloat32Et(i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass