; LLVM IR from Py-Contributors/AlgorithmsAndDataStructure :: C++/Backtracking/sodukoSolver.ll (Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef, i8 noundef signext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) #2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %82, %1
  %9 = load i32, ptr %4, align 4, !tbaa !9
  %10 = sext i32 %9 to i64
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %13 = icmp ult i64 %10, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %8
  store i32 2, ptr %5, align 4
  br label %85

15:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %76, %15
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef 0) #3
  %21 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #3
  %22 = icmp ult i64 %18, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %16
  store i32 5, ptr %5, align 4
  br label %79

24:                                               ; preds = %16
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #3
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #3
  %32 = load i8, ptr %31, align 1, !tbaa !11
  %33 = sext i8 %32 to i32
  %34 = icmp eq i32 %33, 46
  br i1 %34, label %35, label %75

35:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  store i8 49, ptr %7, align 1, !tbaa !11
  br label %36

36:                                               ; preds = %69, %35
  %37 = load i8, ptr %7, align 1, !tbaa !11
  %38 = sext i8 %37 to i32
  %39 = icmp sle i32 %38, 57
  br i1 %39, label %41, label %40

40:                                               ; preds = %36
  store i32 8, ptr %5, align 4
  br label %72

41:                                               ; preds = %36
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = load i32, ptr %4, align 4, !tbaa !9
  %44 = load i32, ptr %6, align 4, !tbaa !9
  %45 = load i8, ptr %7, align 1, !tbaa !11
  %46 = call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %42, i32 noundef %43, i32 noundef %44, i8 noundef signext %45)
  br i1 %46, label %47, label %68

47:                                               ; preds = %41
  %48 = load i8, ptr %7, align 1, !tbaa !11
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #3
  store i8 %48, ptr %55, align 1, !tbaa !11
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %56)
  br i1 %57, label %58, label %59

58:                                               ; preds = %47
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %72

59:                                               ; preds = %47
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = load i32, ptr %4, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #3
  %64 = load i32, ptr %6, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %65) #3
  store i8 46, ptr %66, align 1, !tbaa !11
  br label %67

67:                                               ; preds = %59
  br label %68

68:                                               ; preds = %67, %41
  br label %69

69:                                               ; preds = %68
  %70 = load i8, ptr %7, align 1, !tbaa !11
  %71 = add i8 %70, 1
  store i8 %71, ptr %7, align 1, !tbaa !11
  br label %36, !llvm.loop !12

72:                                               ; preds = %58, %40
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  %73 = load i32, ptr %5, align 4
  switch i32 %73, label %79 [
    i32 8, label %74
  ]

74:                                               ; preds = %72
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %79

75:                                               ; preds = %24
  br label %76

76:                                               ; preds = %75
  %77 = load i32, ptr %6, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %6, align 4, !tbaa !9
  br label %16, !llvm.loop !14

79:                                               ; preds = %74, %72, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %80 = load i32, ptr %5, align 4
  switch i32 %80, label %85 [
    i32 5, label %81
  ]

81:                                               ; preds = %79
  br label %82

82:                                               ; preds = %81
  %83 = load i32, ptr %4, align 4, !tbaa !9
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %4, align 4, !tbaa !9
  br label %8, !llvm.loop !15

85:                                               ; preds = %79, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %86 = load i32, ptr %5, align 4
  switch i32 %86, label %90 [
    i32 2, label %87
    i32 1, label %88
  ]

87:                                               ; preds = %85
  store i1 true, ptr %2, align 1
  br label %88

88:                                               ; preds = %87, %85
  %89 = load i1, ptr %2, align 1
  ret i1 %89

90:                                               ; preds = %85
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef, i8 noundef signext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = icmp eq i64 %2, 0
  br i1 %3, label %.thread, label %.preheader46

.preheader46:                                     ; preds = %1, %._crit_edge
  %indvars.iv67 = phi i64 [ %indvars.iv.next68, %._crit_edge ], [ 0, %1 ]
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %5 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #1
  %.not = icmp eq i64 %5, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader46, %92
  %indvars.iv = phi i64 [ %indvars.iv.next, %92 ], [ 0, %.preheader46 ]
  %6 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %7 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv) #1
  %8 = load i8, ptr %7, align 1, !tbaa !5
  %9 = icmp eq i8 %8, 46
  br i1 %9, label %.preheader, label %92

.preheader:                                       ; preds = %.lr.ph
  %10 = trunc nuw nsw i64 %indvars.iv67 to i32
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  %12 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 49)
  br i1 %12, label %13, label %20

13:                                               ; preds = %.preheader
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %15 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv) #1
  store i8 49, ptr %15, align 1, !tbaa !5
  %16 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %16, label %.thread, label %17

17:                                               ; preds = %13
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %19 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #1
  store i8 46, ptr %19, align 1, !tbaa !5
  br label %20

20:                                               ; preds = %.preheader, %17
  %21 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 50)
  br i1 %21, label %22, label %29

22:                                               ; preds = %20
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %24 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %indvars.iv) #1
  store i8 50, ptr %24, align 1, !tbaa !5
  %25 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %25, label %.thread, label %26

26:                                               ; preds = %22
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %28 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv) #1
  store i8 46, ptr %28, align 1, !tbaa !5
  br label %29

29:                                               ; preds = %26, %20
  %30 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 51)
  br i1 %30, label %31, label %38

31:                                               ; preds = %29
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %33 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv) #1
  store i8 51, ptr %33, align 1, !tbaa !5
  %34 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %34, label %.thread, label %35

35:                                               ; preds = %31
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %37 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %indvars.iv) #1
  store i8 46, ptr %37, align 1, !tbaa !5
  br label %38

38:                                               ; preds = %35, %29
  %39 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 52)
  br i1 %39, label %40, label %47

40:                                               ; preds = %38
  %41 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %42 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %indvars.iv) #1
  store i8 52, ptr %42, align 1, !tbaa !5
  %43 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %43, label %.thread, label %44

44:                                               ; preds = %40
  %45 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %46 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv) #1
  store i8 46, ptr %46, align 1, !tbaa !5
  br label %47

47:                                               ; preds = %44, %38
  %48 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 53)
  br i1 %48, label %49, label %56

49:                                               ; preds = %47
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %51 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %indvars.iv) #1
  store i8 53, ptr %51, align 1, !tbaa !5
  %52 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %52, label %.thread, label %53

53:                                               ; preds = %49
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %55 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %indvars.iv) #1
  store i8 46, ptr %55, align 1, !tbaa !5
  br label %56

56:                                               ; preds = %53, %47
  %57 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 54)
  br i1 %57, label %58, label %65

58:                                               ; preds = %56
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %60 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %indvars.iv) #1
  store i8 54, ptr %60, align 1, !tbaa !5
  %61 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %61, label %.thread, label %62

62:                                               ; preds = %58
  %63 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %64 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %indvars.iv) #1
  store i8 46, ptr %64, align 1, !tbaa !5
  br label %65

65:                                               ; preds = %62, %56
  %66 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 55)
  br i1 %66, label %67, label %74

67:                                               ; preds = %65
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %69 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %indvars.iv) #1
  store i8 55, ptr %69, align 1, !tbaa !5
  %70 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %70, label %.thread, label %71

71:                                               ; preds = %67
  %72 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %73 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %indvars.iv) #1
  store i8 46, ptr %73, align 1, !tbaa !5
  br label %74

74:                                               ; preds = %71, %65
  %75 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 56)
  br i1 %75, label %76, label %83

76:                                               ; preds = %74
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %78 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %indvars.iv) #1
  store i8 56, ptr %78, align 1, !tbaa !5
  %79 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %79, label %.thread, label %80

80:                                               ; preds = %76
  %81 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %82 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %indvars.iv) #1
  store i8 46, ptr %82, align 1, !tbaa !5
  br label %83

83:                                               ; preds = %80, %74
  %84 = tail call noundef zeroext i1 @_Z7isValidRSt6vectorIS_IcSaIcEESaIS1_EEiic(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %10, i32 noundef %11, i8 noundef signext 57)
  br i1 %84, label %85, label %.thread

85:                                               ; preds = %83
  %86 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %87 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %indvars.iv) #1
  store i8 57, ptr %87, align 1, !tbaa !5
  %88 = tail call noundef zeroext i1 @_Z11solveSudokuRSt6vectorIS_IcSaIcEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0)
  br i1 %88, label %.thread, label %89

89:                                               ; preds = %85
  %90 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv67) #1
  %91 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %indvars.iv) #1
  store i8 46, ptr %91, align 1, !tbaa !5
  br label %.thread

92:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %93 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %94 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %93) #1
  %95 = icmp ugt i64 %94, %indvars.iv.next
  br i1 %95, label %.lr.ph, label %._crit_edge, !llvm.loop !8

._crit_edge:                                      ; preds = %92, %.preheader46
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %96 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not69 = icmp ugt i64 %96, %indvars.iv.next68
  br i1 %.not69, label %.preheader46, label %.thread, !llvm.loop !10

.thread:                                          ; preds = %._crit_edge, %13, %22, %31, %40, %49, %58, %67, %76, %85, %89, %83, %1
  %97 = phi i1 [ true, %1 ], [ false, %83 ], [ false, %89 ], [ false, %85 ], [ false, %76 ], [ false, %67 ], [ false, %58 ], [ false, %49 ], [ false, %40 ], [ false, %31 ], [ false, %22 ], [ false, %13 ], [ true, %._crit_edge ]
  %.3 = phi i1 [ undef, %1 ], [ false, %83 ], [ false, %89 ], [ true, %85 ], [ true, %76 ], [ true, %67 ], [ true, %58 ], [ true, %49 ], [ true, %40 ], [ true, %31 ], [ true, %22 ], [ true, %13 ], [ undef, %._crit_edge ]
  %spec.select36 = or i1 %97, %.3
  ret i1 %spec.select36
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass