; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseAbsDifference.ll (ZN4Simd4Base13AbsDifferenceEPKhmS2_mPhmmm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base13AbsDifferenceEPKhmS2_mPhmmm(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store ptr %2, ptr %11, align 8, !tbaa !5
  store i64 %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  store i64 %7, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  store i64 0, ptr %17, align 8, !tbaa !9
  br label %21

21:                                               ; preds = %61, %8
  %22 = load i64, ptr %17, align 8, !tbaa !9
  %23 = load i64, ptr %16, align 8, !tbaa !9
  %24 = icmp ult i64 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 2, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  br label %64

26:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  store i32 0, ptr %19, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  store i64 0, ptr %20, align 8, !tbaa !9
  br label %27

27:                                               ; preds = %48, %26
  %28 = load i64, ptr %20, align 8, !tbaa !9
  %29 = load i64, ptr %15, align 8, !tbaa !9
  %30 = icmp ult i64 %28, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  store i32 5, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  br label %51

32:                                               ; preds = %27
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = load i64, ptr %20, align 8, !tbaa !9
  %35 = getelementptr inbounds i8, ptr %33, i64 %34
  %36 = load i8, ptr %35, align 1, !tbaa !13
  %37 = zext i8 %36 to i32
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = load i64, ptr %20, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %38, i64 %39
  %41 = load i8, ptr %40, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %37, i32 noundef %42)
  %44 = trunc i32 %43 to i8
  %45 = load ptr, ptr %13, align 8, !tbaa !5
  %46 = load i64, ptr %20, align 8, !tbaa !9
  %47 = getelementptr inbounds i8, ptr %45, i64 %46
  store i8 %44, ptr %47, align 1, !tbaa !13
  br label %48

48:                                               ; preds = %32
  %49 = load i64, ptr %20, align 8, !tbaa !9
  %50 = add i64 %49, 1
  store i64 %50, ptr %20, align 8, !tbaa !9
  br label %27, !llvm.loop !14

51:                                               ; preds = %31
  %52 = load i64, ptr %10, align 8, !tbaa !9
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = getelementptr inbounds i8, ptr %53, i64 %52
  store ptr %54, ptr %9, align 8, !tbaa !5
  %55 = load i64, ptr %12, align 8, !tbaa !9
  %56 = load ptr, ptr %11, align 8, !tbaa !5
  %57 = getelementptr inbounds i8, ptr %56, i64 %55
  store ptr %57, ptr %11, align 8, !tbaa !5
  %58 = load i64, ptr %14, align 8, !tbaa !9
  %59 = load ptr, ptr %13, align 8, !tbaa !5
  %60 = getelementptr inbounds i8, ptr %59, i64 %58
  store ptr %60, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  br label %61

61:                                               ; preds = %51
  %62 = load i64, ptr %17, align 8, !tbaa !9
  %63 = add i64 %62, 1
  store i64 %63, ptr %17, align 8, !tbaa !9
  br label %21, !llvm.loop !16

64:                                               ; preds = %25
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base13AbsDifferenceEPKhmS2_mPhmmm(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, i64 noundef %3, ptr nocapture noundef writeonly %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) local_unnamed_addr #0 {
  %.not = icmp eq i64 %7, 0
  %.not27 = icmp eq i64 %6, 0
  %or.cond = or i1 %.not, %.not27
  br i1 %or.cond, label %._crit_edge26, label %.preheader.us

.preheader.us:                                    ; preds = %8, %._crit_edge.us
  %.01725.us = phi ptr [ %20, %._crit_edge.us ], [ %0, %8 ]
  %.01824.us = phi i64 [ %23, %._crit_edge.us ], [ 0, %8 ]
  %.01923.us = phi ptr [ %21, %._crit_edge.us ], [ %2, %8 ]
  %.02022.us = phi ptr [ %22, %._crit_edge.us ], [ %4, %8 ]
  br label %9

9:                                                ; preds = %.preheader.us, %9
  %.021.us = phi i64 [ 0, %.preheader.us ], [ %19, %9 ]
  %10 = getelementptr inbounds i8, ptr %.01725.us, i64 %.021.us
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %12 = zext i8 %11 to i32
  %13 = getelementptr inbounds i8, ptr %.01923.us, i64 %.021.us
  %14 = load i8, ptr %13, align 1, !tbaa !5
  %15 = zext i8 %14 to i32
  %16 = tail call noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef %12, i32 noundef %15)
  %17 = trunc i32 %16 to i8
  %18 = getelementptr inbounds i8, ptr %.02022.us, i64 %.021.us
  store i8 %17, ptr %18, align 1, !tbaa !5
  %19 = add nuw i64 %.021.us, 1
  %exitcond.not = icmp eq i64 %19, %6
  br i1 %exitcond.not, label %._crit_edge.us, label %9, !llvm.loop !8

._crit_edge.us:                                   ; preds = %9
  %20 = getelementptr inbounds i8, ptr %.01725.us, i64 %1
  %21 = getelementptr inbounds i8, ptr %.01923.us, i64 %3
  %22 = getelementptr inbounds i8, ptr %.02022.us, i64 %5
  %23 = add nuw i64 %.01824.us, 1
  %exitcond29.not = icmp eq i64 %23, %7
  br i1 %exitcond29.not, label %._crit_edge26, label %.preheader.us, !llvm.loop !10

._crit_edge26:                                    ; preds = %._crit_edge.us, %8
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base15AbsDifferenceU8Eii(i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass