; LLVM IR from mlcommons/tiny :: benchmark/interface/Middlewares/ST/threadx/common/src (txe_thread_create)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_preempt_disable = external global i32, align 4
@_tx_thread_created_ptr = external global ptr, align 8
@_tx_thread_created_count = external global i64, align 8
@_tx_thread_current_ptr = external global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8
@_tx_thread_system_state = external global i64, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_thread_create(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i32 noundef %6, i32 noundef %7, i64 noundef %8, i32 noundef %9, i32 noundef %10) #0 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i64, align 8
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca ptr, align 8
  %30 = alloca ptr, align 8
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store i64 %3, ptr %15, align 8, !tbaa !9
  store ptr %4, ptr %16, align 8, !tbaa !5
  store i64 %5, ptr %17, align 8, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !11
  store i32 %7, ptr %19, align 4, !tbaa !11
  store i64 %8, ptr %20, align 8, !tbaa !9
  store i32 %9, ptr %21, align 4, !tbaa !11
  store i32 %10, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #4
  store i32 0, ptr %24, align 4, !tbaa !11
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  %32 = icmp eq ptr %31, null
  br i1 %32, label %33, label %34

33:                                               ; preds = %11
  store i32 14, ptr %24, align 4, !tbaa !11
  br label %163

34:                                               ; preds = %11
  %35 = load i32, ptr %22, align 4, !tbaa !11
  %36 = zext i32 %35 to i64
  %37 = icmp ne i64 %36, 328
  br i1 %37, label %38, label %39

38:                                               ; preds = %34
  store i32 14, ptr %24, align 4, !tbaa !11
  br label %162

39:                                               ; preds = %34
  %40 = call i32 @__disable_interrupts()
  store i32 %40, ptr %23, align 4, !tbaa !11
  %41 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !11
  %42 = add i32 %41, 1
  store volatile i32 %42, ptr @_tx_thread_preempt_disable, align 4, !tbaa !11
  %43 = load i32, ptr %23, align 4, !tbaa !11
  call void @__restore_interrupt(i32 noundef %43)
  store i32 0, ptr %25, align 4, !tbaa !11
  %44 = load ptr, ptr @_tx_thread_created_ptr, align 8, !tbaa !5
  store ptr %44, ptr %27, align 8, !tbaa !5
  %45 = load ptr, ptr %16, align 8, !tbaa !5
  store ptr %45, ptr %29, align 8, !tbaa !5
  %46 = load ptr, ptr %29, align 8, !tbaa !5
  %47 = load i64, ptr %17, align 8, !tbaa !9
  %48 = sub i64 %47, 1
  %49 = trunc i64 %48 to i32
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds i8, ptr %46, i64 %50
  store ptr %51, ptr %29, align 8, !tbaa !5
  %52 = load ptr, ptr %29, align 8, !tbaa !5
  store ptr %52, ptr %28, align 8, !tbaa !5
  store i64 0, ptr %26, align 8, !tbaa !9
  br label %53

53:                                               ; preds = %98, %39
  %54 = load i64, ptr %26, align 8, !tbaa !9
  %55 = load i64, ptr @_tx_thread_created_count, align 8, !tbaa !9
  %56 = icmp ult i64 %54, %55
  br i1 %56, label %57, label %101

57:                                               ; preds = %53
  %58 = load ptr, ptr %12, align 8, !tbaa !5
  %59 = load ptr, ptr %27, align 8, !tbaa !5
  %60 = icmp eq ptr %58, %59
  br i1 %60, label %61, label %62

61:                                               ; preds = %57
  store i32 1, ptr %25, align 4, !tbaa !11
  br label %62

62:                                               ; preds = %61, %57
  %63 = load i32, ptr %25, align 4, !tbaa !11
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %66

65:                                               ; preds = %62
  br label %101

66:                                               ; preds = %62
  %67 = load ptr, ptr %16, align 8, !tbaa !5
  %68 = load ptr, ptr %27, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %68, i32 0, i32 3
  %70 = load ptr, ptr %69, align 8, !tbaa !13
  %71 = icmp uge ptr %67, %70
  br i1 %71, label %72, label %80

72:                                               ; preds = %66
  %73 = load ptr, ptr %16, align 8, !tbaa !5
  %74 = load ptr, ptr %27, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %74, i32 0, i32 4
  %76 = load ptr, ptr %75, align 8, !tbaa !16
  %77 = icmp ult ptr %73, %76
  br i1 %77, label %78, label %79

78:                                               ; preds = %72
  store ptr null, ptr %16, align 8, !tbaa !5
  store i32 1, ptr %25, align 4, !tbaa !11
  br label %79

79:                                               ; preds = %78, %72
  br label %80

80:                                               ; preds = %79, %66
  %81 = load ptr, ptr %28, align 8, !tbaa !5
  %82 = load ptr, ptr %27, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %82, i32 0, i32 3
  %84 = load ptr, ptr %83, align 8, !tbaa !13
  %85 = icmp uge ptr %81, %84
  br i1 %85, label %86, label %94

86:                                               ; preds = %80
  %87 = load ptr, ptr %28, align 8, !tbaa !5
  %88 = load ptr, ptr %27, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %88, i32 0, i32 4
  %90 = load ptr, ptr %89, align 8, !tbaa !16
  %91 = icmp ult ptr %87, %90
  br i1 %91, label %92, label %93

92:                                               ; preds = %86
  store ptr null, ptr %16, align 8, !tbaa !5
  store i32 1, ptr %25, align 4, !tbaa !11
  br label %93

93:                                               ; preds = %92, %86
  br label %94

94:                                               ; preds = %93, %80
  %95 = load ptr, ptr %27, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.TX_THREAD_STRUCT, ptr %95, i32 0, i32 28
  %97 = load ptr, ptr %96, align 8, !tbaa !17
  store ptr %97, ptr %27, align 8, !tbaa !5
  br label %98

98:                                               ; preds = %94
  %99 = load i64, ptr %26, align 8, !tbaa !9
  %100 = add i64 %99, 1
  store i64 %100, ptr %26, align 8, !tbaa !9
  br label %53, !llvm.loop !18

101:                                              ; preds = %65, %53
  %102 = call i32 @__disable_interrupts()
  store i32 %102, ptr %23, align 4, !tbaa !11
  %103 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !11
  %104 = add i32 %103, -1
  store volatile i32 %104, ptr @_tx_thread_preempt_disable, align 4, !tbaa !11
  %105 = load i32, ptr %23, align 4, !tbaa !11
  call void @__restore_interrupt(i32 noundef %105)
  call void @_tx_thread_system_preempt_check()
  %106 = load ptr, ptr %12, align 8, !tbaa !5
  %107 = load ptr, ptr %27, align 8, !tbaa !5
  %108 = icmp eq ptr %106, %107
  br i1 %108, label %109, label %110

109:                                              ; preds = %101
  store i32 14, ptr %24, align 4, !tbaa !11
  br label %161

110:                                              ; preds = %101
  %111 = load ptr, ptr %16, align 8, !tbaa !5
  %112 = icmp eq ptr %111, null
  br i1 %112, label %113, label %114

113:                                              ; preds = %110
  store i32 3, ptr %24, align 4, !tbaa !11
  br label %160

114:                                              ; preds = %110
  %115 = load ptr, ptr %14, align 8, !tbaa !5
  %116 = icmp eq ptr %115, null
  br i1 %116, label %117, label %118

117:                                              ; preds = %114
  store i32 3, ptr %24, align 4, !tbaa !11
  br label %159

118:                                              ; preds = %114
  %119 = load i64, ptr %17, align 8, !tbaa !9
  %120 = icmp ult i64 %119, 200
  br i1 %120, label %121, label %122

121:                                              ; preds = %118
  store i32 5, ptr %24, align 4, !tbaa !11
  br label %158

122:                                              ; preds = %118
  %123 = load i32, ptr %18, align 4, !tbaa !11
  %124 = icmp uge i32 %123, 32
  br i1 %124, label %125, label %126

125:                                              ; preds = %122
  store i32 15, ptr %24, align 4, !tbaa !11
  br label %157

126:                                              ; preds = %122
  %127 = load i32, ptr %19, align 4, !tbaa !11
  %128 = load i32, ptr %18, align 4, !tbaa !11
  %129 = icmp ugt i32 %127, %128
  br i1 %129, label %130, label %131

130:                                              ; preds = %126
  store i32 24, ptr %24, align 4, !tbaa !11
  br label %156

131:                                              ; preds = %126
  %132 = load i32, ptr %21, align 4, !tbaa !11
  %133 = icmp ugt i32 %132, 1
  br i1 %133, label %134, label %135

134:                                              ; preds = %131
  store i32 16, ptr %24, align 4, !tbaa !11
  br label %155

135:                                              ; preds = %131
  %136 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  store ptr %136, ptr %30, align 8, !tbaa !5
  %137 = load ptr, ptr %30, align 8, !tbaa !5
  %138 = icmp eq ptr %137, @_tx_timer_thread
  br i1 %138, label %139, label %140

139:                                              ; preds = %135
  store i32 19, ptr %24, align 4, !tbaa !11
  br label %140

140:                                              ; preds = %139, %135
  %141 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %142 = call i32 @_tx_ipsr_get()
  %143 = zext i32 %142 to i64
  %144 = or i64 %141, %143
  %145 = icmp ne i64 %144, 0
  br i1 %145, label %146, label %154

146:                                              ; preds = %140
  %147 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %148 = call i32 @_tx_ipsr_get()
  %149 = zext i32 %148 to i64
  %150 = or i64 %147, %149
  %151 = icmp ult i64 %150, 4042322160
  br i1 %151, label %152, label %153

152:                                              ; preds = %146
  store i32 19, ptr %24, align 4, !tbaa !11
  br label %153

153:                                              ; preds = %152, %146
  br label %154

154:                                              ; preds = %153, %140
  br label %155

155:                                              ; preds = %154, %134
  br label %156

156:                                              ; preds = %155, %130
  br label %157

157:                                              ; preds = %156, %125
  br label %158

158:                                              ; preds = %157, %121
  br label %159

159:                                              ; preds = %158, %117
  br label %160

160:                                              ; preds = %159, %113
  br label %161

161:                                              ; preds = %160, %109
  br label %162

162:                                              ; preds = %161, %38
  br label %163

163:                                              ; preds = %162, %33
  %164 = load i32, ptr %24, align 4, !tbaa !11
  %165 = icmp eq i32 %164, 0
  br i1 %165, label %166, label %178

166:                                              ; preds = %163
  %167 = load ptr, ptr %12, align 8, !tbaa !5
  %168 = load ptr, ptr %13, align 8, !tbaa !5
  %169 = load ptr, ptr %14, align 8, !tbaa !5
  %170 = load i64, ptr %15, align 8, !tbaa !9
  %171 = load ptr, ptr %16, align 8, !tbaa !5
  %172 = load i64, ptr %17, align 8, !tbaa !9
  %173 = load i32, ptr %18, align 4, !tbaa !11
  %174 = load i32, ptr %19, align 4, !tbaa !11
  %175 = load i64, ptr %20, align 8, !tbaa !9
  %176 = load i32, ptr %21, align 4, !tbaa !11
  %177 = call i32 @_tx_thread_create(ptr noundef %167, ptr noundef %168, ptr noundef %169, i64 noundef %170, ptr noundef %171, i64 noundef %172, i32 noundef %173, i32 noundef %174, i64 noundef %175, i32 noundef %176)
  store i32 %177, ptr %24, align 4, !tbaa !11
  br label %178

178:                                              ; preds = %166, %163
  %179 = load i32, ptr %24, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  ret i32 %179
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) #2

declare void @_tx_thread_system_preempt_check() #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() #2

declare i32 @_tx_thread_create(ptr noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 24}
!14 = !{!"TX_THREAD_STRUCT", !10, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !6, i64 112, !6, i64 120, !10, i64 128, !15, i64 136, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !10, i64 224, !6, i64 232, !12, i64 240, !12, i64 244, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !12, i64 280, !12, i64 284, !12, i64 288, !12, i64 292, !6, i64 296, !6, i64 304, !6, i64 312, !10, i64 320}
!15 = !{!"TX_TIMER_INTERNAL_STRUCT", !10, i64 0, !10, i64 8, !6, i64 16, !10, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!16 = !{!14, !6, i64 32}
!17 = !{!14, !6, i64 248}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_preempt_disable = external global i32, align 4
@_tx_thread_created_ptr = external local_unnamed_addr global ptr, align 8
@_tx_thread_created_count = external local_unnamed_addr global i64, align 8
@_tx_thread_current_ptr = external local_unnamed_addr global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8
@_tx_thread_system_state = external global i64, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_thread_create(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i32 noundef %6, i32 noundef %7, i64 noundef %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #0 {
  %12 = icmp ne ptr %0, null
  %.not = icmp eq i32 %10, 328
  %or.cond = and i1 %12, %.not
  br i1 %or.cond, label %13, label %.thread

13:                                               ; preds = %11
  %14 = tail call i32 @__disable_interrupts()
  %15 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  %16 = add i32 %15, 1
  store volatile i32 %16, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  tail call void @__restore_interrupt(i32 noundef %14)
  %17 = add i64 %5, 4294967295
  %18 = and i64 %17, 4294967295
  %19 = getelementptr inbounds i8, ptr %4, i64 %18
  %20 = load i64, ptr @_tx_thread_created_count, align 8, !tbaa !9
  %.04668 = load ptr, ptr @_tx_thread_created_ptr, align 8, !tbaa !11
  %.not77 = icmp eq i64 %20, 0
  br i1 %.not77, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %13, %36
  %.04672 = phi ptr [ %.046, %36 ], [ %.04668, %13 ]
  %.071 = phi ptr [ %.2, %36 ], [ %4, %13 ]
  %.04770 = phi i64 [ %38, %36 ], [ 0, %13 ]
  %.04869 = phi i32 [ %.351, %36 ], [ 0, %13 ]
  %21 = icmp eq ptr %.04672, %0
  %22 = icmp eq i32 %.04869, 1
  %23 = select i1 %21, i1 true, i1 %22
  br i1 %23, label %._crit_edge, label %24

24:                                               ; preds = %.lr.ph
  %25 = getelementptr inbounds i8, ptr %.04672, i64 24
  %26 = load ptr, ptr %25, align 8, !tbaa !13
  %.not55 = icmp ult ptr %.071, %26
  br i1 %.not55, label %31, label %27

27:                                               ; preds = %24
  %28 = getelementptr inbounds i8, ptr %.04672, i64 32
  %29 = load ptr, ptr %28, align 8, !tbaa !16
  %30 = icmp ult ptr %.071, %29
  %spec.select58 = zext i1 %30 to i32
  %spec.select59 = select i1 %30, ptr null, ptr %.071
  br label %31

31:                                               ; preds = %27, %24
  %.250 = phi i32 [ 0, %24 ], [ %spec.select58, %27 ]
  %.1 = phi ptr [ %.071, %24 ], [ %spec.select59, %27 ]
  %.not56 = icmp ult ptr %19, %26
  br i1 %.not56, label %36, label %32

32:                                               ; preds = %31
  %33 = getelementptr inbounds i8, ptr %.04672, i64 32
  %34 = load ptr, ptr %33, align 8, !tbaa !16
  %35 = icmp ult ptr %19, %34
  %spec.select60 = select i1 %35, i32 1, i32 %.250
  %spec.select61 = select i1 %35, ptr null, ptr %.1
  br label %36

36:                                               ; preds = %32, %31
  %.351 = phi i32 [ %.250, %31 ], [ %spec.select60, %32 ]
  %.2 = phi ptr [ %.1, %31 ], [ %spec.select61, %32 ]
  %37 = getelementptr inbounds i8, ptr %.04672, i64 248
  %38 = add nuw i64 %.04770, 1
  %.046 = load ptr, ptr %37, align 8, !tbaa !11
  %exitcond.not = icmp eq i64 %38, %20
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !17

._crit_edge:                                      ; preds = %36, %.lr.ph, %13
  %.0.lcssa = phi ptr [ %4, %13 ], [ %.071, %.lr.ph ], [ %.2, %36 ]
  %.046.lcssa = phi ptr [ %.04668, %13 ], [ %.04672, %.lr.ph ], [ %.046, %36 ]
  %39 = tail call i32 @__disable_interrupts()
  %40 = load volatile i32, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  %41 = add i32 %40, -1
  store volatile i32 %41, ptr @_tx_thread_preempt_disable, align 4, !tbaa !5
  tail call void @__restore_interrupt(i32 noundef %39)
  tail call void @_tx_thread_system_preempt_check() #3
  %42 = icmp eq ptr %.046.lcssa, %0
  br i1 %42, label %.thread, label %43

43:                                               ; preds = %._crit_edge
  %44 = icmp eq ptr %.0.lcssa, null
  %45 = icmp eq ptr %2, null
  %or.cond66 = or i1 %45, %44
  br i1 %or.cond66, label %.thread, label %46

46:                                               ; preds = %43
  %47 = icmp ult i64 %5, 200
  br i1 %47, label %.thread, label %48

48:                                               ; preds = %46
  %49 = icmp ugt i32 %6, 31
  br i1 %49, label %.thread, label %50

50:                                               ; preds = %48
  %51 = icmp ugt i32 %7, %6
  br i1 %51, label %.thread, label %52

52:                                               ; preds = %50
  %53 = icmp ugt i32 %9, 1
  br i1 %53, label %.thread, label %54

54:                                               ; preds = %52
  %55 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !11
  %.not67 = icmp eq ptr %55, @_tx_timer_thread
  %56 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %57 = tail call i32 @_tx_ipsr_get()
  %58 = zext i32 %57 to i64
  %59 = or i64 %56, %58
  %.not57 = icmp eq i64 %59, 0
  br i1 %.not57, label %67, label %60

60:                                               ; preds = %54
  %61 = load volatile i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %62 = tail call i32 @_tx_ipsr_get()
  %63 = zext i32 %62 to i64
  %64 = or i64 %61, %63
  %65 = icmp ult i64 %64, 4042322160
  %brmerge = select i1 %65, i1 true, i1 %.not67
  %66 = select i1 %65, i1 true, i1 %.not67
  %.mux = select i1 %66, i32 19, i32 0
  br i1 %brmerge, label %.thread, label %68

67:                                               ; preds = %54
  br i1 %.not67, label %.thread, label %68

68:                                               ; preds = %60, %67
  %69 = tail call i32 @_tx_thread_create(ptr noundef nonnull %0, ptr noundef %1, ptr noundef nonnull %2, i64 noundef %3, ptr noundef nonnull %.0.lcssa, i64 noundef %5, i32 noundef %6, i32 noundef %7, i64 noundef %8, i32 noundef %9) #3
  br label %.thread

.thread:                                          ; preds = %60, %52, %50, %48, %46, %43, %._crit_edge, %11, %68, %67
  %.245 = phi i32 [ %69, %68 ], [ 19, %67 ], [ 16, %52 ], [ 24, %50 ], [ 15, %48 ], [ 5, %46 ], [ 3, %43 ], [ 14, %._crit_edge ], [ 14, %11 ], [ %.mux, %60 ]
  ret i32 %.245
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__disable_interrupts() local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__restore_interrupt(i32 noundef) local_unnamed_addr #1

declare void @_tx_thread_system_preempt_check() local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @_tx_ipsr_get() local_unnamed_addr #1

declare i32 @_tx_thread_create(ptr noundef, ptr noundef, ptr noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !12, i64 24}
!14 = !{!"TX_THREAD_STRUCT", !10, i64 0, !10, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !12, i64 112, !12, i64 120, !10, i64 128, !15, i64 136, !12, i64 192, !12, i64 200, !12, i64 208, !12, i64 216, !10, i64 224, !12, i64 232, !6, i64 240, !6, i64 244, !12, i64 248, !12, i64 256, !12, i64 264, !12, i64 272, !6, i64 280, !6, i64 284, !6, i64 288, !6, i64 292, !12, i64 296, !12, i64 304, !12, i64 312, !10, i64 320}
!15 = !{!"TX_TIMER_INTERNAL_STRUCT", !10, i64 0, !10, i64 8, !12, i64 16, !10, i64 24, !12, i64 32, !12, i64 40, !12, i64 48}
!16 = !{!14, !12, i64 32}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass