; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_transform_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [93 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_transform_08way_permutevar_network_avx512 = external hidden unnamed_addr constant [60 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_08way_permutevar_network_avx512(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2 {
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i8 %1, ptr %8, align 1, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !10
  store i32 %3, ptr %10, align 4, !tbaa !10
  store i32 %4, ptr %11, align 4, !tbaa !10
  store i32 %5, ptr %12, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !10
  %19 = load i32, ptr %11, align 4, !tbaa !10
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %33

21:                                               ; preds = %6
  %22 = load i32, ptr %11, align 4, !tbaa !10
  %23 = icmp ne i32 %22, 8
  br i1 %23, label %24, label %33

24:                                               ; preds = %21
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !10
  %27 = icmp ult i32 1, %26
  br i1 %27, label %28, label %30

28:                                               ; preds = %24
  %29 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !10
  br label %31

30:                                               ; preds = %24
  br label %31

31:                                               ; preds = %30, %28
  %32 = phi i32 [ %29, %28 ], [ 1, %30 ]
  call void @libxsmm_handle_error(ptr noundef %25, i32 noundef 90000, ptr noundef @__func__.libxsmm_generator_transform_08way_permutevar_network_avx512, ptr noundef @.str, i32 noundef 158, i32 noundef %32)
  store i32 1, ptr %14, align 4
  br label %99

33:                                               ; preds = %21, %6
  store i32 0, ptr %13, align 4, !tbaa !10
  br label %34

34:                                               ; preds = %60, %33
  %35 = load i32, ptr %13, align 4, !tbaa !10
  %36 = icmp ult i32 %35, 4
  br i1 %36, label %37, label %63

37:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %38 = load i32, ptr %13, align 4, !tbaa !10
  %39 = load i32, ptr %11, align 4, !tbaa !10
  %40 = add i32 %38, %39
  store i32 %40, ptr %15, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %41 = load i32, ptr %13, align 4, !tbaa !10
  %42 = udiv i32 %41, 2
  %43 = mul i32 %42, 4
  %44 = load i32, ptr %13, align 4, !tbaa !10
  %45 = urem i32 %44, 2
  %46 = add i32 %43, %45
  %47 = load i32, ptr %11, align 4, !tbaa !10
  %48 = add i32 %46, %47
  %49 = add i32 %48, 8
  %50 = urem i32 %49, 16
  store i32 %50, ptr %16, align 4, !tbaa !10
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = load i8, ptr %8, align 1, !tbaa !9
  %53 = load i32, ptr %15, align 4, !tbaa !10
  %54 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %51, i32 noundef -528083345, i8 noundef signext %52, i32 noundef %53, i32 noundef 255, i32 noundef %54, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024)
  %55 = load ptr, ptr %7, align 8, !tbaa !5
  %56 = load i8, ptr %8, align 1, !tbaa !9
  %57 = load i32, ptr %15, align 4, !tbaa !10
  %58 = load i32, ptr %16, align 4, !tbaa !10
  %59 = add i32 %58, 2
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %55, i32 noundef -528083345, i8 noundef signext %56, i32 noundef %57, i32 noundef 255, i32 noundef %59, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024)
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %60

60:                                               ; preds = %37
  %61 = load i32, ptr %13, align 4, !tbaa !10
  %62 = add i32 %61, 1
  store i32 %62, ptr %13, align 4, !tbaa !10
  br label %34, !llvm.loop !12

63:                                               ; preds = %34
  store i32 0, ptr %13, align 4, !tbaa !10
  br label %64

64:                                               ; preds = %95, %63
  %65 = load i32, ptr %13, align 4, !tbaa !10
  %66 = icmp ult i32 %65, 4
  br i1 %66, label %67, label %98

67:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %68 = load i32, ptr %13, align 4, !tbaa !10
  %69 = load i32, ptr %11, align 4, !tbaa !10
  %70 = add i32 %68, %69
  %71 = add i32 %70, 4
  store i32 %71, ptr %17, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %72 = load i32, ptr %13, align 4, !tbaa !10
  %73 = udiv i32 %72, 2
  %74 = mul i32 %73, 4
  %75 = load i32, ptr %13, align 4, !tbaa !10
  %76 = urem i32 %75, 2
  %77 = add i32 %74, %76
  %78 = load i32, ptr %11, align 4, !tbaa !10
  %79 = add i32 %77, %78
  %80 = add i32 %79, 8
  %81 = urem i32 %80, 16
  store i32 %81, ptr %18, align 4, !tbaa !10
  %82 = load ptr, ptr %7, align 8, !tbaa !5
  %83 = load i32, ptr %12, align 4, !tbaa !10
  %84 = load i8, ptr %8, align 1, !tbaa !9
  %85 = load i32, ptr %17, align 4, !tbaa !10
  %86 = load i32, ptr %9, align 4, !tbaa !10
  %87 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %82, i32 noundef %83, i8 noundef signext %84, i32 noundef %85, i32 noundef %86, i32 noundef %87, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024)
  %88 = load ptr, ptr %7, align 8, !tbaa !5
  %89 = load i32, ptr %12, align 4, !tbaa !10
  %90 = load i8, ptr %8, align 1, !tbaa !9
  %91 = load i32, ptr %17, align 4, !tbaa !10
  %92 = load i32, ptr %10, align 4, !tbaa !10
  %93 = load i32, ptr %18, align 4, !tbaa !10
  %94 = add i32 %93, 2
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %88, i32 noundef %89, i8 noundef signext %90, i32 noundef %91, i32 noundef %92, i32 noundef %94, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024)
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %95

95:                                               ; preds = %67
  %96 = load i32, ptr %13, align 4, !tbaa !10
  %97 = add i32 %96, 1
  store i32 %97, ptr %13, align 4, !tbaa !10
  br label %64, !llvm.loop !14

98:                                               ; preds = %64
  store i32 0, ptr %14, align 4
  br label %99

99:                                               ; preds = %98, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %100 = load i32, ptr %14, align 4
  switch i32 %100, label %102 [
    i32 0, label %101
    i32 1, label %101
  ]

101:                                              ; preds = %99, %99
  ret void

102:                                              ; preds = %99
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [93 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_transform_08way_permutevar_network_avx512 = external hidden unnamed_addr constant [60 x i8], align 1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_transform_08way_permutevar_network_avx512(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = and i32 %4, -9
  %or.cond.not = icmp eq i32 %7, 0
  br i1 %or.cond.not, label %.preheader37.preheader, label %23

.preheader37.preheader:                           ; preds = %6
  %8 = xor i32 %4, 8
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %4, i32 noundef 255, i32 noundef %8, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %9 = or disjoint i32 %8, 2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %4, i32 noundef 255, i32 noundef %9, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %10 = or disjoint i32 %4, 1
  %11 = xor i32 %4, 9
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %10, i32 noundef 255, i32 noundef %11, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %12 = or disjoint i32 %11, 2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %10, i32 noundef 255, i32 noundef %12, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %13 = or disjoint i32 %4, 2
  %14 = or disjoint i32 %4, 4
  %15 = xor i32 %4, 12
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %13, i32 noundef 255, i32 noundef %15, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %16 = or disjoint i32 %15, 2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %13, i32 noundef 255, i32 noundef %16, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %17 = or disjoint i32 %4, 3
  %18 = xor i32 %4, 13
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %17, i32 noundef 255, i32 noundef %18, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %19 = or disjoint i32 %18, 2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef -528083345, i8 noundef signext %1, i32 noundef %17, i32 noundef 255, i32 noundef %19, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %14, i32 noundef %2, i32 noundef %8, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %14, i32 noundef %3, i32 noundef %9, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %20 = or disjoint i32 %4, 5
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %20, i32 noundef %2, i32 noundef %11, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %20, i32 noundef %3, i32 noundef %12, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %21 = or disjoint i32 %4, 6
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %21, i32 noundef %2, i32 noundef %15, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %21, i32 noundef %3, i32 noundef %16, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  %22 = or disjoint i32 %4, 7
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %22, i32 noundef %2, i32 noundef %18, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %0, i32 noundef %5, i8 noundef signext %1, i32 noundef %22, i32 noundef %3, i32 noundef %19, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef 1024) #2
  br label %.loopexit

23:                                               ; preds = %6
  %24 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !5
  %25 = icmp ugt i32 %24, 1
  %26 = load i32, ptr @libxsmm_verbosity, align 4
  %27 = select i1 %25, i32 %26, i32 1
  tail call void @libxsmm_handle_error(ptr noundef %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_generator_transform_08way_permutevar_network_avx512, ptr noundef nonnull @.str, i32 noundef 158, i32 noundef %27) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader37.preheader, %23
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass