; LLVM IR from libxsmm/libxsmm :: src (generator_packed_spgemm_csc_bsparse_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve = external hidden unnamed_addr constant [423 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) #3 {
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca [28 x [4 x i32]], align 16
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  store ptr %0, ptr %16, align 8, !tbaa !5
  store ptr %1, ptr %17, align 8, !tbaa !5
  store ptr %2, ptr %18, align 8, !tbaa !5
  store ptr %3, ptr %19, align 8, !tbaa !5
  store ptr %4, ptr %20, align 8, !tbaa !5
  store ptr %5, ptr %21, align 8, !tbaa !5
  store ptr %6, ptr %22, align 8, !tbaa !5
  store ptr %7, ptr %23, align 8, !tbaa !5
  store i32 %8, ptr %24, align 4, !tbaa !9
  store i32 %9, ptr %25, align 4, !tbaa !9
  store i32 %10, ptr %26, align 4, !tbaa !9
  store i32 %11, ptr %27, align 4, !tbaa !9
  store i32 %12, ptr %28, align 4, !tbaa !9
  store i32 %13, ptr %29, align 4, !tbaa !9
  store i32 %14, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #5
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #5
  store i32 0, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #5
  store i32 0, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #5
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #5
  %44 = load i32, ptr %25, align 4, !tbaa !9
  %45 = load i32, ptr %24, align 4, !tbaa !9
  %46 = sub i32 %44, %45
  %47 = load i32, ptr %28, align 4, !tbaa !9
  %48 = mul i32 %46, %47
  store i32 %48, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #5
  %49 = load i32, ptr %25, align 4, !tbaa !9
  %50 = load i32, ptr %24, align 4, !tbaa !9
  %51 = sub i32 %49, %50
  store i32 %51, ptr %36, align 4, !tbaa !9
  %52 = load ptr, ptr %23, align 8, !tbaa !5
  %53 = load i32, ptr %28, align 4, !tbaa !9
  %54 = icmp ugt i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %15
  br label %57

56:                                               ; preds = %15
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 459, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve) #6
  unreachable

57:                                               ; preds = %55
  %58 = load i32, ptr %27, align 4, !tbaa !9
  %59 = load i32, ptr %28, align 4, !tbaa !9
  %60 = udiv i32 %58, %59
  %61 = icmp ugt i32 %60, 1
  br i1 %61, label %62, label %71

62:                                               ; preds = %57
  %63 = load ptr, ptr %16, align 8, !tbaa !5
  %64 = load ptr, ptr %17, align 8, !tbaa !5
  %65 = load ptr, ptr %18, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %65, i32 0, i32 25
  %67 = load i32, ptr %66, align 4, !tbaa !11
  %68 = load i32, ptr %27, align 4, !tbaa !9
  %69 = load i32, ptr %28, align 4, !tbaa !9
  %70 = udiv i32 %68, %69
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %63, ptr noundef %64, i32 noundef %67, i32 noundef %70)
  br label %71

71:                                               ; preds = %62, %57
  %72 = load i32, ptr %29, align 4, !tbaa !9
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %74, label %75

74:                                               ; preds = %71
  br label %75

75:                                               ; preds = %74, %71
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %159, %75
  %77 = load i32, ptr %31, align 4, !tbaa !9
  %78 = load i32, ptr %36, align 4, !tbaa !9
  %79 = icmp ult i32 %77, %78
  br i1 %79, label %80, label %162

80:                                               ; preds = %76
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %155, %80
  %82 = load i32, ptr %32, align 4, !tbaa !9
  %83 = load i32, ptr %28, align 4, !tbaa !9
  %84 = icmp ult i32 %82, %83
  br i1 %84, label %85, label %158

85:                                               ; preds = %81
  %86 = load ptr, ptr %20, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 1, !tbaa !13
  %89 = and i32 4, %88
  %90 = icmp ne i32 0, %89
  br i1 %90, label %91, label %101

91:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #5
  %92 = load i32, ptr %31, align 4, !tbaa !9
  %93 = load i32, ptr %28, align 4, !tbaa !9
  %94 = mul i32 %92, %93
  %95 = load i32, ptr %32, align 4, !tbaa !9
  %96 = add i32 %94, %95
  store i32 %96, ptr %37, align 4, !tbaa !9
  %97 = load ptr, ptr %16, align 8, !tbaa !5
  %98 = load i32, ptr %37, align 4, !tbaa !9
  %99 = load i32, ptr %37, align 4, !tbaa !9
  %100 = load i32, ptr %37, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %97, i32 noundef 77606915, i32 noundef %98, i32 noundef %99, i8 noundef zeroext -1, i32 noundef %100, i32 noundef 127, i32 noundef 3)
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #5
  br label %154

101:                                              ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #5
  %102 = load i32, ptr %31, align 4, !tbaa !9
  %103 = load i32, ptr %28, align 4, !tbaa !9
  %104 = mul i32 %102, %103
  %105 = load i32, ptr %32, align 4, !tbaa !9
  %106 = add i32 %104, %105
  store i32 %106, ptr %38, align 4, !tbaa !9
  %107 = load i32, ptr %32, align 4, !tbaa !9
  %108 = load i32, ptr %28, align 4, !tbaa !9
  %109 = sub i32 %108, 1
  %110 = icmp eq i32 %107, %109
  br i1 %110, label %111, label %115

111:                                              ; preds = %101
  %112 = load i32, ptr %29, align 4, !tbaa !9
  %113 = icmp ne i32 %112, 0
  br i1 %113, label %114, label %115

114:                                              ; preds = %111
  br label %153

115:                                              ; preds = %111, %101
  %116 = load ptr, ptr %16, align 8, !tbaa !5
  %117 = load ptr, ptr %18, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %117, i32 0, i32 24
  %119 = load i32, ptr %118, align 4, !tbaa !17
  %120 = load i32, ptr %24, align 4, !tbaa !9
  %121 = zext i32 %120 to i64
  %122 = load i32, ptr %31, align 4, !tbaa !9
  %123 = zext i32 %122 to i64
  %124 = add nsw i64 %121, %123
  %125 = load i32, ptr %30, align 4, !tbaa !9
  %126 = zext i32 %125 to i64
  %127 = mul nsw i64 %124, %126
  %128 = load i32, ptr %26, align 4, !tbaa !9
  %129 = zext i32 %128 to i64
  %130 = load i32, ptr %32, align 4, !tbaa !9
  %131 = zext i32 %130 to i64
  %132 = add nsw i64 %129, %131
  %133 = load ptr, ptr %19, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %133, i32 0, i32 2
  %135 = load i32, ptr %134, align 8, !tbaa !18
  %136 = zext i32 %135 to i64
  %137 = mul nsw i64 %132, %136
  %138 = add nsw i64 %127, %137
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %116, i32 noundef %119, i64 noundef %138)
  %139 = load ptr, ptr %16, align 8, !tbaa !5
  %140 = load ptr, ptr %19, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %140, i32 0, i32 5
  %142 = load i32, ptr %141, align 4, !tbaa !21
  %143 = icmp eq i32 %142, 4
  %144 = zext i1 %143 to i64
  %145 = select i1 %143, i32 -1522515837, i32 -1512030077
  %146 = load ptr, ptr %18, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %146, i32 0, i32 5
  %148 = load i32, ptr %147, align 4, !tbaa !22
  %149 = load ptr, ptr %18, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %149, i32 0, i32 24
  %151 = load i32, ptr %150, align 4, !tbaa !17
  %152 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %139, i32 noundef %145, i32 noundef %148, i32 noundef %151, i32 noundef 0, i32 noundef %152, i32 noundef 0)
  br label %153

153:                                              ; preds = %115, %114
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #5
  br label %154

154:                                              ; preds = %153, %91
  br label %155

155:                                              ; preds = %154
  %156 = load i32, ptr %32, align 4, !tbaa !9
  %157 = add i32 %156, 1
  store i32 %157, ptr %32, align 4, !tbaa !9
  br label %81, !llvm.loop !23

158:                                              ; preds = %81
  br label %159

159:                                              ; preds = %158
  %160 = load i32, ptr %31, align 4, !tbaa !9
  %161 = add i32 %160, 1
  store i32 %161, ptr %31, align 4, !tbaa !9
  br label %76, !llvm.loop !25

162:                                              ; preds = %76
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %163

163:                                              ; preds = %390, %162
  %164 = load i32, ptr %33, align 4, !tbaa !9
  %165 = load ptr, ptr %20, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %165, i32 0, i32 2
  %167 = load i32, ptr %166, align 1, !tbaa !26
  %168 = icmp ult i32 %164, %167
  br i1 %168, label %169, label %393

169:                                              ; preds = %163
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #5
  store i32 0, ptr %39, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 448, ptr %40) #5
  call void @llvm.memset.p0.i64(ptr align 16 %40, i8 0, i64 448, i1 false)
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %170

170:                                              ; preds = %191, %169
  %171 = load i32, ptr %31, align 4, !tbaa !9
  %172 = load i32, ptr %36, align 4, !tbaa !9
  %173 = icmp ult i32 %171, %172
  br i1 %173, label %174, label %194

174:                                              ; preds = %170
  %175 = load i32, ptr %31, align 4, !tbaa !9
  %176 = zext i32 %175 to i64
  %177 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %176
  %178 = getelementptr inbounds [4 x i32], ptr %177, i64 0, i64 0
  store i32 -1, ptr %178, align 16, !tbaa !9
  %179 = load i32, ptr %31, align 4, !tbaa !9
  %180 = zext i32 %179 to i64
  %181 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %180
  %182 = getelementptr inbounds [4 x i32], ptr %181, i64 0, i64 1
  store i32 -1, ptr %182, align 4, !tbaa !9
  %183 = load i32, ptr %31, align 4, !tbaa !9
  %184 = zext i32 %183 to i64
  %185 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %184
  %186 = getelementptr inbounds [4 x i32], ptr %185, i64 0, i64 2
  store i32 -1, ptr %186, align 8, !tbaa !9
  %187 = load i32, ptr %31, align 4, !tbaa !9
  %188 = zext i32 %187 to i64
  %189 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %188
  %190 = getelementptr inbounds [4 x i32], ptr %189, i64 0, i64 3
  store i32 -1, ptr %190, align 4, !tbaa !9
  br label %191

191:                                              ; preds = %174
  %192 = load i32, ptr %31, align 4, !tbaa !9
  %193 = add i32 %192, 1
  store i32 %193, ptr %31, align 4, !tbaa !9
  br label %170, !llvm.loop !27

194:                                              ; preds = %170
  store i32 0, ptr %34, align 4, !tbaa !9
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %195

195:                                              ; preds = %259, %194
  %196 = load i32, ptr %31, align 4, !tbaa !9
  %197 = load i32, ptr %36, align 4, !tbaa !9
  %198 = icmp ult i32 %196, %197
  br i1 %198, label %199, label %262

199:                                              ; preds = %195
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #5
  %200 = load ptr, ptr %22, align 8, !tbaa !5
  %201 = load i32, ptr %24, align 4, !tbaa !9
  %202 = load i32, ptr %31, align 4, !tbaa !9
  %203 = add i32 %201, %202
  %204 = add i32 %203, 1
  %205 = zext i32 %204 to i64
  %206 = getelementptr inbounds i32, ptr %200, i64 %205
  %207 = load i32, ptr %206, align 4, !tbaa !9
  %208 = load ptr, ptr %22, align 8, !tbaa !5
  %209 = load i32, ptr %24, align 4, !tbaa !9
  %210 = load i32, ptr %31, align 4, !tbaa !9
  %211 = add i32 %209, %210
  %212 = zext i32 %211 to i64
  %213 = getelementptr inbounds i32, ptr %208, i64 %212
  %214 = load i32, ptr %213, align 4, !tbaa !9
  %215 = sub i32 %207, %214
  store i32 %215, ptr %41, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %42) #5
  %216 = load ptr, ptr %22, align 8, !tbaa !5
  %217 = load i32, ptr %24, align 4, !tbaa !9
  %218 = load i32, ptr %31, align 4, !tbaa !9
  %219 = add i32 %217, %218
  %220 = zext i32 %219 to i64
  %221 = getelementptr inbounds i32, ptr %216, i64 %220
  %222 = load i32, ptr %221, align 4, !tbaa !9
  store i32 %222, ptr %42, align 4, !tbaa !9
  store i32 0, ptr %39, align 4, !tbaa !9
  br label %223

223:                                              ; preds = %247, %199
  %224 = load i32, ptr %39, align 4, !tbaa !9
  %225 = load i32, ptr %41, align 4, !tbaa !9
  %226 = icmp ult i32 %224, %225
  br i1 %226, label %227, label %250

227:                                              ; preds = %223
  %228 = load i32, ptr %33, align 4, !tbaa !9
  %229 = load ptr, ptr %21, align 8, !tbaa !5
  %230 = load i32, ptr %42, align 4, !tbaa !9
  %231 = load i32, ptr %39, align 4, !tbaa !9
  %232 = add i32 %230, %231
  %233 = zext i32 %232 to i64
  %234 = getelementptr inbounds i32, ptr %229, i64 %233
  %235 = load i32, ptr %234, align 4, !tbaa !9
  %236 = icmp eq i32 %228, %235
  br i1 %236, label %237, label %246

237:                                              ; preds = %227
  %238 = load i32, ptr %42, align 4, !tbaa !9
  %239 = load i32, ptr %39, align 4, !tbaa !9
  %240 = add i32 %238, %239
  %241 = load i32, ptr %31, align 4, !tbaa !9
  %242 = zext i32 %241 to i64
  %243 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %242
  %244 = getelementptr inbounds [4 x i32], ptr %243, i64 0, i64 0
  store i32 %240, ptr %244, align 16, !tbaa !9
  %245 = load i32, ptr %41, align 4, !tbaa !9
  store i32 %245, ptr %39, align 4, !tbaa !9
  br label %246

246:                                              ; preds = %237, %227
  br label %247

247:                                              ; preds = %246
  %248 = load i32, ptr %39, align 4, !tbaa !9
  %249 = add i32 %248, 1
  store i32 %249, ptr %39, align 4, !tbaa !9
  br label %223, !llvm.loop !28

250:                                              ; preds = %223
  %251 = load i32, ptr %31, align 4, !tbaa !9
  %252 = zext i32 %251 to i64
  %253 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %252
  %254 = getelementptr inbounds [4 x i32], ptr %253, i64 0, i64 0
  %255 = load i32, ptr %254, align 16, !tbaa !9
  %256 = icmp ne i32 %255, -1
  br i1 %256, label %257, label %258

257:                                              ; preds = %250
  store i32 1, ptr %34, align 4, !tbaa !9
  br label %258

258:                                              ; preds = %257, %250
  call void @llvm.lifetime.end.p0(i64 4, ptr %42) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #5
  br label %259

259:                                              ; preds = %258
  %260 = load i32, ptr %31, align 4, !tbaa !9
  %261 = add i32 %260, 1
  store i32 %261, ptr %31, align 4, !tbaa !9
  br label %195, !llvm.loop !29

262:                                              ; preds = %195
  %263 = load i32, ptr %34, align 4, !tbaa !9
  %264 = icmp ne i32 %263, 0
  br i1 %264, label %265, label %388

265:                                              ; preds = %262
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %266

266:                                              ; preds = %384, %265
  %267 = load i32, ptr %32, align 4, !tbaa !9
  %268 = load i32, ptr %28, align 4, !tbaa !9
  %269 = icmp ult i32 %267, %268
  br i1 %269, label %270, label %387

270:                                              ; preds = %266
  %271 = load i32, ptr %32, align 4, !tbaa !9
  %272 = load i32, ptr %28, align 4, !tbaa !9
  %273 = sub i32 %272, 1
  %274 = icmp eq i32 %271, %273
  br i1 %274, label %275, label %279

275:                                              ; preds = %270
  %276 = load i32, ptr %29, align 4, !tbaa !9
  %277 = icmp ne i32 %276, 0
  br i1 %277, label %278, label %279

278:                                              ; preds = %275
  br label %314

279:                                              ; preds = %275, %270
  %280 = load ptr, ptr %16, align 8, !tbaa !5
  %281 = load ptr, ptr %18, align 8, !tbaa !5
  %282 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %281, i32 0, i32 22
  %283 = load i32, ptr %282, align 4, !tbaa !30
  %284 = load i32, ptr %33, align 4, !tbaa !9
  %285 = zext i32 %284 to i64
  %286 = load i32, ptr %30, align 4, !tbaa !9
  %287 = zext i32 %286 to i64
  %288 = mul nsw i64 %285, %287
  %289 = load i32, ptr %26, align 4, !tbaa !9
  %290 = zext i32 %289 to i64
  %291 = load i32, ptr %32, align 4, !tbaa !9
  %292 = zext i32 %291 to i64
  %293 = add nsw i64 %290, %292
  %294 = load ptr, ptr %19, align 8, !tbaa !5
  %295 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %294, i32 0, i32 2
  %296 = load i32, ptr %295, align 8, !tbaa !18
  %297 = zext i32 %296 to i64
  %298 = mul nsw i64 %293, %297
  %299 = add nsw i64 %288, %298
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %280, i32 noundef %283, i64 noundef %299)
  %300 = load ptr, ptr %16, align 8, !tbaa !5
  %301 = load ptr, ptr %19, align 8, !tbaa !5
  %302 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %301, i32 0, i32 3
  %303 = load i32, ptr %302, align 4, !tbaa !31
  %304 = icmp eq i32 %303, 4
  %305 = zext i1 %304 to i64
  %306 = select i1 %304, i32 -1522515837, i32 -1512030077
  %307 = load ptr, ptr %18, align 8, !tbaa !5
  %308 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %307, i32 0, i32 1
  %309 = load i32, ptr %308, align 4, !tbaa !32
  %310 = load ptr, ptr %18, align 8, !tbaa !5
  %311 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %310, i32 0, i32 22
  %312 = load i32, ptr %311, align 4, !tbaa !30
  %313 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %300, i32 noundef %306, i32 noundef %309, i32 noundef %312, i32 noundef 0, i32 noundef %313, i32 noundef 0)
  br label %314

314:                                              ; preds = %279, %278
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %315

315:                                              ; preds = %380, %314
  %316 = load i32, ptr %31, align 4, !tbaa !9
  %317 = load i32, ptr %36, align 4, !tbaa !9
  %318 = icmp ult i32 %316, %317
  br i1 %318, label %319, label %383

319:                                              ; preds = %315
  %320 = load i32, ptr %31, align 4, !tbaa !9
  %321 = zext i32 %320 to i64
  %322 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %321
  %323 = getelementptr inbounds [4 x i32], ptr %322, i64 0, i64 0
  %324 = load i32, ptr %323, align 16, !tbaa !9
  %325 = icmp ne i32 %324, -1
  br i1 %325, label %326, label %379

326:                                              ; preds = %319
  %327 = load ptr, ptr %16, align 8, !tbaa !5
  %328 = load ptr, ptr %18, align 8, !tbaa !5
  %329 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %328, i32 0, i32 23
  %330 = load i32, ptr %329, align 4, !tbaa !33
  %331 = load i32, ptr %31, align 4, !tbaa !9
  %332 = zext i32 %331 to i64
  %333 = getelementptr inbounds [28 x [4 x i32]], ptr %40, i64 0, i64 %332
  %334 = getelementptr inbounds [4 x i32], ptr %333, i64 0, i64 0
  %335 = load i32, ptr %334, align 16, !tbaa !9
  %336 = sext i32 %335 to i64
  %337 = load ptr, ptr %19, align 8, !tbaa !5
  %338 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %337, i32 0, i32 3
  %339 = load i32, ptr %338, align 4, !tbaa !31
  %340 = zext i32 %339 to i64
  %341 = mul nsw i64 %336, %340
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %327, i32 noundef %330, i64 noundef %341)
  %342 = load ptr, ptr %16, align 8, !tbaa !5
  %343 = load ptr, ptr %18, align 8, !tbaa !5
  %344 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %343, i32 0, i32 3
  %345 = load i32, ptr %344, align 4, !tbaa !34
  %346 = load ptr, ptr %18, align 8, !tbaa !5
  %347 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %346, i32 0, i32 23
  %348 = load i32, ptr %347, align 4, !tbaa !33
  %349 = load ptr, ptr %18, align 8, !tbaa !5
  %350 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %349, i32 0, i32 23
  %351 = load i32, ptr %350, align 4, !tbaa !33
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %342, i32 noundef 184549383, i32 noundef %345, i32 noundef %348, i32 noundef %351, i32 noundef 0, i32 noundef 0)
  %352 = load ptr, ptr %16, align 8, !tbaa !5
  %353 = load ptr, ptr %19, align 8, !tbaa !5
  %354 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %353, i32 0, i32 3
  %355 = load i32, ptr %354, align 4, !tbaa !31
  %356 = icmp eq i32 %355, 4
  %357 = zext i1 %356 to i64
  %358 = select i1 %356, i32 -2059353978, i32 -2050957178
  %359 = load ptr, ptr %18, align 8, !tbaa !5
  %360 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %359, i32 0, i32 23
  %361 = load i32, ptr %360, align 4, !tbaa !33
  %362 = load i32, ptr %35, align 4, !tbaa !9
  %363 = add i32 %362, 1
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %352, i32 noundef %358, i32 noundef %361, i32 noundef 127, i32 noundef 0, i32 noundef %363, i32 noundef 0)
  %364 = load ptr, ptr %16, align 8, !tbaa !5
  %365 = load i32, ptr %35, align 4, !tbaa !9
  %366 = load i32, ptr %35, align 4, !tbaa !9
  %367 = add i32 %366, 1
  %368 = load i32, ptr %31, align 4, !tbaa !9
  %369 = load i32, ptr %28, align 4, !tbaa !9
  %370 = mul i32 %368, %369
  %371 = load i32, ptr %32, align 4, !tbaa !9
  %372 = add i32 %370, %371
  %373 = load ptr, ptr %19, align 8, !tbaa !5
  %374 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %373, i32 0, i32 3
  %375 = load i32, ptr %374, align 4, !tbaa !31
  %376 = icmp eq i32 %375, 4
  %377 = zext i1 %376 to i64
  %378 = select i1 %376, i32 2, i32 3
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %364, i32 noundef 1696596099, i32 noundef %365, i32 noundef %367, i8 noundef zeroext -1, i32 noundef %372, i32 noundef 0, i32 noundef %378)
  br label %379

379:                                              ; preds = %326, %319
  br label %380

380:                                              ; preds = %379
  %381 = load i32, ptr %31, align 4, !tbaa !9
  %382 = add i32 %381, 1
  store i32 %382, ptr %31, align 4, !tbaa !9
  br label %315, !llvm.loop !35

383:                                              ; preds = %315
  br label %384

384:                                              ; preds = %383
  %385 = load i32, ptr %32, align 4, !tbaa !9
  %386 = add i32 %385, 1
  store i32 %386, ptr %32, align 4, !tbaa !9
  br label %266, !llvm.loop !36

387:                                              ; preds = %266
  br label %389

388:                                              ; preds = %262
  br label %389

389:                                              ; preds = %388, %387
  call void @llvm.lifetime.end.p0(i64 448, ptr %40) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #5
  br label %390

390:                                              ; preds = %389
  %391 = load i32, ptr %33, align 4, !tbaa !9
  %392 = add i32 %391, 1
  store i32 %392, ptr %33, align 4, !tbaa !9
  br label %163, !llvm.loop !37

393:                                              ; preds = %163
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %394

394:                                              ; preds = %460, %393
  %395 = load i32, ptr %31, align 4, !tbaa !9
  %396 = load i32, ptr %36, align 4, !tbaa !9
  %397 = icmp ult i32 %395, %396
  br i1 %397, label %398, label %463

398:                                              ; preds = %394
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %399

399:                                              ; preds = %456, %398
  %400 = load i32, ptr %32, align 4, !tbaa !9
  %401 = load i32, ptr %28, align 4, !tbaa !9
  %402 = icmp ult i32 %400, %401
  br i1 %402, label %403, label %459

403:                                              ; preds = %399
  %404 = load i32, ptr %32, align 4, !tbaa !9
  %405 = load i32, ptr %28, align 4, !tbaa !9
  %406 = sub i32 %405, 1
  %407 = icmp eq i32 %404, %406
  br i1 %407, label %408, label %412

408:                                              ; preds = %403
  %409 = load i32, ptr %29, align 4, !tbaa !9
  %410 = icmp ne i32 %409, 0
  br i1 %410, label %411, label %412

411:                                              ; preds = %408
  br label %455

412:                                              ; preds = %408, %403
  call void @llvm.lifetime.start.p0(i64 4, ptr %43) #5
  %413 = load i32, ptr %31, align 4, !tbaa !9
  %414 = load i32, ptr %28, align 4, !tbaa !9
  %415 = mul i32 %413, %414
  %416 = load i32, ptr %32, align 4, !tbaa !9
  %417 = add i32 %415, %416
  store i32 %417, ptr %43, align 4, !tbaa !9
  %418 = load ptr, ptr %16, align 8, !tbaa !5
  %419 = load ptr, ptr %18, align 8, !tbaa !5
  %420 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %419, i32 0, i32 24
  %421 = load i32, ptr %420, align 4, !tbaa !17
  %422 = load i32, ptr %24, align 4, !tbaa !9
  %423 = zext i32 %422 to i64
  %424 = load i32, ptr %31, align 4, !tbaa !9
  %425 = zext i32 %424 to i64
  %426 = add nsw i64 %423, %425
  %427 = load i32, ptr %30, align 4, !tbaa !9
  %428 = zext i32 %427 to i64
  %429 = mul nsw i64 %426, %428
  %430 = load i32, ptr %26, align 4, !tbaa !9
  %431 = zext i32 %430 to i64
  %432 = load i32, ptr %32, align 4, !tbaa !9
  %433 = zext i32 %432 to i64
  %434 = add nsw i64 %431, %433
  %435 = load ptr, ptr %19, align 8, !tbaa !5
  %436 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %435, i32 0, i32 2
  %437 = load i32, ptr %436, align 8, !tbaa !18
  %438 = zext i32 %437 to i64
  %439 = mul nsw i64 %434, %438
  %440 = add nsw i64 %429, %439
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %418, i32 noundef %421, i64 noundef %440)
  %441 = load ptr, ptr %16, align 8, !tbaa !5
  %442 = load ptr, ptr %19, align 8, !tbaa !5
  %443 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %442, i32 0, i32 5
  %444 = load i32, ptr %443, align 4, !tbaa !21
  %445 = icmp eq i32 %444, 4
  %446 = zext i1 %445 to i64
  %447 = select i1 %445, i32 -448774013, i32 -438288253
  %448 = load ptr, ptr %18, align 8, !tbaa !5
  %449 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %448, i32 0, i32 5
  %450 = load i32, ptr %449, align 4, !tbaa !22
  %451 = load ptr, ptr %18, align 8, !tbaa !5
  %452 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %451, i32 0, i32 24
  %453 = load i32, ptr %452, align 4, !tbaa !17
  %454 = load i32, ptr %43, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %441, i32 noundef %447, i32 noundef %450, i32 noundef %453, i32 noundef 0, i32 noundef %454, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %43) #5
  br label %455

455:                                              ; preds = %412, %411
  br label %456

456:                                              ; preds = %455
  %457 = load i32, ptr %32, align 4, !tbaa !9
  %458 = add i32 %457, 1
  store i32 %458, ptr %32, align 4, !tbaa !9
  br label %399, !llvm.loop !38

459:                                              ; preds = %399
  br label %460

460:                                              ; preds = %459
  %461 = load i32, ptr %31, align 4, !tbaa !9
  %462 = add i32 %461, 1
  store i32 %462, ptr %31, align 4, !tbaa !9
  br label %394, !llvm.loop !39

463:                                              ; preds = %394
  %464 = load i32, ptr %27, align 4, !tbaa !9
  %465 = load i32, ptr %28, align 4, !tbaa !9
  %466 = udiv i32 %464, %465
  %467 = icmp ugt i32 %466, 1
  br i1 %467, label %468, label %568

468:                                              ; preds = %463
  %469 = load ptr, ptr %16, align 8, !tbaa !5
  %470 = load ptr, ptr %18, align 8, !tbaa !5
  %471 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %470, i32 0, i32 1
  %472 = load i32, ptr %471, align 4, !tbaa !32
  %473 = load ptr, ptr %18, align 8, !tbaa !5
  %474 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %473, i32 0, i32 22
  %475 = load i32, ptr %474, align 4, !tbaa !30
  %476 = load ptr, ptr %18, align 8, !tbaa !5
  %477 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %476, i32 0, i32 1
  %478 = load i32, ptr %477, align 4, !tbaa !32
  %479 = load i32, ptr %28, align 4, !tbaa !9
  %480 = zext i32 %479 to i64
  %481 = load ptr, ptr %19, align 8, !tbaa !5
  %482 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %481, i32 0, i32 2
  %483 = load i32, ptr %482, align 8, !tbaa !18
  %484 = zext i32 %483 to i64
  %485 = mul nsw i64 %480, %484
  %486 = load ptr, ptr %19, align 8, !tbaa !5
  %487 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %486, i32 0, i32 3
  %488 = load i32, ptr %487, align 4, !tbaa !31
  %489 = zext i32 %488 to i64
  %490 = mul nsw i64 %485, %489
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %469, i32 noundef 4096, i32 noundef %472, i32 noundef %475, i32 noundef %478, i64 noundef %490)
  %491 = load ptr, ptr %16, align 8, !tbaa !5
  %492 = load ptr, ptr %18, align 8, !tbaa !5
  %493 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %492, i32 0, i32 5
  %494 = load i32, ptr %493, align 4, !tbaa !22
  %495 = load ptr, ptr %18, align 8, !tbaa !5
  %496 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %495, i32 0, i32 24
  %497 = load i32, ptr %496, align 4, !tbaa !17
  %498 = load ptr, ptr %18, align 8, !tbaa !5
  %499 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %498, i32 0, i32 5
  %500 = load i32, ptr %499, align 4, !tbaa !22
  %501 = load i32, ptr %28, align 4, !tbaa !9
  %502 = zext i32 %501 to i64
  %503 = load ptr, ptr %19, align 8, !tbaa !5
  %504 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %503, i32 0, i32 2
  %505 = load i32, ptr %504, align 8, !tbaa !18
  %506 = zext i32 %505 to i64
  %507 = mul nsw i64 %502, %506
  %508 = load ptr, ptr %19, align 8, !tbaa !5
  %509 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %508, i32 0, i32 5
  %510 = load i32, ptr %509, align 4, !tbaa !21
  %511 = zext i32 %510 to i64
  %512 = mul nsw i64 %507, %511
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %491, i32 noundef 4096, i32 noundef %494, i32 noundef %497, i32 noundef %500, i64 noundef %512)
  %513 = load ptr, ptr %16, align 8, !tbaa !5
  %514 = load ptr, ptr %17, align 8, !tbaa !5
  %515 = load ptr, ptr %18, align 8, !tbaa !5
  %516 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %515, i32 0, i32 25
  %517 = load i32, ptr %516, align 4, !tbaa !11
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %513, ptr noundef %514, i32 noundef %517, i32 noundef 1)
  %518 = load ptr, ptr %16, align 8, !tbaa !5
  %519 = load ptr, ptr %18, align 8, !tbaa !5
  %520 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %519, i32 0, i32 1
  %521 = load i32, ptr %520, align 4, !tbaa !32
  %522 = load ptr, ptr %18, align 8, !tbaa !5
  %523 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %522, i32 0, i32 22
  %524 = load i32, ptr %523, align 4, !tbaa !30
  %525 = load ptr, ptr %18, align 8, !tbaa !5
  %526 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %525, i32 0, i32 1
  %527 = load i32, ptr %526, align 4, !tbaa !32
  %528 = load i32, ptr %27, align 4, !tbaa !9
  %529 = zext i32 %528 to i64
  %530 = load i32, ptr %28, align 4, !tbaa !9
  %531 = zext i32 %530 to i64
  %532 = sdiv i64 %529, %531
  %533 = load ptr, ptr %19, align 8, !tbaa !5
  %534 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %533, i32 0, i32 2
  %535 = load i32, ptr %534, align 8, !tbaa !18
  %536 = zext i32 %535 to i64
  %537 = mul nsw i64 %532, %536
  %538 = load ptr, ptr %19, align 8, !tbaa !5
  %539 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %538, i32 0, i32 3
  %540 = load i32, ptr %539, align 4, !tbaa !31
  %541 = zext i32 %540 to i64
  %542 = mul nsw i64 %537, %541
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %518, i32 noundef 4097, i32 noundef %521, i32 noundef %524, i32 noundef %527, i64 noundef %542)
  %543 = load ptr, ptr %16, align 8, !tbaa !5
  %544 = load ptr, ptr %18, align 8, !tbaa !5
  %545 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %544, i32 0, i32 5
  %546 = load i32, ptr %545, align 4, !tbaa !22
  %547 = load ptr, ptr %18, align 8, !tbaa !5
  %548 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %547, i32 0, i32 24
  %549 = load i32, ptr %548, align 4, !tbaa !17
  %550 = load ptr, ptr %18, align 8, !tbaa !5
  %551 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %550, i32 0, i32 5
  %552 = load i32, ptr %551, align 4, !tbaa !22
  %553 = load i32, ptr %27, align 4, !tbaa !9
  %554 = zext i32 %553 to i64
  %555 = load i32, ptr %28, align 4, !tbaa !9
  %556 = zext i32 %555 to i64
  %557 = sdiv i64 %554, %556
  %558 = load ptr, ptr %19, align 8, !tbaa !5
  %559 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %558, i32 0, i32 2
  %560 = load i32, ptr %559, align 8, !tbaa !18
  %561 = zext i32 %560 to i64
  %562 = mul nsw i64 %557, %561
  %563 = load ptr, ptr %19, align 8, !tbaa !5
  %564 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %563, i32 0, i32 5
  %565 = load i32, ptr %564, align 4, !tbaa !21
  %566 = zext i32 %565 to i64
  %567 = mul nsw i64 %562, %566
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %543, i32 noundef 4097, i32 noundef %546, i32 noundef %549, i32 noundef %552, i64 noundef %567)
  br label %568

568:                                              ; preds = %468, %463
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #5
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 100}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!14, !10, i64 24}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!12, !10, i64 96}
!18 = !{!19, !10, i64 8}
!19 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !20, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!20 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!21 = !{!19, !10, i64 20}
!22 = !{!12, !10, i64 20}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}
!26 = !{!14, !10, i64 8}
!27 = distinct !{!27, !24}
!28 = distinct !{!28, !24}
!29 = distinct !{!29, !24}
!30 = !{!12, !10, i64 88}
!31 = !{!19, !10, i64 12}
!32 = !{!12, !10, i64 4}
!33 = !{!12, !10, i64 92}
!34 = !{!12, !10, i64 12}
!35 = distinct !{!35, !24}
!36 = distinct !{!36, !24}
!37 = distinct !{!37, !24}
!38 = distinct !{!38, !24}
!39 = distinct !{!39, !24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve = external hidden unnamed_addr constant [423 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readnone %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) local_unnamed_addr #3 {
  %16 = alloca [28 x [4 x i32]], align 16
  %17 = sub i32 %9, %8
  %18 = mul i32 %17, %12
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %19, label %20

19:                                               ; preds = %15
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 459, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csc_bsparse_aarch64_kloop_sve) #6
  unreachable

20:                                               ; preds = %15
  %21 = udiv i32 %11, %12
  %22 = icmp ugt i32 %21, 1
  br i1 %22, label %23, label %26

23:                                               ; preds = %20
  %24 = getelementptr inbounds i8, ptr %2, i64 100
  %25 = load i32, ptr %24, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %25, i32 noundef %21) #7
  br label %26

26:                                               ; preds = %23, %20
  %.not237 = icmp eq i32 %9, %8
  br i1 %.not237, label %.preheader208, label %.preheader209.lr.ph

.preheader209.lr.ph:                              ; preds = %26
  %27 = getelementptr inbounds i8, ptr %4, i64 24
  %.not238 = icmp eq i32 %13, 0
  %28 = getelementptr inbounds i8, ptr %2, i64 96
  %29 = zext i32 %8 to i64
  %30 = zext i32 %14 to i64
  %31 = zext i32 %10 to i64
  %32 = getelementptr inbounds i8, ptr %3, i64 8
  %33 = getelementptr inbounds i8, ptr %3, i64 20
  %34 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not238, label %.preheader209.preheader, label %.preheader209.us.preheader

.preheader209.us.preheader:                       ; preds = %.preheader209.lr.ph
  %35 = add i32 %12, -1
  %36 = zext i32 %35 to i64
  %wide.trip.count252 = zext i32 %17 to i64
  %wide.trip.count = zext i32 %12 to i64
  br label %.preheader209.us

.preheader209.preheader:                          ; preds = %.preheader209.lr.ph
  %wide.trip.count263 = zext i32 %17 to i64
  %wide.trip.count258 = zext i32 %12 to i64
  br label %.preheader209

.preheader209.us:                                 ; preds = %.preheader209.us.preheader, %.split.us212
  %indvars.iv249 = phi i64 [ 0, %.preheader209.us.preheader ], [ %indvars.iv.next250, %.split.us212 ]
  %37 = trunc nuw i64 %indvars.iv249 to i32
  %38 = mul i32 %37, %12
  %39 = add nuw nsw i64 %indvars.iv249, %29
  %40 = mul nuw nsw i64 %39, %30
  br label %41

.split.us212:                                     ; preds = %63
  %indvars.iv.next250 = add nuw nsw i64 %indvars.iv249, 1
  %exitcond253.not = icmp eq i64 %indvars.iv.next250, %wide.trip.count252
  br i1 %exitcond253.not, label %.preheader208, label %.preheader209.us, !llvm.loop !10

41:                                               ; preds = %.preheader209.us, %63
  %indvars.iv = phi i64 [ 0, %.preheader209.us ], [ %indvars.iv.next, %63 ]
  %42 = load i32, ptr %27, align 1, !tbaa !12
  %43 = and i32 %42, 4
  %.not204.us214 = icmp eq i32 %43, 0
  br i1 %.not204.us214, label %47, label %44

44:                                               ; preds = %41
  %45 = trunc nuw i64 %indvars.iv to i32
  %46 = add i32 %38, %45
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %46, i32 noundef %46, i8 noundef zeroext -1, i32 noundef %46, i32 noundef 127, i32 noundef 3) #7
  br label %63

47:                                               ; preds = %41
  %48 = icmp eq i64 %indvars.iv, %36
  br i1 %48, label %63, label %49

49:                                               ; preds = %47
  %50 = trunc nuw i64 %indvars.iv to i32
  %51 = add i32 %38, %50
  %52 = load i32, ptr %28, align 4, !tbaa !16
  %53 = add nuw nsw i64 %indvars.iv, %31
  %54 = load i32, ptr %32, align 8, !tbaa !17
  %55 = zext i32 %54 to i64
  %56 = mul nuw nsw i64 %53, %55
  %57 = add nuw nsw i64 %56, %40
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %52, i64 noundef %57) #7
  %58 = load i32, ptr %33, align 4, !tbaa !21
  %59 = icmp eq i32 %58, 4
  %60 = select i1 %59, i32 -1522515837, i32 -1512030077
  %61 = load i32, ptr %34, align 4, !tbaa !22
  %62 = load i32, ptr %28, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef 0, i32 noundef %51, i32 noundef 0) #7
  br label %63

63:                                               ; preds = %49, %47, %44
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.split.us212, label %41, !llvm.loop !23

.preheader209:                                    ; preds = %.preheader209.preheader, %.split.us
  %indvars.iv260 = phi i64 [ 0, %.preheader209.preheader ], [ %indvars.iv.next261, %.split.us ]
  %64 = trunc nuw i64 %indvars.iv260 to i32
  %65 = mul i32 %64, %12
  %66 = add nuw nsw i64 %indvars.iv260, %29
  %67 = mul nuw nsw i64 %66, %30
  br label %68

68:                                               ; preds = %86, %.preheader209
  %indvars.iv254 = phi i64 [ %indvars.iv.next255, %86 ], [ 0, %.preheader209 ]
  %69 = load i32, ptr %27, align 1, !tbaa !12
  %70 = and i32 %69, 4
  %.not204.us = icmp eq i32 %70, 0
  %71 = trunc nuw i64 %indvars.iv254 to i32
  %72 = add i32 %65, %71
  br i1 %.not204.us, label %74, label %73

73:                                               ; preds = %68
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %72, i32 noundef %72, i8 noundef zeroext -1, i32 noundef %72, i32 noundef 127, i32 noundef 3) #7
  br label %86

74:                                               ; preds = %68
  %75 = load i32, ptr %28, align 4, !tbaa !16
  %76 = add nuw nsw i64 %indvars.iv254, %31
  %77 = load i32, ptr %32, align 8, !tbaa !17
  %78 = zext i32 %77 to i64
  %79 = mul nuw nsw i64 %76, %78
  %80 = add nuw nsw i64 %79, %67
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %75, i64 noundef %80) #7
  %81 = load i32, ptr %33, align 4, !tbaa !21
  %82 = icmp eq i32 %81, 4
  %83 = select i1 %82, i32 -1522515837, i32 -1512030077
  %84 = load i32, ptr %34, align 4, !tbaa !22
  %85 = load i32, ptr %28, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %83, i32 noundef %84, i32 noundef %85, i32 noundef 0, i32 noundef %72, i32 noundef 0) #7
  br label %86

86:                                               ; preds = %74, %73
  %indvars.iv.next255 = add nuw nsw i64 %indvars.iv254, 1
  %exitcond259.not = icmp eq i64 %indvars.iv.next255, %wide.trip.count258
  br i1 %exitcond259.not, label %.split.us, label %68, !llvm.loop !23

.split.us:                                        ; preds = %86
  %indvars.iv.next261 = add nuw nsw i64 %indvars.iv260, 1
  %exitcond264.not = icmp eq i64 %indvars.iv.next261, %wide.trip.count263
  br i1 %exitcond264.not, label %.preheader208, label %.preheader209, !llvm.loop !10

.preheader208:                                    ; preds = %.split.us212, %.split.us, %26
  %87 = getelementptr inbounds i8, ptr %4, i64 8
  %88 = load i32, ptr %87, align 1, !tbaa !24
  %.not239 = icmp eq i32 %88, 0
  br i1 %.not239, label %.preheader205, label %.lr.ph229

.lr.ph229:                                        ; preds = %.preheader208
  %89 = add i32 %12, -1
  %90 = icmp ne i32 %13, 0
  %91 = getelementptr inbounds i8, ptr %2, i64 88
  %92 = zext i32 %14 to i64
  %93 = zext i32 %10 to i64
  %94 = getelementptr inbounds i8, ptr %3, i64 8
  %95 = getelementptr inbounds i8, ptr %3, i64 12
  %96 = getelementptr inbounds i8, ptr %2, i64 4
  %97 = getelementptr inbounds i8, ptr %2, i64 92
  %98 = getelementptr inbounds i8, ptr %2, i64 12
  %99 = add i32 %18, 1
  %100 = xor i32 %8, -1
  %101 = add i32 %100, %9
  %102 = zext i32 %101 to i64
  %103 = shl nuw nsw i64 %102, 4
  %104 = add nuw nsw i64 %103, 16
  %105 = zext i32 %89 to i64
  %umax281 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count271 = zext i32 %17 to i64
  %wide.trip.count282 = zext i32 %umax281 to i64
  %wide.trip.count276 = zext i32 %17 to i64
  br label %136

.preheader205:                                    ; preds = %.loopexit, %.preheader208
  br i1 %.not237, label %._crit_edge233, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader205
  %.not245 = icmp eq i32 %13, 0
  %106 = getelementptr inbounds i8, ptr %2, i64 96
  %107 = zext i32 %8 to i64
  %108 = zext i32 %14 to i64
  %109 = zext i32 %10 to i64
  %110 = getelementptr inbounds i8, ptr %3, i64 8
  %111 = getelementptr inbounds i8, ptr %3, i64 20
  %112 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not245, label %.preheader.preheader, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %113 = add i32 %12, -1
  %114 = zext i32 %113 to i64
  %umax290 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count296 = zext i32 %17 to i64
  %wide.trip.count291 = zext i32 %umax290 to i64
  br label %.preheader.us

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %umax301 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count307 = zext i32 %17 to i64
  %wide.trip.count302 = zext i32 %umax301 to i64
  br label %.preheader

.preheader.us:                                    ; preds = %.preheader.us.preheader, %.split.us234
  %indvars.iv293 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next294, %.split.us234 ]
  %115 = trunc nuw i64 %indvars.iv293 to i32
  %116 = mul i32 %115, %12
  %117 = add nuw nsw i64 %indvars.iv293, %107
  %118 = mul nuw nsw i64 %117, %108
  br label %119

.split.us234:                                     ; preds = %135
  %indvars.iv.next294 = add nuw nsw i64 %indvars.iv293, 1
  %exitcond297.not = icmp eq i64 %indvars.iv.next294, %wide.trip.count296
  br i1 %exitcond297.not, label %._crit_edge233, label %.preheader.us, !llvm.loop !25

119:                                              ; preds = %.preheader.us, %135
  %indvars.iv287 = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next288, %135 ]
  %120 = icmp eq i64 %indvars.iv287, %114
  br i1 %120, label %135, label %121

121:                                              ; preds = %119
  %122 = trunc nuw i64 %indvars.iv287 to i32
  %123 = add i32 %116, %122
  %124 = load i32, ptr %106, align 4, !tbaa !16
  %125 = add nuw nsw i64 %indvars.iv287, %109
  %126 = load i32, ptr %110, align 8, !tbaa !17
  %127 = zext i32 %126 to i64
  %128 = mul nuw nsw i64 %125, %127
  %129 = add nuw nsw i64 %128, %118
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %124, i64 noundef %129) #7
  %130 = load i32, ptr %111, align 4, !tbaa !21
  %131 = icmp eq i32 %130, 4
  %132 = select i1 %131, i32 -448774013, i32 -438288253
  %133 = load i32, ptr %112, align 4, !tbaa !22
  %134 = load i32, ptr %106, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %132, i32 noundef %133, i32 noundef %134, i32 noundef 0, i32 noundef %123, i32 noundef 0) #7
  br label %135

135:                                              ; preds = %121, %119
  %indvars.iv.next288 = add nuw nsw i64 %indvars.iv287, 1
  %exitcond292.not = icmp eq i64 %indvars.iv.next288, %wide.trip.count291
  br i1 %exitcond292.not, label %.split.us234, label %119, !llvm.loop !26

136:                                              ; preds = %.lr.ph229, %.loopexit
  %137 = phi i32 [ %88, %.lr.ph229 ], [ %200, %.loopexit ]
  %indvars.iv284 = phi i64 [ 0, %.lr.ph229 ], [ %indvars.iv.next285, %.loopexit ]
  call void @llvm.lifetime.start.p0(i64 448, ptr nonnull %16) #7
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(448) %16, i8 0, i64 448, i1 false)
  br i1 %.not237, label %.loopexit, label %.lr.ph221.preheader

.lr.ph221.preheader:                              ; preds = %136
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(1) %16, i8 -1, i64 %104, i1 false), !tbaa !27
  br label %.lr.ph221

.lr.ph221:                                        ; preds = %.lr.ph221.preheader, %._crit_edge
  %indvars.iv268 = phi i64 [ 0, %.lr.ph221.preheader ], [ %indvars.iv.next269, %._crit_edge ]
  %.0194219 = phi i32 [ 0, %.lr.ph221.preheader ], [ %spec.select, %._crit_edge ]
  %138 = trunc nuw i64 %indvars.iv268 to i32
  %139 = add i32 %138, %8
  %140 = add i32 %139, 1
  %141 = zext i32 %140 to i64
  %142 = getelementptr inbounds i32, ptr %6, i64 %141
  %143 = load i32, ptr %142, align 4, !tbaa !27
  %144 = zext i32 %139 to i64
  %145 = getelementptr inbounds i32, ptr %6, i64 %144
  %146 = load i32, ptr %145, align 4, !tbaa !27
  %147 = sub i32 %143, %146
  %.not243 = icmp eq i32 %147, 0
  br i1 %.not243, label %._crit_edge, label %.lr.ph218

.lr.ph218:                                        ; preds = %.lr.ph221
  %148 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv268
  br label %149

149:                                              ; preds = %.lr.ph218, %157
  %.0192217 = phi i32 [ 0, %.lr.ph218 ], [ %158, %157 ]
  %150 = add i32 %.0192217, %146
  %151 = zext i32 %150 to i64
  %152 = getelementptr inbounds i32, ptr %5, i64 %151
  %153 = load i32, ptr %152, align 4, !tbaa !27
  %154 = zext i32 %153 to i64
  %155 = icmp eq i64 %indvars.iv284, %154
  br i1 %155, label %156, label %157

156:                                              ; preds = %149
  store i32 %150, ptr %148, align 16, !tbaa !27
  br label %157

157:                                              ; preds = %149, %156
  %.1193 = phi i32 [ %147, %156 ], [ %.0192217, %149 ]
  %158 = add i32 %.1193, 1
  %159 = icmp ult i32 %158, %147
  br i1 %159, label %149, label %._crit_edge, !llvm.loop !28

._crit_edge:                                      ; preds = %157, %.lr.ph221
  %160 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv268
  %161 = load i32, ptr %160, align 16, !tbaa !27
  %.not203 = icmp eq i32 %161, -1
  %spec.select = select i1 %.not203, i32 %.0194219, i32 1
  %indvars.iv.next269 = add nuw nsw i64 %indvars.iv268, 1
  %exitcond272.not = icmp eq i64 %indvars.iv.next269, %wide.trip.count271
  br i1 %exitcond272.not, label %._crit_edge222, label %.lr.ph221, !llvm.loop !29

._crit_edge222:                                   ; preds = %._crit_edge
  %.not201 = icmp eq i32 %spec.select, 0
  br i1 %.not201, label %.loopexit, label %.preheader206

.preheader206:                                    ; preds = %._crit_edge222
  %162 = mul nuw nsw i64 %indvars.iv284, %92
  br label %163

163:                                              ; preds = %.preheader206, %._crit_edge226
  %indvars.iv278 = phi i64 [ 0, %.preheader206 ], [ %indvars.iv.next279, %._crit_edge226 ]
  %164 = icmp eq i64 %indvars.iv278, %105
  %or.cond3 = and i1 %90, %164
  br i1 %or.cond3, label %177, label %165

165:                                              ; preds = %163
  %166 = load i32, ptr %91, align 4, !tbaa !30
  %167 = add nuw nsw i64 %indvars.iv278, %93
  %168 = load i32, ptr %94, align 8, !tbaa !17
  %169 = zext i32 %168 to i64
  %170 = mul nuw nsw i64 %167, %169
  %171 = add nuw nsw i64 %170, %162
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %166, i64 noundef %171) #7
  %172 = load i32, ptr %95, align 4, !tbaa !31
  %173 = icmp eq i32 %172, 4
  %174 = select i1 %173, i32 -1522515837, i32 -1512030077
  %175 = load i32, ptr %96, align 4, !tbaa !32
  %176 = load i32, ptr %91, align 4, !tbaa !30
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %174, i32 noundef %175, i32 noundef %176, i32 noundef 0, i32 noundef %18, i32 noundef 0) #7
  br label %177

177:                                              ; preds = %163, %165
  br i1 %.not237, label %._crit_edge226, label %.lr.ph225.preheader

.lr.ph225.preheader:                              ; preds = %177
  %178 = trunc nuw i64 %indvars.iv278 to i32
  br label %.lr.ph225

.lr.ph225:                                        ; preds = %.lr.ph225.preheader, %199
  %indvars.iv273 = phi i64 [ 0, %.lr.ph225.preheader ], [ %indvars.iv.next274, %199 ]
  %179 = getelementptr inbounds [28 x [4 x i32]], ptr %16, i64 0, i64 %indvars.iv273
  %180 = load i32, ptr %179, align 16, !tbaa !27
  %.not202 = icmp eq i32 %180, -1
  br i1 %.not202, label %199, label %181

181:                                              ; preds = %.lr.ph225
  %182 = load i32, ptr %97, align 4, !tbaa !33
  %183 = sext i32 %180 to i64
  %184 = load i32, ptr %95, align 4, !tbaa !31
  %185 = zext i32 %184 to i64
  %186 = mul nsw i64 %185, %183
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %182, i64 noundef %186) #7
  %187 = load i32, ptr %98, align 4, !tbaa !34
  %188 = load i32, ptr %97, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %187, i32 noundef %188, i32 noundef %188, i32 noundef 0, i32 noundef 0) #7
  %189 = load i32, ptr %95, align 4, !tbaa !31
  %190 = icmp eq i32 %189, 4
  %191 = select i1 %190, i32 -2059353978, i32 -2050957178
  %192 = load i32, ptr %97, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %191, i32 noundef %192, i32 noundef 127, i32 noundef 0, i32 noundef %99, i32 noundef 0) #7
  %193 = trunc nuw i64 %indvars.iv273 to i32
  %194 = mul i32 %193, %12
  %195 = add i32 %194, %178
  %196 = load i32, ptr %95, align 4, !tbaa !31
  %197 = icmp eq i32 %196, 4
  %198 = select i1 %197, i32 2, i32 3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1696596099, i32 noundef %18, i32 noundef %99, i8 noundef zeroext -1, i32 noundef %195, i32 noundef 0, i32 noundef %198) #7
  br label %199

199:                                              ; preds = %.lr.ph225, %181
  %indvars.iv.next274 = add nuw nsw i64 %indvars.iv273, 1
  %exitcond277.not = icmp eq i64 %indvars.iv.next274, %wide.trip.count276
  br i1 %exitcond277.not, label %._crit_edge226, label %.lr.ph225, !llvm.loop !35

._crit_edge226:                                   ; preds = %199, %177
  %indvars.iv.next279 = add nuw nsw i64 %indvars.iv278, 1
  %exitcond283.not = icmp eq i64 %indvars.iv.next279, %wide.trip.count282
  br i1 %exitcond283.not, label %.loopexit.loopexit, label %163, !llvm.loop !36

.loopexit.loopexit:                               ; preds = %._crit_edge226
  %.pre = load i32, ptr %87, align 1, !tbaa !24
  br label %.loopexit

.loopexit:                                        ; preds = %136, %.loopexit.loopexit, %._crit_edge222
  %200 = phi i32 [ %.pre, %.loopexit.loopexit ], [ %137, %._crit_edge222 ], [ %137, %136 ]
  call void @llvm.lifetime.end.p0(i64 448, ptr nonnull %16) #7
  %indvars.iv.next285 = add nuw nsw i64 %indvars.iv284, 1
  %201 = zext i32 %200 to i64
  %202 = icmp ult i64 %indvars.iv.next285, %201
  br i1 %202, label %136, label %.preheader205, !llvm.loop !37

.preheader:                                       ; preds = %.preheader.preheader, %.split.us231
  %indvars.iv304 = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next305, %.split.us231 ]
  %203 = trunc nuw i64 %indvars.iv304 to i32
  %204 = mul i32 %203, %12
  %205 = add nuw nsw i64 %indvars.iv304, %107
  %206 = mul nuw nsw i64 %205, %108
  br label %207

207:                                              ; preds = %207, %.preheader
  %indvars.iv298 = phi i64 [ %indvars.iv.next299, %207 ], [ 0, %.preheader ]
  %208 = trunc nuw i64 %indvars.iv298 to i32
  %209 = add i32 %204, %208
  %210 = load i32, ptr %106, align 4, !tbaa !16
  %211 = add nuw nsw i64 %indvars.iv298, %109
  %212 = load i32, ptr %110, align 8, !tbaa !17
  %213 = zext i32 %212 to i64
  %214 = mul nuw nsw i64 %211, %213
  %215 = add nuw nsw i64 %214, %206
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %210, i64 noundef %215) #7
  %216 = load i32, ptr %111, align 4, !tbaa !21
  %217 = icmp eq i32 %216, 4
  %218 = select i1 %217, i32 -448774013, i32 -438288253
  %219 = load i32, ptr %112, align 4, !tbaa !22
  %220 = load i32, ptr %106, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %218, i32 noundef %219, i32 noundef %220, i32 noundef 0, i32 noundef %209, i32 noundef 0) #7
  %indvars.iv.next299 = add nuw nsw i64 %indvars.iv298, 1
  %exitcond303.not = icmp eq i64 %indvars.iv.next299, %wide.trip.count302
  br i1 %exitcond303.not, label %.split.us231, label %207, !llvm.loop !26

.split.us231:                                     ; preds = %207
  %indvars.iv.next305 = add nuw nsw i64 %indvars.iv304, 1
  %exitcond308.not = icmp eq i64 %indvars.iv.next305, %wide.trip.count307
  br i1 %exitcond308.not, label %._crit_edge233, label %.preheader, !llvm.loop !25

._crit_edge233:                                   ; preds = %.split.us234, %.split.us231, %.preheader205
  br i1 %22, label %221, label %265

221:                                              ; preds = %._crit_edge233
  %222 = getelementptr inbounds i8, ptr %2, i64 4
  %223 = load i32, ptr %222, align 4, !tbaa !32
  %224 = getelementptr inbounds i8, ptr %2, i64 88
  %225 = load i32, ptr %224, align 4, !tbaa !30
  %226 = zext i32 %12 to i64
  %227 = getelementptr inbounds i8, ptr %3, i64 8
  %228 = load i32, ptr %227, align 8, !tbaa !17
  %229 = zext i32 %228 to i64
  %230 = mul nuw nsw i64 %229, %226
  %231 = getelementptr inbounds i8, ptr %3, i64 12
  %232 = load i32, ptr %231, align 4, !tbaa !31
  %233 = zext i32 %232 to i64
  %234 = mul nuw nsw i64 %230, %233
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %223, i32 noundef %225, i32 noundef %223, i64 noundef %234) #7
  %235 = getelementptr inbounds i8, ptr %2, i64 20
  %236 = load i32, ptr %235, align 4, !tbaa !22
  %237 = getelementptr inbounds i8, ptr %2, i64 96
  %238 = load i32, ptr %237, align 4, !tbaa !16
  %239 = load i32, ptr %227, align 8, !tbaa !17
  %240 = zext i32 %239 to i64
  %241 = mul nuw nsw i64 %240, %226
  %242 = getelementptr inbounds i8, ptr %3, i64 20
  %243 = load i32, ptr %242, align 4, !tbaa !21
  %244 = zext i32 %243 to i64
  %245 = mul nuw nsw i64 %241, %244
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %236, i32 noundef %238, i32 noundef %236, i64 noundef %245) #7
  %246 = getelementptr inbounds i8, ptr %2, i64 100
  %247 = load i32, ptr %246, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %247, i32 noundef 1) #7
  %248 = load i32, ptr %222, align 4, !tbaa !32
  %249 = load i32, ptr %224, align 4, !tbaa !30
  %250 = zext i32 %21 to i64
  %251 = load i32, ptr %227, align 8, !tbaa !17
  %252 = zext i32 %251 to i64
  %253 = mul nuw nsw i64 %252, %250
  %254 = load i32, ptr %231, align 4, !tbaa !31
  %255 = zext i32 %254 to i64
  %256 = mul nuw nsw i64 %253, %255
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %248, i32 noundef %249, i32 noundef %248, i64 noundef %256) #7
  %257 = load i32, ptr %235, align 4, !tbaa !22
  %258 = load i32, ptr %237, align 4, !tbaa !16
  %259 = load i32, ptr %227, align 8, !tbaa !17
  %260 = zext i32 %259 to i64
  %261 = mul nuw nsw i64 %260, %250
  %262 = load i32, ptr %242, align 4, !tbaa !21
  %263 = zext i32 %262 to i64
  %264 = mul nuw nsw i64 %261, %263
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %257, i32 noundef %258, i32 noundef %257, i64 noundef %264) #7
  br label %265

265:                                              ; preds = %221, %._crit_edge233
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 100}
!6 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !7, i64 24}
!13 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !14, i64 33, !14, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !15, i64 62, !15, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !15, i64 70, !15, i64 72, !15, i64 74, !15, i64 76, !15, i64 78, !15, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!14 = !{!"long long", !8, i64 0}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !7, i64 96}
!17 = !{!18, !7, i64 8}
!18 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !19, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !20, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !20, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!19 = !{!"libxsmm_tile_config", !8, i64 0, !15, i64 2, !8, i64 4, !15, i64 6, !8, i64 8, !15, i64 10, !8, i64 12, !15, i64 14, !8, i64 16, !15, i64 18, !8, i64 20, !15, i64 22, !8, i64 24, !15, i64 26, !8, i64 28, !15, i64 30, !8, i64 32}
!20 = !{!"any pointer", !8, i64 0}
!21 = !{!18, !7, i64 20}
!22 = !{!6, !7, i64 20}
!23 = distinct !{!23, !11}
!24 = !{!13, !7, i64 8}
!25 = distinct !{!25, !11}
!26 = distinct !{!26, !11}
!27 = !{!7, !7, i64 0}
!28 = distinct !{!28, !11}
!29 = distinct !{!29, !11}
!30 = !{!6, !7, i64 88}
!31 = !{!18, !7, i64 12}
!32 = !{!6, !7, i64 4}
!33 = !{!6, !7, i64 92}
!34 = !{!6, !7, i64 12}
!35 = distinct !{!35, !11}
!36 = distinct !{!36, !11}
!37 = distinct !{!37, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass