; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_sse_avx_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>
%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_meltw_setval_stack_var(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_meltw_setup_stack_frame(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 10, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %16, i32 0, i32 11
  %18 = load i8, ptr %17, align 1, !tbaa !11
  %19 = zext i8 %18 to i32
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %27, label %21

21:                                               ; preds = %4
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %22, i32 0, i32 11
  %24 = load i8, ptr %23, align 1, !tbaa !11
  %25 = zext i8 %24 to i32
  %26 = icmp eq i32 %25, 2
  br label %27

27:                                               ; preds = %21, %4
  %28 = phi i1 [ true, %4 ], [ %26, %21 ]
  %29 = zext i1 %28 to i64
  %30 = select i1 %28, i32 1, i32 0
  store i32 %30, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %31, i32 0, i32 9
  %33 = load i16, ptr %32, align 1, !tbaa !14
  %34 = zext i16 %33 to i32
  %35 = and i32 %34, 32
  %36 = icmp sgt i32 %35, 0
  %37 = zext i1 %36 to i64
  %38 = select i1 %36, i32 1, i32 0
  store i32 %38, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %39, i32 0, i32 6
  %41 = load i32, ptr %40, align 4, !tbaa !15
  %42 = icmp ult i32 %41, 1051
  br i1 %42, label %43, label %63

43:                                               ; preds = %27
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %44, i32 0, i32 11
  %46 = load i8, ptr %45, align 1, !tbaa !11
  %47 = zext i8 %46 to i32
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %63

49:                                               ; preds = %43
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %50, i32 0, i32 10
  %52 = load i16, ptr %51, align 1, !tbaa !17
  %53 = zext i16 %52 to i32
  %54 = icmp eq i32 %53, 11
  br i1 %54, label %61, label %55

55:                                               ; preds = %49
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %56, i32 0, i32 10
  %58 = load i16, ptr %57, align 1, !tbaa !17
  %59 = zext i16 %58 to i32
  %60 = icmp eq i32 %59, 12
  br label %61

61:                                               ; preds = %55, %49
  %62 = phi i1 [ true, %49 ], [ %60, %55 ]
  br label %63

63:                                               ; preds = %61, %43, %27
  %64 = phi i1 [ false, %43 ], [ false, %27 ], [ %62, %61 ]
  %65 = zext i1 %64 to i64
  %66 = select i1 %64, i32 1, i32 0
  store i32 %66, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = icmp ugt i32 %67, 0
  br i1 %68, label %80, label %69

69:                                               ; preds = %63
  %70 = load i32, ptr %12, align 4, !tbaa !9
  %71 = icmp ugt i32 %70, 0
  br i1 %71, label %80, label %72

72:                                               ; preds = %69
  %73 = load i32, ptr %13, align 4, !tbaa !9
  %74 = icmp ugt i32 %73, 0
  br i1 %74, label %80, label %75

75:                                               ; preds = %72
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %76, i32 0, i32 6
  %78 = load i32, ptr %77, align 4, !tbaa !15
  %79 = icmp ult i32 %78, 1005
  br label %80

80:                                               ; preds = %75, %72, %69, %63
  %81 = phi i1 [ true, %72 ], [ true, %69 ], [ true, %63 ], [ %79, %75 ]
  %82 = zext i1 %81 to i64
  %83 = select i1 %81, i32 1, i32 0
  store i32 %83, ptr %14, align 4, !tbaa !9
  %84 = load ptr, ptr %7, align 8, !tbaa !5
  %85 = load i32, ptr %9, align 4, !tbaa !9
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = load ptr, ptr %8, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %87, i32 0, i32 126
  store i32 %86, ptr %88, align 4, !tbaa !18
  %89 = load i32, ptr %14, align 4, !tbaa !9
  %90 = load ptr, ptr %8, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %90, i32 0, i32 127
  store i32 %89, ptr %91, align 4, !tbaa !20
  %92 = load i32, ptr %14, align 4, !tbaa !9
  %93 = icmp ugt i32 %92, 0
  br i1 %93, label %94, label %111

94:                                               ; preds = %80
  %95 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %95, i32 noundef 5)
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = load ptr, ptr %8, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %97, i32 0, i32 14
  %99 = load i32, ptr %98, align 4, !tbaa !21
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %96, i32 noundef %99, i32 noundef 4, i32 noundef 5)
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = load ptr, ptr %8, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %101, i32 0, i32 11
  %103 = load i32, ptr %102, align 4, !tbaa !22
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %100, i32 noundef %103, i32 noundef 4, i64 noundef 216)
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = load ptr, ptr %8, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %105, i32 0, i32 14
  %107 = load i32, ptr %106, align 4, !tbaa !21
  %108 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_imm_i64(ptr noundef %104, i32 noundef %107, i32 noundef %108, i64 noundef -64)
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %109, i32 noundef 30001, i32 noundef %110, i32 noundef 4)
  br label %111

111:                                              ; preds = %94, %80
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %112, i32 0, i32 6
  %114 = load i32, ptr %113, align 4, !tbaa !15
  %115 = icmp ult i32 %114, 1051
  br i1 %115, label %116, label %154

116:                                              ; preds = %111
  %117 = load ptr, ptr %6, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %117, i32 0, i32 11
  %119 = load i8, ptr %118, align 1, !tbaa !11
  %120 = zext i8 %119 to i32
  %121 = icmp eq i32 %120, 1
  br i1 %121, label %122, label %154

122:                                              ; preds = %116
  %123 = load ptr, ptr %6, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %123, i32 0, i32 10
  %125 = load i16, ptr %124, align 1, !tbaa !17
  %126 = zext i16 %125 to i32
  %127 = icmp eq i32 %126, 11
  br i1 %127, label %134, label %128

128:                                              ; preds = %122
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %129, i32 0, i32 10
  %131 = load i16, ptr %130, align 1, !tbaa !17
  %132 = zext i16 %131 to i32
  %133 = icmp eq i32 %132, 12
  br i1 %133, label %134, label %153

134:                                              ; preds = %128, %122
  %135 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 14)
  %136 = load ptr, ptr %8, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %136, i32 0, i32 94
  store i32 %135, ptr %137, align 4, !tbaa !23
  %138 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 15)
  %139 = load ptr, ptr %8, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %139, i32 0, i32 95
  store i32 %138, ptr %140, align 4, !tbaa !24
  %141 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 16)
  %142 = load ptr, ptr %8, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %142, i32 0, i32 96
  store i32 %141, ptr %143, align 4, !tbaa !25
  %144 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 17)
  %145 = load ptr, ptr %8, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %145, i32 0, i32 97
  store i32 %144, ptr %146, align 4, !tbaa !26
  %147 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 18)
  %148 = load ptr, ptr %8, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %148, i32 0, i32 98
  store i32 %147, ptr %149, align 4, !tbaa !27
  %150 = call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 19)
  %151 = load ptr, ptr %8, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %151, i32 0, i32 99
  store i32 %150, ptr %152, align 4, !tbaa !28
  br label %153

153:                                              ; preds = %134, %128
  br label %154

154:                                              ; preds = %153, %116, %111
  %155 = load i32, ptr %11, align 4, !tbaa !9
  %156 = icmp ugt i32 %155, 0
  br i1 %156, label %157, label %158

157:                                              ; preds = %154
  br label %158

158:                                              ; preds = %157, %154
  %159 = load i32, ptr %12, align 4, !tbaa !9
  %160 = icmp ugt i32 %159, 0
  br i1 %160, label %161, label %181

161:                                              ; preds = %158
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %162 = load ptr, ptr %6, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %162, i32 0, i32 9
  %164 = load i16, ptr %163, align 1, !tbaa !14
  %165 = zext i16 %164 to i32
  %166 = and i32 %165, 32
  %167 = icmp sgt i32 %166, 0
  %168 = zext i1 %167 to i64
  %169 = select i1 %167, i32 128, i32 1024
  store i32 %169, ptr %15, align 4, !tbaa !9
  %170 = load i32, ptr %15, align 4, !tbaa !9
  %171 = add i32 %170, 63
  %172 = udiv i32 %171, 64
  %173 = mul i32 %172, 64
  store i32 %173, ptr %15, align 4, !tbaa !9
  %174 = load ptr, ptr %5, align 8, !tbaa !5
  %175 = load ptr, ptr %8, align 8, !tbaa !5
  %176 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %175, i32 0, i32 11
  %177 = load i32, ptr %176, align 4, !tbaa !22
  %178 = load i32, ptr %15, align 4, !tbaa !9
  %179 = zext i32 %178 to i64
  call void @libxsmm_x86_instruction_alu_imm(ptr noundef %174, i32 noundef %177, i32 noundef 4, i64 noundef %179)
  %180 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_generator_meltw_setval_stack_var(ptr noundef %180, i32 noundef 13, i32 noundef 4)
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %181

181:                                              ; preds = %161, %158
  %182 = load i32, ptr %10, align 4, !tbaa !9
  %183 = icmp eq i32 %182, 0
  br i1 %183, label %184, label %190

184:                                              ; preds = %181
  %185 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %185, i32 noundef 3)
  %186 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %186, i32 noundef 12)
  %187 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %187, i32 noundef 13)
  %188 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %188, i32 noundef 14)
  %189 = load ptr, ptr %5, align 8, !tbaa !5
  call void @libxsmm_x86_instruction_push_reg(ptr noundef %189, i32 noundef 15)
  br label %190

190:                                              ; preds = %184, %181
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_x86_instruction_alu_imm_i64(ptr noundef, i32 noundef, i32 noundef, i64 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 31}
!12 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 27, !13, i64 29, !7, i64 31}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !13, i64 27}
!15 = !{!16, !10, i64 28}
!16 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!17 = !{!12, !13, i64 29}
!18 = !{!19, !10, i64 504}
!19 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!20 = !{!19, !10, i64 508}
!21 = !{!19, !10, i64 56}
!22 = !{!19, !10, i64 44}
!23 = !{!19, !10, i64 376}
!24 = !{!19, !10, i64 380}
!25 = !{!19, !10, i64 384}
!26 = !{!19, !10, i64 388}
!27 = !{!19, !10, i64 392}
!28 = !{!19, !10, i64 396}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_meltw_setval_stack_var(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_meltw_setup_stack_frame(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readnone %2, ptr nocapture noundef %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %1, i64 31
  %6 = load i8, ptr %5, align 1, !tbaa !5
  %7 = icmp ne i8 %6, 1
  %8 = add i8 %6, -1
  %narrow = icmp ult i8 %8, 2
  %9 = zext i1 %narrow to i32
  %10 = getelementptr inbounds i8, ptr %1, i64 27
  %11 = load i16, ptr %10, align 1, !tbaa !11
  %12 = and i16 %11, 32
  %13 = icmp ne i16 %12, 0
  %14 = getelementptr inbounds i8, ptr %0, i64 28
  %15 = load i32, ptr %14, align 4, !tbaa !12
  %16 = icmp ugt i32 %15, 1050
  %brmerge = select i1 %16, i1 true, i1 %7
  br i1 %brmerge, label %21, label %17

17:                                               ; preds = %4
  %18 = getelementptr inbounds i8, ptr %1, i64 29
  %19 = load i16, ptr %18, align 1, !tbaa !15
  %20 = add i16 %19, -11
  %spec.select = icmp ult i16 %20, 2
  br label %21

21:                                               ; preds = %4, %17
  %22 = phi i1 [ false, %4 ], [ %spec.select, %17 ]
  %or.cond3 = or i1 %13, %22
  br i1 %or.cond3, label %.critedge, label %23

23:                                               ; preds = %21
  %24 = icmp ult i32 %15, 1005
  %25 = zext i1 %24 to i32
  %26 = getelementptr inbounds i8, ptr %3, i64 504
  store i32 %9, ptr %26, align 4, !tbaa !16
  %27 = getelementptr inbounds i8, ptr %3, i64 508
  store i32 %25, ptr %27, align 4, !tbaa !18
  br i1 %24, label %30, label %36

.critedge:                                        ; preds = %21
  %28 = getelementptr inbounds i8, ptr %3, i64 504
  store i32 %9, ptr %28, align 4, !tbaa !16
  %29 = getelementptr inbounds i8, ptr %3, i64 508
  store i32 1, ptr %29, align 4, !tbaa !18
  br label %30

30:                                               ; preds = %.critedge, %23
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 5) #2
  %31 = getelementptr inbounds i8, ptr %3, i64 56
  %32 = load i32, ptr %31, align 4, !tbaa !19
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef nonnull %0, i32 noundef %32, i32 noundef 4, i32 noundef 5) #2
  %33 = getelementptr inbounds i8, ptr %3, i64 44
  %34 = load i32, ptr %33, align 4, !tbaa !20
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef %34, i32 noundef 4, i64 noundef 216) #2
  %35 = load i32, ptr %31, align 4, !tbaa !19
  tail call void @libxsmm_x86_instruction_alu_imm_i64(ptr noundef nonnull %0, i32 noundef %35, i32 noundef 10, i64 noundef -64) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef nonnull %0, i32 noundef 30001, i32 noundef 10, i32 noundef 4) #2
  %.pre = load i32, ptr %14, align 4, !tbaa !12
  br label %36

36:                                               ; preds = %30, %23
  %37 = phi i32 [ %.pre, %30 ], [ %15, %23 ]
  %38 = icmp ult i32 %37, 1051
  br i1 %38, label %39, label %58

39:                                               ; preds = %36
  %40 = load i8, ptr %5, align 1, !tbaa !5
  %41 = icmp eq i8 %40, 1
  br i1 %41, label %42, label %58

42:                                               ; preds = %39
  %43 = getelementptr inbounds i8, ptr %1, i64 29
  %44 = load i16, ptr %43, align 1, !tbaa !15
  %.off = add i16 %44, -11
  %switch = icmp ult i16 %.off, 2
  br i1 %switch, label %45, label %58

45:                                               ; preds = %42
  %46 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 14)
  %47 = getelementptr inbounds i8, ptr %3, i64 376
  store i32 %46, ptr %47, align 4, !tbaa !21
  %48 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 15)
  %49 = getelementptr inbounds i8, ptr %3, i64 380
  store i32 %48, ptr %49, align 4, !tbaa !22
  %50 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 16)
  %51 = getelementptr inbounds i8, ptr %3, i64 384
  store i32 %50, ptr %51, align 4, !tbaa !23
  %52 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 17)
  %53 = getelementptr inbounds i8, ptr %3, i64 388
  store i32 %52, ptr %53, align 4, !tbaa !24
  %54 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 18)
  %55 = getelementptr inbounds i8, ptr %3, i64 392
  store i32 %54, ptr %55, align 4, !tbaa !25
  %56 = tail call i32 @libxsmm_generator_meltw_get_rbp_relative_offset(i32 noundef 19)
  %57 = getelementptr inbounds i8, ptr %3, i64 396
  store i32 %56, ptr %57, align 4, !tbaa !26
  br label %58

58:                                               ; preds = %42, %45, %39, %36
  br i1 %13, label %59, label %65

59:                                               ; preds = %58
  %60 = load i16, ptr %10, align 1, !tbaa !11
  %61 = and i16 %60, 32
  %.not = icmp eq i16 %61, 0
  %62 = getelementptr inbounds i8, ptr %3, i64 44
  %63 = load i32, ptr %62, align 4, !tbaa !20
  %64 = select i1 %.not, i64 1024, i64 128
  tail call void @libxsmm_x86_instruction_alu_imm(ptr noundef nonnull %0, i32 noundef %63, i32 noundef 4, i64 noundef %64) #2
  tail call void @libxsmm_generator_meltw_setval_stack_var(ptr noundef nonnull %0, i32 noundef 13, i32 noundef 4)
  br label %65

65:                                               ; preds = %59, %58
  br i1 %narrow, label %67, label %66

66:                                               ; preds = %65
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 3) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 12) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 13) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 14) #2
  tail call void @libxsmm_x86_instruction_push_reg(ptr noundef nonnull %0, i32 noundef 15) #2
  br label %67

67:                                               ; preds = %66, %65
  ret void
}

declare void @libxsmm_x86_instruction_push_reg(ptr noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_x86_instruction_alu_imm(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_x86_instruction_alu_imm_i64(ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 31}
!6 = !{!"libxsmm_meltw_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !10, i64 27, !10, i64 29, !8, i64 31}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !10, i64 27}
!12 = !{!13, !7, i64 28}
!13 = !{!"libxsmm_generated_code", !14, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!6, !10, i64 29}
!16 = !{!17, !7, i64 504}
!17 = !{!"libxsmm_mateltwise_kernel_config_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !7, i64 392, !7, i64 396, !7, i64 400, !7, i64 404, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !7, i64 428, !7, i64 432, !7, i64 436, !7, i64 440, !7, i64 444, !7, i64 448, !7, i64 452, !7, i64 456, !7, i64 460, !7, i64 464, !7, i64 468, !7, i64 472, !7, i64 476, !7, i64 480, !7, i64 484, !7, i64 488, !7, i64 492, !7, i64 496, !7, i64 500, !7, i64 504, !7, i64 508, !8, i64 512}
!18 = !{!17, !7, i64 508}
!19 = !{!17, !7, i64 56}
!20 = !{!17, !7, i64 44}
!21 = !{!17, !7, i64 376}
!22 = !{!17, !7, i64 380}
!23 = !{!17, !7, i64 384}
!24 = !{!17, !7, i64 388}
!25 = !{!17, !7, i64 392}
!26 = !{!17, !7, i64 396}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass