; LLVM IR from cryspen/libcrux :: sys/hacl/c/src (Hacl_Hash_MD5)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Hacl_Streaming_MD_state_32_s = type { ptr, ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_finish(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_update_multi(ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_update_last(ptr noundef, i64 noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
define dso_local void @Hacl_Hash_MD5_digest(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %struct.Hacl_Streaming_MD_state_32_s, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca [4 x i32], align 16
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %5) #4
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %5, ptr align 8 %16, i64 24, i1 false), !tbaa.struct !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %17 = getelementptr inbounds %struct.Hacl_Streaming_MD_state_32_s, ptr %5, i32 0, i32 0
  %18 = load ptr, ptr %17, align 8, !tbaa !12
  store ptr %18, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %19 = getelementptr inbounds %struct.Hacl_Streaming_MD_state_32_s, ptr %5, i32 0, i32 1
  %20 = load ptr, ptr %19, align 8, !tbaa !14
  store ptr %20, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %21 = getelementptr inbounds %struct.Hacl_Streaming_MD_state_32_s, ptr %5, i32 0, i32 2
  %22 = load i64, ptr %21, align 8, !tbaa !15
  store i64 %22, ptr %8, align 8, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %23 = load i64, ptr %8, align 8, !tbaa !10
  %24 = urem i64 %23, 64
  %25 = icmp eq i64 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %2
  %27 = load i64, ptr %8, align 8, !tbaa !10
  %28 = icmp ugt i64 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %26
  store i32 64, ptr %9, align 4, !tbaa !16
  br label %34

30:                                               ; preds = %26, %2
  %31 = load i64, ptr %8, align 8, !tbaa !10
  %32 = urem i64 %31, 64
  %33 = trunc i64 %32 to i32
  store i32 %33, ptr %9, align 4, !tbaa !16
  br label %34

34:                                               ; preds = %30, %29
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %35 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %35, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #4
  call void @llvm.memset.p0.i64(ptr align 16 %11, i8 0, i64 16, i1 false)
  %36 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %36, ptr align 4 %37, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %38 = load i32, ptr %9, align 4, !tbaa !16
  %39 = urem i32 %38, 64
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %45

41:                                               ; preds = %34
  %42 = load i32, ptr %9, align 4, !tbaa !16
  %43 = icmp ugt i32 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %41
  store i32 64, ptr %12, align 4, !tbaa !16
  br label %48

45:                                               ; preds = %41, %34
  %46 = load i32, ptr %9, align 4, !tbaa !16
  %47 = urem i32 %46, 64
  store i32 %47, ptr %12, align 4, !tbaa !16
  br label %48

48:                                               ; preds = %45, %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = load i32, ptr %9, align 4, !tbaa !16
  %51 = zext i32 %50 to i64
  %52 = getelementptr inbounds i8, ptr %49, i64 %51
  %53 = load i32, ptr %12, align 4, !tbaa !16
  %54 = zext i32 %53 to i64
  %55 = sub i64 0, %54
  %56 = getelementptr inbounds i8, ptr %52, i64 %55
  store ptr %56, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %57 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %57, ptr %14, align 8, !tbaa !5
  %58 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  %59 = load ptr, ptr %14, align 8, !tbaa !5
  call void @Hacl_Hash_MD5_update_multi(ptr noundef %58, ptr noundef %59, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %60 = load i64, ptr %8, align 8, !tbaa !10
  %61 = load i32, ptr %9, align 4, !tbaa !16
  %62 = zext i32 %61 to i64
  %63 = sub i64 %60, %62
  store i64 %63, ptr %15, align 8, !tbaa !10
  %64 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  %65 = load i64, ptr %15, align 8, !tbaa !10
  %66 = load ptr, ptr %13, align 8, !tbaa !5
  %67 = load i32, ptr %9, align 4, !tbaa !16
  call void @Hacl_Hash_MD5_update_last(ptr noundef %64, i64 noundef %65, ptr noundef %66, i32 noundef %67)
  %68 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  call void @Hacl_Hash_MD5_finish(ptr noundef %68, ptr noundef %69)
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %5) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 8, !5, i64 8, i64 8, !5, i64 16, i64 8, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"Hacl_Streaming_MD_state_32_s", !6, i64 0, !6, i64 8, !11, i64 16}
!14 = !{!13, !6, i64 8}
!15 = !{!13, !11, i64 16}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_finish(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_update_multi(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @Hacl_Hash_MD5_update_last(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @Hacl_Hash_MD5_digest(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [4 x i32], align 16
  %.sroa.0.0.copyload = load ptr, ptr %0, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 8
  %.sroa.4.0.copyload = load ptr, ptr %.sroa.4.0..sroa_idx, align 8, !tbaa !5
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 16
  %.sroa.5.0.copyload = load i64, ptr %.sroa.5.0..sroa_idx, align 8, !tbaa !9
  %4 = and i64 %.sroa.5.0.copyload, 63
  %5 = icmp eq i64 %4, 0
  %6 = icmp ne i64 %.sroa.5.0.copyload, 0
  %or.cond = and i1 %6, %5
  %7 = trunc nuw nsw i64 %4 to i32
  %.0 = select i1 %or.cond, i32 64, i32 %7
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %3, ptr noundef nonnull align 4 dereferenceable(16) %.sroa.0.0.copyload, i64 16, i1 false)
  %8 = and i32 %.0, 63
  %9 = icmp eq i32 %8, 0
  %10 = icmp ne i32 %.0, 0
  %or.cond3 = and i1 %10, %9
  %11 = zext nneg i32 %8 to i64
  %.022 = select i1 %or.cond3, i64 64, i64 %11
  %12 = zext nneg i32 %.0 to i64
  %13 = getelementptr inbounds i8, ptr %.sroa.4.0.copyload, i64 %12
  %14 = sub nsw i64 0, %.022
  %15 = getelementptr inbounds i8, ptr %13, i64 %14
  call void @Hacl_Hash_MD5_update_multi(ptr noundef nonnull %3, ptr noundef %.sroa.4.0.copyload, i32 noundef 0)
  %16 = sub i64 %.sroa.5.0.copyload, %12
  call void @Hacl_Hash_MD5_update_last(ptr noundef nonnull %3, i64 noundef %16, ptr noundef %15, i32 noundef %.0)
  call void @Hacl_Hash_MD5_finish(ptr noundef nonnull %3, ptr noundef %1)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass