; LLVM IR from libxsmm/libxsmm :: src (generator_spgemm_csr_asparse_reg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_asparse_reg_op = type { i32, [12 x i32], i16, [12 x i16], [12 x i8], [12 x i8], [12 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @libxsmm_asparse_reg_pick_bcast_reg(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %88, %4
  %18 = load i32, ptr %12, align 4, !tbaa !9
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = icmp ult i32 %18, %19
  br i1 %20, label %21, label %91

21:                                               ; preds = %17
  store i32 0, ptr %13, align 4, !tbaa !9
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %79, %21
  %23 = load i32, ptr %13, align 4, !tbaa !9
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = icmp ult i32 %23, %24
  br i1 %25, label %26, label %30

26:                                               ; preds = %22
  %27 = load i32, ptr %15, align 4, !tbaa !9
  %28 = icmp ne i32 %27, 0
  %29 = xor i1 %28, true
  br label %30

30:                                               ; preds = %26, %22
  %31 = phi i1 [ false, %22 ], [ %29, %26 ]
  br i1 %31, label %32, label %82

32:                                               ; preds = %30
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %75, %32
  %34 = load i32, ptr %14, align 4, !tbaa !9
  %35 = load ptr, ptr %8, align 8, !tbaa !5
  %36 = load i32, ptr %13, align 4, !tbaa !9
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds %struct.libxsmm_asparse_reg_op, ptr %35, i64 %37
  %39 = getelementptr inbounds %struct.libxsmm_asparse_reg_op, ptr %38, i32 0, i32 2
  %40 = load i16, ptr %39, align 4, !tbaa !11
  %41 = zext i16 %40 to i32
  %42 = icmp ult i32 %34, %41
  br i1 %42, label %43, label %47

43:                                               ; preds = %33
  %44 = load i32, ptr %15, align 4, !tbaa !9
  %45 = icmp ne i32 %44, 0
  %46 = xor i1 %45, true
  br label %47

47:                                               ; preds = %43, %33
  %48 = phi i1 [ false, %33 ], [ %46, %43 ]
  br i1 %48, label %49, label %78

49:                                               ; preds = %47
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = load i32, ptr %13, align 4, !tbaa !9
  %52 = zext i32 %51 to i64
  %53 = getelementptr inbounds %struct.libxsmm_asparse_reg_op, ptr %50, i64 %52
  %54 = getelementptr inbounds %struct.libxsmm_asparse_reg_op, ptr %53, i32 0, i32 3
  %55 = load i32, ptr %14, align 4, !tbaa !9
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds [12 x i16], ptr %54, i64 0, i64 %56
  %58 = load i16, ptr %57, align 2, !tbaa !14
  %59 = zext i16 %58 to i32
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = zext i32 %61 to i64
  %63 = getelementptr inbounds i32, ptr %60, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = icmp eq i32 %59, %64
  br i1 %65, label %66, label %74

66:                                               ; preds = %49
  %67 = load i32, ptr %13, align 4, !tbaa !9
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = icmp ugt i32 %67, %68
  br i1 %69, label %70, label %73

70:                                               ; preds = %66
  %71 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %71, ptr %10, align 4, !tbaa !9
  %72 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %72, ptr %11, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %70, %66
  store i32 1, ptr %15, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %73, %49
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = add i32 %76, 1
  store i32 %77, ptr %14, align 4, !tbaa !9
  br label %33, !llvm.loop !15

78:                                               ; preds = %47
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = add i32 %80, 1
  store i32 %81, ptr %13, align 4, !tbaa !9
  br label %22, !llvm.loop !17

82:                                               ; preds = %30
  %83 = load i32, ptr %15, align 4, !tbaa !9
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %87, label %85

85:                                               ; preds = %82
  %86 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %86, ptr %5, align 4
  store i32 1, ptr %16, align 4
  br label %93

87:                                               ; preds = %82
  br label %88

88:                                               ; preds = %87
  %89 = load i32, ptr %12, align 4, !tbaa !9
  %90 = add i32 %89, 1
  store i32 %90, ptr %12, align 4, !tbaa !9
  br label %17, !llvm.loop !18

91:                                               ; preds = %17
  %92 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %92, ptr %5, align 4
  store i32 1, ptr %16, align 4
  br label %93

93:                                               ; preds = %91, %85
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %94 = load i32, ptr %5, align 4
  ret i32 %94
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 52}
!12 = !{!"", !10, i64 0, !7, i64 4, !13, i64 52, !7, i64 54, !7, i64 78, !7, i64 90, !7, i64 102}
!13 = !{!"short", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_asparse_reg_op = type { i32, [12 x i32], i16, [12 x i16], [12 x i8], [12 x i8], [12 x i8] }

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local i32 @libxsmm_asparse_reg_pick_bcast_reg(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp ne i32 %1, 0
  %6 = icmp ne i32 %3, 0
  %or.cond = and i1 %5, %6
  br i1 %or.cond, label %.preheader38.us.preheader, label %._crit_edge55

.preheader38.us.preheader:                        ; preds = %4
  %7 = zext i32 %3 to i64
  %wide.trip.count = zext i32 %1 to i64
  br label %.preheader38.us

.preheader38.us:                                  ; preds = %.preheader38.us.preheader, %10
  %indvars.iv64 = phi i64 [ 0, %.preheader38.us.preheader ], [ %indvars.iv.next65, %10 ]
  %.02753.us = phi i32 [ 0, %.preheader38.us.preheader ], [ %.229.lcssa.us, %10 ]
  %.03052.us = phi i32 [ 0, %.preheader38.us.preheader ], [ %.232.lcssa.us, %10 ]
  %8 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv64
  %9 = trunc nuw i64 %indvars.iv64 to i32
  br label %.preheader.us

10:                                               ; preds = %._crit_edge48.us
  %indvars.iv.next65 = add nuw nsw i64 %indvars.iv64, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next65, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge55, label %.preheader38.us, !llvm.loop !5

._crit_edge.us.loopexit:                          ; preds = %13
  %.2.us = zext i1 %17 to i32
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.loopexit, %.preheader.us
  %.232.lcssa.us = phi i32 [ %.13145.us, %.preheader.us ], [ %.434.us, %._crit_edge.us.loopexit ]
  %.229.lcssa.us = phi i32 [ %.12846.us, %.preheader.us ], [ %.4.us, %._crit_edge.us.loopexit ]
  %.1.lcssa.us = phi i32 [ 0, %.preheader.us ], [ %.2.us, %._crit_edge.us.loopexit ]
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %11 = icmp ult i64 %indvars.iv.next62, %7
  %.not.us = icmp eq i32 %.1.lcssa.us, 0
  %12 = select i1 %11, i1 %.not.us, i1 false
  br i1 %12, label %.preheader.us, label %._crit_edge48.us, !llvm.loop !7

13:                                               ; preds = %.lr.ph.us, %13
  %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %13 ]
  %.22940.us = phi i32 [ %.12846.us, %.lr.ph.us ], [ %.4.us, %13 ]
  %.23239.us = phi i32 [ %.13145.us, %.lr.ph.us ], [ %.434.us, %13 ]
  %14 = getelementptr inbounds [12 x i16], ptr %25, i64 0, i64 %indvars.iv
  %15 = load i16, ptr %14, align 2, !tbaa !8
  %16 = zext i16 %15 to i32
  %17 = icmp eq i32 %26, %16
  %18 = zext i32 %.23239.us to i64
  %19 = icmp ugt i64 %indvars.iv61, %18
  %spec.select.us = tail call i32 @llvm.umax.i32(i32 %28, i32 %.23239.us)
  %.434.us = select i1 %17, i32 %spec.select.us, i32 %.23239.us
  %20 = select i1 %17, i1 %19, i1 false
  %.4.us = select i1 %20, i32 %9, i32 %.22940.us
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = icmp uge i64 %indvars.iv.next, %27
  %.not68 = select i1 %21, i1 true, i1 %17
  br i1 %.not68, label %._crit_edge.us.loopexit, label %13, !llvm.loop !12

.preheader.us:                                    ; preds = %.preheader38.us, %._crit_edge.us
  %indvars.iv61 = phi i64 [ 0, %.preheader38.us ], [ %indvars.iv.next62, %._crit_edge.us ]
  %.12846.us = phi i32 [ %.02753.us, %.preheader38.us ], [ %.229.lcssa.us, %._crit_edge.us ]
  %.13145.us = phi i32 [ %.03052.us, %.preheader38.us ], [ %.232.lcssa.us, %._crit_edge.us ]
  %22 = getelementptr inbounds %struct.libxsmm_asparse_reg_op, ptr %2, i64 %indvars.iv61
  %23 = getelementptr inbounds i8, ptr %22, i64 52
  %24 = load i16, ptr %23, align 4, !tbaa !13
  %.not = icmp eq i16 %24, 0
  br i1 %.not, label %._crit_edge.us, label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.preheader.us
  %25 = getelementptr inbounds i8, ptr %22, i64 54
  %26 = load i32, ptr %8, align 4, !tbaa !16
  %27 = zext i16 %24 to i64
  %28 = trunc nuw i64 %indvars.iv61 to i32
  br label %13

._crit_edge48.us:                                 ; preds = %._crit_edge.us
  br i1 %.not.us, label %._crit_edge55.loopexit.split.loop.exit69, label %10

._crit_edge55.loopexit.split.loop.exit69:         ; preds = %._crit_edge48.us
  %29 = trunc nuw i64 %indvars.iv64 to i32
  br label %._crit_edge55

._crit_edge55:                                    ; preds = %10, %._crit_edge55.loopexit.split.loop.exit69, %4
  %.035 = phi i32 [ 0, %4 ], [ %29, %._crit_edge55.loopexit.split.loop.exit69 ], [ %.229.lcssa.us, %10 ]
  ret i32 %.035
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = distinct !{!12, !6}
!13 = !{!14, !9, i64 52}
!14 = !{!"", !15, i64 0, !10, i64 4, !9, i64 52, !10, i64 54, !10, i64 78, !10, i64 90, !10, i64 102}
!15 = !{!"int", !10, i64 0}
!16 = !{!15, !15, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass