; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetConvolution8iNhwcDirect" = type { %"class.Simd::SynetConvolution8i", %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", i64, i64, %"struct.Simd::ConvParam", [3 x ptr] }
%"class.Simd::SynetConvolution8i" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", ptr, %"struct.Simd::CvtParam", %"struct.Simd::CvtParam", %"struct.Simd::Array.1", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, i8, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam" = type { i64, i64, i64, i64, i64, i32, i32, i32 }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd8AllocateIhEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd8AllocateIiEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhPhS4_(ptr noundef nonnull align 8 dereferenceable(832) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) unnamed_addr #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %12 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %13 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 3
  %14 = load i64, ptr %13, align 8, !tbaa !9
  %15 = icmp ne i64 %14, 0
  br i1 %15, label %16, label %20

16:                                               ; preds = %4
  %17 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 3
  %18 = load i64, ptr %17, align 8, !tbaa !9
  %19 = call noundef ptr @_ZN4Simd8AllocateIiEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8) %7, i64 noundef %18, i64 noundef 8)
  br label %22

20:                                               ; preds = %4
  %21 = load ptr, ptr %8, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %20, %16
  %23 = phi ptr [ %19, %16 ], [ %21, %20 ]
  store ptr %23, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %24 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 2
  %25 = load i64, ptr %24, align 8, !tbaa !30
  %26 = icmp ne i64 %25, 0
  br i1 %26, label %27, label %31

27:                                               ; preds = %22
  %28 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 2
  %29 = load i64, ptr %28, align 8, !tbaa !30
  %30 = call noundef ptr @_ZN4Simd8AllocateIhEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8) %7, i64 noundef %29, i64 noundef 8)
  br label %32

31:                                               ; preds = %22
  br label %32

32:                                               ; preds = %31, %27
  %33 = phi ptr [ %30, %27 ], [ null, %31 ]
  store ptr %33, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store i64 0, ptr %11, align 8, !tbaa !31
  br label %34

34:                                               ; preds = %71, %32
  %35 = load i64, ptr %11, align 8, !tbaa !31
  %36 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %12, i32 0, i32 13
  %37 = load i64, ptr %36, align 8, !tbaa !32
  %38 = icmp ult i64 %35, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %74

40:                                               ; preds = %34
  %41 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 2
  %42 = load i64, ptr %41, align 8, !tbaa !30
  %43 = icmp ne i64 %42, 0
  br i1 %43, label %44, label %51

44:                                               ; preds = %40
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect8PadInputEPKhPh(ptr noundef nonnull align 8 dereferenceable(832) %12, ptr noundef %45, ptr noundef %46)
  %47 = load ptr, ptr %10, align 8, !tbaa !5
  %48 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %12, i32 0, i32 4
  %49 = load ptr, ptr %9, align 8, !tbaa !5
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832) %12, ptr noundef %47, ptr noundef nonnull align 8 dereferenceable(180) %48, ptr noundef %49, ptr noundef %50)
  br label %56

51:                                               ; preds = %40
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %12, i32 0, i32 1
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832) %12, ptr noundef %52, ptr noundef nonnull align 8 dereferenceable(180) %53, ptr noundef %54, ptr noundef %55)
  br label %56

56:                                               ; preds = %51, %44
  %57 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %12, i32 0, i32 14
  %58 = load i64, ptr %57, align 8, !tbaa !33
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds i8, ptr %59, i64 %58
  store ptr %60, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %12, i32 0, i32 15
  %62 = load i64, ptr %61, align 8, !tbaa !34
  %63 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %12, i32 0, i32 12
  %64 = load i8, ptr %63, align 1, !tbaa !35, !range !36, !noundef !37
  %65 = trunc i8 %64 to i1
  %66 = zext i1 %65 to i64
  %67 = select i1 %65, i64 1, i64 4
  %68 = mul i64 %62, %67
  %69 = load ptr, ptr %8, align 8, !tbaa !5
  %70 = getelementptr inbounds i8, ptr %69, i64 %68
  store ptr %70, ptr %8, align 8, !tbaa !5
  br label %71

71:                                               ; preds = %56
  %72 = load i64, ptr %11, align 8, !tbaa !31
  %73 = add i64 %72, 1
  store i64 %73, ptr %11, align 8, !tbaa !31
  br label %34, !llvm.loop !38

74:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect8PadInputEPKhPh(ptr noundef nonnull align 8 dereferenceable(832), ptr noundef, ptr noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832), ptr noundef, ptr noundef nonnull align 8 dereferenceable(180), ptr noundef, ptr noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !15, i64 616}
!10 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !11, i64 0, !29, i64 552, !15, i64 608, !15, i64 616, !13, i64 624, !7, i64 808}
!11 = !{!"_ZTSN4Simd18SynetConvolution8iE", !12, i64 0, !13, i64 8, !21, i64 192, !22, i64 208, !6, i64 240, !24, i64 248, !24, i64 352, !28, i64 456, !25, i64 472, !25, i64 488, !25, i64 504, !26, i64 520, !26, i64 521, !15, i64 528, !15, i64 536, !15, i64 544}
!12 = !{!"_ZTSN4Simd9DeletableE"}
!13 = !{!"_ZTSN4Simd9ConvParamE", !14, i64 0, !19, i64 160, !15, i64 168, !20, i64 176}
!14 = !{!"_ZTS25SimdConvolutionParameters", !15, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !17, i64 28, !15, i64 32, !15, i64 40, !15, i64 48, !16, i64 56, !17, i64 60, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !15, i64 96, !15, i64 104, !15, i64 112, !15, i64 120, !15, i64 128, !15, i64 136, !15, i64 144, !18, i64 152}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!17 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!18 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !15, i64 8}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !15, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"_ZTSN4Simd8CvtParamE", !21, i64 0, !25, i64 16, !25, i64 32, !25, i64 48, !25, i64 64, !26, i64 80, !27, i64 84, !27, i64 88, !27, i64 92, !27, i64 96}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !15, i64 8}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"int", !7, i64 0}
!28 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !15, i64 8}
!29 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !27, i64 40, !27, i64 44, !27, i64 48}
!30 = !{!10, !15, i64 608}
!31 = !{!15, !15, i64 0}
!32 = !{!11, !15, i64 528}
!33 = !{!11, !15, i64 536}
!34 = !{!11, !15, i64 544}
!35 = !{!11, !26, i64 521}
!36 = !{i8 0, i8 2}
!37 = !{}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd8AllocateIhEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Simd8AllocateIiEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhPhS4_(ptr noundef nonnull align 8 dereferenceable(832) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) unnamed_addr #1 align 2 {
  %5 = alloca ptr, align 8
  store ptr %2, ptr %5, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 616
  %7 = load i64, ptr %6, align 8, !tbaa !9
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %10, label %8

8:                                                ; preds = %4
  %9 = call noundef ptr @_ZN4Simd8AllocateIiEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %7, i64 noundef 8)
  br label %10

10:                                               ; preds = %4, %8
  %11 = phi ptr [ %9, %8 ], [ %3, %4 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 608
  %13 = load i64, ptr %12, align 8, !tbaa !30
  %.not17 = icmp eq i64 %13, 0
  br i1 %.not17, label %16, label %14

14:                                               ; preds = %10
  %15 = call noundef ptr @_ZN4Simd8AllocateIhEEPT_RPhmm(ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %13, i64 noundef 8)
  br label %16

16:                                               ; preds = %10, %14
  %17 = phi ptr [ %15, %14 ], [ null, %10 ]
  %18 = getelementptr inbounds i8, ptr %0, i64 528
  %19 = load i64, ptr %18, align 8, !tbaa !31
  %.not22 = icmp eq i64 %19, 0
  br i1 %.not22, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %16
  %20 = getelementptr inbounds i8, ptr %0, i64 624
  %21 = getelementptr inbounds i8, ptr %0, i64 8
  %22 = getelementptr inbounds i8, ptr %0, i64 536
  %23 = getelementptr inbounds i8, ptr %0, i64 544
  %24 = getelementptr inbounds i8, ptr %0, i64 521
  br label %25

._crit_edge:                                      ; preds = %29, %16
  ret void

25:                                               ; preds = %.lr.ph, %29
  %.021 = phi i64 [ 0, %.lr.ph ], [ %38, %29 ]
  %.01320 = phi ptr [ %1, %.lr.ph ], [ %31, %29 ]
  %.01419 = phi ptr [ %3, %.lr.ph ], [ %37, %29 ]
  %26 = load i64, ptr %12, align 8, !tbaa !30
  %.not18 = icmp eq i64 %26, 0
  br i1 %.not18, label %28, label %27

27:                                               ; preds = %25
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect8PadInputEPKhPh(ptr noundef nonnull align 8 dereferenceable(832) %0, ptr noundef %.01320, ptr noundef %17)
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832) %0, ptr noundef %17, ptr noundef nonnull align 8 dereferenceable(180) %20, ptr noundef %11, ptr noundef %.01419)
  br label %29

28:                                               ; preds = %25
  call void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832) %0, ptr noundef %.01320, ptr noundef nonnull align 8 dereferenceable(180) %21, ptr noundef %11, ptr noundef %.01419)
  br label %29

29:                                               ; preds = %28, %27
  %30 = load i64, ptr %22, align 8, !tbaa !32
  %31 = getelementptr inbounds i8, ptr %.01320, i64 %30
  %32 = load i64, ptr %23, align 8, !tbaa !33
  %33 = load i8, ptr %24, align 1, !tbaa !34, !range !35, !noundef !36
  %34 = trunc nuw i8 %33 to i1
  %35 = select i1 %34, i64 0, i64 2
  %36 = shl i64 %32, %35
  %37 = getelementptr inbounds i8, ptr %.01419, i64 %36
  %38 = add nuw i64 %.021, 1
  %39 = load i64, ptr %18, align 8, !tbaa !31
  %40 = icmp ult i64 %38, %39
  br i1 %40, label %25, label %._crit_edge, !llvm.loop !37
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect8PadInputEPKhPh(ptr noundef nonnull align 8 dereferenceable(832), ptr noundef, ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9Forward8uEPKhRKNS_9ConvParamEPiPh(ptr noundef nonnull align 8 dereferenceable(832), ptr noundef, ptr noundef nonnull align 8 dereferenceable(180), ptr noundef, ptr noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !15, i64 616}
!10 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !11, i64 0, !29, i64 552, !15, i64 608, !15, i64 616, !13, i64 624, !7, i64 808}
!11 = !{!"_ZTSN4Simd18SynetConvolution8iE", !12, i64 0, !13, i64 8, !21, i64 192, !22, i64 208, !6, i64 240, !24, i64 248, !24, i64 352, !28, i64 456, !25, i64 472, !25, i64 488, !25, i64 504, !26, i64 520, !26, i64 521, !15, i64 528, !15, i64 536, !15, i64 544}
!12 = !{!"_ZTSN4Simd9DeletableE"}
!13 = !{!"_ZTSN4Simd9ConvParamE", !14, i64 0, !19, i64 160, !15, i64 168, !20, i64 176}
!14 = !{!"_ZTS25SimdConvolutionParameters", !15, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !17, i64 28, !15, i64 32, !15, i64 40, !15, i64 48, !16, i64 56, !17, i64 60, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !15, i64 96, !15, i64 104, !15, i64 112, !15, i64 120, !15, i64 128, !15, i64 136, !15, i64 144, !18, i64 152}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!17 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!18 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!19 = !{!"_ZTS8SimdBool", !7, i64 0}
!20 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !15, i64 8}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !15, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"_ZTSN4Simd8CvtParamE", !21, i64 0, !25, i64 16, !25, i64 32, !25, i64 48, !25, i64 64, !26, i64 80, !27, i64 84, !27, i64 88, !27, i64 92, !27, i64 96}
!25 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !15, i64 8}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"int", !7, i64 0}
!28 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !15, i64 8}
!29 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !27, i64 40, !27, i64 44, !27, i64 48}
!30 = !{!10, !15, i64 608}
!31 = !{!11, !15, i64 528}
!32 = !{!11, !15, i64 536}
!33 = !{!11, !15, i64 544}
!34 = !{!11, !26, i64 521}
!35 = !{i8 0, i8 2}
!36 = !{}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass