; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fDirectNchw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Simd::Base::SynetConvolution32fDirectNchw" = type { %"class.Simd::SynetConvolution32f", i64, i64, i64, i64, i64, i64, i64, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr noundef nonnull align 8 dereferenceable(512) %0, ptr noundef %1, ptr noundef %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %14 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %13, i32 0, i32 1
  store ptr %14, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %122, %3
  %16 = load i64, ptr %8, align 8, !tbaa !9
  %17 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %13, i32 0, i32 4
  %18 = load i64, ptr %17, align 8, !tbaa !11
  %19 = icmp ult i64 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  br label %125

21:                                               ; preds = %15
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %22, i32 0, i32 16
  %24 = load i64, ptr %23, align 8, !tbaa !37
  %25 = icmp ne i64 %24, 0
  br i1 %25, label %26, label %43

26:                                               ; preds = %21
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %28, i32 0, i32 16
  %30 = load i64, ptr %29, align 8, !tbaa !37
  %31 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %13, i32 0, i32 6
  %32 = load i64, ptr %31, align 8, !tbaa !38
  %33 = mul i64 %30, %32
  %34 = mul i64 %33, 4
  call void @llvm.memset.p0.i64(ptr align 4 %27, i8 0, i64 %34, i1 false)
  %35 = load ptr, ptr %7, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %35, i32 0, i32 16
  %37 = load i64, ptr %36, align 8, !tbaa !37
  %38 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %13, i32 0, i32 6
  %39 = load i64, ptr %38, align 8, !tbaa !38
  %40 = mul i64 %37, %39
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds float, ptr %41, i64 %40
  store ptr %42, ptr %6, align 8, !tbaa !5
  br label %43

43:                                               ; preds = %26, %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store i64 0, ptr %10, align 8, !tbaa !9
  br label %44

44:                                               ; preds = %96, %43
  %45 = load i64, ptr %10, align 8, !tbaa !9
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %46, i32 0, i32 1
  %48 = load i64, ptr %47, align 8, !tbaa !39
  %49 = icmp ult i64 %45, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %44
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %99

51:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %52

52:                                               ; preds = %62, %51
  %53 = load i64, ptr %11, align 8, !tbaa !9
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %54, i32 0, i32 17
  %56 = load i64, ptr %55, align 8, !tbaa !40
  %57 = icmp ult i64 %53, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %52
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  br label %65

59:                                               ; preds = %52
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds float, ptr %60, i32 1
  store ptr %61, ptr %6, align 8, !tbaa !5
  store float 0.000000e+00, ptr %60, align 4, !tbaa !41
  br label %62

62:                                               ; preds = %59
  %63 = load i64, ptr %11, align 8, !tbaa !9
  %64 = add i64 %63, 1
  store i64 %64, ptr %11, align 8, !tbaa !9
  br label %52, !llvm.loop !42

65:                                               ; preds = %58
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %68, i32 0, i32 2
  %70 = load i64, ptr %69, align 8, !tbaa !44
  %71 = mul i64 %70, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %66, ptr align 4 %67, i64 %71, i1 false)
  %72 = load ptr, ptr %7, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %72, i32 0, i32 2
  %74 = load i64, ptr %73, align 8, !tbaa !44
  %75 = load ptr, ptr %6, align 8, !tbaa !5
  %76 = getelementptr inbounds float, ptr %75, i64 %74
  store ptr %76, ptr %6, align 8, !tbaa !5
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %77, i32 0, i32 2
  %79 = load i64, ptr %78, align 8, !tbaa !44
  %80 = load ptr, ptr %5, align 8, !tbaa !5
  %81 = getelementptr inbounds float, ptr %80, i64 %79
  store ptr %81, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %82

82:                                               ; preds = %92, %65
  %83 = load i64, ptr %12, align 8, !tbaa !9
  %84 = load ptr, ptr %7, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %84, i32 0, i32 19
  %86 = load i64, ptr %85, align 8, !tbaa !45
  %87 = icmp ult i64 %83, %86
  br i1 %87, label %89, label %88

88:                                               ; preds = %82
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  br label %95

89:                                               ; preds = %82
  %90 = load ptr, ptr %6, align 8, !tbaa !5
  %91 = getelementptr inbounds float, ptr %90, i32 1
  store ptr %91, ptr %6, align 8, !tbaa !5
  store float 0.000000e+00, ptr %90, align 4, !tbaa !41
  br label %92

92:                                               ; preds = %89
  %93 = load i64, ptr %12, align 8, !tbaa !9
  %94 = add i64 %93, 1
  store i64 %94, ptr %12, align 8, !tbaa !9
  br label %82, !llvm.loop !46

95:                                               ; preds = %88
  br label %96

96:                                               ; preds = %95
  %97 = load i64, ptr %10, align 8, !tbaa !9
  %98 = add i64 %97, 1
  store i64 %98, ptr %10, align 8, !tbaa !9
  br label %44, !llvm.loop !47

99:                                               ; preds = %50
  %100 = load ptr, ptr %7, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %100, i32 0, i32 18
  %102 = load i64, ptr %101, align 8, !tbaa !48
  %103 = icmp ne i64 %102, 0
  br i1 %103, label %104, label %121

104:                                              ; preds = %99
  %105 = load ptr, ptr %6, align 8, !tbaa !5
  %106 = load ptr, ptr %7, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %106, i32 0, i32 18
  %108 = load i64, ptr %107, align 8, !tbaa !48
  %109 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %13, i32 0, i32 6
  %110 = load i64, ptr %109, align 8, !tbaa !38
  %111 = mul i64 %108, %110
  %112 = mul i64 %111, 4
  call void @llvm.memset.p0.i64(ptr align 4 %105, i8 0, i64 %112, i1 false)
  %113 = load ptr, ptr %7, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %113, i32 0, i32 18
  %115 = load i64, ptr %114, align 8, !tbaa !48
  %116 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fDirectNchw", ptr %13, i32 0, i32 6
  %117 = load i64, ptr %116, align 8, !tbaa !38
  %118 = mul i64 %115, %117
  %119 = load ptr, ptr %6, align 8, !tbaa !5
  %120 = getelementptr inbounds float, ptr %119, i64 %118
  store ptr %120, ptr %6, align 8, !tbaa !5
  br label %121

121:                                              ; preds = %104, %99
  br label %122

122:                                              ; preds = %121
  %123 = load i64, ptr %8, align 8, !tbaa !9
  %124 = add i64 %123, 1
  store i64 %124, ptr %8, align 8, !tbaa !9
  br label %15, !llvm.loop !49

125:                                              ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 464}
!12 = !{!"_ZTSN4Simd4Base29SynetConvolution32fDirectNchwE", !13, i64 0, !10, i64 440, !10, i64 448, !10, i64 456, !10, i64 464, !10, i64 472, !10, i64 480, !10, i64 488, !36, i64 496, !6, i64 504}
!13 = !{!"_ZTSN4Simd19SynetConvolution32fE", !14, i64 0, !15, i64 8, !22, i64 192, !23, i64 208, !23, i64 212, !6, i64 216, !6, i64 224, !6, i64 232, !24, i64 240, !31, i64 304, !22, i64 368, !6, i64 384, !6, i64 392, !6, i64 400, !29, i64 408}
!14 = !{!"_ZTSN4Simd9DeletableE"}
!15 = !{!"_ZTSN4Simd9ConvParamE", !16, i64 0, !20, i64 160, !10, i64 168, !21, i64 176}
!16 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !17, i64 24, !18, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !17, i64 56, !18, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !19, i64 152}
!17 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!18 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!19 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!20 = !{!"_ZTS8SimdBool", !7, i64 0}
!21 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!22 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!23 = !{!"float", !7, i64 0}
!24 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !6, i64 0, !25, i64 8, !29, i64 32}
!25 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !30, i64 0, !10, i64 8, !7, i64 16}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!31 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !6, i64 0, !32, i64 8, !29, i64 32}
!32 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"int", !7, i64 0}
!37 = !{!16, !10, i64 112}
!38 = !{!12, !10, i64 480}
!39 = !{!16, !10, i64 8}
!40 = !{!16, !10, i64 120}
!41 = !{!23, !23, i64 0}
!42 = distinct !{!42, !43}
!43 = !{!"llvm.loop.mustprogress"}
!44 = !{!16, !10, i64 16}
!45 = !{!16, !10, i64 136}
!46 = distinct !{!46, !43}
!47 = distinct !{!47, !43}
!48 = !{!16, !10, i64 128}
!49 = distinct !{!49, !43}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @_ZNK4Simd4Base29SynetConvolution32fDirectNchw3PadEPKfPf(ptr nocapture noundef nonnull readonly align 8 dereferenceable(512) %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 464
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %.not59 = icmp eq i64 %5, 0
  br i1 %.not59, label %._crit_edge58, label %.lr.ph57

.lr.ph57:                                         ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 120
  %7 = getelementptr inbounds i8, ptr %0, i64 480
  %8 = getelementptr inbounds i8, ptr %0, i64 16
  %9 = getelementptr inbounds i8, ptr %0, i64 128
  %10 = getelementptr inbounds i8, ptr %0, i64 24
  %11 = getelementptr inbounds i8, ptr %0, i64 144
  %12 = getelementptr inbounds i8, ptr %0, i64 136
  br label %13

._crit_edge58:                                    ; preds = %48, %3
  ret void

13:                                               ; preds = %.lr.ph57, %48
  %.03255 = phi i64 [ 0, %.lr.ph57 ], [ %49, %48 ]
  %.03354 = phi ptr [ %1, %.lr.ph57 ], [ %.1.lcssa, %48 ]
  %.03453 = phi ptr [ %2, %.lr.ph57 ], [ %.5, %48 ]
  %14 = load i64, ptr %6, align 8, !tbaa !35
  %.not = icmp eq i64 %14, 0
  br i1 %.not, label %23, label %15

15:                                               ; preds = %13
  %16 = load i64, ptr %7, align 8, !tbaa !36
  %17 = shl i64 %14, 2
  %18 = mul i64 %17, %16
  tail call void @llvm.memset.p0.i64(ptr align 4 %.03453, i8 0, i64 %18, i1 false)
  %19 = load i64, ptr %6, align 8, !tbaa !35
  %20 = load i64, ptr %7, align 8, !tbaa !36
  %21 = mul i64 %20, %19
  %22 = getelementptr inbounds float, ptr %.03453, i64 %21
  br label %23

23:                                               ; preds = %15, %13
  %.135 = phi ptr [ %22, %15 ], [ %.03453, %13 ]
  %24 = load i64, ptr %8, align 8, !tbaa !37
  %.not60 = icmp eq i64 %24, 0
  br i1 %.not60, label %._crit_edge50, label %.preheader

.preheader:                                       ; preds = %23, %._crit_edge45
  %.03149 = phi i64 [ %37, %._crit_edge45 ], [ 0, %23 ]
  %.148 = phi ptr [ %32, %._crit_edge45 ], [ %.03354, %23 ]
  %.247 = phi ptr [ %.4.lcssa, %._crit_edge45 ], [ %.135, %23 ]
  %25 = load i64, ptr %9, align 8, !tbaa !38
  %.not61 = icmp eq i64 %25, 0
  br i1 %.not61, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader
  %26 = shl nuw i64 %25, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %.247, i8 0, i64 %26, i1 false), !tbaa !39
  %scevgep = getelementptr i8, ptr %.247, i64 %26
  br label %._crit_edge

._crit_edge50:                                    ; preds = %._crit_edge45, %23
  %.2.lcssa = phi ptr [ %.135, %23 ], [ %.4.lcssa, %._crit_edge45 ]
  %.1.lcssa = phi ptr [ %.03354, %23 ], [ %32, %._crit_edge45 ]
  %27 = load i64, ptr %12, align 8, !tbaa !40
  %.not38 = icmp eq i64 %27, 0
  br i1 %.not38, label %48, label %40

._crit_edge:                                      ; preds = %.lr.ph.preheader, %.preheader
  %.3.lcssa = phi ptr [ %.247, %.preheader ], [ %scevgep, %.lr.ph.preheader ]
  %28 = load i64, ptr %10, align 8, !tbaa !41
  %29 = shl i64 %28, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %.3.lcssa, ptr align 4 %.148, i64 %29, i1 false)
  %30 = load i64, ptr %10, align 8, !tbaa !41
  %31 = getelementptr float, ptr %.3.lcssa, i64 %30
  %32 = getelementptr inbounds float, ptr %.148, i64 %30
  %33 = load i64, ptr %11, align 8, !tbaa !42
  %.not62 = icmp eq i64 %33, 0
  br i1 %.not62, label %._crit_edge45, label %.lr.ph44.preheader

.lr.ph44.preheader:                               ; preds = %._crit_edge
  %34 = shl nuw i64 %33, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %31, i8 0, i64 %34, i1 false), !tbaa !39
  %35 = add i64 %33, %30
  %36 = shl i64 %35, 2
  %scevgep65 = getelementptr i8, ptr %.3.lcssa, i64 %36
  br label %._crit_edge45

._crit_edge45:                                    ; preds = %.lr.ph44.preheader, %._crit_edge
  %.4.lcssa = phi ptr [ %31, %._crit_edge ], [ %scevgep65, %.lr.ph44.preheader ]
  %37 = add nuw i64 %.03149, 1
  %38 = load i64, ptr %8, align 8, !tbaa !37
  %39 = icmp ult i64 %37, %38
  br i1 %39, label %.preheader, label %._crit_edge50, !llvm.loop !43

40:                                               ; preds = %._crit_edge50
  %41 = load i64, ptr %7, align 8, !tbaa !36
  %42 = shl i64 %27, 2
  %43 = mul i64 %42, %41
  tail call void @llvm.memset.p0.i64(ptr align 4 %.2.lcssa, i8 0, i64 %43, i1 false)
  %44 = load i64, ptr %12, align 8, !tbaa !40
  %45 = load i64, ptr %7, align 8, !tbaa !36
  %46 = mul i64 %45, %44
  %47 = getelementptr inbounds float, ptr %.2.lcssa, i64 %46
  br label %48

48:                                               ; preds = %._crit_edge50, %40
  %.5 = phi ptr [ %47, %40 ], [ %.2.lcssa, %._crit_edge50 ]
  %49 = add nuw i64 %.03255, 1
  %50 = load i64, ptr %4, align 8, !tbaa !5
  %51 = icmp ult i64 %49, %50
  br i1 %51, label %13, label %._crit_edge58, !llvm.loop !45
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 464}
!6 = !{!"_ZTSN4Simd4Base29SynetConvolution32fDirectNchwE", !7, i64 0, !11, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !11, i64 472, !11, i64 480, !11, i64 488, !34, i64 496, !20, i64 504}
!7 = !{!"_ZTSN4Simd19SynetConvolution32fE", !8, i64 0, !9, i64 8, !19, i64 192, !21, i64 208, !21, i64 212, !20, i64 216, !20, i64 224, !20, i64 232, !22, i64 240, !29, i64 304, !19, i64 368, !20, i64 384, !20, i64 392, !20, i64 400, !27, i64 408}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd9ConvParamE", !10, i64 0, !17, i64 160, !11, i64 168, !18, i64 176}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !14, i64 24, !15, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !14, i64 56, !15, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !16, i64 152}
!11 = !{!"long", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTS18SimdTensorDataType", !12, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !12, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !12, i64 0}
!17 = !{!"_ZTS8SimdBool", !12, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !12, i64 0}
!19 = !{!"_ZTSN4Simd5ArrayIfEE", !20, i64 0, !11, i64 8}
!20 = !{!"any pointer", !12, i64 0}
!21 = !{!"float", !12, i64 0}
!22 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !20, i64 0, !23, i64 8, !27, i64 32}
!23 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !28, i64 0, !11, i64 8, !12, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !20, i64 0}
!29 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !20, i64 0, !30, i64 8, !27, i64 32}
!30 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!34 = !{!"int", !12, i64 0}
!35 = !{!10, !11, i64 112}
!36 = !{!6, !11, i64 480}
!37 = !{!10, !11, i64 8}
!38 = !{!10, !11, i64 120}
!39 = !{!21, !21, i64 0}
!40 = !{!10, !11, i64 128}
!41 = !{!10, !11, i64 16}
!42 = !{!10, !11, i64 136}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}
!45 = distinct !{!45, !44}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass