; LLVM IR from ermig1979/Simd :: src/Test/TestRandom.ll (ZN4Test10FillRandomERNS_6TensorIaEEaa)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Test6RandomEi(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Test10FillRandomERNS_6TensorIaEEaa(ptr noundef nonnull align 8 dereferenceable(64) %0, i8 noundef signext %1, i8 noundef signext %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store i8 %2, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !10
  br label %8

8:                                                ; preds = %30, %3
  %9 = load i64, ptr %7, align 8, !tbaa !10
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = call noundef i64 @_ZNK4Test6TensorIaE4SizeEv(ptr noundef nonnull align 8 dereferenceable(64) %10)
  %12 = icmp ult i64 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %33

14:                                               ; preds = %8
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = sext i8 %15 to i32
  %17 = load i8, ptr %6, align 1, !tbaa !9
  %18 = sext i8 %17 to i32
  %19 = load i8, ptr %5, align 1, !tbaa !9
  %20 = sext i8 %19 to i32
  %21 = sub nsw i32 %18, %20
  %22 = add nsw i32 %21, 1
  %23 = call noundef i32 @_ZN4Test6RandomEi(i32 noundef %22)
  %24 = add nsw i32 %16, %23
  %25 = trunc i32 %24 to i8
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = call noundef ptr @_ZN4Test6TensorIaE4DataEv(ptr noundef nonnull align 8 dereferenceable(64) %26)
  %28 = load i64, ptr %7, align 8, !tbaa !10
  %29 = getelementptr inbounds i8, ptr %27, i64 %28
  store i8 %25, ptr %29, align 1, !tbaa !9
  br label %30

30:                                               ; preds = %14
  %31 = load i64, ptr %7, align 8, !tbaa !10
  %32 = add i64 %31, 1
  store i64 %32, ptr %7, align 8, !tbaa !10
  br label %8, !llvm.loop !12

33:                                               ; preds = %13
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Test6TensorIaE4SizeEv(ptr noundef nonnull align 8 dereferenceable(64)) #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Test6TensorIaE4DataEv(ptr noundef nonnull align 8 dereferenceable(64)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Test6RandomEi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Test10FillRandomERNS_6TensorIaEEaa(ptr noundef nonnull align 8 dereferenceable(64) %0, i8 noundef signext %1, i8 noundef signext %2) local_unnamed_addr #1 {
  %4 = tail call noundef i64 @_ZNK4Test6TensorIaE4SizeEv(ptr noundef nonnull align 8 dereferenceable(64) %0)
  %.not = icmp eq i64 %4, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %5 = sext i8 %1 to i32
  %6 = sext i8 %2 to i32
  %reass.sub = sub nsw i32 %6, %5
  %7 = add nsw i32 %reass.sub, 1
  br label %8

._crit_edge:                                      ; preds = %8, %3
  ret void

8:                                                ; preds = %.lr.ph, %8
  %.07 = phi i64 [ 0, %.lr.ph ], [ %14, %8 ]
  %9 = tail call noundef i32 @_ZN4Test6RandomEi(i32 noundef %7)
  %10 = trunc i32 %9 to i8
  %11 = add i8 %10, %1
  %12 = tail call noundef ptr @_ZN4Test6TensorIaE4DataEv(ptr noundef nonnull align 8 dereferenceable(64) %0)
  %13 = getelementptr inbounds i8, ptr %12, i64 %.07
  store i8 %11, ptr %13, align 1, !tbaa !5
  %14 = add nuw i64 %.07, 1
  %15 = tail call noundef i64 @_ZNK4Test6TensorIaE4SizeEv(ptr noundef nonnull align 8 dereferenceable(64) %0)
  %16 = icmp ult i64 %14, %15
  br i1 %16, label %8, label %._crit_edge, !llvm.loop !8
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Test6TensorIaE4SizeEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4Test6TensorIaE4DataEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #0 align 2

attributes #0 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass