; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [259 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [80 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_vreg_asimd_aarch64 = external hidden unnamed_addr constant [263 x i8], align 1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_vreg_asimd_aarch64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) #1 {
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i32 %1, ptr %12, align 4, !tbaa !9
  store i32 %2, ptr %13, align 4, !tbaa !9
  store i32 %3, ptr %14, align 4, !tbaa !9
  store i32 %4, ptr %15, align 4, !tbaa !9
  store i32 %5, ptr %16, align 4, !tbaa !9
  store i32 %6, ptr %17, align 4, !tbaa !9
  store i32 %7, ptr %18, align 4, !tbaa !9
  store i32 %8, ptr %19, align 4, !tbaa !9
  store i32 %9, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 0, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %29 = load ptr, ptr %11, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %29, i32 0, i32 6
  %31 = load i32, ptr %30, align 4, !tbaa !11
  %32 = call i32 @libxsmm_cpuid_vlen32(i32 noundef %31)
  %33 = mul nsw i32 4, %32
  store i32 %33, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  %34 = load i32, ptr %18, align 4, !tbaa !9
  %35 = icmp eq i32 %34, 4
  %36 = zext i1 %35 to i64
  %37 = select i1 %35, i32 -1186988026, i32 2034237446
  store i32 %37, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %38 = load i32, ptr %18, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 4
  %40 = zext i1 %39 to i64
  %41 = select i1 %39, i32 -1191182330, i32 2030043142
  store i32 %41, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %42 = load i32, ptr %18, align 4, !tbaa !9
  %43 = icmp eq i32 %42, 4
  %44 = zext i1 %43 to i64
  %45 = select i1 %43, i32 2, i32 1
  store i32 %45, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  %46 = load i32, ptr %16, align 4, !tbaa !9
  %47 = icmp eq i32 %46, 4
  %48 = zext i1 %47 to i64
  %49 = select i1 %47, i32 4, i32 6
  store i32 %49, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  %50 = load i32, ptr %18, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 4
  %52 = zext i1 %51 to i64
  %53 = select i1 %51, i32 4, i32 2
  store i32 %53, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #4
  %54 = load i32, ptr %19, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %60

56:                                               ; preds = %10
  %57 = load i32, ptr %22, align 4, !tbaa !9
  %58 = load i32, ptr %16, align 4, !tbaa !9
  %59 = udiv i32 %57, %58
  br label %62

60:                                               ; preds = %10
  %61 = load i32, ptr %19, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %60, %56
  %63 = phi i32 [ %59, %56 ], [ %61, %60 ]
  store i32 %63, ptr %28, align 4, !tbaa !9
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %194, %62
  %65 = load i32, ptr %21, align 4, !tbaa !9
  %66 = load i32, ptr %28, align 4, !tbaa !9
  %67 = icmp ult i32 %65, %66
  br i1 %67, label %68, label %197

68:                                               ; preds = %64
  %69 = load ptr, ptr %11, align 8, !tbaa !5
  %70 = load i32, ptr %13, align 4, !tbaa !9
  %71 = load i32, ptr %15, align 4, !tbaa !9
  %72 = load i32, ptr %21, align 4, !tbaa !9
  %73 = trunc i32 %72 to i16
  %74 = zext i16 %73 to i32
  %75 = icmp eq i32 0, %74
  br i1 %75, label %81, label %76

76:                                               ; preds = %68
  %77 = load i32, ptr %21, align 4, !tbaa !9
  %78 = trunc i32 %77 to i16
  %79 = zext i16 %78 to i32
  %80 = icmp slt i32 0, %79
  br i1 %80, label %81, label %99

81:                                               ; preds = %76, %68
  %82 = load i32, ptr %21, align 4, !tbaa !9
  %83 = zext i32 %82 to i64
  %84 = mul i64 1, %83
  %85 = icmp ult i64 %84, 65535
  br i1 %85, label %86, label %90

86:                                               ; preds = %81
  %87 = load i32, ptr %21, align 4, !tbaa !9
  %88 = zext i32 %87 to i64
  %89 = mul i64 1, %88
  br label %91

90:                                               ; preds = %81
  br label %91

91:                                               ; preds = %90, %86
  %92 = phi i64 [ %89, %86 ], [ 65535, %90 ]
  %93 = icmp ule i64 %92, 65535
  br i1 %93, label %94, label %99

94:                                               ; preds = %91
  %95 = load i32, ptr %21, align 4, !tbaa !9
  %96 = uitofp i32 %95 to double
  %97 = fcmp ole double 0.000000e+00, %96
  br i1 %97, label %98, label %99

98:                                               ; preds = %94
  br label %100

99:                                               ; preds = %94, %91, %76
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 254, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_vreg_asimd_aarch64) #5
  unreachable

100:                                              ; preds = %98
  %101 = load i32, ptr %21, align 4, !tbaa !9
  %102 = trunc i32 %101 to i16
  %103 = load i32, ptr %26, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %69, i32 noundef 234896406, i32 noundef %70, i32 noundef %71, i16 noundef signext %102, i32 noundef %103)
  %104 = load ptr, ptr %11, align 8, !tbaa !5
  %105 = load i32, ptr %12, align 4, !tbaa !9
  %106 = load i32, ptr %13, align 4, !tbaa !9
  %107 = load i32, ptr %13, align 4, !tbaa !9
  %108 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %104, i32 noundef 184549383, i32 noundef %105, i32 noundef %106, i32 noundef %107, i32 noundef %108, i32 noundef 0)
  %109 = load i32, ptr %20, align 4, !tbaa !9
  %110 = icmp ugt i32 %109, 0
  br i1 %110, label %111, label %152

111:                                              ; preds = %100
  %112 = load ptr, ptr %11, align 8, !tbaa !5
  %113 = load i32, ptr %23, align 4, !tbaa !9
  %114 = load i32, ptr %13, align 4, !tbaa !9
  %115 = load i32, ptr %14, align 4, !tbaa !9
  %116 = and i32 31, %115
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %112, i32 noundef %113, i32 noundef %114, i32 noundef 127, i32 noundef 0, i32 noundef %116)
  %117 = load ptr, ptr %11, align 8, !tbaa !5
  %118 = load i32, ptr %14, align 4, !tbaa !9
  %119 = load i32, ptr %17, align 4, !tbaa !9
  %120 = load i32, ptr %21, align 4, !tbaa !9
  %121 = trunc i32 %120 to i16
  %122 = zext i16 %121 to i32
  %123 = icmp eq i32 0, %122
  br i1 %123, label %129, label %124

124:                                              ; preds = %111
  %125 = load i32, ptr %21, align 4, !tbaa !9
  %126 = trunc i32 %125 to i16
  %127 = zext i16 %126 to i32
  %128 = icmp slt i32 0, %127
  br i1 %128, label %129, label %147

129:                                              ; preds = %124, %111
  %130 = load i32, ptr %21, align 4, !tbaa !9
  %131 = zext i32 %130 to i64
  %132 = mul i64 1, %131
  %133 = icmp ult i64 %132, 65535
  br i1 %133, label %134, label %138

134:                                              ; preds = %129
  %135 = load i32, ptr %21, align 4, !tbaa !9
  %136 = zext i32 %135 to i64
  %137 = mul i64 1, %136
  br label %139

138:                                              ; preds = %129
  br label %139

139:                                              ; preds = %138, %134
  %140 = phi i64 [ %137, %134 ], [ 65535, %138 ]
  %141 = icmp ule i64 %140, 65535
  br i1 %141, label %142, label %147

142:                                              ; preds = %139
  %143 = load i32, ptr %21, align 4, !tbaa !9
  %144 = uitofp i32 %143 to double
  %145 = fcmp ole double 0.000000e+00, %144
  br i1 %145, label %146, label %147

146:                                              ; preds = %142
  br label %148

147:                                              ; preds = %142, %139, %124
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 264, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_vreg_asimd_aarch64) #5
  unreachable

148:                                              ; preds = %146
  %149 = load i32, ptr %21, align 4, !tbaa !9
  %150 = trunc i32 %149 to i16
  %151 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %117, i32 noundef 1308630046, i32 noundef %118, i32 noundef %119, i16 noundef signext %150, i32 noundef %151)
  br label %193

152:                                              ; preds = %100
  %153 = load ptr, ptr %11, align 8, !tbaa !5
  %154 = load i32, ptr %14, align 4, !tbaa !9
  %155 = load i32, ptr %17, align 4, !tbaa !9
  %156 = load i32, ptr %21, align 4, !tbaa !9
  %157 = trunc i32 %156 to i16
  %158 = zext i16 %157 to i32
  %159 = icmp eq i32 0, %158
  br i1 %159, label %165, label %160

160:                                              ; preds = %152
  %161 = load i32, ptr %21, align 4, !tbaa !9
  %162 = trunc i32 %161 to i16
  %163 = zext i16 %162 to i32
  %164 = icmp slt i32 0, %163
  br i1 %164, label %165, label %183

165:                                              ; preds = %160, %152
  %166 = load i32, ptr %21, align 4, !tbaa !9
  %167 = zext i32 %166 to i64
  %168 = mul i64 1, %167
  %169 = icmp ult i64 %168, 65535
  br i1 %169, label %170, label %174

170:                                              ; preds = %165
  %171 = load i32, ptr %21, align 4, !tbaa !9
  %172 = zext i32 %171 to i64
  %173 = mul i64 1, %172
  br label %175

174:                                              ; preds = %165
  br label %175

175:                                              ; preds = %174, %170
  %176 = phi i64 [ %173, %170 ], [ 65535, %174 ]
  %177 = icmp ule i64 %176, 65535
  br i1 %177, label %178, label %183

178:                                              ; preds = %175
  %179 = load i32, ptr %21, align 4, !tbaa !9
  %180 = uitofp i32 %179 to double
  %181 = fcmp ole double 0.000000e+00, %180
  br i1 %181, label %182, label %183

182:                                              ; preds = %178
  br label %184

183:                                              ; preds = %178, %175, %160
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 267, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_vreg_asimd_aarch64) #5
  unreachable

184:                                              ; preds = %182
  %185 = load i32, ptr %21, align 4, !tbaa !9
  %186 = trunc i32 %185 to i16
  %187 = load i32, ptr %27, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %153, i32 noundef 234896406, i32 noundef %154, i32 noundef %155, i16 noundef signext %186, i32 noundef %187)
  %188 = load ptr, ptr %11, align 8, !tbaa !5
  %189 = load i32, ptr %24, align 4, !tbaa !9
  %190 = load i32, ptr %13, align 4, !tbaa !9
  %191 = load i32, ptr %14, align 4, !tbaa !9
  %192 = and i32 31, %191
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %188, i32 noundef %189, i32 noundef %190, i32 noundef 127, i32 noundef 0, i32 noundef %192)
  br label %193

193:                                              ; preds = %184, %148
  br label %194

194:                                              ; preds = %193
  %195 = load i32, ptr %21, align 4, !tbaa !9
  %196 = add i32 %195, 1
  store i32 %196, ptr %21, align 4, !tbaa !9
  br label %64, !llvm.loop !13

197:                                              ; preds = %64
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) #0

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_vreg_asimd_aarch64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) local_unnamed_addr #1 {
  %11 = getelementptr inbounds i8, ptr %0, i64 28
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = tail call i32 @libxsmm_cpuid_vlen32(i32 noundef %12) #2
  %14 = icmp eq i32 %7, 4
  %15 = select i1 %14, i32 -1186988026, i32 2034237446
  %16 = select i1 %14, i32 -1191182330, i32 2030043142
  %17 = select i1 %14, i32 2, i32 1
  %18 = icmp eq i32 %5, 4
  %19 = select i1 %18, i32 4, i32 6
  %20 = select i1 %14, i32 4, i32 2
  %21 = icmp eq i32 %8, 0
  br i1 %21, label %22, label %.lr.ph

22:                                               ; preds = %10
  %23 = shl nsw i32 %13, 2
  %24 = udiv i32 %23, %5
  %.not58 = icmp ult i32 %23, %5
  br i1 %.not58, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %10, %22
  %25 = phi i32 [ %24, %22 ], [ %8, %10 ]
  %.not = icmp eq i32 %9, 0
  %26 = and i32 %3, 31
  br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
  %.057.us = phi i32 [ %28, %.lr.ph.split.us ], [ 0, %.lr.ph ]
  %27 = trunc i32 %.057.us to i16
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 234896406, i32 noundef %2, i32 noundef %4, i16 noundef signext %27, i32 noundef %19) #2
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %1, i32 noundef %2, i32 noundef %2, i32 noundef %17, i32 noundef 0) #2
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 234896406, i32 noundef %3, i32 noundef %6, i16 noundef signext %27, i32 noundef %20) #2
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef %16, i32 noundef %2, i32 noundef 127, i32 noundef 0, i32 noundef %26) #2
  %28 = add nuw i32 %.057.us, 1
  %exitcond60.not = icmp eq i32 %28, %25
  br i1 %exitcond60.not, label %._crit_edge, label %.lr.ph.split.us, !llvm.loop !11

.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
  %.057 = phi i32 [ %30, %.lr.ph.split ], [ 0, %.lr.ph ]
  %29 = trunc i32 %.057 to i16
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 234896406, i32 noundef %2, i32 noundef %4, i16 noundef signext %29, i32 noundef %19) #2
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %1, i32 noundef %2, i32 noundef %2, i32 noundef %17, i32 noundef 0) #2
  tail call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %0, i32 noundef %15, i32 noundef %2, i32 noundef 127, i32 noundef 0, i32 noundef %26) #2
  tail call void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef %0, i32 noundef 1308630046, i32 noundef %3, i32 noundef %6, i16 noundef signext %29, i32 noundef %20) #2
  %30 = add nuw i32 %.057, 1
  %exitcond.not = icmp eq i32 %30, %25
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.split, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph.split, %.lr.ph.split.us, %22
  ret void
}

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_asimd_gpr_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i16 noundef signext, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass