; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array.0" = type { ptr, i64 }
%"class.Simd::Base::SynetMergedConvolution8i" = type { %"class.Simd::SynetMergedConvolution8i", %"struct.Simd::MergConvParam8i", i8, i8, i8, i8, i64, i64, [2 x i64], [5 x i64], [3 x %"struct.Simd::CvtParam"], %"struct.Simd::Array", [2 x %"struct.Simd::Array.1"], %"struct.Simd::Array.0", [2 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], [3 x %"struct.Simd::Array.0"], %"struct.Simd::Base::SynetMergedConvolution8i::AlgParam", ptr, ptr, ptr, ptr, [2 x ptr], %"class.std::__cxx11::basic_string" }
%"class.Simd::SynetMergedConvolution8i" = type { %"struct.Simd::Deletable" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::MergConvParam8i" = type { i64, [3 x %"struct.Simd::ConvParam"] }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Base::SynetMergedConvolution8i::AlgParam" = type { i64, i64, [3 x i64], [3 x i64], [3 x i64], [2 x i64], [3 x i64], i64, i32, i32 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i8QuantizeEPKfS3_mm(ptr noundef nonnull align 8 dereferenceable(1376) %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i64 noundef %4) #3 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca %"struct.Simd::Array.0", align 8
  %17 = alloca i8, align 1
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i32, align 4
  %22 = alloca float, align 4
  %23 = alloca float, align 4
  %24 = alloca float, align 4
  %25 = alloca float, align 4
  %26 = alloca i64, align 8
  %27 = alloca i64, align 8
  %28 = alloca i64, align 8
  %29 = alloca i64, align 8
  %30 = alloca i64, align 8
  %31 = alloca i64, align 8
  %32 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i64 %3, ptr %9, align 8, !tbaa !9
  store i64 %4, ptr %10, align 8, !tbaa !9
  %33 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %34 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 1
  %35 = getelementptr inbounds %"struct.Simd::MergConvParam8i", ptr %34, i32 0, i32 1
  %36 = load i64, ptr %9, align 8, !tbaa !9
  %37 = getelementptr inbounds [3 x %"struct.Simd::ConvParam"], ptr %35, i64 0, i64 %36
  store ptr %37, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %38 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 10
  %39 = load i64, ptr %9, align 8, !tbaa !9
  %40 = icmp ne i64 %39, 0
  %41 = zext i1 %40 to i64
  %42 = select i1 %40, i32 1, i32 0
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [3 x %"struct.Simd::CvtParam"], ptr %38, i64 0, i64 %43
  store ptr %44, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %45 = load ptr, ptr %11, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %45, i32 0, i32 5
  %47 = load i64, ptr %46, align 8, !tbaa !11
  store i64 %47, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %48 = load ptr, ptr %11, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %48, i32 0, i32 0
  %50 = load i64, ptr %49, align 8, !tbaa !16
  store i64 %50, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  %51 = load ptr, ptr %11, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %51, i32 0, i32 10
  %53 = load i64, ptr %52, align 8, !tbaa !17
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %54, i32 0, i32 11
  %56 = load i64, ptr %55, align 8, !tbaa !18
  %57 = mul i64 %53, %56
  store i64 %57, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %16) #6
  %58 = load i64, ptr %14, align 8, !tbaa !9
  %59 = load i64, ptr %15, align 8, !tbaa !9
  %60 = mul i64 %58, %59
  call void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %16, i64 noundef %60, i1 noundef zeroext false, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #6
  %61 = load ptr, ptr %12, align 8, !tbaa !5
  %62 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %61, i32 0, i32 5
  %63 = load i8, ptr %62, align 8, !tbaa !19, !range !25, !noundef !26
  %64 = trunc i8 %63 to i1
  br i1 %64, label %65, label %71

65:                                               ; preds = %5
  %66 = load ptr, ptr %11, align 8, !tbaa !5
  %67 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %66, i32 0, i32 4
  %68 = load i32, ptr %67, align 8, !tbaa !27
  %69 = invoke noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef %68)
          to label %70 unwind label %79

70:                                               ; preds = %65
  br label %71

71:                                               ; preds = %70, %5
  %72 = phi i1 [ false, %5 ], [ %69, %70 ]
  %73 = zext i1 %72 to i8
  store i8 %73, ptr %17, align 1, !tbaa !31
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  store i64 0, ptr %20, align 8, !tbaa !9
  br label %74

74:                                               ; preds = %283, %71
  %75 = load i64, ptr %20, align 8, !tbaa !9
  %76 = load i64, ptr %13, align 8, !tbaa !9
  %77 = icmp ult i64 %75, %76
  br i1 %77, label %83, label %78

78:                                               ; preds = %74
  store i32 2, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %287

79:                                               ; preds = %65
  %80 = landingpad { ptr, i32 }
          cleanup
  %81 = extractvalue { ptr, i32 } %80, 0
  store ptr %81, ptr %18, align 8
  %82 = extractvalue { ptr, i32 } %80, 1
  store i32 %82, ptr %19, align 4
  br label %288

83:                                               ; preds = %74
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #6
  store float 0.000000e+00, ptr %22, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #6
  store float 0x47EFFFFFE0000000, ptr %23, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #6
  store float 0xC7EFFFFFE0000000, ptr %24, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #6
  store float 1.000000e+00, ptr %25, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #6
  store i64 0, ptr %26, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #6
  store i64 0, ptr %27, align 8, !tbaa !9
  br label %84

84:                                               ; preds = %138, %83
  %85 = load i64, ptr %26, align 8, !tbaa !9
  %86 = load i64, ptr %15, align 8, !tbaa !9
  %87 = icmp ult i64 %85, %86
  br i1 %87, label %89, label %88

88:                                               ; preds = %84
  store i32 5, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #6
  br label %141

89:                                               ; preds = %84
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #6
  store i64 0, ptr %28, align 8, !tbaa !9
  br label %90

90:                                               ; preds = %128, %89
  %91 = load i64, ptr %28, align 8, !tbaa !9
  %92 = load i64, ptr %14, align 8, !tbaa !9
  %93 = icmp ult i64 %91, %92
  br i1 %93, label %95, label %94

94:                                               ; preds = %90
  store i32 8, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #6
  br label %137

95:                                               ; preds = %90
  %96 = load ptr, ptr %7, align 8, !tbaa !5
  %97 = load i64, ptr %27, align 8, !tbaa !9
  %98 = load i64, ptr %13, align 8, !tbaa !9
  %99 = mul i64 %97, %98
  %100 = load i64, ptr %20, align 8, !tbaa !9
  %101 = add i64 %99, %100
  %102 = getelementptr inbounds float, ptr %96, i64 %101
  %103 = load float, ptr %102, align 4, !tbaa !32
  %104 = load ptr, ptr %12, align 8, !tbaa !5
  %105 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %104, i32 0, i32 1
  %106 = load i64, ptr %28, align 8, !tbaa !9
  %107 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %105, i64 noundef %106)
          to label %108 unwind label %133

108:                                              ; preds = %95
  %109 = load float, ptr %107, align 4, !tbaa !32
  %110 = fdiv float %103, %109
  %111 = load i64, ptr %27, align 8, !tbaa !9
  %112 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %16, i64 noundef %111)
          to label %113 unwind label %133

113:                                              ; preds = %108
  store float %110, ptr %112, align 4, !tbaa !32
  %114 = load float, ptr %23, align 4, !tbaa !32
  %115 = load i64, ptr %27, align 8, !tbaa !9
  %116 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %16, i64 noundef %115)
          to label %117 unwind label %133

117:                                              ; preds = %113
  %118 = load float, ptr %116, align 4, !tbaa !32
  %119 = invoke noundef float @_ZN4Simd3MinIfEET_S1_S1_(float noundef %114, float noundef %118)
          to label %120 unwind label %133

120:                                              ; preds = %117
  store float %119, ptr %23, align 4, !tbaa !32
  %121 = load float, ptr %24, align 4, !tbaa !32
  %122 = load i64, ptr %27, align 8, !tbaa !9
  %123 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %16, i64 noundef %122)
          to label %124 unwind label %133

124:                                              ; preds = %120
  %125 = load float, ptr %123, align 4, !tbaa !32
  %126 = invoke noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef %121, float noundef %125)
          to label %127 unwind label %133

127:                                              ; preds = %124
  store float %126, ptr %24, align 4, !tbaa !32
  br label %128

128:                                              ; preds = %127
  %129 = load i64, ptr %28, align 8, !tbaa !9
  %130 = add i64 %129, 1
  store i64 %130, ptr %28, align 8, !tbaa !9
  %131 = load i64, ptr %27, align 8, !tbaa !9
  %132 = add i64 %131, 1
  store i64 %132, ptr %27, align 8, !tbaa !9
  br label %90, !llvm.loop !34

133:                                              ; preds = %124, %120, %117, %113, %108, %95
  %134 = landingpad { ptr, i32 }
          cleanup
  %135 = extractvalue { ptr, i32 } %134, 0
  store ptr %135, ptr %18, align 8
  %136 = extractvalue { ptr, i32 } %134, 1
  store i32 %136, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #6
  br label %286

137:                                              ; preds = %94
  br label %138

138:                                              ; preds = %137
  %139 = load i64, ptr %26, align 8, !tbaa !9
  %140 = add i64 %139, 1
  store i64 %140, ptr %26, align 8, !tbaa !9
  br label %84, !llvm.loop !36

141:                                              ; preds = %88
  %142 = load ptr, ptr %12, align 8, !tbaa !5
  %143 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %142, i32 0, i32 8
  %144 = load i32, ptr %143, align 8, !tbaa !37
  %145 = sitofp i32 %144 to float
  %146 = load float, ptr %24, align 4, !tbaa !32
  %147 = invoke noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef %146)
          to label %148 unwind label %160

148:                                              ; preds = %141
  %149 = load float, ptr %23, align 4, !tbaa !32
  %150 = invoke noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef %149)
          to label %151 unwind label %160

151:                                              ; preds = %148
  %152 = invoke noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef %147, float noundef %150)
          to label %153 unwind label %160

153:                                              ; preds = %151
  %154 = fdiv float %145, %152
  store float %154, ptr %25, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #6
  store i64 0, ptr %29, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #6
  store i64 0, ptr %30, align 8, !tbaa !9
  br label %155

155:                                              ; preds = %247, %153
  %156 = load i64, ptr %29, align 8, !tbaa !9
  %157 = load i64, ptr %15, align 8, !tbaa !9
  %158 = icmp ult i64 %156, %157
  br i1 %158, label %164, label %159

159:                                              ; preds = %155
  store i32 11, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #6
  br label %250

160:                                              ; preds = %271, %250, %151, %148, %141
  %161 = landingpad { ptr, i32 }
          cleanup
  %162 = extractvalue { ptr, i32 } %161, 0
  store ptr %162, ptr %18, align 8
  %163 = extractvalue { ptr, i32 } %161, 1
  store i32 %163, ptr %19, align 4
  br label %286

164:                                              ; preds = %155
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #6
  store i64 0, ptr %31, align 8, !tbaa !9
  br label %165

165:                                              ; preds = %241, %164
  %166 = load i64, ptr %31, align 8, !tbaa !9
  %167 = load i64, ptr %14, align 8, !tbaa !9
  %168 = icmp ult i64 %166, %167
  br i1 %168, label %170, label %169

169:                                              ; preds = %165
  store i32 14, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #6
  br label %246

170:                                              ; preds = %165
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #6
  %171 = load i64, ptr %30, align 8, !tbaa !9
  %172 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %16, i64 noundef %171)
          to label %173 unwind label %198

173:                                              ; preds = %170
  %174 = load float, ptr %172, align 4, !tbaa !32
  %175 = load float, ptr %25, align 4, !tbaa !32
  %176 = load ptr, ptr %12, align 8, !tbaa !5
  %177 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %176, i32 0, i32 7
  %178 = load i32, ptr %177, align 4, !tbaa !38
  %179 = load ptr, ptr %12, align 8, !tbaa !5
  %180 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %179, i32 0, i32 8
  %181 = load i32, ptr %180, align 8, !tbaa !37
  %182 = invoke noundef signext i8 @_ZN4Simd4Base19SynetConvert32fTo8iEfffii(float noundef %174, float noundef %175, float noundef 0.000000e+00, i32 noundef %178, i32 noundef %181)
          to label %183 unwind label %198

183:                                              ; preds = %173
  %184 = sext i8 %182 to i32
  store i32 %184, ptr %32, align 4, !tbaa !39
  %185 = load i8, ptr %17, align 1, !tbaa !31, !range !25, !noundef !26
  %186 = trunc i8 %185 to i1
  br i1 %186, label %187, label %216

187:                                              ; preds = %183
  %188 = load i32, ptr %32, align 4, !tbaa !39
  %189 = and i32 %188, 1
  %190 = icmp ne i32 %189, 0
  br i1 %190, label %191, label %202

191:                                              ; preds = %187
  %192 = load i32, ptr %32, align 4, !tbaa !39
  %193 = sitofp i32 %192 to float
  %194 = fmul float %193, 2.500000e-01
  %195 = invoke noundef i32 @_ZN4Simd5RoundEf(float noundef %194)
          to label %196 unwind label %198

196:                                              ; preds = %191
  %197 = mul nsw i32 %195, 4
  store i32 %197, ptr %32, align 4, !tbaa !39
  br label %202

198:                                              ; preds = %229, %216, %202, %191, %173, %170
  %199 = landingpad { ptr, i32 }
          cleanup
  %200 = extractvalue { ptr, i32 } %199, 0
  store ptr %200, ptr %18, align 8
  %201 = extractvalue { ptr, i32 } %199, 1
  store i32 %201, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #6
  br label %286

202:                                              ; preds = %196, %187
  %203 = load i32, ptr %32, align 4, !tbaa !39
  %204 = sdiv i32 %203, 2
  %205 = trunc i32 %204 to i8
  %206 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 12
  %207 = load i64, ptr %10, align 8, !tbaa !9
  %208 = getelementptr inbounds [2 x %"struct.Simd::Array.1"], ptr %206, i64 0, i64 %207
  %209 = load i64, ptr %30, align 8, !tbaa !9
  %210 = load i64, ptr %13, align 8, !tbaa !9
  %211 = mul i64 %209, %210
  %212 = load i64, ptr %20, align 8, !tbaa !9
  %213 = add i64 %211, %212
  %214 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16) %208, i64 noundef %213)
          to label %215 unwind label %198

215:                                              ; preds = %202
  store i8 %205, ptr %214, align 1, !tbaa !40
  br label %229

216:                                              ; preds = %183
  %217 = load i32, ptr %32, align 4, !tbaa !39
  %218 = trunc i32 %217 to i8
  %219 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 12
  %220 = load i64, ptr %10, align 8, !tbaa !9
  %221 = getelementptr inbounds [2 x %"struct.Simd::Array.1"], ptr %219, i64 0, i64 %220
  %222 = load i64, ptr %30, align 8, !tbaa !9
  %223 = load i64, ptr %13, align 8, !tbaa !9
  %224 = mul i64 %222, %223
  %225 = load i64, ptr %20, align 8, !tbaa !9
  %226 = add i64 %224, %225
  %227 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16) %221, i64 noundef %226)
          to label %228 unwind label %198

228:                                              ; preds = %216
  store i8 %218, ptr %227, align 1, !tbaa !40
  br label %229

229:                                              ; preds = %228, %215
  %230 = load i32, ptr %32, align 4, !tbaa !39
  %231 = sitofp i32 %230 to float
  %232 = load ptr, ptr %12, align 8, !tbaa !5
  %233 = getelementptr inbounds %"struct.Simd::CvtParam", ptr %232, i32 0, i32 2
  %234 = load i64, ptr %31, align 8, !tbaa !9
  %235 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %233, i64 noundef %234)
          to label %236 unwind label %198

236:                                              ; preds = %229
  %237 = load float, ptr %235, align 4, !tbaa !32
  %238 = load float, ptr %22, align 4, !tbaa !32
  %239 = fneg float %231
  %240 = call float @llvm.fmuladd.f32(float %239, float %237, float %238)
  store float %240, ptr %22, align 4, !tbaa !32
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #6
  br label %241

241:                                              ; preds = %236
  %242 = load i64, ptr %31, align 8, !tbaa !9
  %243 = add i64 %242, 1
  store i64 %243, ptr %31, align 8, !tbaa !9
  %244 = load i64, ptr %30, align 8, !tbaa !9
  %245 = add i64 %244, 1
  store i64 %245, ptr %30, align 8, !tbaa !9
  br label %165, !llvm.loop !41

246:                                              ; preds = %169
  br label %247

247:                                              ; preds = %246
  %248 = load i64, ptr %29, align 8, !tbaa !9
  %249 = add i64 %248, 1
  store i64 %249, ptr %29, align 8, !tbaa !9
  br label %155, !llvm.loop !42

250:                                              ; preds = %159
  %251 = load i8, ptr %17, align 1, !tbaa !31, !range !25, !noundef !26
  %252 = trunc i8 %251 to i1
  %253 = zext i1 %252 to i64
  %254 = select i1 %252, float 2.000000e+00, float 1.000000e+00
  %255 = load float, ptr %25, align 4, !tbaa !32
  %256 = fdiv float %254, %255
  %257 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 14
  %258 = load i64, ptr %10, align 8, !tbaa !9
  %259 = getelementptr inbounds [2 x %"struct.Simd::Array.0"], ptr %257, i64 0, i64 %258
  %260 = load i64, ptr %20, align 8, !tbaa !9
  %261 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %259, i64 noundef %260)
          to label %262 unwind label %160

262:                                              ; preds = %250
  store float %256, ptr %261, align 4, !tbaa !32
  %263 = load ptr, ptr %8, align 8, !tbaa !5
  %264 = icmp ne ptr %263, null
  br i1 %264, label %265, label %270

265:                                              ; preds = %262
  %266 = load ptr, ptr %8, align 8, !tbaa !5
  %267 = load i64, ptr %20, align 8, !tbaa !9
  %268 = getelementptr inbounds float, ptr %266, i64 %267
  %269 = load float, ptr %268, align 4, !tbaa !32
  br label %271

270:                                              ; preds = %262
  br label %271

271:                                              ; preds = %270, %265
  %272 = phi float [ %269, %265 ], [ 0.000000e+00, %270 ]
  %273 = load float, ptr %22, align 4, !tbaa !32
  %274 = load float, ptr %25, align 4, !tbaa !32
  %275 = fdiv float %273, %274
  %276 = fadd float %272, %275
  %277 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution8i", ptr %33, i32 0, i32 15
  %278 = load i64, ptr %9, align 8, !tbaa !9
  %279 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %277, i64 0, i64 %278
  %280 = load i64, ptr %20, align 8, !tbaa !9
  %281 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %279, i64 noundef %280)
          to label %282 unwind label %160

282:                                              ; preds = %271
  store float %276, ptr %281, align 4, !tbaa !32
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  br label %283

283:                                              ; preds = %282
  %284 = load i64, ptr %20, align 8, !tbaa !9
  %285 = add i64 %284, 1
  store i64 %285, ptr %20, align 8, !tbaa !9
  br label %74, !llvm.loop !43

286:                                              ; preds = %198, %160, %133
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %288

287:                                              ; preds = %78
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #6
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %16) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  ret void

288:                                              ; preds = %286, %79
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #6
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %16) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  br label %289

289:                                              ; preds = %288
  %290 = load ptr, ptr %18, align 8
  %291 = load i32, ptr %19, align 4
  %292 = insertvalue { ptr, i32 } poison, ptr %290, 0
  %293 = insertvalue { ptr, i32 } %292, i32 %291, 1
  resume { ptr, i32 } %293
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3MinIfEET_S1_S1_(float noundef, float noundef) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef, float noundef) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef) #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef signext i8 @_ZN4Simd4Base19SynetConvert32fTo8iEfffii(float noundef, float noundef, float noundef, i32 noundef, i32 noundef) #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i32 @_ZN4Simd5RoundEf(float noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #5

attributes #0 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 32}
!12 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !13, i64 24, !14, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !13, i64 56, !14, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !15, i64 152}
!13 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!14 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!15 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!16 = !{!12, !10, i64 0}
!17 = !{!12, !10, i64 64}
!18 = !{!12, !10, i64 72}
!19 = !{!20, !23, i64 80}
!20 = !{!"_ZTSN4Simd8CvtParamE", !21, i64 0, !22, i64 16, !22, i64 32, !22, i64 48, !22, i64 64, !23, i64 80, !24, i64 84, !24, i64 88, !24, i64 92, !24, i64 96}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!22 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!23 = !{!"bool", !7, i64 0}
!24 = !{!"int", !7, i64 0}
!25 = !{i8 0, i8 2}
!26 = !{}
!27 = !{!28, !30, i64 176}
!28 = !{!"_ZTSN4Simd9ConvParamE", !12, i64 0, !29, i64 160, !10, i64 168, !30, i64 176}
!29 = !{!"_ZTS8SimdBool", !7, i64 0}
!30 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!31 = !{!23, !23, i64 0}
!32 = !{!33, !33, i64 0}
!33 = !{!"float", !7, i64 0}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = distinct !{!36, !35}
!37 = !{!20, !24, i64 88}
!38 = !{!20, !24, i64 84}
!39 = !{!24, !24, i64 0}
!40 = !{!7, !7, i64 0}
!41 = distinct !{!41, !35}
!42 = distinct !{!42, !35}
!43 = distinct !{!43, !35}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base24SynetMergedConvolution8i8QuantizeEPKfS3_mm(ptr noundef nonnull align 8 dereferenceable(1376) %0, ptr nocapture noundef readonly %1, ptr noundef readonly %2, i64 noundef %3, i64 noundef %4) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"struct.Simd::Array.0", align 8
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = getelementptr inbounds [3 x %"struct.Simd::ConvParam"], ptr %7, i64 0, i64 %3
  %9 = getelementptr inbounds i8, ptr %0, i64 648
  %.not = icmp ne i64 %3, 0
  %10 = zext i1 %.not to i64
  %11 = getelementptr inbounds [3 x %"struct.Simd::CvtParam"], ptr %9, i64 0, i64 %10
  %12 = getelementptr inbounds i8, ptr %8, i64 32
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %14 = load i64, ptr %8, align 8, !tbaa !13
  %15 = getelementptr inbounds i8, ptr %8, i64 64
  %16 = load i64, ptr %15, align 8, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %8, i64 72
  %18 = load i64, ptr %17, align 8, !tbaa !15
  %19 = mul i64 %18, %16
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #6
  %20 = mul i64 %19, %14
  call void @_ZN4Simd5ArrayIfEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %20, i1 noundef zeroext false, i64 noundef 8)
  %21 = getelementptr inbounds i8, ptr %11, i64 80
  %22 = load i8, ptr %21, align 8, !tbaa !16, !range !23, !noundef !24
  %23 = trunc nuw i8 %22 to i1
  br i1 %23, label %24, label %28

24:                                               ; preds = %5
  %25 = getelementptr inbounds i8, ptr %8, i64 176
  %26 = load i32, ptr %25, align 8, !tbaa !25
  %27 = call noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef %26)
  br label %28

28:                                               ; preds = %24, %5
  %29 = phi i1 [ false, %5 ], [ %27, %24 ]
  %.not143 = icmp eq i64 %13, 0
  br i1 %.not143, label %._crit_edge, label %.preheader96.lr.ph

.preheader96.lr.ph:                               ; preds = %28
  %.not144 = icmp eq i64 %19, 0
  %.not145 = icmp eq i64 %14, 0
  %30 = getelementptr inbounds i8, ptr %11, i64 16
  %31 = getelementptr inbounds i8, ptr %11, i64 88
  %32 = getelementptr inbounds i8, ptr %11, i64 84
  %33 = getelementptr inbounds i8, ptr %0, i64 976
  %34 = getelementptr inbounds [2 x %"struct.Simd::Array.1"], ptr %33, i64 0, i64 %4
  %35 = getelementptr inbounds i8, ptr %11, i64 32
  %36 = select i1 %29, float 2.000000e+00, float 1.000000e+00
  %37 = getelementptr inbounds i8, ptr %0, i64 1024
  %38 = getelementptr inbounds [2 x %"struct.Simd::Array.0"], ptr %37, i64 0, i64 %4
  %.not93 = icmp eq ptr %2, null
  %39 = getelementptr inbounds i8, ptr %0, i64 1056
  %40 = getelementptr inbounds [3 x %"struct.Simd::Array.0"], ptr %39, i64 0, i64 %3
  %brmerge = or i1 %.not144, %.not145
  br label %.preheader96

.preheader96:                                     ; preds = %.preheader96.lr.ph, %118
  %.089140 = phi i64 [ 0, %.preheader96.lr.ph ], [ %123, %118 ]
  br i1 %.not144, label %._crit_edge110, label %.preheader95.lr.ph

.preheader95.lr.ph:                               ; preds = %.preheader96
  %invariant.gep = getelementptr float, ptr %1, i64 %.089140
  br i1 %.not145, label %._crit_edge110, label %.preheader95.us

.preheader95.us:                                  ; preds = %.preheader95.lr.ph, %._crit_edge.us
  %.080109.us = phi i64 [ %55, %._crit_edge.us ], [ 0, %.preheader95.lr.ph ]
  %.082108.us = phi i64 [ %56, %._crit_edge.us ], [ 0, %.preheader95.lr.ph ]
  %.083107.us = phi float [ %53, %._crit_edge.us ], [ 0xC7EFFFFFE0000000, %.preheader95.lr.ph ]
  %.085106.us = phi float [ %50, %._crit_edge.us ], [ 0x47EFFFFFE0000000, %.preheader95.lr.ph ]
  br label %41

41:                                               ; preds = %.preheader95.us, %41
  %.079103.us = phi i64 [ 0, %.preheader95.us ], [ %54, %41 ]
  %.181102.us = phi i64 [ %.080109.us, %.preheader95.us ], [ %55, %41 ]
  %.184101.us = phi float [ %.083107.us, %.preheader95.us ], [ %53, %41 ]
  %.186100.us = phi float [ %.085106.us, %.preheader95.us ], [ %50, %41 ]
  %42 = mul i64 %.181102.us, %13
  %gep.us = getelementptr float, ptr %invariant.gep, i64 %42
  %43 = load float, ptr %gep.us, align 4, !tbaa !29
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %.079103.us)
  %45 = load float, ptr %44, align 4, !tbaa !29
  %46 = fdiv float %43, %45
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %.181102.us)
  store float %46, ptr %47, align 4, !tbaa !29
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %.181102.us)
  %49 = load float, ptr %48, align 4, !tbaa !29
  %50 = call noundef float @_ZN4Simd3MinIfEET_S1_S1_(float noundef %.186100.us, float noundef %49)
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %.181102.us)
  %52 = load float, ptr %51, align 4, !tbaa !29
  %53 = call noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef %.184101.us, float noundef %52)
  %54 = add nuw i64 %.079103.us, 1
  %55 = add i64 %.181102.us, 1
  %exitcond.not = icmp eq i64 %54, %14
  br i1 %exitcond.not, label %._crit_edge.us, label %41, !llvm.loop !31

._crit_edge.us:                                   ; preds = %41
  %56 = add nuw i64 %.082108.us, 1
  %exitcond157.not = icmp eq i64 %56, %19
  br i1 %exitcond157.not, label %._crit_edge110, label %.preheader95.us, !llvm.loop !33

._crit_edge:                                      ; preds = %118, %28
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %6) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #6
  ret void

._crit_edge110:                                   ; preds = %._crit_edge.us, %.preheader95.lr.ph, %.preheader96
  %.085.lcssa = phi float [ 0x47EFFFFFE0000000, %.preheader96 ], [ 0x47EFFFFFE0000000, %.preheader95.lr.ph ], [ %50, %._crit_edge.us ]
  %.083.lcssa = phi float [ 0xC7EFFFFFE0000000, %.preheader96 ], [ 0xC7EFFFFFE0000000, %.preheader95.lr.ph ], [ %53, %._crit_edge.us ]
  %57 = load i32, ptr %31, align 8, !tbaa !34
  %58 = sitofp i32 %57 to float
  %59 = call noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef %.083.lcssa)
  %60 = call noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef %.085.lcssa)
  %61 = call noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef %59, float noundef %60)
  %62 = fdiv float %58, %61
  br i1 %brmerge, label %._crit_edge125, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %._crit_edge110
  br i1 %29, label %.preheader.us.us, label %.preheader.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us.us.us
  %.076124.us.us = phi i64 [ %90, %._crit_edge.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us ]
  %.078123.us.us = phi i64 [ %91, %._crit_edge.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us ]
  %.087122.us.us = phi float [ %88, %._crit_edge.split.us.us.us ], [ 0.000000e+00, %.preheader.lr.ph.split.us ]
  br label %63

63:                                               ; preds = %78, %.preheader.us.us
  %.075116.us.us.us = phi i64 [ 0, %.preheader.us.us ], [ %89, %78 ]
  %.177115.us.us.us = phi i64 [ %.076124.us.us, %.preheader.us.us ], [ %90, %78 ]
  %.188114.us.us.us = phi float [ %.087122.us.us, %.preheader.us.us ], [ %88, %78 ]
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %.177115.us.us.us)
  %65 = load float, ptr %64, align 4, !tbaa !29
  %66 = load i32, ptr %32, align 4, !tbaa !35
  %67 = load i32, ptr %31, align 8, !tbaa !34
  %68 = invoke noundef signext i8 @_ZN4Simd4Base19SynetConvert32fTo8iEfffii(float noundef %65, float noundef %62, float noundef 0.000000e+00, i32 noundef %66, i32 noundef %67)
          to label %69 unwind label %.split.us.split.us.split.us

69:                                               ; preds = %63
  %70 = sext i8 %68 to i32
  %71 = and i32 %70, 1
  %.not94.us.us.us = icmp eq i32 %71, 0
  br i1 %.not94.us.us.us, label %78, label %72

72:                                               ; preds = %69
  %73 = sitofp i8 %68 to float
  %74 = fmul float %73, 2.500000e-01
  %75 = invoke noundef i32 @_ZN4Simd5RoundEf(float noundef %74)
          to label %76 unwind label %.split.us.split.us.split.us

76:                                               ; preds = %72
  %77 = shl nsw i32 %75, 2
  br label %78

78:                                               ; preds = %76, %69
  %.0.us.us.us = phi i32 [ %77, %76 ], [ %70, %69 ]
  %79 = sdiv i32 %.0.us.us.us, 2
  %80 = trunc i32 %79 to i8
  %81 = mul i64 %.177115.us.us.us, %13
  %82 = add i64 %81, %.089140
  %83 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16) %34, i64 noundef %82)
  store i8 %80, ptr %83, align 1, !tbaa !36
  %84 = sitofp i32 %.0.us.us.us to float
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %35, i64 noundef %.075116.us.us.us)
  %86 = load float, ptr %85, align 4, !tbaa !29
  %87 = fneg float %84
  %88 = call float @llvm.fmuladd.f32(float %87, float %86, float %.188114.us.us.us)
  %89 = add nuw i64 %.075116.us.us.us, 1
  %90 = add i64 %.177115.us.us.us, 1
  %exitcond160.not = icmp eq i64 %89, %14
  br i1 %exitcond160.not, label %._crit_edge.split.us.us.us, label %63, !llvm.loop !37

._crit_edge.split.us.us.us:                       ; preds = %78
  %91 = add nuw i64 %.078123.us.us, 1
  %exitcond161.not = icmp eq i64 %91, %19
  br i1 %exitcond161.not, label %._crit_edge125, label %.preheader.us.us, !llvm.loop !38

.split.us.split.us.split.us:                      ; preds = %72, %63
  %92 = landingpad { ptr, i32 }
          cleanup
  br label %114

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us130
  %.076124.us = phi i64 [ %109, %._crit_edge.split.us130 ], [ 0, %.preheader.lr.ph.split.us ]
  %.078123.us = phi i64 [ %110, %._crit_edge.split.us130 ], [ 0, %.preheader.lr.ph.split.us ]
  %.087122.us = phi float [ %107, %._crit_edge.split.us130 ], [ 0.000000e+00, %.preheader.lr.ph.split.us ]
  br label %93

93:                                               ; preds = %.preheader.us, %99
  %.075116.us127 = phi i64 [ 0, %.preheader.us ], [ %108, %99 ]
  %.177115.us128 = phi i64 [ %.076124.us, %.preheader.us ], [ %109, %99 ]
  %.188114.us129 = phi float [ %.087122.us, %.preheader.us ], [ %107, %99 ]
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %.177115.us128)
  %95 = load float, ptr %94, align 4, !tbaa !29
  %96 = load i32, ptr %32, align 4, !tbaa !35
  %97 = load i32, ptr %31, align 8, !tbaa !34
  %98 = invoke noundef signext i8 @_ZN4Simd4Base19SynetConvert32fTo8iEfffii(float noundef %95, float noundef %62, float noundef 0.000000e+00, i32 noundef %96, i32 noundef %97)
          to label %99 unwind label %.split.split.us

99:                                               ; preds = %93
  %100 = mul i64 %.177115.us128, %13
  %101 = add i64 %100, %.089140
  %102 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16) %34, i64 noundef %101)
  store i8 %98, ptr %102, align 1, !tbaa !36
  %103 = sitofp i8 %98 to float
  %104 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %35, i64 noundef %.075116.us127)
  %105 = load float, ptr %104, align 4, !tbaa !29
  %106 = fneg float %103
  %107 = call float @llvm.fmuladd.f32(float %106, float %105, float %.188114.us129)
  %108 = add nuw i64 %.075116.us127, 1
  %109 = add i64 %.177115.us128, 1
  %exitcond158.not = icmp eq i64 %108, %14
  br i1 %exitcond158.not, label %._crit_edge.split.us130, label %93, !llvm.loop !37

._crit_edge.split.us130:                          ; preds = %99
  %110 = add nuw i64 %.078123.us, 1
  %exitcond159.not = icmp eq i64 %110, %19
  br i1 %exitcond159.not, label %._crit_edge125, label %.preheader.us, !llvm.loop !38

.split.split.us:                                  ; preds = %93
  %111 = landingpad { ptr, i32 }
          cleanup
  br label %114

._crit_edge125:                                   ; preds = %._crit_edge.split.us130, %._crit_edge.split.us.us.us, %._crit_edge110
  %.087.lcssa = phi float [ 0.000000e+00, %._crit_edge110 ], [ %88, %._crit_edge.split.us.us.us ], [ %107, %._crit_edge.split.us130 ]
  %112 = fdiv float %36, %62
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %38, i64 noundef %.089140)
  store float %112, ptr %113, align 4, !tbaa !29
  br i1 %.not93, label %118, label %115

114:                                              ; preds = %.split.us.split.us.split.us, %.split.split.us
  %.us-phi118 = phi { ptr, i32 } [ %111, %.split.split.us ], [ %92, %.split.us.split.us.split.us ]
  call void @_ZN4Simd5ArrayIfED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %6) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #6
  resume { ptr, i32 } %.us-phi118

115:                                              ; preds = %._crit_edge125
  %116 = getelementptr inbounds float, ptr %2, i64 %.089140
  %117 = load float, ptr %116, align 4, !tbaa !29
  br label %118

118:                                              ; preds = %._crit_edge125, %115
  %119 = phi float [ %117, %115 ], [ 0.000000e+00, %._crit_edge125 ]
  %120 = fdiv float %.087.lcssa, %62
  %121 = fadd float %120, %119
  %122 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16) %40, i64 noundef %.089140)
  store float %121, ptr %122, align 4, !tbaa !29
  %123 = add nuw i64 %.089140, 1
  %exitcond162.not = icmp eq i64 %123, %13
  br i1 %exitcond162.not, label %._crit_edge, label %.preheader96, !llvm.loop !39
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base8OverflowE26SimdSynetCompatibilityType(i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK4Simd5ArrayIfEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3MinIfEET_S1_S1_(float noundef, float noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3MaxIfEET_S1_S1_(float noundef, float noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef float @_ZN4Simd3AbsIfEET_S1_(float noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef signext i8 @_ZN4Simd4Base19SynetConvert32fTo8iEfffii(float noundef, float noundef, float noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i32 @_ZN4Simd5RoundEf(float noundef) local_unnamed_addr #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZN4Simd5ArrayIaEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #5

attributes #0 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !10, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !12, i64 152}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!11 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!12 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !7, i64 64}
!15 = !{!6, !7, i64 72}
!16 = !{!17, !21, i64 80}
!17 = !{!"_ZTSN4Simd8CvtParamE", !18, i64 0, !20, i64 16, !20, i64 32, !20, i64 48, !20, i64 64, !21, i64 80, !22, i64 84, !22, i64 88, !22, i64 92, !22, i64 96}
!18 = !{!"_ZTSN4Simd5ArrayIhEE", !19, i64 0, !7, i64 8}
!19 = !{!"any pointer", !8, i64 0}
!20 = !{!"_ZTSN4Simd5ArrayIfEE", !19, i64 0, !7, i64 8}
!21 = !{!"bool", !8, i64 0}
!22 = !{!"int", !8, i64 0}
!23 = !{i8 0, i8 2}
!24 = !{}
!25 = !{!26, !28, i64 176}
!26 = !{!"_ZTSN4Simd9ConvParamE", !6, i64 0, !27, i64 160, !7, i64 168, !28, i64 176}
!27 = !{!"_ZTS8SimdBool", !8, i64 0}
!28 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!29 = !{!30, !30, i64 0}
!30 = !{!"float", !8, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !32}
!34 = !{!17, !22, i64 88}
!35 = !{!17, !22, i64 84}
!36 = !{!8, !8, i64 0}
!37 = distinct !{!37, !32}
!38 = distinct !{!38, !32}
!39 = distinct !{!39, !32}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass