; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_gather_scatter_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_jump_label_tracker_struct = type { [512 x i32], [512 x %struct.libxsmm_jump_source_struct] }
%struct.libxsmm_jump_source_struct = type { [512 x i32], [512 x i32], i32 }
%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>
%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@__func__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel = external hidden unnamed_addr constant [58 x i8], align 1
@.str = external hidden unnamed_addr constant [99 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@.str.1 = external hidden unnamed_addr constant [291 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel = external hidden unnamed_addr constant [232 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_cols_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i8, align 1
  %23 = alloca i8, align 1
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca %struct.libxsmm_jump_label_tracker_struct, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 4, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 1, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %43, i32 0, i32 9
  %45 = load i16, ptr %44, align 1, !tbaa !11
  %46 = zext i16 %45 to i32
  %47 = and i32 %46, 256
  %48 = icmp sgt i32 %47, 0
  %49 = zext i1 %48 to i64
  %50 = select i1 %48, i32 8, i32 4
  store i32 %50, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 1, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %22) #4
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %51, i32 0, i32 6
  %53 = load i32, ptr %52, align 4, !tbaa !14
  %54 = icmp uge i32 %53, 2201
  br i1 %54, label %55, label %60

55:                                               ; preds = %5
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %56, i32 0, i32 6
  %58 = load i32, ptr %57, align 4, !tbaa !14
  %59 = icmp ule i32 %58, 2999
  br label %60

60:                                               ; preds = %55, %5
  %61 = phi i1 [ false, %5 ], [ %59, %55 ]
  %62 = zext i1 %61 to i32
  %63 = trunc i32 %62 to i8
  store i8 %63, ptr %22, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 1, ptr %23) #4
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %64, i32 0, i32 6
  %66 = load i32, ptr %65, align 4, !tbaa !14
  %67 = icmp uge i32 %66, 2501
  br i1 %67, label %68, label %73

68:                                               ; preds = %60
  %69 = load ptr, ptr %6, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %69, i32 0, i32 6
  %71 = load i32, ptr %70, align 4, !tbaa !14
  %72 = icmp ule i32 %71, 2999
  br label %73

73:                                               ; preds = %68, %60
  %74 = phi i1 [ false, %60 ], [ %72, %68 ]
  %75 = zext i1 %74 to i32
  %76 = trunc i32 %75 to i8
  store i8 %76, ptr %23, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %77, i32 0, i32 6
  %79 = load i32, ptr %78, align 4, !tbaa !14
  %80 = call i32 @libxsmm_cpuid_vlen32(i32 noundef %79)
  %81 = mul nsw i32 4, %80
  store i32 %81, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %82 = load i32, ptr %24, align 4, !tbaa !9
  %83 = load ptr, ptr %9, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %83, i32 0, i32 2
  %85 = load i32, ptr %84, align 4, !tbaa !17
  %86 = udiv i32 %82, %85
  store i32 %86, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  store i32 1, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  store i32 0, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #4
  store i32 0, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #4
  store i32 0, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #4
  store i32 0, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #4
  store i32 0, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #4
  store i32 0, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #4
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #4
  store i32 32, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #4
  store i32 80, ptr %36, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2101248, ptr %37) #4
  call void @libxsmm_reset_jump_label_tracker(ptr noundef %37)
  %87 = load ptr, ptr %10, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %87, i32 0, i32 10
  %89 = load i16, ptr %88, align 1, !tbaa !19
  %90 = zext i16 %89 to i32
  %91 = icmp eq i32 %90, 51
  %92 = zext i1 %91 to i64
  %93 = select i1 %91, i32 1, i32 0
  store i32 %93, ptr %26, align 4, !tbaa !9
  %94 = load ptr, ptr %8, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %94, i32 0, i32 26
  store i32 40, ptr %95, align 4, !tbaa !20
  %96 = load ptr, ptr %8, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %96, i32 0, i32 27
  store i32 41, ptr %97, align 4, !tbaa !22
  %98 = load ptr, ptr %8, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %98, i32 0, i32 24
  store i32 42, ptr %99, align 4, !tbaa !23
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %100, i32 0, i32 25
  store i32 43, ptr %101, align 4, !tbaa !24
  %102 = load ptr, ptr %8, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %102, i32 0, i32 35
  store i32 48, ptr %103, align 4, !tbaa !25
  store i32 44, ptr %32, align 4, !tbaa !9
  store i32 45, ptr %31, align 4, !tbaa !9
  store i32 46, ptr %29, align 4, !tbaa !9
  %104 = load i32, ptr %20, align 4, !tbaa !9
  %105 = icmp eq i32 %104, 8
  %106 = zext i1 %105 to i64
  %107 = select i1 %105, i32 46, i32 14
  store i32 %107, ptr %30, align 4, !tbaa !9
  store i32 47, ptr %33, align 4, !tbaa !9
  %108 = load i32, ptr %26, align 4, !tbaa !9
  %109 = icmp eq i32 %108, 1
  br i1 %109, label %110, label %138

110:                                              ; preds = %73
  %111 = load ptr, ptr %6, align 8, !tbaa !5
  %112 = load ptr, ptr %8, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %112, i32 0, i32 0
  %114 = load i32, ptr %113, align 4, !tbaa !26
  %115 = load i32, ptr %35, align 4, !tbaa !9
  %116 = load i32, ptr %32, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %111, i32 noundef -1186988026, i32 noundef %114, i32 noundef 127, i32 noundef %115, i32 noundef %116)
  %117 = load ptr, ptr %6, align 8, !tbaa !5
  %118 = load ptr, ptr %8, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %118, i32 0, i32 0
  %120 = load i32, ptr %119, align 4, !tbaa !26
  %121 = load i32, ptr %35, align 4, !tbaa !9
  %122 = add nsw i32 %121, 8
  %123 = load ptr, ptr %8, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %123, i32 0, i32 27
  %125 = load i32, ptr %124, align 4, !tbaa !22
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %117, i32 noundef -1186988026, i32 noundef %120, i32 noundef 127, i32 noundef %122, i32 noundef %125)
  %126 = load ptr, ptr %6, align 8, !tbaa !5
  %127 = load ptr, ptr %8, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %127, i32 0, i32 0
  %129 = load i32, ptr %128, align 4, !tbaa !26
  %130 = load i32, ptr %36, align 4, !tbaa !9
  %131 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %126, i32 noundef -1186988026, i32 noundef %129, i32 noundef 127, i32 noundef %130, i32 noundef %131)
  %132 = load ptr, ptr %10, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %132, i32 0, i32 3
  %134 = load i32, ptr %133, align 1, !tbaa !27
  store i32 %134, ptr %27, align 4, !tbaa !9
  %135 = load ptr, ptr %9, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %135, i32 0, i32 5
  %137 = load i32, ptr %136, align 4, !tbaa !28
  store i32 %137, ptr %28, align 4, !tbaa !9
  br label %166

138:                                              ; preds = %73
  %139 = load ptr, ptr %6, align 8, !tbaa !5
  %140 = load ptr, ptr %8, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %140, i32 0, i32 0
  %142 = load i32, ptr %141, align 4, !tbaa !26
  %143 = load i32, ptr %35, align 4, !tbaa !9
  %144 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %139, i32 noundef -1186988026, i32 noundef %142, i32 noundef 127, i32 noundef %143, i32 noundef %144)
  %145 = load ptr, ptr %6, align 8, !tbaa !5
  %146 = load ptr, ptr %8, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %146, i32 0, i32 0
  %148 = load i32, ptr %147, align 4, !tbaa !26
  %149 = load i32, ptr %36, align 4, !tbaa !9
  %150 = load i32, ptr %32, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %145, i32 noundef -1186988026, i32 noundef %148, i32 noundef 127, i32 noundef %149, i32 noundef %150)
  %151 = load ptr, ptr %6, align 8, !tbaa !5
  %152 = load ptr, ptr %8, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %152, i32 0, i32 0
  %154 = load i32, ptr %153, align 4, !tbaa !26
  %155 = load i32, ptr %36, align 4, !tbaa !9
  %156 = add nsw i32 %155, 8
  %157 = load ptr, ptr %8, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %157, i32 0, i32 27
  %159 = load i32, ptr %158, align 4, !tbaa !22
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %151, i32 noundef -1186988026, i32 noundef %154, i32 noundef 127, i32 noundef %156, i32 noundef %159)
  %160 = load ptr, ptr %10, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %160, i32 0, i32 2
  %162 = load i32, ptr %161, align 1, !tbaa !29
  store i32 %162, ptr %27, align 4, !tbaa !9
  %163 = load ptr, ptr %9, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %163, i32 0, i32 2
  %165 = load i32, ptr %164, align 4, !tbaa !17
  store i32 %165, ptr %28, align 4, !tbaa !9
  br label %166

166:                                              ; preds = %138, %110
  %167 = load ptr, ptr %10, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %167, i32 0, i32 0
  %169 = load i32, ptr %168, align 1, !tbaa !30
  store i32 %169, ptr %11, align 4, !tbaa !9
  %170 = load ptr, ptr %10, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %170, i32 0, i32 1
  %172 = load i32, ptr %171, align 1, !tbaa !31
  store i32 %172, ptr %12, align 4, !tbaa !9
  %173 = load i32, ptr %11, align 4, !tbaa !9
  %174 = load i32, ptr %25, align 4, !tbaa !9
  %175 = urem i32 %173, %174
  store i32 %175, ptr %14, align 4, !tbaa !9
  %176 = load i32, ptr %11, align 4, !tbaa !9
  %177 = load i32, ptr %25, align 4, !tbaa !9
  %178 = add i32 %176, %177
  %179 = sub i32 %178, 1
  %180 = load i32, ptr %25, align 4, !tbaa !9
  %181 = udiv i32 %179, %180
  store i32 %181, ptr %15, align 4, !tbaa !9
  %182 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %182, ptr %17, align 4, !tbaa !9
  store i32 1, ptr %18, align 4, !tbaa !9
  store i32 0, ptr %19, align 4, !tbaa !9
  %183 = load i8, ptr %23, align 1, !tbaa !16
  %184 = icmp ne i8 %183, 0
  br i1 %184, label %185, label %187

185:                                              ; preds = %166
  %186 = load ptr, ptr %6, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_sm(ptr noundef %186, i32 noundef -721205377)
  br label %187

187:                                              ; preds = %185, %166
  %188 = load i8, ptr %22, align 1, !tbaa !16
  %189 = zext i8 %188 to i32
  %190 = icmp sgt i32 %189, 0
  br i1 %190, label %191, label %196

191:                                              ; preds = %187
  %192 = load ptr, ptr %6, align 8, !tbaa !5
  %193 = load ptr, ptr %8, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %193, i32 0, i32 35
  %195 = load i32, ptr %194, align 4, !tbaa !25
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %192, i32 noundef 0, i32 noundef -1, i32 noundef %195)
  br label %196

196:                                              ; preds = %191, %187
  %197 = load i32, ptr %14, align 4, !tbaa !9
  %198 = icmp ugt i32 %197, 0
  br i1 %198, label %199, label %237

199:                                              ; preds = %196
  %200 = load i8, ptr %22, align 1, !tbaa !16
  %201 = zext i8 %200 to i32
  %202 = icmp sgt i32 %201, 0
  br i1 %202, label %203, label %234

203:                                              ; preds = %199
  %204 = load ptr, ptr %9, align 8, !tbaa !5
  %205 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %204, i32 0, i32 2
  %206 = load i32, ptr %205, align 4, !tbaa !17
  %207 = icmp eq i32 %206, 4
  br i1 %207, label %213, label %208

208:                                              ; preds = %203
  %209 = load ptr, ptr %9, align 8, !tbaa !5
  %210 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %209, i32 0, i32 2
  %211 = load i32, ptr %210, align 4, !tbaa !17
  %212 = icmp eq i32 %211, 2
  br i1 %212, label %213, label %224

213:                                              ; preds = %208, %203
  %214 = load ptr, ptr %6, align 8, !tbaa !5
  %215 = load i32, ptr %21, align 4, !tbaa !9
  %216 = load i32, ptr %14, align 4, !tbaa !9
  %217 = load ptr, ptr %9, align 8, !tbaa !5
  %218 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %217, i32 0, i32 2
  %219 = load i32, ptr %218, align 4, !tbaa !17
  %220 = mul i32 %216, %219
  %221 = load ptr, ptr %8, align 8, !tbaa !5
  %222 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %221, i32 0, i32 35
  %223 = load i32, ptr %222, align 4, !tbaa !25
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %214, i32 noundef %215, i32 noundef %220, i32 noundef %223)
  br label %233

224:                                              ; preds = %208
  %225 = load ptr, ptr %6, align 8, !tbaa !5
  %226 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %227 = icmp ult i32 1, %226
  br i1 %227, label %228, label %230

228:                                              ; preds = %224
  %229 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %231

230:                                              ; preds = %224
  br label %231

231:                                              ; preds = %230, %228
  %232 = phi i32 [ %229, %228 ], [ 1, %230 ]
  call void @libxsmm_handle_error(ptr noundef %225, i32 noundef 90033, ptr noundef @__func__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel, ptr noundef @.str, i32 noundef 111, i32 noundef %232)
  store i32 1, ptr %38, align 4
  br label %639

233:                                              ; preds = %213
  br label %236

234:                                              ; preds = %199
  %235 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %235, ptr %21, align 4, !tbaa !9
  br label %236

236:                                              ; preds = %234, %233
  br label %237

237:                                              ; preds = %236, %196
  %238 = load i32, ptr %17, align 4, !tbaa !9
  %239 = load i32, ptr %16, align 4, !tbaa !9
  %240 = icmp ugt i32 %238, %239
  br i1 %240, label %241, label %265

241:                                              ; preds = %237
  %242 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %242, ptr %17, align 4, !tbaa !9
  %243 = load i32, ptr %15, align 4, !tbaa !9
  %244 = load i32, ptr %17, align 4, !tbaa !9
  %245 = udiv i32 %243, %244
  store i32 %245, ptr %18, align 4, !tbaa !9
  %246 = load i32, ptr %15, align 4, !tbaa !9
  %247 = load i32, ptr %17, align 4, !tbaa !9
  %248 = load i32, ptr %18, align 4, !tbaa !9
  %249 = mul i32 %247, %248
  %250 = sub i32 %246, %249
  store i32 %250, ptr %19, align 4, !tbaa !9
  %251 = load i32, ptr %14, align 4, !tbaa !9
  %252 = icmp ugt i32 %251, 0
  br i1 %252, label %253, label %264

253:                                              ; preds = %241
  %254 = load i32, ptr %19, align 4, !tbaa !9
  %255 = icmp eq i32 %254, 0
  br i1 %255, label %256, label %264

256:                                              ; preds = %253
  %257 = load i32, ptr %18, align 4, !tbaa !9
  %258 = add i32 %257, -1
  store i32 %258, ptr %18, align 4, !tbaa !9
  %259 = load i32, ptr %15, align 4, !tbaa !9
  %260 = load i32, ptr %17, align 4, !tbaa !9
  %261 = load i32, ptr %18, align 4, !tbaa !9
  %262 = mul i32 %260, %261
  %263 = sub i32 %259, %262
  store i32 %263, ptr %19, align 4, !tbaa !9
  br label %264

264:                                              ; preds = %256, %253, %241
  br label %280

265:                                              ; preds = %237
  %266 = load i32, ptr %14, align 4, !tbaa !9
  %267 = icmp ugt i32 %266, 0
  br i1 %267, label %268, label %279

268:                                              ; preds = %265
  %269 = load i32, ptr %19, align 4, !tbaa !9
  %270 = icmp eq i32 %269, 0
  br i1 %270, label %271, label %279

271:                                              ; preds = %268
  %272 = load i32, ptr %18, align 4, !tbaa !9
  %273 = add i32 %272, -1
  store i32 %273, ptr %18, align 4, !tbaa !9
  %274 = load i32, ptr %15, align 4, !tbaa !9
  %275 = load i32, ptr %17, align 4, !tbaa !9
  %276 = load i32, ptr %18, align 4, !tbaa !9
  %277 = mul i32 %275, %276
  %278 = sub i32 %274, %277
  store i32 %278, ptr %19, align 4, !tbaa !9
  br label %279

279:                                              ; preds = %271, %268, %265
  br label %280

280:                                              ; preds = %279, %264
  %281 = load i32, ptr %26, align 4, !tbaa !9
  %282 = icmp eq i32 %281, 1
  br i1 %282, label %283, label %295

283:                                              ; preds = %280
  %284 = load ptr, ptr %6, align 8, !tbaa !5
  %285 = load i32, ptr %33, align 4, !tbaa !9
  %286 = load ptr, ptr %10, align 8, !tbaa !5
  %287 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %286, i32 0, i32 2
  %288 = load i32, ptr %287, align 1, !tbaa !29
  %289 = zext i32 %288 to i64
  %290 = load ptr, ptr %9, align 8, !tbaa !5
  %291 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %290, i32 0, i32 2
  %292 = load i32, ptr %291, align 4, !tbaa !17
  %293 = zext i32 %292 to i64
  %294 = mul nsw i64 %289, %293
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %284, i32 noundef %285, i64 noundef %294)
  br label %307

295:                                              ; preds = %280
  %296 = load ptr, ptr %6, align 8, !tbaa !5
  %297 = load i32, ptr %33, align 4, !tbaa !9
  %298 = load ptr, ptr %10, align 8, !tbaa !5
  %299 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %298, i32 0, i32 3
  %300 = load i32, ptr %299, align 1, !tbaa !27
  %301 = zext i32 %300 to i64
  %302 = load ptr, ptr %9, align 8, !tbaa !5
  %303 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %302, i32 0, i32 2
  %304 = load i32, ptr %303, align 4, !tbaa !17
  %305 = zext i32 %304 to i64
  %306 = mul nsw i64 %301, %305
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %296, i32 noundef %297, i64 noundef %306)
  br label %307

307:                                              ; preds = %295, %283
  %308 = load ptr, ptr %6, align 8, !tbaa !5
  %309 = load ptr, ptr %7, align 8, !tbaa !5
  %310 = load ptr, ptr %8, align 8, !tbaa !5
  %311 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %310, i32 0, i32 25
  %312 = load i32, ptr %311, align 4, !tbaa !24
  %313 = load i32, ptr %12, align 4, !tbaa !9
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %308, ptr noundef %309, i32 noundef %312, i32 noundef %313)
  %314 = load ptr, ptr %6, align 8, !tbaa !5
  %315 = load i32, ptr %29, align 4, !tbaa !9
  %316 = load i32, ptr %29, align 4, !tbaa !9
  %317 = load i32, ptr %29, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %314, i32 noundef 1241513991, i32 noundef %315, i32 noundef %316, i32 noundef %317, i32 noundef 0, i32 noundef 0)
  %318 = load ptr, ptr %6, align 8, !tbaa !5
  %319 = load ptr, ptr %8, align 8, !tbaa !5
  %320 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %319, i32 0, i32 27
  %321 = load i32, ptr %320, align 4, !tbaa !22
  %322 = load i32, ptr %20, align 4, !tbaa !9
  %323 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef %318, i32 noundef -1203764218, i32 noundef %321, i32 noundef 127, i32 noundef %322, i32 noundef %323)
  %324 = load ptr, ptr %6, align 8, !tbaa !5
  %325 = load i32, ptr %29, align 4, !tbaa !9
  %326 = load i32, ptr %33, align 4, !tbaa !9
  %327 = load i32, ptr %29, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %324, i32 noundef 453016595, i32 noundef %325, i32 noundef %326, i32 noundef %327, i32 noundef 0, i32 noundef 0)
  %328 = load ptr, ptr %6, align 8, !tbaa !5
  %329 = load i32, ptr %29, align 4, !tbaa !9
  %330 = load i32, ptr %32, align 4, !tbaa !9
  %331 = load i32, ptr %29, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %328, i32 noundef 184549383, i32 noundef %329, i32 noundef %330, i32 noundef %331, i32 noundef 0, i32 noundef 0)
  %332 = load i32, ptr %18, align 4, !tbaa !9
  %333 = icmp uge i32 %332, 1
  br i1 %333, label %334, label %395

334:                                              ; preds = %307
  %335 = load ptr, ptr %6, align 8, !tbaa !5
  %336 = load ptr, ptr %7, align 8, !tbaa !5
  %337 = load ptr, ptr %8, align 8, !tbaa !5
  %338 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %337, i32 0, i32 24
  %339 = load i32, ptr %338, align 4, !tbaa !23
  %340 = load i32, ptr %18, align 4, !tbaa !9
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %335, ptr noundef %336, i32 noundef %339, i32 noundef %340)
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %341

341:                                              ; preds = %386, %334
  %342 = load i32, ptr %13, align 4, !tbaa !9
  %343 = load i32, ptr %17, align 4, !tbaa !9
  %344 = icmp ult i32 %342, %343
  br i1 %344, label %345, label %389

345:                                              ; preds = %341
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #4
  %346 = load i32, ptr %34, align 4, !tbaa !9
  %347 = load i32, ptr %13, align 4, !tbaa !9
  %348 = add i32 %346, %347
  store i32 %348, ptr %39, align 4, !tbaa !9
  %349 = load i32, ptr %26, align 4, !tbaa !9
  %350 = icmp eq i32 %349, 1
  br i1 %350, label %351, label %368

351:                                              ; preds = %345
  %352 = load ptr, ptr %6, align 8, !tbaa !5
  %353 = load i32, ptr %29, align 4, !tbaa !9
  %354 = load ptr, ptr %8, align 8, !tbaa !5
  %355 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %354, i32 0, i32 35
  %356 = load i32, ptr %355, align 4, !tbaa !25
  %357 = load i32, ptr %39, align 4, !tbaa !9
  %358 = load i32, ptr %28, align 4, !tbaa !9
  %359 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %352, i32 noundef %353, i32 noundef %356, i32 noundef %357, i32 noundef %358, i32 noundef 0, i32 noundef 1, i32 noundef 0, i8 noundef zeroext 0, i8 noundef zeroext %359)
  %360 = load ptr, ptr %6, align 8, !tbaa !5
  %361 = load i32, ptr %31, align 4, !tbaa !9
  %362 = load ptr, ptr %8, align 8, !tbaa !5
  %363 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %362, i32 0, i32 35
  %364 = load i32, ptr %363, align 4, !tbaa !25
  %365 = load i32, ptr %39, align 4, !tbaa !9
  %366 = load i32, ptr %28, align 4, !tbaa !9
  %367 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %360, i32 noundef %361, i32 noundef %364, i32 noundef %365, i32 noundef %366, i32 noundef 0, i32 noundef 1, i32 noundef 1, i8 noundef zeroext 0, i8 noundef zeroext %367)
  br label %385

368:                                              ; preds = %345
  %369 = load ptr, ptr %6, align 8, !tbaa !5
  %370 = load i32, ptr %31, align 4, !tbaa !9
  %371 = load ptr, ptr %8, align 8, !tbaa !5
  %372 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %371, i32 0, i32 35
  %373 = load i32, ptr %372, align 4, !tbaa !25
  %374 = load i32, ptr %39, align 4, !tbaa !9
  %375 = load i32, ptr %28, align 4, !tbaa !9
  %376 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %369, i32 noundef %370, i32 noundef %373, i32 noundef %374, i32 noundef %375, i32 noundef 0, i32 noundef 1, i32 noundef 0, i8 noundef zeroext 0, i8 noundef zeroext %376)
  %377 = load ptr, ptr %6, align 8, !tbaa !5
  %378 = load i32, ptr %29, align 4, !tbaa !9
  %379 = load ptr, ptr %8, align 8, !tbaa !5
  %380 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %379, i32 0, i32 35
  %381 = load i32, ptr %380, align 4, !tbaa !25
  %382 = load i32, ptr %39, align 4, !tbaa !9
  %383 = load i32, ptr %28, align 4, !tbaa !9
  %384 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %377, i32 noundef %378, i32 noundef %381, i32 noundef %382, i32 noundef %383, i32 noundef 0, i32 noundef 1, i32 noundef 1, i8 noundef zeroext 0, i8 noundef zeroext %384)
  br label %385

385:                                              ; preds = %368, %351
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #4
  br label %386

386:                                              ; preds = %385
  %387 = load i32, ptr %13, align 4, !tbaa !9
  %388 = add i32 %387, 1
  store i32 %388, ptr %13, align 4, !tbaa !9
  br label %341, !llvm.loop !32

389:                                              ; preds = %341
  %390 = load ptr, ptr %6, align 8, !tbaa !5
  %391 = load ptr, ptr %7, align 8, !tbaa !5
  %392 = load ptr, ptr %8, align 8, !tbaa !5
  %393 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %392, i32 0, i32 24
  %394 = load i32, ptr %393, align 4, !tbaa !23
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %390, ptr noundef %391, i32 noundef %394, i32 noundef 1)
  br label %395

395:                                              ; preds = %389, %307
  %396 = load i32, ptr %19, align 4, !tbaa !9
  %397 = icmp ugt i32 %396, 0
  br i1 %397, label %398, label %597

398:                                              ; preds = %395
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %399

399:                                              ; preds = %593, %398
  %400 = load i32, ptr %13, align 4, !tbaa !9
  %401 = load i32, ptr %19, align 4, !tbaa !9
  %402 = icmp ult i32 %400, %401
  br i1 %402, label %403, label %596

403:                                              ; preds = %399
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #4
  %404 = load i32, ptr %13, align 4, !tbaa !9
  %405 = load i32, ptr %19, align 4, !tbaa !9
  %406 = sub i32 %405, 1
  %407 = icmp eq i32 %404, %406
  br i1 %407, label %408, label %410

408:                                              ; preds = %403
  %409 = load i32, ptr %14, align 4, !tbaa !9
  br label %411

410:                                              ; preds = %403
  br label %411

411:                                              ; preds = %410, %408
  %412 = phi i32 [ %409, %408 ], [ 0, %410 ]
  store i32 %412, ptr %40, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #4
  %413 = load i32, ptr %13, align 4, !tbaa !9
  %414 = load i32, ptr %19, align 4, !tbaa !9
  %415 = sub i32 %414, 1
  %416 = icmp eq i32 %413, %415
  br i1 %416, label %417, label %422

417:                                              ; preds = %411
  %418 = load i32, ptr %14, align 4, !tbaa !9
  %419 = icmp ugt i32 %418, 0
  br i1 %419, label %420, label %422

420:                                              ; preds = %417
  %421 = load i32, ptr %21, align 4, !tbaa !9
  br label %423

422:                                              ; preds = %417, %411
  br label %423

423:                                              ; preds = %422, %420
  %424 = phi i32 [ %421, %420 ], [ 0, %422 ]
  store i32 %424, ptr %41, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %42) #4
  %425 = load i32, ptr %34, align 4, !tbaa !9
  %426 = load i32, ptr %13, align 4, !tbaa !9
  %427 = add i32 %425, %426
  store i32 %427, ptr %42, align 4, !tbaa !9
  %428 = load i32, ptr %26, align 4, !tbaa !9
  %429 = icmp eq i32 %428, 1
  br i1 %429, label %430, label %511

430:                                              ; preds = %423
  %431 = load ptr, ptr %6, align 8, !tbaa !5
  %432 = load i32, ptr %29, align 4, !tbaa !9
  %433 = load ptr, ptr %8, align 8, !tbaa !5
  %434 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %433, i32 0, i32 35
  %435 = load i32, ptr %434, align 4, !tbaa !25
  %436 = load i32, ptr %42, align 4, !tbaa !9
  %437 = load i32, ptr %28, align 4, !tbaa !9
  %438 = load i32, ptr %40, align 4, !tbaa !9
  %439 = load i32, ptr %41, align 4, !tbaa !9
  %440 = trunc i32 %439 to i8
  %441 = zext i8 %440 to i32
  %442 = icmp eq i32 0, %441
  br i1 %442, label %448, label %443

443:                                              ; preds = %430
  %444 = load i32, ptr %41, align 4, !tbaa !9
  %445 = trunc i32 %444 to i8
  %446 = zext i8 %445 to i32
  %447 = icmp slt i32 0, %446
  br i1 %447, label %448, label %466

448:                                              ; preds = %443, %430
  %449 = load i32, ptr %41, align 4, !tbaa !9
  %450 = zext i32 %449 to i64
  %451 = mul i64 1, %450
  %452 = icmp ult i64 %451, 255
  br i1 %452, label %453, label %457

453:                                              ; preds = %448
  %454 = load i32, ptr %41, align 4, !tbaa !9
  %455 = zext i32 %454 to i64
  %456 = mul i64 1, %455
  br label %458

457:                                              ; preds = %448
  br label %458

458:                                              ; preds = %457, %453
  %459 = phi i64 [ %456, %453 ], [ 255, %457 ]
  %460 = icmp ule i64 %459, 255
  br i1 %460, label %461, label %466

461:                                              ; preds = %458
  %462 = load i32, ptr %41, align 4, !tbaa !9
  %463 = uitofp i32 %462 to double
  %464 = fcmp ole double 0.000000e+00, %463
  br i1 %464, label %465, label %466

465:                                              ; preds = %461
  br label %467

466:                                              ; preds = %461, %458, %443
  call void @__assert_fail(ptr noundef @.str.1, ptr noundef @.str, i32 noundef 177, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel) #5
  unreachable

467:                                              ; preds = %465
  %468 = load i32, ptr %41, align 4, !tbaa !9
  %469 = trunc i32 %468 to i8
  %470 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %431, i32 noundef %432, i32 noundef %435, i32 noundef %436, i32 noundef %437, i32 noundef %438, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %469, i8 noundef zeroext %470)
  %471 = load ptr, ptr %6, align 8, !tbaa !5
  %472 = load i32, ptr %31, align 4, !tbaa !9
  %473 = load ptr, ptr %8, align 8, !tbaa !5
  %474 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %473, i32 0, i32 35
  %475 = load i32, ptr %474, align 4, !tbaa !25
  %476 = load i32, ptr %42, align 4, !tbaa !9
  %477 = load i32, ptr %28, align 4, !tbaa !9
  %478 = load i32, ptr %40, align 4, !tbaa !9
  %479 = load i32, ptr %41, align 4, !tbaa !9
  %480 = trunc i32 %479 to i8
  %481 = zext i8 %480 to i32
  %482 = icmp eq i32 0, %481
  br i1 %482, label %488, label %483

483:                                              ; preds = %467
  %484 = load i32, ptr %41, align 4, !tbaa !9
  %485 = trunc i32 %484 to i8
  %486 = zext i8 %485 to i32
  %487 = icmp slt i32 0, %486
  br i1 %487, label %488, label %506

488:                                              ; preds = %483, %467
  %489 = load i32, ptr %41, align 4, !tbaa !9
  %490 = zext i32 %489 to i64
  %491 = mul i64 1, %490
  %492 = icmp ult i64 %491, 255
  br i1 %492, label %493, label %497

493:                                              ; preds = %488
  %494 = load i32, ptr %41, align 4, !tbaa !9
  %495 = zext i32 %494 to i64
  %496 = mul i64 1, %495
  br label %498

497:                                              ; preds = %488
  br label %498

498:                                              ; preds = %497, %493
  %499 = phi i64 [ %496, %493 ], [ 255, %497 ]
  %500 = icmp ule i64 %499, 255
  br i1 %500, label %501, label %506

501:                                              ; preds = %498
  %502 = load i32, ptr %41, align 4, !tbaa !9
  %503 = uitofp i32 %502 to double
  %504 = fcmp ole double 0.000000e+00, %503
  br i1 %504, label %505, label %506

505:                                              ; preds = %501
  br label %507

506:                                              ; preds = %501, %498, %483
  call void @__assert_fail(ptr noundef @.str.1, ptr noundef @.str, i32 noundef 179, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel) #5
  unreachable

507:                                              ; preds = %505
  %508 = load i32, ptr %41, align 4, !tbaa !9
  %509 = trunc i32 %508 to i8
  %510 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %471, i32 noundef %472, i32 noundef %475, i32 noundef %476, i32 noundef %477, i32 noundef %478, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %509, i8 noundef zeroext %510)
  br label %592

511:                                              ; preds = %423
  %512 = load ptr, ptr %6, align 8, !tbaa !5
  %513 = load i32, ptr %31, align 4, !tbaa !9
  %514 = load ptr, ptr %8, align 8, !tbaa !5
  %515 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %514, i32 0, i32 35
  %516 = load i32, ptr %515, align 4, !tbaa !25
  %517 = load i32, ptr %42, align 4, !tbaa !9
  %518 = load i32, ptr %28, align 4, !tbaa !9
  %519 = load i32, ptr %40, align 4, !tbaa !9
  %520 = load i32, ptr %41, align 4, !tbaa !9
  %521 = trunc i32 %520 to i8
  %522 = zext i8 %521 to i32
  %523 = icmp eq i32 0, %522
  br i1 %523, label %529, label %524

524:                                              ; preds = %511
  %525 = load i32, ptr %41, align 4, !tbaa !9
  %526 = trunc i32 %525 to i8
  %527 = zext i8 %526 to i32
  %528 = icmp slt i32 0, %527
  br i1 %528, label %529, label %547

529:                                              ; preds = %524, %511
  %530 = load i32, ptr %41, align 4, !tbaa !9
  %531 = zext i32 %530 to i64
  %532 = mul i64 1, %531
  %533 = icmp ult i64 %532, 255
  br i1 %533, label %534, label %538

534:                                              ; preds = %529
  %535 = load i32, ptr %41, align 4, !tbaa !9
  %536 = zext i32 %535 to i64
  %537 = mul i64 1, %536
  br label %539

538:                                              ; preds = %529
  br label %539

539:                                              ; preds = %538, %534
  %540 = phi i64 [ %537, %534 ], [ 255, %538 ]
  %541 = icmp ule i64 %540, 255
  br i1 %541, label %542, label %547

542:                                              ; preds = %539
  %543 = load i32, ptr %41, align 4, !tbaa !9
  %544 = uitofp i32 %543 to double
  %545 = fcmp ole double 0.000000e+00, %544
  br i1 %545, label %546, label %547

546:                                              ; preds = %542
  br label %548

547:                                              ; preds = %542, %539, %524
  call void @__assert_fail(ptr noundef @.str.1, ptr noundef @.str, i32 noundef 182, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel) #5
  unreachable

548:                                              ; preds = %546
  %549 = load i32, ptr %41, align 4, !tbaa !9
  %550 = trunc i32 %549 to i8
  %551 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %512, i32 noundef %513, i32 noundef %516, i32 noundef %517, i32 noundef %518, i32 noundef %519, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %550, i8 noundef zeroext %551)
  %552 = load ptr, ptr %6, align 8, !tbaa !5
  %553 = load i32, ptr %29, align 4, !tbaa !9
  %554 = load ptr, ptr %8, align 8, !tbaa !5
  %555 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %554, i32 0, i32 35
  %556 = load i32, ptr %555, align 4, !tbaa !25
  %557 = load i32, ptr %42, align 4, !tbaa !9
  %558 = load i32, ptr %28, align 4, !tbaa !9
  %559 = load i32, ptr %40, align 4, !tbaa !9
  %560 = load i32, ptr %41, align 4, !tbaa !9
  %561 = trunc i32 %560 to i8
  %562 = zext i8 %561 to i32
  %563 = icmp eq i32 0, %562
  br i1 %563, label %569, label %564

564:                                              ; preds = %548
  %565 = load i32, ptr %41, align 4, !tbaa !9
  %566 = trunc i32 %565 to i8
  %567 = zext i8 %566 to i32
  %568 = icmp slt i32 0, %567
  br i1 %568, label %569, label %587

569:                                              ; preds = %564, %548
  %570 = load i32, ptr %41, align 4, !tbaa !9
  %571 = zext i32 %570 to i64
  %572 = mul i64 1, %571
  %573 = icmp ult i64 %572, 255
  br i1 %573, label %574, label %578

574:                                              ; preds = %569
  %575 = load i32, ptr %41, align 4, !tbaa !9
  %576 = zext i32 %575 to i64
  %577 = mul i64 1, %576
  br label %579

578:                                              ; preds = %569
  br label %579

579:                                              ; preds = %578, %574
  %580 = phi i64 [ %577, %574 ], [ 255, %578 ]
  %581 = icmp ule i64 %580, 255
  br i1 %581, label %582, label %587

582:                                              ; preds = %579
  %583 = load i32, ptr %41, align 4, !tbaa !9
  %584 = uitofp i32 %583 to double
  %585 = fcmp ole double 0.000000e+00, %584
  br i1 %585, label %586, label %587

586:                                              ; preds = %582
  br label %588

587:                                              ; preds = %582, %579, %564
  call void @__assert_fail(ptr noundef @.str.1, ptr noundef @.str, i32 noundef 184, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel) #5
  unreachable

588:                                              ; preds = %586
  %589 = load i32, ptr %41, align 4, !tbaa !9
  %590 = trunc i32 %589 to i8
  %591 = load i8, ptr %22, align 1, !tbaa !16
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %552, i32 noundef %553, i32 noundef %556, i32 noundef %557, i32 noundef %558, i32 noundef %559, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %590, i8 noundef zeroext %591)
  br label %592

592:                                              ; preds = %588, %507
  call void @llvm.lifetime.end.p0(i64 4, ptr %42) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #4
  br label %593

593:                                              ; preds = %592
  %594 = load i32, ptr %13, align 4, !tbaa !9
  %595 = add i32 %594, 1
  store i32 %595, ptr %13, align 4, !tbaa !9
  br label %399, !llvm.loop !34

596:                                              ; preds = %399
  br label %597

597:                                              ; preds = %596, %395
  %598 = load i32, ptr %27, align 4, !tbaa !9
  %599 = zext i32 %598 to i64
  %600 = load i32, ptr %28, align 4, !tbaa !9
  %601 = zext i32 %600 to i64
  %602 = mul nsw i64 %599, %601
  %603 = load i32, ptr %11, align 4, !tbaa !9
  %604 = zext i32 %603 to i64
  %605 = load i32, ptr %28, align 4, !tbaa !9
  %606 = zext i32 %605 to i64
  %607 = mul nsw i64 %604, %606
  %608 = sub nsw i64 %602, %607
  %609 = icmp sgt i64 %608, 0
  br i1 %609, label %610, label %628

610:                                              ; preds = %597
  %611 = load ptr, ptr %6, align 8, !tbaa !5
  %612 = load i32, ptr %31, align 4, !tbaa !9
  %613 = load ptr, ptr %8, align 8, !tbaa !5
  %614 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %613, i32 0, i32 35
  %615 = load i32, ptr %614, align 4, !tbaa !25
  %616 = load i32, ptr %31, align 4, !tbaa !9
  %617 = load i32, ptr %27, align 4, !tbaa !9
  %618 = zext i32 %617 to i64
  %619 = load i32, ptr %28, align 4, !tbaa !9
  %620 = zext i32 %619 to i64
  %621 = mul nsw i64 %618, %620
  %622 = load i32, ptr %11, align 4, !tbaa !9
  %623 = zext i32 %622 to i64
  %624 = load i32, ptr %28, align 4, !tbaa !9
  %625 = zext i32 %624 to i64
  %626 = mul nsw i64 %623, %625
  %627 = sub nsw i64 %621, %626
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %611, i32 noundef 4096, i32 noundef %612, i32 noundef %615, i32 noundef %616, i64 noundef %627)
  br label %628

628:                                              ; preds = %610, %597
  %629 = load ptr, ptr %6, align 8, !tbaa !5
  %630 = load ptr, ptr %7, align 8, !tbaa !5
  %631 = load ptr, ptr %8, align 8, !tbaa !5
  %632 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %631, i32 0, i32 25
  %633 = load i32, ptr %632, align 4, !tbaa !24
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %629, ptr noundef %630, i32 noundef %633, i32 noundef 1)
  %634 = load i8, ptr %23, align 1, !tbaa !16
  %635 = icmp ne i8 %634, 0
  br i1 %635, label %636, label %638

636:                                              ; preds = %628
  %637 = load ptr, ptr %6, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_sm(ptr noundef %637, i32 noundef -721205633)
  br label %638

638:                                              ; preds = %636, %628
  store i32 0, ptr %38, align 4
  br label %639

639:                                              ; preds = %638, %231
  call void @llvm.lifetime.end.p0(i64 2101248, ptr %37) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  %640 = load i32, ptr %38, align 4
  switch i32 %640, label %642 [
    i32 0, label %641
    i32 1, label %641
  ]

641:                                              ; preds = %639, %639
  ret void

642:                                              ; preds = %639
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) #2

declare void @libxsmm_reset_jump_label_tracker(ptr noundef) #2

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_sm(ptr noundef, i32 noundef) #2

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #2

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 27}
!12 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 27, !13, i64 29, !7, i64 31}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !10, i64 28}
!15 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !10, i64 8}
!18 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!19 = !{!12, !13, i64 29}
!20 = !{!21, !10, i64 104}
!21 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}
!22 = !{!21, !10, i64 108}
!23 = !{!21, !10, i64 96}
!24 = !{!21, !10, i64 100}
!25 = !{!21, !10, i64 140}
!26 = !{!21, !10, i64 0}
!27 = !{!12, !10, i64 12}
!28 = !{!18, !10, i64 20}
!29 = !{!12, !10, i64 8}
!30 = !{!12, !10, i64 0}
!31 = !{!12, !10, i64 4}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = distinct !{!34, !33}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_jump_label_tracker_struct = type { [512 x i32], [512 x %struct.libxsmm_jump_source_struct] }
%struct.libxsmm_jump_source_struct = type { [512 x i32], [512 x i32], i32 }

@__func__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel = external hidden unnamed_addr constant [58 x i8], align 1
@.str = external hidden unnamed_addr constant [99 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_cols_aarch64_microkernel(ptr noundef %0, ptr noundef %1, ptr nocapture noundef %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4) local_unnamed_addr #0 {
  %6 = alloca %struct.libxsmm_jump_label_tracker_struct, align 4
  %7 = getelementptr inbounds i8, ptr %4, i64 27
  %8 = load i16, ptr %7, align 1, !tbaa !5
  %9 = and i16 %8, 256
  %.not = icmp eq i16 %9, 0
  %10 = select i1 %.not, i32 4, i32 8
  %11 = getelementptr inbounds i8, ptr %0, i64 28
  %12 = load i32, ptr %11, align 4, !tbaa !11
  %13 = icmp ult i32 %12, 3000
  %14 = add i32 %12, -2201
  %spec.select = icmp ult i32 %14, 799
  %15 = zext i1 %spec.select to i8
  %16 = add i32 %12, -2501
  %17 = icmp ult i32 %16, 499
  %18 = tail call i32 @libxsmm_cpuid_vlen32(i32 noundef %12) #3
  %19 = shl nsw i32 %18, 2
  %20 = getelementptr inbounds i8, ptr %3, i64 8
  %21 = load i32, ptr %20, align 4, !tbaa !14
  %22 = udiv i32 %19, %21
  call void @llvm.lifetime.start.p0(i64 2101248, ptr nonnull %6) #3
  call void @libxsmm_reset_jump_label_tracker(ptr noundef nonnull %6) #3
  %23 = getelementptr inbounds i8, ptr %4, i64 29
  %24 = load i16, ptr %23, align 1, !tbaa !16
  %25 = icmp eq i16 %24, 51
  %26 = getelementptr inbounds i8, ptr %2, i64 108
  %27 = getelementptr inbounds i8, ptr %2, i64 96
  %28 = getelementptr inbounds i8, ptr %2, i64 100
  store <4 x i32> <i32 42, i32 43, i32 40, i32 41>, ptr %27, align 4, !tbaa !17
  %29 = getelementptr inbounds i8, ptr %2, i64 140
  store i32 48, ptr %29, align 4, !tbaa !18
  %30 = select i1 %.not, i32 14, i32 46
  %31 = load i32, ptr %2, align 4, !tbaa !20
  br i1 %25, label %32, label %38

32:                                               ; preds = %5
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %31, i32 noundef 127, i32 noundef 32, i32 noundef 44) #3
  %33 = load i32, ptr %2, align 4, !tbaa !20
  %34 = load i32, ptr %26, align 4, !tbaa !21
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %33, i32 noundef 127, i32 noundef 40, i32 noundef %34) #3
  %35 = load i32, ptr %2, align 4, !tbaa !20
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %35, i32 noundef 127, i32 noundef 80, i32 noundef 45) #3
  %36 = getelementptr inbounds i8, ptr %4, i64 12
  %37 = getelementptr inbounds i8, ptr %3, i64 20
  br label %43

38:                                               ; preds = %5
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %31, i32 noundef 127, i32 noundef 32, i32 noundef 45) #3
  %39 = load i32, ptr %2, align 4, !tbaa !20
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %39, i32 noundef 127, i32 noundef 80, i32 noundef 44) #3
  %40 = load i32, ptr %2, align 4, !tbaa !20
  %41 = load i32, ptr %26, align 4, !tbaa !21
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1186988026, i32 noundef %40, i32 noundef 127, i32 noundef 88, i32 noundef %41) #3
  %42 = getelementptr inbounds i8, ptr %4, i64 8
  br label %43

43:                                               ; preds = %38, %32
  %.0247.in = phi ptr [ %37, %32 ], [ %20, %38 ]
  %.0246.in = phi ptr [ %36, %32 ], [ %42, %38 ]
  %.0246 = load i32, ptr %.0246.in, align 1, !tbaa !17
  %.0247 = load i32, ptr %.0247.in, align 4, !tbaa !17
  %44 = load i32, ptr %4, align 1, !tbaa !22
  %45 = getelementptr inbounds i8, ptr %4, i64 4
  %46 = load i32, ptr %45, align 1, !tbaa !23
  %47 = urem i32 %44, %22
  %48 = add i32 %22, -1
  %49 = add i32 %48, %44
  %50 = udiv i32 %49, %22
  br i1 %17, label %51, label %52

51:                                               ; preds = %43
  call void @libxsmm_aarch64_instruction_sm(ptr noundef nonnull %0, i32 noundef -721205377) #3
  br label %52

52:                                               ; preds = %51, %43
  br i1 %spec.select, label %54, label %.thread

.thread:                                          ; preds = %52
  %53 = icmp ne i32 %47, 0
  %.mux263 = select i1 %53, i32 %47, i32 1
  br label %67

54:                                               ; preds = %52
  %55 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef nonnull %0, i32 noundef 0, i32 noundef -1, i32 noundef %55) #3
  %56 = icmp ne i32 %47, 0
  %brmerge.not = and i1 %13, %56
  %.mux = select i1 %56, i32 %47, i32 1
  br i1 %brmerge.not, label %57, label %67

57:                                               ; preds = %54
  %58 = load i32, ptr %20, align 4, !tbaa !14
  switch i32 %58, label %62 [
    i32 4, label %59
    i32 2, label %59
  ]

59:                                               ; preds = %57, %57
  %60 = mul i32 %58, %47
  %61 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef nonnull %0, i32 noundef 1, i32 noundef %60, i32 noundef %61) #3
  br label %67

62:                                               ; preds = %57
  %63 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !17
  %64 = icmp ugt i32 %63, 1
  %65 = load i32, ptr @libxsmm_verbosity, align 4
  %66 = select i1 %64, i32 %65, i32 1
  call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90033, ptr noundef nonnull @__func__.libxsmm_generator_gather_scatter_cols_aarch64_microkernel, ptr noundef nonnull @.str, i32 noundef 111, i32 noundef %66) #3
  br label %123

67:                                               ; preds = %.thread, %54, %59
  %68 = phi i1 [ true, %59 ], [ %56, %54 ], [ %53, %.thread ]
  %.0245 = phi i32 [ 1, %59 ], [ %.mux, %54 ], [ %.mux263, %.thread ]
  %69 = icmp ugt i32 %50, 4
  br i1 %69, label %70, label %78

70:                                               ; preds = %67
  %71 = lshr i32 %50, 2
  %72 = and i32 %50, 3
  %73 = icmp eq i32 %72, 0
  %or.cond = select i1 %68, i1 %73, i1 false
  br i1 %or.cond, label %74, label %79

74:                                               ; preds = %70
  %75 = add nsw i32 %71, -1
  %76 = shl nuw i32 %75, 2
  %77 = sub i32 %50, %76
  br label %79

78:                                               ; preds = %67
  %spec.select257 = select i1 %68, i32 %50, i32 0
  %not. = xor i1 %68, true
  %spec.select258 = zext i1 %not. to i32
  br label %79

79:                                               ; preds = %78, %70, %74
  %.0244 = phi i32 [ %77, %74 ], [ %72, %70 ], [ %spec.select257, %78 ]
  %.0243 = phi i32 [ %75, %74 ], [ %71, %70 ], [ %spec.select258, %78 ]
  %.0242 = phi i32 [ 4, %74 ], [ 4, %70 ], [ %50, %78 ]
  %80 = load i32, ptr %20, align 4, !tbaa !14
  %81 = zext i32 %80 to i64
  %. = select i1 %25, i64 8, i64 12
  %82 = getelementptr inbounds i8, ptr %4, i64 %.
  %83 = load i32, ptr %82, align 1, !tbaa !17
  %84 = zext i32 %83 to i64
  %85 = mul nuw nsw i64 %81, %84
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef nonnull %0, i32 noundef 47, i64 noundef %85) #3
  %86 = load i32, ptr %28, align 4, !tbaa !24
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %86, i32 noundef %46) #3
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef nonnull %0, i32 noundef 1241513991, i32 noundef 46, i32 noundef 46, i32 noundef 46, i32 noundef 0, i32 noundef 0) #3
  %87 = load i32, ptr %26, align 4, !tbaa !21
  call void @libxsmm_aarch64_instruction_alu_move(ptr noundef nonnull %0, i32 noundef -1203764218, i32 noundef %87, i32 noundef 127, i32 noundef %10, i32 noundef %30) #3
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef nonnull %0, i32 noundef 453016595, i32 noundef 46, i32 noundef 47, i32 noundef 46, i32 noundef 0, i32 noundef 0) #3
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef nonnull %0, i32 noundef 184549383, i32 noundef 46, i32 noundef 44, i32 noundef 46, i32 noundef 0, i32 noundef 0) #3
  %.not255 = icmp eq i32 %.0243, 0
  br i1 %.not255, label %97, label %88

88:                                               ; preds = %79
  %89 = load i32, ptr %27, align 4, !tbaa !25
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %89, i32 noundef %.0243) #3
  %.not267 = icmp eq i32 %.0242, 0
  br i1 %.not267, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %88
  br i1 %25, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
  %.0265.us = phi i32 [ %92, %.lr.ph.split.us ], [ 0, %.lr.ph ]
  %90 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 46, i32 noundef %90, i32 noundef %.0265.us, i32 noundef %.0247, i32 noundef 0, i32 noundef 1, i32 noundef 0, i8 noundef zeroext 0, i8 noundef zeroext %15) #3
  %91 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 45, i32 noundef %91, i32 noundef %.0265.us, i32 noundef %.0247, i32 noundef 0, i32 noundef 1, i32 noundef 1, i8 noundef zeroext 0, i8 noundef zeroext %15) #3
  %92 = add nuw i32 %.0265.us, 1
  %exitcond270.not = icmp eq i32 %92, %.0242
  br i1 %exitcond270.not, label %._crit_edge, label %.lr.ph.split.us, !llvm.loop !26

.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
  %.0265 = phi i32 [ %95, %.lr.ph.split ], [ 0, %.lr.ph ]
  %93 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 45, i32 noundef %93, i32 noundef %.0265, i32 noundef %.0247, i32 noundef 0, i32 noundef 1, i32 noundef 0, i8 noundef zeroext 0, i8 noundef zeroext %15) #3
  %94 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 46, i32 noundef %94, i32 noundef %.0265, i32 noundef %.0247, i32 noundef 0, i32 noundef 1, i32 noundef 1, i8 noundef zeroext 0, i8 noundef zeroext %15) #3
  %95 = add nuw i32 %.0265, 1
  %exitcond.not = icmp eq i32 %95, %.0242
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.split, !llvm.loop !26

._crit_edge:                                      ; preds = %.lr.ph.split, %.lr.ph.split.us, %88
  %96 = load i32, ptr %27, align 4, !tbaa !25
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %96, i32 noundef 1) #3
  br label %97

97:                                               ; preds = %._crit_edge, %79
  %.not256 = icmp eq i32 %.0244, 0
  br i1 %.not256, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %97
  %98 = add i32 %.0244, -1
  %99 = trunc i32 %.0245 to i8
  br i1 %25, label %.preheader.split.us, label %.preheader.split

.preheader.split.us:                              ; preds = %.preheader, %.preheader.split.us
  %.1266.us = phi i32 [ %105, %.preheader.split.us ], [ 0, %.preheader ]
  %100 = icmp eq i32 %.1266.us, %98
  %101 = select i1 %100, i32 %47, i32 0
  %or.cond5.us = and i1 %68, %100
  %102 = load i32, ptr %29, align 4, !tbaa !18
  %103 = select i1 %or.cond5.us, i8 %99, i8 0
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 46, i32 noundef %102, i32 noundef %.1266.us, i32 noundef %.0247, i32 noundef %101, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %103, i8 noundef zeroext %15) #3
  %104 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 45, i32 noundef %104, i32 noundef %.1266.us, i32 noundef %.0247, i32 noundef %101, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %103, i8 noundef zeroext %15) #3
  %105 = add nuw i32 %.1266.us, 1
  %exitcond272.not = icmp eq i32 %105, %.0244
  br i1 %exitcond272.not, label %.loopexit, label %.preheader.split.us, !llvm.loop !28

.preheader.split:                                 ; preds = %.preheader, %.preheader.split
  %.1266 = phi i32 [ %111, %.preheader.split ], [ 0, %.preheader ]
  %106 = icmp eq i32 %.1266, %98
  %107 = select i1 %106, i32 %47, i32 0
  %or.cond5 = and i1 %68, %106
  %108 = load i32, ptr %29, align 4, !tbaa !18
  %109 = select i1 %or.cond5, i8 %99, i8 0
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 45, i32 noundef %108, i32 noundef %.1266, i32 noundef %.0247, i32 noundef %107, i32 noundef 1, i32 noundef 0, i8 noundef zeroext %109, i8 noundef zeroext %15) #3
  %110 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef %0, i32 noundef 46, i32 noundef %110, i32 noundef %.1266, i32 noundef %.0247, i32 noundef %107, i32 noundef 1, i32 noundef 1, i8 noundef zeroext %109, i8 noundef zeroext %15) #3
  %111 = add nuw i32 %.1266, 1
  %exitcond271.not = icmp eq i32 %111, %.0244
  br i1 %exitcond271.not, label %.loopexit, label %.preheader.split, !llvm.loop !28

.loopexit:                                        ; preds = %.preheader.split, %.preheader.split.us, %97
  %112 = zext i32 %.0246 to i64
  %113 = zext i32 %.0247 to i64
  %114 = zext i32 %44 to i64
  %115 = sub nsw i64 %112, %114
  %116 = mul i64 %115, %113
  %117 = icmp sgt i64 %116, 0
  br i1 %117, label %118, label %120

118:                                              ; preds = %.loopexit
  %119 = load i32, ptr %29, align 4, !tbaa !18
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 45, i32 noundef %119, i32 noundef 45, i64 noundef %116) #3
  br label %120

120:                                              ; preds = %118, %.loopexit
  %121 = load i32, ptr %28, align 4, !tbaa !24
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %121, i32 noundef 1) #3
  br i1 %17, label %122, label %123

122:                                              ; preds = %120
  call void @libxsmm_aarch64_instruction_sm(ptr noundef %0, i32 noundef -721205633) #3
  br label %123

123:                                              ; preds = %120, %122, %62
  call void @llvm.lifetime.end.p0(i64 2101248, ptr nonnull %6) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) local_unnamed_addr #2

declare void @libxsmm_reset_jump_label_tracker(ptr noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_sm(ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_generator_vloadstore_masked_vreg_aarch64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 27}
!6 = !{!"libxsmm_meltw_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !10, i64 27, !10, i64 29, !8, i64 31}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!12, !7, i64 28}
!12 = !{!"libxsmm_generated_code", !13, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"libxsmm_mateltwise_kernel_config_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !7, i64 392, !7, i64 396, !7, i64 400, !7, i64 404, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !7, i64 428, !7, i64 432, !7, i64 436, !7, i64 440, !7, i64 444, !7, i64 448, !7, i64 452, !7, i64 456, !7, i64 460, !7, i64 464, !7, i64 468, !7, i64 472, !7, i64 476, !7, i64 480, !7, i64 484, !7, i64 488, !7, i64 492, !7, i64 496, !7, i64 500, !7, i64 504, !7, i64 508, !8, i64 512}
!16 = !{!6, !10, i64 29}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !7, i64 140}
!19 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144}
!20 = !{!19, !7, i64 0}
!21 = !{!19, !7, i64 108}
!22 = !{!6, !7, i64 0}
!23 = !{!6, !7, i64 4}
!24 = !{!19, !7, i64 100}
!25 = !{!19, !7, i64 96}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass