; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_gather_scatter_avx_avx512)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #0

declare void @libxsmm_x86_instruction_vec_mask_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_rows_avx_avx512_mn_loop_unrolled(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext %6, i8 noundef signext %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2 {
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i8, align 1
  %27 = alloca i8, align 1
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  store ptr %0, ptr %20, align 8, !tbaa !5
  store i32 %1, ptr %21, align 4, !tbaa !9
  store i32 %2, ptr %22, align 4, !tbaa !9
  store i32 %3, ptr %23, align 4, !tbaa !9
  store i32 %4, ptr %24, align 4, !tbaa !9
  store i32 %5, ptr %25, align 4, !tbaa !9
  store i8 %6, ptr %26, align 1, !tbaa !11
  store i8 %7, ptr %27, align 1, !tbaa !11
  store i32 %8, ptr %28, align 4, !tbaa !9
  store i32 %9, ptr %29, align 4, !tbaa !9
  store i32 %10, ptr %30, align 4, !tbaa !9
  store i32 %11, ptr %31, align 4, !tbaa !9
  store i32 %12, ptr %32, align 4, !tbaa !9
  store i32 %13, ptr %33, align 4, !tbaa !9
  store i32 %14, ptr %34, align 4, !tbaa !9
  store i32 %15, ptr %35, align 4, !tbaa !9
  store i32 %16, ptr %36, align 4, !tbaa !9
  store i32 %17, ptr %37, align 4, !tbaa !9
  store i32 %18, ptr %38, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #3
  store i32 0, ptr %39, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #3
  store i32 0, ptr %40, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #3
  %42 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %42, ptr %41, align 4, !tbaa !9
  store i32 0, ptr %39, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %239, %19
  %44 = load i32, ptr %39, align 4, !tbaa !9
  %45 = load i32, ptr %21, align 4, !tbaa !9
  %46 = icmp ult i32 %44, %45
  br i1 %46, label %47, label %242

47:                                               ; preds = %43
  store i32 0, ptr %40, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %235, %47
  %49 = load i32, ptr %40, align 4, !tbaa !9
  %50 = load i32, ptr %22, align 4, !tbaa !9
  %51 = icmp ult i32 %49, %50
  br i1 %51, label %52, label %238

52:                                               ; preds = %48
  %53 = load i32, ptr %32, align 4, !tbaa !9
  %54 = icmp eq i32 %53, 1
  br i1 %54, label %55, label %165

55:                                               ; preds = %52
  %56 = load ptr, ptr %20, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %56, i32 0, i32 6
  %58 = load i32, ptr %57, align 4, !tbaa !12
  %59 = icmp uge i32 %58, 1051
  br i1 %59, label %60, label %101

60:                                               ; preds = %55
  %61 = load i32, ptr %28, align 4, !tbaa !9
  %62 = icmp ugt i32 %61, 0
  br i1 %62, label %63, label %79

63:                                               ; preds = %60
  %64 = load i32, ptr %39, align 4, !tbaa !9
  %65 = load i32, ptr %21, align 4, !tbaa !9
  %66 = sub i32 %65, 1
  %67 = icmp eq i32 %64, %66
  br i1 %67, label %68, label %73

68:                                               ; preds = %63
  %69 = load ptr, ptr %20, align 8, !tbaa !5
  %70 = load i32, ptr %30, align 4, !tbaa !9
  %71 = load i32, ptr %30, align 4, !tbaa !9
  %72 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %69, i32 noundef -1341910203, i32 noundef %70, i32 noundef %71, i32 noundef %72, i32 noundef 0)
  br label %78

73:                                               ; preds = %63
  %74 = load ptr, ptr %20, align 8, !tbaa !5
  %75 = load i32, ptr %29, align 4, !tbaa !9
  %76 = load i32, ptr %29, align 4, !tbaa !9
  %77 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %74, i32 noundef -1341910203, i32 noundef %75, i32 noundef %76, i32 noundef %77, i32 noundef 0)
  br label %78

78:                                               ; preds = %73, %68
  br label %84

79:                                               ; preds = %60
  %80 = load ptr, ptr %20, align 8, !tbaa !5
  %81 = load i32, ptr %29, align 4, !tbaa !9
  %82 = load i32, ptr %29, align 4, !tbaa !9
  %83 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %80, i32 noundef -1341910203, i32 noundef %81, i32 noundef %82, i32 noundef %83, i32 noundef 0)
  br label %84

84:                                               ; preds = %79, %78
  %85 = load ptr, ptr %20, align 8, !tbaa !5
  %86 = load ptr, ptr %20, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 4, !tbaa !12
  %89 = load i32, ptr %23, align 4, !tbaa !9
  %90 = load i32, ptr %33, align 4, !tbaa !9
  %91 = load i32, ptr %39, align 4, !tbaa !9
  %92 = load i32, ptr %35, align 4, !tbaa !9
  %93 = load i32, ptr %40, align 4, !tbaa !9
  %94 = load i32, ptr %37, align 4, !tbaa !9
  %95 = mul i32 %93, %94
  %96 = load i32, ptr %35, align 4, !tbaa !9
  %97 = mul i32 %95, %96
  %98 = load i8, ptr %26, align 1, !tbaa !11
  %99 = load i32, ptr %41, align 4, !tbaa !9
  %100 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %85, i32 noundef %88, i32 noundef %89, i32 noundef %90, i32 noundef %91, i32 noundef %92, i32 noundef %97, i8 noundef signext %98, i32 noundef %99, i32 noundef %100, i32 noundef 0, i32 noundef 0)
  br label %136

101:                                              ; preds = %55
  %102 = load i32, ptr %28, align 4, !tbaa !9
  %103 = icmp ugt i32 %102, 0
  br i1 %103, label %104, label %118

104:                                              ; preds = %101
  %105 = load i32, ptr %39, align 4, !tbaa !9
  %106 = load i32, ptr %21, align 4, !tbaa !9
  %107 = sub i32 %106, 1
  %108 = icmp eq i32 %105, %107
  br i1 %108, label %109, label %113

109:                                              ; preds = %104
  %110 = load ptr, ptr %20, align 8, !tbaa !5
  %111 = load i32, ptr %30, align 4, !tbaa !9
  %112 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %110, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %111, i32 noundef %112)
  br label %117

113:                                              ; preds = %104
  %114 = load ptr, ptr %20, align 8, !tbaa !5
  %115 = load i32, ptr %29, align 4, !tbaa !9
  %116 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %114, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %115, i32 noundef %116)
  br label %117

117:                                              ; preds = %113, %109
  br label %122

118:                                              ; preds = %101
  %119 = load ptr, ptr %20, align 8, !tbaa !5
  %120 = load i32, ptr %29, align 4, !tbaa !9
  %121 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %119, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %120, i32 noundef %121)
  br label %122

122:                                              ; preds = %118, %117
  %123 = load ptr, ptr %20, align 8, !tbaa !5
  %124 = load i32, ptr %23, align 4, !tbaa !9
  %125 = load i32, ptr %33, align 4, !tbaa !9
  %126 = load i32, ptr %39, align 4, !tbaa !9
  %127 = load i32, ptr %35, align 4, !tbaa !9
  %128 = load i32, ptr %40, align 4, !tbaa !9
  %129 = load i32, ptr %37, align 4, !tbaa !9
  %130 = mul i32 %128, %129
  %131 = load i32, ptr %35, align 4, !tbaa !9
  %132 = mul i32 %130, %131
  %133 = load i8, ptr %26, align 1, !tbaa !11
  %134 = load i32, ptr %41, align 4, !tbaa !9
  %135 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_mask_move(ptr noundef %123, i32 noundef %124, i32 noundef %125, i32 noundef %126, i32 noundef %127, i32 noundef %132, i8 noundef signext %133, i32 noundef %134, i32 noundef %135, i32 noundef 0)
  br label %136

136:                                              ; preds = %122, %84
  %137 = load ptr, ptr %20, align 8, !tbaa !5
  %138 = load i32, ptr %24, align 4, !tbaa !9
  %139 = load i32, ptr %34, align 4, !tbaa !9
  %140 = load i32, ptr %39, align 4, !tbaa !9
  %141 = load i32, ptr %25, align 4, !tbaa !9
  %142 = mul i32 %140, %141
  %143 = load i32, ptr %36, align 4, !tbaa !9
  %144 = mul i32 %142, %143
  %145 = load i32, ptr %40, align 4, !tbaa !9
  %146 = load i32, ptr %38, align 4, !tbaa !9
  %147 = mul i32 %145, %146
  %148 = load i32, ptr %36, align 4, !tbaa !9
  %149 = mul i32 %147, %148
  %150 = add i32 %144, %149
  %151 = load i8, ptr %27, align 1, !tbaa !11
  %152 = load i32, ptr %41, align 4, !tbaa !9
  %153 = load i32, ptr %28, align 4, !tbaa !9
  %154 = icmp ugt i32 %153, 0
  br i1 %154, label %155, label %160

155:                                              ; preds = %136
  %156 = load i32, ptr %39, align 4, !tbaa !9
  %157 = load i32, ptr %21, align 4, !tbaa !9
  %158 = sub i32 %157, 1
  %159 = icmp eq i32 %156, %158
  br label %160

160:                                              ; preds = %155, %136
  %161 = phi i1 [ false, %136 ], [ %159, %155 ]
  %162 = zext i1 %161 to i64
  %163 = select i1 %161, i32 1, i32 0
  %164 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %137, i32 noundef %138, i32 noundef %139, i32 noundef 127, i32 noundef 0, i32 noundef %150, i8 noundef signext %151, i32 noundef %152, i32 noundef %163, i32 noundef %164, i32 noundef 1)
  br label %234

165:                                              ; preds = %52
  %166 = load ptr, ptr %20, align 8, !tbaa !5
  %167 = load i32, ptr %23, align 4, !tbaa !9
  %168 = load i32, ptr %34, align 4, !tbaa !9
  %169 = load i32, ptr %39, align 4, !tbaa !9
  %170 = load i32, ptr %25, align 4, !tbaa !9
  %171 = mul i32 %169, %170
  %172 = load i32, ptr %36, align 4, !tbaa !9
  %173 = mul i32 %171, %172
  %174 = load i32, ptr %40, align 4, !tbaa !9
  %175 = load i32, ptr %38, align 4, !tbaa !9
  %176 = mul i32 %174, %175
  %177 = load i32, ptr %36, align 4, !tbaa !9
  %178 = mul i32 %176, %177
  %179 = add i32 %173, %178
  %180 = load i8, ptr %26, align 1, !tbaa !11
  %181 = load i32, ptr %41, align 4, !tbaa !9
  %182 = load i32, ptr %28, align 4, !tbaa !9
  %183 = icmp ugt i32 %182, 0
  br i1 %183, label %184, label %189

184:                                              ; preds = %165
  %185 = load i32, ptr %39, align 4, !tbaa !9
  %186 = load i32, ptr %21, align 4, !tbaa !9
  %187 = sub i32 %186, 1
  %188 = icmp eq i32 %185, %187
  br label %189

189:                                              ; preds = %184, %165
  %190 = phi i1 [ false, %165 ], [ %188, %184 ]
  %191 = zext i1 %190 to i64
  %192 = select i1 %190, i32 1, i32 0
  %193 = load i32, ptr %30, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %166, i32 noundef %167, i32 noundef %168, i32 noundef 127, i32 noundef 0, i32 noundef %179, i8 noundef signext %180, i32 noundef %181, i32 noundef %192, i32 noundef %193, i32 noundef 0)
  %194 = load i32, ptr %28, align 4, !tbaa !9
  %195 = icmp ugt i32 %194, 0
  br i1 %195, label %196, label %212

196:                                              ; preds = %189
  %197 = load i32, ptr %39, align 4, !tbaa !9
  %198 = load i32, ptr %21, align 4, !tbaa !9
  %199 = sub i32 %198, 1
  %200 = icmp eq i32 %197, %199
  br i1 %200, label %201, label %206

201:                                              ; preds = %196
  %202 = load ptr, ptr %20, align 8, !tbaa !5
  %203 = load i32, ptr %30, align 4, !tbaa !9
  %204 = load i32, ptr %30, align 4, !tbaa !9
  %205 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %202, i32 noundef -1341910203, i32 noundef %203, i32 noundef %204, i32 noundef %205, i32 noundef 0)
  br label %211

206:                                              ; preds = %196
  %207 = load ptr, ptr %20, align 8, !tbaa !5
  %208 = load i32, ptr %29, align 4, !tbaa !9
  %209 = load i32, ptr %29, align 4, !tbaa !9
  %210 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %207, i32 noundef -1341910203, i32 noundef %208, i32 noundef %209, i32 noundef %210, i32 noundef 0)
  br label %211

211:                                              ; preds = %206, %201
  br label %217

212:                                              ; preds = %189
  %213 = load ptr, ptr %20, align 8, !tbaa !5
  %214 = load i32, ptr %29, align 4, !tbaa !9
  %215 = load i32, ptr %29, align 4, !tbaa !9
  %216 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %213, i32 noundef -1341910203, i32 noundef %214, i32 noundef %215, i32 noundef %216, i32 noundef 0)
  br label %217

217:                                              ; preds = %212, %211
  %218 = load ptr, ptr %20, align 8, !tbaa !5
  %219 = load ptr, ptr %20, align 8, !tbaa !5
  %220 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %219, i32 0, i32 6
  %221 = load i32, ptr %220, align 4, !tbaa !12
  %222 = load i32, ptr %24, align 4, !tbaa !9
  %223 = load i32, ptr %33, align 4, !tbaa !9
  %224 = load i32, ptr %39, align 4, !tbaa !9
  %225 = load i32, ptr %35, align 4, !tbaa !9
  %226 = load i32, ptr %40, align 4, !tbaa !9
  %227 = load i32, ptr %37, align 4, !tbaa !9
  %228 = mul i32 %226, %227
  %229 = load i32, ptr %35, align 4, !tbaa !9
  %230 = mul i32 %228, %229
  %231 = load i8, ptr %27, align 1, !tbaa !11
  %232 = load i32, ptr %41, align 4, !tbaa !9
  %233 = load i32, ptr %31, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %218, i32 noundef %221, i32 noundef %222, i32 noundef %223, i32 noundef %224, i32 noundef %225, i32 noundef %230, i8 noundef signext %231, i32 noundef %232, i32 noundef %233, i32 noundef 0, i32 noundef 0)
  br label %234

234:                                              ; preds = %217, %160
  br label %235

235:                                              ; preds = %234
  %236 = load i32, ptr %40, align 4, !tbaa !9
  %237 = add i32 %236, 1
  store i32 %237, ptr %40, align 4, !tbaa !9
  br label %48, !llvm.loop !14

238:                                              ; preds = %48
  br label %239

239:                                              ; preds = %238
  %240 = load i32, ptr %39, align 4, !tbaa !9
  %241 = add i32 %240, 1
  store i32 %241, ptr %39, align 4, !tbaa !9
  br label %43, !llvm.loop !16

242:                                              ; preds = %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #3
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_unified_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_mask_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_gather_scatter_rows_avx_avx512_mn_loop_unrolled(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i8 noundef signext %6, i8 noundef signext %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef %18) local_unnamed_addr #1 {
  %factor.op.mul125 = mul i32 %16, %5
  %.not132 = icmp eq i32 %1, 0
  br i1 %.not132, label %._crit_edge128, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %19
  %factor.op.mul118 = mul i32 %18, %16
  %.not133 = icmp eq i32 %2, 0
  %20 = icmp ne i32 %8, 0
  %21 = add i32 %1, -1
  %22 = getelementptr inbounds i8, ptr %0, i64 28
  %23 = mul i32 %17, %15
  %.not = icmp eq i32 %8, 0
  br i1 %.not133, label %._crit_edge128, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  %24 = icmp eq i32 %12, 1
  br i1 %24, label %.preheader.us.us, label %.preheader.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us.us.us
  %.0126.us.us = phi i32 [ %44, %._crit_edge.split.us.us.us ], [ 0, %.preheader.lr.ph.split.us ]
  %factor.op.mul120.reass.us.us = mul i32 %.0126.us.us, %factor.op.mul125
  %25 = icmp eq i32 %.0126.us.us, %21
  %26 = and i1 %20, %25
  %27 = zext i1 %26 to i32
  %. = select i1 %25, i32 %10, i32 %9
  %.sink = select i1 %.not, i32 %9, i32 %.
  br label %28

28:                                               ; preds = %41, %.preheader.us.us
  %.0115124.us.us.us = phi i32 [ 0, %.preheader.us.us ], [ %43, %41 ]
  %29 = load i32, ptr %22, align 4, !tbaa !5
  %30 = icmp ugt i32 %29, 1050
  br i1 %30, label %33, label %31

31:                                               ; preds = %28
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 537138704, i8 noundef signext 121, i32 noundef %.sink, i32 noundef %11) #2
  %32 = mul i32 %23, %.0115124.us.us.us
  tail call void @libxsmm_x86_instruction_vec_mask_move(ptr noundef nonnull %0, i32 noundef %3, i32 noundef %13, i32 noundef %.0126.us.us, i32 noundef %15, i32 noundef %32, i8 noundef signext %6, i32 noundef %1, i32 noundef %11, i32 noundef 0) #2
  br label %41

33:                                               ; preds = %28
  br i1 %.not, label %37, label %34

34:                                               ; preds = %33
  br i1 %25, label %36, label %35

35:                                               ; preds = %34
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %9, i32 noundef %9, i32 noundef %11, i32 noundef 0) #2
  br label %38

36:                                               ; preds = %34
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %10, i32 noundef %10, i32 noundef %11, i32 noundef 0) #2
  br label %38

37:                                               ; preds = %33
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1341910203, i32 noundef %9, i32 noundef %9, i32 noundef %11, i32 noundef 0) #2
  br label %38

38:                                               ; preds = %37, %36, %35
  %39 = load i32, ptr %22, align 4, !tbaa !5
  %40 = mul i32 %23, %.0115124.us.us.us
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %39, i32 noundef %3, i32 noundef %13, i32 noundef %.0126.us.us, i32 noundef %15, i32 noundef %40, i8 noundef signext %6, i32 noundef %1, i32 noundef %11, i32 noundef 0, i32 noundef 0) #2
  br label %41

41:                                               ; preds = %38, %31
  %.reass123.us.us.us = mul i32 %.0115124.us.us.us, %factor.op.mul118
  %42 = add i32 %.reass123.us.us.us, %factor.op.mul120.reass.us.us
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %14, i32 noundef 127, i32 noundef 0, i32 noundef %42, i8 noundef signext %7, i32 noundef %1, i32 noundef %27, i32 noundef %10, i32 noundef 1) #2
  %43 = add nuw i32 %.0115124.us.us.us, 1
  %exitcond137.not = icmp eq i32 %43, %2
  br i1 %exitcond137.not, label %._crit_edge.split.us.us.us, label %28, !llvm.loop !11

._crit_edge.split.us.us.us:                       ; preds = %41
  %44 = add nuw i32 %.0126.us.us, 1
  %exitcond138.not = icmp eq i32 %44, %1
  br i1 %exitcond138.not, label %._crit_edge128, label %.preheader.us.us, !llvm.loop !13

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %._crit_edge.split.us130
  %.0126.us = phi i32 [ %58, %._crit_edge.split.us130 ], [ 0, %.preheader.lr.ph.split.us ]
  %factor.op.mul.reass.us = mul i32 %.0126.us, %factor.op.mul125
  %45 = icmp eq i32 %.0126.us, %21
  %46 = and i1 %20, %45
  %47 = zext i1 %46 to i32
  br label %48

48:                                               ; preds = %.preheader.us, %54
  %.0115124.us129 = phi i32 [ 0, %.preheader.us ], [ %57, %54 ]
  %.reass119.us = mul i32 %.0115124.us129, %factor.op.mul118
  %49 = add i32 %.reass119.us, %factor.op.mul.reass.us
  tail call void @libxsmm_x86_instruction_unified_vec_move(ptr noundef %0, i32 noundef %3, i32 noundef %14, i32 noundef 127, i32 noundef 0, i32 noundef %49, i8 noundef signext %6, i32 noundef %1, i32 noundef %47, i32 noundef %10, i32 noundef 0) #2
  br i1 %20, label %51, label %50

50:                                               ; preds = %48
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %9, i32 noundef %9, i32 noundef %11, i32 noundef 0) #2
  br label %54

51:                                               ; preds = %48
  br i1 %45, label %53, label %52

52:                                               ; preds = %51
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %9, i32 noundef %9, i32 noundef %11, i32 noundef 0) #2
  br label %54

53:                                               ; preds = %51
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %0, i32 noundef -1341910203, i32 noundef %10, i32 noundef %10, i32 noundef %11, i32 noundef 0) #2
  br label %54

54:                                               ; preds = %53, %52, %50
  %55 = load i32, ptr %22, align 4, !tbaa !5
  %56 = mul i32 %23, %.0115124.us129
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %0, i32 noundef %55, i32 noundef %4, i32 noundef %13, i32 noundef %.0126.us, i32 noundef %15, i32 noundef %56, i8 noundef signext %7, i32 noundef %1, i32 noundef %11, i32 noundef 0, i32 noundef 0) #2
  %57 = add nuw i32 %.0115124.us129, 1
  %exitcond.not = icmp eq i32 %57, %2
  br i1 %exitcond.not, label %._crit_edge.split.us130, label %48, !llvm.loop !11

._crit_edge.split.us130:                          ; preds = %54
  %58 = add nuw i32 %.0126.us, 1
  %exitcond136.not = icmp eq i32 %58, %1
  br i1 %exitcond136.not, label %._crit_edge128, label %.preheader.us, !llvm.loop !13

._crit_edge128:                                   ; preds = %._crit_edge.split.us130, %._crit_edge.split.us.us.us, %.preheader.lr.ph, %19
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass