; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@.str.6 = external hidden unnamed_addr constant [76 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_hinstrpd_avx512 = external hidden unnamed_addr constant [34 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_hinstrpd_avx512(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %13, i32 0, i32 6
  %15 = load i32, ptr %14, align 4, !tbaa !11
  %16 = icmp uge i32 %15, 1101
  %17 = zext i1 %16 to i64
  %18 = select i1 %16, i32 122, i32 121
  %19 = trunc i32 %18 to i8
  store i8 %19, ptr %11, align 1, !tbaa !13
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = icmp ugt i32 %20, 15
  br i1 %21, label %25, label %22

22:                                               ; preds = %5
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = icmp ugt i32 %23, 15
  br i1 %24, label %25, label %34

25:                                               ; preds = %22, %5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %28 = icmp ult i32 1, %27
  br i1 %28, label %29, label %31

29:                                               ; preds = %25
  %30 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %32

31:                                               ; preds = %25
  br label %32

32:                                               ; preds = %31, %29
  %33 = phi i32 [ %30, %29 ], [ 1, %31 ]
  call void @libxsmm_handle_error(ptr noundef %26, i32 noundef 90000, ptr noundef @__func__.libxsmm_generator_hinstrpd_avx512, ptr noundef @.str.6, i32 noundef 2470, i32 noundef %33)
  store i32 1, ptr %12, align 4
  br label %73

34:                                               ; preds = %22
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %35, i32 0, i32 6
  %37 = load i32, ptr %36, align 4, !tbaa !11
  %38 = icmp uge i32 %37, 1101
  br i1 %38, label %39, label %51

39:                                               ; preds = %34
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = load i8, ptr %11, align 1, !tbaa !13
  %42 = load i32, ptr %8, align 4, !tbaa !9
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %40, i32 noundef -259181021, i8 noundef signext %41, i32 noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef 78)
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = load i8, ptr %11, align 1, !tbaa !13
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = load i32, ptr %9, align 4, !tbaa !9
  %50 = load i32, ptr %8, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %45, i32 noundef %46, i8 noundef signext %47, i32 noundef %48, i32 noundef %49, i32 noundef %50)
  br label %51

51:                                               ; preds = %39, %34
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = load i8, ptr %11, align 1, !tbaa !13
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %52, i32 noundef -259181021, i8 noundef signext %53, i32 noundef %54, i32 noundef %55, i32 noundef %56, i32 noundef 177)
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = load i32, ptr %7, align 4, !tbaa !9
  %59 = load i8, ptr %11, align 1, !tbaa !13
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = load i32, ptr %9, align 4, !tbaa !9
  %62 = load i32, ptr %10, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %57, i32 noundef %58, i8 noundef signext %59, i32 noundef %60, i32 noundef %61, i32 noundef %62)
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %63, i32 noundef 814552774, i8 noundef signext 121, i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef 1)
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = load i8, ptr %11, align 1, !tbaa !13
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = load i32, ptr %9, align 4, !tbaa !9
  %72 = load i32, ptr %8, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %67, i32 noundef %68, i8 noundef signext %69, i32 noundef %70, i32 noundef %71, i32 noundef %72)
  store i32 0, ptr %12, align 4
  br label %73

73:                                               ; preds = %51, %32
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  %74 = load i32, ptr %12, align 4
  switch i32 %74, label %76 [
    i32 0, label %75
    i32 1, label %75
  ]

75:                                               ; preds = %73, %73
  ret void

76:                                               ; preds = %73
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.6 = external hidden unnamed_addr constant [76 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_hinstrpd_avx512 = external hidden unnamed_addr constant [34 x i8], align 1

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_hinstrpd_avx512(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = getelementptr inbounds i8, ptr %0, i64 28
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = icmp ugt i32 %7, 1100
  %9 = select i1 %8, i8 122, i8 121
  %10 = or i32 %4, %3
  %or.cond.not = icmp ult i32 %10, 16
  br i1 %or.cond.not, label %16, label %11

11:                                               ; preds = %5
  %12 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !11
  %13 = icmp ugt i32 %12, 1
  %14 = load i32, ptr @libxsmm_verbosity, align 4
  %15 = select i1 %13, i32 %14, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90000, ptr noundef nonnull @__func__.libxsmm_generator_hinstrpd_avx512, ptr noundef nonnull @.str.6, i32 noundef 2470, i32 noundef %15) #2
  br label %19

16:                                               ; preds = %5
  br i1 %8, label %17, label %18

17:                                               ; preds = %16
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef -259181021, i8 noundef signext 122, i32 noundef %2, i32 noundef %2, i32 noundef %3, i32 noundef 78) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext 122, i32 noundef %2, i32 noundef %3, i32 noundef %2) #2
  br label %18

18:                                               ; preds = %17, %16
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef -259181021, i8 noundef signext %9, i32 noundef %2, i32 noundef %2, i32 noundef %3, i32 noundef 177) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext %9, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef 814552774, i8 noundef signext 121, i32 noundef %4, i32 noundef %4, i32 noundef %3, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef %1, i8 noundef signext %9, i32 noundef %4, i32 noundef %3, i32 noundef %2) #2
  br label %19

19:                                               ; preds = %18, %11
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass