; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseReorder.ll (ZN4Simd4Base12Reorder16bitEPKhmPh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder16bitEPKhmPh = external hidden unnamed_addr constant [66 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12Reorder16bitEPKhmPh(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %10 = load i64, ptr %5, align 8, !tbaa !9
  %11 = urem i64 %10, 2
  %12 = icmp eq i64 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  br label %16

14:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 43, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder16bitEPKhmPh) #4
  unreachable

15:                                               ; No predecessors!
  br label %16

16:                                               ; preds = %15, %13
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %17 = load i64, ptr %5, align 8, !tbaa !9
  %18 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %17, i64 noundef 8)
  store i64 %18, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %19

19:                                               ; preds = %31, %16
  %20 = load i64, ptr %8, align 8, !tbaa !9
  %21 = load i64, ptr %7, align 8, !tbaa !9
  %22 = icmp ult i64 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %34

24:                                               ; preds = %19
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = load i64, ptr %8, align 8, !tbaa !9
  %27 = getelementptr inbounds i8, ptr %25, i64 %26
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i64, ptr %8, align 8, !tbaa !9
  %30 = getelementptr inbounds i8, ptr %28, i64 %29
  call void @_ZN4Simd4Base13Reorder16bitXEPKhPh(ptr noundef %27, ptr noundef %30)
  br label %31

31:                                               ; preds = %24
  %32 = load i64, ptr %8, align 8, !tbaa !9
  %33 = add i64 %32, 8
  store i64 %33, ptr %8, align 8, !tbaa !9
  br label %19, !llvm.loop !11

34:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %35 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %35, ptr %9, align 8, !tbaa !9
  br label %36

36:                                               ; preds = %48, %34
  %37 = load i64, ptr %9, align 8, !tbaa !9
  %38 = load i64, ptr %5, align 8, !tbaa !9
  %39 = icmp ult i64 %37, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %51

41:                                               ; preds = %36
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = load i64, ptr %9, align 8, !tbaa !9
  %44 = getelementptr inbounds i8, ptr %42, i64 %43
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i64, ptr %9, align 8, !tbaa !9
  %47 = getelementptr inbounds i8, ptr %45, i64 %46
  call void @_ZN4Simd4Base12Reorder16bitEPKhPh(ptr noundef %44, ptr noundef %47)
  br label %48

48:                                               ; preds = %41
  %49 = load i64, ptr %9, align 8, !tbaa !9
  %50 = add i64 %49, 2
  store i64 %50, ptr %9, align 8, !tbaa !9
  br label %36, !llvm.loop !13

51:                                               ; preds = %40
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base13Reorder16bitXEPKhPh(ptr noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base12Reorder16bitEPKhPh(ptr noundef, ptr noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder16bitEPKhmPh = external hidden unnamed_addr constant [66 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base12Reorder16bitEPKhmPh(ptr noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = and i64 %1, 1
  %5 = icmp eq i64 %4, 0
  br i1 %5, label %7, label %6

6:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 43, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base12Reorder16bitEPKhmPh) #3
  unreachable

7:                                                ; preds = %3
  %8 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 8)
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %7
  %9 = icmp ult i64 %8, %1
  br i1 %9, label %.lr.ph20, label %._crit_edge

.lr.ph:                                           ; preds = %7, %.lr.ph
  %.01618 = phi i64 [ %12, %.lr.ph ], [ 0, %7 ]
  %10 = getelementptr inbounds i8, ptr %0, i64 %.01618
  %11 = getelementptr inbounds i8, ptr %2, i64 %.01618
  tail call void @_ZN4Simd4Base13Reorder16bitXEPKhPh(ptr noundef %10, ptr noundef %11)
  %12 = add i64 %.01618, 8
  %13 = icmp ult i64 %12, %8
  br i1 %13, label %.lr.ph, label %.preheader, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph20, %.preheader
  ret void

.lr.ph20:                                         ; preds = %.preheader, %.lr.ph20
  %.019 = phi i64 [ %16, %.lr.ph20 ], [ %8, %.preheader ]
  %14 = getelementptr inbounds i8, ptr %0, i64 %.019
  %15 = getelementptr inbounds i8, ptr %2, i64 %.019
  tail call void @_ZN4Simd4Base12Reorder16bitEPKhPh(ptr noundef %14, ptr noundef %15)
  %16 = add i64 %.019, 2
  %17 = icmp ult i64 %16, %1
  br i1 %17, label %.lr.ph20, label %._crit_edge, !llvm.loop !7
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base13Reorder16bitXEPKhPh(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base12Reorder16bitEPKhPh(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass