; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::Base::SynetMergedConvolution16b" = type { %"class.Simd::SynetMergedConvolution16b", %"struct.Simd::MergConvParam", %"class.std::__cxx11::basic_string", i8, i8, i8, ptr, ptr, ptr, ptr, [2 x ptr], i64, i64, [4 x i64], %"struct.Simd::Base::SynetMergedConvolution16b::AlgParam", %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.1", [3 x %"struct.Simd::Array.1"], [3 x %"struct.Simd::Array.1"] }
%"class.Simd::SynetMergedConvolution16b" = type { %"struct.Simd::Deletable" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::MergConvParam" = type <{ [3 x %"struct.Simd::ConvParam"], i64, i32, [4 x i8] }>
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Base::SynetMergedConvolution16b::AlgParam" = type { i64, i64, i64, [3 x i64], [3 x i64], [3 x i64], [2 x i64], [3 x i64], [2 x i64] }
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZNK4Simd4Base25SynetMergedConvolution16b18InternalBufferSizeEv(ptr noundef nonnull align 8 dereferenceable(1024) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %6 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 15
  %7 = call noundef i64 @_ZNK4Simd5ArrayIhE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %6)
  %8 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 18
  %9 = call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %8)
  %10 = add i64 %7, %9
  %11 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 16
  %12 = call noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %11)
  %13 = add i64 %10, %12
  %14 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 17
  %15 = call noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %14)
  %16 = add i64 %13, %15
  store i64 %16, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %4, align 8, !tbaa !9
  br label %17

17:                                               ; preds = %36, %1
  %18 = load i64, ptr %4, align 8, !tbaa !9
  %19 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 1
  %20 = getelementptr inbounds %"struct.Simd::MergConvParam", ptr %19, i32 0, i32 1
  %21 = load i64, ptr %20, align 8, !tbaa !11
  %22 = icmp ult i64 %18, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %39

24:                                               ; preds = %17
  %25 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 19
  %26 = load i64, ptr %4, align 8, !tbaa !9
  %27 = getelementptr inbounds [3 x %"struct.Simd::Array.1"], ptr %25, i64 0, i64 %26
  %28 = call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %27)
  %29 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %5, i32 0, i32 20
  %30 = load i64, ptr %4, align 8, !tbaa !9
  %31 = getelementptr inbounds [3 x %"struct.Simd::Array.1"], ptr %29, i64 0, i64 %30
  %32 = call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %31)
  %33 = add i64 %28, %32
  %34 = load i64, ptr %3, align 8, !tbaa !9
  %35 = add i64 %34, %33
  store i64 %35, ptr %3, align 8, !tbaa !9
  br label %36

36:                                               ; preds = %24
  %37 = load i64, ptr %4, align 8, !tbaa !9
  %38 = add i64 %37, 1
  store i64 %38, ptr %4, align 8, !tbaa !9
  br label %17, !llvm.loop !24

39:                                               ; preds = %23
  %40 = load i64, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret i64 %40
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIhE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 560}
!12 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16bE", !13, i64 0, !15, i64 8, !17, i64 576, !19, i64 608, !19, i64 609, !19, i64 610, !6, i64 616, !6, i64 624, !6, i64 632, !6, i64 640, !7, i64 648, !10, i64 664, !10, i64 672, !7, i64 680, !20, i64 712, !21, i64 864, !22, i64 880, !22, i64 896, !23, i64 912, !7, i64 928, !7, i64 976}
!13 = !{!"_ZTSN4Simd25SynetMergedConvolution16bE", !14, i64 0}
!14 = !{!"_ZTSN4Simd9DeletableE"}
!15 = !{!"_ZTSN4Simd13MergConvParamE", !7, i64 0, !10, i64 552, !16, i64 560}
!16 = !{!"_ZTS8SimdBool", !7, i64 0}
!17 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !18, i64 0, !10, i64 8, !7, i64 16}
!18 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16b8AlgParamE", !10, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 48, !7, i64 72, !7, i64 96, !7, i64 112, !7, i64 136}
!21 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!22 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !10, i64 8}
!23 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array.1" = type { ptr, i64 }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK4Simd4Base25SynetMergedConvolution16b18InternalBufferSizeEv(ptr noundef nonnull align 8 dereferenceable(1024) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 864
  %3 = tail call noundef i64 @_ZNK4Simd5ArrayIhE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %2)
  %4 = getelementptr inbounds i8, ptr %0, i64 912
  %5 = tail call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %4)
  %6 = add i64 %5, %3
  %7 = getelementptr inbounds i8, ptr %0, i64 880
  %8 = tail call noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %7)
  %9 = add i64 %6, %8
  %10 = getelementptr inbounds i8, ptr %0, i64 896
  %11 = tail call noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %10)
  %12 = add i64 %9, %11
  %13 = getelementptr inbounds i8, ptr %0, i64 560
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %.not = icmp eq i64 %14, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %15 = getelementptr inbounds i8, ptr %0, i64 928
  %16 = getelementptr inbounds i8, ptr %0, i64 976
  br label %17

._crit_edge:                                      ; preds = %17, %1
  %.06.lcssa = phi i64 [ %12, %1 ], [ %23, %17 ]
  ret i64 %.06.lcssa

17:                                               ; preds = %.lr.ph, %17
  %.08 = phi i64 [ 0, %.lr.ph ], [ %24, %17 ]
  %.067 = phi i64 [ %12, %.lr.ph ], [ %23, %17 ]
  %18 = getelementptr inbounds [3 x %"struct.Simd::Array.1"], ptr %15, i64 0, i64 %.08
  %19 = tail call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %18)
  %20 = getelementptr inbounds [3 x %"struct.Simd::Array.1"], ptr %16, i64 0, i64 %.08
  %21 = tail call noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %20)
  %22 = add i64 %19, %.067
  %23 = add i64 %22, %21
  %24 = add nuw i64 %.08, 1
  %25 = load i64, ptr %13, align 8, !tbaa !5
  %26 = icmp ult i64 %24, %25
  br i1 %26, label %17, label %._crit_edge, !llvm.loop !22
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIhE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIfE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayItE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 560}
!6 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16bE", !7, i64 0, !9, i64 8, !14, i64 576, !17, i64 608, !17, i64 609, !17, i64 610, !16, i64 616, !16, i64 624, !16, i64 632, !16, i64 640, !10, i64 648, !12, i64 664, !12, i64 672, !10, i64 680, !18, i64 712, !19, i64 864, !20, i64 880, !20, i64 896, !21, i64 912, !10, i64 928, !10, i64 976}
!7 = !{!"_ZTSN4Simd25SynetMergedConvolution16bE", !8, i64 0}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd13MergConvParamE", !10, i64 0, !12, i64 552, !13, i64 560}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTS8SimdBool", !10, i64 0}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !12, i64 8, !10, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !16, i64 0}
!16 = !{!"any pointer", !10, i64 0}
!17 = !{!"bool", !10, i64 0}
!18 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16b8AlgParamE", !12, i64 0, !12, i64 8, !12, i64 16, !10, i64 24, !10, i64 48, !10, i64 72, !10, i64 96, !10, i64 112, !10, i64 136}
!19 = !{!"_ZTSN4Simd5ArrayIhEE", !16, i64 0, !12, i64 8}
!20 = !{!"_ZTSN4Simd5ArrayItEE", !16, i64 0, !12, i64 8}
!21 = !{!"_ZTSN4Simd5ArrayIfEE", !16, i64 0, !12, i64 8}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass