; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseImageSaveJpeg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::BitBuf" = type { i32, [2048 x [2 x i16]] }

@_ZN4Simd4Base10HuffmanYdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base11HuffmanUVdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base10HuffmanYacE = external dso_local constant [256 x [2 x i16]], align 16
@_ZN4Simd4Base11HuffmanUVacE = external dso_local constant [256 x [2 x i16]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196), ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196)) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196), i32 noundef) #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196)) #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base21JpegWriteBlockYuv420pERNS_18OutputMemoryStreamEiiPKhiS4_iS4_iPKfS6_Pi(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, ptr noundef %7, i32 noundef %8, ptr noundef %9, ptr noundef %10, ptr noundef %11) #2 {
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca i32, align 4
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  %26 = alloca ptr, align 8
  %27 = alloca ptr, align 8
  %28 = alloca [256 x float], align 16
  %29 = alloca [64 x float], align 16
  %30 = alloca [64 x float], align 16
  %31 = alloca i8, align 1
  %32 = alloca %"struct.Simd::Base::BitBuf", align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  store ptr %0, ptr %13, align 8, !tbaa !5
  store i32 %1, ptr %14, align 4, !tbaa !9
  store i32 %2, ptr %15, align 4, !tbaa !9
  store ptr %3, ptr %16, align 8, !tbaa !5
  store i32 %4, ptr %17, align 4, !tbaa !9
  store ptr %5, ptr %18, align 8, !tbaa !5
  store i32 %6, ptr %19, align 4, !tbaa !9
  store ptr %7, ptr %20, align 8, !tbaa !5
  store i32 %8, ptr %21, align 4, !tbaa !9
  store ptr %9, ptr %22, align 8, !tbaa !5
  store ptr %10, ptr %23, align 8, !tbaa !5
  store ptr %11, ptr %24, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #4
  %36 = load ptr, ptr %24, align 8, !tbaa !5
  %37 = getelementptr inbounds i32, ptr %36, i64 0
  store ptr %37, ptr %25, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #4
  %38 = load ptr, ptr %24, align 8, !tbaa !5
  %39 = getelementptr inbounds i32, ptr %38, i64 1
  store ptr %39, ptr %26, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #4
  %40 = load ptr, ptr %24, align 8, !tbaa !5
  %41 = getelementptr inbounds i32, ptr %40, i64 2
  store ptr %41, ptr %27, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1024, ptr %28) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr %29) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr %30) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %31) #4
  %42 = load ptr, ptr %18, align 8, !tbaa !5
  %43 = icmp eq ptr %42, null
  br i1 %43, label %47, label %44

44:                                               ; preds = %12
  %45 = load ptr, ptr %20, align 8, !tbaa !5
  %46 = icmp eq ptr %45, null
  br label %47

47:                                               ; preds = %44, %12
  %48 = phi i1 [ true, %12 ], [ %46, %44 ]
  %49 = zext i1 %48 to i8
  store i8 %49, ptr %31, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8196, ptr %32) #4
  call void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196) %32)
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #4
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %162, %47
  %51 = load i32, ptr %33, align 4, !tbaa !9
  %52 = load i32, ptr %15, align 4, !tbaa !9
  %53 = icmp slt i32 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i32 2, ptr %34, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #4
  br label %165

55:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #4
  store i32 0, ptr %35, align 4, !tbaa !9
  br label %56

56:                                               ; preds = %158, %55
  %57 = load i32, ptr %35, align 4, !tbaa !9
  %58 = load i32, ptr %14, align 4, !tbaa !9
  %59 = icmp slt i32 %57, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %56
  store i32 5, ptr %34, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #4
  br label %161

61:                                               ; preds = %56
  %62 = load ptr, ptr %16, align 8, !tbaa !5
  %63 = load i32, ptr %35, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds i8, ptr %62, i64 %64
  %66 = load i32, ptr %17, align 4, !tbaa !9
  %67 = load i32, ptr %15, align 4, !tbaa !9
  %68 = load i32, ptr %33, align 4, !tbaa !9
  %69 = sub nsw i32 %67, %68
  %70 = load i32, ptr %14, align 4, !tbaa !9
  %71 = load i32, ptr %35, align 4, !tbaa !9
  %72 = sub nsw i32 %70, %71
  %73 = getelementptr inbounds [256 x float], ptr %28, i64 0, i64 0
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %65, i32 noundef %66, i32 noundef %69, i32 noundef %72, ptr noundef %73, i32 noundef 16)
  %74 = getelementptr inbounds [256 x float], ptr %28, i64 0, i64 0
  %75 = getelementptr inbounds float, ptr %74, i64 0
  %76 = load ptr, ptr %22, align 8, !tbaa !5
  %77 = load ptr, ptr %25, align 8, !tbaa !5
  %78 = load i32, ptr %77, align 4, !tbaa !9
  %79 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %75, i32 noundef 16, ptr noundef %76, i32 noundef %78, ptr noundef @_ZN4Simd4Base10HuffmanYdcE, ptr noundef @_ZN4Simd4Base10HuffmanYacE)
  %80 = load ptr, ptr %25, align 8, !tbaa !5
  store i32 %79, ptr %80, align 4, !tbaa !9
  %81 = getelementptr inbounds [256 x float], ptr %28, i64 0, i64 0
  %82 = getelementptr inbounds float, ptr %81, i64 8
  %83 = load ptr, ptr %22, align 8, !tbaa !5
  %84 = load ptr, ptr %25, align 8, !tbaa !5
  %85 = load i32, ptr %84, align 4, !tbaa !9
  %86 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %82, i32 noundef 16, ptr noundef %83, i32 noundef %85, ptr noundef @_ZN4Simd4Base10HuffmanYdcE, ptr noundef @_ZN4Simd4Base10HuffmanYacE)
  %87 = load ptr, ptr %25, align 8, !tbaa !5
  store i32 %86, ptr %87, align 4, !tbaa !9
  %88 = getelementptr inbounds [256 x float], ptr %28, i64 0, i64 0
  %89 = getelementptr inbounds float, ptr %88, i64 128
  %90 = load ptr, ptr %22, align 8, !tbaa !5
  %91 = load ptr, ptr %25, align 8, !tbaa !5
  %92 = load i32, ptr %91, align 4, !tbaa !9
  %93 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %89, i32 noundef 16, ptr noundef %90, i32 noundef %92, ptr noundef @_ZN4Simd4Base10HuffmanYdcE, ptr noundef @_ZN4Simd4Base10HuffmanYacE)
  %94 = load ptr, ptr %25, align 8, !tbaa !5
  store i32 %93, ptr %94, align 4, !tbaa !9
  %95 = getelementptr inbounds [256 x float], ptr %28, i64 0, i64 0
  %96 = getelementptr inbounds float, ptr %95, i64 136
  %97 = load ptr, ptr %22, align 8, !tbaa !5
  %98 = load ptr, ptr %25, align 8, !tbaa !5
  %99 = load i32, ptr %98, align 4, !tbaa !9
  %100 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %96, i32 noundef 16, ptr noundef %97, i32 noundef %99, ptr noundef @_ZN4Simd4Base10HuffmanYdcE, ptr noundef @_ZN4Simd4Base10HuffmanYacE)
  %101 = load ptr, ptr %25, align 8, !tbaa !5
  store i32 %100, ptr %101, align 4, !tbaa !9
  %102 = load i8, ptr %31, align 1, !tbaa !11, !range !13, !noundef !14
  %103 = trunc i8 %102 to i1
  br i1 %103, label %104, label %105

104:                                              ; preds = %61
  call void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196) %32)
  br label %148

105:                                              ; preds = %61
  %106 = load ptr, ptr %18, align 8, !tbaa !5
  %107 = load i32, ptr %35, align 4, !tbaa !9
  %108 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %107)
  %109 = sext i32 %108 to i64
  %110 = getelementptr inbounds i8, ptr %106, i64 %109
  %111 = load i32, ptr %19, align 4, !tbaa !9
  %112 = load i32, ptr %15, align 4, !tbaa !9
  %113 = load i32, ptr %33, align 4, !tbaa !9
  %114 = sub nsw i32 %112, %113
  %115 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %114)
  %116 = load i32, ptr %14, align 4, !tbaa !9
  %117 = load i32, ptr %35, align 4, !tbaa !9
  %118 = sub nsw i32 %116, %117
  %119 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %118)
  %120 = getelementptr inbounds [64 x float], ptr %29, i64 0, i64 0
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %110, i32 noundef %111, i32 noundef %115, i32 noundef %119, ptr noundef %120, i32 noundef 8)
  %121 = load ptr, ptr %20, align 8, !tbaa !5
  %122 = load i32, ptr %35, align 4, !tbaa !9
  %123 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %122)
  %124 = sext i32 %123 to i64
  %125 = getelementptr inbounds i8, ptr %121, i64 %124
  %126 = load i32, ptr %21, align 4, !tbaa !9
  %127 = load i32, ptr %15, align 4, !tbaa !9
  %128 = load i32, ptr %33, align 4, !tbaa !9
  %129 = sub nsw i32 %127, %128
  %130 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %129)
  %131 = load i32, ptr %14, align 4, !tbaa !9
  %132 = load i32, ptr %35, align 4, !tbaa !9
  %133 = sub nsw i32 %131, %132
  %134 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %133)
  %135 = getelementptr inbounds [64 x float], ptr %30, i64 0, i64 0
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %125, i32 noundef %126, i32 noundef %130, i32 noundef %134, ptr noundef %135, i32 noundef 8)
  %136 = getelementptr inbounds [64 x float], ptr %29, i64 0, i64 0
  %137 = load ptr, ptr %23, align 8, !tbaa !5
  %138 = load ptr, ptr %26, align 8, !tbaa !5
  %139 = load i32, ptr %138, align 4, !tbaa !9
  %140 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %136, i32 noundef 8, ptr noundef %137, i32 noundef %139, ptr noundef @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef @_ZN4Simd4Base11HuffmanUVacE)
  %141 = load ptr, ptr %26, align 8, !tbaa !5
  store i32 %140, ptr %141, align 4, !tbaa !9
  %142 = getelementptr inbounds [64 x float], ptr %30, i64 0, i64 0
  %143 = load ptr, ptr %23, align 8, !tbaa !5
  %144 = load ptr, ptr %27, align 8, !tbaa !5
  %145 = load i32, ptr %144, align 4, !tbaa !9
  %146 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %32, ptr noundef %142, i32 noundef 8, ptr noundef %143, i32 noundef %145, ptr noundef @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef @_ZN4Simd4Base11HuffmanUVacE)
  %147 = load ptr, ptr %27, align 8, !tbaa !5
  store i32 %146, ptr %147, align 4, !tbaa !9
  br label %148

148:                                              ; preds = %105, %104
  %149 = call noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196) %32, i32 noundef 1024)
  br i1 %149, label %150, label %157

150:                                              ; preds = %148
  %151 = load ptr, ptr %13, align 8, !tbaa !5
  %152 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %32, i32 0, i32 1
  %153 = getelementptr inbounds [2048 x [2 x i16]], ptr %152, i64 0, i64 0
  %154 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %32, i32 0, i32 0
  %155 = load i32, ptr %154, align 4, !tbaa !15
  %156 = zext i32 %155 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %151, ptr noundef %153, i64 noundef %156)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %32)
  br label %157

157:                                              ; preds = %150, %148
  br label %158

158:                                              ; preds = %157
  %159 = load i32, ptr %35, align 4, !tbaa !9
  %160 = add nsw i32 %159, 16
  store i32 %160, ptr %35, align 4, !tbaa !9
  br label %56, !llvm.loop !17

161:                                              ; preds = %60
  br label %162

162:                                              ; preds = %161
  %163 = load i32, ptr %33, align 4, !tbaa !9
  %164 = add nsw i32 %163, 16
  store i32 %164, ptr %33, align 4, !tbaa !9
  br label %50, !llvm.loop !19

165:                                              ; preds = %54
  %166 = load ptr, ptr %13, align 8, !tbaa !5
  %167 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %32, i32 0, i32 1
  %168 = getelementptr inbounds [2048 x [2 x i16]], ptr %167, i64 0, i64 0
  %169 = getelementptr inbounds %"struct.Simd::Base::BitBuf", ptr %32, i32 0, i32 0
  %170 = load i32, ptr %169, align 4, !tbaa !15
  %171 = zext i32 %170 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %166, ptr noundef %168, i64 noundef %171)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %32)
  call void @llvm.lifetime.end.p0(i64 8196, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 1024, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !10, i64 0}
!16 = !{!"_ZTSN4Simd4Base6BitBufE", !10, i64 0, !7, i64 4}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::BitBuf" = type { i32, [2048 x [2 x i16]] }

@_ZN4Simd4Base10HuffmanYdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base11HuffmanUVdcE = external dso_local constant <{ [12 x [2 x i16]], [244 x [2 x i16]] }>, align 16
@_ZN4Simd4Base10HuffmanYacE = external dso_local constant [256 x [2 x i16]], align 16
@_ZN4Simd4Base11HuffmanUVacE = external dso_local constant [256 x [2 x i16]], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196)) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196), ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196)) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196)) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base21JpegWriteBlockYuv420pERNS_18OutputMemoryStreamEiiPKhiS4_iS4_iPKfS6_Pi(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, ptr noundef %7, i32 noundef %8, ptr noundef %9, ptr noundef %10, ptr nocapture noundef %11) local_unnamed_addr #2 {
  %13 = alloca [256 x float], align 16
  %14 = alloca [64 x float], align 16
  %15 = alloca [64 x float], align 16
  %16 = alloca %"struct.Simd::Base::BitBuf", align 4
  %17 = getelementptr inbounds i8, ptr %11, i64 4
  %18 = getelementptr inbounds i8, ptr %11, i64 8
  call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %13) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %14) #4
  call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %15) #4
  %19 = icmp eq ptr %5, null
  %20 = icmp eq ptr %7, null
  %21 = or i1 %19, %20
  call void @llvm.lifetime.start.p0(i64 8196, ptr nonnull %16) #4
  call void @_ZN4Simd4Base6BitBufC2Ev(ptr noundef nonnull align 4 dereferenceable(8196) %16)
  %22 = icmp sgt i32 %2, 0
  br i1 %22, label %.preheader.lr.ph, label %._crit_edge59

.preheader.lr.ph:                                 ; preds = %12
  %23 = icmp sgt i32 %1, 0
  %24 = getelementptr inbounds i8, ptr %13, i64 32
  %25 = getelementptr inbounds i8, ptr %13, i64 512
  %26 = getelementptr inbounds i8, ptr %13, i64 544
  %27 = getelementptr inbounds i8, ptr %16, i64 4
  br i1 %23, label %.preheader.us, label %._crit_edge59

.preheader.us:                                    ; preds = %.preheader.lr.ph, %._crit_edge.us
  %.05258.us = phi i32 [ %63, %._crit_edge.us ], [ 0, %.preheader.lr.ph ]
  %28 = sub nsw i32 %2, %.05258.us
  br label %29

29:                                               ; preds = %.preheader.us, %60
  %indvars.iv = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next, %60 ]
  %30 = getelementptr inbounds i8, ptr %3, i64 %indvars.iv
  %31 = trunc i64 %indvars.iv to i32
  %32 = sub i32 %1, %31
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %30, i32 noundef %4, i32 noundef %28, i32 noundef %32, ptr noundef nonnull %13, i32 noundef 16)
  %33 = load i32, ptr %11, align 4, !tbaa !5
  %34 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %13, i32 noundef 16, ptr noundef %9, i32 noundef %33, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %34, ptr %11, align 4, !tbaa !5
  %35 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %24, i32 noundef 16, ptr noundef %9, i32 noundef %34, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %35, ptr %11, align 4, !tbaa !5
  %36 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %25, i32 noundef 16, ptr noundef %9, i32 noundef %35, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %36, ptr %11, align 4, !tbaa !5
  %37 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %26, i32 noundef 16, ptr noundef %9, i32 noundef %36, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYdcE, ptr noundef nonnull @_ZN4Simd4Base10HuffmanYacE)
  store i32 %37, ptr %11, align 4, !tbaa !5
  br i1 %21, label %54, label %38

38:                                               ; preds = %29
  %39 = trunc nuw nsw i64 %indvars.iv to i32
  %40 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %39)
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds i8, ptr %5, i64 %41
  %43 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %28)
  %44 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %32)
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %42, i32 noundef %6, i32 noundef %43, i32 noundef %44, ptr noundef nonnull %14, i32 noundef 8)
  %45 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %39)
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds i8, ptr %7, i64 %46
  %48 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %28)
  %49 = call noundef i32 @_ZN4Simd4Base6UvSizeEi(i32 noundef %32)
  call void @_ZN4Simd4Base7GrayToYEPKhiiiPfi(ptr noundef %47, i32 noundef %8, i32 noundef %48, i32 noundef %49, ptr noundef nonnull %15, i32 noundef 8)
  %50 = load i32, ptr %17, align 4, !tbaa !5
  %51 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %14, i32 noundef 8, ptr noundef %10, i32 noundef %50, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVacE)
  store i32 %51, ptr %17, align 4, !tbaa !5
  %52 = load i32, ptr %18, align 4, !tbaa !5
  %53 = call noundef i32 @_ZN4Simd4BaseL13JpegProcessDuERNS0_6BitBufEPfiPKfiPA2_KtS8_(ptr noundef nonnull align 4 dereferenceable(8196) %16, ptr noundef nonnull %15, i32 noundef 8, ptr noundef %10, i32 noundef %52, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVdcE, ptr noundef nonnull @_ZN4Simd4Base11HuffmanUVacE)
  store i32 %53, ptr %18, align 4, !tbaa !5
  br label %55

54:                                               ; preds = %29
  call void @_ZN4Simd4Base19JpegProcessDuGrayUvERNS0_6BitBufE(ptr noundef nonnull align 4 dereferenceable(8196) %16)
  br label %55

55:                                               ; preds = %54, %38
  %56 = call noundef zeroext i1 @_ZNK4Simd4Base6BitBuf4FullEj(ptr noundef nonnull align 4 dereferenceable(8196) %16, i32 noundef 1024)
  br i1 %56, label %57, label %60

57:                                               ; preds = %55
  %58 = load i32, ptr %16, align 4, !tbaa !9
  %59 = zext i32 %58 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull %27, i64 noundef %59)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %16)
  br label %60

60:                                               ; preds = %57, %55
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 16
  %61 = trunc nuw i64 %indvars.iv.next to i32
  %62 = icmp slt i32 %61, %1
  br i1 %62, label %29, label %._crit_edge.us, !llvm.loop !11

._crit_edge.us:                                   ; preds = %60
  %63 = add nuw nsw i32 %.05258.us, 16
  %64 = icmp slt i32 %63, %2
  br i1 %64, label %.preheader.us, label %._crit_edge59, !llvm.loop !13

._crit_edge59:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %12
  %65 = getelementptr inbounds i8, ptr %16, i64 4
  %66 = load i32, ptr %16, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  call void @_ZN4Simd4Base9WriteBitsERNS_18OutputMemoryStreamEPA2_Ktm(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull %65, i64 noundef %67)
  call void @_ZN4Simd4Base6BitBuf5ClearEv(ptr noundef nonnull align 4 dereferenceable(8196) %16)
  call void @llvm.lifetime.end.p0(i64 8196, ptr nonnull %16) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %15) #4
  call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %14) #4
  call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %13) #4
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN4Simd4Base6BitBufE", !6, i64 0, !7, i64 4}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass