; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_alu_mem.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_mem(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca [3 x i32], align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 2, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %13) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 @__const.test_alu_mem.displ, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %15, ptr noundef %16)
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %63, %4
  %18 = load i32, ptr %9, align 4, !tbaa !9
  %19 = icmp ult i32 %18, 16
  br i1 %19, label %20, label %66

20:                                               ; preds = %17
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %59, %20
  %22 = load i32, ptr %11, align 4, !tbaa !9
  %23 = icmp ult i32 %22, 3
  br i1 %23, label %24, label %62

24:                                               ; preds = %21
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %55, %24
  %26 = load i32, ptr %14, align 4, !tbaa !9
  %27 = icmp ult i32 %26, 16
  br i1 %27, label %28, label %58

28:                                               ; preds = %25
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = and i32 %29, 1
  %31 = icmp eq i32 %30, 1
  br i1 %31, label %32, label %41

32:                                               ; preds = %28
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = load i32, ptr %11, align 4, !tbaa !9
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %37
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %33, i32 noundef %34, i32 noundef %35, i32 noundef 127, i32 noundef 0, i32 noundef %39, i32 noundef %40, i32 noundef 0)
  br label %41

41:                                               ; preds = %32, %28
  %42 = load i32, ptr %8, align 4, !tbaa !9
  %43 = and i32 %42, 2
  %44 = icmp eq i32 %43, 2
  br i1 %44, label %45, label %54

45:                                               ; preds = %41
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !9
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = load i32, ptr %11, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %46, i32 noundef %47, i32 noundef %48, i32 noundef 127, i32 noundef 0, i32 noundef %52, i32 noundef %53, i32 noundef 1)
  br label %54

54:                                               ; preds = %45, %41
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %14, align 4, !tbaa !9
  %57 = add i32 %56, 1
  store i32 %57, ptr %14, align 4, !tbaa !9
  br label %25, !llvm.loop !11

58:                                               ; preds = %25
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = add i32 %60, 1
  store i32 %61, ptr %11, align 4, !tbaa !9
  br label %21, !llvm.loop !13

62:                                               ; preds = %21
  br label %63

63:                                               ; preds = %62
  %64 = load i32, ptr %9, align 4, !tbaa !9
  %65 = add i32 %64, 1
  store i32 %65, ptr %9, align 4, !tbaa !9
  br label %17, !llvm.loop !14

66:                                               ; preds = %17
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %67

67:                                               ; preds = %125, %66
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = icmp ult i32 %68, 16
  br i1 %69, label %70, label %128

70:                                               ; preds = %67
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %121, %70
  %72 = load i32, ptr %10, align 4, !tbaa !9
  %73 = icmp ult i32 %72, 16
  br i1 %73, label %74, label %124

74:                                               ; preds = %71
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %117, %74
  %76 = load i32, ptr %11, align 4, !tbaa !9
  %77 = icmp ult i32 %76, 3
  br i1 %77, label %78, label %120

78:                                               ; preds = %75
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %79

79:                                               ; preds = %113, %78
  %80 = load i32, ptr %14, align 4, !tbaa !9
  %81 = icmp ult i32 %80, 16
  br i1 %81, label %82, label %116

82:                                               ; preds = %79
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = and i32 %83, 1
  %85 = icmp eq i32 %84, 1
  br i1 %85, label %86, label %97

86:                                               ; preds = %82
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = load i32, ptr %7, align 4, !tbaa !9
  %89 = load i32, ptr %9, align 4, !tbaa !9
  %90 = load i32, ptr %10, align 4, !tbaa !9
  %91 = load i32, ptr %12, align 4, !tbaa !9
  %92 = load i32, ptr %11, align 4, !tbaa !9
  %93 = zext i32 %92 to i64
  %94 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %93
  %95 = load i32, ptr %94, align 4, !tbaa !9
  %96 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %87, i32 noundef %88, i32 noundef %89, i32 noundef %90, i32 noundef %91, i32 noundef %95, i32 noundef %96, i32 noundef 0)
  br label %97

97:                                               ; preds = %86, %82
  %98 = load i32, ptr %8, align 4, !tbaa !9
  %99 = and i32 %98, 2
  %100 = icmp eq i32 %99, 2
  br i1 %100, label %101, label %112

101:                                              ; preds = %97
  %102 = load ptr, ptr %6, align 8, !tbaa !5
  %103 = load i32, ptr %7, align 4, !tbaa !9
  %104 = load i32, ptr %9, align 4, !tbaa !9
  %105 = load i32, ptr %10, align 4, !tbaa !9
  %106 = load i32, ptr %12, align 4, !tbaa !9
  %107 = load i32, ptr %11, align 4, !tbaa !9
  %108 = zext i32 %107 to i64
  %109 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %108
  %110 = load i32, ptr %109, align 4, !tbaa !9
  %111 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_mem(ptr noundef %102, i32 noundef %103, i32 noundef %104, i32 noundef %105, i32 noundef %106, i32 noundef %110, i32 noundef %111, i32 noundef 1)
  br label %112

112:                                              ; preds = %101, %97
  br label %113

113:                                              ; preds = %112
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = add i32 %114, 1
  store i32 %115, ptr %14, align 4, !tbaa !9
  br label %79, !llvm.loop !15

116:                                              ; preds = %79
  br label %117

117:                                              ; preds = %116
  %118 = load i32, ptr %11, align 4, !tbaa !9
  %119 = add i32 %118, 1
  store i32 %119, ptr %11, align 4, !tbaa !9
  br label %75, !llvm.loop !16

120:                                              ; preds = %75
  br label %121

121:                                              ; preds = %120
  %122 = load i32, ptr %10, align 4, !tbaa !9
  %123 = add i32 %122, 1
  store i32 %123, ptr %10, align 4, !tbaa !9
  br label %71, !llvm.loop !17

124:                                              ; preds = %71
  br label %125

125:                                              ; preds = %124
  %126 = load i32, ptr %9, align 4, !tbaa !9
  %127 = add i32 %126, 1
  store i32 %127, ptr %9, align 4, !tbaa !9
  br label %67, !llvm.loop !18

128:                                              ; preds = %67
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %129, ptr noundef %130)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_alu_mem.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_mem(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %5 = and i32 %3, 1
  %.not51 = icmp eq i32 %5, 0
  %6 = and i32 %3, 2
  %.not52 = icmp eq i32 %6, 0
  br i1 %.not51, label %.split.us, label %.split

.split.us:                                        ; preds = %4
  br i1 %.not52, label %.split107.us, label %.preheader57.us

.preheader57.us:                                  ; preds = %.split.us, %.split65.us.split.us72
  %.04568.us = phi i32 [ %9, %.split65.us.split.us72 ], [ 0, %.split.us ]
  br label %.preheader56.us.us70

.preheader56.us.us70:                             ; preds = %.preheader57.us, %.preheader56.us.us70
  %indvars.iv124 = phi i64 [ 0, %.preheader57.us ], [ %indvars.iv.next125, %.preheader56.us.us70 ]
  %7 = getelementptr inbounds [3 x i32], ptr @__const.test_alu_mem.displ, i64 0, i64 %indvars.iv124
  %8 = load i32, ptr %7, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 0, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 1, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 2, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 3, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 4, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 5, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 6, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 7, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 8, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 9, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 10, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 11, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 12, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 13, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 14, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us, i32 noundef 127, i32 noundef 0, i32 noundef %8, i32 noundef 15, i32 noundef 1) #2
  %indvars.iv.next125 = add nuw nsw i64 %indvars.iv124, 1
  %exitcond127.not = icmp eq i64 %indvars.iv.next125, 3
  br i1 %exitcond127.not, label %.split65.us.split.us72, label %.preheader56.us.us70, !llvm.loop !9

.split65.us.split.us72:                           ; preds = %.preheader56.us.us70
  %9 = add nuw nsw i32 %.04568.us, 1
  %exitcond128.not = icmp eq i32 %9, 16
  br i1 %exitcond128.not, label %.preheader55, label %.preheader57.us, !llvm.loop !11

.split:                                           ; preds = %4
  br i1 %.not52, label %.preheader57.us75, label %.preheader57.preheader

.preheader57.preheader:                           ; preds = %.split
  %.pre = load i32, ptr @__const.test_alu_mem.displ, align 4, !tbaa !5
  %10 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_alu_mem.displ, i64 4), align 4
  %11 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_alu_mem.displ, i64 8), align 4
  br label %.preheader57

.preheader57.us75:                                ; preds = %.split, %.split65.split.us.us
  %.04568.us76 = phi i32 [ %14, %.split65.split.us.us ], [ 0, %.split ]
  br label %.preheader56.us66.us

.preheader56.us66.us:                             ; preds = %.preheader56.us66.us, %.preheader57.us75
  %indvars.iv = phi i64 [ %indvars.iv.next, %.preheader56.us66.us ], [ 0, %.preheader57.us75 ]
  %12 = getelementptr inbounds [3 x i32], ptr @__const.test_alu_mem.displ, i64 0, i64 %indvars.iv
  %13 = load i32, ptr %12, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 0, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 2, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 3, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 4, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 5, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 6, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 8, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 9, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 10, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 11, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 12, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 13, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 14, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568.us76, i32 noundef 127, i32 noundef 0, i32 noundef %13, i32 noundef 15, i32 noundef 0) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond121.not = icmp eq i64 %indvars.iv.next, 3
  br i1 %exitcond121.not, label %.split65.split.us.us, label %.preheader56.us66.us, !llvm.loop !9

.split65.split.us.us:                             ; preds = %.preheader56.us66.us
  %14 = add nuw nsw i32 %.04568.us76, 1
  %exitcond122.not = icmp eq i32 %14, 16
  br i1 %exitcond122.not, label %.preheader55, label %.preheader57.us75, !llvm.loop !11

.preheader57:                                     ; preds = %.preheader57.preheader, %.split.split.2
  %.04568 = phi i32 [ %29, %.split.split.2 ], [ 0, %.preheader57.preheader ]
  br label %25

.preheader55:                                     ; preds = %.split.split.2, %.split65.split.us.us, %.split65.us.split.us72
  br i1 %.not51, label %.preheader55.split101.us, label %.preheader55.split101

.preheader55.split101.us:                         ; preds = %.preheader55
  br i1 %.not52, label %.split107.us, label %.preheader54.us

.preheader54.us:                                  ; preds = %.preheader55.split101.us, %.split96.us.split.us104
  %.14699.us = phi i32 [ %18, %.split96.us.split.us104 ], [ 0, %.preheader55.split101.us ]
  br label %.preheader53.us.us102

.preheader53.us.us102:                            ; preds = %.preheader54.us, %.split86.us.split.us93.us
  %.04989.us.us103 = phi i32 [ 0, %.preheader54.us ], [ %17, %.split86.us.split.us93.us ]
  br label %.preheader.us.us91.us

.preheader.us.us91.us:                            ; preds = %.preheader.us.us91.us, %.preheader53.us.us102
  %indvars.iv144 = phi i64 [ %indvars.iv.next145, %.preheader.us.us91.us ], [ 0, %.preheader53.us.us102 ]
  %15 = getelementptr inbounds [3 x i32], ptr @__const.test_alu_mem.displ, i64 0, i64 %indvars.iv144
  %16 = load i32, ptr %15, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 0, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 1, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 2, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 3, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 4, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 5, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 6, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 7, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 8, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 9, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 10, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 11, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 12, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 13, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 14, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us, i32 noundef %.04989.us.us103, i32 noundef 2, i32 noundef %16, i32 noundef 15, i32 noundef 1) #2
  %indvars.iv.next145 = add nuw nsw i64 %indvars.iv144, 1
  %exitcond147.not = icmp eq i64 %indvars.iv.next145, 3
  br i1 %exitcond147.not, label %.split86.us.split.us93.us, label %.preheader.us.us91.us, !llvm.loop !12

.split86.us.split.us93.us:                        ; preds = %.preheader.us.us91.us
  %17 = add nuw nsw i32 %.04989.us.us103, 1
  %exitcond148.not = icmp eq i32 %17, 16
  br i1 %exitcond148.not, label %.split96.us.split.us104, label %.preheader53.us.us102, !llvm.loop !13

.split96.us.split.us104:                          ; preds = %.split86.us.split.us93.us
  %18 = add nuw nsw i32 %.14699.us, 1
  %exitcond149.not = icmp eq i32 %18, 16
  br i1 %exitcond149.not, label %.split107.us, label %.preheader54.us, !llvm.loop !14

.preheader55.split101:                            ; preds = %.preheader55
  br i1 %.not52, label %.preheader54.us108, label %.preheader54.preheader

.preheader54.preheader:                           ; preds = %.preheader55.split101
  %.pre150.pre = load i32, ptr @__const.test_alu_mem.displ, align 4, !tbaa !5
  %19 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_alu_mem.displ, i64 4), align 4
  %20 = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_alu_mem.displ, i64 8), align 4
  br label %.preheader54

.preheader54.us108:                               ; preds = %.preheader55.split101, %.split96.split.us.us
  %.14699.us109 = phi i32 [ %24, %.split96.split.us.us ], [ 0, %.preheader55.split101 ]
  br label %.preheader53.us97.us

.preheader53.us97.us:                             ; preds = %.split86.split.us.us.us, %.preheader54.us108
  %.04989.us98.us = phi i32 [ 0, %.preheader54.us108 ], [ %23, %.split86.split.us.us.us ]
  br label %.preheader.us87.us.us

.preheader.us87.us.us:                            ; preds = %.preheader.us87.us.us, %.preheader53.us97.us
  %indvars.iv137 = phi i64 [ %indvars.iv.next138, %.preheader.us87.us.us ], [ 0, %.preheader53.us97.us ]
  %21 = getelementptr inbounds [3 x i32], ptr @__const.test_alu_mem.displ, i64 0, i64 %indvars.iv137
  %22 = load i32, ptr %21, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 0, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 2, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 3, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 4, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 5, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 6, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 8, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 9, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 10, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 11, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 12, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 13, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 14, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699.us109, i32 noundef %.04989.us98.us, i32 noundef 2, i32 noundef %22, i32 noundef 15, i32 noundef 0) #2
  %indvars.iv.next138 = add nuw nsw i64 %indvars.iv137, 1
  %exitcond140.not = icmp eq i64 %indvars.iv.next138, 3
  br i1 %exitcond140.not, label %.split86.split.us.us.us, label %.preheader.us87.us.us, !llvm.loop !12

.split86.split.us.us.us:                          ; preds = %.preheader.us87.us.us
  %23 = add nuw nsw i32 %.04989.us98.us, 1
  %exitcond141.not = icmp eq i32 %23, 16
  br i1 %exitcond141.not, label %.split96.split.us.us, label %.preheader53.us97.us, !llvm.loop !13

.split96.split.us.us:                             ; preds = %.split86.split.us.us.us
  %24 = add nuw nsw i32 %.14699.us109, 1
  %exitcond142.not = icmp eq i32 %24, 16
  br i1 %exitcond142.not, label %.split107.us, label %.preheader54.us108, !llvm.loop !14

25:                                               ; preds = %.preheader57, %25
  %.058 = phi i32 [ 0, %.preheader57 ], [ %26, %25 ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %.pre, i32 noundef %.058, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %.pre, i32 noundef %.058, i32 noundef 1) #2
  %26 = add nuw nsw i32 %.058, 1
  %exitcond.not = icmp eq i32 %26, 16
  br i1 %exitcond.not, label %.split.split, label %25, !llvm.loop !15

.split.split:                                     ; preds = %25, %.split.split
  %.058.1 = phi i32 [ %27, %.split.split ], [ 0, %25 ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %10, i32 noundef %.058.1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %10, i32 noundef %.058.1, i32 noundef 1) #2
  %27 = add nuw nsw i32 %.058.1, 1
  %exitcond.1.not = icmp eq i32 %27, 16
  br i1 %exitcond.1.not, label %.split.split.1, label %.split.split, !llvm.loop !15

.split.split.1:                                   ; preds = %.split.split, %.split.split.1
  %.058.2 = phi i32 [ %28, %.split.split.1 ], [ 0, %.split.split ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %11, i32 noundef %.058.2, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.04568, i32 noundef 127, i32 noundef 0, i32 noundef %11, i32 noundef %.058.2, i32 noundef 1) #2
  %28 = add nuw nsw i32 %.058.2, 1
  %exitcond.2.not = icmp eq i32 %28, 16
  br i1 %exitcond.2.not, label %.split.split.2, label %.split.split.1, !llvm.loop !15

.split.split.2:                                   ; preds = %.split.split.1
  %29 = add nuw nsw i32 %.04568, 1
  %exitcond118.not = icmp eq i32 %29, 16
  br i1 %exitcond118.not, label %.preheader55, label %.preheader57, !llvm.loop !11

.preheader54:                                     ; preds = %.preheader54.preheader, %.split96.split
  %.14699 = phi i32 [ %35, %.split96.split ], [ 0, %.preheader54.preheader ]
  br label %.preheader53

.preheader53:                                     ; preds = %.preheader54, %.split79.split.2
  %.04989 = phi i32 [ 0, %.preheader54 ], [ %34, %.split79.split.2 ]
  br label %30

30:                                               ; preds = %.preheader53, %30
  %.177 = phi i32 [ 0, %.preheader53 ], [ %31, %30 ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %.pre150.pre, i32 noundef %.177, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %.pre150.pre, i32 noundef %.177, i32 noundef 1) #2
  %31 = add nuw nsw i32 %.177, 1
  %exitcond129.not = icmp eq i32 %31, 16
  br i1 %exitcond129.not, label %.split79.split, label %30, !llvm.loop !16

.split79.split:                                   ; preds = %30, %.split79.split
  %.177.1 = phi i32 [ %32, %.split79.split ], [ 0, %30 ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %19, i32 noundef %.177.1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %19, i32 noundef %.177.1, i32 noundef 1) #2
  %32 = add nuw nsw i32 %.177.1, 1
  %exitcond129.1.not = icmp eq i32 %32, 16
  br i1 %exitcond129.1.not, label %.split79.split.1, label %.split79.split, !llvm.loop !16

.split79.split.1:                                 ; preds = %.split79.split, %.split79.split.1
  %.177.2 = phi i32 [ %33, %.split79.split.1 ], [ 0, %.split79.split ]
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %20, i32 noundef %.177.2, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_mem(ptr noundef %1, i32 noundef %2, i32 noundef %.14699, i32 noundef %.04989, i32 noundef 2, i32 noundef %20, i32 noundef %.177.2, i32 noundef 1) #2
  %33 = add nuw nsw i32 %.177.2, 1
  %exitcond129.2.not = icmp eq i32 %33, 16
  br i1 %exitcond129.2.not, label %.split79.split.2, label %.split79.split.1, !llvm.loop !16

.split79.split.2:                                 ; preds = %.split79.split.1
  %34 = add nuw nsw i32 %.04989, 1
  %exitcond134.not = icmp eq i32 %34, 16
  br i1 %exitcond134.not, label %.split96.split, label %.preheader53, !llvm.loop !13

.split96.split:                                   ; preds = %.split79.split.2
  %35 = add nuw nsw i32 %.14699, 1
  %exitcond135.not = icmp eq i32 %35, 16
  br i1 %exitcond135.not, label %.split107.us, label %.preheader54, !llvm.loop !14

.split107.us:                                     ; preds = %.split96.split, %.split96.split.us.us, %.split96.us.split.us104, %.split.us, %.preheader55.split101.us
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_x86_instruction_alu_mem(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass