; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution32fNhwcGrouped)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution32f" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", float, float, ptr, ptr, ptr, %"struct.Simd::Runtime", %"struct.Simd::Runtime.3", %"struct.Simd::Array", ptr, ptr, ptr, %"class.std::__cxx11::basic_string" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Runtime" = type { ptr, %"class.std::vector", %"class.std::__cxx11::basic_string" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmFunc, Simd::GemmArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Runtime.3" = type { ptr, %"class.std::vector.4", %"class.std::__cxx11::basic_string" }
%"class.std::vector.4" = type { %"struct.std::_Vector_base.5" }
%"struct.std::_Vector_base.5" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl" = type { %"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate, std::allocator<Simd::Runtime<Simd::GemmCbFunc, Simd::GemmCbArgs>::Candidate>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2" = type { %"class.Simd::SynetConvolution32f", i64, i64, i64, %"struct.Simd::Array", %"struct.Simd::Array", ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base38SynetConvolution32fNhwcGroupedBlock1x29SetParamsEPKfP8SimdBoolS3_S3_(ptr noundef nonnull align 8 dereferenceable(504) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) unnamed_addr #0 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  %17 = load ptr, ptr %6, align 8
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  %21 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_ZN4Simd19SynetConvolution32f9SetParamsEPKfP8SimdBoolS2_S2_(ptr noundef nonnull align 8 dereferenceable(440) %17, ptr noundef %18, ptr noundef %19, ptr noundef %20, ptr noundef %21)
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %22 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %17, i32 0, i32 1
  store ptr %22, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %23, i32 0, i32 10
  %25 = load i64, ptr %24, align 8, !tbaa !9
  %26 = load ptr, ptr %11, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %26, i32 0, i32 11
  %28 = load i64, ptr %27, align 8, !tbaa !15
  %29 = mul i64 %25, %28
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %30, i32 0, i32 0
  %32 = load i64, ptr %31, align 8, !tbaa !16
  %33 = mul i64 %29, %32
  store i64 %33, ptr %12, align 8, !tbaa !17
  %34 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2", ptr %17, i32 0, i32 4
  %35 = load i64, ptr %12, align 8, !tbaa !17
  %36 = mul i64 %35, 2
  call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %34, i64 noundef %36, i1 noundef zeroext false, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %37 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %17, i32 0, i32 5
  %38 = load ptr, ptr %37, align 8, !tbaa !18
  store ptr %38, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %39 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2", ptr %17, i32 0, i32 4
  %40 = getelementptr inbounds %"struct.Simd::Array", ptr %39, i32 0, i32 0
  %41 = load ptr, ptr %40, align 8, !tbaa !38
  store ptr %41, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %42 = load ptr, ptr %14, align 8, !tbaa !5
  %43 = load i64, ptr %12, align 8, !tbaa !17
  %44 = getelementptr inbounds float, ptr %42, i64 %43
  store ptr %44, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  store i64 0, ptr %16, align 8, !tbaa !17
  br label %45

45:                                               ; preds = %65, %5
  %46 = load i64, ptr %16, align 8, !tbaa !17
  %47 = load i64, ptr %12, align 8, !tbaa !17
  %48 = icmp ult i64 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  br label %68

50:                                               ; preds = %45
  %51 = load ptr, ptr %13, align 8, !tbaa !5
  %52 = getelementptr inbounds float, ptr %51, i64 0
  %53 = load float, ptr %52, align 4, !tbaa !40
  %54 = load ptr, ptr %14, align 8, !tbaa !5
  %55 = load i64, ptr %16, align 8, !tbaa !17
  %56 = getelementptr inbounds float, ptr %54, i64 %55
  store float %53, ptr %56, align 4, !tbaa !40
  %57 = load ptr, ptr %13, align 8, !tbaa !5
  %58 = getelementptr inbounds float, ptr %57, i64 1
  %59 = load float, ptr %58, align 4, !tbaa !40
  %60 = load ptr, ptr %15, align 8, !tbaa !5
  %61 = load i64, ptr %16, align 8, !tbaa !17
  %62 = getelementptr inbounds float, ptr %60, i64 %61
  store float %59, ptr %62, align 4, !tbaa !40
  %63 = load ptr, ptr %13, align 8, !tbaa !5
  %64 = getelementptr inbounds float, ptr %63, i64 2
  store ptr %64, ptr %13, align 8, !tbaa !5
  br label %65

65:                                               ; preds = %50
  %66 = load i64, ptr %16, align 8, !tbaa !17
  %67 = add i64 %66, 1
  store i64 %67, ptr %16, align 8, !tbaa !17
  br label %45, !llvm.loop !41

68:                                               ; preds = %49
  %69 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2", ptr %17, i32 0, i32 4
  %70 = getelementptr inbounds %"struct.Simd::Array", ptr %69, i32 0, i32 0
  %71 = load ptr, ptr %70, align 8, !tbaa !38
  %72 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %17, i32 0, i32 5
  store ptr %71, ptr %72, align 8, !tbaa !18
  %73 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %17, i32 0, i32 6
  %74 = load ptr, ptr %73, align 8, !tbaa !43
  %75 = icmp eq ptr %74, null
  br i1 %75, label %76, label %85

76:                                               ; preds = %68
  %77 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2", ptr %17, i32 0, i32 5
  %78 = load ptr, ptr %11, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %78, i32 0, i32 5
  %80 = load i64, ptr %79, align 8, !tbaa !44
  call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %77, i64 noundef %80, i1 noundef zeroext true, i64 noundef 8)
  %81 = getelementptr inbounds %"class.Simd::Base::SynetConvolution32fNhwcGroupedBlock1x2", ptr %17, i32 0, i32 5
  %82 = getelementptr inbounds %"struct.Simd::Array", ptr %81, i32 0, i32 0
  %83 = load ptr, ptr %82, align 8, !tbaa !45
  %84 = getelementptr inbounds %"class.Simd::SynetConvolution32f", ptr %17, i32 0, i32 6
  store ptr %83, ptr %84, align 8, !tbaa !43
  br label %85

85:                                               ; preds = %76, %68
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32f9SetParamsEPKfP8SimdBoolS2_S2_(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef, ptr noundef, ptr noundef, ptr noundef) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 64}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !13, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !14, i64 152}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!14 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!15 = !{!10, !11, i64 72}
!16 = !{!10, !11, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!19, !6, i64 216}
!19 = !{!"_ZTSN4Simd19SynetConvolution32fE", !20, i64 0, !21, i64 8, !24, i64 192, !25, i64 208, !25, i64 212, !6, i64 216, !6, i64 224, !6, i64 232, !26, i64 240, !33, i64 304, !24, i64 368, !6, i64 384, !6, i64 392, !6, i64 400, !31, i64 408}
!20 = !{!"_ZTSN4Simd9DeletableE"}
!21 = !{!"_ZTSN4Simd9ConvParamE", !10, i64 0, !22, i64 160, !11, i64 168, !23, i64 176}
!22 = !{!"_ZTS8SimdBool", !7, i64 0}
!23 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!24 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !11, i64 8}
!25 = !{!"float", !7, i64 0}
!26 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !6, i64 0, !27, i64 8, !31, i64 32}
!27 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !32, i64 0, !11, i64 8, !7, i64 16}
!32 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!33 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !6, i64 0, !34, i64 8, !31, i64 32}
!34 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !35, i64 0}
!35 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!38 = !{!39, !6, i64 464}
!39 = !{!"_ZTSN4Simd4Base38SynetConvolution32fNhwcGroupedBlock1x2E", !19, i64 0, !11, i64 440, !11, i64 448, !11, i64 456, !24, i64 464, !24, i64 480, !6, i64 496}
!40 = !{!25, !25, i64 0}
!41 = distinct !{!41, !42}
!42 = !{!"llvm.loop.mustprogress"}
!43 = !{!19, !6, i64 224}
!44 = !{!10, !11, i64 32}
!45 = !{!39, !6, i64 480}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base38SynetConvolution32fNhwcGroupedBlock1x29SetParamsEPKfP8SimdBoolS3_S3_(ptr noundef nonnull align 8 dereferenceable(504) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) unnamed_addr #0 align 2 {
  tail call void @_ZN4Simd19SynetConvolution32f9SetParamsEPKfP8SimdBoolS2_S2_(ptr noundef nonnull align 8 dereferenceable(440) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4)
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = getelementptr inbounds i8, ptr %0, i64 72
  %8 = load i64, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 80
  %10 = load i64, ptr %9, align 8, !tbaa !13
  %11 = mul i64 %10, %8
  %12 = load i64, ptr %6, align 8, !tbaa !14
  %13 = mul i64 %11, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 464
  %15 = shl i64 %13, 1
  tail call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %14, i64 noundef %15, i1 noundef zeroext false, i64 noundef 8)
  %16 = getelementptr inbounds i8, ptr %0, i64 216
  %17 = load ptr, ptr %14, align 8, !tbaa !15
  %18 = getelementptr float, ptr %17, i64 %13
  %.not = icmp eq i64 %13, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %5
  %19 = load ptr, ptr %16, align 8, !tbaa !37
  %min.iters.check = icmp ult i64 %13, 20
  br i1 %min.iters.check, label %.lr.ph.preheader34, label %vector.memcheck

.lr.ph.preheader34:                               ; preds = %middle.block, %vector.memcheck, %.lr.ph.preheader
  %.023.ph = phi i64 [ 0, %vector.memcheck ], [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  %.02122.ph = phi ptr [ %19, %vector.memcheck ], [ %19, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.neg = or disjoint i64 %.023.ph, 1
  %xtraiter = and i64 %13, 1
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader34
  %20 = load float, ptr %.02122.ph, align 4, !tbaa !38
  %21 = getelementptr inbounds float, ptr %17, i64 %.023.ph
  store float %20, ptr %21, align 4, !tbaa !38
  %22 = getelementptr inbounds i8, ptr %.02122.ph, i64 4
  %23 = load float, ptr %22, align 4, !tbaa !38
  %24 = getelementptr inbounds float, ptr %18, i64 %.023.ph
  store float %23, ptr %24, align 4, !tbaa !38
  %25 = getelementptr inbounds i8, ptr %.02122.ph, i64 8
  %26 = or disjoint i64 %.023.ph, 1
  br label %.lr.ph.prol.loopexit

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader34
  %.023.unr = phi i64 [ %.023.ph, %.lr.ph.preheader34 ], [ %26, %.lr.ph.prol ]
  %.02122.unr = phi ptr [ %.02122.ph, %.lr.ph.preheader34 ], [ %25, %.lr.ph.prol ]
  %27 = icmp eq i64 %13, %.neg
  br i1 %27, label %._crit_edge, label %.lr.ph

vector.memcheck:                                  ; preds = %.lr.ph.preheader
  %28 = mul i64 %10, %8
  %29 = mul i64 %28, %12
  %30 = shl i64 %29, 3
  %scevgep = getelementptr i8, ptr %17, i64 %30
  %scevgep24 = getelementptr i8, ptr %19, i64 %30
  %bound0 = icmp ult ptr %18, %scevgep24
  %bound1 = icmp ult ptr %19, %scevgep
  %found.conflict = and i1 %bound0, %bound1
  %bound025 = icmp ult ptr %17, %scevgep24
  %bound126 = icmp ult ptr %19, %18
  %found.conflict27 = and i1 %bound025, %bound126
  %conflict.rdx = or i1 %found.conflict, %found.conflict27
  br i1 %conflict.rdx, label %.lr.ph.preheader34, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %13, -8
  %31 = shl i64 %n.vec, 3
  %ind.end = getelementptr i8, ptr %19, i64 %31
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = shl i64 %index, 3
  %32 = or disjoint i64 %offset.idx, 32
  %next.gep = getelementptr i8, ptr %19, i64 %offset.idx
  %next.gep29 = getelementptr i8, ptr %19, i64 %32
  %wide.vec = load <8 x float>, ptr %next.gep, align 4, !tbaa !38
  %wide.vec30 = load <8 x float>, ptr %next.gep29, align 4, !tbaa !38
  %strided.vec = shufflevector <8 x float> %wide.vec, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %strided.vec31 = shufflevector <8 x float> %wide.vec30, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %strided.vec32 = shufflevector <8 x float> %wide.vec, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %strided.vec33 = shufflevector <8 x float> %wide.vec30, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %33 = getelementptr inbounds float, ptr %17, i64 %index
  %34 = getelementptr inbounds i8, ptr %33, i64 16
  store <4 x float> %strided.vec, ptr %33, align 4, !tbaa !38, !alias.scope !39, !noalias !42
  store <4 x float> %strided.vec31, ptr %34, align 4, !tbaa !38, !alias.scope !39, !noalias !42
  %35 = getelementptr inbounds float, ptr %18, i64 %index
  %36 = getelementptr inbounds i8, ptr %35, i64 16
  store <4 x float> %strided.vec32, ptr %35, align 4, !tbaa !38, !alias.scope !44, !noalias !42
  store <4 x float> %strided.vec33, ptr %36, align 4, !tbaa !38, !alias.scope !44, !noalias !42
  %index.next = add nuw i64 %index, 8
  %37 = icmp eq i64 %index.next, %n.vec
  br i1 %37, label %middle.block, label %vector.body, !llvm.loop !46

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %13, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader34

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %middle.block, %5
  store ptr %17, ptr %16, align 8, !tbaa !37
  %38 = getelementptr inbounds i8, ptr %0, i64 224
  %39 = load ptr, ptr %38, align 8, !tbaa !50
  %40 = icmp eq ptr %39, null
  br i1 %40, label %55, label %60

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.023 = phi i64 [ %54, %.lr.ph ], [ %.023.unr, %.lr.ph.prol.loopexit ]
  %.02122 = phi ptr [ %53, %.lr.ph ], [ %.02122.unr, %.lr.ph.prol.loopexit ]
  %41 = load float, ptr %.02122, align 4, !tbaa !38
  %42 = getelementptr inbounds float, ptr %17, i64 %.023
  store float %41, ptr %42, align 4, !tbaa !38
  %43 = getelementptr inbounds i8, ptr %.02122, i64 4
  %44 = load float, ptr %43, align 4, !tbaa !38
  %45 = getelementptr inbounds float, ptr %18, i64 %.023
  store float %44, ptr %45, align 4, !tbaa !38
  %46 = getelementptr inbounds i8, ptr %.02122, i64 8
  %47 = add nuw i64 %.023, 1
  %48 = load float, ptr %46, align 4, !tbaa !38
  %49 = getelementptr inbounds float, ptr %17, i64 %47
  store float %48, ptr %49, align 4, !tbaa !38
  %50 = getelementptr inbounds i8, ptr %.02122, i64 12
  %51 = load float, ptr %50, align 4, !tbaa !38
  %52 = getelementptr inbounds float, ptr %18, i64 %47
  store float %51, ptr %52, align 4, !tbaa !38
  %53 = getelementptr inbounds i8, ptr %.02122, i64 16
  %54 = add nuw i64 %.023, 2
  %exitcond.not.1 = icmp eq i64 %54, %13
  br i1 %exitcond.not.1, label %._crit_edge, label %.lr.ph, !llvm.loop !51

55:                                               ; preds = %._crit_edge
  %56 = getelementptr inbounds i8, ptr %0, i64 480
  %57 = getelementptr inbounds i8, ptr %0, i64 40
  %58 = load i64, ptr %57, align 8, !tbaa !52
  tail call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %56, i64 noundef %58, i1 noundef zeroext true, i64 noundef 8)
  %59 = load ptr, ptr %56, align 8, !tbaa !53
  store ptr %59, ptr %38, align 8, !tbaa !50
  br label %60

60:                                               ; preds = %55, %._crit_edge
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd19SynetConvolution32f9SetParamsEPKfP8SimdBoolS2_S2_(ptr noundef nonnull align 8 dereferenceable(440), ptr noundef, ptr noundef, ptr noundef, ptr noundef) unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 64}
!6 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !10, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !12, i64 152}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!11 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!12 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!13 = !{!6, !7, i64 72}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !23, i64 464}
!16 = !{!"_ZTSN4Simd4Base38SynetConvolution32fNhwcGroupedBlock1x2E", !17, i64 0, !7, i64 440, !7, i64 448, !7, i64 456, !22, i64 464, !22, i64 480, !23, i64 496}
!17 = !{!"_ZTSN4Simd19SynetConvolution32fE", !18, i64 0, !19, i64 8, !22, i64 192, !24, i64 208, !24, i64 212, !23, i64 216, !23, i64 224, !23, i64 232, !25, i64 240, !32, i64 304, !22, i64 368, !23, i64 384, !23, i64 392, !23, i64 400, !30, i64 408}
!18 = !{!"_ZTSN4Simd9DeletableE"}
!19 = !{!"_ZTSN4Simd9ConvParamE", !6, i64 0, !20, i64 160, !7, i64 168, !21, i64 176}
!20 = !{!"_ZTS8SimdBool", !8, i64 0}
!21 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!22 = !{!"_ZTSN4Simd5ArrayIfEE", !23, i64 0, !7, i64 8}
!23 = !{!"any pointer", !8, i64 0}
!24 = !{!"float", !8, i64 0}
!25 = !{!"_ZTSN4Simd7RuntimeINS_8GemmFuncENS_8GemmArgsEEE", !23, i64 0, !26, i64 8, !30, i64 32}
!26 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_8GemmFuncENS0_8GemmArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !23, i64 0, !23, i64 8, !23, i64 16}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !31, i64 0, !7, i64 8, !8, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !23, i64 0}
!32 = !{!"_ZTSN4Simd7RuntimeINS_10GemmCbFuncENS_10GemmCbArgsEEE", !23, i64 0, !33, i64 8, !30, i64 32}
!33 = !{!"_ZTSSt6vectorIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIN4Simd7RuntimeINS0_10GemmCbFuncENS0_10GemmCbArgsEE9CandidateESaIS5_EE17_Vector_impl_dataE", !23, i64 0, !23, i64 8, !23, i64 16}
!37 = !{!17, !23, i64 216}
!38 = !{!24, !24, i64 0}
!39 = !{!40}
!40 = distinct !{!40, !41}
!41 = distinct !{!41, !"LVerDomain"}
!42 = !{!43}
!43 = distinct !{!43, !41}
!44 = !{!45}
!45 = distinct !{!45, !41}
!46 = distinct !{!46, !47, !48, !49}
!47 = !{!"llvm.loop.mustprogress"}
!48 = !{!"llvm.loop.isvectorized", i32 1}
!49 = !{!"llvm.loop.unroll.runtime.disable"}
!50 = !{!17, !23, i64 224}
!51 = distinct !{!51, !47, !48}
!52 = !{!6, !7, i64 32}
!53 = !{!16, !23, i64 480}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass