; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseSynetActivation.ll (ZN4Simd4Base11SynetElu32fEPKfmS2_Pf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr noundef %0, i64 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca float, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %12 = load ptr, ptr %7, align 8, !tbaa !5
  %13 = getelementptr inbounds float, ptr %12, i64 0
  %14 = load float, ptr %13, align 4, !tbaa !11
  store float %14, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %15, i64 noundef 4)
  store i64 %16, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %17

17:                                               ; preds = %66, %4
  %18 = load i64, ptr %11, align 8, !tbaa !9
  %19 = load i64, ptr %10, align 8, !tbaa !9
  %20 = icmp ult i64 %18, %19
  br i1 %20, label %21, label %69

21:                                               ; preds = %17
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = load i64, ptr %11, align 8, !tbaa !9
  %24 = add i64 %23, 0
  %25 = getelementptr inbounds float, ptr %22, i64 %24
  %26 = load float, ptr %25, align 4, !tbaa !11
  %27 = load float, ptr %9, align 4, !tbaa !11
  %28 = call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %26, float noundef %27)
  %29 = load ptr, ptr %8, align 8, !tbaa !5
  %30 = load i64, ptr %11, align 8, !tbaa !9
  %31 = add i64 %30, 0
  %32 = getelementptr inbounds float, ptr %29, i64 %31
  store float %28, ptr %32, align 4, !tbaa !11
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = load i64, ptr %11, align 8, !tbaa !9
  %35 = add i64 %34, 1
  %36 = getelementptr inbounds float, ptr %33, i64 %35
  %37 = load float, ptr %36, align 4, !tbaa !11
  %38 = load float, ptr %9, align 4, !tbaa !11
  %39 = call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %37, float noundef %38)
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = load i64, ptr %11, align 8, !tbaa !9
  %42 = add i64 %41, 1
  %43 = getelementptr inbounds float, ptr %40, i64 %42
  store float %39, ptr %43, align 4, !tbaa !11
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = load i64, ptr %11, align 8, !tbaa !9
  %46 = add i64 %45, 2
  %47 = getelementptr inbounds float, ptr %44, i64 %46
  %48 = load float, ptr %47, align 4, !tbaa !11
  %49 = load float, ptr %9, align 4, !tbaa !11
  %50 = call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %48, float noundef %49)
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = load i64, ptr %11, align 8, !tbaa !9
  %53 = add i64 %52, 2
  %54 = getelementptr inbounds float, ptr %51, i64 %53
  store float %50, ptr %54, align 4, !tbaa !11
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = load i64, ptr %11, align 8, !tbaa !9
  %57 = add i64 %56, 3
  %58 = getelementptr inbounds float, ptr %55, i64 %57
  %59 = load float, ptr %58, align 4, !tbaa !11
  %60 = load float, ptr %9, align 4, !tbaa !11
  %61 = call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %59, float noundef %60)
  %62 = load ptr, ptr %8, align 8, !tbaa !5
  %63 = load i64, ptr %11, align 8, !tbaa !9
  %64 = add i64 %63, 3
  %65 = getelementptr inbounds float, ptr %62, i64 %64
  store float %61, ptr %65, align 4, !tbaa !11
  br label %66

66:                                               ; preds = %21
  %67 = load i64, ptr %11, align 8, !tbaa !9
  %68 = add i64 %67, 4
  store i64 %68, ptr %11, align 8, !tbaa !9
  br label %17, !llvm.loop !13

69:                                               ; preds = %17
  br label %70

70:                                               ; preds = %84, %69
  %71 = load i64, ptr %11, align 8, !tbaa !9
  %72 = load i64, ptr %6, align 8, !tbaa !9
  %73 = icmp ult i64 %71, %72
  br i1 %73, label %74, label %87

74:                                               ; preds = %70
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = load i64, ptr %11, align 8, !tbaa !9
  %77 = getelementptr inbounds float, ptr %75, i64 %76
  %78 = load float, ptr %77, align 4, !tbaa !11
  %79 = load float, ptr %9, align 4, !tbaa !11
  %80 = call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %78, float noundef %79)
  %81 = load ptr, ptr %8, align 8, !tbaa !5
  %82 = load i64, ptr %11, align 8, !tbaa !9
  %83 = getelementptr inbounds float, ptr %81, i64 %82
  store float %80, ptr %83, align 4, !tbaa !11
  br label %84

84:                                               ; preds = %74
  %85 = load i64, ptr %11, align 8, !tbaa !9
  %86 = add i64 %85, 1
  store i64 %86, ptr %11, align 8, !tbaa !9
  br label %70, !llvm.loop !15

87:                                               ; preds = %70
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef, float noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base11SynetElu32fEPKfmS2_Pf(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = load float, ptr %2, align 4, !tbaa !5
  %6 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %1, i64 noundef 4)
  %.not = icmp eq i64 %6, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %4
  %.0.lcssa = phi i64 [ 0, %4 ], [ %27, %.lr.ph ]
  %7 = icmp ult i64 %.0.lcssa, %1
  br i1 %7, label %.lr.ph34, label %._crit_edge

.lr.ph:                                           ; preds = %4, %.lr.ph
  %.032 = phi i64 [ %27, %.lr.ph ], [ 0, %4 ]
  %8 = getelementptr inbounds float, ptr %0, i64 %.032
  %9 = load float, ptr %8, align 4, !tbaa !5
  %10 = tail call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %9, float noundef %5)
  %11 = getelementptr inbounds float, ptr %3, i64 %.032
  store float %10, ptr %11, align 4, !tbaa !5
  %12 = or disjoint i64 %.032, 1
  %13 = getelementptr inbounds float, ptr %0, i64 %12
  %14 = load float, ptr %13, align 4, !tbaa !5
  %15 = tail call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %14, float noundef %5)
  %16 = getelementptr inbounds float, ptr %3, i64 %12
  store float %15, ptr %16, align 4, !tbaa !5
  %17 = or disjoint i64 %.032, 2
  %18 = getelementptr inbounds float, ptr %0, i64 %17
  %19 = load float, ptr %18, align 4, !tbaa !5
  %20 = tail call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %19, float noundef %5)
  %21 = getelementptr inbounds float, ptr %3, i64 %17
  store float %20, ptr %21, align 4, !tbaa !5
  %22 = or disjoint i64 %.032, 3
  %23 = getelementptr inbounds float, ptr %0, i64 %22
  %24 = load float, ptr %23, align 4, !tbaa !5
  %25 = tail call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %24, float noundef %5)
  %26 = getelementptr inbounds float, ptr %3, i64 %22
  store float %25, ptr %26, align 4, !tbaa !5
  %27 = add i64 %.032, 4
  %28 = icmp ult i64 %27, %6
  br i1 %28, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph34:                                         ; preds = %.preheader, %.lr.ph34
  %.133 = phi i64 [ %33, %.lr.ph34 ], [ %.0.lcssa, %.preheader ]
  %29 = getelementptr inbounds float, ptr %0, i64 %.133
  %30 = load float, ptr %29, align 4, !tbaa !5
  %31 = tail call noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef %30, float noundef %5)
  %32 = getelementptr inbounds float, ptr %3, i64 %.133
  store float %31, ptr %32, align 4, !tbaa !5
  %33 = add i64 %.133, 1
  %exitcond.not = icmp eq i64 %33, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph34, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph34, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef float @_ZN4Simd4Base11SynetElu32fEff(float noundef, float noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass