; LLVM IR from NVIDIA/DALI :: dali/core/cuda_event_pool.ll (ZN4dali13CUDAEventPool11GetFromPoolEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }
%"class.std::lock_guard" = type { ptr }
%"class.dali::CUDAEventPool" = type <{ i32, [4 x i8], ptr, %"class.std::vector", %"class.dali::yielding_spinlock", [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::CUDAEventPool::EventEntry *, std::allocator<dali::CUDAEventPool::EventEntry *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::yielding_spinlock" = type { %"struct.std::atomic_flag" }
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%"struct.dali::CUDAEventPool::EventEntry" = type { %"class.dali::CUDAEvent", ptr }

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [74 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool11GetFromPoolEi = external hidden unnamed_addr constant [48 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8 %0, ptr noundef nonnull align 8 dereferenceable(41) %1, i32 noundef %2) #1 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::lock_guard", align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i1, align 1
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %13 = load ptr, ptr %5, align 8
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = icmp sge i32 %14, 0
  br i1 %15, label %16, label %22

16:                                               ; preds = %3
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 3
  %19 = call noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #7
  %20 = trunc i64 %19 to i32
  %21 = icmp slt i32 %17, %20
  br label %22

22:                                               ; preds = %16, %3
  %23 = phi i1 [ false, %3 ], [ %21, %16 ]
  br i1 %23, label %24, label %25

24:                                               ; preds = %22
  br label %27

25:                                               ; preds = %22
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 60, ptr noundef @__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool11GetFromPoolEi) #8
  unreachable

26:                                               ; No predecessors!
  br label %27

27:                                               ; preds = %26, %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  %28 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 4
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 1 dereferenceable(1) %28)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %29 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 3
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #7
  %33 = invoke noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8) %32)
          to label %34 unwind label %39

34:                                               ; preds = %27
  store ptr %33, ptr %8, align 8, !tbaa !5
  %35 = load ptr, ptr %8, align 8, !tbaa !5
  %36 = icmp ne ptr %35, null
  br i1 %36, label %43, label %37

37:                                               ; preds = %34
  call void @llvm.memset.p0.i64(ptr align 8 %0, i8 0, i64 8, i1 false)
  invoke void @_ZN4dali9CUDAEventC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0)
          to label %38 unwind label %39

38:                                               ; preds = %37
  store i32 1, ptr %11, align 4
  br label %57

39:                                               ; preds = %43, %37, %27
  %40 = landingpad { ptr, i32 }
          cleanup
  %41 = extractvalue { ptr, i32 } %40, 0
  store ptr %41, ptr %9, align 8
  %42 = extractvalue { ptr, i32 } %40, 1
  store i32 %42, ptr %10, align 4
  br label %58

43:                                               ; preds = %34
  store i1 false, ptr %12, align 1
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = getelementptr inbounds %"struct.dali::CUDAEventPool::EventEntry", ptr %44, i32 0, i32 0
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %45)
          to label %46 unwind label %39

46:                                               ; preds = %43
  %47 = getelementptr inbounds %"class.dali::CUDAEventPool", ptr %13, i32 0, i32 2
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8) %47, ptr noundef %48)
          to label %49 unwind label %51

49:                                               ; preds = %46
  store i1 true, ptr %12, align 1
  store i32 1, ptr %11, align 4
  %50 = load i1, ptr %12, align 1
  br i1 %50, label %56, label %55

51:                                               ; preds = %46
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %9, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %10, align 4
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #7
  br label %58

55:                                               ; preds = %49
  call void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #7
  br label %56

56:                                               ; preds = %55, %49
  br label %57

57:                                               ; preds = %56, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %7) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  ret void

58:                                               ; preds = %51, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %7) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  br label %59

59:                                               ; preds = %58
  %60 = load ptr, ptr %9, align 8
  %61 = load i32, ptr %10, align 4
  %62 = insertvalue { ptr, i32 } poison, ptr %60, 0
  %63 = insertvalue { ptr, i32 } %62, i32 %61, 1
  resume { ptr, i32 } %63
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4dali12UniqueHandleIP10CUevent_stNS_9CUDAEventEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::CUDAEvent" = type { %"class.dali::UniqueHandle" }
%"class.dali::UniqueHandle" = type { ptr }
%"class.std::lock_guard" = type { ptr }

@.str = external hidden unnamed_addr constant [67 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [74 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool11GetFromPoolEi = external hidden unnamed_addr constant [48 x i8], align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali13CUDAEventPool11GetFromPoolEi(ptr dead_on_unwind noalias writable sret(%"class.dali::CUDAEvent") align 8 %0, ptr noundef nonnull align 8 dereferenceable(41) %1, i32 noundef %2) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.std::lock_guard", align 8
  %5 = icmp sgt i32 %2, -1
  br i1 %5, label %6, label %.critedge

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %1, i64 16
  %8 = tail call noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  %9 = trunc i64 %8 to i32
  %10 = icmp sgt i32 %9, %2
  br i1 %10, label %11, label %.critedge

.critedge:                                        ; preds = %3, %6
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 60, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4dali13CUDAEventPool11GetFromPoolEi) #6
  unreachable

11:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %12 = getelementptr inbounds i8, ptr %1, i64 40
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 1 dereferenceable(1) %12)
  %13 = zext nneg i32 %2 to i64
  %14 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %13) #5
  %15 = call noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8) %14)
  %.not = icmp eq ptr %15, null
  br i1 %.not, label %16, label %19

16:                                               ; preds = %11
  store i64 0, ptr %0, align 8
  invoke void @_ZN4dali9CUDAEventC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0)
          to label %22 unwind label %17

17:                                               ; preds = %19, %16
  %18 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  resume { ptr, i32 } %18

19:                                               ; preds = %11
  invoke void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %15)
          to label %20 unwind label %17

20:                                               ; preds = %19
  %21 = getelementptr inbounds i8, ptr %1, i64 8
  call void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8) %21, ptr noundef nonnull %15)
  br label %22

22:                                               ; preds = %16, %20
  call void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2EOS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEEC2ERS2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardIN4dali17yielding_spinlockILi100EEEED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4dali13CUDAEventPool3PopERPNS0_10EventEntryE(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4dali13CUDAEventPool10EventEntryESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali9CUDAEventC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4dali13CUDAEventPool4PushERPNS0_10EventEntryES2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass