; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution8i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution8i" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", ptr, %"struct.Simd::CvtParam", %"struct.Simd::CvtParam", %"struct.Simd::Array.1", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, i8, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::CvtParam" = type <{ %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.0", i8, [3 x i8], i32, i32, i32, i32, [4 x i8] }>
%"struct.Simd::Array.1" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"class.Simd::Base::SynetConvolution8iNhwcDirect" = type { %"class.Simd::SynetConvolution8i", %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", i64, i64, %"struct.Simd::ConvParam", [3 x ptr] }
%"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam" = type { i64, i64, i64, i64, i64, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect11SetAlgParamEmmmmmm(ptr noundef nonnull align 8 dereferenceable(832) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) #2 align 2 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i64 %4, ptr %12, align 8, !tbaa !9
  store i64 %5, ptr %13, align 8, !tbaa !9
  store i64 %6, ptr %14, align 8, !tbaa !9
  %18 = load ptr, ptr %8, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %19 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %18, i32 0, i32 1
  store ptr %19, ptr %15, align 8, !tbaa !5
  %20 = load i64, ptr %9, align 8, !tbaa !9
  %21 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %22 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %21, i32 0, i32 0
  store i64 %20, ptr %22, align 8, !tbaa !11
  %23 = load i64, ptr %10, align 8, !tbaa !9
  %24 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %25 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %24, i32 0, i32 1
  store i64 %23, ptr %25, align 8, !tbaa !31
  %26 = load i64, ptr %12, align 8, !tbaa !9
  %27 = load ptr, ptr %15, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %27, i32 0, i32 10
  %29 = load i64, ptr %28, align 8, !tbaa !32
  %30 = udiv i64 %26, %29
  %31 = load ptr, ptr %15, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %31, i32 0, i32 11
  %33 = load i64, ptr %32, align 8, !tbaa !33
  %34 = udiv i64 %30, %33
  %35 = load i64, ptr %10, align 8, !tbaa !9
  %36 = udiv i64 %34, %35
  %37 = call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %36, i64 noundef 4)
  %38 = load ptr, ptr %15, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %38, i32 0, i32 0
  %40 = load i64, ptr %39, align 8, !tbaa !34
  %41 = call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %37, i64 noundef %40)
  %42 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %43 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %42, i32 0, i32 3
  store i64 %41, ptr %43, align 8, !tbaa !35
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %44 = load ptr, ptr %15, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %44, i32 0, i32 6
  %46 = load i64, ptr %45, align 8, !tbaa !36
  store i64 %46, ptr %16, align 8, !tbaa !9
  br label %47

47:                                               ; preds = %83, %7
  %48 = load i64, ptr %16, align 8, !tbaa !9
  %49 = icmp uge i64 %48, 1
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 2, ptr %17, align 4
  br label %86

51:                                               ; preds = %47
  %52 = load i64, ptr %16, align 8, !tbaa !9
  %53 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %54 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %53, i32 0, i32 2
  store i64 %52, ptr %54, align 8, !tbaa !37
  %55 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %56 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %55, i32 0, i32 3
  %57 = load i64, ptr %56, align 8, !tbaa !35
  %58 = load ptr, ptr %15, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %58, i32 0, i32 2
  %60 = load i64, ptr %59, align 8, !tbaa !38
  %61 = mul i64 %57, %60
  %62 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %63 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %62, i32 0, i32 2
  %64 = load i64, ptr %63, align 8, !tbaa !37
  %65 = load ptr, ptr %15, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %65, i32 0, i32 14
  %67 = load i64, ptr %66, align 8, !tbaa !39
  %68 = mul i64 %64, %67
  %69 = load ptr, ptr %15, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %69, i32 0, i32 10
  %71 = load i64, ptr %70, align 8, !tbaa !32
  %72 = load ptr, ptr %15, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %72, i32 0, i32 12
  %74 = load i64, ptr %73, align 8, !tbaa !40
  %75 = mul i64 %71, %74
  %76 = add i64 %68, %75
  %77 = sub i64 %76, 1
  %78 = mul i64 %61, %77
  %79 = load i64, ptr %13, align 8, !tbaa !9
  %80 = icmp ule i64 %78, %79
  br i1 %80, label %81, label %82

81:                                               ; preds = %51
  store i32 2, ptr %17, align 4
  br label %86

82:                                               ; preds = %51
  br label %83

83:                                               ; preds = %82
  %84 = load i64, ptr %16, align 8, !tbaa !9
  %85 = add i64 %84, -1
  store i64 %85, ptr %16, align 8, !tbaa !9
  br label %47, !llvm.loop !41

86:                                               ; preds = %81, %50
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  br label %87

87:                                               ; preds = %86
  %88 = load i64, ptr %14, align 8, !tbaa !9
  %89 = load ptr, ptr %15, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %89, i32 0, i32 10
  %91 = load i64, ptr %90, align 8, !tbaa !32
  %92 = udiv i64 %88, %91
  %93 = load ptr, ptr %15, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %93, i32 0, i32 11
  %95 = load i64, ptr %94, align 8, !tbaa !33
  %96 = udiv i64 %92, %95
  %97 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %98 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %97, i32 0, i32 3
  %99 = load i64, ptr %98, align 8, !tbaa !35
  %100 = udiv i64 %96, %99
  %101 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %102 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %101, i32 0, i32 1
  %103 = load i64, ptr %102, align 8, !tbaa !31
  %104 = call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %100, i64 noundef %103)
  %105 = load ptr, ptr %15, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %105, i32 0, i32 5
  %107 = load i64, ptr %106, align 8, !tbaa !43
  %108 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %109 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %108, i32 0, i32 1
  %110 = load i64, ptr %109, align 8, !tbaa !31
  %111 = call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %107, i64 noundef %110)
  %112 = call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %104, i64 noundef %111)
  %113 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %114 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %113, i32 0, i32 4
  store i64 %112, ptr %114, align 8, !tbaa !44
  %115 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %18, i32 0, i32 12
  %116 = load i8, ptr %115, align 1, !tbaa !45, !range !46, !noundef !47
  %117 = trunc i8 %116 to i1
  %118 = zext i1 %117 to i64
  %119 = select i1 %117, i32 1, i32 4
  %120 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %121 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %120, i32 0, i32 6
  store i32 %119, ptr %121, align 4, !tbaa !48
  %122 = load i64, ptr %11, align 8, !tbaa !9
  %123 = call noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832) %18, i64 noundef %122)
  br i1 %123, label %124, label %173

124:                                              ; preds = %87
  %125 = load ptr, ptr %15, align 8, !tbaa !5
  %126 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %126, ptr align 8 %125, i64 180, i1 false)
  %127 = load ptr, ptr %15, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %127, i32 0, i32 1
  %129 = load i64, ptr %128, align 8, !tbaa !49
  %130 = load ptr, ptr %15, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %130, i32 0, i32 16
  %132 = load i64, ptr %131, align 8, !tbaa !50
  %133 = add i64 %129, %132
  %134 = load ptr, ptr %15, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %134, i32 0, i32 18
  %136 = load i64, ptr %135, align 8, !tbaa !51
  %137 = add i64 %133, %136
  %138 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %139 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %138, i32 0, i32 1
  store i64 %137, ptr %139, align 8, !tbaa !49
  %140 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %141 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %140, i32 0, i32 16
  store i64 0, ptr %141, align 8, !tbaa !50
  %142 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %143 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %142, i32 0, i32 18
  store i64 0, ptr %143, align 8, !tbaa !51
  %144 = load ptr, ptr %15, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %144, i32 0, i32 2
  %146 = load i64, ptr %145, align 8, !tbaa !38
  %147 = load ptr, ptr %15, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %147, i32 0, i32 17
  %149 = load i64, ptr %148, align 8, !tbaa !52
  %150 = add i64 %146, %149
  %151 = load ptr, ptr %15, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %151, i32 0, i32 19
  %153 = load i64, ptr %152, align 8, !tbaa !53
  %154 = add i64 %150, %153
  %155 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %156 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %155, i32 0, i32 2
  store i64 %154, ptr %156, align 8, !tbaa !38
  %157 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %158 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %157, i32 0, i32 17
  store i64 0, ptr %158, align 8, !tbaa !52
  %159 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %160 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %159, i32 0, i32 19
  store i64 0, ptr %160, align 8, !tbaa !53
  %161 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %162 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %161, i32 0, i32 1
  %163 = load i64, ptr %162, align 8, !tbaa !49
  %164 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 4
  %165 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %164, i32 0, i32 2
  %166 = load i64, ptr %165, align 8, !tbaa !38
  %167 = mul i64 %163, %166
  %168 = load ptr, ptr %15, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %168, i32 0, i32 0
  %170 = load i64, ptr %169, align 8, !tbaa !34
  %171 = mul i64 %167, %170
  %172 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 2
  store i64 %171, ptr %172, align 8, !tbaa !54
  br label %175

173:                                              ; preds = %87
  %174 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 2
  store i64 0, ptr %174, align 8, !tbaa !54
  br label %175

175:                                              ; preds = %173, %124
  %176 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 1
  %177 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution8iNhwcDirect::AlgParam", ptr %176, i32 0, i32 3
  %178 = load i64, ptr %177, align 8, !tbaa !35
  %179 = load ptr, ptr %15, align 8, !tbaa !5
  %180 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %179, i32 0, i32 0
  %181 = load i64, ptr %180, align 8, !tbaa !34
  %182 = icmp ult i64 %178, %181
  br i1 %182, label %186, label %183

183:                                              ; preds = %175
  %184 = load i64, ptr %11, align 8, !tbaa !9
  %185 = icmp uge i64 %184, 32
  br i1 %185, label %186, label %193

186:                                              ; preds = %183, %175
  %187 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %18, i32 0, i32 12
  %188 = load i8, ptr %187, align 1, !tbaa !45, !range !46, !noundef !47
  %189 = trunc i8 %188 to i1
  br i1 %189, label %190, label %193

190:                                              ; preds = %186
  %191 = getelementptr inbounds %"class.Simd::SynetConvolution8i", ptr %18, i32 0, i32 15
  %192 = load i64, ptr %191, align 8, !tbaa !55
  br label %194

193:                                              ; preds = %186, %183
  br label %194

194:                                              ; preds = %193, %190
  %195 = phi i64 [ %192, %190 ], [ 0, %193 ]
  %196 = getelementptr inbounds %"class.Simd::Base::SynetConvolution8iNhwcDirect", ptr %18, i32 0, i32 3
  store i64 %195, ptr %196, align 8, !tbaa !56
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 552}
!12 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !13, i64 0, !30, i64 552, !10, i64 608, !10, i64 616, !15, i64 624, !7, i64 808}
!13 = !{!"_ZTSN4Simd18SynetConvolution8iE", !14, i64 0, !15, i64 8, !22, i64 192, !23, i64 208, !6, i64 240, !25, i64 248, !25, i64 352, !29, i64 456, !26, i64 472, !26, i64 488, !26, i64 504, !27, i64 520, !27, i64 521, !10, i64 528, !10, i64 536, !10, i64 544}
!14 = !{!"_ZTSN4Simd9DeletableE"}
!15 = !{!"_ZTSN4Simd9ConvParamE", !16, i64 0, !20, i64 160, !10, i64 168, !21, i64 176}
!16 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !17, i64 24, !18, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !17, i64 56, !18, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !19, i64 152}
!17 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!18 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!19 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!20 = !{!"_ZTS8SimdBool", !7, i64 0}
!21 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!22 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !10, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"_ZTSN4Simd8CvtParamE", !22, i64 0, !26, i64 16, !26, i64 32, !26, i64 48, !26, i64 64, !27, i64 80, !28, i64 84, !28, i64 88, !28, i64 92, !28, i64 96}
!26 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"int", !7, i64 0}
!29 = !{!"_ZTSN4Simd5ArrayIaEE", !6, i64 0, !10, i64 8}
!30 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !28, i64 40, !28, i64 44, !28, i64 48}
!31 = !{!12, !10, i64 560}
!32 = !{!16, !10, i64 64}
!33 = !{!16, !10, i64 72}
!34 = !{!16, !10, i64 0}
!35 = !{!12, !10, i64 576}
!36 = !{!16, !10, i64 40}
!37 = !{!12, !10, i64 568}
!38 = !{!16, !10, i64 16}
!39 = !{!16, !10, i64 96}
!40 = !{!16, !10, i64 80}
!41 = distinct !{!41, !42}
!42 = !{!"llvm.loop.mustprogress"}
!43 = !{!16, !10, i64 32}
!44 = !{!12, !10, i64 584}
!45 = !{!13, !27, i64 521}
!46 = !{i8 0, i8 2}
!47 = !{}
!48 = !{!12, !28, i64 596}
!49 = !{!16, !10, i64 8}
!50 = !{!16, !10, i64 112}
!51 = !{!16, !10, i64 128}
!52 = !{!16, !10, i64 120}
!53 = !{!16, !10, i64 136}
!54 = !{!12, !10, i64 608}
!55 = !{!13, !10, i64 544}
!56 = !{!12, !10, i64 616}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base28SynetConvolution8iNhwcDirect11SetAlgParamEmmmmmm(ptr noundef nonnull align 8 dereferenceable(832) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) local_unnamed_addr #1 align 2 {
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = getelementptr inbounds i8, ptr %0, i64 552
  store i64 %1, ptr %9, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 560
  store i64 %2, ptr %10, align 8, !tbaa !29
  %11 = getelementptr inbounds i8, ptr %0, i64 72
  %12 = load i64, ptr %11, align 8, !tbaa !30
  %13 = udiv i64 %4, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 80
  %15 = load i64, ptr %14, align 8, !tbaa !31
  %16 = udiv i64 %13, %15
  %17 = udiv i64 %16, %2
  %18 = tail call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %17, i64 noundef 4)
  %19 = load i64, ptr %8, align 8, !tbaa !32
  %20 = tail call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %18, i64 noundef %19)
  %21 = getelementptr inbounds i8, ptr %0, i64 576
  store i64 %20, ptr %21, align 8, !tbaa !33
  %22 = getelementptr inbounds i8, ptr %0, i64 48
  %23 = load i64, ptr %22, align 8, !tbaa !34
  %24 = getelementptr inbounds i8, ptr %0, i64 568
  %.not33 = icmp eq i64 %23, 0
  %.pre = load i64, ptr %11, align 8, !tbaa !30
  br i1 %.not33, label %40, label %.lr.ph

.lr.ph:                                           ; preds = %7
  %25 = getelementptr inbounds i8, ptr %0, i64 24
  %26 = load i64, ptr %25, align 8, !tbaa !35
  %27 = mul i64 %26, %20
  %28 = getelementptr inbounds i8, ptr %0, i64 104
  %29 = load i64, ptr %28, align 8, !tbaa !36
  %30 = getelementptr inbounds i8, ptr %0, i64 88
  %31 = load i64, ptr %30, align 8, !tbaa !37
  %32 = mul i64 %31, %.pre
  br label %35

33:                                               ; preds = %35
  %34 = add i64 %.034, -1
  %.not = icmp eq i64 %34, 0
  br i1 %.not, label %.sink.split, label %35, !llvm.loop !38

35:                                               ; preds = %.lr.ph, %33
  %.034 = phi i64 [ %23, %.lr.ph ], [ %34, %33 ]
  %36 = mul i64 %29, %.034
  %37 = add i64 %36, -1
  %38 = add i64 %37, %32
  %39 = mul i64 %27, %38
  %.not32 = icmp ugt i64 %39, %5
  br i1 %.not32, label %33, label %.sink.split

.sink.split:                                      ; preds = %33, %35
  %.sink40 = phi i64 [ %.034, %35 ], [ 1, %33 ]
  store i64 %.sink40, ptr %24, align 8, !tbaa !40
  br label %40

40:                                               ; preds = %.sink.split, %7
  %41 = udiv i64 %6, %.pre
  %42 = load i64, ptr %14, align 8, !tbaa !31
  %43 = udiv i64 %41, %42
  %44 = udiv i64 %43, %20
  %45 = load i64, ptr %10, align 8, !tbaa !29
  %46 = tail call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %44, i64 noundef %45)
  %47 = getelementptr inbounds i8, ptr %0, i64 40
  %48 = load i64, ptr %47, align 8, !tbaa !41
  %49 = load i64, ptr %10, align 8, !tbaa !29
  %50 = tail call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %48, i64 noundef %49)
  %51 = tail call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %46, i64 noundef %50)
  %52 = getelementptr inbounds i8, ptr %0, i64 584
  store i64 %51, ptr %52, align 8, !tbaa !42
  %53 = getelementptr inbounds i8, ptr %0, i64 521
  %54 = load i8, ptr %53, align 1, !tbaa !43, !range !44, !noundef !45
  %55 = trunc nuw i8 %54 to i1
  %56 = select i1 %55, i32 1, i32 4
  %57 = getelementptr inbounds i8, ptr %0, i64 596
  store i32 %56, ptr %57, align 4, !tbaa !46
  %58 = tail call noundef zeroext i1 @_ZN4Simd4Base28SynetConvolution8iNhwcDirect9PadEnableEm(ptr noundef nonnull align 8 dereferenceable(832) %0, i64 noundef %3)
  br i1 %58, label %59, label %79

59:                                               ; preds = %40
  %60 = getelementptr inbounds i8, ptr %0, i64 624
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(180) %60, ptr noundef nonnull align 8 dereferenceable(180) %8, i64 180, i1 false)
  %61 = getelementptr inbounds i8, ptr %0, i64 16
  %62 = getelementptr inbounds i8, ptr %0, i64 120
  %63 = getelementptr inbounds i8, ptr %0, i64 136
  %64 = getelementptr inbounds i8, ptr %0, i64 632
  %65 = getelementptr inbounds i8, ptr %0, i64 736
  store i64 0, ptr %65, align 8, !tbaa !47
  %66 = getelementptr inbounds i8, ptr %0, i64 752
  store i64 0, ptr %66, align 8, !tbaa !48
  %67 = load <2 x i64>, ptr %61, align 8, !tbaa !49
  %68 = load <2 x i64>, ptr %62, align 8, !tbaa !49
  %69 = add <2 x i64> %68, %67
  %70 = load <2 x i64>, ptr %63, align 8, !tbaa !49
  %71 = add <2 x i64> %69, %70
  store <2 x i64> %71, ptr %64, align 8, !tbaa !49
  %72 = getelementptr inbounds i8, ptr %0, i64 744
  store i64 0, ptr %72, align 8, !tbaa !50
  %73 = getelementptr inbounds i8, ptr %0, i64 760
  store i64 0, ptr %73, align 8, !tbaa !51
  %74 = extractelement <2 x i64> %71, i64 0
  %75 = extractelement <2 x i64> %71, i64 1
  %76 = mul i64 %75, %74
  %77 = load i64, ptr %8, align 8, !tbaa !32
  %78 = mul i64 %76, %77
  br label %80

79:                                               ; preds = %40
  %.pre38 = load i64, ptr %8, align 8, !tbaa !32
  br label %80

80:                                               ; preds = %79, %59
  %81 = phi i64 [ %77, %59 ], [ %.pre38, %79 ]
  %.sink = phi i64 [ %78, %59 ], [ 0, %79 ]
  %82 = getelementptr inbounds i8, ptr %0, i64 608
  store i64 %.sink, ptr %82, align 8
  %83 = load i64, ptr %21, align 8, !tbaa !33
  %84 = icmp ult i64 %83, %81
  %85 = icmp ugt i64 %3, 31
  %or.cond = or i1 %85, %84
  br i1 %or.cond, label %86, label %92

86:                                               ; preds = %80
  %87 = load i8, ptr %53, align 1, !tbaa !43, !range !44, !noundef !45
  %88 = trunc nuw i8 %87 to i1
  br i1 %88, label %89, label %92

89:                                               ; preds = %86
  %90 = getelementptr inbounds i8, ptr %0, i64 544
  %91 = load i64, ptr %90, align 8, !tbaa !52
  br label %92

92:                                               ; preds = %86, %80, %89
  %93 = phi i64 [ %91, %89 ], [ 0, %80 ], [ 0, %86 ]
  %94 = getelementptr inbounds i8, ptr %0, i64 616
  store i64 %93, ptr %94, align 8, !tbaa !53
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 552}
!6 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirectE", !7, i64 0, !28, i64 552, !11, i64 608, !11, i64 616, !9, i64 624, !12, i64 808}
!7 = !{!"_ZTSN4Simd18SynetConvolution8iE", !8, i64 0, !9, i64 8, !19, i64 192, !21, i64 208, !20, i64 240, !23, i64 248, !23, i64 352, !27, i64 456, !24, i64 472, !24, i64 488, !24, i64 504, !25, i64 520, !25, i64 521, !11, i64 528, !11, i64 536, !11, i64 544}
!8 = !{!"_ZTSN4Simd9DeletableE"}
!9 = !{!"_ZTSN4Simd9ConvParamE", !10, i64 0, !17, i64 160, !11, i64 168, !18, i64 176}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !14, i64 24, !15, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !14, i64 56, !15, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !16, i64 152}
!11 = !{!"long", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTS18SimdTensorDataType", !12, i64 0}
!15 = !{!"_ZTS20SimdTensorFormatType", !12, i64 0}
!16 = !{!"_ZTS29SimdConvolutionActivationType", !12, i64 0}
!17 = !{!"_ZTS8SimdBool", !12, i64 0}
!18 = !{!"_ZTS26SimdSynetCompatibilityType", !12, i64 0}
!19 = !{!"_ZTSN4Simd5ArrayIhEE", !20, i64 0, !11, i64 8}
!20 = !{!"any pointer", !12, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !11, i64 8, !12, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !20, i64 0}
!23 = !{!"_ZTSN4Simd8CvtParamE", !19, i64 0, !24, i64 16, !24, i64 32, !24, i64 48, !24, i64 64, !25, i64 80, !26, i64 84, !26, i64 88, !26, i64 92, !26, i64 96}
!24 = !{!"_ZTSN4Simd5ArrayIfEE", !20, i64 0, !11, i64 8}
!25 = !{!"bool", !12, i64 0}
!26 = !{!"int", !12, i64 0}
!27 = !{!"_ZTSN4Simd5ArrayIaEE", !20, i64 0, !11, i64 8}
!28 = !{!"_ZTSN4Simd4Base28SynetConvolution8iNhwcDirect8AlgParamE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !26, i64 40, !26, i64 44, !26, i64 48}
!29 = !{!6, !11, i64 560}
!30 = !{!10, !11, i64 64}
!31 = !{!10, !11, i64 72}
!32 = !{!10, !11, i64 0}
!33 = !{!6, !11, i64 576}
!34 = !{!10, !11, i64 40}
!35 = !{!10, !11, i64 16}
!36 = !{!10, !11, i64 96}
!37 = !{!10, !11, i64 80}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}
!40 = !{!6, !11, i64 568}
!41 = !{!10, !11, i64 32}
!42 = !{!6, !11, i64 584}
!43 = !{!7, !25, i64 521}
!44 = !{i8 0, i8 2}
!45 = !{}
!46 = !{!6, !26, i64 596}
!47 = !{!10, !11, i64 112}
!48 = !{!10, !11, i64 128}
!49 = !{!11, !11, i64 0}
!50 = !{!10, !11, i64 120}
!51 = !{!10, !11, i64 136}
!52 = !{!7, !11, i64 544}
!53 = !{!6, !11, i64 616}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,MergedLoadStoreMotionPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass