; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseReduceGray4x4.ll (ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::(anonymous namespace)::Buffer" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [83 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca %"struct.Simd::Base::(anonymous namespace)::Buffer", align 8
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca ptr, align 8
  %24 = alloca ptr, align 8
  %25 = alloca i64, align 8
  %26 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  store i64 %7, ptr %16, align 8, !tbaa !9
  %27 = load i64, ptr %10, align 8, !tbaa !9
  %28 = add i64 %27, 1
  %29 = udiv i64 %28, 2
  %30 = load i64, ptr %14, align 8, !tbaa !9
  %31 = icmp eq i64 %29, %30
  br i1 %31, label %32, label %41

32:                                               ; preds = %8
  %33 = load i64, ptr %11, align 8, !tbaa !9
  %34 = add i64 %33, 1
  %35 = udiv i64 %34, 2
  %36 = load i64, ptr %15, align 8, !tbaa !9
  %37 = icmp eq i64 %35, %36
  br i1 %37, label %38, label %41

38:                                               ; preds = %32
  %39 = load i64, ptr %10, align 8, !tbaa !9
  %40 = icmp ugt i64 %39, 2
  br label %41

41:                                               ; preds = %38, %32, %8
  %42 = phi i1 [ false, %32 ], [ false, %8 ], [ %40, %38 ]
  br i1 %42, label %43, label %44

43:                                               ; preds = %41
  br label %46

44:                                               ; preds = %41
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 82, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm) #5
  unreachable

45:                                               ; No predecessors!
  br label %46

46:                                               ; preds = %45, %43
  call void @llvm.lifetime.start.p0(i64 24, ptr %17) #6
  %47 = load i64, ptr %14, align 8, !tbaa !9
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Em(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %47)
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %48, i64 noundef 0, i64 noundef 0, i64 noundef 1, i64 noundef 2, ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef 0)
          to label %49 unwind label %71

49:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  store i64 2, ptr %20, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #6
  store i64 1, ptr %21, align 8, !tbaa !9
  br label %50

50:                                               ; preds = %66, %49
  %51 = load i64, ptr %20, align 8, !tbaa !9
  %52 = load i64, ptr %10, align 8, !tbaa !9
  %53 = sub i64 %52, 2
  %54 = icmp ult i64 %51, %53
  br i1 %54, label %55, label %79

55:                                               ; preds = %50
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = load i64, ptr %20, align 8, !tbaa !9
  %58 = sub i64 %57, 1
  %59 = load i64, ptr %20, align 8, !tbaa !9
  %60 = load i64, ptr %20, align 8, !tbaa !9
  %61 = add i64 %60, 1
  %62 = load i64, ptr %20, align 8, !tbaa !9
  %63 = add i64 %62, 2
  %64 = load i64, ptr %21, align 8, !tbaa !9
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %56, i64 noundef %58, i64 noundef %59, i64 noundef %61, i64 noundef %63, ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %64)
          to label %65 unwind label %75

65:                                               ; preds = %55
  br label %66

66:                                               ; preds = %65
  %67 = load i64, ptr %20, align 8, !tbaa !9
  %68 = add i64 %67, 2
  store i64 %68, ptr %20, align 8, !tbaa !9
  %69 = load i64, ptr %21, align 8, !tbaa !9
  %70 = add i64 %69, 1
  store i64 %70, ptr %21, align 8, !tbaa !9
  br label %50, !llvm.loop !11

71:                                               ; preds = %46
  %72 = landingpad { ptr, i32 }
          cleanup
  %73 = extractvalue { ptr, i32 } %72, 0
  store ptr %73, ptr %18, align 8
  %74 = extractvalue { ptr, i32 } %72, 1
  store i32 %74, ptr %19, align 4
  br label %175

75:                                               ; preds = %79, %55
  %76 = landingpad { ptr, i32 }
          cleanup
  %77 = extractvalue { ptr, i32 } %76, 0
  store ptr %77, ptr %18, align 8
  %78 = extractvalue { ptr, i32 } %76, 1
  store i32 %78, ptr %19, align 4
  br label %174

79:                                               ; preds = %50
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = load i64, ptr %20, align 8, !tbaa !9
  %82 = sub i64 %81, 1
  %83 = load i64, ptr %20, align 8, !tbaa !9
  %84 = load i64, ptr %10, align 8, !tbaa !9
  %85 = sub i64 %84, 1
  %86 = load i64, ptr %10, align 8, !tbaa !9
  %87 = sub i64 %86, 1
  %88 = load i64, ptr %21, align 8, !tbaa !9
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %80, i64 noundef %82, i64 noundef %83, i64 noundef %85, i64 noundef %87, ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %88)
          to label %89 unwind label %75

89:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #6
  store i64 0, ptr %22, align 8, !tbaa !9
  br label %90

90:                                               ; preds = %166, %89
  %91 = load i64, ptr %22, align 8, !tbaa !9
  %92 = load i64, ptr %11, align 8, !tbaa !9
  %93 = icmp ult i64 %91, %92
  br i1 %93, label %95, label %94

94:                                               ; preds = %90
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  br label %173

95:                                               ; preds = %90
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #6
  %96 = load ptr, ptr %9, align 8, !tbaa !5
  %97 = load i64, ptr %12, align 8, !tbaa !9
  %98 = load i64, ptr %22, align 8, !tbaa !9
  %99 = add i64 %98, 1
  %100 = mul i64 %97, %99
  %101 = getelementptr inbounds i8, ptr %96, i64 %100
  store ptr %101, ptr %23, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #6
  %102 = load ptr, ptr %23, align 8, !tbaa !5
  %103 = load i64, ptr %12, align 8, !tbaa !9
  %104 = getelementptr inbounds i8, ptr %102, i64 %103
  store ptr %104, ptr %24, align 8, !tbaa !5
  %105 = load i64, ptr %22, align 8, !tbaa !9
  %106 = load i64, ptr %11, align 8, !tbaa !9
  %107 = sub i64 %106, 2
  %108 = icmp uge i64 %105, %107
  br i1 %108, label %109, label %117

109:                                              ; preds = %95
  %110 = load ptr, ptr %9, align 8, !tbaa !5
  %111 = load i64, ptr %12, align 8, !tbaa !9
  %112 = load i64, ptr %11, align 8, !tbaa !9
  %113 = sub i64 %112, 1
  %114 = mul i64 %111, %113
  %115 = getelementptr inbounds i8, ptr %110, i64 %114
  store ptr %115, ptr %23, align 8, !tbaa !5
  %116 = load ptr, ptr %23, align 8, !tbaa !5
  store ptr %116, ptr %24, align 8, !tbaa !5
  br label %117

117:                                              ; preds = %109, %95
  %118 = load ptr, ptr %23, align 8, !tbaa !5
  %119 = load ptr, ptr %24, align 8, !tbaa !5
  %120 = load ptr, ptr %13, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %118, ptr noundef %119, i64 noundef 0, i64 noundef 0, i64 noundef 1, i64 noundef 2, ptr noundef nonnull align 8 dereferenceable(24) %17, ptr noundef %120, i64 noundef 0)
          to label %121 unwind label %145

121:                                              ; preds = %117
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #6
  store i64 2, ptr %25, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #6
  store i64 1, ptr %26, align 8, !tbaa !9
  br label %122

122:                                              ; preds = %140, %121
  %123 = load i64, ptr %25, align 8, !tbaa !9
  %124 = load i64, ptr %10, align 8, !tbaa !9
  %125 = sub i64 %124, 2
  %126 = icmp ult i64 %123, %125
  br i1 %126, label %127, label %153

127:                                              ; preds = %122
  %128 = load ptr, ptr %23, align 8, !tbaa !5
  %129 = load ptr, ptr %24, align 8, !tbaa !5
  %130 = load i64, ptr %25, align 8, !tbaa !9
  %131 = sub i64 %130, 1
  %132 = load i64, ptr %25, align 8, !tbaa !9
  %133 = load i64, ptr %25, align 8, !tbaa !9
  %134 = add i64 %133, 1
  %135 = load i64, ptr %25, align 8, !tbaa !9
  %136 = add i64 %135, 2
  %137 = load ptr, ptr %13, align 8, !tbaa !5
  %138 = load i64, ptr %26, align 8, !tbaa !9
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %128, ptr noundef %129, i64 noundef %131, i64 noundef %132, i64 noundef %134, i64 noundef %136, ptr noundef nonnull align 8 dereferenceable(24) %17, ptr noundef %137, i64 noundef %138)
          to label %139 unwind label %149

139:                                              ; preds = %127
  br label %140

140:                                              ; preds = %139
  %141 = load i64, ptr %25, align 8, !tbaa !9
  %142 = add i64 %141, 2
  store i64 %142, ptr %25, align 8, !tbaa !9
  %143 = load i64, ptr %26, align 8, !tbaa !9
  %144 = add i64 %143, 1
  store i64 %144, ptr %26, align 8, !tbaa !9
  br label %122, !llvm.loop !13

145:                                              ; preds = %117
  %146 = landingpad { ptr, i32 }
          cleanup
  %147 = extractvalue { ptr, i32 } %146, 0
  store ptr %147, ptr %18, align 8
  %148 = extractvalue { ptr, i32 } %146, 1
  store i32 %148, ptr %19, align 4
  br label %172

149:                                              ; preds = %153, %127
  %150 = landingpad { ptr, i32 }
          cleanup
  %151 = extractvalue { ptr, i32 } %150, 0
  store ptr %151, ptr %18, align 8
  %152 = extractvalue { ptr, i32 } %150, 1
  store i32 %152, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #6
  br label %172

153:                                              ; preds = %122
  %154 = load ptr, ptr %23, align 8, !tbaa !5
  %155 = load ptr, ptr %24, align 8, !tbaa !5
  %156 = load i64, ptr %25, align 8, !tbaa !9
  %157 = sub i64 %156, 1
  %158 = load i64, ptr %25, align 8, !tbaa !9
  %159 = load i64, ptr %10, align 8, !tbaa !9
  %160 = sub i64 %159, 1
  %161 = load i64, ptr %10, align 8, !tbaa !9
  %162 = sub i64 %161, 1
  %163 = load ptr, ptr %13, align 8, !tbaa !5
  %164 = load i64, ptr %26, align 8, !tbaa !9
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %154, ptr noundef %155, i64 noundef %157, i64 noundef %158, i64 noundef %160, i64 noundef %162, ptr noundef nonnull align 8 dereferenceable(24) %17, ptr noundef %163, i64 noundef %164)
          to label %165 unwind label %149

165:                                              ; preds = %153
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  br label %166

166:                                              ; preds = %165
  %167 = load i64, ptr %22, align 8, !tbaa !9
  %168 = add i64 %167, 2
  store i64 %168, ptr %22, align 8, !tbaa !9
  %169 = load i64, ptr %16, align 8, !tbaa !9
  %170 = load ptr, ptr %13, align 8, !tbaa !5
  %171 = getelementptr inbounds i8, ptr %170, i64 %169
  store ptr %171, ptr %13, align 8, !tbaa !5
  br label %90, !llvm.loop !14

172:                                              ; preds = %149, %145
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  br label %174

173:                                              ; preds = %94
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  ret void

174:                                              ; preds = %172, %75
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %175

175:                                              ; preds = %174, %71
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  br label %176

176:                                              ; preds = %175
  %177 = load ptr, ptr %18, align 8
  %178 = load i32, ptr %19, align 4
  %179 = insertvalue { ptr, i32 } poison, ptr %177, 0
  %180 = insertvalue { ptr, i32 } %179, i32 %178, 1
  resume { ptr, i32 } %180
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Em(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare hidden void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare hidden void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Base::(anonymous namespace)::Buffer" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [83 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca %"struct.Simd::Base::(anonymous namespace)::Buffer", align 8
  %10 = add i64 %1, 1
  %11 = lshr i64 %10, 1
  %12 = icmp eq i64 %11, %5
  br i1 %12, label %13, label %.critedge

13:                                               ; preds = %8
  %14 = add i64 %2, 1
  %15 = lshr i64 %14, 1
  %16 = icmp eq i64 %15, %6
  %17 = icmp ugt i64 %1, 2
  %or.cond = and i1 %17, %16
  br i1 %or.cond, label %18, label %.critedge

.critedge:                                        ; preds = %13, %8
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 82, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base13ReduceGray4x4EPKhmmmPhmmm) #5
  unreachable

18:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %9) #6
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Em(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %5)
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %0, i64 noundef 0, i64 noundef 0, i64 noundef 1, i64 noundef 2, ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef 0)
          to label %.preheader84 unwind label %27

.preheader84:                                     ; preds = %18
  %19 = add i64 %1, -2
  %20 = icmp ugt i64 %19, 2
  br i1 %20, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader84, %24
  %.06896 = phi i64 [ %25, %24 ], [ 1, %.preheader84 ]
  %.06995 = phi i64 [ %23, %24 ], [ 2, %.preheader84 ]
  %21 = add i64 %.06995, -1
  %22 = or disjoint i64 %.06995, 1
  %23 = add nuw i64 %.06995, 2
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %0, i64 noundef %21, i64 noundef %.06995, i64 noundef %22, i64 noundef %23, ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %.06896)
          to label %24 unwind label %.loopexit85

24:                                               ; preds = %.lr.ph
  %25 = add i64 %.06896, 1
  %26 = icmp ult i64 %23, %19
  br i1 %26, label %.lr.ph, label %._crit_edge, !llvm.loop !5

27:                                               ; preds = %18
  %28 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit85:                                      ; preds = %.lr.ph
  %lpad.loopexit87 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp86:                             ; preds = %._crit_edge
  %lpad.loopexit.split-lp88 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

._crit_edge:                                      ; preds = %24, %.preheader84
  %.069.lcssa = phi i64 [ 2, %.preheader84 ], [ %23, %24 ]
  %.068.lcssa = phi i64 [ 1, %.preheader84 ], [ %25, %24 ]
  %29 = add i64 %.069.lcssa, -1
  %30 = add i64 %1, -1
  invoke void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef %0, i64 noundef %29, i64 noundef %.069.lcssa, i64 noundef %30, i64 noundef %30, ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %.068.lcssa)
          to label %.preheader83 unwind label %.loopexit.split-lp86

.preheader83:                                     ; preds = %._crit_edge
  %.not111 = icmp eq i64 %2, 0
  br i1 %.not111, label %._crit_edge108, label %.lr.ph107

.lr.ph107:                                        ; preds = %.preheader83
  %31 = add i64 %2, -2
  %32 = add i64 %2, -1
  %33 = mul i64 %32, %3
  %34 = getelementptr inbounds i8, ptr %0, i64 %33
  br i1 %20, label %.lr.ph107.split.us, label %.lr.ph107.split

.lr.ph107.split.us:                               ; preds = %.lr.ph107, %39
  %.067106.us = phi i64 [ %40, %39 ], [ 0, %.lr.ph107 ]
  %.074105.us = phi ptr [ %41, %39 ], [ %4, %.lr.ph107 ]
  %35 = or disjoint i64 %.067106.us, 1
  %36 = mul i64 %35, %3
  %37 = getelementptr inbounds i8, ptr %0, i64 %36
  %38 = getelementptr inbounds i8, ptr %37, i64 %3
  %.not.us = icmp ult i64 %.067106.us, %31
  %.066.us = select i1 %.not.us, ptr %37, ptr %34
  %.065.us = select i1 %.not.us, ptr %38, ptr %34
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %.066.us, ptr noundef %.065.us, i64 noundef 0, i64 noundef 0, i64 noundef 1, i64 noundef 2, ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef %.074105.us, i64 noundef 0)
          to label %.preheader.us unwind label %.split.us

39:                                               ; preds = %._crit_edge102.us
  %40 = add i64 %.067106.us, 2
  %41 = getelementptr inbounds i8, ptr %.074105.us, i64 %7
  %42 = icmp ult i64 %40, %2
  br i1 %42, label %.lr.ph107.split.us, label %._crit_edge108, !llvm.loop !7

.preheader.us:                                    ; preds = %.lr.ph107.split.us, %46
  %.0100.us = phi i64 [ %47, %46 ], [ 1, %.lr.ph107.split.us ]
  %.06499.us = phi i64 [ %45, %46 ], [ 2, %.lr.ph107.split.us ]
  %43 = add i64 %.06499.us, -1
  %44 = or disjoint i64 %.06499.us, 1
  %45 = add nuw i64 %.06499.us, 2
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %.066.us, ptr noundef %.065.us, i64 noundef %43, i64 noundef %.06499.us, i64 noundef %44, i64 noundef %45, ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef %.074105.us, i64 noundef %.0100.us)
          to label %46 unwind label %.loopexit.split.us

46:                                               ; preds = %.preheader.us
  %47 = add i64 %.0100.us, 1
  %48 = icmp ult i64 %45, %19
  br i1 %48, label %.preheader.us, label %._crit_edge102.us, !llvm.loop !8

._crit_edge102.us:                                ; preds = %46
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %.066.us, ptr noundef %.065.us, i64 noundef %44, i64 noundef %45, i64 noundef %30, i64 noundef %30, ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef %.074105.us, i64 noundef %47)
          to label %39 unwind label %.loopexit.split-lp.split.us

.split.us:                                        ; preds = %.lr.ph107.split.us
  %49 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.split.us:                      ; preds = %._crit_edge102.us
  %lpad.loopexit.split-lp.us = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split.us:                               ; preds = %.preheader.us
  %lpad.loopexit.us = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

._crit_edge108:                                   ; preds = %55, %39, %.preheader83
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %9) #6
  ret void

.lr.ph107.split:                                  ; preds = %.lr.ph107, %55
  %.067106 = phi i64 [ %56, %55 ], [ 0, %.lr.ph107 ]
  %.074105 = phi ptr [ %57, %55 ], [ %4, %.lr.ph107 ]
  %50 = or disjoint i64 %.067106, 1
  %51 = mul i64 %50, %3
  %52 = getelementptr inbounds i8, ptr %0, i64 %51
  %53 = getelementptr inbounds i8, ptr %52, i64 %3
  %.not = icmp ult i64 %.067106, %31
  %.066 = select i1 %.not, ptr %52, ptr %34
  %.065 = select i1 %.not, ptr %53, ptr %34
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %.066, ptr noundef %.065, i64 noundef 0, i64 noundef 0, i64 noundef 1, i64 noundef 2, ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef %.074105, i64 noundef 0)
          to label %.preheader unwind label %.split

.preheader:                                       ; preds = %.lr.ph107.split
  invoke void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef %.066, ptr noundef %.065, i64 noundef 1, i64 noundef 2, i64 noundef %30, i64 noundef %30, ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef %.074105, i64 noundef 1)
          to label %55 unwind label %.loopexit.split-lp.split

.split:                                           ; preds = %.lr.ph107.split
  %54 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.split:                         ; preds = %.preheader
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

55:                                               ; preds = %.preheader
  %56 = add i64 %.067106, 2
  %57 = getelementptr inbounds i8, ptr %.074105, i64 %7
  %58 = icmp ult i64 %56, %2
  br i1 %58, label %.lr.ph107.split, label %._crit_edge108, !llvm.loop !7

.loopexit.split-lp:                               ; preds = %.loopexit.split.us, %.loopexit.split-lp.split.us, %.loopexit.split-lp.split, %.split, %.split.us, %.loopexit85, %.loopexit.split-lp86, %27
  %.pn80.pn = phi { ptr, i32 } [ %28, %27 ], [ %lpad.loopexit87, %.loopexit85 ], [ %lpad.loopexit.split-lp88, %.loopexit.split-lp86 ], [ %54, %.split ], [ %49, %.split.us ], [ %lpad.loopexit.us, %.loopexit.split.us ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp.split ], [ %lpad.loopexit.split-lp.us, %.loopexit.split-lp.split.us ]
  call void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %9) #6
  resume { ptr, i32 } %.pn80.pn
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferC2Em(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare hidden void @_ZN4Simd4Base15ProcessFirstRowEPKhmmmmRNS0_12_GLOBAL__N_16BufferEm(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3

declare i32 @__gxx_personality_v0(...)

; Function Attrs: alwaysinline mustprogress uwtable
declare hidden void @_ZN4Simd4Base14ProcessMainRowEPKhS2_mmmmRNS0_12_GLOBAL__N_16BufferEPhm(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZN4Simd4Base12_GLOBAL__N_16BufferD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass