; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetMergedConvolution16b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"class.Simd::Base::SynetMergedConvolution16b" = type { %"class.Simd::SynetMergedConvolution16b", %"struct.Simd::MergConvParam", %"class.std::__cxx11::basic_string", i8, i8, i8, ptr, ptr, ptr, ptr, [2 x ptr], i64, i64, [4 x i64], %"struct.Simd::Base::SynetMergedConvolution16b::AlgParam", %"struct.Simd::Array", %"struct.Simd::Array.0", %"struct.Simd::Array.0", %"struct.Simd::Array.1", [3 x %"struct.Simd::Array.1"], [3 x %"struct.Simd::Array.1"] }
%"class.Simd::SynetMergedConvolution16b" = type { %"struct.Simd::Deletable" }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::MergConvParam" = type <{ [3 x %"struct.Simd::ConvParam"], i64, i32, [4 x i8] }>
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Base::SynetMergedConvolution16b::AlgParam" = type { i64, i64, i64, [3 x i64], [3 x i64], [3 x i64], [2 x i64], [3 x i64], [2 x i64] }
%"struct.Simd::Array" = type { ptr, i64 }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }

@.str.1 = external hidden unnamed_addr constant [95 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [38 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE = external hidden unnamed_addr constant [97 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(1024) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(180) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %16 = load ptr, ptr %4, align 8
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %17, i32 0, i32 0
  %19 = load i64, ptr %18, align 8, !tbaa !9
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %20, i32 0, i32 5
  %22 = load i64, ptr %21, align 8, !tbaa !15
  %23 = icmp eq i64 %19, %22
  br i1 %23, label %24, label %32

24:                                               ; preds = %3
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %25, i32 0, i32 0
  %27 = load i64, ptr %26, align 8, !tbaa !9
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %28, i32 0, i32 20
  %30 = load i64, ptr %29, align 8, !tbaa !16
  %31 = icmp eq i64 %27, %30
  br label %32

32:                                               ; preds = %24, %3
  %33 = phi i1 [ false, %3 ], [ %31, %24 ]
  br i1 %33, label %34, label %35

34:                                               ; preds = %32
  br label %37

35:                                               ; preds = %32
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.1, i32 noundef 456, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE) #5
  unreachable

36:                                               ; No predecessors!
  br label %37

37:                                               ; preds = %36, %34
  %38 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %16, i32 0, i32 14
  %39 = getelementptr inbounds %"struct.Simd::Base::SynetMergedConvolution16b::AlgParam", ptr %38, i32 0, i32 0
  %40 = load i64, ptr %39, align 8, !tbaa !17
  %41 = icmp ne i64 %40, 0
  br i1 %41, label %42, label %128

42:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %43, i32 0, i32 5
  %45 = load i64, ptr %44, align 8, !tbaa !15
  store i64 %45, ptr %7, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %46, i32 0, i32 10
  %48 = load i64, ptr %47, align 8, !tbaa !31
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %49, i32 0, i32 11
  %51 = load i64, ptr %50, align 8, !tbaa !32
  %52 = mul i64 %48, %51
  store i64 %52, ptr %8, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %53 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %16, i32 0, i32 14
  %54 = getelementptr inbounds %"struct.Simd::Base::SynetMergedConvolution16b::AlgParam", ptr %53, i32 0, i32 0
  %55 = load i64, ptr %54, align 8, !tbaa !17
  store i64 %55, ptr %9, align 8, !tbaa !30
  %56 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %16, i32 0, i32 18
  %57 = load i64, ptr %7, align 8, !tbaa !30
  %58 = load i64, ptr %9, align 8, !tbaa !30
  %59 = call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %57, i64 noundef %58)
  %60 = load i64, ptr %8, align 8, !tbaa !30
  %61 = mul i64 %59, %60
  call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %56, i64 noundef %61, i1 noundef zeroext false, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %62 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %16, i32 0, i32 18
  %63 = getelementptr inbounds %"struct.Simd::Array.1", ptr %62, i32 0, i32 0
  %64 = load ptr, ptr %63, align 8, !tbaa !33
  store ptr %64, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  store i64 0, ptr %11, align 8, !tbaa !30
  br label %65

65:                                               ; preds = %123, %42
  %66 = load i64, ptr %11, align 8, !tbaa !30
  %67 = load i64, ptr %7, align 8, !tbaa !30
  %68 = icmp ult i64 %66, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %65
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  br label %127

70:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %71 = load i64, ptr %9, align 8, !tbaa !30
  %72 = load i64, ptr %7, align 8, !tbaa !30
  %73 = load i64, ptr %11, align 8, !tbaa !30
  %74 = sub i64 %72, %73
  %75 = call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %71, i64 noundef %74)
  store i64 %75, ptr %13, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  store i64 0, ptr %14, align 8, !tbaa !30
  br label %76

76:                                               ; preds = %119, %70
  %77 = load i64, ptr %14, align 8, !tbaa !30
  %78 = load i64, ptr %8, align 8, !tbaa !30
  %79 = icmp ult i64 %77, %78
  br i1 %79, label %81, label %80

80:                                               ; preds = %76
  store i32 5, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  br label %122

81:                                               ; preds = %76
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  store i64 0, ptr %15, align 8, !tbaa !30
  br label %82

82:                                               ; preds = %100, %81
  %83 = load i64, ptr %15, align 8, !tbaa !30
  %84 = load i64, ptr %13, align 8, !tbaa !30
  %85 = icmp ult i64 %83, %84
  br i1 %85, label %86, label %103

86:                                               ; preds = %82
  %87 = load ptr, ptr %5, align 8, !tbaa !5
  %88 = load i64, ptr %14, align 8, !tbaa !30
  %89 = load i64, ptr %7, align 8, !tbaa !30
  %90 = mul i64 %88, %89
  %91 = load i64, ptr %11, align 8, !tbaa !30
  %92 = add i64 %90, %91
  %93 = load i64, ptr %15, align 8, !tbaa !30
  %94 = add i64 %92, %93
  %95 = getelementptr inbounds float, ptr %87, i64 %94
  %96 = load float, ptr %95, align 4, !tbaa !34
  %97 = load ptr, ptr %10, align 8, !tbaa !5
  %98 = load i64, ptr %15, align 8, !tbaa !30
  %99 = getelementptr inbounds float, ptr %97, i64 %98
  store float %96, ptr %99, align 4, !tbaa !34
  br label %100

100:                                              ; preds = %86
  %101 = load i64, ptr %15, align 8, !tbaa !30
  %102 = add i64 %101, 1
  store i64 %102, ptr %15, align 8, !tbaa !30
  br label %82, !llvm.loop !36

103:                                              ; preds = %82
  br label %104

104:                                              ; preds = %112, %103
  %105 = load i64, ptr %15, align 8, !tbaa !30
  %106 = load i64, ptr %9, align 8, !tbaa !30
  %107 = icmp ult i64 %105, %106
  br i1 %107, label %108, label %115

108:                                              ; preds = %104
  %109 = load ptr, ptr %10, align 8, !tbaa !5
  %110 = load i64, ptr %15, align 8, !tbaa !30
  %111 = getelementptr inbounds float, ptr %109, i64 %110
  store float 0.000000e+00, ptr %111, align 4, !tbaa !34
  br label %112

112:                                              ; preds = %108
  %113 = load i64, ptr %15, align 8, !tbaa !30
  %114 = add i64 %113, 1
  store i64 %114, ptr %15, align 8, !tbaa !30
  br label %104, !llvm.loop !38

115:                                              ; preds = %104
  %116 = load i64, ptr %9, align 8, !tbaa !30
  %117 = load ptr, ptr %10, align 8, !tbaa !5
  %118 = getelementptr inbounds float, ptr %117, i64 %116
  store ptr %118, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  br label %119

119:                                              ; preds = %115
  %120 = load i64, ptr %14, align 8, !tbaa !30
  %121 = add i64 %120, 1
  store i64 %121, ptr %14, align 8, !tbaa !30
  br label %76, !llvm.loop !39

122:                                              ; preds = %80
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  br label %123

123:                                              ; preds = %122
  %124 = load i64, ptr %9, align 8, !tbaa !30
  %125 = load i64, ptr %11, align 8, !tbaa !30
  %126 = add i64 %125, %124
  store i64 %126, ptr %11, align 8, !tbaa !30
  br label %65, !llvm.loop !40

127:                                              ; preds = %69
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  br label %150

128:                                              ; preds = %37
  %129 = getelementptr inbounds %"class.Simd::Base::SynetMergedConvolution16b", ptr %16, i32 0, i32 18
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = load ptr, ptr %6, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %131, i32 0, i32 10
  %133 = load i64, ptr %132, align 8, !tbaa !31
  %134 = load ptr, ptr %6, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %134, i32 0, i32 11
  %136 = load i64, ptr %135, align 8, !tbaa !32
  %137 = mul i64 %133, %136
  %138 = load ptr, ptr %6, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %138, i32 0, i32 0
  %140 = load i64, ptr %139, align 8, !tbaa !9
  %141 = mul i64 %137, %140
  %142 = load ptr, ptr %6, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %142, i32 0, i32 5
  %144 = load i64, ptr %143, align 8, !tbaa !15
  %145 = mul i64 %141, %144
  %146 = load ptr, ptr %6, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %146, i32 0, i32 20
  %148 = load i64, ptr %147, align 8, !tbaa !16
  %149 = udiv i64 %145, %148
  call void @_ZN4Simd5ArrayIfE6AssignEPKfm(ptr noundef nonnull align 8 dereferenceable(16) %129, ptr noundef %130, i64 noundef %149)
  br label %150

150:                                              ; preds = %128, %127
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6AssignEPKfm(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !13, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !14, i64 152}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!13 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!14 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!15 = !{!10, !11, i64 32}
!16 = !{!10, !11, i64 144}
!17 = !{!18, !11, i64 712}
!18 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16bE", !19, i64 0, !21, i64 8, !23, i64 576, !25, i64 608, !25, i64 609, !25, i64 610, !6, i64 616, !6, i64 624, !6, i64 632, !6, i64 640, !7, i64 648, !11, i64 664, !11, i64 672, !7, i64 680, !26, i64 712, !27, i64 864, !28, i64 880, !28, i64 896, !29, i64 912, !7, i64 928, !7, i64 976}
!19 = !{!"_ZTSN4Simd25SynetMergedConvolution16bE", !20, i64 0}
!20 = !{!"_ZTSN4Simd9DeletableE"}
!21 = !{!"_ZTSN4Simd13MergConvParamE", !7, i64 0, !11, i64 552, !22, i64 560}
!22 = !{!"_ZTS8SimdBool", !7, i64 0}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !11, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"bool", !7, i64 0}
!26 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16b8AlgParamE", !11, i64 0, !11, i64 8, !11, i64 16, !7, i64 24, !7, i64 48, !7, i64 72, !7, i64 96, !7, i64 112, !7, i64 136}
!27 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !11, i64 8}
!28 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !11, i64 8}
!29 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !11, i64 8}
!30 = !{!11, !11, i64 0}
!31 = !{!10, !11, i64 64}
!32 = !{!10, !11, i64 72}
!33 = !{!18, !6, i64 912}
!34 = !{!35, !35, i64 0}
!35 = !{!"float", !7, i64 0}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}
!38 = distinct !{!38, !37}
!39 = distinct !{!39, !37}
!40 = distinct !{!40, !37}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [95 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [38 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE = external hidden unnamed_addr constant [97 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE(ptr noundef nonnull align 8 dereferenceable(1024) %0, ptr noundef %1, ptr nocapture noundef nonnull readonly align 8 dereferenceable(180) %2) local_unnamed_addr #1 align 2 {
  %4 = load i64, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %2, i64 32
  %6 = load i64, ptr %5, align 8, !tbaa !13
  %7 = icmp eq i64 %4, %6
  %8 = getelementptr inbounds i8, ptr %2, i64 144
  %9 = load i64, ptr %8, align 8
  %10 = icmp eq i64 %4, %9
  %or.cond = select i1 %7, i1 %10, i1 false
  br i1 %or.cond, label %11, label %.critedge

.critedge:                                        ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.1, i32 noundef 456, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base25SynetMergedConvolution16b18SetDepthwiseWeightEPKfRKNS_9ConvParamE) #5
  unreachable

11:                                               ; preds = %3
  %12 = getelementptr inbounds i8, ptr %0, i64 712
  %13 = load i64, ptr %12, align 8, !tbaa !14
  %.not = icmp eq i64 %13, 0
  br i1 %.not, label %80, label %14

14:                                               ; preds = %11
  %15 = getelementptr inbounds i8, ptr %2, i64 64
  %16 = load i64, ptr %15, align 8, !tbaa !28
  %17 = getelementptr inbounds i8, ptr %2, i64 72
  %18 = load i64, ptr %17, align 8, !tbaa !29
  %19 = mul i64 %18, %16
  %.fr71 = freeze i64 %19
  %20 = getelementptr inbounds i8, ptr %0, i64 912
  %21 = tail call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %4, i64 noundef %13)
  %22 = mul i64 %21, %.fr71
  tail call void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %20, i64 noundef %22, i1 noundef zeroext false, i64 noundef 8)
  %.not70 = icmp eq i64 %4, 0
  br i1 %.not70, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %14
  %.not72 = icmp eq i64 %.fr71, 0
  br i1 %.not72, label %.lr.ph.split, label %.preheader51.lr.ph.us.preheader

.preheader51.lr.ph.us.preheader:                  ; preds = %.lr.ph
  %23 = load ptr, ptr %20, align 8, !tbaa !30
  %24 = shl i64 %13, 2
  %25 = mul i64 %.fr71, %13
  %26 = shl i64 %25, 2
  %27 = add i64 %.fr71, -1
  %28 = mul i64 %13, %27
  %29 = shl i64 %28, 2
  %30 = shl i64 %13, 2
  %31 = mul i64 %4, %27
  %32 = shl i64 %31, 2
  %33 = getelementptr i8, ptr %1, i64 %32
  %stride.check = icmp slt i64 %24, 0
  %.mask = and i64 %4, 2305843009213693952
  %stride.check89 = icmp ne i64 %.mask, 0
  br label %.preheader51.lr.ph.us

.preheader51.lr.ph.us:                            ; preds = %.preheader51.lr.ph.us.preheader, %._crit_edge57.us
  %indvar = phi i64 [ 0, %.preheader51.lr.ph.us.preheader ], [ %indvar.next, %._crit_edge57.us ]
  %.04460.us = phi ptr [ %23, %.preheader51.lr.ph.us.preheader ], [ %.us-phi.us, %._crit_edge57.us ]
  %.04659.us = phi i64 [ 0, %.preheader51.lr.ph.us.preheader ], [ %42, %._crit_edge57.us ]
  %34 = mul i64 %30, %indvar
  %scevgep86 = getelementptr i8, ptr %1, i64 %34
  %35 = sub i64 %4, %.04659.us
  %36 = tail call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %13, i64 noundef %35)
  %invariant.gep.us = getelementptr float, ptr %1, i64 %.04659.us
  %.not73 = icmp eq i64 %36, 0
  br i1 %.not73, label %.preheader51.us63.preheader, label %.preheader51.us.us.preheader

.preheader51.us.us.preheader:                     ; preds = %.preheader51.lr.ph.us
  %scevgep87 = getelementptr i8, ptr %33, i64 %34
  %37 = shl i64 %36, 2
  %38 = sub i64 %24, %37
  %39 = icmp ult i64 %36, %13
  %scevgep84 = getelementptr i8, ptr %.04460.us, i64 %29
  %scevgep85 = getelementptr i8, ptr %scevgep84, i64 %37
  %scevgep88 = getelementptr i8, ptr %scevgep87, i64 %37
  %min.iters.check = icmp ult i64 %36, 8
  %bound0 = icmp ult ptr %.04460.us, %scevgep88
  %bound1 = icmp ult ptr %scevgep86, %scevgep85
  %found.conflict = and i1 %bound0, %bound1
  %40 = or i1 %found.conflict, %stride.check
  %41 = or i1 %40, %stride.check89
  %n.vec = and i64 %36, -8
  %cmp.n = icmp eq i64 %36, %n.vec
  %xtraiter = and i64 %36, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader51.us.us

.preheader51.us63.preheader:                      ; preds = %.preheader51.lr.ph.us
  tail call void @llvm.memset.p0.i64(ptr align 4 %.04460.us, i8 0, i64 %26, i1 false), !tbaa !31
  %scevgep79 = getelementptr i8, ptr %.04460.us, i64 %26
  br label %._crit_edge57.us

._crit_edge57.us:                                 ; preds = %._crit_edge.us.us, %.preheader51.us63.preheader
  %.us-phi.us = phi ptr [ %scevgep79, %.preheader51.us63.preheader ], [ %58, %._crit_edge.us.us ]
  %42 = add i64 %.04659.us, %13
  %43 = icmp ult i64 %42, %4
  %indvar.next = add i64 %indvar, 1
  br i1 %43, label %.preheader51.lr.ph.us, label %.loopexit, !llvm.loop !33

.preheader51.us.us:                               ; preds = %.preheader51.us.us.preheader, %._crit_edge.us.us
  %.04356.us.us = phi i64 [ %59, %._crit_edge.us.us ], [ 0, %.preheader51.us.us.preheader ]
  %.14555.us.us = phi ptr [ %58, %._crit_edge.us.us ], [ %.04460.us, %.preheader51.us.us.preheader ]
  %44 = mul i64 %24, %.04356.us.us
  %45 = add i64 %37, %44
  %scevgep = getelementptr i8, ptr %.04460.us, i64 %45
  %46 = mul i64 %.04356.us.us, %4
  %gep.us.us = getelementptr float, ptr %invariant.gep.us, i64 %46
  %brmerge = select i1 %min.iters.check, i1 true, i1 %41
  br i1 %brmerge, label %scalar.ph.preheader, label %vector.body

scalar.ph.preheader:                              ; preds = %.preheader51.us.us, %middle.block
  %.052.us.us.ph = phi i64 [ 0, %.preheader51.us.us ], [ %n.vec, %middle.block ]
  br i1 %lcmp.mod.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol

scalar.ph.prol:                                   ; preds = %scalar.ph.preheader, %scalar.ph.prol
  %.052.us.us.prol = phi i64 [ %50, %scalar.ph.prol ], [ %.052.us.us.ph, %scalar.ph.preheader ]
  %prol.iter = phi i64 [ %prol.iter.next, %scalar.ph.prol ], [ 0, %scalar.ph.preheader ]
  %47 = getelementptr float, ptr %gep.us.us, i64 %.052.us.us.prol
  %48 = load float, ptr %47, align 4, !tbaa !31
  %49 = getelementptr inbounds float, ptr %.14555.us.us, i64 %.052.us.us.prol
  store float %48, ptr %49, align 4, !tbaa !31
  %50 = add nuw i64 %.052.us.us.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol, !llvm.loop !35

scalar.ph.prol.loopexit:                          ; preds = %scalar.ph.prol, %scalar.ph.preheader
  %.052.us.us.unr = phi i64 [ %.052.us.us.ph, %scalar.ph.preheader ], [ %50, %scalar.ph.prol ]
  %51 = sub i64 %.052.us.us.ph, %36
  %52 = icmp ugt i64 %51, -4
  br i1 %52, label %..preheader_crit_edge.us.us, label %scalar.ph

vector.body:                                      ; preds = %.preheader51.us.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader51.us.us ]
  %53 = getelementptr float, ptr %gep.us.us, i64 %index
  %54 = getelementptr i8, ptr %53, i64 16
  %wide.load = load <4 x float>, ptr %53, align 4, !tbaa !31, !alias.scope !37
  %wide.load90 = load <4 x float>, ptr %54, align 4, !tbaa !31, !alias.scope !37
  %55 = getelementptr inbounds float, ptr %.14555.us.us, i64 %index
  %56 = getelementptr inbounds i8, ptr %55, i64 16
  store <4 x float> %wide.load, ptr %55, align 4, !tbaa !31, !alias.scope !40, !noalias !37
  store <4 x float> %wide.load90, ptr %56, align 4, !tbaa !31, !alias.scope !40, !noalias !37
  %index.next = add nuw i64 %index, 8
  %57 = icmp eq i64 %index.next, %n.vec
  br i1 %57, label %middle.block, label %vector.body, !llvm.loop !42

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %..preheader_crit_edge.us.us, label %scalar.ph.preheader

._crit_edge.us.us:                                ; preds = %.lr.ph54.us.us.preheader, %..preheader_crit_edge.us.us
  %58 = getelementptr inbounds float, ptr %.14555.us.us, i64 %13
  %59 = add nuw i64 %.04356.us.us, 1
  %exitcond78.not = icmp eq i64 %59, %.fr71
  br i1 %exitcond78.not, label %._crit_edge57.us, label %.preheader51.us.us, !llvm.loop !45

scalar.ph:                                        ; preds = %scalar.ph.prol.loopexit, %scalar.ph
  %.052.us.us = phi i64 [ %75, %scalar.ph ], [ %.052.us.us.unr, %scalar.ph.prol.loopexit ]
  %60 = getelementptr float, ptr %gep.us.us, i64 %.052.us.us
  %61 = load float, ptr %60, align 4, !tbaa !31
  %62 = getelementptr inbounds float, ptr %.14555.us.us, i64 %.052.us.us
  store float %61, ptr %62, align 4, !tbaa !31
  %63 = add nuw i64 %.052.us.us, 1
  %64 = getelementptr float, ptr %gep.us.us, i64 %63
  %65 = load float, ptr %64, align 4, !tbaa !31
  %66 = getelementptr inbounds float, ptr %.14555.us.us, i64 %63
  store float %65, ptr %66, align 4, !tbaa !31
  %67 = add nuw i64 %.052.us.us, 2
  %68 = getelementptr float, ptr %gep.us.us, i64 %67
  %69 = load float, ptr %68, align 4, !tbaa !31
  %70 = getelementptr inbounds float, ptr %.14555.us.us, i64 %67
  store float %69, ptr %70, align 4, !tbaa !31
  %71 = add nuw i64 %.052.us.us, 3
  %72 = getelementptr float, ptr %gep.us.us, i64 %71
  %73 = load float, ptr %72, align 4, !tbaa !31
  %74 = getelementptr inbounds float, ptr %.14555.us.us, i64 %71
  store float %73, ptr %74, align 4, !tbaa !31
  %75 = add nuw i64 %.052.us.us, 4
  %exitcond.not.3 = icmp eq i64 %75, %36
  br i1 %exitcond.not.3, label %..preheader_crit_edge.us.us, label %scalar.ph, !llvm.loop !46

..preheader_crit_edge.us.us:                      ; preds = %scalar.ph.prol.loopexit, %scalar.ph, %middle.block
  br i1 %39, label %.lr.ph54.us.us.preheader, label %._crit_edge.us.us

.lr.ph54.us.us.preheader:                         ; preds = %..preheader_crit_edge.us.us
  tail call void @llvm.memset.p0.i64(ptr align 4 %scevgep, i8 0, i64 %38, i1 false), !tbaa !31
  br label %._crit_edge.us.us

.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
  %.04659 = phi i64 [ %78, %.lr.ph.split ], [ 0, %.lr.ph ]
  %76 = sub i64 %4, %.04659
  %77 = tail call noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef %13, i64 noundef %76)
  %78 = add i64 %.04659, %13
  %79 = icmp ult i64 %78, %4
  br i1 %79, label %.lr.ph.split, label %.loopexit, !llvm.loop !33

80:                                               ; preds = %11
  %81 = getelementptr inbounds i8, ptr %0, i64 912
  %82 = getelementptr inbounds i8, ptr %2, i64 64
  %83 = load i64, ptr %82, align 8, !tbaa !28
  %84 = getelementptr inbounds i8, ptr %2, i64 72
  %85 = load i64, ptr %84, align 8, !tbaa !29
  %86 = mul i64 %4, %4
  %87 = mul i64 %86, %83
  %88 = mul i64 %87, %85
  %89 = udiv i64 %88, %4
  tail call void @_ZN4Simd5ArrayIfE6AssignEPKfm(ptr noundef nonnull align 8 dereferenceable(16) %81, ptr noundef %1, i64 noundef %89)
  br label %.loopexit

.loopexit:                                        ; preds = %._crit_edge57.us, %.lr.ph.split, %14, %80
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MinImEET_S1_S1_(i64 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIfE6AssignEPKfm(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !10, i64 56, !11, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !12, i64 152}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!11 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!12 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!13 = !{!6, !7, i64 32}
!14 = !{!15, !7, i64 712}
!15 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16bE", !16, i64 0, !18, i64 8, !20, i64 576, !23, i64 608, !23, i64 609, !23, i64 610, !22, i64 616, !22, i64 624, !22, i64 632, !22, i64 640, !8, i64 648, !7, i64 664, !7, i64 672, !8, i64 680, !24, i64 712, !25, i64 864, !26, i64 880, !26, i64 896, !27, i64 912, !8, i64 928, !8, i64 976}
!16 = !{!"_ZTSN4Simd25SynetMergedConvolution16bE", !17, i64 0}
!17 = !{!"_ZTSN4Simd9DeletableE"}
!18 = !{!"_ZTSN4Simd13MergConvParamE", !8, i64 0, !7, i64 552, !19, i64 560}
!19 = !{!"_ZTS8SimdBool", !8, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !7, i64 8, !8, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !22, i64 0}
!22 = !{!"any pointer", !8, i64 0}
!23 = !{!"bool", !8, i64 0}
!24 = !{!"_ZTSN4Simd4Base25SynetMergedConvolution16b8AlgParamE", !7, i64 0, !7, i64 8, !7, i64 16, !8, i64 24, !8, i64 48, !8, i64 72, !8, i64 96, !8, i64 112, !8, i64 136}
!25 = !{!"_ZTSN4Simd5ArrayIhEE", !22, i64 0, !7, i64 8}
!26 = !{!"_ZTSN4Simd5ArrayItEE", !22, i64 0, !7, i64 8}
!27 = !{!"_ZTSN4Simd5ArrayIfEE", !22, i64 0, !7, i64 8}
!28 = !{!6, !7, i64 64}
!29 = !{!6, !7, i64 72}
!30 = !{!15, !22, i64 912}
!31 = !{!32, !32, i64 0}
!32 = !{!"float", !8, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.unroll.disable"}
!37 = !{!38}
!38 = distinct !{!38, !39}
!39 = distinct !{!39, !"LVerDomain"}
!40 = !{!41}
!41 = distinct !{!41, !39}
!42 = distinct !{!42, !34, !43, !44}
!43 = !{!"llvm.loop.isvectorized", i32 1}
!44 = !{!"llvm.loop.unroll.runtime.disable"}
!45 = distinct !{!45, !34}
!46 = distinct !{!46, !34, !43}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass