; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseBackground.ll (ZN4Simd4Base23BackgroundGrowRangeSlowEPKhmmmPhmS3_m)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base23BackgroundGrowRangeSlowEPKhmmmPhmS3_m(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !9
  store ptr %6, ptr %15, align 8, !tbaa !5
  store i64 %7, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #2
  store i64 0, ptr %17, align 8, !tbaa !9
  br label %20

20:                                               ; preds = %81, %8
  %21 = load i64, ptr %17, align 8, !tbaa !9
  %22 = load i64, ptr %12, align 8, !tbaa !9
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 2, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #2
  br label %84

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #2
  store i64 0, ptr %19, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %68, %25
  %27 = load i64, ptr %19, align 8, !tbaa !9
  %28 = load i64, ptr %11, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 5, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #2
  br label %71

31:                                               ; preds = %26
  %32 = load ptr, ptr %9, align 8, !tbaa !5
  %33 = load i64, ptr %19, align 8, !tbaa !9
  %34 = getelementptr inbounds i8, ptr %32, i64 %33
  %35 = load i8, ptr %34, align 1, !tbaa !11
  %36 = zext i8 %35 to i32
  %37 = load ptr, ptr %13, align 8, !tbaa !5
  %38 = load i64, ptr %19, align 8, !tbaa !9
  %39 = getelementptr inbounds i8, ptr %37, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !11
  %41 = zext i8 %40 to i32
  %42 = icmp slt i32 %36, %41
  br i1 %42, label %43, label %49

43:                                               ; preds = %31
  %44 = load ptr, ptr %13, align 8, !tbaa !5
  %45 = load i64, ptr %19, align 8, !tbaa !9
  %46 = getelementptr inbounds i8, ptr %44, i64 %45
  %47 = load i8, ptr %46, align 1, !tbaa !11
  %48 = add i8 %47, -1
  store i8 %48, ptr %46, align 1, !tbaa !11
  br label %49

49:                                               ; preds = %43, %31
  %50 = load ptr, ptr %9, align 8, !tbaa !5
  %51 = load i64, ptr %19, align 8, !tbaa !9
  %52 = getelementptr inbounds i8, ptr %50, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !11
  %54 = zext i8 %53 to i32
  %55 = load ptr, ptr %15, align 8, !tbaa !5
  %56 = load i64, ptr %19, align 8, !tbaa !9
  %57 = getelementptr inbounds i8, ptr %55, i64 %56
  %58 = load i8, ptr %57, align 1, !tbaa !11
  %59 = zext i8 %58 to i32
  %60 = icmp sgt i32 %54, %59
  br i1 %60, label %61, label %67

61:                                               ; preds = %49
  %62 = load ptr, ptr %15, align 8, !tbaa !5
  %63 = load i64, ptr %19, align 8, !tbaa !9
  %64 = getelementptr inbounds i8, ptr %62, i64 %63
  %65 = load i8, ptr %64, align 1, !tbaa !11
  %66 = add i8 %65, 1
  store i8 %66, ptr %64, align 1, !tbaa !11
  br label %67

67:                                               ; preds = %61, %49
  br label %68

68:                                               ; preds = %67
  %69 = load i64, ptr %19, align 8, !tbaa !9
  %70 = add i64 %69, 1
  store i64 %70, ptr %19, align 8, !tbaa !9
  br label %26, !llvm.loop !12

71:                                               ; preds = %30
  %72 = load i64, ptr %10, align 8, !tbaa !9
  %73 = load ptr, ptr %9, align 8, !tbaa !5
  %74 = getelementptr inbounds i8, ptr %73, i64 %72
  store ptr %74, ptr %9, align 8, !tbaa !5
  %75 = load i64, ptr %14, align 8, !tbaa !9
  %76 = load ptr, ptr %13, align 8, !tbaa !5
  %77 = getelementptr inbounds i8, ptr %76, i64 %75
  store ptr %77, ptr %13, align 8, !tbaa !5
  %78 = load i64, ptr %16, align 8, !tbaa !9
  %79 = load ptr, ptr %15, align 8, !tbaa !5
  %80 = getelementptr inbounds i8, ptr %79, i64 %78
  store ptr %80, ptr %15, align 8, !tbaa !5
  br label %81

81:                                               ; preds = %71
  %82 = load i64, ptr %17, align 8, !tbaa !9
  %83 = add i64 %82, 1
  store i64 %83, ptr %17, align 8, !tbaa !9
  br label %20, !llvm.loop !14

84:                                               ; preds = %24
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @_ZN4Simd4Base23BackgroundGrowRangeSlowEPKhmmmPhmS3_m(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef %4, i64 noundef %5, ptr nocapture noundef %6, i64 noundef %7) local_unnamed_addr #0 {
  %.not = icmp eq i64 %3, 0
  %.not33 = icmp eq i64 %2, 0
  %or.cond = or i1 %.not, %.not33
  br i1 %or.cond, label %._crit_edge32, label %.preheader.us

.preheader.us:                                    ; preds = %8, %._crit_edge.us
  %.02331.us = phi i64 [ %29, %._crit_edge.us ], [ 0, %8 ]
  %.02430.us = phi ptr [ %26, %._crit_edge.us ], [ %0, %8 ]
  %.02529.us = phi ptr [ %28, %._crit_edge.us ], [ %6, %8 ]
  %.02628.us = phi ptr [ %27, %._crit_edge.us ], [ %4, %8 ]
  br label %9

9:                                                ; preds = %.preheader.us, %24
  %.027.us = phi i64 [ 0, %.preheader.us ], [ %25, %24 ]
  %10 = getelementptr inbounds i8, ptr %.02430.us, i64 %.027.us
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %.02628.us, i64 %.027.us
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp ult i8 %11, %13
  br i1 %14, label %15, label %17

15:                                               ; preds = %9
  %16 = add i8 %13, -1
  store i8 %16, ptr %12, align 1, !tbaa !5
  %.pre = load i8, ptr %10, align 1, !tbaa !5
  br label %17

17:                                               ; preds = %15, %9
  %18 = phi i8 [ %.pre, %15 ], [ %11, %9 ]
  %19 = getelementptr inbounds i8, ptr %.02529.us, i64 %.027.us
  %20 = load i8, ptr %19, align 1, !tbaa !5
  %21 = icmp ugt i8 %18, %20
  br i1 %21, label %22, label %24

22:                                               ; preds = %17
  %23 = add nuw i8 %20, 1
  store i8 %23, ptr %19, align 1, !tbaa !5
  br label %24

24:                                               ; preds = %22, %17
  %25 = add nuw i64 %.027.us, 1
  %exitcond.not = icmp eq i64 %25, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %9, !llvm.loop !8

._crit_edge.us:                                   ; preds = %24
  %26 = getelementptr inbounds i8, ptr %.02430.us, i64 %1
  %27 = getelementptr inbounds i8, ptr %.02628.us, i64 %5
  %28 = getelementptr inbounds i8, ptr %.02529.us, i64 %7
  %29 = add nuw i64 %.02331.us, 1
  %exitcond35.not = icmp eq i64 %29, %3
  br i1 %exitcond35.not, label %._crit_edge32, label %.preheader.us, !llvm.loop !10

._crit_edge32:                                    ; preds = %._crit_edge.us, %8
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass