; LLVM IR from libxsmm/libxsmm :: src (generator_x86_instructions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [82 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vex_vvvv = external hidden unnamed_addr constant [16 x i8], align 16
@__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vl = external hidden unnamed_addr constant [2 x i8], align 1
@__func__.libxsmm_x86_instruction_vex_compute_3reg = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_x86_instruction_vex_compute_3reg(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #3 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca [16 x i8], align 16
  %21 = alloca [2 x i8], align 1
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  store i32 %5, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %24, i32 0, i32 2
  %26 = load i32, ptr %25, align 4, !tbaa !11
  store i32 %26, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !13
  store ptr %29, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %30 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %30, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %31 = load i32, ptr %13, align 4, !tbaa !9
  %32 = add i32 %31, 1
  store i32 %32, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = add i32 %33, 2
  store i32 %34, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %35 = load i32, ptr %13, align 4, !tbaa !9
  %36 = add i32 %35, 3
  store i32 %36, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  %37 = load i32, ptr %13, align 4, !tbaa !9
  %38 = add i32 %37, 4
  store i32 %38, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %20) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %20, ptr align 16 @__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vex_vvvv, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %21) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %21, ptr align 1 @__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vl, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = icmp ult i32 %39, 1
  br i1 %40, label %41, label %43

41:                                               ; preds = %6
  %42 = load i32, ptr %9, align 4, !tbaa !9
  br label %44

43:                                               ; preds = %6
  br label %44

44:                                               ; preds = %43, %41
  %45 = phi i32 [ %42, %41 ], [ 1, %43 ]
  store i32 %45, ptr %22, align 4, !tbaa !9
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %46, i32 0, i32 1
  %48 = load i32, ptr %47, align 8, !tbaa !14
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %49, i32 0, i32 2
  %51 = load i32, ptr %50, align 4, !tbaa !11
  %52 = sub i32 %48, %51
  %53 = icmp ult i32 %52, 20
  br i1 %53, label %54, label %63

54:                                               ; preds = %44
  %55 = load ptr, ptr %7, align 8, !tbaa !5
  %56 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %57 = icmp ult i32 1, %56
  br i1 %57, label %58, label %60

58:                                               ; preds = %54
  %59 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %61

60:                                               ; preds = %54
  br label %61

61:                                               ; preds = %60, %58
  %62 = phi i32 [ %59, %58 ], [ 1, %60 ]
  call void @libxsmm_handle_error(ptr noundef %55, i32 noundef 90002, ptr noundef @__func__.libxsmm_x86_instruction_vex_compute_3reg, ptr noundef @.str, i32 noundef 1310, i32 noundef %62)
  store i32 1, ptr %23, align 4
  br label %192

63:                                               ; preds = %44
  %64 = load ptr, ptr %14, align 8, !tbaa !5
  %65 = load i32, ptr %15, align 4, !tbaa !9
  %66 = zext i32 %65 to i64
  %67 = getelementptr inbounds i8, ptr %64, i64 %66
  store i8 -60, ptr %67, align 1, !tbaa !15
  %68 = load i32, ptr %8, align 4, !tbaa !9
  %69 = lshr i32 %68, 12
  %70 = and i32 %69, 15
  %71 = trunc i32 %70 to i8
  %72 = load ptr, ptr %14, align 8, !tbaa !5
  %73 = load i32, ptr %16, align 4, !tbaa !9
  %74 = zext i32 %73 to i64
  %75 = getelementptr inbounds i8, ptr %72, i64 %74
  store i8 %71, ptr %75, align 1, !tbaa !15
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = lshr i32 %76, 16
  %78 = and i32 %77, 131
  %79 = trunc i32 %78 to i8
  %80 = load ptr, ptr %14, align 8, !tbaa !5
  %81 = load i32, ptr %17, align 4, !tbaa !9
  %82 = zext i32 %81 to i64
  %83 = getelementptr inbounds i8, ptr %80, i64 %82
  store i8 %79, ptr %83, align 1, !tbaa !15
  %84 = load i32, ptr %8, align 4, !tbaa !9
  %85 = trunc i32 %84 to i8
  %86 = load ptr, ptr %14, align 8, !tbaa !5
  %87 = load i32, ptr %18, align 4, !tbaa !9
  %88 = zext i32 %87 to i64
  %89 = getelementptr inbounds i8, ptr %86, i64 %88
  store i8 %85, ptr %89, align 1, !tbaa !15
  %90 = load i32, ptr %12, align 4, !tbaa !9
  %91 = icmp ult i32 %90, 8
  %92 = zext i1 %91 to i64
  %93 = select i1 %91, i32 128, i32 0
  %94 = trunc i32 %93 to i8
  %95 = zext i8 %94 to i32
  %96 = load ptr, ptr %14, align 8, !tbaa !5
  %97 = load i32, ptr %16, align 4, !tbaa !9
  %98 = zext i32 %97 to i64
  %99 = getelementptr inbounds i8, ptr %96, i64 %98
  %100 = load i8, ptr %99, align 1, !tbaa !15
  %101 = zext i8 %100 to i32
  %102 = or i32 %101, %95
  %103 = trunc i32 %102 to i8
  store i8 %103, ptr %99, align 1, !tbaa !15
  %104 = load i32, ptr %10, align 4, !tbaa !9
  %105 = icmp ult i32 %104, 8
  %106 = zext i1 %105 to i64
  %107 = select i1 %105, i32 32, i32 0
  %108 = trunc i32 %107 to i8
  %109 = zext i8 %108 to i32
  %110 = load ptr, ptr %14, align 8, !tbaa !5
  %111 = load i32, ptr %16, align 4, !tbaa !9
  %112 = zext i32 %111 to i64
  %113 = getelementptr inbounds i8, ptr %110, i64 %112
  %114 = load i8, ptr %113, align 1, !tbaa !15
  %115 = zext i8 %114 to i32
  %116 = or i32 %115, %109
  %117 = trunc i32 %116 to i8
  store i8 %117, ptr %113, align 1, !tbaa !15
  %118 = load i32, ptr %11, align 4, !tbaa !9
  %119 = icmp ult i32 %118, 16
  br i1 %119, label %120, label %126

120:                                              ; preds = %63
  %121 = load i32, ptr %11, align 4, !tbaa !9
  %122 = zext i32 %121 to i64
  %123 = getelementptr inbounds [16 x i8], ptr %20, i64 0, i64 %122
  %124 = load i8, ptr %123, align 1, !tbaa !15
  %125 = zext i8 %124 to i32
  br label %130

126:                                              ; preds = %63
  %127 = getelementptr inbounds [16 x i8], ptr %20, i64 0, i64 0
  %128 = load i8, ptr %127, align 16, !tbaa !15
  %129 = zext i8 %128 to i32
  br label %130

130:                                              ; preds = %126, %120
  %131 = phi i32 [ %125, %120 ], [ %129, %126 ]
  %132 = trunc i32 %131 to i8
  %133 = zext i8 %132 to i32
  %134 = load ptr, ptr %14, align 8, !tbaa !5
  %135 = load i32, ptr %17, align 4, !tbaa !9
  %136 = zext i32 %135 to i64
  %137 = getelementptr inbounds i8, ptr %134, i64 %136
  %138 = load i8, ptr %137, align 1, !tbaa !15
  %139 = zext i8 %138 to i32
  %140 = or i32 %139, %133
  %141 = trunc i32 %140 to i8
  store i8 %141, ptr %137, align 1, !tbaa !15
  %142 = load i32, ptr %22, align 4, !tbaa !9
  %143 = zext i32 %142 to i64
  %144 = getelementptr inbounds [2 x i8], ptr %21, i64 0, i64 %143
  %145 = load i8, ptr %144, align 1, !tbaa !15
  %146 = zext i8 %145 to i32
  %147 = load ptr, ptr %14, align 8, !tbaa !5
  %148 = load i32, ptr %17, align 4, !tbaa !9
  %149 = zext i32 %148 to i64
  %150 = getelementptr inbounds i8, ptr %147, i64 %149
  %151 = load i8, ptr %150, align 1, !tbaa !15
  %152 = zext i8 %151 to i32
  %153 = or i32 %152, %146
  %154 = trunc i32 %153 to i8
  store i8 %154, ptr %150, align 1, !tbaa !15
  %155 = load ptr, ptr %14, align 8, !tbaa !5
  %156 = load i32, ptr %19, align 4, !tbaa !9
  %157 = zext i32 %156 to i64
  %158 = getelementptr inbounds i8, ptr %155, i64 %157
  store i8 -64, ptr %158, align 1, !tbaa !15
  %159 = load i32, ptr %12, align 4, !tbaa !9
  %160 = shl i32 %159, 3
  %161 = trunc i32 %160 to i8
  %162 = zext i8 %161 to i32
  %163 = and i32 %162, 56
  %164 = trunc i32 %163 to i8
  %165 = zext i8 %164 to i32
  %166 = load ptr, ptr %14, align 8, !tbaa !5
  %167 = load i32, ptr %19, align 4, !tbaa !9
  %168 = zext i32 %167 to i64
  %169 = getelementptr inbounds i8, ptr %166, i64 %168
  %170 = load i8, ptr %169, align 1, !tbaa !15
  %171 = zext i8 %170 to i32
  %172 = or i32 %171, %165
  %173 = trunc i32 %172 to i8
  store i8 %173, ptr %169, align 1, !tbaa !15
  %174 = load i32, ptr %10, align 4, !tbaa !9
  %175 = trunc i32 %174 to i8
  %176 = zext i8 %175 to i32
  %177 = and i32 %176, 7
  %178 = trunc i32 %177 to i8
  %179 = zext i8 %178 to i32
  %180 = load ptr, ptr %14, align 8, !tbaa !5
  %181 = load i32, ptr %19, align 4, !tbaa !9
  %182 = zext i32 %181 to i64
  %183 = getelementptr inbounds i8, ptr %180, i64 %182
  %184 = load i8, ptr %183, align 1, !tbaa !15
  %185 = zext i8 %184 to i32
  %186 = or i32 %185, %179
  %187 = trunc i32 %186 to i8
  store i8 %187, ptr %183, align 1, !tbaa !15
  %188 = load i32, ptr %13, align 4, !tbaa !9
  %189 = add i32 %188, 5
  %190 = load ptr, ptr %7, align 8, !tbaa !5
  %191 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %190, i32 0, i32 2
  store i32 %189, ptr %191, align 4, !tbaa !11
  store i32 0, ptr %23, align 4
  br label %192

192:                                              ; preds = %130, %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  %193 = load i32, ptr %23, align 4
  switch i32 %193, label %195 [
    i32 0, label %194
    i32 1, label %194
  ]

194:                                              ; preds = %192, %192
  ret void

195:                                              ; preds = %192
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = !{!12, !6, i64 0}
!14 = !{!12, !10, i64 8}
!15 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [82 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vex_vvvv = external hidden unnamed_addr constant [16 x i8], align 16
@__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vl = external hidden unnamed_addr constant [2 x i8], align 1
@__func__.libxsmm_x86_instruction_vex_compute_3reg = external hidden unnamed_addr constant [41 x i8], align 1

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_x86_instruction_vex_compute_3reg(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = getelementptr inbounds i8, ptr %0, i64 12
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load i32, ptr %9, align 8, !tbaa !11
  %11 = sub i32 %10, %8
  %12 = icmp ult i32 %11, 20
  br i1 %12, label %13, label %18

13:                                               ; preds = %6
  %14 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !12
  %15 = icmp ugt i32 %14, 1
  %16 = load i32, ptr @libxsmm_verbosity, align 4
  %17 = select i1 %15, i32 %16, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90002, ptr noundef nonnull @__func__.libxsmm_x86_instruction_vex_compute_3reg, ptr noundef nonnull @.str, i32 noundef 1310, i32 noundef %17) #2
  br label %62

18:                                               ; preds = %6
  %19 = icmp ne i32 %2, 0
  %20 = add i32 %8, 4
  %21 = load ptr, ptr %0, align 8, !tbaa !13
  %22 = add i32 %8, 3
  %23 = add i32 %8, 2
  %24 = add i32 %8, 1
  %25 = zext i32 %8 to i64
  %26 = getelementptr inbounds i8, ptr %21, i64 %25
  store i8 -60, ptr %26, align 1, !tbaa !14
  %27 = lshr i32 %1, 12
  %28 = trunc i32 %27 to i8
  %29 = and i8 %28, 15
  %30 = zext i32 %24 to i64
  %31 = getelementptr inbounds i8, ptr %21, i64 %30
  %32 = lshr i32 %1, 16
  %33 = trunc i32 %32 to i8
  %34 = and i8 %33, -125
  %35 = zext i32 %23 to i64
  %36 = getelementptr inbounds i8, ptr %21, i64 %35
  %37 = trunc i32 %1 to i8
  %38 = zext i32 %22 to i64
  %39 = getelementptr inbounds i8, ptr %21, i64 %38
  store i8 %37, ptr %39, align 1, !tbaa !14
  %40 = icmp ult i32 %5, 8
  %41 = select i1 %40, i8 -128, i8 0
  %42 = icmp ult i32 %3, 8
  %43 = select i1 %42, i8 32, i8 0
  %44 = or disjoint i8 %43, %41
  %45 = or disjoint i8 %44, %29
  store i8 %45, ptr %31, align 1, !tbaa !14
  %46 = icmp ult i32 %4, 16
  %47 = zext nneg i32 %4 to i64
  %48 = getelementptr inbounds [16 x i8], ptr @__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vex_vvvv, i64 0, i64 %47
  %.in.in = select i1 %46, ptr %48, ptr @__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vex_vvvv
  %.in45 = load i8, ptr %.in.in, align 1, !tbaa !14
  %49 = or i8 %.in45, %34
  %50 = zext i1 %19 to i64
  %51 = getelementptr inbounds [2 x i8], ptr @__const.libxsmm_x86_instruction_vex_compute_3reg.tbl_vl, i64 0, i64 %50
  %52 = load i8, ptr %51, align 1, !tbaa !14
  %53 = or i8 %52, %49
  store i8 %53, ptr %36, align 1, !tbaa !14
  %54 = zext i32 %20 to i64
  %55 = getelementptr inbounds i8, ptr %21, i64 %54
  %56 = shl i32 %5, 3
  %57 = and i32 %3, 7
  %58 = or disjoint i32 %56, %57
  %59 = trunc i32 %58 to i8
  %60 = or i8 %59, -64
  store i8 %60, ptr %55, align 1, !tbaa !14
  %61 = add i32 %8, 5
  store i32 %61, ptr %7, align 4, !tbaa !5
  br label %62

62:                                               ; preds = %18, %13
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 12}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!10, !10, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass