; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_cvtbf16ps_sse_avx2_avx512(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !10
  store i32 %3, ptr %8, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %11, i32 0, i32 6
  %13 = load i32, ptr %12, align 4, !tbaa !12
  %14 = icmp ult i32 %13, 1005
  %15 = zext i1 %14 to i64
  %16 = select i1 %14, i32 -1610276829, i32 537208099
  store i32 %16, ptr %9, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %17, i32 0, i32 6
  %19 = load i32, ptr %18, align 4, !tbaa !12
  %20 = icmp ult i32 %19, 1005
  %21 = zext i1 %20 to i64
  %22 = select i1 %20, i32 -1804791694, i32 611128946
  store i32 %22, ptr %10, align 4, !tbaa !10
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i32, ptr %9, align 4, !tbaa !10
  %25 = load i8, ptr %6, align 1, !tbaa !9
  %26 = load i32, ptr %7, align 4, !tbaa !10
  %27 = load i32, ptr %8, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %23, i32 noundef %24, i8 noundef signext %25, i32 noundef %26, i32 noundef %27)
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %28, i32 0, i32 6
  %30 = load i32, ptr %29, align 4, !tbaa !12
  %31 = icmp ult i32 %30, 1005
  br i1 %31, label %32, label %37

32:                                               ; preds = %4
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = load i32, ptr %10, align 4, !tbaa !10
  %35 = load i8, ptr %6, align 1, !tbaa !9
  %36 = load i32, ptr %8, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_1reg_imm8(ptr noundef %33, i32 noundef %34, i8 noundef signext %35, i32 noundef %36, i32 noundef 16)
  br label %43

37:                                               ; preds = %4
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !10
  %40 = load i8, ptr %6, align 1, !tbaa !9
  %41 = load i32, ptr %8, align 4, !tbaa !10
  %42 = load i32, ptr %8, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %38, i32 noundef %39, i8 noundef signext %40, i32 noundef %41, i32 noundef %42, i32 noundef 16)
  br label %43

43:                                               ; preds = %37, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_1reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_cvtbf16ps_sse_avx2_avx512(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = getelementptr inbounds i8, ptr %0, i64 28
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = icmp ult i32 %6, 1005
  %8 = select i1 %7, i32 -1610276829, i32 537208099
  %9 = select i1 %7, i32 -1804791694, i32 611128946
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %0, i32 noundef %8, i8 noundef signext %1, i32 noundef %2, i32 noundef %3) #2
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = icmp ult i32 %10, 1005
  br i1 %11, label %12, label %13

12:                                               ; preds = %4
  tail call void @libxsmm_x86_instruction_vec_compute_1reg_imm8(ptr noundef nonnull %0, i32 noundef %9, i8 noundef signext %1, i32 noundef %3, i32 noundef 16) #2
  br label %14

13:                                               ; preds = %4
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef %9, i8 noundef signext %1, i32 noundef %3, i32 noundef %3, i32 noundef 16) #2
  br label %14

14:                                               ; preds = %13, %12
  ret void
}

declare void @libxsmm_x86_instruction_vec_compute_1reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass