; LLVM IR from abeaumont/competitive-programming :: kattis/froshweek.ll (Z1fii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@a = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z1fii(i32 noundef %0, i32 noundef %1) #1 personality ptr @__gxx_personality_v0 {
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca %"class.std::vector", align 8
  %9 = alloca %"class.std::allocator", align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %2
  store i64 0, ptr %3, align 8
  br label %148

20:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = add nsw i32 %21, %22
  %24 = sdiv i32 %23, 2
  store i32 %24, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !9
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = call noundef i64 @_Z1fii(i32 noundef %25, i32 noundef %26)
  %28 = load i64, ptr %7, align 8, !tbaa !9
  %29 = add nsw i64 %28, %27
  store i64 %29, ptr %7, align 8, !tbaa !9
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = call noundef i64 @_Z1fii(i32 noundef %31, i32 noundef %32)
  %34 = load i64, ptr %7, align 8, !tbaa !9
  %35 = add nsw i64 %34, %33
  store i64 %35, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %8) #3
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = sub nsw i32 %36, %37
  %39 = add nsw i32 %38, 1
  %40 = sext i32 %39 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %40, ptr noundef nonnull align 1 dereferenceable(1) %9)
          to label %41 unwind label %75

41:                                               ; preds = %20
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %42 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %42, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %96, %41
  %46 = load i32, ptr %12, align 4, !tbaa !5
  %47 = load i32, ptr %6, align 4, !tbaa !5
  %48 = icmp sle i32 %46, %47
  br i1 %48, label %49, label %53

49:                                               ; preds = %45
  %50 = load i32, ptr %13, align 4, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = icmp sle i32 %50, %51
  br label %53

53:                                               ; preds = %49, %45
  %54 = phi i1 [ false, %45 ], [ %52, %49 ]
  br i1 %54, label %55, label %97

55:                                               ; preds = %53
  %56 = load i32, ptr %12, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %57) #3
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = load i32, ptr %13, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %61) #3
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp slt i32 %59, %63
  br i1 %64, label %65, label %79

65:                                               ; preds = %55
  %66 = load i32, ptr %12, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %12, align 4, !tbaa !5
  %68 = sext i32 %66 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %68) #3
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = load i32, ptr %14, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %14, align 4, !tbaa !5
  %73 = sext i32 %71 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %73) #3
  store i32 %70, ptr %74, align 4, !tbaa !5
  br label %96

75:                                               ; preds = %20
  %76 = landingpad { ptr, i32 }
          cleanup
  %77 = extractvalue { ptr, i32 } %76, 0
  store ptr %77, ptr %10, align 8
  %78 = extractvalue { ptr, i32 } %76, 1
  store i32 %78, ptr %11, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %150

79:                                               ; preds = %55
  %80 = load i32, ptr %13, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %13, align 4, !tbaa !5
  %82 = sext i32 %80 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %82) #3
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = load i32, ptr %14, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %14, align 4, !tbaa !5
  %87 = sext i32 %85 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %87) #3
  store i32 %84, ptr %88, align 4, !tbaa !5
  %89 = load i32, ptr %6, align 4, !tbaa !5
  %90 = load i32, ptr %12, align 4, !tbaa !5
  %91 = sub nsw i32 %89, %90
  %92 = add nsw i32 %91, 1
  %93 = sext i32 %92 to i64
  %94 = load i64, ptr %7, align 8, !tbaa !9
  %95 = add nsw i64 %94, %93
  store i64 %95, ptr %7, align 8, !tbaa !9
  br label %96

96:                                               ; preds = %79, %65
  br label %45, !llvm.loop !11

97:                                               ; preds = %53
  br label %98

98:                                               ; preds = %102, %97
  %99 = load i32, ptr %12, align 4, !tbaa !5
  %100 = load i32, ptr %6, align 4, !tbaa !5
  %101 = icmp sle i32 %99, %100
  br i1 %101, label %102, label %112

102:                                              ; preds = %98
  %103 = load i32, ptr %12, align 4, !tbaa !5
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %12, align 4, !tbaa !5
  %105 = sext i32 %103 to i64
  %106 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %105) #3
  %107 = load i32, ptr %106, align 4, !tbaa !5
  %108 = load i32, ptr %14, align 4, !tbaa !5
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %14, align 4, !tbaa !5
  %110 = sext i32 %108 to i64
  %111 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %110) #3
  store i32 %107, ptr %111, align 4, !tbaa !5
  br label %98, !llvm.loop !13

112:                                              ; preds = %98
  br label %113

113:                                              ; preds = %117, %112
  %114 = load i32, ptr %13, align 4, !tbaa !5
  %115 = load i32, ptr %5, align 4, !tbaa !5
  %116 = icmp sle i32 %114, %115
  br i1 %116, label %117, label %127

117:                                              ; preds = %113
  %118 = load i32, ptr %13, align 4, !tbaa !5
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %13, align 4, !tbaa !5
  %120 = sext i32 %118 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %120) #3
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = load i32, ptr %14, align 4, !tbaa !5
  %124 = add nsw i32 %123, 1
  store i32 %124, ptr %14, align 4, !tbaa !5
  %125 = sext i32 %123 to i64
  %126 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %125) #3
  store i32 %122, ptr %126, align 4, !tbaa !5
  br label %113, !llvm.loop !14

127:                                              ; preds = %113
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %128

128:                                              ; preds = %143, %127
  %129 = load i32, ptr %15, align 4, !tbaa !5
  %130 = load i32, ptr %14, align 4, !tbaa !5
  %131 = icmp slt i32 %129, %130
  br i1 %131, label %133, label %132

132:                                              ; preds = %128
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %146

133:                                              ; preds = %128
  %134 = load i32, ptr %15, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %135) #3
  %137 = load i32, ptr %136, align 4, !tbaa !5
  %138 = load i32, ptr %4, align 4, !tbaa !5
  %139 = load i32, ptr %15, align 4, !tbaa !5
  %140 = add nsw i32 %138, %139
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %141) #3
  store i32 %137, ptr %142, align 4, !tbaa !5
  br label %143

143:                                              ; preds = %133
  %144 = load i32, ptr %15, align 4, !tbaa !5
  %145 = add nsw i32 %144, 1
  store i32 %145, ptr %15, align 4, !tbaa !5
  br label %128, !llvm.loop !15

146:                                              ; preds = %132
  %147 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %147, ptr %3, align 8
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %148

148:                                              ; preds = %146, %19
  %149 = load i64, ptr %3, align 8
  ret i64 %149

150:                                              ; preds = %75
  %151 = load ptr, ptr %10, align 8
  %152 = load i32, ptr %11, align 4
  %153 = insertvalue { ptr, i32 } poison, ptr %151, 0
  %154 = insertvalue { ptr, i32 } %153, i32 %152, 1
  resume { ptr, i32 } %154
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@a = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z1fii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca %"class.std::allocator", align 1
  %5 = icmp eq i32 %0, %1
  br i1 %5, label %64, label %6

6:                                                ; preds = %2
  %7 = add nsw i32 %1, %0
  %8 = sdiv i32 %7, 2
  %9 = tail call noundef i64 @_Z1fii(i32 noundef %0, i32 noundef %8)
  %10 = add nsw i32 %8, 1
  %11 = tail call noundef i64 @_Z1fii(i32 noundef %10, i32 noundef %1)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
  %reass.sub = sub i32 %1, %0
  %12 = add i32 %reass.sub, 1
  %13 = sext i32 %12 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %13, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %14 unwind label %34

14:                                               ; preds = %6
  %15 = add nsw i64 %11, %9
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #3
  %16 = icmp sge i32 %8, %0
  %17 = icmp slt i32 %8, %1
  %18 = and i1 %16, %17
  br i1 %18, label %.lr.ph, label %.preheader59

.preheader59.loopexit:                            ; preds = %44
  %19 = trunc nuw i64 %indvars.iv.next to i32
  br label %.preheader59

.preheader59:                                     ; preds = %.preheader59.loopexit, %14
  %.052.lcssa = phi i64 [ %15, %14 ], [ %.153, %.preheader59.loopexit ]
  %.048.lcssa = phi i32 [ %0, %14 ], [ %.149, %.preheader59.loopexit ]
  %.045.lcssa = phi i32 [ %10, %14 ], [ %.146, %.preheader59.loopexit ]
  %.044.lcssa = phi i32 [ 0, %14 ], [ %19, %.preheader59.loopexit ]
  %.not67 = icmp sgt i32 %.048.lcssa, %8
  br i1 %.not67, label %.preheader58, label %.lr.ph70.preheader

.lr.ph70.preheader:                               ; preds = %.preheader59
  %20 = zext i32 %.044.lcssa to i64
  %21 = sext i32 %.048.lcssa to i64
  br label %.lr.ph70

.lr.ph:                                           ; preds = %14, %44
  %indvars.iv = phi i64 [ %indvars.iv.next, %44 ], [ 0, %14 ]
  %.04562 = phi i32 [ %.146, %44 ], [ %10, %14 ]
  %.04861 = phi i32 [ %.149, %44 ], [ %0, %14 ]
  %.05260 = phi i64 [ %.153, %44 ], [ %15, %14 ]
  %22 = sext i32 %.04861 to i64
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %22) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = sext i32 %.04562 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %25) #3
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp slt i32 %24, %27
  br i1 %28, label %29, label %36

29:                                               ; preds = %.lr.ph
  %30 = add nsw i32 %.04861, 1
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %22) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv) #3
  store i32 %32, ptr %33, align 4, !tbaa !5
  br label %44

34:                                               ; preds = %6
  %35 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
  resume { ptr, i32 } %35

36:                                               ; preds = %.lr.ph
  %37 = add nsw i32 %.04562, 1
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %25) #3
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv) #3
  store i32 %39, ptr %40, align 4, !tbaa !5
  %41 = sub i32 %10, %.04861
  %42 = sext i32 %41 to i64
  %43 = add nsw i64 %.05260, %42
  br label %44

44:                                               ; preds = %36, %29
  %.153 = phi i64 [ %.05260, %29 ], [ %43, %36 ]
  %.149 = phi i32 [ %30, %29 ], [ %.04861, %36 ]
  %.146 = phi i32 [ %.04562, %29 ], [ %37, %36 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %45 = icmp sle i32 %.149, %8
  %46 = icmp sle i32 %.146, %1
  %47 = select i1 %45, i1 %46, i1 false
  br i1 %47, label %.lr.ph, label %.preheader59.loopexit, !llvm.loop !9

.preheader58.loopexit:                            ; preds = %.lr.ph70
  %48 = trunc nuw i64 %indvars.iv.next82 to i32
  br label %.preheader58

.preheader58:                                     ; preds = %.preheader58.loopexit, %.preheader59
  %.2.lcssa = phi i32 [ %.044.lcssa, %.preheader59 ], [ %48, %.preheader58.loopexit ]
  %.not5772 = icmp sgt i32 %.045.lcssa, %1
  br i1 %.not5772, label %.preheader, label %.lr.ph75.preheader

.lr.ph75.preheader:                               ; preds = %.preheader58
  %49 = zext i32 %.2.lcssa to i64
  %50 = sext i32 %.045.lcssa to i64
  %51 = add i32 %1, 1
  br label %.lr.ph75

.lr.ph70:                                         ; preds = %.lr.ph70.preheader, %.lr.ph70
  %indvars.iv83 = phi i64 [ %21, %.lr.ph70.preheader ], [ %indvars.iv.next84, %.lr.ph70 ]
  %indvars.iv81 = phi i64 [ %20, %.lr.ph70.preheader ], [ %indvars.iv.next82, %.lr.ph70 ]
  %indvars.iv.next84 = add nsw i64 %indvars.iv83, 1
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv83) #3
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %indvars.iv.next82 = add nuw nsw i64 %indvars.iv81, 1
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv81) #3
  store i32 %53, ptr %54, align 4, !tbaa !5
  %lftr.wideiv = trunc i64 %indvars.iv.next84 to i32
  %exitcond.not = icmp eq i32 %10, %lftr.wideiv
  br i1 %exitcond.not, label %.preheader58.loopexit, label %.lr.ph70, !llvm.loop !11

.preheader.thread:                                ; preds = %.lr.ph75
  %55 = trunc nuw i64 %indvars.iv.next89 to i32
  br label %.lr.ph78.preheader

.preheader:                                       ; preds = %.preheader58
  %.not = icmp eq i32 %.2.lcssa, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph78.preheader

.lr.ph78.preheader:                               ; preds = %.preheader.thread, %.preheader
  %.3.lcssa103 = phi i32 [ %55, %.preheader.thread ], [ %.2.lcssa, %.preheader ]
  %56 = sext i32 %0 to i64
  %wide.trip.count = zext i32 %.3.lcssa103 to i64
  br label %.lr.ph78

.lr.ph75:                                         ; preds = %.lr.ph75.preheader, %.lr.ph75
  %indvars.iv90 = phi i64 [ %50, %.lr.ph75.preheader ], [ %indvars.iv.next91, %.lr.ph75 ]
  %indvars.iv88 = phi i64 [ %49, %.lr.ph75.preheader ], [ %indvars.iv.next89, %.lr.ph75 ]
  %indvars.iv.next91 = add nsw i64 %indvars.iv90, 1
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv90) #3
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %indvars.iv.next89 = add nuw nsw i64 %indvars.iv88, 1
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv88) #3
  store i32 %58, ptr %59, align 4, !tbaa !5
  %lftr.wideiv95 = trunc i64 %indvars.iv.next91 to i32
  %exitcond96.not = icmp eq i32 %51, %lftr.wideiv95
  br i1 %exitcond96.not, label %.preheader.thread, label %.lr.ph75, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph78, %.preheader
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
  br label %64

.lr.ph78:                                         ; preds = %.lr.ph78.preheader, %.lr.ph78
  %indvars.iv97 = phi i64 [ 0, %.lr.ph78.preheader ], [ %indvars.iv.next98, %.lr.ph78 ]
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv97) #3
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = add nsw i64 %indvars.iv97, %56
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %62) #3
  store i32 %61, ptr %63, align 4, !tbaa !5
  %indvars.iv.next98 = add nuw nsw i64 %indvars.iv97, 1
  %exitcond100.not = icmp eq i64 %indvars.iv.next98, %wide.trip.count
  br i1 %exitcond100.not, label %._crit_edge, label %.lr.ph78, !llvm.loop !13

64:                                               ; preds = %2, %._crit_edge
  %.051 = phi i64 [ %.052.lcssa, %._crit_edge ], [ 0, %2 ]
  ret i64 %.051
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass