; LLVM IR from libxsmm/libxsmm :: src (generator_common_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.libxsmm_generator_sme_transpose_64.l_vec_register_store = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @libxsmm_aarch64_instruction_sme_mov(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_sme_mova(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_sme_transpose_64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca [2 x i32], align 4
  %17 = alloca [2 x i32], align 4
  %18 = alloca [8 x i32], align 16
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  store i32 %5, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  %19 = load i32, ptr %11, align 4, !tbaa !9
  %20 = urem i32 %19, 16
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %6
  %23 = load i32, ptr %11, align 4, !tbaa !9
  %24 = udiv i32 %23, 16
  br label %29

25:                                               ; preds = %6
  %26 = load i32, ptr %11, align 4, !tbaa !9
  %27 = udiv i32 %26, 16
  %28 = add i32 %27, 1
  br label %29

29:                                               ; preds = %25, %22
  %30 = phi i32 [ %24, %22 ], [ %28, %25 ]
  store i32 %30, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  call void @llvm.memset.p0.i64(ptr align 4 %16, i8 0, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  call void @llvm.memset.p0.i64(ptr align 4 %17, i8 0, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 32, ptr %18) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %18, ptr align 16 @__const.libxsmm_generator_sme_transpose_64.l_vec_register_store, i64 32, i1 false)
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = icmp ugt i32 %31, 32
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  br label %36

34:                                               ; preds = %29
  %35 = load i32, ptr %11, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %34, %33
  %37 = phi i32 [ 32, %33 ], [ %35, %34 ]
  %38 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 0
  store i32 %37, ptr %38, align 4, !tbaa !9
  %39 = load i32, ptr %11, align 4, !tbaa !9
  %40 = icmp ugt i32 %39, 32
  br i1 %40, label %41, label %44

41:                                               ; preds = %36
  %42 = load i32, ptr %11, align 4, !tbaa !9
  %43 = sub i32 %42, 32
  br label %45

44:                                               ; preds = %36
  br label %45

45:                                               ; preds = %44, %41
  %46 = phi i32 [ %43, %41 ], [ 0, %44 ]
  %47 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 1
  store i32 %46, ptr %47, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = icmp ugt i32 %48, 0
  br i1 %49, label %50, label %55

50:                                               ; preds = %45
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = icmp ult i32 %51, 8
  br i1 %52, label %53, label %55

53:                                               ; preds = %50
  %54 = load i32, ptr %10, align 4, !tbaa !9
  br label %56

55:                                               ; preds = %50, %45
  br label %56

56:                                               ; preds = %55, %53
  %57 = phi i32 [ %54, %53 ], [ 8, %55 ]
  %58 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 0
  store i32 %57, ptr %58, align 4, !tbaa !9
  %59 = load i32, ptr %10, align 4, !tbaa !9
  %60 = icmp eq i32 %59, 0
  br i1 %60, label %61, label %63

61:                                               ; preds = %56
  %62 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 1
  store i32 8, ptr %62, align 4, !tbaa !9
  br label %73

63:                                               ; preds = %56
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = icmp ult i32 %64, 9
  br i1 %65, label %66, label %68

66:                                               ; preds = %63
  %67 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 1
  store i32 0, ptr %67, align 4, !tbaa !9
  br label %72

68:                                               ; preds = %63
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = sub i32 %69, 8
  %71 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 1
  store i32 %70, ptr %71, align 4, !tbaa !9
  br label %72

72:                                               ; preds = %68, %66
  br label %73

73:                                               ; preds = %72, %61
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %83, %73
  %75 = load i32, ptr %13, align 4, !tbaa !9
  %76 = load i32, ptr %15, align 4, !tbaa !9
  %77 = icmp ult i32 %75, %76
  br i1 %77, label %78, label %86

78:                                               ; preds = %74
  %79 = load ptr, ptr %7, align 8, !tbaa !5
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = add i32 12, %80
  %82 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef %79, i32 noundef 1384120320, i32 noundef %81, i8 noundef zeroext 0, i32 noundef %82)
  br label %83

83:                                               ; preds = %78
  %84 = load i32, ptr %13, align 4, !tbaa !9
  %85 = add i32 %84, 1
  store i32 %85, ptr %13, align 4, !tbaa !9
  br label %74, !llvm.loop !11

86:                                               ; preds = %74
  %87 = load ptr, ptr %7, align 8, !tbaa !5
  %88 = load i32, ptr %10, align 4, !tbaa !9
  %89 = icmp ugt i32 %88, 0
  br i1 %89, label %90, label %93

90:                                               ; preds = %86
  %91 = load i32, ptr %10, align 4, !tbaa !9
  %92 = mul nsw i32 %91, 4
  br label %94

93:                                               ; preds = %86
  br label %94

94:                                               ; preds = %93, %90
  %95 = phi i32 [ %92, %90 ], [ -1, %93 ]
  %96 = load i32, ptr %12, align 4, !tbaa !9
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %87, i32 noundef 0, i32 noundef %95, i32 noundef %96)
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %97

97:                                               ; preds = %113, %94
  %98 = load i32, ptr %14, align 4, !tbaa !9
  %99 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 0
  %100 = load i32, ptr %99, align 4, !tbaa !9
  %101 = icmp ult i32 %98, %100
  br i1 %101, label %102, label %116

102:                                              ; preds = %97
  %103 = load ptr, ptr %7, align 8, !tbaa !5
  %104 = load i32, ptr %8, align 4, !tbaa !9
  %105 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %103, i32 noundef -1522491258, i32 noundef %104, i32 noundef 127, i32 noundef 0, i32 noundef %105, i32 noundef 0)
  %106 = load ptr, ptr %7, align 8, !tbaa !5
  %107 = load i32, ptr %8, align 4, !tbaa !9
  %108 = load i32, ptr %12, align 4, !tbaa !9
  %109 = load i32, ptr %8, align 4, !tbaa !9
  %110 = load i32, ptr %9, align 4, !tbaa !9
  %111 = mul i32 %110, 4
  %112 = zext i32 %111 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %106, i32 noundef 4096, i32 noundef %107, i32 noundef %108, i32 noundef %109, i64 noundef %112)
  br label %113

113:                                              ; preds = %102
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = add i32 %114, 1
  store i32 %115, ptr %14, align 4, !tbaa !9
  br label %97, !llvm.loop !13

116:                                              ; preds = %97
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %117

117:                                              ; preds = %124, %116
  %118 = load i32, ptr %14, align 4, !tbaa !9
  %119 = icmp ult i32 %118, 4
  br i1 %119, label %120, label %127

120:                                              ; preds = %117
  %121 = load ptr, ptr %7, align 8, !tbaa !5
  %122 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %121, i32 noundef -1065090048, i32 noundef 0, i32 noundef 12, i32 noundef %122)
  %123 = load ptr, ptr %7, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %123, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0)
  br label %124

124:                                              ; preds = %120
  %125 = load i32, ptr %14, align 4, !tbaa !9
  %126 = add i32 %125, 1
  store i32 %126, ptr %14, align 4, !tbaa !9
  br label %117, !llvm.loop !14

127:                                              ; preds = %117
  %128 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 0
  %129 = load i32, ptr %128, align 4, !tbaa !9
  %130 = icmp ugt i32 %129, 16
  br i1 %130, label %131, label %143

131:                                              ; preds = %127
  store i32 4, ptr %14, align 4, !tbaa !9
  br label %132

132:                                              ; preds = %139, %131
  %133 = load i32, ptr %14, align 4, !tbaa !9
  %134 = icmp ult i32 %133, 8
  br i1 %134, label %135, label %142

135:                                              ; preds = %132
  %136 = load ptr, ptr %7, align 8, !tbaa !5
  %137 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %136, i32 noundef -1065090048, i32 noundef 1, i32 noundef 13, i32 noundef %137)
  %138 = load ptr, ptr %7, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %138, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0)
  br label %139

139:                                              ; preds = %135
  %140 = load i32, ptr %14, align 4, !tbaa !9
  %141 = add i32 %140, 1
  store i32 %141, ptr %14, align 4, !tbaa !9
  br label %132, !llvm.loop !15

142:                                              ; preds = %132
  br label %143

143:                                              ; preds = %142, %127
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %144

144:                                              ; preds = %160, %143
  %145 = load i32, ptr %14, align 4, !tbaa !9
  %146 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 1
  %147 = load i32, ptr %146, align 4, !tbaa !9
  %148 = icmp ult i32 %145, %147
  br i1 %148, label %149, label %163

149:                                              ; preds = %144
  %150 = load ptr, ptr %7, align 8, !tbaa !5
  %151 = load i32, ptr %8, align 4, !tbaa !9
  %152 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %150, i32 noundef -1522491258, i32 noundef %151, i32 noundef 127, i32 noundef 0, i32 noundef %152, i32 noundef 0)
  %153 = load ptr, ptr %7, align 8, !tbaa !5
  %154 = load i32, ptr %8, align 4, !tbaa !9
  %155 = load i32, ptr %12, align 4, !tbaa !9
  %156 = load i32, ptr %8, align 4, !tbaa !9
  %157 = load i32, ptr %9, align 4, !tbaa !9
  %158 = mul i32 %157, 4
  %159 = zext i32 %158 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %153, i32 noundef 4096, i32 noundef %154, i32 noundef %155, i32 noundef %156, i64 noundef %159)
  br label %160

160:                                              ; preds = %149
  %161 = load i32, ptr %14, align 4, !tbaa !9
  %162 = add i32 %161, 1
  store i32 %162, ptr %14, align 4, !tbaa !9
  br label %144, !llvm.loop !16

163:                                              ; preds = %144
  %164 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 1
  %165 = load i32, ptr %164, align 4, !tbaa !9
  %166 = icmp ugt i32 %165, 0
  br i1 %166, label %167, label %179

167:                                              ; preds = %163
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %168

168:                                              ; preds = %175, %167
  %169 = load i32, ptr %14, align 4, !tbaa !9
  %170 = icmp ult i32 %169, 4
  br i1 %170, label %171, label %178

171:                                              ; preds = %168
  %172 = load ptr, ptr %7, align 8, !tbaa !5
  %173 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %172, i32 noundef -1065090048, i32 noundef 2, i32 noundef 14, i32 noundef %173)
  %174 = load ptr, ptr %7, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %174, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0)
  br label %175

175:                                              ; preds = %171
  %176 = load i32, ptr %14, align 4, !tbaa !9
  %177 = add i32 %176, 1
  store i32 %177, ptr %14, align 4, !tbaa !9
  br label %168, !llvm.loop !17

178:                                              ; preds = %168
  br label %179

179:                                              ; preds = %178, %163
  %180 = getelementptr inbounds [2 x i32], ptr %17, i64 0, i64 1
  %181 = load i32, ptr %180, align 4, !tbaa !9
  %182 = icmp ugt i32 %181, 16
  br i1 %182, label %183, label %195

183:                                              ; preds = %179
  store i32 4, ptr %14, align 4, !tbaa !9
  br label %184

184:                                              ; preds = %191, %183
  %185 = load i32, ptr %14, align 4, !tbaa !9
  %186 = icmp ult i32 %185, 8
  br i1 %186, label %187, label %194

187:                                              ; preds = %184
  %188 = load ptr, ptr %7, align 8, !tbaa !5
  %189 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %188, i32 noundef -1065090048, i32 noundef 3, i32 noundef 15, i32 noundef %189)
  %190 = load ptr, ptr %7, align 8, !tbaa !5
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %190, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0)
  br label %191

191:                                              ; preds = %187
  %192 = load i32, ptr %14, align 4, !tbaa !9
  %193 = add i32 %192, 1
  store i32 %193, ptr %14, align 4, !tbaa !9
  br label %184, !llvm.loop !18

194:                                              ; preds = %184
  br label %195

195:                                              ; preds = %194, %179
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %196

196:                                              ; preds = %205, %195
  %197 = load i32, ptr %13, align 4, !tbaa !9
  %198 = load i32, ptr %15, align 4, !tbaa !9
  %199 = icmp ult i32 %197, %198
  br i1 %199, label %200, label %208

200:                                              ; preds = %196
  %201 = load ptr, ptr %7, align 8, !tbaa !5
  %202 = load i32, ptr %13, align 4, !tbaa !9
  %203 = add i32 12, %202
  %204 = load i32, ptr %13, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef %201, i32 noundef 1384120320, i32 noundef %203, i8 noundef zeroext 0, i32 noundef %204)
  br label %205

205:                                              ; preds = %200
  %206 = load i32, ptr %13, align 4, !tbaa !9
  %207 = add i32 %206, 1
  store i32 %207, ptr %13, align 4, !tbaa !9
  br label %196, !llvm.loop !19

208:                                              ; preds = %196
  %209 = load ptr, ptr %7, align 8, !tbaa !5
  %210 = load i32, ptr %8, align 4, !tbaa !9
  %211 = load i32, ptr %12, align 4, !tbaa !9
  %212 = load i32, ptr %8, align 4, !tbaa !9
  %213 = load i32, ptr %9, align 4, !tbaa !9
  %214 = load i32, ptr %11, align 4, !tbaa !9
  %215 = mul i32 %213, %214
  %216 = mul i32 %215, 4
  %217 = zext i32 %216 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %209, i32 noundef 4097, i32 noundef %210, i32 noundef %211, i32 noundef %212, i64 noundef %217)
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %218

218:                                              ; preds = %232, %208
  %219 = load i32, ptr %14, align 4, !tbaa !9
  %220 = icmp ult i32 %219, 4
  br i1 %220, label %221, label %235

221:                                              ; preds = %218
  %222 = load ptr, ptr %7, align 8, !tbaa !5
  %223 = load i32, ptr %14, align 4, !tbaa !9
  %224 = load i32, ptr %14, align 4, !tbaa !9
  %225 = add i32 12, %224
  %226 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %222, i32 noundef -1064926208, i32 noundef %223, i32 noundef %225, i32 noundef %226)
  %227 = load ptr, ptr %7, align 8, !tbaa !5
  %228 = load i32, ptr %14, align 4, !tbaa !9
  %229 = add i32 12, %228
  %230 = load i32, ptr %14, align 4, !tbaa !9
  %231 = add i32 12, %230
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %227, i32 noundef 285212678, i32 noundef %229, i32 noundef %231, i32 noundef 4, i8 noundef zeroext 0)
  br label %232

232:                                              ; preds = %221
  %233 = load i32, ptr %14, align 4, !tbaa !9
  %234 = add i32 %233, 1
  store i32 %234, ptr %14, align 4, !tbaa !9
  br label %218, !llvm.loop !20

235:                                              ; preds = %218
  store i32 4, ptr %14, align 4, !tbaa !9
  br label %236

236:                                              ; preds = %253, %235
  %237 = load i32, ptr %14, align 4, !tbaa !9
  %238 = icmp ult i32 %237, 8
  br i1 %238, label %239, label %256

239:                                              ; preds = %236
  %240 = load ptr, ptr %7, align 8, !tbaa !5
  %241 = load i32, ptr %14, align 4, !tbaa !9
  %242 = load i32, ptr %14, align 4, !tbaa !9
  %243 = sub i32 %242, 4
  %244 = add i32 12, %243
  %245 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %240, i32 noundef -1064926208, i32 noundef %241, i32 noundef %244, i32 noundef %245)
  %246 = load ptr, ptr %7, align 8, !tbaa !5
  %247 = load i32, ptr %14, align 4, !tbaa !9
  %248 = sub i32 %247, 4
  %249 = add i32 12, %248
  %250 = load i32, ptr %14, align 4, !tbaa !9
  %251 = sub i32 %250, 4
  %252 = add i32 12, %251
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %246, i32 noundef 285212678, i32 noundef %249, i32 noundef %252, i32 noundef 4, i8 noundef zeroext 0)
  br label %253

253:                                              ; preds = %239
  %254 = load i32, ptr %14, align 4, !tbaa !9
  %255 = add i32 %254, 1
  store i32 %255, ptr %14, align 4, !tbaa !9
  br label %236, !llvm.loop !21

256:                                              ; preds = %236
  %257 = load ptr, ptr %7, align 8, !tbaa !5
  %258 = load i32, ptr %11, align 4, !tbaa !9
  %259 = mul i32 %258, 4
  %260 = load i32, ptr %12, align 4, !tbaa !9
  call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %257, i32 noundef 8, i32 noundef %259, i32 noundef %260, i32 noundef 1)
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %261

261:                                              ; preds = %279, %256
  %262 = load i32, ptr %14, align 4, !tbaa !9
  %263 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 0
  %264 = load i32, ptr %263, align 4, !tbaa !9
  %265 = icmp ult i32 %262, %264
  br i1 %265, label %266, label %282

266:                                              ; preds = %261
  %267 = load ptr, ptr %7, align 8, !tbaa !5
  %268 = load i32, ptr %14, align 4, !tbaa !9
  %269 = zext i32 %268 to i64
  %270 = getelementptr inbounds [8 x i32], ptr %18, i64 0, i64 %269
  %271 = load i32, ptr %270, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mov(ptr noundef %267, i32 noundef -1587494912, i32 noundef %271, i32 noundef 63, i32 noundef 0, i32 noundef 8)
  %272 = load ptr, ptr %7, align 8, !tbaa !5
  %273 = load i32, ptr %12, align 4, !tbaa !9
  %274 = load i32, ptr %11, align 4, !tbaa !9
  %275 = icmp ugt i32 %274, 32
  %276 = zext i1 %275 to i64
  %277 = select i1 %275, i32 256, i32 128
  %278 = sext i32 %277 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %272, i32 noundef 4096, i32 noundef 63, i32 noundef %273, i32 noundef 63, i64 noundef %278)
  br label %279

279:                                              ; preds = %266
  %280 = load i32, ptr %14, align 4, !tbaa !9
  %281 = add i32 %280, 1
  store i32 %281, ptr %14, align 4, !tbaa !9
  br label %261, !llvm.loop !22

282:                                              ; preds = %261
  %283 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 1
  %284 = load i32, ptr %283, align 4, !tbaa !9
  %285 = icmp ugt i32 %284, 0
  br i1 %285, label %286, label %348

286:                                              ; preds = %282
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %287

287:                                              ; preds = %301, %286
  %288 = load i32, ptr %14, align 4, !tbaa !9
  %289 = icmp ult i32 %288, 4
  br i1 %289, label %290, label %304

290:                                              ; preds = %287
  %291 = load ptr, ptr %7, align 8, !tbaa !5
  %292 = load i32, ptr %14, align 4, !tbaa !9
  %293 = load i32, ptr %14, align 4, !tbaa !9
  %294 = add i32 12, %293
  %295 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %291, i32 noundef -1064926208, i32 noundef %292, i32 noundef %294, i32 noundef %295)
  %296 = load ptr, ptr %7, align 8, !tbaa !5
  %297 = load i32, ptr %14, align 4, !tbaa !9
  %298 = add i32 12, %297
  %299 = load i32, ptr %14, align 4, !tbaa !9
  %300 = add i32 12, %299
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %296, i32 noundef 285212678, i32 noundef %298, i32 noundef %300, i32 noundef 4, i8 noundef zeroext 0)
  br label %301

301:                                              ; preds = %290
  %302 = load i32, ptr %14, align 4, !tbaa !9
  %303 = add i32 %302, 1
  store i32 %303, ptr %14, align 4, !tbaa !9
  br label %287, !llvm.loop !23

304:                                              ; preds = %287
  store i32 4, ptr %14, align 4, !tbaa !9
  br label %305

305:                                              ; preds = %322, %304
  %306 = load i32, ptr %14, align 4, !tbaa !9
  %307 = icmp ult i32 %306, 8
  br i1 %307, label %308, label %325

308:                                              ; preds = %305
  %309 = load ptr, ptr %7, align 8, !tbaa !5
  %310 = load i32, ptr %14, align 4, !tbaa !9
  %311 = load i32, ptr %14, align 4, !tbaa !9
  %312 = sub i32 %311, 4
  %313 = add i32 12, %312
  %314 = load i32, ptr %14, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %309, i32 noundef -1064926208, i32 noundef %310, i32 noundef %313, i32 noundef %314)
  %315 = load ptr, ptr %7, align 8, !tbaa !5
  %316 = load i32, ptr %14, align 4, !tbaa !9
  %317 = sub i32 %316, 4
  %318 = add i32 12, %317
  %319 = load i32, ptr %14, align 4, !tbaa !9
  %320 = sub i32 %319, 4
  %321 = add i32 12, %320
  call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %315, i32 noundef 285212678, i32 noundef %318, i32 noundef %321, i32 noundef 4, i8 noundef zeroext 0)
  br label %322

322:                                              ; preds = %308
  %323 = load i32, ptr %14, align 4, !tbaa !9
  %324 = add i32 %323, 1
  store i32 %324, ptr %14, align 4, !tbaa !9
  br label %305, !llvm.loop !24

325:                                              ; preds = %305
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %326

326:                                              ; preds = %344, %325
  %327 = load i32, ptr %14, align 4, !tbaa !9
  %328 = getelementptr inbounds [2 x i32], ptr %16, i64 0, i64 1
  %329 = load i32, ptr %328, align 4, !tbaa !9
  %330 = icmp ult i32 %327, %329
  br i1 %330, label %331, label %347

331:                                              ; preds = %326
  %332 = load ptr, ptr %7, align 8, !tbaa !5
  %333 = load i32, ptr %14, align 4, !tbaa !9
  %334 = zext i32 %333 to i64
  %335 = getelementptr inbounds [8 x i32], ptr %18, i64 0, i64 %334
  %336 = load i32, ptr %335, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sme_mov(ptr noundef %332, i32 noundef -1587494912, i32 noundef %336, i32 noundef 63, i32 noundef 0, i32 noundef 8)
  %337 = load ptr, ptr %7, align 8, !tbaa !5
  %338 = load i32, ptr %12, align 4, !tbaa !9
  %339 = load i32, ptr %11, align 4, !tbaa !9
  %340 = icmp ugt i32 %339, 32
  %341 = zext i1 %340 to i64
  %342 = select i1 %340, i32 256, i32 128
  %343 = sext i32 %342 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %337, i32 noundef 4096, i32 noundef 63, i32 noundef %338, i32 noundef 63, i64 noundef %343)
  br label %344

344:                                              ; preds = %331
  %345 = load i32, ptr %14, align 4, !tbaa !9
  %346 = add i32 %345, 1
  store i32 %346, ptr %14, align 4, !tbaa !9
  br label %326, !llvm.loop !25

347:                                              ; preds = %326
  br label %348

348:                                              ; preds = %347, %282
  call void @llvm.lifetime.end.p0(i64 32, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}
!20 = distinct !{!20, !12}
!21 = distinct !{!21, !12}
!22 = distinct !{!22, !12}
!23 = distinct !{!23, !12}
!24 = distinct !{!24, !12}
!25 = distinct !{!25, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.libxsmm_generator_sme_transpose_64.l_vec_register_store = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sme_mov(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @libxsmm_aarch64_instruction_sme_mova(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_sme_transpose_64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = and i32 %4, 15
  %8 = icmp ne i32 %7, 0
  %9 = lshr i32 %4, 4
  %10 = zext i1 %8 to i32
  %11 = add nuw nsw i32 %9, %10
  %12 = icmp ugt i32 %4, 32
  %13 = tail call i32 @llvm.umin.i32(i32 %4, i32 32)
  %14 = tail call i32 @llvm.usub.sat.i32(i32 %4, i32 32)
  %.not = icmp eq i32 %3, 0
  %15 = add i32 %3, -1
  %or.cond = icmp ult i32 %15, 7
  %16 = select i1 %or.cond, i32 %3, i32 8
  %17 = icmp ult i32 %3, 9
  %18 = add i32 %3, -8
  %spec.select = select i1 %17, i32 0, i32 %18
  %.sroa.5.0 = select i1 %.not, i32 8, i32 %spec.select
  %.not177 = icmp eq i32 %11, 0
  br i1 %.not177, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %6, %.lr.ph
  %.0152 = phi i32 [ %20, %.lr.ph ], [ 0, %6 ]
  %19 = add nuw nsw i32 %.0152, 12
  tail call void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef %0, i32 noundef 1384120320, i32 noundef %19, i8 noundef zeroext 0, i32 noundef %.0152) #3
  %20 = add nuw nsw i32 %.0152, 1
  %exitcond.not = icmp eq i32 %20, %11
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %6
  %21 = shl nsw i32 %3, 2
  %22 = select i1 %.not, i32 -1, i32 %21
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %0, i32 noundef 0, i32 noundef %22, i32 noundef %5)
  %.not178 = icmp eq i32 %4, 0
  br i1 %.not178, label %.preheader151, label %.lr.ph155

.lr.ph155:                                        ; preds = %._crit_edge
  %23 = shl i32 %2, 2
  %24 = zext i32 %23 to i64
  br label %26

.preheader151:                                    ; preds = %26, %._crit_edge
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 0, i32 noundef 12, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 0, i32 noundef 12, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 0, i32 noundef 12, i32 noundef 2) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 0, i32 noundef 12, i32 noundef 3) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  %25 = icmp ugt i32 %4, 16
  br i1 %25, label %.loopexit150, label %.loopexit148

26:                                               ; preds = %.lr.ph155, %26
  %.0134153 = phi i32 [ 0, %.lr.ph155 ], [ %27, %26 ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1522491258, i32 noundef %1, i32 noundef 127, i32 noundef 0, i32 noundef %.0134153, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %1, i32 noundef %5, i32 noundef %1, i64 noundef %24) #3
  %27 = add nuw nsw i32 %.0134153, 1
  %exitcond182.not = icmp eq i32 %27, %13
  br i1 %exitcond182.not, label %.preheader151, label %26, !llvm.loop !7

.loopexit150:                                     ; preds = %.preheader151
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 1, i32 noundef 13, i32 noundef 4) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 1, i32 noundef 13, i32 noundef 5) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 1, i32 noundef 13, i32 noundef 6) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 1, i32 noundef 13, i32 noundef 7) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  %.not179 = icmp ult i32 %4, 33
  br i1 %.not179, label %.loopexit148, label %.lr.ph160

.lr.ph160:                                        ; preds = %.loopexit150
  %28 = shl i32 %2, 2
  %29 = zext i32 %28 to i64
  br label %30

30:                                               ; preds = %.lr.ph160, %30
  %.3158 = phi i32 [ 0, %.lr.ph160 ], [ %31, %30 ]
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef -1522491258, i32 noundef %1, i32 noundef 127, i32 noundef 0, i32 noundef %.3158, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %1, i32 noundef %5, i32 noundef %1, i64 noundef %29) #3
  %31 = add nuw i32 %.3158, 1
  %exitcond185.not = icmp eq i32 %31, %14
  br i1 %exitcond185.not, label %._crit_edge161, label %30, !llvm.loop !8

._crit_edge161:                                   ; preds = %30
  br i1 %.not179, label %.loopexit148, label %.preheader147.preheader

.preheader147.preheader:                          ; preds = %._crit_edge161
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 2, i32 noundef 14, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 2, i32 noundef 14, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 2, i32 noundef 14, i32 noundef 2) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 2, i32 noundef 14, i32 noundef 3) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  br label %.loopexit148

.loopexit148:                                     ; preds = %.preheader151, %.loopexit150, %.preheader147.preheader, %._crit_edge161
  %32 = icmp ugt i32 %14, 16
  br i1 %32, label %.preheader145.preheader, label %.loopexit146

.preheader145.preheader:                          ; preds = %.loopexit148
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 3, i32 noundef 15, i32 noundef 4) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 3, i32 noundef 15, i32 noundef 5) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 3, i32 noundef 15, i32 noundef 6) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1065090048, i32 noundef 3, i32 noundef 15, i32 noundef 7) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  br label %.loopexit146

.loopexit146:                                     ; preds = %.preheader145.preheader, %.loopexit148
  br i1 %.not177, label %._crit_edge167, label %.lr.ph166

.lr.ph166:                                        ; preds = %.loopexit146, %.lr.ph166
  %.1164 = phi i32 [ %34, %.lr.ph166 ], [ 0, %.loopexit146 ]
  %33 = add nuw nsw i32 %.1164, 12
  tail call void @libxsmm_aarch64_instruction_alu_move_imm16(ptr noundef %0, i32 noundef 1384120320, i32 noundef %33, i8 noundef zeroext 0, i32 noundef %.1164) #3
  %34 = add nuw nsw i32 %.1164, 1
  %exitcond188.not = icmp eq i32 %34, %11
  br i1 %exitcond188.not, label %._crit_edge167, label %.lr.ph166, !llvm.loop !9

._crit_edge167:                                   ; preds = %.lr.ph166, %.loopexit146
  %35 = shl i32 %2, 2
  %36 = mul i32 %35, %4
  %37 = zext i32 %36 to i64
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %1, i32 noundef %5, i32 noundef %1, i64 noundef %37) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 0, i32 noundef 12, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 1, i32 noundef 13, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 2, i32 noundef 14, i32 noundef 2) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 3, i32 noundef 15, i32 noundef 3) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 4, i32 noundef 12, i32 noundef 4) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 5, i32 noundef 13, i32 noundef 5) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 6, i32 noundef 14, i32 noundef 6) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 7, i32 noundef 15, i32 noundef 7) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  %38 = shl i32 %4, 2
  tail call void @libxsmm_generator_set_pn_register_aarch64_sve2(ptr noundef %0, i32 noundef 8, i32 noundef %38, i32 noundef %5, i32 noundef 1)
  %.not181 = icmp eq i32 %16, 0
  br i1 %.not181, label %._crit_edge173, label %.lr.ph172

.lr.ph172:                                        ; preds = %._crit_edge167
  %39 = select i1 %12, i64 256, i64 128
  %wide.trip.count = zext nneg i32 %16 to i64
  br label %40

40:                                               ; preds = %.lr.ph172, %40
  %indvars.iv = phi i64 [ 0, %.lr.ph172 ], [ %indvars.iv.next, %40 ]
  %41 = getelementptr inbounds [8 x i32], ptr @__const.libxsmm_generator_sme_transpose_64.l_vec_register_store, i64 0, i64 %indvars.iv
  %42 = load i32, ptr %41, align 4, !tbaa !10
  tail call void @libxsmm_aarch64_instruction_sme_mov(ptr noundef %0, i32 noundef -1587494912, i32 noundef %42, i32 noundef 63, i32 noundef 0, i32 noundef 8) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 63, i32 noundef %5, i32 noundef 63, i64 noundef %39) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond192.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond192.not, label %._crit_edge173, label %40, !llvm.loop !14

._crit_edge173:                                   ; preds = %40, %._crit_edge167
  %.not141 = icmp eq i32 %.sroa.5.0, 0
  br i1 %.not141, label %.loopexit, label %.preheader143.preheader

.preheader143.preheader:                          ; preds = %._crit_edge173
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 0, i32 noundef 12, i32 noundef 0) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 1, i32 noundef 13, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 2, i32 noundef 14, i32 noundef 2) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 3, i32 noundef 15, i32 noundef 3) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 4, i32 noundef 12, i32 noundef 4) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 12, i32 noundef 12, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 5, i32 noundef 13, i32 noundef 5) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 13, i32 noundef 13, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 6, i32 noundef 14, i32 noundef 6) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 14, i32 noundef 14, i32 noundef 4, i8 noundef zeroext 0) #3
  tail call void @libxsmm_aarch64_instruction_sme_mova(ptr noundef %0, i32 noundef -1064926208, i32 noundef 7, i32 noundef 15, i32 noundef 7) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm12(ptr noundef %0, i32 noundef 285212678, i32 noundef 15, i32 noundef 15, i32 noundef 4, i8 noundef zeroext 0) #3
  %43 = select i1 %12, i64 256, i64 128
  %wide.trip.count198 = zext i32 %.sroa.5.0 to i64
  br label %44

44:                                               ; preds = %.preheader143.preheader, %44
  %indvars.iv195 = phi i64 [ 0, %.preheader143.preheader ], [ %indvars.iv.next196, %44 ]
  %45 = getelementptr inbounds [8 x i32], ptr @__const.libxsmm_generator_sme_transpose_64.l_vec_register_store, i64 0, i64 %indvars.iv195
  %46 = load i32, ptr %45, align 4, !tbaa !10
  tail call void @libxsmm_aarch64_instruction_sme_mov(ptr noundef %0, i32 noundef -1587494912, i32 noundef %46, i32 noundef 63, i32 noundef 0, i32 noundef 8) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef 63, i32 noundef %5, i32 noundef 63, i64 noundef %43) #3
  %indvars.iv.next196 = add nuw nsw i64 %indvars.iv195, 1
  %exitcond199.not = icmp eq i64 %indvars.iv.next196, %wide.trip.count198
  br i1 %exitcond199.not, label %.loopexit, label %44, !llvm.loop !15

.loopexit:                                        ; preds = %44, %._crit_edge173
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.usub.sat.i32(i32, i32) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = distinct !{!9, !6}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C/C++ TBAA"}
!14 = distinct !{!14, !6}
!15 = distinct !{!15, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass