; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseStatistic.ll (ZN4Simd4Base8ValueSumEPKhmmmPm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base8ValueSumEPKhmmmPm(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  %15 = load ptr, ptr %10, align 8, !tbaa !5
  store i64 0, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %16

16:                                               ; preds = %47, %5
  %17 = load i64, ptr %11, align 8, !tbaa !9
  %18 = load i64, ptr %9, align 8, !tbaa !9
  %19 = icmp ult i64 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  br label %50

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 0, ptr %13, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  store i64 0, ptr %14, align 8, !tbaa !9
  br label %22

22:                                               ; preds = %35, %21
  %23 = load i64, ptr %14, align 8, !tbaa !9
  %24 = load i64, ptr %8, align 8, !tbaa !9
  %25 = icmp ult i64 %23, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %22
  store i32 5, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  br label %38

27:                                               ; preds = %22
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i64, ptr %14, align 8, !tbaa !9
  %30 = getelementptr inbounds i8, ptr %28, i64 %29
  %31 = load i8, ptr %30, align 1, !tbaa !13
  %32 = zext i8 %31 to i32
  %33 = load i32, ptr %13, align 4, !tbaa !11
  %34 = add nsw i32 %33, %32
  store i32 %34, ptr %13, align 4, !tbaa !11
  br label %35

35:                                               ; preds = %27
  %36 = load i64, ptr %14, align 8, !tbaa !9
  %37 = add i64 %36, 1
  store i64 %37, ptr %14, align 8, !tbaa !9
  br label %22, !llvm.loop !14

38:                                               ; preds = %26
  %39 = load i32, ptr %13, align 4, !tbaa !11
  %40 = sext i32 %39 to i64
  %41 = load ptr, ptr %10, align 8, !tbaa !5
  %42 = load i64, ptr %41, align 8, !tbaa !9
  %43 = add i64 %42, %40
  store i64 %43, ptr %41, align 8, !tbaa !9
  %44 = load i64, ptr %7, align 8, !tbaa !9
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = getelementptr inbounds i8, ptr %45, i64 %44
  store ptr %46, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %47

47:                                               ; preds = %38
  %48 = load i64, ptr %11, align 8, !tbaa !9
  %49 = add i64 %48, 1
  store i64 %49, ptr %11, align 8, !tbaa !9
  br label %16, !llvm.loop !16

50:                                               ; preds = %20
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @_ZN4Simd4Base8ValueSumEPKhmmmPm(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 {
  store i64 0, ptr %4, align 8, !tbaa !5
  %.not = icmp eq i64 %3, 0
  %.not21 = icmp eq i64 %2, 0
  %or.cond = or i1 %.not, %.not21
  br i1 %or.cond, label %._crit_edge20, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %5
  %min.iters.check = icmp ult i64 %2, 8
  %n.vec = and i64 %2, -8
  %cmp.n = icmp eq i64 %n.vec, %2
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %6 = phi i64 [ %21, %._crit_edge.us ], [ 0, %.preheader.us.preheader ]
  %.01419.us = phi i64 [ %23, %._crit_edge.us ], [ 0, %.preheader.us.preheader ]
  %.01518.us = phi ptr [ %22, %._crit_edge.us ], [ %0, %.preheader.us.preheader ]
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader.us ]
  %vec.phi = phi <4 x i32> [ %11, %vector.body ], [ zeroinitializer, %.preheader.us ]
  %vec.phi24 = phi <4 x i32> [ %12, %vector.body ], [ zeroinitializer, %.preheader.us ]
  %7 = getelementptr inbounds i8, ptr %.01518.us, i64 %index
  %8 = getelementptr inbounds i8, ptr %7, i64 4
  %wide.load = load <4 x i8>, ptr %7, align 1, !tbaa !9
  %wide.load25 = load <4 x i8>, ptr %8, align 1, !tbaa !9
  %9 = zext <4 x i8> %wide.load to <4 x i32>
  %10 = zext <4 x i8> %wide.load25 to <4 x i32>
  %11 = add <4 x i32> %vec.phi, %9
  %12 = add <4 x i32> %vec.phi24, %10
  %index.next = add nuw i64 %index, 8
  %13 = icmp eq i64 %index.next, %n.vec
  br i1 %13, label %middle.block, label %vector.body, !llvm.loop !10

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %12, %11
  %14 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us
  %.017.us.ph = phi i64 [ 0, %.preheader.us ], [ %n.vec, %middle.block ]
  %.01316.us.ph = phi i32 [ 0, %.preheader.us ], [ %14, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %.017.us = phi i64 [ %19, %scalar.ph ], [ %.017.us.ph, %scalar.ph.preheader ]
  %.01316.us = phi i32 [ %18, %scalar.ph ], [ %.01316.us.ph, %scalar.ph.preheader ]
  %15 = getelementptr inbounds i8, ptr %.01518.us, i64 %.017.us
  %16 = load i8, ptr %15, align 1, !tbaa !9
  %17 = zext i8 %16 to i32
  %18 = add nuw nsw i32 %.01316.us, %17
  %19 = add nuw i64 %.017.us, 1
  %exitcond.not = icmp eq i64 %19, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %scalar.ph, !llvm.loop !14

._crit_edge.us:                                   ; preds = %scalar.ph, %middle.block
  %.lcssa = phi i32 [ %14, %middle.block ], [ %18, %scalar.ph ]
  %20 = zext nneg i32 %.lcssa to i64
  %21 = add i64 %6, %20
  store i64 %21, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %.01518.us, i64 %1
  %23 = add nuw i64 %.01419.us, 1
  %exitcond23.not = icmp eq i64 %23, %3
  br i1 %exitcond23.not, label %._crit_edge20, label %.preheader.us, !llvm.loop !15

._crit_edge20:                                    ; preds = %._crit_edge.us, %5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11, !12, !13}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !11, !13, !12}
!15 = distinct !{!15, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass