; LLVM IR from NVIDIA/DALI :: dali/operators/generic (permute_batch)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::GPUBackend" = type { i8 }
%"class.dali::PermuteBatchBase.131" = type <{ %"class.dali::StatelessOperator.132", %"class.std::vector.114", i8, [7 x i8] }>
%"class.dali::StatelessOperator.132" = type { %"class.dali::Operator.133" }
%"class.dali::Operator.133" = type { %"class.dali::OperatorBase" }
%"class.dali::OperatorBase" = type { ptr, %"class.dali::OpSpec", i32, i32, %"class.std::unordered_map" }
%"class.dali::OpSpec" = type { %"class.std::__cxx11::basic_string", ptr, %"class.std::vector.84", %"class.std::map.28", %"class.std::vector.89", %"class.std::map.28", %"class.std::map.94", %"class.std::vector.99", %"class.std::vector.99", %"class.std::map.104" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.84" = type { %"struct.std::_Vector_base.85" }
%"struct.std::_Vector_base.85" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.89" = type { %"struct.std::_Vector_base.90" }
%"struct.std::_Vector_base.90" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.28" = type { %"class.std::_Rb_tree.29" }
%"class.std::_Rb_tree.29" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.94" = type { %"class.std::_Rb_tree.95" }
%"class.std::_Rb_tree.95" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.99" = type { %"struct.std::_Vector_base.100" }
%"struct.std::_Vector_base.100" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.104" = type { %"class.std::_Rb_tree.105" }
%"class.std::_Rb_tree.105" = type { %"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector.114" = type { %"struct.std::_Vector_base.115" }
%"struct.std::_Vector_base.115" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.dali::PermuteBatch.130" = type { %"class.dali::PermuteBatchBase.base.134", %"class.dali::kernels::ScatterGatherGPU" }
%"class.dali::PermuteBatchBase.base.134" = type <{ %"class.dali::StatelessOperator.132", %"class.std::vector.114", i8 }>
%"class.dali::kernels::ScatterGatherGPU" = type { %"class.dali::kernels::ScatterGatherBase" }
%"class.dali::kernels::ScatterGatherBase" = type { %"class.std::vector.135", i64 }
%"class.std::vector.135" = type { %"struct.std::_Vector_base.136" }
%"struct.std::_Vector_base.136" = type { %"struct.std::_Vector_base<dali::kernels::detail::CopyRange, std::allocator<dali::kernels::detail::CopyRange>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::kernels::detail::CopyRange, std::allocator<dali::kernels::detail::CopyRange>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::kernels::detail::CopyRange, std::allocator<dali::kernels::detail::CopyRange>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::kernels::detail::CopyRange, std::allocator<dali::kernels::detail::CopyRange>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali12PermuteBatchINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(464) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.dali::GPUBackend", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.dali::GPUBackend", align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %15 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %16, i32 noundef 0)
  store ptr %17, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %18, i32 noundef 0)
  store ptr %19, ptr %7, align 8, !tbaa !5
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = call noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %21)
  call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %20, ptr noundef nonnull align 1 dereferenceable(16) %22)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  %23 = getelementptr inbounds %"class.dali::PermuteBatchBase.131", ptr %15, i32 0, i32 1
  %24 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %23) #6
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %41, %2
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  br label %44

31:                                               ; preds = %26
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load i32, ptr %10, align 4, !tbaa !9
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %"class.dali::PermuteBatchBase.131", ptr %15, i32 0, i32 1
  %36 = load i32, ptr %10, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %37) #6
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = call noundef nonnull align 8 dereferenceable(49) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE7GetMetaEi(ptr noundef nonnull align 8 dereferenceable(304) %34, i32 noundef %39)
  call void @_ZN4dali10TensorListINS_10GPUBackendEE7SetMetaEiRKNS_8DALIMetaE(ptr noundef nonnull align 8 dereferenceable(304) %32, i32 noundef %33, ptr noundef nonnull align 8 dereferenceable(49) %40)
  br label %41

41:                                               ; preds = %31
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %10, align 4, !tbaa !9
  br label %26, !llvm.loop !11

44:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %45 = load ptr, ptr %7, align 8, !tbaa !5
  %46 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %45)
  store ptr %46, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  %47 = load ptr, ptr %7, align 8, !tbaa !5
  %48 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE9type_infoEv(ptr noundef nonnull align 8 dereferenceable(304) %47)
  %49 = call noundef i64 @_ZNK4dali8TypeInfo4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %48)
  %50 = trunc i64 %49 to i32
  store i32 %50, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %76, %44
  %52 = load i32, ptr %13, align 4, !tbaa !9
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = icmp slt i32 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %79

56:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %57 = load ptr, ptr %11, align 8, !tbaa !5
  %58 = load i32, ptr %13, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28) %57, i64 noundef %59)
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = mul nsw i64 %60, %62
  store i64 %63, ptr %14, align 8, !tbaa !13
  %64 = getelementptr inbounds %"class.dali::PermuteBatch.130", ptr %15, i32 0, i32 1
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  %66 = load i32, ptr %13, align 4, !tbaa !9
  %67 = call noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %65, i32 noundef %66)
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %"class.dali::PermuteBatchBase.131", ptr %15, i32 0, i32 1
  %70 = load i32, ptr %13, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #6
  %73 = load i32, ptr %72, align 4, !tbaa !9
  %74 = call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %68, i32 noundef %73)
  %75 = load i64, ptr %14, align 8, !tbaa !13
  call void @_ZN4dali7kernels17ScatterGatherBase7AddCopyEPvPKvm(ptr noundef nonnull align 8 dereferenceable(32) %64, ptr noundef %67, ptr noundef %74, i64 noundef %75)
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  br label %76

76:                                               ; preds = %56
  %77 = load i32, ptr %13, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %13, align 4, !tbaa !9
  br label %51, !llvm.loop !15

79:                                               ; preds = %55
  %80 = getelementptr inbounds %"class.dali::PermuteBatch.130", ptr %15, i32 0, i32 1
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = call noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %81)
  call void @_ZN4dali7kernels16ScatterGatherGPU3RunEP11CUstream_stbNS0_17ScatterGatherBase6MethodE14cudaMemcpyKind(ptr noundef nonnull align 8 dereferenceable(32) %80, ptr noundef %82, i1 noundef zeroext true, i32 noundef 0, i32 noundef 4)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #2 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) #4 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE7SetMetaEiRKNS_8DALIMetaE(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef, ptr noundef nonnull align 8 dereferenceable(49)) #3

declare noundef nonnull align 8 dereferenceable(49) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE7GetMetaEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE9type_infoEv(ptr noundef nonnull align 8 dereferenceable(304)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4dali8TypeInfo4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali7kernels17ScatterGatherBase7AddCopyEPvPKvm(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef, i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #5 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #5 align 2

declare void @_ZN4dali7kernels16ScatterGatherGPU3RunEP11CUstream_stbNS0_17ScatterGatherBase6MethodE14cudaMemcpyKind(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, i1 noundef zeroext, i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali12PermuteBatchINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(464) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #1 align 2 {
  %3 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %4 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %5 = tail call noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304) %3)
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %4, ptr noundef nonnull align 1 dereferenceable(16) %5)
  %6 = getelementptr inbounds i8, ptr %0, i64 400
  %7 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  %8 = trunc i64 %7 to i32
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %wide.trip.count = and i64 %7, 2147483647
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %2
  %10 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304) %4)
  %11 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE9type_infoEv(ptr noundef nonnull align 8 dereferenceable(304) %4)
  %12 = tail call noundef i64 @_ZNK4dali8TypeInfo4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %11)
  br i1 %9, label %.lr.ph30, label %._crit_edge31

.lr.ph30:                                         ; preds = %._crit_edge
  %sext = shl i64 %12, 32
  %13 = ashr exact i64 %sext, 32
  %14 = getelementptr inbounds i8, ptr %0, i64 432
  %wide.trip.count36 = and i64 %7, 2147483647
  br label %21

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv) #5
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = tail call noundef nonnull align 8 dereferenceable(49) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE7GetMetaEi(ptr noundef nonnull align 8 dereferenceable(304) %3, i32 noundef %16)
  %18 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE7SetMetaEiRKNS_8DALIMetaE(ptr noundef nonnull align 8 dereferenceable(304) %4, i32 noundef %18, ptr noundef nonnull align 8 dereferenceable(49) %17)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge31:                                    ; preds = %21, %._crit_edge
  %19 = getelementptr inbounds i8, ptr %0, i64 432
  %20 = tail call noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664) %1)
  tail call void @_ZN4dali7kernels16ScatterGatherGPU3RunEP11CUstream_stbNS0_17ScatterGatherBase6MethodE14cudaMemcpyKind(ptr noundef nonnull align 8 dereferenceable(32) %19, ptr noundef %20, i1 noundef zeroext true, i32 noundef 0, i32 noundef 4)
  ret void

21:                                               ; preds = %.lr.ph30, %21
  %indvars.iv33 = phi i64 [ 0, %.lr.ph30 ], [ %indvars.iv.next34, %21 ]
  %22 = tail call noundef i64 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11tensor_sizeEl(ptr noundef nonnull align 8 dereferenceable(28) %10, i64 noundef %indvars.iv33)
  %23 = mul nsw i64 %22, %13
  %24 = trunc nuw nsw i64 %indvars.iv33 to i32
  %25 = tail call noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %4, i32 noundef %24)
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv33) #5
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = tail call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %3, i32 noundef %27)
  tail call void @_ZN4dali7kernels17ScatterGatherBase7AddCopyEPvPKvm(ptr noundef nonnull align 8 dereferenceable(32) %14, ptr noundef %25, ptr noundef %28, i64 noundef %23)
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %exitcond37.not = icmp eq i64 %indvars.iv.next34, %wide.trip.count36
  br i1 %exitcond37.not, label %._crit_edge31, label %21, !llvm.loop !11
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #1 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(16) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE9GetLayoutEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #3 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE7SetMetaEiRKNS_8DALIMetaE(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef, ptr noundef nonnull align 8 dereferenceable(49)) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(49) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE7GetMetaEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNKR4dali10TensorListINS_10GPUBackendEE5shapeEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNK4dali10TensorListINS_10GPUBackendEE9type_infoEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4dali8TypeInfo4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4dali7kernels17ScatterGatherBase7AddCopyEPvPKvm(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN4dali10TensorListINS_10GPUBackendEE18raw_mutable_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #4 align 2

declare void @_ZN4dali7kernels16ScatterGatherGPU3RunEP11CUstream_stbNS0_17ScatterGatherBase6MethodE14cudaMemcpyKind(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, i1 noundef zeroext, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6streamEv(ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass