; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_unary_binary_rv64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_meltw_descriptor = type <{ i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i8 }>
%struct.libxsmm_mateltwise_kernel_config_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.libxsmm_mateltwise_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @libxsmm_meltw_getenum_precision(ptr noundef, i32 noundef) #1

declare void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_rv64_instruction_rvv_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_store_rv64_2d_reg_block(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10) #2 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i8, align 1
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store ptr %3, ptr %15, align 8, !tbaa !5
  store i32 %4, ptr %16, align 4, !tbaa !9
  store i32 %5, ptr %17, align 4, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !9
  store i32 %7, ptr %19, align 4, !tbaa !9
  store i32 %8, ptr %20, align 4, !tbaa !9
  store i32 %9, ptr %21, align 4, !tbaa !9
  store i32 %10, ptr %22, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  %40 = load ptr, ptr %15, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %40, i32 0, i32 11
  %42 = load i8, ptr %41, align 1, !tbaa !11
  %43 = zext i8 %42 to i32
  %44 = icmp eq i32 %43, 1
  br i1 %44, label %45, label %52

45:                                               ; preds = %11
  %46 = load ptr, ptr %15, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %46, i32 0, i32 9
  %48 = load i16, ptr %47, align 1, !tbaa !14
  %49 = zext i16 %48 to i32
  %50 = and i32 %49, 2
  %51 = icmp sgt i32 %50, 0
  br label %52

52:                                               ; preds = %45, %11
  %53 = phi i1 [ false, %11 ], [ %51, %45 ]
  %54 = zext i1 %53 to i64
  %55 = select i1 %53, i32 1, i32 0
  store i32 %55, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #3
  %56 = load ptr, ptr %15, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %56, i32 0, i32 11
  %58 = load i8, ptr %57, align 1, !tbaa !11
  %59 = zext i8 %58 to i32
  %60 = icmp eq i32 %59, 1
  br i1 %60, label %61, label %68

61:                                               ; preds = %52
  %62 = load ptr, ptr %15, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %62, i32 0, i32 9
  %64 = load i16, ptr %63, align 1, !tbaa !14
  %65 = zext i16 %64 to i32
  %66 = and i32 %65, 4
  %67 = icmp sgt i32 %66, 0
  br label %68

68:                                               ; preds = %61, %52
  %69 = phi i1 [ false, %52 ], [ %67, %61 ]
  %70 = zext i1 %69 to i64
  %71 = select i1 %69, i32 1, i32 0
  store i32 %71, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  %72 = load ptr, ptr %15, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %72, i32 0, i32 11
  %74 = load i8, ptr %73, align 1, !tbaa !11
  %75 = zext i8 %74 to i32
  %76 = icmp eq i32 %75, 1
  br i1 %76, label %77, label %84

77:                                               ; preds = %68
  %78 = load ptr, ptr %15, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %78, i32 0, i32 9
  %80 = load i16, ptr %79, align 1, !tbaa !14
  %81 = zext i16 %80 to i32
  %82 = and i32 %81, 8
  %83 = icmp sgt i32 %82, 0
  br label %84

84:                                               ; preds = %77, %68
  %85 = phi i1 [ false, %68 ], [ %83, %77 ]
  %86 = zext i1 %85 to i64
  %87 = select i1 %85, i32 1, i32 0
  store i32 %87, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #3
  %88 = load i32, ptr %26, align 4, !tbaa !9
  %89 = icmp eq i32 %88, 1
  br i1 %89, label %96, label %90

90:                                               ; preds = %84
  %91 = load i32, ptr %27, align 4, !tbaa !9
  %92 = icmp eq i32 %91, 1
  br i1 %92, label %96, label %93

93:                                               ; preds = %90
  %94 = load i32, ptr %28, align 4, !tbaa !9
  %95 = icmp eq i32 %94, 1
  br label %96

96:                                               ; preds = %93, %90, %84
  %97 = phi i1 [ true, %90 ], [ true, %84 ], [ %95, %93 ]
  %98 = zext i1 %97 to i64
  %99 = select i1 %97, i32 1, i32 0
  store i32 %99, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #3
  %100 = load ptr, ptr %15, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %100, i32 0, i32 3
  %102 = load i32, ptr %101, align 1, !tbaa !15
  %103 = load ptr, ptr %14, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %103, i32 0, i32 5
  %105 = load i32, ptr %104, align 4, !tbaa !16
  %106 = mul i32 %102, %105
  store i32 %106, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #3
  %107 = load i32, ptr %21, align 4, !tbaa !9
  %108 = icmp eq i32 %107, 0
  br i1 %108, label %109, label %117

109:                                              ; preds = %96
  %110 = load ptr, ptr %14, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %110, i32 0, i32 5
  %112 = load i32, ptr %111, align 4, !tbaa !16
  %113 = load i32, ptr %16, align 4, !tbaa !9
  %114 = mul i32 %112, %113
  %115 = load i32, ptr %19, align 4, !tbaa !9
  %116 = mul i32 %114, %115
  br label %128

117:                                              ; preds = %96
  %118 = load ptr, ptr %14, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %118, i32 0, i32 5
  %120 = load i32, ptr %119, align 4, !tbaa !16
  %121 = load i32, ptr %16, align 4, !tbaa !9
  %122 = load i32, ptr %19, align 4, !tbaa !9
  %123 = sub i32 %122, 1
  %124 = mul i32 %121, %123
  %125 = load i32, ptr %21, align 4, !tbaa !9
  %126 = add i32 %124, %125
  %127 = mul i32 %120, %126
  br label %128

128:                                              ; preds = %117, %109
  %129 = phi i32 [ %116, %109 ], [ %127, %117 ]
  store i32 %129, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #3
  store i32 0, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %33) #3
  store i8 0, ptr %33, align 1, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #3
  %130 = load ptr, ptr %15, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %130, i32 0, i32 11
  %132 = load i8, ptr %131, align 1, !tbaa !11
  %133 = zext i8 %132 to i32
  %134 = icmp eq i32 %133, 1
  br i1 %134, label %135, label %141

135:                                              ; preds = %128
  %136 = load ptr, ptr %15, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %136, i32 0, i32 10
  %138 = load i16, ptr %137, align 1, !tbaa !19
  %139 = zext i16 %138 to i32
  %140 = icmp eq i32 %139, 33
  br label %141

141:                                              ; preds = %135, %128
  %142 = phi i1 [ false, %128 ], [ %140, %135 ]
  %143 = zext i1 %142 to i64
  %144 = select i1 %142, i32 1, i32 0
  store i32 %144, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #3
  %145 = load ptr, ptr %15, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %145, i32 0, i32 11
  %147 = load i8, ptr %146, align 1, !tbaa !11
  %148 = zext i8 %147 to i32
  %149 = icmp eq i32 %148, 2
  br i1 %149, label %150, label %156

150:                                              ; preds = %141
  %151 = load ptr, ptr %15, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %151, i32 0, i32 10
  %153 = load i16, ptr %152, align 1, !tbaa !19
  %154 = zext i16 %153 to i32
  %155 = icmp eq i32 %154, 26
  br label %156

156:                                              ; preds = %150, %141
  %157 = phi i1 [ false, %141 ], [ %155, %150 ]
  %158 = zext i1 %157 to i64
  %159 = select i1 %157, i32 1, i32 0
  store i32 %159, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #3
  %160 = load ptr, ptr %14, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %160, i32 0, i32 2
  %162 = load i32, ptr %161, align 4, !tbaa !20
  %163 = icmp eq i32 %162, 8
  br i1 %163, label %164, label %165

164:                                              ; preds = %156
  br label %180

165:                                              ; preds = %156
  %166 = load ptr, ptr %14, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %166, i32 0, i32 2
  %168 = load i32, ptr %167, align 4, !tbaa !20
  %169 = icmp eq i32 %168, 4
  br i1 %169, label %170, label %171

170:                                              ; preds = %165
  br label %178

171:                                              ; preds = %165
  %172 = load ptr, ptr %14, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %172, i32 0, i32 2
  %174 = load i32, ptr %173, align 4, !tbaa !20
  %175 = icmp eq i32 %174, 2
  %176 = zext i1 %175 to i64
  %177 = select i1 %175, i32 1, i32 0
  br label %178

178:                                              ; preds = %171, %170
  %179 = phi i32 [ 2, %170 ], [ %177, %171 ]
  br label %180

180:                                              ; preds = %178, %164
  %181 = phi i32 [ 3, %164 ], [ %179, %178 ]
  store i32 %181, ptr %36, align 4, !tbaa !9
  %182 = load i32, ptr %25, align 4, !tbaa !9
  %183 = load i32, ptr %29, align 4, !tbaa !9
  %184 = load i32, ptr %31, align 4, !tbaa !9
  %185 = load i8, ptr %33, align 1, !tbaa !18
  %186 = load i32, ptr %34, align 4, !tbaa !9
  %187 = load i32, ptr %35, align 4, !tbaa !9
  %188 = load ptr, ptr %15, align 8, !tbaa !5
  %189 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %188, i32 0, i32 11
  %190 = load i8, ptr %189, align 1, !tbaa !11
  %191 = zext i8 %190 to i32
  %192 = icmp eq i32 %191, 1
  br i1 %192, label %193, label %200

193:                                              ; preds = %180
  %194 = load ptr, ptr %15, align 8, !tbaa !5
  %195 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %194, i32 0, i32 10
  %196 = load i16, ptr %195, align 1, !tbaa !19
  %197 = zext i16 %196 to i32
  %198 = icmp eq i32 %197, 2
  br i1 %198, label %199, label %200

199:                                              ; preds = %193
  store i32 1, ptr %37, align 4
  br label %444

200:                                              ; preds = %193, %180
  %201 = load ptr, ptr %15, align 8, !tbaa !5
  %202 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %201, i32 0, i32 11
  %203 = load i8, ptr %202, align 1, !tbaa !11
  %204 = zext i8 %203 to i32
  %205 = icmp eq i32 %204, 2
  br i1 %205, label %206, label %292

206:                                              ; preds = %200
  %207 = load ptr, ptr %15, align 8, !tbaa !5
  %208 = getelementptr inbounds %struct.libxsmm_meltw_descriptor, ptr %207, i32 0, i32 10
  %209 = load i16, ptr %208, align 1, !tbaa !19
  %210 = zext i16 %209 to i32
  %211 = icmp eq i32 %210, 26
  br i1 %211, label %212, label %292

212:                                              ; preds = %206
  %213 = load i32, ptr %30, align 4, !tbaa !9
  %214 = load i32, ptr %20, align 4, !tbaa !9
  %215 = mul i32 %213, %214
  %216 = load i32, ptr %19, align 4, !tbaa !9
  %217 = mul i32 %215, %216
  store i32 %217, ptr %32, align 4, !tbaa !9
  store i32 0, ptr %24, align 4, !tbaa !9
  br label %218

218:                                              ; preds = %288, %212
  %219 = load i32, ptr %24, align 4, !tbaa !9
  %220 = load i32, ptr %20, align 4, !tbaa !9
  %221 = icmp ult i32 %219, %220
  br i1 %221, label %222, label %291

222:                                              ; preds = %218
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %223

223:                                              ; preds = %272, %222
  %224 = load i32, ptr %23, align 4, !tbaa !9
  %225 = load i32, ptr %19, align 4, !tbaa !9
  %226 = icmp ult i32 %224, %225
  br i1 %226, label %227, label %275

227:                                              ; preds = %223
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #3
  %228 = load ptr, ptr %15, align 8, !tbaa !5
  %229 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %228, i32 noundef 0)
  %230 = icmp eq i32 1, %229
  br i1 %230, label %235, label %231

231:                                              ; preds = %227
  %232 = load ptr, ptr %15, align 8, !tbaa !5
  %233 = call i32 @libxsmm_meltw_getenum_precision(ptr noundef %232, i32 noundef 0)
  %234 = icmp eq i32 0, %233
  br label %235

235:                                              ; preds = %231, %227
  %236 = phi i1 [ true, %227 ], [ %234, %231 ]
  %237 = zext i1 %236 to i64
  %238 = select i1 %236, i32 1, i32 0
  store i32 %238, ptr %38, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #3
  %239 = load i32, ptr %38, align 4, !tbaa !9
  %240 = icmp ne i32 %239, 0
  br i1 %240, label %241, label %251

241:                                              ; preds = %235
  %242 = load i32, ptr %23, align 4, !tbaa !9
  %243 = load i32, ptr %19, align 4, !tbaa !9
  %244 = sub i32 %243, 1
  %245 = icmp eq i32 %242, %244
  br i1 %245, label %246, label %248

246:                                              ; preds = %241
  %247 = load i32, ptr %21, align 4, !tbaa !9
  br label %249

248:                                              ; preds = %241
  br label %249

249:                                              ; preds = %248, %246
  %250 = phi i32 [ %247, %246 ], [ 0, %248 ]
  br label %269

251:                                              ; preds = %235
  %252 = load i32, ptr %23, align 4, !tbaa !9
  %253 = load i32, ptr %19, align 4, !tbaa !9
  %254 = sub i32 %253, 1
  %255 = icmp eq i32 %252, %254
  br i1 %255, label %256, label %265

256:                                              ; preds = %251
  %257 = load i32, ptr %21, align 4, !tbaa !9
  %258 = icmp ugt i32 %257, 0
  br i1 %258, label %259, label %261

259:                                              ; preds = %256
  %260 = load i32, ptr %21, align 4, !tbaa !9
  br label %263

261:                                              ; preds = %256
  %262 = load i32, ptr %16, align 4, !tbaa !9
  br label %263

263:                                              ; preds = %261, %259
  %264 = phi i32 [ %260, %259 ], [ %262, %261 ]
  br label %267

265:                                              ; preds = %251
  %266 = load i32, ptr %16, align 4, !tbaa !9
  br label %267

267:                                              ; preds = %265, %263
  %268 = phi i32 [ %264, %263 ], [ %266, %265 ]
  br label %269

269:                                              ; preds = %267, %249
  %270 = phi i32 [ %250, %249 ], [ %268, %267 ]
  store i32 %270, ptr %39, align 4, !tbaa !9
  %271 = load i32, ptr %39, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #3
  br label %272

272:                                              ; preds = %269
  %273 = load i32, ptr %23, align 4, !tbaa !9
  %274 = add i32 %273, 1
  store i32 %274, ptr %23, align 4, !tbaa !9
  br label %223, !llvm.loop !21

275:                                              ; preds = %223
  %276 = load ptr, ptr %12, align 8, !tbaa !5
  %277 = load ptr, ptr %13, align 8, !tbaa !5
  %278 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %277, i32 0, i32 1
  %279 = load i32, ptr %278, align 4, !tbaa !23
  %280 = load ptr, ptr %13, align 8, !tbaa !5
  %281 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %280, i32 0, i32 36
  %282 = load i32, ptr %281, align 4, !tbaa !25
  %283 = load ptr, ptr %13, align 8, !tbaa !5
  %284 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %283, i32 0, i32 1
  %285 = load i32, ptr %284, align 4, !tbaa !23
  %286 = load i32, ptr %32, align 4, !tbaa !9
  %287 = zext i32 %286 to i64
  call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %276, i32 noundef 51, i32 noundef %279, i32 noundef %282, i32 noundef %285, i64 noundef %287)
  br label %288

288:                                              ; preds = %275
  %289 = load i32, ptr %24, align 4, !tbaa !9
  %290 = add i32 %289, 1
  store i32 %290, ptr %24, align 4, !tbaa !9
  br label %218, !llvm.loop !26

291:                                              ; preds = %218
  store i32 1, ptr %37, align 4
  br label %444

292:                                              ; preds = %206, %200
  store i32 0, ptr %24, align 4, !tbaa !9
  br label %293

293:                                              ; preds = %428, %292
  %294 = load i32, ptr %24, align 4, !tbaa !9
  %295 = load i32, ptr %20, align 4, !tbaa !9
  %296 = icmp ult i32 %294, %295
  br i1 %296, label %297, label %431

297:                                              ; preds = %293
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %298

298:                                              ; preds = %398, %297
  %299 = load i32, ptr %23, align 4, !tbaa !9
  %300 = load i32, ptr %19, align 4, !tbaa !9
  %301 = icmp ult i32 %299, %300
  br i1 %301, label %302, label %401

302:                                              ; preds = %298
  %303 = load i32, ptr %30, align 4, !tbaa !9
  %304 = load i32, ptr %20, align 4, !tbaa !9
  %305 = mul i32 %303, %304
  store i32 %305, ptr %32, align 4, !tbaa !9
  %306 = load i32, ptr %18, align 4, !tbaa !9
  %307 = load i32, ptr %24, align 4, !tbaa !9
  %308 = load i32, ptr %19, align 4, !tbaa !9
  %309 = mul i32 %307, %308
  %310 = add i32 %306, %309
  %311 = load i32, ptr %23, align 4, !tbaa !9
  %312 = add i32 %310, %311
  store i32 %312, ptr %25, align 4, !tbaa !9
  %313 = load i32, ptr %26, align 4, !tbaa !9
  %314 = icmp eq i32 %313, 1
  br i1 %314, label %315, label %321

315:                                              ; preds = %302
  %316 = load i32, ptr %18, align 4, !tbaa !9
  %317 = load i32, ptr %24, align 4, !tbaa !9
  %318 = load i32, ptr %19, align 4, !tbaa !9
  %319 = mul i32 %317, %318
  %320 = add i32 %316, %319
  store i32 %320, ptr %25, align 4, !tbaa !9
  br label %321

321:                                              ; preds = %315, %302
  %322 = load i32, ptr %28, align 4, !tbaa !9
  %323 = icmp eq i32 %322, 1
  br i1 %323, label %324, label %326

324:                                              ; preds = %321
  %325 = load i32, ptr %18, align 4, !tbaa !9
  store i32 %325, ptr %25, align 4, !tbaa !9
  br label %326

326:                                              ; preds = %324, %321
  %327 = load i32, ptr %27, align 4, !tbaa !9
  %328 = icmp eq i32 %327, 1
  br i1 %328, label %329, label %333

329:                                              ; preds = %326
  %330 = load i32, ptr %18, align 4, !tbaa !9
  %331 = load i32, ptr %23, align 4, !tbaa !9
  %332 = add i32 %330, %331
  store i32 %332, ptr %25, align 4, !tbaa !9
  br label %333

333:                                              ; preds = %329, %326
  %334 = load i32, ptr %23, align 4, !tbaa !9
  %335 = load i32, ptr %19, align 4, !tbaa !9
  %336 = sub i32 %335, 1
  %337 = icmp eq i32 %334, %336
  br i1 %337, label %338, label %348

338:                                              ; preds = %333
  %339 = load i32, ptr %21, align 4, !tbaa !9
  %340 = icmp ne i32 %339, 0
  br i1 %340, label %341, label %348

341:                                              ; preds = %338
  %342 = load ptr, ptr %12, align 8, !tbaa !5
  %343 = load i32, ptr %17, align 4, !tbaa !9
  %344 = load ptr, ptr %13, align 8, !tbaa !5
  %345 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %344, i32 0, i32 35
  %346 = load i32, ptr %345, align 4, !tbaa !27
  %347 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef %342, i32 noundef %343, i32 noundef %346, i32 noundef %347, i32 noundef 0)
  br label %348

348:                                              ; preds = %341, %338, %333
  %349 = load ptr, ptr %12, align 8, !tbaa !5
  %350 = load ptr, ptr %13, align 8, !tbaa !5
  %351 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %350, i32 0, i32 6
  %352 = load i32, ptr %351, align 4, !tbaa !28
  %353 = load i32, ptr %25, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_move(ptr noundef %349, i32 noundef 24615, i32 noundef %352, i32 noundef 127, i32 noundef %353, i32 noundef 1)
  %354 = load i32, ptr %23, align 4, !tbaa !9
  %355 = load i32, ptr %19, align 4, !tbaa !9
  %356 = sub i32 %355, 1
  %357 = icmp eq i32 %354, %356
  br i1 %357, label %358, label %379

358:                                              ; preds = %348
  %359 = load i32, ptr %21, align 4, !tbaa !9
  %360 = icmp ne i32 %359, 0
  br i1 %360, label %361, label %379

361:                                              ; preds = %358
  %362 = load ptr, ptr %12, align 8, !tbaa !5
  %363 = load ptr, ptr %13, align 8, !tbaa !5
  %364 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %363, i32 0, i32 6
  %365 = load i32, ptr %364, align 4, !tbaa !28
  %366 = load ptr, ptr %13, align 8, !tbaa !5
  %367 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %366, i32 0, i32 36
  %368 = load i32, ptr %367, align 4, !tbaa !25
  %369 = load ptr, ptr %13, align 8, !tbaa !5
  %370 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %369, i32 0, i32 6
  %371 = load i32, ptr %370, align 4, !tbaa !28
  %372 = load i32, ptr %21, align 4, !tbaa !9
  %373 = zext i32 %372 to i64
  %374 = load ptr, ptr %14, align 8, !tbaa !5
  %375 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %374, i32 0, i32 5
  %376 = load i32, ptr %375, align 4, !tbaa !16
  %377 = zext i32 %376 to i64
  %378 = mul i64 %373, %377
  call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %362, i32 noundef 51, i32 noundef %365, i32 noundef %368, i32 noundef %371, i64 noundef %378)
  br label %397

379:                                              ; preds = %358, %348
  %380 = load ptr, ptr %12, align 8, !tbaa !5
  %381 = load ptr, ptr %13, align 8, !tbaa !5
  %382 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %381, i32 0, i32 6
  %383 = load i32, ptr %382, align 4, !tbaa !28
  %384 = load ptr, ptr %13, align 8, !tbaa !5
  %385 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %384, i32 0, i32 36
  %386 = load i32, ptr %385, align 4, !tbaa !25
  %387 = load ptr, ptr %13, align 8, !tbaa !5
  %388 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %387, i32 0, i32 6
  %389 = load i32, ptr %388, align 4, !tbaa !28
  %390 = load i32, ptr %16, align 4, !tbaa !9
  %391 = zext i32 %390 to i64
  %392 = load ptr, ptr %14, align 8, !tbaa !5
  %393 = getelementptr inbounds %struct.libxsmm_mateltwise_kernel_config_struct, ptr %392, i32 0, i32 5
  %394 = load i32, ptr %393, align 4, !tbaa !16
  %395 = zext i32 %394 to i64
  %396 = mul i64 %391, %395
  call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %380, i32 noundef 51, i32 noundef %383, i32 noundef %386, i32 noundef %389, i64 noundef %396)
  br label %397

397:                                              ; preds = %379, %361
  br label %398

398:                                              ; preds = %397
  %399 = load i32, ptr %23, align 4, !tbaa !9
  %400 = add i32 %399, 1
  store i32 %400, ptr %23, align 4, !tbaa !9
  br label %298, !llvm.loop !29

401:                                              ; preds = %298
  %402 = load ptr, ptr %12, align 8, !tbaa !5
  %403 = load i32, ptr %16, align 4, !tbaa !9
  %404 = load ptr, ptr %13, align 8, !tbaa !5
  %405 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %404, i32 0, i32 35
  %406 = load i32, ptr %405, align 4, !tbaa !27
  %407 = load i32, ptr %36, align 4, !tbaa !9
  call void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef %402, i32 noundef %403, i32 noundef %406, i32 noundef %407, i32 noundef 0)
  %408 = load i32, ptr %31, align 4, !tbaa !9
  %409 = load i32, ptr %30, align 4, !tbaa !9
  %410 = icmp ne i32 %408, %409
  br i1 %410, label %411, label %427

411:                                              ; preds = %401
  %412 = load ptr, ptr %12, align 8, !tbaa !5
  %413 = load ptr, ptr %13, align 8, !tbaa !5
  %414 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %413, i32 0, i32 6
  %415 = load i32, ptr %414, align 4, !tbaa !28
  %416 = load ptr, ptr %13, align 8, !tbaa !5
  %417 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %416, i32 0, i32 36
  %418 = load i32, ptr %417, align 4, !tbaa !25
  %419 = load ptr, ptr %13, align 8, !tbaa !5
  %420 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %419, i32 0, i32 6
  %421 = load i32, ptr %420, align 4, !tbaa !28
  %422 = load i32, ptr %30, align 4, !tbaa !9
  %423 = zext i32 %422 to i64
  %424 = load i32, ptr %31, align 4, !tbaa !9
  %425 = zext i32 %424 to i64
  %426 = sub nsw i64 %423, %425
  call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %412, i32 noundef 51, i32 noundef %415, i32 noundef %418, i32 noundef %421, i64 noundef %426)
  br label %427

427:                                              ; preds = %411, %401
  br label %428

428:                                              ; preds = %427
  %429 = load i32, ptr %24, align 4, !tbaa !9
  %430 = add i32 %429, 1
  store i32 %430, ptr %24, align 4, !tbaa !9
  br label %293, !llvm.loop !30

431:                                              ; preds = %293
  %432 = load ptr, ptr %12, align 8, !tbaa !5
  %433 = load ptr, ptr %13, align 8, !tbaa !5
  %434 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %433, i32 0, i32 6
  %435 = load i32, ptr %434, align 4, !tbaa !28
  %436 = load ptr, ptr %13, align 8, !tbaa !5
  %437 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %436, i32 0, i32 35
  %438 = load i32, ptr %437, align 4, !tbaa !27
  %439 = load ptr, ptr %13, align 8, !tbaa !5
  %440 = getelementptr inbounds %struct.libxsmm_mateltwise_gp_reg_mapping_struct, ptr %439, i32 0, i32 6
  %441 = load i32, ptr %440, align 4, !tbaa !28
  %442 = load i32, ptr %32, align 4, !tbaa !9
  %443 = zext i32 %442 to i64
  call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %432, i32 noundef 1073741875, i32 noundef %435, i32 noundef %438, i32 noundef %441, i64 noundef %443)
  store i32 0, ptr %37, align 4
  br label %444

444:                                              ; preds = %431, %291, %199
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %33) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  %445 = load i32, ptr %37, align 4
  switch i32 %445, label %447 [
    i32 0, label %446
    i32 1, label %446
  ]

446:                                              ; preds = %444, %444
  ret void

447:                                              ; preds = %444
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 31}
!12 = !{!"libxsmm_meltw_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 27, !13, i64 29, !7, i64 31}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !13, i64 27}
!15 = !{!12, !10, i64 12}
!16 = !{!17, !10, i64 20}
!17 = !{!"libxsmm_mateltwise_kernel_config_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !10, i64 364, !10, i64 368, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !10, i64 404, !10, i64 408, !10, i64 412, !10, i64 416, !10, i64 420, !10, i64 424, !10, i64 428, !10, i64 432, !10, i64 436, !10, i64 440, !10, i64 444, !10, i64 448, !10, i64 452, !10, i64 456, !10, i64 460, !10, i64 464, !10, i64 468, !10, i64 472, !10, i64 476, !10, i64 480, !10, i64 484, !10, i64 488, !10, i64 492, !10, i64 496, !10, i64 500, !10, i64 504, !10, i64 508, !7, i64 512}
!18 = !{!7, !7, i64 0}
!19 = !{!12, !13, i64 29}
!20 = !{!17, !10, i64 8}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!24, !10, i64 4}
!24 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144}
!25 = !{!24, !10, i64 144}
!26 = distinct !{!26, !22}
!27 = !{!24, !10, i64 140}
!28 = !{!24, !10, i64 24}
!29 = distinct !{!29, !22}
!30 = distinct !{!30, !22}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare i32 @libxsmm_meltw_getenum_precision(ptr noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_rv64_instruction_rvv_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_store_rv64_2d_reg_block(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #1 {
  %12 = getelementptr inbounds i8, ptr %3, i64 31
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp eq i8 %13, 1
  br i1 %14, label %15, label %24

15:                                               ; preds = %11
  %16 = getelementptr inbounds i8, ptr %3, i64 27
  %17 = load i16, ptr %16, align 1, !tbaa !11
  %18 = and i16 %17, 2
  %19 = icmp ne i16 %18, 0
  %20 = and i16 %17, 4
  %21 = icmp ne i16 %20, 0
  %22 = and i16 %17, 8
  %23 = icmp ne i16 %22, 0
  br label %24

24:                                               ; preds = %11, %15
  %25 = phi i1 [ %21, %15 ], [ false, %11 ]
  %26 = phi i1 [ %19, %15 ], [ false, %11 ]
  %27 = phi i1 [ %23, %15 ], [ false, %11 ]
  %28 = getelementptr inbounds i8, ptr %3, i64 12
  %29 = load i32, ptr %28, align 1, !tbaa !12
  %30 = getelementptr inbounds i8, ptr %2, i64 20
  %31 = load i32, ptr %30, align 4, !tbaa !13
  %32 = mul i32 %31, %29
  %33 = icmp eq i32 %9, 0
  br i1 %33, label %34, label %37

34:                                               ; preds = %24
  %35 = mul i32 %7, %4
  %36 = mul i32 %35, %31
  br label %42

37:                                               ; preds = %24
  %38 = add i32 %7, -1
  %39 = mul i32 %38, %4
  %40 = add i32 %39, %9
  %41 = mul i32 %31, %40
  br label %42

42:                                               ; preds = %37, %34
  %43 = phi i32 [ %36, %34 ], [ %41, %37 ]
  %44 = getelementptr inbounds i8, ptr %2, i64 8
  %45 = load i32, ptr %44, align 4, !tbaa !15
  switch i32 %45, label %46 [
    i32 8, label %49
    i32 4, label %.fold.split
  ]

46:                                               ; preds = %42
  %47 = icmp eq i32 %45, 2
  %48 = zext i1 %47 to i32
  br label %49

.fold.split:                                      ; preds = %42
  br label %49

49:                                               ; preds = %42, %.fold.split, %46
  %50 = phi i32 [ 3, %42 ], [ %48, %46 ], [ 2, %.fold.split ]
  br i1 %14, label %51, label %55

51:                                               ; preds = %49
  %52 = getelementptr inbounds i8, ptr %3, i64 29
  %53 = load i16, ptr %52, align 1, !tbaa !16
  %54 = icmp eq i16 %53, 2
  br i1 %54, label %.loopexit, label %.thread145

55:                                               ; preds = %49
  %56 = icmp eq i8 %13, 2
  br i1 %56, label %57, label %.thread145

57:                                               ; preds = %55
  %58 = getelementptr inbounds i8, ptr %3, i64 29
  %59 = load i16, ptr %58, align 1, !tbaa !16
  %60 = icmp eq i16 %59, 26
  br i1 %60, label %61, label %.thread145

61:                                               ; preds = %57
  %.not166 = icmp eq i32 %8, 0
  br i1 %.not166, label %.loopexit, label %.preheader147.lr.ph

.preheader147.lr.ph:                              ; preds = %61
  %62 = mul i32 %8, %7
  %63 = mul i32 %62, %32
  %.not167 = icmp eq i32 %7, 0
  %64 = getelementptr inbounds i8, ptr %1, i64 4
  %65 = getelementptr inbounds i8, ptr %1, i64 144
  %66 = zext i32 %63 to i64
  br i1 %.not167, label %.preheader147, label %.preheader147.us

.preheader147.us:                                 ; preds = %.preheader147.lr.ph, %._crit_edge.us
  %.0130149.us = phi i32 [ %75, %._crit_edge.us ], [ 0, %.preheader147.lr.ph ]
  br label %67

67:                                               ; preds = %.preheader147.us, %.critedge.us
  %.0148.us = phi i32 [ 0, %.preheader147.us ], [ %72, %.critedge.us ]
  %68 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %3, i32 noundef 0) #2
  %69 = icmp eq i32 %68, 1
  br i1 %69, label %.critedge.us, label %70

70:                                               ; preds = %67
  %71 = tail call i32 @libxsmm_meltw_getenum_precision(ptr noundef %3, i32 noundef 0) #2
  br label %.critedge.us

.critedge.us:                                     ; preds = %70, %67
  %72 = add nuw i32 %.0148.us, 1
  %exitcond.not = icmp eq i32 %72, %7
  br i1 %exitcond.not, label %._crit_edge.us, label %67, !llvm.loop !17

._crit_edge.us:                                   ; preds = %.critedge.us
  %73 = load i32, ptr %64, align 4, !tbaa !19
  %74 = load i32, ptr %65, align 4, !tbaa !21
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %73, i32 noundef %74, i32 noundef %73, i64 noundef %66) #2
  %75 = add nuw i32 %.0130149.us, 1
  %exitcond175.not = icmp eq i32 %75, %8
  br i1 %exitcond175.not, label %.loopexit, label %.preheader147.us, !llvm.loop !22

.preheader147:                                    ; preds = %.preheader147.lr.ph, %.preheader147
  %.0130149 = phi i32 [ %78, %.preheader147 ], [ 0, %.preheader147.lr.ph ]
  %76 = load i32, ptr %64, align 4, !tbaa !19
  %77 = load i32, ptr %65, align 4, !tbaa !21
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %76, i32 noundef %77, i32 noundef %76, i64 noundef %66) #2
  %78 = add nuw i32 %.0130149, 1
  %exitcond176.not = icmp eq i32 %78, %8
  br i1 %exitcond176.not, label %.loopexit, label %.preheader147, !llvm.loop !22

.thread145:                                       ; preds = %51, %57, %55
  %.not168 = icmp eq i32 %8, 0
  br i1 %.not168, label %._crit_edge153, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.thread145
  %.not169 = icmp eq i32 %7, 0
  %79 = add i32 %7, -1
  %80 = getelementptr inbounds i8, ptr %1, i64 24
  %81 = getelementptr inbounds i8, ptr %1, i64 144
  %82 = zext i32 %4 to i64
  %83 = getelementptr inbounds i8, ptr %1, i64 140
  %84 = zext i32 %9 to i64
  %85 = mul i32 %32, %8
  %.not = icmp eq i32 %43, %32
  %.not.fr = freeze i1 %.not
  %86 = zext i32 %32 to i64
  %87 = zext i32 %43 to i64
  %88 = sub nsw i64 %86, %87
  br i1 %.not169, label %.preheader.lr.ph.split, label %.preheader.lr.ph.split.us

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  br i1 %33, label %.preheader.us, label %.preheader.us.us

.preheader.us.us:                                 ; preds = %.preheader.lr.ph.split.us, %94
  %.1131152.us.us = phi i32 [ %95, %94 ], [ 0, %.preheader.lr.ph.split.us ]
  %89 = mul i32 %.1131152.us.us, %7
  %90 = add i32 %89, %6
  br label %96

91:                                               ; preds = %._crit_edge.split.us158.us
  %92 = load i32, ptr %80, align 4, !tbaa !23
  %93 = load i32, ptr %81, align 4, !tbaa !21
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %92, i32 noundef %93, i32 noundef %92, i64 noundef %88) #2
  br label %94

94:                                               ; preds = %._crit_edge.split.us158.us, %91
  %95 = add nuw i32 %.1131152.us.us, 1
  %exitcond178.not = icmp eq i32 %95, %8
  br i1 %exitcond178.not, label %._crit_edge153, label %.preheader.us.us, !llvm.loop !24

96:                                               ; preds = %.preheader.us.us, %102
  %.1150.us154.us = phi i32 [ 0, %.preheader.us.us ], [ %109, %102 ]
  %97 = select i1 %26, i32 0, i32 %.1150.us154.us
  %spec.select.us155.us = add i32 %90, %97
  %.1133.us156.us = select i1 %27, i32 %6, i32 %spec.select.us155.us
  %98 = add i32 %.1150.us154.us, %6
  %.2.us157.us = select i1 %25, i32 %98, i32 %.1133.us156.us
  %99 = icmp eq i32 %.1150.us154.us, %79
  br i1 %99, label %100, label %102

100:                                              ; preds = %96
  %101 = load i32, ptr %83, align 4, !tbaa !25
  tail call void @libxsmm_rv64_instruction_rvv_setvli(ptr noundef %0, i32 noundef %5, i32 noundef %101, i32 noundef %50, i32 noundef 0) #2
  br label %102

102:                                              ; preds = %96, %100
  %.sink191 = phi i64 [ %84, %100 ], [ %82, %96 ]
  %103 = load i32, ptr %80, align 4, !tbaa !23
  tail call void @libxsmm_rv64_instruction_rvv_move(ptr noundef %0, i32 noundef 24615, i32 noundef %103, i32 noundef 127, i32 noundef %.2.us157.us, i32 noundef 1) #2
  %104 = load i32, ptr %80, align 4, !tbaa !23
  %105 = load i32, ptr %81, align 4, !tbaa !21
  %106 = load i32, ptr %30, align 4, !tbaa !13
  %107 = zext i32 %106 to i64
  %108 = mul nuw i64 %.sink191, %107
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %104, i32 noundef %105, i32 noundef %104, i64 noundef %108) #2
  %109 = add nuw i32 %.1150.us154.us, 1
  %exitcond177.not = icmp eq i32 %109, %7
  br i1 %exitcond177.not, label %._crit_edge.split.us158.us, label %96, !llvm.loop !26

._crit_edge.split.us158.us:                       ; preds = %102
  %110 = load i32, ptr %83, align 4, !tbaa !25
  tail call void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef %0, i32 noundef %4, i32 noundef %110, i32 noundef %50, i32 noundef 0) #2
  br i1 %.not.fr, label %94, label %91

.preheader.us:                                    ; preds = %.preheader.lr.ph.split.us, %116
  %.1131152.us = phi i32 [ %117, %116 ], [ 0, %.preheader.lr.ph.split.us ]
  %111 = mul i32 %.1131152.us, %7
  %112 = add i32 %111, %6
  br label %118

113:                                              ; preds = %._crit_edge.split.us.us
  %114 = load i32, ptr %80, align 4, !tbaa !23
  %115 = load i32, ptr %81, align 4, !tbaa !21
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %114, i32 noundef %115, i32 noundef %114, i64 noundef %88) #2
  br label %116

116:                                              ; preds = %113, %._crit_edge.split.us.us
  %117 = add nuw i32 %.1131152.us, 1
  %exitcond180.not = icmp eq i32 %117, %8
  br i1 %exitcond180.not, label %._crit_edge153, label %.preheader.us, !llvm.loop !24

118:                                              ; preds = %118, %.preheader.us
  %.1150.us.us = phi i32 [ 0, %.preheader.us ], [ %127, %118 ]
  %119 = select i1 %26, i32 0, i32 %.1150.us.us
  %spec.select.us.us = add i32 %112, %119
  %.1133.us.us = select i1 %27, i32 %6, i32 %spec.select.us.us
  %120 = add i32 %.1150.us.us, %6
  %.2.us.us = select i1 %25, i32 %120, i32 %.1133.us.us
  %121 = load i32, ptr %80, align 4, !tbaa !23
  tail call void @libxsmm_rv64_instruction_rvv_move(ptr noundef %0, i32 noundef 24615, i32 noundef %121, i32 noundef 127, i32 noundef %.2.us.us, i32 noundef 1) #2
  %122 = load i32, ptr %80, align 4, !tbaa !23
  %123 = load i32, ptr %81, align 4, !tbaa !21
  %124 = load i32, ptr %30, align 4, !tbaa !13
  %125 = zext i32 %124 to i64
  %126 = mul nuw i64 %125, %82
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %122, i32 noundef %123, i32 noundef %122, i64 noundef %126) #2
  %127 = add nuw i32 %.1150.us.us, 1
  %exitcond179.not = icmp eq i32 %127, %7
  br i1 %exitcond179.not, label %._crit_edge.split.us.us, label %118, !llvm.loop !26

._crit_edge.split.us.us:                          ; preds = %118
  %128 = load i32, ptr %83, align 4, !tbaa !25
  tail call void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef %0, i32 noundef %4, i32 noundef %128, i32 noundef %50, i32 noundef 0) #2
  br i1 %.not.fr, label %116, label %113

.preheader.lr.ph.split:                           ; preds = %.preheader.lr.ph
  br i1 %.not.fr, label %.preheader.us161, label %.preheader

.preheader.us161:                                 ; preds = %.preheader.lr.ph.split, %.preheader.us161
  %.1131152.us162 = phi i32 [ %130, %.preheader.us161 ], [ 0, %.preheader.lr.ph.split ]
  %129 = load i32, ptr %83, align 4, !tbaa !25
  tail call void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef %0, i32 noundef %4, i32 noundef %129, i32 noundef %50, i32 noundef 0) #2
  %130 = add nuw i32 %.1131152.us162, 1
  %exitcond182.not = icmp eq i32 %130, %8
  br i1 %exitcond182.not, label %._crit_edge153, label %.preheader.us161, !llvm.loop !24

.preheader:                                       ; preds = %.preheader.lr.ph.split, %.preheader
  %.1131152 = phi i32 [ %134, %.preheader ], [ 0, %.preheader.lr.ph.split ]
  %131 = load i32, ptr %83, align 4, !tbaa !25
  tail call void @libxsmm_rv64_instruction_rvv_setivli(ptr noundef %0, i32 noundef %4, i32 noundef %131, i32 noundef %50, i32 noundef 0) #2
  %132 = load i32, ptr %80, align 4, !tbaa !23
  %133 = load i32, ptr %81, align 4, !tbaa !21
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 51, i32 noundef %132, i32 noundef %133, i32 noundef %132, i64 noundef %88) #2
  %134 = add nuw i32 %.1131152, 1
  %exitcond181.not = icmp eq i32 %134, %8
  br i1 %exitcond181.not, label %._crit_edge153, label %.preheader, !llvm.loop !24

._crit_edge153:                                   ; preds = %94, %116, %.preheader, %.preheader.us161, %.thread145
  %.0134.lcssa = phi i32 [ 0, %.thread145 ], [ 0, %.preheader.us161 ], [ 0, %.preheader ], [ %85, %116 ], [ %85, %94 ]
  %135 = getelementptr inbounds i8, ptr %1, i64 24
  %136 = load i32, ptr %135, align 4, !tbaa !23
  %137 = getelementptr inbounds i8, ptr %1, i64 140
  %138 = load i32, ptr %137, align 4, !tbaa !25
  %139 = zext i32 %.0134.lcssa to i64
  tail call void @libxsmm_rv64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 1073741875, i32 noundef %136, i32 noundef %138, i32 noundef %136, i64 noundef %139) #2
  br label %.loopexit

.loopexit:                                        ; preds = %._crit_edge.us, %.preheader147, %61, %51, %._crit_edge153
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 31}
!6 = !{!"libxsmm_meltw_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !10, i64 27, !10, i64 29, !8, i64 31}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !10, i64 27}
!12 = !{!6, !7, i64 12}
!13 = !{!14, !7, i64 20}
!14 = !{!"libxsmm_mateltwise_kernel_config_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !7, i64 392, !7, i64 396, !7, i64 400, !7, i64 404, !7, i64 408, !7, i64 412, !7, i64 416, !7, i64 420, !7, i64 424, !7, i64 428, !7, i64 432, !7, i64 436, !7, i64 440, !7, i64 444, !7, i64 448, !7, i64 452, !7, i64 456, !7, i64 460, !7, i64 464, !7, i64 468, !7, i64 472, !7, i64 476, !7, i64 480, !7, i64 484, !7, i64 488, !7, i64 492, !7, i64 496, !7, i64 500, !7, i64 504, !7, i64 508, !8, i64 512}
!15 = !{!14, !7, i64 8}
!16 = !{!6, !10, i64 29}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!20, !7, i64 4}
!20 = !{!"libxsmm_mateltwise_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144}
!21 = !{!20, !7, i64 144}
!22 = distinct !{!22, !18}
!23 = !{!20, !7, i64 24}
!24 = distinct !{!24, !18}
!25 = !{!20, !7, i64 140}
!26 = distinct !{!26, !18}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass