; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseBackground.ll (ZN4Simd4Base21BackgroundAdjustRangeEPhmmmS1_mS1_mS1_mh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base21BackgroundAdjustRangeEPhmmmS1_mS1_mS1_mh(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9, i8 noundef zeroext %10) #1 {
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i64, align 8
  %18 = alloca ptr, align 8
  %19 = alloca i64, align 8
  %20 = alloca ptr, align 8
  %21 = alloca i64, align 8
  %22 = alloca i8, align 1
  %23 = alloca i64, align 8
  %24 = alloca i32, align 4
  %25 = alloca i64, align 8
  store ptr %0, ptr %12, align 8, !tbaa !5
  store i64 %1, ptr %13, align 8, !tbaa !9
  store i64 %2, ptr %14, align 8, !tbaa !9
  store i64 %3, ptr %15, align 8, !tbaa !9
  store ptr %4, ptr %16, align 8, !tbaa !5
  store i64 %5, ptr %17, align 8, !tbaa !9
  store ptr %6, ptr %18, align 8, !tbaa !5
  store i64 %7, ptr %19, align 8, !tbaa !9
  store ptr %8, ptr %20, align 8, !tbaa !5
  store i64 %9, ptr %21, align 8, !tbaa !9
  store i8 %10, ptr %22, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  store i64 0, ptr %23, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %76, %11
  %27 = load i64, ptr %23, align 8, !tbaa !9
  %28 = load i64, ptr %15, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %24, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  br label %79

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  store i64 0, ptr %25, align 8, !tbaa !9
  br label %32

32:                                               ; preds = %60, %31
  %33 = load i64, ptr %25, align 8, !tbaa !9
  %34 = load i64, ptr %14, align 8, !tbaa !9
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 5, ptr %24, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  br label %63

37:                                               ; preds = %32
  %38 = load ptr, ptr %12, align 8, !tbaa !5
  %39 = load i64, ptr %25, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %38, i64 %39
  %41 = load ptr, ptr %16, align 8, !tbaa !5
  %42 = load i64, ptr %25, align 8, !tbaa !9
  %43 = getelementptr inbounds i8, ptr %41, i64 %42
  %44 = load i8, ptr %22, align 1, !tbaa !11
  %45 = zext i8 %44 to i32
  call void @_ZN4Simd4Base8AdjustLoERKhRhi(ptr noundef nonnull align 1 dereferenceable(1) %40, ptr noundef nonnull align 1 dereferenceable(1) %43, i32 noundef %45)
  %46 = load ptr, ptr %18, align 8, !tbaa !5
  %47 = load i64, ptr %25, align 8, !tbaa !9
  %48 = getelementptr inbounds i8, ptr %46, i64 %47
  %49 = load ptr, ptr %20, align 8, !tbaa !5
  %50 = load i64, ptr %25, align 8, !tbaa !9
  %51 = getelementptr inbounds i8, ptr %49, i64 %50
  %52 = load i8, ptr %22, align 1, !tbaa !11
  %53 = zext i8 %52 to i32
  call void @_ZN4Simd4Base8AdjustHiERKhRhi(ptr noundef nonnull align 1 dereferenceable(1) %48, ptr noundef nonnull align 1 dereferenceable(1) %51, i32 noundef %53)
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  %55 = load i64, ptr %25, align 8, !tbaa !9
  %56 = getelementptr inbounds i8, ptr %54, i64 %55
  store i8 0, ptr %56, align 1, !tbaa !11
  %57 = load ptr, ptr %18, align 8, !tbaa !5
  %58 = load i64, ptr %25, align 8, !tbaa !9
  %59 = getelementptr inbounds i8, ptr %57, i64 %58
  store i8 0, ptr %59, align 1, !tbaa !11
  br label %60

60:                                               ; preds = %37
  %61 = load i64, ptr %25, align 8, !tbaa !9
  %62 = add i64 %61, 1
  store i64 %62, ptr %25, align 8, !tbaa !9
  br label %32, !llvm.loop !12

63:                                               ; preds = %36
  %64 = load i64, ptr %17, align 8, !tbaa !9
  %65 = load ptr, ptr %16, align 8, !tbaa !5
  %66 = getelementptr inbounds i8, ptr %65, i64 %64
  store ptr %66, ptr %16, align 8, !tbaa !5
  %67 = load i64, ptr %21, align 8, !tbaa !9
  %68 = load ptr, ptr %20, align 8, !tbaa !5
  %69 = getelementptr inbounds i8, ptr %68, i64 %67
  store ptr %69, ptr %20, align 8, !tbaa !5
  %70 = load i64, ptr %13, align 8, !tbaa !9
  %71 = load ptr, ptr %12, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 %70
  store ptr %72, ptr %12, align 8, !tbaa !5
  %73 = load i64, ptr %19, align 8, !tbaa !9
  %74 = load ptr, ptr %18, align 8, !tbaa !5
  %75 = getelementptr inbounds i8, ptr %74, i64 %73
  store ptr %75, ptr %18, align 8, !tbaa !5
  br label %76

76:                                               ; preds = %63
  %77 = load i64, ptr %23, align 8, !tbaa !9
  %78 = add i64 %77, 1
  store i64 %78, ptr %23, align 8, !tbaa !9
  br label %26, !llvm.loop !14

79:                                               ; preds = %30
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8AdjustLoERKhRhi(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), i32 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8AdjustHiERKhRhi(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base21BackgroundAdjustRangeEPhmmmS1_mS1_mS1_mh(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9, i8 noundef zeroext %10) local_unnamed_addr #0 {
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge38, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %11
  %.not39 = icmp eq i64 %2, 0
  %12 = zext i8 %10 to i32
  br i1 %.not39, label %._crit_edge38, label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.lr.ph, %._crit_edge.us
  %.02737.us = phi i64 [ %23, %._crit_edge.us ], [ 0, %.preheader.lr.ph ]
  %.02836.us = phi ptr [ %21, %._crit_edge.us ], [ %0, %.preheader.lr.ph ]
  %.02935.us = phi ptr [ %19, %._crit_edge.us ], [ %4, %.preheader.lr.ph ]
  %.03034.us = phi ptr [ %20, %._crit_edge.us ], [ %8, %.preheader.lr.ph ]
  %.03133.us = phi ptr [ %22, %._crit_edge.us ], [ %6, %.preheader.lr.ph ]
  br label %13

13:                                               ; preds = %.preheader.us, %13
  %.032.us = phi i64 [ 0, %.preheader.us ], [ %18, %13 ]
  %14 = getelementptr inbounds i8, ptr %.02836.us, i64 %.032.us
  %15 = getelementptr inbounds i8, ptr %.02935.us, i64 %.032.us
  tail call void @_ZN4Simd4Base8AdjustLoERKhRhi(ptr noundef nonnull align 1 dereferenceable(1) %14, ptr noundef nonnull align 1 dereferenceable(1) %15, i32 noundef %12)
  %16 = getelementptr inbounds i8, ptr %.03133.us, i64 %.032.us
  %17 = getelementptr inbounds i8, ptr %.03034.us, i64 %.032.us
  tail call void @_ZN4Simd4Base8AdjustHiERKhRhi(ptr noundef nonnull align 1 dereferenceable(1) %16, ptr noundef nonnull align 1 dereferenceable(1) %17, i32 noundef %12)
  store i8 0, ptr %14, align 1, !tbaa !5
  store i8 0, ptr %16, align 1, !tbaa !5
  %18 = add nuw i64 %.032.us, 1
  %exitcond.not = icmp eq i64 %18, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %13, !llvm.loop !8

._crit_edge.us:                                   ; preds = %13
  %19 = getelementptr inbounds i8, ptr %.02935.us, i64 %5
  %20 = getelementptr inbounds i8, ptr %.03034.us, i64 %9
  %21 = getelementptr inbounds i8, ptr %.02836.us, i64 %1
  %22 = getelementptr inbounds i8, ptr %.03133.us, i64 %7
  %23 = add nuw i64 %.02737.us, 1
  %exitcond41.not = icmp eq i64 %23, %3
  br i1 %exitcond41.not, label %._crit_edge38, label %.preheader.us, !llvm.loop !10

._crit_edge38:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %11
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8AdjustLoERKhRhi(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base8AdjustHiERKhRhi(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass