; LLVM IR from libxsmm/libxsmm :: src (generator_packed_spgemm_csr_bsparse_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_gp_reg_mapping_struct = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_gemm_descriptor = type <{ i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], i8, i64, i64, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i32, i32, i32, i8 }>
%struct.libxsmm_micro_kernel_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], [4 x i32], i32, [2 x %struct.libxsmm_blocking_info_t], %struct.libxsmm_tile_config, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.libxsmm_blocking_info_t = type { i32, [4 x i32], i32, i32 }
%struct.libxsmm_tile_config = type { i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8, i16, i8 }

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve = external hidden unnamed_addr constant [423 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) #2 {
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  store ptr %0, ptr %16, align 8, !tbaa !5
  store ptr %1, ptr %17, align 8, !tbaa !5
  store ptr %2, ptr %18, align 8, !tbaa !5
  store ptr %3, ptr %19, align 8, !tbaa !5
  store ptr %4, ptr %20, align 8, !tbaa !5
  store ptr %5, ptr %21, align 8, !tbaa !5
  store ptr %6, ptr %22, align 8, !tbaa !5
  store ptr %7, ptr %23, align 8, !tbaa !5
  store i32 %8, ptr %24, align 4, !tbaa !9
  store i32 %9, ptr %25, align 4, !tbaa !9
  store i32 %10, ptr %26, align 4, !tbaa !9
  store i32 %11, ptr %27, align 4, !tbaa !9
  store i32 %12, ptr %28, align 4, !tbaa !9
  store i32 %13, ptr %29, align 4, !tbaa !9
  store i32 %14, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #4
  store i32 0, ptr %32, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #4
  store i32 0, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #4
  store i32 0, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #4
  %41 = load i32, ptr %25, align 4, !tbaa !9
  %42 = load i32, ptr %24, align 4, !tbaa !9
  %43 = sub i32 %41, %42
  %44 = load i32, ptr %28, align 4, !tbaa !9
  %45 = mul i32 %43, %44
  store i32 %45, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #4
  %46 = load i32, ptr %25, align 4, !tbaa !9
  %47 = load i32, ptr %24, align 4, !tbaa !9
  %48 = sub i32 %46, %47
  store i32 %48, ptr %36, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #4
  store i32 0, ptr %37, align 4, !tbaa !9
  %49 = load ptr, ptr %23, align 8, !tbaa !5
  %50 = load i32, ptr %28, align 4, !tbaa !9
  %51 = icmp ugt i32 %50, 0
  br i1 %51, label %52, label %53

52:                                               ; preds = %15
  br label %54

53:                                               ; preds = %15
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 447, ptr noundef @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve) #5
  unreachable

54:                                               ; preds = %52
  %55 = load i32, ptr %27, align 4, !tbaa !9
  %56 = load i32, ptr %28, align 4, !tbaa !9
  %57 = udiv i32 %55, %56
  %58 = icmp ugt i32 %57, 1
  br i1 %58, label %59, label %68

59:                                               ; preds = %54
  %60 = load ptr, ptr %16, align 8, !tbaa !5
  %61 = load ptr, ptr %17, align 8, !tbaa !5
  %62 = load ptr, ptr %18, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %62, i32 0, i32 25
  %64 = load i32, ptr %63, align 4, !tbaa !11
  %65 = load i32, ptr %27, align 4, !tbaa !9
  %66 = load i32, ptr %28, align 4, !tbaa !9
  %67 = udiv i32 %65, %66
  call void @libxsmm_generator_loop_header_aarch64(ptr noundef %60, ptr noundef %61, i32 noundef %64, i32 noundef %67)
  br label %68

68:                                               ; preds = %59, %54
  %69 = load i32, ptr %29, align 4, !tbaa !9
  %70 = icmp ne i32 %69, 0
  br i1 %70, label %71, label %72

71:                                               ; preds = %68
  br label %72

72:                                               ; preds = %71, %68
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %156, %72
  %74 = load i32, ptr %31, align 4, !tbaa !9
  %75 = load i32, ptr %36, align 4, !tbaa !9
  %76 = icmp ult i32 %74, %75
  br i1 %76, label %77, label %159

77:                                               ; preds = %73
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %152, %77
  %79 = load i32, ptr %32, align 4, !tbaa !9
  %80 = load i32, ptr %28, align 4, !tbaa !9
  %81 = icmp ult i32 %79, %80
  br i1 %81, label %82, label %155

82:                                               ; preds = %78
  %83 = load ptr, ptr %20, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %83, i32 0, i32 6
  %85 = load i32, ptr %84, align 1, !tbaa !13
  %86 = and i32 4, %85
  %87 = icmp ne i32 0, %86
  br i1 %87, label %88, label %98

88:                                               ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #4
  %89 = load i32, ptr %31, align 4, !tbaa !9
  %90 = load i32, ptr %28, align 4, !tbaa !9
  %91 = mul i32 %89, %90
  %92 = load i32, ptr %32, align 4, !tbaa !9
  %93 = add i32 %91, %92
  store i32 %93, ptr %38, align 4, !tbaa !9
  %94 = load ptr, ptr %16, align 8, !tbaa !5
  %95 = load i32, ptr %38, align 4, !tbaa !9
  %96 = load i32, ptr %38, align 4, !tbaa !9
  %97 = load i32, ptr %38, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %94, i32 noundef 77606915, i32 noundef %95, i32 noundef %96, i8 noundef zeroext -1, i32 noundef %97, i32 noundef 127, i32 noundef 3)
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #4
  br label %151

98:                                               ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #4
  %99 = load i32, ptr %31, align 4, !tbaa !9
  %100 = load i32, ptr %28, align 4, !tbaa !9
  %101 = mul i32 %99, %100
  %102 = load i32, ptr %32, align 4, !tbaa !9
  %103 = add i32 %101, %102
  store i32 %103, ptr %39, align 4, !tbaa !9
  %104 = load i32, ptr %32, align 4, !tbaa !9
  %105 = load i32, ptr %28, align 4, !tbaa !9
  %106 = sub i32 %105, 1
  %107 = icmp eq i32 %104, %106
  br i1 %107, label %108, label %112

108:                                              ; preds = %98
  %109 = load i32, ptr %29, align 4, !tbaa !9
  %110 = icmp ne i32 %109, 0
  br i1 %110, label %111, label %112

111:                                              ; preds = %108
  br label %150

112:                                              ; preds = %108, %98
  %113 = load ptr, ptr %16, align 8, !tbaa !5
  %114 = load ptr, ptr %18, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %114, i32 0, i32 24
  %116 = load i32, ptr %115, align 4, !tbaa !17
  %117 = load i32, ptr %24, align 4, !tbaa !9
  %118 = zext i32 %117 to i64
  %119 = load i32, ptr %31, align 4, !tbaa !9
  %120 = zext i32 %119 to i64
  %121 = add nsw i64 %118, %120
  %122 = load i32, ptr %30, align 4, !tbaa !9
  %123 = zext i32 %122 to i64
  %124 = mul nsw i64 %121, %123
  %125 = load i32, ptr %26, align 4, !tbaa !9
  %126 = zext i32 %125 to i64
  %127 = load i32, ptr %32, align 4, !tbaa !9
  %128 = zext i32 %127 to i64
  %129 = add nsw i64 %126, %128
  %130 = load ptr, ptr %19, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %130, i32 0, i32 2
  %132 = load i32, ptr %131, align 8, !tbaa !18
  %133 = zext i32 %132 to i64
  %134 = mul nsw i64 %129, %133
  %135 = add nsw i64 %124, %134
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %113, i32 noundef %116, i64 noundef %135)
  %136 = load ptr, ptr %16, align 8, !tbaa !5
  %137 = load ptr, ptr %19, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %137, i32 0, i32 5
  %139 = load i32, ptr %138, align 4, !tbaa !21
  %140 = icmp eq i32 %139, 4
  %141 = zext i1 %140 to i64
  %142 = select i1 %140, i32 -1522515837, i32 -1512030077
  %143 = load ptr, ptr %18, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %143, i32 0, i32 5
  %145 = load i32, ptr %144, align 4, !tbaa !22
  %146 = load ptr, ptr %18, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %146, i32 0, i32 24
  %148 = load i32, ptr %147, align 4, !tbaa !17
  %149 = load i32, ptr %39, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %136, i32 noundef %142, i32 noundef %145, i32 noundef %148, i32 noundef 0, i32 noundef %149, i32 noundef 0)
  br label %150

150:                                              ; preds = %112, %111
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #4
  br label %151

151:                                              ; preds = %150, %88
  br label %152

152:                                              ; preds = %151
  %153 = load i32, ptr %32, align 4, !tbaa !9
  %154 = add i32 %153, 1
  store i32 %154, ptr %32, align 4, !tbaa !9
  br label %78, !llvm.loop !23

155:                                              ; preds = %78
  br label %156

156:                                              ; preds = %155
  %157 = load i32, ptr %31, align 4, !tbaa !9
  %158 = add i32 %157, 1
  store i32 %158, ptr %31, align 4, !tbaa !9
  br label %73, !llvm.loop !25

159:                                              ; preds = %73
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %160

160:                                              ; preds = %411, %159
  %161 = load i32, ptr %33, align 4, !tbaa !9
  %162 = load ptr, ptr %20, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %162, i32 0, i32 2
  %164 = load i32, ptr %163, align 1, !tbaa !26
  %165 = icmp ult i32 %161, %164
  br i1 %165, label %166, label %414

166:                                              ; preds = %160
  %167 = load ptr, ptr %21, align 8, !tbaa !5
  %168 = load i32, ptr %33, align 4, !tbaa !9
  %169 = add i32 %168, 1
  %170 = zext i32 %169 to i64
  %171 = getelementptr inbounds i32, ptr %167, i64 %170
  %172 = load i32, ptr %171, align 4, !tbaa !9
  %173 = load ptr, ptr %21, align 8, !tbaa !5
  %174 = load i32, ptr %33, align 4, !tbaa !9
  %175 = zext i32 %174 to i64
  %176 = getelementptr inbounds i32, ptr %173, i64 %175
  %177 = load i32, ptr %176, align 4, !tbaa !9
  %178 = sub i32 %172, %177
  store i32 %178, ptr %37, align 4, !tbaa !9
  store i32 0, ptr %34, align 4, !tbaa !9
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %179

179:                                              ; preds = %229, %166
  %180 = load i32, ptr %31, align 4, !tbaa !9
  %181 = load i32, ptr %37, align 4, !tbaa !9
  %182 = icmp ult i32 %180, %181
  br i1 %182, label %183, label %232

183:                                              ; preds = %179
  %184 = load ptr, ptr %22, align 8, !tbaa !5
  %185 = load ptr, ptr %21, align 8, !tbaa !5
  %186 = load i32, ptr %33, align 4, !tbaa !9
  %187 = zext i32 %186 to i64
  %188 = getelementptr inbounds i32, ptr %185, i64 %187
  %189 = load i32, ptr %188, align 4, !tbaa !9
  %190 = load i32, ptr %31, align 4, !tbaa !9
  %191 = add i32 %189, %190
  %192 = zext i32 %191 to i64
  %193 = getelementptr inbounds i32, ptr %184, i64 %192
  %194 = load i32, ptr %193, align 4, !tbaa !9
  %195 = load ptr, ptr %20, align 8, !tbaa !5
  %196 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %195, i32 0, i32 1
  %197 = load i32, ptr %196, align 1, !tbaa !27
  %198 = icmp ult i32 %194, %197
  br i1 %198, label %199, label %228

199:                                              ; preds = %183
  %200 = load ptr, ptr %22, align 8, !tbaa !5
  %201 = load ptr, ptr %21, align 8, !tbaa !5
  %202 = load i32, ptr %33, align 4, !tbaa !9
  %203 = zext i32 %202 to i64
  %204 = getelementptr inbounds i32, ptr %201, i64 %203
  %205 = load i32, ptr %204, align 4, !tbaa !9
  %206 = load i32, ptr %31, align 4, !tbaa !9
  %207 = add i32 %205, %206
  %208 = zext i32 %207 to i64
  %209 = getelementptr inbounds i32, ptr %200, i64 %208
  %210 = load i32, ptr %209, align 4, !tbaa !9
  %211 = load i32, ptr %24, align 4, !tbaa !9
  %212 = icmp uge i32 %210, %211
  br i1 %212, label %213, label %228

213:                                              ; preds = %199
  %214 = load ptr, ptr %22, align 8, !tbaa !5
  %215 = load ptr, ptr %21, align 8, !tbaa !5
  %216 = load i32, ptr %33, align 4, !tbaa !9
  %217 = zext i32 %216 to i64
  %218 = getelementptr inbounds i32, ptr %215, i64 %217
  %219 = load i32, ptr %218, align 4, !tbaa !9
  %220 = load i32, ptr %31, align 4, !tbaa !9
  %221 = add i32 %219, %220
  %222 = zext i32 %221 to i64
  %223 = getelementptr inbounds i32, ptr %214, i64 %222
  %224 = load i32, ptr %223, align 4, !tbaa !9
  %225 = load i32, ptr %25, align 4, !tbaa !9
  %226 = icmp ult i32 %224, %225
  br i1 %226, label %227, label %228

227:                                              ; preds = %213
  store i32 1, ptr %34, align 4, !tbaa !9
  br label %228

228:                                              ; preds = %227, %213, %199, %183
  br label %229

229:                                              ; preds = %228
  %230 = load i32, ptr %31, align 4, !tbaa !9
  %231 = add i32 %230, 1
  store i32 %231, ptr %31, align 4, !tbaa !9
  br label %179, !llvm.loop !28

232:                                              ; preds = %179
  %233 = load i32, ptr %34, align 4, !tbaa !9
  %234 = icmp ne i32 %233, 0
  br i1 %234, label %235, label %410

235:                                              ; preds = %232
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %236

236:                                              ; preds = %406, %235
  %237 = load i32, ptr %32, align 4, !tbaa !9
  %238 = load i32, ptr %28, align 4, !tbaa !9
  %239 = icmp ult i32 %237, %238
  br i1 %239, label %240, label %409

240:                                              ; preds = %236
  %241 = load i32, ptr %32, align 4, !tbaa !9
  %242 = load i32, ptr %28, align 4, !tbaa !9
  %243 = sub i32 %242, 1
  %244 = icmp eq i32 %241, %243
  br i1 %244, label %245, label %249

245:                                              ; preds = %240
  %246 = load i32, ptr %29, align 4, !tbaa !9
  %247 = icmp ne i32 %246, 0
  br i1 %247, label %248, label %249

248:                                              ; preds = %245
  br label %284

249:                                              ; preds = %245, %240
  %250 = load ptr, ptr %16, align 8, !tbaa !5
  %251 = load ptr, ptr %18, align 8, !tbaa !5
  %252 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %251, i32 0, i32 22
  %253 = load i32, ptr %252, align 4, !tbaa !29
  %254 = load i32, ptr %33, align 4, !tbaa !9
  %255 = zext i32 %254 to i64
  %256 = load i32, ptr %30, align 4, !tbaa !9
  %257 = zext i32 %256 to i64
  %258 = mul nsw i64 %255, %257
  %259 = load i32, ptr %26, align 4, !tbaa !9
  %260 = zext i32 %259 to i64
  %261 = load i32, ptr %32, align 4, !tbaa !9
  %262 = zext i32 %261 to i64
  %263 = add nsw i64 %260, %262
  %264 = load ptr, ptr %19, align 8, !tbaa !5
  %265 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %264, i32 0, i32 2
  %266 = load i32, ptr %265, align 8, !tbaa !18
  %267 = zext i32 %266 to i64
  %268 = mul nsw i64 %263, %267
  %269 = add nsw i64 %258, %268
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %250, i32 noundef %253, i64 noundef %269)
  %270 = load ptr, ptr %16, align 8, !tbaa !5
  %271 = load ptr, ptr %19, align 8, !tbaa !5
  %272 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %271, i32 0, i32 3
  %273 = load i32, ptr %272, align 4, !tbaa !30
  %274 = icmp eq i32 %273, 4
  %275 = zext i1 %274 to i64
  %276 = select i1 %274, i32 -1522515837, i32 -1512030077
  %277 = load ptr, ptr %18, align 8, !tbaa !5
  %278 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %277, i32 0, i32 1
  %279 = load i32, ptr %278, align 4, !tbaa !31
  %280 = load ptr, ptr %18, align 8, !tbaa !5
  %281 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %280, i32 0, i32 22
  %282 = load i32, ptr %281, align 4, !tbaa !29
  %283 = load i32, ptr %35, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %270, i32 noundef %276, i32 noundef %279, i32 noundef %282, i32 noundef 0, i32 noundef %283, i32 noundef 0)
  br label %284

284:                                              ; preds = %249, %248
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %285

285:                                              ; preds = %402, %284
  %286 = load i32, ptr %31, align 4, !tbaa !9
  %287 = load i32, ptr %37, align 4, !tbaa !9
  %288 = icmp ult i32 %286, %287
  br i1 %288, label %289, label %405

289:                                              ; preds = %285
  %290 = load ptr, ptr %22, align 8, !tbaa !5
  %291 = load ptr, ptr %21, align 8, !tbaa !5
  %292 = load i32, ptr %33, align 4, !tbaa !9
  %293 = zext i32 %292 to i64
  %294 = getelementptr inbounds i32, ptr %291, i64 %293
  %295 = load i32, ptr %294, align 4, !tbaa !9
  %296 = load i32, ptr %31, align 4, !tbaa !9
  %297 = add i32 %295, %296
  %298 = zext i32 %297 to i64
  %299 = getelementptr inbounds i32, ptr %290, i64 %298
  %300 = load i32, ptr %299, align 4, !tbaa !9
  %301 = load ptr, ptr %20, align 8, !tbaa !5
  %302 = getelementptr inbounds %struct.libxsmm_gemm_descriptor, ptr %301, i32 0, i32 1
  %303 = load i32, ptr %302, align 1, !tbaa !27
  %304 = icmp ult i32 %300, %303
  br i1 %304, label %305, label %401

305:                                              ; preds = %289
  %306 = load ptr, ptr %22, align 8, !tbaa !5
  %307 = load ptr, ptr %21, align 8, !tbaa !5
  %308 = load i32, ptr %33, align 4, !tbaa !9
  %309 = zext i32 %308 to i64
  %310 = getelementptr inbounds i32, ptr %307, i64 %309
  %311 = load i32, ptr %310, align 4, !tbaa !9
  %312 = load i32, ptr %31, align 4, !tbaa !9
  %313 = add i32 %311, %312
  %314 = zext i32 %313 to i64
  %315 = getelementptr inbounds i32, ptr %306, i64 %314
  %316 = load i32, ptr %315, align 4, !tbaa !9
  %317 = load i32, ptr %24, align 4, !tbaa !9
  %318 = icmp uge i32 %316, %317
  br i1 %318, label %319, label %401

319:                                              ; preds = %305
  %320 = load ptr, ptr %22, align 8, !tbaa !5
  %321 = load ptr, ptr %21, align 8, !tbaa !5
  %322 = load i32, ptr %33, align 4, !tbaa !9
  %323 = zext i32 %322 to i64
  %324 = getelementptr inbounds i32, ptr %321, i64 %323
  %325 = load i32, ptr %324, align 4, !tbaa !9
  %326 = load i32, ptr %31, align 4, !tbaa !9
  %327 = add i32 %325, %326
  %328 = zext i32 %327 to i64
  %329 = getelementptr inbounds i32, ptr %320, i64 %328
  %330 = load i32, ptr %329, align 4, !tbaa !9
  %331 = load i32, ptr %25, align 4, !tbaa !9
  %332 = icmp ult i32 %330, %331
  br i1 %332, label %333, label %401

333:                                              ; preds = %319
  %334 = load ptr, ptr %16, align 8, !tbaa !5
  %335 = load ptr, ptr %18, align 8, !tbaa !5
  %336 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %335, i32 0, i32 23
  %337 = load i32, ptr %336, align 4, !tbaa !32
  %338 = load ptr, ptr %21, align 8, !tbaa !5
  %339 = load i32, ptr %33, align 4, !tbaa !9
  %340 = zext i32 %339 to i64
  %341 = getelementptr inbounds i32, ptr %338, i64 %340
  %342 = load i32, ptr %341, align 4, !tbaa !9
  %343 = zext i32 %342 to i64
  %344 = load i32, ptr %31, align 4, !tbaa !9
  %345 = zext i32 %344 to i64
  %346 = add nsw i64 %343, %345
  %347 = load ptr, ptr %19, align 8, !tbaa !5
  %348 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %347, i32 0, i32 3
  %349 = load i32, ptr %348, align 4, !tbaa !30
  %350 = zext i32 %349 to i64
  %351 = mul nsw i64 %346, %350
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %334, i32 noundef %337, i64 noundef %351)
  %352 = load ptr, ptr %16, align 8, !tbaa !5
  %353 = load ptr, ptr %18, align 8, !tbaa !5
  %354 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %353, i32 0, i32 3
  %355 = load i32, ptr %354, align 4, !tbaa !33
  %356 = load ptr, ptr %18, align 8, !tbaa !5
  %357 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %356, i32 0, i32 23
  %358 = load i32, ptr %357, align 4, !tbaa !32
  %359 = load ptr, ptr %18, align 8, !tbaa !5
  %360 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %359, i32 0, i32 23
  %361 = load i32, ptr %360, align 4, !tbaa !32
  call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %352, i32 noundef 184549383, i32 noundef %355, i32 noundef %358, i32 noundef %361, i32 noundef 0, i32 noundef 0)
  %362 = load ptr, ptr %16, align 8, !tbaa !5
  %363 = load ptr, ptr %19, align 8, !tbaa !5
  %364 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %363, i32 0, i32 3
  %365 = load i32, ptr %364, align 4, !tbaa !30
  %366 = icmp eq i32 %365, 4
  %367 = zext i1 %366 to i64
  %368 = select i1 %366, i32 -2059353978, i32 -2050957178
  %369 = load ptr, ptr %18, align 8, !tbaa !5
  %370 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %369, i32 0, i32 23
  %371 = load i32, ptr %370, align 4, !tbaa !32
  %372 = load i32, ptr %35, align 4, !tbaa !9
  %373 = add i32 %372, 1
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %362, i32 noundef %368, i32 noundef %371, i32 noundef 127, i32 noundef 0, i32 noundef %373, i32 noundef 0)
  %374 = load ptr, ptr %16, align 8, !tbaa !5
  %375 = load i32, ptr %35, align 4, !tbaa !9
  %376 = load i32, ptr %35, align 4, !tbaa !9
  %377 = add i32 %376, 1
  %378 = load ptr, ptr %22, align 8, !tbaa !5
  %379 = load ptr, ptr %21, align 8, !tbaa !5
  %380 = load i32, ptr %33, align 4, !tbaa !9
  %381 = zext i32 %380 to i64
  %382 = getelementptr inbounds i32, ptr %379, i64 %381
  %383 = load i32, ptr %382, align 4, !tbaa !9
  %384 = load i32, ptr %31, align 4, !tbaa !9
  %385 = add i32 %383, %384
  %386 = zext i32 %385 to i64
  %387 = getelementptr inbounds i32, ptr %378, i64 %386
  %388 = load i32, ptr %387, align 4, !tbaa !9
  %389 = load i32, ptr %24, align 4, !tbaa !9
  %390 = sub i32 %388, %389
  %391 = load i32, ptr %28, align 4, !tbaa !9
  %392 = mul i32 %390, %391
  %393 = load i32, ptr %32, align 4, !tbaa !9
  %394 = add i32 %392, %393
  %395 = load ptr, ptr %19, align 8, !tbaa !5
  %396 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %395, i32 0, i32 3
  %397 = load i32, ptr %396, align 4, !tbaa !30
  %398 = icmp eq i32 %397, 4
  %399 = zext i1 %398 to i64
  %400 = select i1 %398, i32 2, i32 3
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %374, i32 noundef 1696596099, i32 noundef %375, i32 noundef %377, i8 noundef zeroext -1, i32 noundef %394, i32 noundef 0, i32 noundef %400)
  br label %401

401:                                              ; preds = %333, %319, %305, %289
  br label %402

402:                                              ; preds = %401
  %403 = load i32, ptr %31, align 4, !tbaa !9
  %404 = add i32 %403, 1
  store i32 %404, ptr %31, align 4, !tbaa !9
  br label %285, !llvm.loop !34

405:                                              ; preds = %285
  br label %406

406:                                              ; preds = %405
  %407 = load i32, ptr %32, align 4, !tbaa !9
  %408 = add i32 %407, 1
  store i32 %408, ptr %32, align 4, !tbaa !9
  br label %236, !llvm.loop !35

409:                                              ; preds = %236
  br label %410

410:                                              ; preds = %409, %232
  br label %411

411:                                              ; preds = %410
  %412 = load i32, ptr %33, align 4, !tbaa !9
  %413 = add i32 %412, 1
  store i32 %413, ptr %33, align 4, !tbaa !9
  br label %160, !llvm.loop !36

414:                                              ; preds = %160
  store i32 0, ptr %31, align 4, !tbaa !9
  br label %415

415:                                              ; preds = %481, %414
  %416 = load i32, ptr %31, align 4, !tbaa !9
  %417 = load i32, ptr %36, align 4, !tbaa !9
  %418 = icmp ult i32 %416, %417
  br i1 %418, label %419, label %484

419:                                              ; preds = %415
  store i32 0, ptr %32, align 4, !tbaa !9
  br label %420

420:                                              ; preds = %477, %419
  %421 = load i32, ptr %32, align 4, !tbaa !9
  %422 = load i32, ptr %28, align 4, !tbaa !9
  %423 = icmp ult i32 %421, %422
  br i1 %423, label %424, label %480

424:                                              ; preds = %420
  %425 = load i32, ptr %32, align 4, !tbaa !9
  %426 = load i32, ptr %28, align 4, !tbaa !9
  %427 = sub i32 %426, 1
  %428 = icmp eq i32 %425, %427
  br i1 %428, label %429, label %433

429:                                              ; preds = %424
  %430 = load i32, ptr %29, align 4, !tbaa !9
  %431 = icmp ne i32 %430, 0
  br i1 %431, label %432, label %433

432:                                              ; preds = %429
  br label %476

433:                                              ; preds = %429, %424
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #4
  %434 = load i32, ptr %31, align 4, !tbaa !9
  %435 = load i32, ptr %28, align 4, !tbaa !9
  %436 = mul i32 %434, %435
  %437 = load i32, ptr %32, align 4, !tbaa !9
  %438 = add i32 %436, %437
  store i32 %438, ptr %40, align 4, !tbaa !9
  %439 = load ptr, ptr %16, align 8, !tbaa !5
  %440 = load ptr, ptr %18, align 8, !tbaa !5
  %441 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %440, i32 0, i32 24
  %442 = load i32, ptr %441, align 4, !tbaa !17
  %443 = load i32, ptr %24, align 4, !tbaa !9
  %444 = zext i32 %443 to i64
  %445 = load i32, ptr %31, align 4, !tbaa !9
  %446 = zext i32 %445 to i64
  %447 = add nsw i64 %444, %446
  %448 = load i32, ptr %30, align 4, !tbaa !9
  %449 = zext i32 %448 to i64
  %450 = mul nsw i64 %447, %449
  %451 = load i32, ptr %26, align 4, !tbaa !9
  %452 = zext i32 %451 to i64
  %453 = load i32, ptr %32, align 4, !tbaa !9
  %454 = zext i32 %453 to i64
  %455 = add nsw i64 %452, %454
  %456 = load ptr, ptr %19, align 8, !tbaa !5
  %457 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %456, i32 0, i32 2
  %458 = load i32, ptr %457, align 8, !tbaa !18
  %459 = zext i32 %458 to i64
  %460 = mul nsw i64 %455, %459
  %461 = add nsw i64 %450, %460
  call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %439, i32 noundef %442, i64 noundef %461)
  %462 = load ptr, ptr %16, align 8, !tbaa !5
  %463 = load ptr, ptr %19, align 8, !tbaa !5
  %464 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %463, i32 0, i32 5
  %465 = load i32, ptr %464, align 4, !tbaa !21
  %466 = icmp eq i32 %465, 4
  %467 = zext i1 %466 to i64
  %468 = select i1 %466, i32 -448774013, i32 -438288253
  %469 = load ptr, ptr %18, align 8, !tbaa !5
  %470 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %469, i32 0, i32 5
  %471 = load i32, ptr %470, align 4, !tbaa !22
  %472 = load ptr, ptr %18, align 8, !tbaa !5
  %473 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %472, i32 0, i32 24
  %474 = load i32, ptr %473, align 4, !tbaa !17
  %475 = load i32, ptr %40, align 4, !tbaa !9
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %462, i32 noundef %468, i32 noundef %471, i32 noundef %474, i32 noundef 0, i32 noundef %475, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #4
  br label %476

476:                                              ; preds = %433, %432
  br label %477

477:                                              ; preds = %476
  %478 = load i32, ptr %32, align 4, !tbaa !9
  %479 = add i32 %478, 1
  store i32 %479, ptr %32, align 4, !tbaa !9
  br label %420, !llvm.loop !37

480:                                              ; preds = %420
  br label %481

481:                                              ; preds = %480
  %482 = load i32, ptr %31, align 4, !tbaa !9
  %483 = add i32 %482, 1
  store i32 %483, ptr %31, align 4, !tbaa !9
  br label %415, !llvm.loop !38

484:                                              ; preds = %415
  %485 = load i32, ptr %27, align 4, !tbaa !9
  %486 = load i32, ptr %28, align 4, !tbaa !9
  %487 = udiv i32 %485, %486
  %488 = icmp ugt i32 %487, 1
  br i1 %488, label %489, label %589

489:                                              ; preds = %484
  %490 = load ptr, ptr %16, align 8, !tbaa !5
  %491 = load ptr, ptr %18, align 8, !tbaa !5
  %492 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %491, i32 0, i32 1
  %493 = load i32, ptr %492, align 4, !tbaa !31
  %494 = load ptr, ptr %18, align 8, !tbaa !5
  %495 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %494, i32 0, i32 22
  %496 = load i32, ptr %495, align 4, !tbaa !29
  %497 = load ptr, ptr %18, align 8, !tbaa !5
  %498 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %497, i32 0, i32 1
  %499 = load i32, ptr %498, align 4, !tbaa !31
  %500 = load i32, ptr %28, align 4, !tbaa !9
  %501 = zext i32 %500 to i64
  %502 = load ptr, ptr %19, align 8, !tbaa !5
  %503 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %502, i32 0, i32 2
  %504 = load i32, ptr %503, align 8, !tbaa !18
  %505 = zext i32 %504 to i64
  %506 = mul nsw i64 %501, %505
  %507 = load ptr, ptr %19, align 8, !tbaa !5
  %508 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %507, i32 0, i32 3
  %509 = load i32, ptr %508, align 4, !tbaa !30
  %510 = zext i32 %509 to i64
  %511 = mul nsw i64 %506, %510
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %490, i32 noundef 4096, i32 noundef %493, i32 noundef %496, i32 noundef %499, i64 noundef %511)
  %512 = load ptr, ptr %16, align 8, !tbaa !5
  %513 = load ptr, ptr %18, align 8, !tbaa !5
  %514 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %513, i32 0, i32 5
  %515 = load i32, ptr %514, align 4, !tbaa !22
  %516 = load ptr, ptr %18, align 8, !tbaa !5
  %517 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %516, i32 0, i32 24
  %518 = load i32, ptr %517, align 4, !tbaa !17
  %519 = load ptr, ptr %18, align 8, !tbaa !5
  %520 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %519, i32 0, i32 5
  %521 = load i32, ptr %520, align 4, !tbaa !22
  %522 = load i32, ptr %28, align 4, !tbaa !9
  %523 = zext i32 %522 to i64
  %524 = load ptr, ptr %19, align 8, !tbaa !5
  %525 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %524, i32 0, i32 2
  %526 = load i32, ptr %525, align 8, !tbaa !18
  %527 = zext i32 %526 to i64
  %528 = mul nsw i64 %523, %527
  %529 = load ptr, ptr %19, align 8, !tbaa !5
  %530 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %529, i32 0, i32 5
  %531 = load i32, ptr %530, align 4, !tbaa !21
  %532 = zext i32 %531 to i64
  %533 = mul nsw i64 %528, %532
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %512, i32 noundef 4096, i32 noundef %515, i32 noundef %518, i32 noundef %521, i64 noundef %533)
  %534 = load ptr, ptr %16, align 8, !tbaa !5
  %535 = load ptr, ptr %17, align 8, !tbaa !5
  %536 = load ptr, ptr %18, align 8, !tbaa !5
  %537 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %536, i32 0, i32 25
  %538 = load i32, ptr %537, align 4, !tbaa !11
  call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %534, ptr noundef %535, i32 noundef %538, i32 noundef 1)
  %539 = load ptr, ptr %16, align 8, !tbaa !5
  %540 = load ptr, ptr %18, align 8, !tbaa !5
  %541 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %540, i32 0, i32 1
  %542 = load i32, ptr %541, align 4, !tbaa !31
  %543 = load ptr, ptr %18, align 8, !tbaa !5
  %544 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %543, i32 0, i32 22
  %545 = load i32, ptr %544, align 4, !tbaa !29
  %546 = load ptr, ptr %18, align 8, !tbaa !5
  %547 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %546, i32 0, i32 1
  %548 = load i32, ptr %547, align 4, !tbaa !31
  %549 = load i32, ptr %27, align 4, !tbaa !9
  %550 = zext i32 %549 to i64
  %551 = load i32, ptr %28, align 4, !tbaa !9
  %552 = zext i32 %551 to i64
  %553 = sdiv i64 %550, %552
  %554 = load ptr, ptr %19, align 8, !tbaa !5
  %555 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %554, i32 0, i32 2
  %556 = load i32, ptr %555, align 8, !tbaa !18
  %557 = zext i32 %556 to i64
  %558 = mul nsw i64 %553, %557
  %559 = load ptr, ptr %19, align 8, !tbaa !5
  %560 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %559, i32 0, i32 3
  %561 = load i32, ptr %560, align 4, !tbaa !30
  %562 = zext i32 %561 to i64
  %563 = mul nsw i64 %558, %562
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %539, i32 noundef 4097, i32 noundef %542, i32 noundef %545, i32 noundef %548, i64 noundef %563)
  %564 = load ptr, ptr %16, align 8, !tbaa !5
  %565 = load ptr, ptr %18, align 8, !tbaa !5
  %566 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %565, i32 0, i32 5
  %567 = load i32, ptr %566, align 4, !tbaa !22
  %568 = load ptr, ptr %18, align 8, !tbaa !5
  %569 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %568, i32 0, i32 24
  %570 = load i32, ptr %569, align 4, !tbaa !17
  %571 = load ptr, ptr %18, align 8, !tbaa !5
  %572 = getelementptr inbounds %struct.libxsmm_gp_reg_mapping_struct, ptr %571, i32 0, i32 5
  %573 = load i32, ptr %572, align 4, !tbaa !22
  %574 = load i32, ptr %27, align 4, !tbaa !9
  %575 = zext i32 %574 to i64
  %576 = load i32, ptr %28, align 4, !tbaa !9
  %577 = zext i32 %576 to i64
  %578 = sdiv i64 %575, %577
  %579 = load ptr, ptr %19, align 8, !tbaa !5
  %580 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %579, i32 0, i32 2
  %581 = load i32, ptr %580, align 8, !tbaa !18
  %582 = zext i32 %581 to i64
  %583 = mul nsw i64 %578, %582
  %584 = load ptr, ptr %19, align 8, !tbaa !5
  %585 = getelementptr inbounds %struct.libxsmm_micro_kernel_config, ptr %584, i32 0, i32 5
  %586 = load i32, ptr %585, align 4, !tbaa !21
  %587 = zext i32 %586 to i64
  %588 = mul nsw i64 %583, %587
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %564, i32 noundef 4097, i32 noundef %567, i32 noundef %570, i32 noundef %573, i64 noundef %588)
  br label %589

589:                                              ; preds = %489, %484
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 100}
!12 = !{!"libxsmm_gp_reg_mapping_struct", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128}
!13 = !{!14, !10, i64 24}
!14 = !{!"libxsmm_gemm_descriptor", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 28, !7, i64 29, !7, i64 32, !15, i64 33, !15, i64 41, !7, i64 49, !10, i64 50, !10, i64 54, !10, i64 58, !16, i64 62, !16, i64 64, !7, i64 66, !7, i64 67, !7, i64 68, !7, i64 69, !16, i64 70, !16, i64 72, !16, i64 74, !16, i64 76, !16, i64 78, !16, i64 80, !10, i64 82, !10, i64 86, !10, i64 90, !7, i64 94}
!15 = !{!"long long", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!12, !10, i64 96}
!18 = !{!19, !10, i64 8}
!19 = !{!"libxsmm_micro_kernel_config", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !10, i64 340, !10, i64 344, !10, i64 348, !10, i64 352, !10, i64 356, !10, i64 360, !7, i64 364, !7, i64 380, !7, i64 396, !7, i64 412, !7, i64 428, !7, i64 444, !10, i64 460, !7, i64 464, !20, i64 520, !10, i64 556, !10, i64 560, !10, i64 564, !10, i64 568, !10, i64 572, !10, i64 576, !10, i64 580, !10, i64 584, !6, i64 592, !10, i64 600, !10, i64 604, !10, i64 608, !10, i64 612, !6, i64 616, !10, i64 624, !10, i64 628, !10, i64 632, !10, i64 636, !10, i64 640, !10, i64 644, !10, i64 648, !10, i64 652, !10, i64 656, !10, i64 660, !10, i64 664, !10, i64 668, !10, i64 672, !10, i64 676, !10, i64 680}
!20 = !{!"libxsmm_tile_config", !7, i64 0, !16, i64 2, !7, i64 4, !16, i64 6, !7, i64 8, !16, i64 10, !7, i64 12, !16, i64 14, !7, i64 16, !16, i64 18, !7, i64 20, !16, i64 22, !7, i64 24, !16, i64 26, !7, i64 28, !16, i64 30, !7, i64 32}
!21 = !{!19, !10, i64 20}
!22 = !{!12, !10, i64 20}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}
!26 = !{!14, !10, i64 8}
!27 = !{!14, !10, i64 4}
!28 = distinct !{!28, !24}
!29 = !{!12, !10, i64 88}
!30 = !{!19, !10, i64 12}
!31 = !{!12, !10, i64 4}
!32 = !{!12, !10, i64 92}
!33 = !{!12, !10, i64 12}
!34 = distinct !{!34, !24}
!35 = distinct !{!35, !24}
!36 = distinct !{!36, !24}
!37 = distinct !{!37, !24}
!38 = distinct !{!38, !24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [99 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve = external hidden unnamed_addr constant [423 x i8], align 1

declare void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_loop_header_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readnone %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12, i32 noundef %13, i32 noundef %14) local_unnamed_addr #1 {
  %16 = sub i32 %9, %8
  %17 = mul i32 %16, %12
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %18, label %19

18:                                               ; preds = %15
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 447, ptr noundef nonnull @__PRETTY_FUNCTION__.libxsmm_generator_packed_spgemm_csr_bsparse_aarch64_kloop_sve) #4
  unreachable

19:                                               ; preds = %15
  %20 = udiv i32 %11, %12
  %21 = icmp ugt i32 %20, 1
  br i1 %21, label %22, label %25

22:                                               ; preds = %19
  %23 = getelementptr inbounds i8, ptr %2, i64 100
  %24 = load i32, ptr %23, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_header_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %24, i32 noundef %20) #5
  br label %25

25:                                               ; preds = %22, %19
  %.not250 = icmp eq i32 %9, %8
  br i1 %.not250, label %.preheader226, label %.preheader227.lr.ph

.preheader227.lr.ph:                              ; preds = %25
  %26 = getelementptr inbounds i8, ptr %4, i64 24
  %.not251 = icmp eq i32 %13, 0
  %27 = getelementptr inbounds i8, ptr %2, i64 96
  %28 = zext i32 %8 to i64
  %29 = zext i32 %14 to i64
  %30 = zext i32 %10 to i64
  %31 = getelementptr inbounds i8, ptr %3, i64 8
  %32 = getelementptr inbounds i8, ptr %3, i64 20
  %33 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not251, label %.preheader227.preheader, label %.preheader227.us.preheader

.preheader227.us.preheader:                       ; preds = %.preheader227.lr.ph
  %34 = add i32 %12, -1
  %35 = zext i32 %34 to i64
  %wide.trip.count263 = zext i32 %16 to i64
  %wide.trip.count = zext i32 %12 to i64
  br label %.preheader227.us

.preheader227.preheader:                          ; preds = %.preheader227.lr.ph
  %wide.trip.count274 = zext i32 %16 to i64
  %wide.trip.count269 = zext i32 %12 to i64
  br label %.preheader227

.preheader227.us:                                 ; preds = %.preheader227.us.preheader, %.split.us230
  %indvars.iv260 = phi i64 [ 0, %.preheader227.us.preheader ], [ %indvars.iv.next261, %.split.us230 ]
  %36 = trunc nuw i64 %indvars.iv260 to i32
  %37 = mul i32 %36, %12
  %38 = add nuw nsw i64 %indvars.iv260, %28
  %39 = mul nuw nsw i64 %38, %29
  br label %40

.split.us230:                                     ; preds = %62
  %indvars.iv.next261 = add nuw nsw i64 %indvars.iv260, 1
  %exitcond264.not = icmp eq i64 %indvars.iv.next261, %wide.trip.count263
  br i1 %exitcond264.not, label %.preheader226, label %.preheader227.us, !llvm.loop !10

40:                                               ; preds = %.preheader227.us, %62
  %indvars.iv = phi i64 [ 0, %.preheader227.us ], [ %indvars.iv.next, %62 ]
  %41 = load i32, ptr %26, align 1, !tbaa !12
  %42 = and i32 %41, 4
  %.not215.us232 = icmp eq i32 %42, 0
  br i1 %.not215.us232, label %46, label %43

43:                                               ; preds = %40
  %44 = trunc nuw i64 %indvars.iv to i32
  %45 = add i32 %37, %44
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %45, i32 noundef %45, i8 noundef zeroext -1, i32 noundef %45, i32 noundef 127, i32 noundef 3) #5
  br label %62

46:                                               ; preds = %40
  %47 = icmp eq i64 %indvars.iv, %35
  br i1 %47, label %62, label %48

48:                                               ; preds = %46
  %49 = trunc nuw i64 %indvars.iv to i32
  %50 = add i32 %37, %49
  %51 = load i32, ptr %27, align 4, !tbaa !16
  %52 = add nuw nsw i64 %indvars.iv, %30
  %53 = load i32, ptr %31, align 8, !tbaa !17
  %54 = zext i32 %53 to i64
  %55 = mul nuw nsw i64 %52, %54
  %56 = add nuw nsw i64 %55, %39
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %51, i64 noundef %56) #5
  %57 = load i32, ptr %32, align 4, !tbaa !21
  %58 = icmp eq i32 %57, 4
  %59 = select i1 %58, i32 -1522515837, i32 -1512030077
  %60 = load i32, ptr %33, align 4, !tbaa !22
  %61 = load i32, ptr %27, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %59, i32 noundef %60, i32 noundef %61, i32 noundef 0, i32 noundef %50, i32 noundef 0) #5
  br label %62

62:                                               ; preds = %48, %46, %43
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.split.us230, label %40, !llvm.loop !23

.preheader227:                                    ; preds = %.preheader227.preheader, %.split.us
  %indvars.iv271 = phi i64 [ 0, %.preheader227.preheader ], [ %indvars.iv.next272, %.split.us ]
  %63 = trunc nuw i64 %indvars.iv271 to i32
  %64 = mul i32 %63, %12
  %65 = add nuw nsw i64 %indvars.iv271, %28
  %66 = mul nuw nsw i64 %65, %29
  br label %67

67:                                               ; preds = %85, %.preheader227
  %indvars.iv265 = phi i64 [ %indvars.iv.next266, %85 ], [ 0, %.preheader227 ]
  %68 = load i32, ptr %26, align 1, !tbaa !12
  %69 = and i32 %68, 4
  %.not215.us = icmp eq i32 %69, 0
  %70 = trunc nuw i64 %indvars.iv265 to i32
  %71 = add i32 %64, %70
  br i1 %.not215.us, label %73, label %72

72:                                               ; preds = %67
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 77606915, i32 noundef %71, i32 noundef %71, i8 noundef zeroext -1, i32 noundef %71, i32 noundef 127, i32 noundef 3) #5
  br label %85

73:                                               ; preds = %67
  %74 = load i32, ptr %27, align 4, !tbaa !16
  %75 = add nuw nsw i64 %indvars.iv265, %30
  %76 = load i32, ptr %31, align 8, !tbaa !17
  %77 = zext i32 %76 to i64
  %78 = mul nuw nsw i64 %75, %77
  %79 = add nuw nsw i64 %78, %66
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %74, i64 noundef %79) #5
  %80 = load i32, ptr %32, align 4, !tbaa !21
  %81 = icmp eq i32 %80, 4
  %82 = select i1 %81, i32 -1522515837, i32 -1512030077
  %83 = load i32, ptr %33, align 4, !tbaa !22
  %84 = load i32, ptr %27, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %82, i32 noundef %83, i32 noundef %84, i32 noundef 0, i32 noundef %71, i32 noundef 0) #5
  br label %85

85:                                               ; preds = %73, %72
  %indvars.iv.next266 = add nuw nsw i64 %indvars.iv265, 1
  %exitcond270.not = icmp eq i64 %indvars.iv.next266, %wide.trip.count269
  br i1 %exitcond270.not, label %.split.us, label %67, !llvm.loop !23

.split.us:                                        ; preds = %85
  %indvars.iv.next272 = add nuw nsw i64 %indvars.iv271, 1
  %exitcond275.not = icmp eq i64 %indvars.iv.next272, %wide.trip.count274
  br i1 %exitcond275.not, label %.preheader226, label %.preheader227, !llvm.loop !10

.preheader226:                                    ; preds = %.split.us230, %.split.us, %25
  %86 = getelementptr inbounds i8, ptr %4, i64 8
  %87 = load i32, ptr %86, align 1, !tbaa !24
  %.not252 = icmp eq i32 %87, 0
  br i1 %.not252, label %.preheader224, label %.lr.ph242

.lr.ph242:                                        ; preds = %.preheader226
  %88 = getelementptr inbounds i8, ptr %4, i64 4
  %89 = add i32 %12, -1
  %90 = icmp ne i32 %13, 0
  %91 = getelementptr inbounds i8, ptr %2, i64 88
  %92 = zext i32 %14 to i64
  %93 = zext i32 %10 to i64
  %94 = getelementptr inbounds i8, ptr %3, i64 8
  %95 = getelementptr inbounds i8, ptr %3, i64 12
  %96 = getelementptr inbounds i8, ptr %2, i64 4
  %97 = getelementptr inbounds i8, ptr %2, i64 92
  %98 = getelementptr inbounds i8, ptr %2, i64 12
  %99 = add i32 %17, 1
  %100 = zext i32 %89 to i64
  %umax289 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count290 = zext i32 %umax289 to i64
  br label %131

.preheader224:                                    ; preds = %.loopexit, %.preheader226
  br i1 %.not250, label %._crit_edge246, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader224
  %.not256 = icmp eq i32 %13, 0
  %101 = getelementptr inbounds i8, ptr %2, i64 96
  %102 = zext i32 %8 to i64
  %103 = zext i32 %14 to i64
  %104 = zext i32 %10 to i64
  %105 = getelementptr inbounds i8, ptr %3, i64 8
  %106 = getelementptr inbounds i8, ptr %3, i64 20
  %107 = getelementptr inbounds i8, ptr %2, i64 20
  br i1 %.not256, label %.preheader.preheader, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %108 = add i32 %12, -1
  %109 = zext i32 %108 to i64
  %umax298 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count304 = zext i32 %16 to i64
  %wide.trip.count299 = zext i32 %umax298 to i64
  br label %.preheader.us

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %umax309 = tail call i32 @llvm.umax.i32(i32 %12, i32 1)
  %wide.trip.count315 = zext i32 %16 to i64
  %wide.trip.count310 = zext i32 %umax309 to i64
  br label %.preheader

.preheader.us:                                    ; preds = %.preheader.us.preheader, %.split.us247
  %indvars.iv301 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next302, %.split.us247 ]
  %110 = trunc nuw i64 %indvars.iv301 to i32
  %111 = mul i32 %110, %12
  %112 = add nuw nsw i64 %indvars.iv301, %102
  %113 = mul nuw nsw i64 %112, %103
  br label %114

.split.us247:                                     ; preds = %130
  %indvars.iv.next302 = add nuw nsw i64 %indvars.iv301, 1
  %exitcond305.not = icmp eq i64 %indvars.iv.next302, %wide.trip.count304
  br i1 %exitcond305.not, label %._crit_edge246, label %.preheader.us, !llvm.loop !25

114:                                              ; preds = %.preheader.us, %130
  %indvars.iv295 = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next296, %130 ]
  %115 = icmp eq i64 %indvars.iv295, %109
  br i1 %115, label %130, label %116

116:                                              ; preds = %114
  %117 = trunc nuw i64 %indvars.iv295 to i32
  %118 = add i32 %111, %117
  %119 = load i32, ptr %101, align 4, !tbaa !16
  %120 = add nuw nsw i64 %indvars.iv295, %104
  %121 = load i32, ptr %105, align 8, !tbaa !17
  %122 = zext i32 %121 to i64
  %123 = mul nuw nsw i64 %120, %122
  %124 = add nuw nsw i64 %123, %113
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %119, i64 noundef %124) #5
  %125 = load i32, ptr %106, align 4, !tbaa !21
  %126 = icmp eq i32 %125, 4
  %127 = select i1 %126, i32 -448774013, i32 -438288253
  %128 = load i32, ptr %107, align 4, !tbaa !22
  %129 = load i32, ptr %101, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %127, i32 noundef %128, i32 noundef %129, i32 noundef 0, i32 noundef %118, i32 noundef 0) #5
  br label %130

130:                                              ; preds = %116, %114
  %indvars.iv.next296 = add nuw nsw i64 %indvars.iv295, 1
  %exitcond300.not = icmp eq i64 %indvars.iv.next296, %wide.trip.count299
  br i1 %exitcond300.not, label %.split.us247, label %114, !llvm.loop !26

131:                                              ; preds = %.lr.ph242, %.loopexit
  %132 = phi i32 [ %87, %.lr.ph242 ], [ %215, %.loopexit ]
  %indvars.iv292 = phi i64 [ 0, %.lr.ph242 ], [ %indvars.iv.next293, %.loopexit ]
  %indvars.iv.next293 = add nuw nsw i64 %indvars.iv292, 1
  %133 = getelementptr inbounds i32, ptr %5, i64 %indvars.iv.next293
  %134 = load i32, ptr %133, align 4, !tbaa !27
  %135 = getelementptr inbounds i32, ptr %5, i64 %indvars.iv292
  %136 = load i32, ptr %135, align 4, !tbaa !27
  %137 = sub i32 %134, %136
  %.not253 = icmp eq i32 %134, %136
  br i1 %.not253, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %131
  %138 = load i32, ptr %88, align 1, !tbaa !28
  %wide.trip.count279 = zext i32 %137 to i64
  %xtraiter = and i64 %wide.trip.count279, 1
  %139 = icmp eq i32 %137, 1
  br i1 %139, label %._crit_edge.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %wide.trip.count279, 4294967294
  br label %140

140:                                              ; preds = %140, %.lr.ph.new
  %indvars.iv276 = phi i64 [ 0, %.lr.ph.new ], [ %indvars.iv.next277.1, %140 ]
  %.0203234 = phi i32 [ 0, %.lr.ph.new ], [ %.1204.1, %140 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.1, %140 ]
  %141 = trunc nuw i64 %indvars.iv276 to i32
  %142 = add i32 %136, %141
  %143 = zext i32 %142 to i64
  %144 = getelementptr inbounds i32, ptr %6, i64 %143
  %145 = load i32, ptr %144, align 4, !tbaa !27
  %146 = icmp ult i32 %145, %138
  %.not214 = icmp uge i32 %145, %8
  %or.cond216.not223 = and i1 %.not214, %146
  %147 = icmp ult i32 %145, %9
  %or.cond217 = and i1 %147, %or.cond216.not223
  %148 = trunc i64 %indvars.iv276 to i32
  %149 = or disjoint i32 %148, 1
  %150 = add i32 %136, %149
  %151 = zext i32 %150 to i64
  %152 = getelementptr inbounds i32, ptr %6, i64 %151
  %153 = load i32, ptr %152, align 4, !tbaa !27
  %154 = icmp ult i32 %153, %138
  %.not214.1 = icmp uge i32 %153, %8
  %or.cond216.not223.1 = and i1 %.not214.1, %154
  %155 = icmp ult i32 %153, %9
  %or.cond217.1 = and i1 %155, %or.cond216.not223.1
  %156 = select i1 %or.cond217.1, i1 true, i1 %or.cond217
  %.1204.1 = select i1 %156, i32 1, i32 %.0203234
  %indvars.iv.next277.1 = add nuw nsw i64 %indvars.iv276, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.unr-lcssa, label %140, !llvm.loop !29

._crit_edge.unr-lcssa:                            ; preds = %140, %.lr.ph
  %.1204.lcssa.ph = phi i32 [ poison, %.lr.ph ], [ %.1204.1, %140 ]
  %indvars.iv276.unr = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next277.1, %140 ]
  %.0203234.unr = phi i32 [ 0, %.lr.ph ], [ %.1204.1, %140 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %._crit_edge.epilog-lcssa

._crit_edge.epilog-lcssa:                         ; preds = %._crit_edge.unr-lcssa
  %157 = trunc nuw i64 %indvars.iv276.unr to i32
  %158 = add i32 %136, %157
  %159 = zext i32 %158 to i64
  %160 = getelementptr inbounds i32, ptr %6, i64 %159
  %161 = load i32, ptr %160, align 4, !tbaa !27
  %162 = icmp ult i32 %161, %138
  %.not214.epil = icmp uge i32 %161, %8
  %or.cond216.not223.epil = and i1 %.not214.epil, %162
  %163 = icmp ult i32 %161, %9
  %or.cond217.epil = and i1 %163, %or.cond216.not223.epil
  %.1204.epil = select i1 %or.cond217.epil, i32 1, i32 %.0203234.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.unr-lcssa, %._crit_edge.epilog-lcssa
  %.1204.lcssa = phi i32 [ %.1204.lcssa.ph, %._crit_edge.unr-lcssa ], [ %.1204.epil, %._crit_edge.epilog-lcssa ]
  %.not212 = icmp eq i32 %.1204.lcssa, 0
  br i1 %.not212, label %.loopexit, label %.preheader225

.preheader225:                                    ; preds = %._crit_edge
  %164 = mul nuw nsw i64 %indvars.iv292, %92
  %wide.trip.count284 = zext i32 %137 to i64
  br label %165

165:                                              ; preds = %.preheader225, %._crit_edge239
  %indvars.iv286 = phi i64 [ 0, %.preheader225 ], [ %indvars.iv.next287, %._crit_edge239 ]
  %166 = icmp eq i64 %indvars.iv286, %100
  %or.cond3 = and i1 %90, %166
  br i1 %or.cond3, label %179, label %167

167:                                              ; preds = %165
  %168 = load i32, ptr %91, align 4, !tbaa !30
  %169 = add nuw nsw i64 %indvars.iv286, %93
  %170 = load i32, ptr %94, align 8, !tbaa !17
  %171 = zext i32 %170 to i64
  %172 = mul nuw nsw i64 %169, %171
  %173 = add nuw nsw i64 %172, %164
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %168, i64 noundef %173) #5
  %174 = load i32, ptr %95, align 4, !tbaa !31
  %175 = icmp eq i32 %174, 4
  %176 = select i1 %175, i32 -1522515837, i32 -1512030077
  %177 = load i32, ptr %96, align 4, !tbaa !32
  %178 = load i32, ptr %91, align 4, !tbaa !30
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %176, i32 noundef %177, i32 noundef %178, i32 noundef 0, i32 noundef %17, i32 noundef 0) #5
  br label %179

179:                                              ; preds = %165, %167
  br i1 %.not253, label %._crit_edge239, label %.lr.ph238.preheader

.lr.ph238.preheader:                              ; preds = %179
  %180 = trunc nuw i64 %indvars.iv286 to i32
  br label %.lr.ph238

.lr.ph238:                                        ; preds = %.lr.ph238.preheader, %214
  %indvars.iv281 = phi i64 [ 0, %.lr.ph238.preheader ], [ %indvars.iv.next282, %214 ]
  %181 = load i32, ptr %135, align 4, !tbaa !27
  %182 = trunc nuw i64 %indvars.iv281 to i32
  %183 = add i32 %181, %182
  %184 = zext i32 %183 to i64
  %185 = getelementptr inbounds i32, ptr %6, i64 %184
  %186 = load i32, ptr %185, align 4, !tbaa !27
  %187 = load i32, ptr %88, align 1, !tbaa !28
  %188 = icmp ult i32 %186, %187
  %.not213 = icmp uge i32 %186, %8
  %or.cond218.not221 = and i1 %.not213, %188
  %189 = icmp ult i32 %186, %9
  %or.cond219 = and i1 %189, %or.cond218.not221
  br i1 %or.cond219, label %190, label %214

190:                                              ; preds = %.lr.ph238
  %191 = load i32, ptr %97, align 4, !tbaa !33
  %192 = zext i32 %181 to i64
  %193 = add nuw nsw i64 %indvars.iv281, %192
  %194 = load i32, ptr %95, align 4, !tbaa !31
  %195 = zext i32 %194 to i64
  %196 = mul nuw nsw i64 %193, %195
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %191, i64 noundef %196) #5
  %197 = load i32, ptr %98, align 4, !tbaa !34
  %198 = load i32, ptr %97, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_alu_compute_shifted_reg(ptr noundef %0, i32 noundef 184549383, i32 noundef %197, i32 noundef %198, i32 noundef %198, i32 noundef 0, i32 noundef 0) #5
  %199 = load i32, ptr %95, align 4, !tbaa !31
  %200 = icmp eq i32 %199, 4
  %201 = select i1 %200, i32 -2059353978, i32 -2050957178
  %202 = load i32, ptr %97, align 4, !tbaa !33
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %201, i32 noundef %202, i32 noundef 127, i32 noundef 0, i32 noundef %99, i32 noundef 0) #5
  %203 = load i32, ptr %135, align 4, !tbaa !27
  %204 = add i32 %203, %182
  %205 = zext i32 %204 to i64
  %206 = getelementptr inbounds i32, ptr %6, i64 %205
  %207 = load i32, ptr %206, align 4, !tbaa !27
  %208 = sub i32 %207, %8
  %209 = mul i32 %208, %12
  %210 = add i32 %209, %180
  %211 = load i32, ptr %95, align 4, !tbaa !31
  %212 = icmp eq i32 %211, 4
  %213 = select i1 %212, i32 2, i32 3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %0, i32 noundef 1696596099, i32 noundef %17, i32 noundef %99, i8 noundef zeroext -1, i32 noundef %210, i32 noundef 0, i32 noundef %213) #5
  br label %214

214:                                              ; preds = %.lr.ph238, %190
  %indvars.iv.next282 = add nuw nsw i64 %indvars.iv281, 1
  %exitcond285.not = icmp eq i64 %indvars.iv.next282, %wide.trip.count284
  br i1 %exitcond285.not, label %._crit_edge239, label %.lr.ph238, !llvm.loop !35

._crit_edge239:                                   ; preds = %214, %179
  %indvars.iv.next287 = add nuw nsw i64 %indvars.iv286, 1
  %exitcond291.not = icmp eq i64 %indvars.iv.next287, %wide.trip.count290
  br i1 %exitcond291.not, label %.loopexit.loopexit, label %165, !llvm.loop !36

.loopexit.loopexit:                               ; preds = %._crit_edge239
  %.pre = load i32, ptr %86, align 1, !tbaa !24
  br label %.loopexit

.loopexit:                                        ; preds = %131, %.loopexit.loopexit, %._crit_edge
  %215 = phi i32 [ %.pre, %.loopexit.loopexit ], [ %132, %._crit_edge ], [ %132, %131 ]
  %216 = zext i32 %215 to i64
  %217 = icmp ult i64 %indvars.iv.next293, %216
  br i1 %217, label %131, label %.preheader224, !llvm.loop !37

.preheader:                                       ; preds = %.preheader.preheader, %.split.us244
  %indvars.iv312 = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next313, %.split.us244 ]
  %218 = trunc nuw i64 %indvars.iv312 to i32
  %219 = mul i32 %218, %12
  %220 = add nuw nsw i64 %indvars.iv312, %102
  %221 = mul nuw nsw i64 %220, %103
  br label %222

222:                                              ; preds = %222, %.preheader
  %indvars.iv306 = phi i64 [ %indvars.iv.next307, %222 ], [ 0, %.preheader ]
  %223 = trunc nuw i64 %indvars.iv306 to i32
  %224 = add i32 %219, %223
  %225 = load i32, ptr %101, align 4, !tbaa !16
  %226 = add nuw nsw i64 %indvars.iv306, %104
  %227 = load i32, ptr %105, align 8, !tbaa !17
  %228 = zext i32 %227 to i64
  %229 = mul nuw nsw i64 %226, %228
  %230 = add nuw nsw i64 %229, %221
  tail call void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef %0, i32 noundef %225, i64 noundef %230) #5
  %231 = load i32, ptr %106, align 4, !tbaa !21
  %232 = icmp eq i32 %231, 4
  %233 = select i1 %232, i32 -448774013, i32 -438288253
  %234 = load i32, ptr %107, align 4, !tbaa !22
  %235 = load i32, ptr %101, align 4, !tbaa !16
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %0, i32 noundef %233, i32 noundef %234, i32 noundef %235, i32 noundef 0, i32 noundef %224, i32 noundef 0) #5
  %indvars.iv.next307 = add nuw nsw i64 %indvars.iv306, 1
  %exitcond311.not = icmp eq i64 %indvars.iv.next307, %wide.trip.count310
  br i1 %exitcond311.not, label %.split.us244, label %222, !llvm.loop !26

.split.us244:                                     ; preds = %222
  %indvars.iv.next313 = add nuw nsw i64 %indvars.iv312, 1
  %exitcond316.not = icmp eq i64 %indvars.iv.next313, %wide.trip.count315
  br i1 %exitcond316.not, label %._crit_edge246, label %.preheader, !llvm.loop !25

._crit_edge246:                                   ; preds = %.split.us247, %.split.us244, %.preheader224
  br i1 %21, label %236, label %280

236:                                              ; preds = %._crit_edge246
  %237 = getelementptr inbounds i8, ptr %2, i64 4
  %238 = load i32, ptr %237, align 4, !tbaa !32
  %239 = getelementptr inbounds i8, ptr %2, i64 88
  %240 = load i32, ptr %239, align 4, !tbaa !30
  %241 = zext i32 %12 to i64
  %242 = getelementptr inbounds i8, ptr %3, i64 8
  %243 = load i32, ptr %242, align 8, !tbaa !17
  %244 = zext i32 %243 to i64
  %245 = mul nuw nsw i64 %244, %241
  %246 = getelementptr inbounds i8, ptr %3, i64 12
  %247 = load i32, ptr %246, align 4, !tbaa !31
  %248 = zext i32 %247 to i64
  %249 = mul nuw nsw i64 %245, %248
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %238, i32 noundef %240, i32 noundef %238, i64 noundef %249) #5
  %250 = getelementptr inbounds i8, ptr %2, i64 20
  %251 = load i32, ptr %250, align 4, !tbaa !22
  %252 = getelementptr inbounds i8, ptr %2, i64 96
  %253 = load i32, ptr %252, align 4, !tbaa !16
  %254 = load i32, ptr %242, align 8, !tbaa !17
  %255 = zext i32 %254 to i64
  %256 = mul nuw nsw i64 %255, %241
  %257 = getelementptr inbounds i8, ptr %3, i64 20
  %258 = load i32, ptr %257, align 4, !tbaa !21
  %259 = zext i32 %258 to i64
  %260 = mul nuw nsw i64 %256, %259
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4096, i32 noundef %251, i32 noundef %253, i32 noundef %251, i64 noundef %260) #5
  %261 = getelementptr inbounds i8, ptr %2, i64 100
  %262 = load i32, ptr %261, align 4, !tbaa !5
  tail call void @libxsmm_generator_loop_footer_aarch64(ptr noundef %0, ptr noundef %1, i32 noundef %262, i32 noundef 1) #5
  %263 = load i32, ptr %237, align 4, !tbaa !32
  %264 = load i32, ptr %239, align 4, !tbaa !30
  %265 = zext i32 %20 to i64
  %266 = load i32, ptr %242, align 8, !tbaa !17
  %267 = zext i32 %266 to i64
  %268 = mul nuw nsw i64 %267, %265
  %269 = load i32, ptr %246, align 4, !tbaa !31
  %270 = zext i32 %269 to i64
  %271 = mul nuw nsw i64 %268, %270
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %263, i32 noundef %264, i32 noundef %263, i64 noundef %271) #5
  %272 = load i32, ptr %250, align 4, !tbaa !22
  %273 = load i32, ptr %252, align 4, !tbaa !16
  %274 = load i32, ptr %242, align 8, !tbaa !17
  %275 = zext i32 %274 to i64
  %276 = mul nuw nsw i64 %275, %265
  %277 = load i32, ptr %257, align 4, !tbaa !21
  %278 = zext i32 %277 to i64
  %279 = mul nuw nsw i64 %276, %278
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %0, i32 noundef 4097, i32 noundef %272, i32 noundef %273, i32 noundef %272, i64 noundef %279) #5
  br label %280

280:                                              ; preds = %236, %._crit_edge246
  ret void
}

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_loop_footer_aarch64(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @libxsmm_aarch64_instruction_alu_set_imm64(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #3

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 100}
!6 = !{!"libxsmm_gp_reg_mapping_struct", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !7, i64 24}
!13 = !{!"libxsmm_gemm_descriptor", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !8, i64 29, !8, i64 32, !14, i64 33, !14, i64 41, !8, i64 49, !7, i64 50, !7, i64 54, !7, i64 58, !15, i64 62, !15, i64 64, !8, i64 66, !8, i64 67, !8, i64 68, !8, i64 69, !15, i64 70, !15, i64 72, !15, i64 74, !15, i64 76, !15, i64 78, !15, i64 80, !7, i64 82, !7, i64 86, !7, i64 90, !8, i64 94}
!14 = !{!"long long", !8, i64 0}
!15 = !{!"short", !8, i64 0}
!16 = !{!6, !7, i64 96}
!17 = !{!18, !7, i64 8}
!18 = !{!"libxsmm_micro_kernel_config", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !8, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !7, i64 168, !7, i64 172, !7, i64 176, !7, i64 180, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !7, i64 212, !7, i64 216, !7, i64 220, !7, i64 224, !7, i64 228, !7, i64 232, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248, !7, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !7, i64 284, !7, i64 288, !7, i64 292, !7, i64 296, !7, i64 300, !7, i64 304, !7, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !8, i64 364, !8, i64 380, !8, i64 396, !8, i64 412, !8, i64 428, !8, i64 444, !7, i64 460, !8, i64 464, !19, i64 520, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !20, i64 592, !7, i64 600, !7, i64 604, !7, i64 608, !7, i64 612, !20, i64 616, !7, i64 624, !7, i64 628, !7, i64 632, !7, i64 636, !7, i64 640, !7, i64 644, !7, i64 648, !7, i64 652, !7, i64 656, !7, i64 660, !7, i64 664, !7, i64 668, !7, i64 672, !7, i64 676, !7, i64 680}
!19 = !{!"libxsmm_tile_config", !8, i64 0, !15, i64 2, !8, i64 4, !15, i64 6, !8, i64 8, !15, i64 10, !8, i64 12, !15, i64 14, !8, i64 16, !15, i64 18, !8, i64 20, !15, i64 22, !8, i64 24, !15, i64 26, !8, i64 28, !15, i64 30, !8, i64 32}
!20 = !{!"any pointer", !8, i64 0}
!21 = !{!18, !7, i64 20}
!22 = !{!6, !7, i64 20}
!23 = distinct !{!23, !11}
!24 = !{!13, !7, i64 8}
!25 = distinct !{!25, !11}
!26 = distinct !{!26, !11}
!27 = !{!7, !7, i64 0}
!28 = !{!13, !7, i64 4}
!29 = distinct !{!29, !11}
!30 = !{!6, !7, i64 88}
!31 = !{!18, !7, i64 12}
!32 = !{!6, !7, i64 4}
!33 = !{!6, !7, i64 92}
!34 = !{!6, !7, i64 12}
!35 = distinct !{!35, !11}
!36 = distinct !{!36, !11}
!37 = distinct !{!37, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass