; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseImageSavePng.ll (ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array" = type { ptr, i64 }

@_ZN4Simd4Base8ZlibLenCE = external dso_local constant [30 x i16], align 16
@_ZN4Simd4Base9ZlibLenEbE = external dso_local constant [29 x i8], align 16
@_ZN4Simd4Base9ZlibDistCE = external dso_local constant [31 x i16], align 16
@_ZN4Simd4Base10ZlibDistEbE = external dso_local constant [30 x i8], align 16
@.str = external hidden unnamed_addr constant [26 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [82 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE = external hidden unnamed_addr constant [73 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base11ZlibAdler32EPhi(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(56) %3) #2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %"struct.Simd::Array", align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #8
  store i32 16384, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 5
  br i1 %29, label %30, label %31

30:                                               ; preds = %4
  store i32 5, ptr %7, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %30, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #8
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = mul nsw i32 %32, 2
  store i32 %33, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #8
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = mul nsw i32 16384, %34
  %36 = sext i32 %35 to i64
  call void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %11, i64 noundef %36, i1 noundef zeroext false, i64 noundef 8)
  %37 = getelementptr inbounds %"struct.Simd::Array", ptr %11, i32 0, i32 0
  %38 = load ptr, ptr %37, align 8, !tbaa !11
  %39 = invoke noundef i64 @_ZNK4Simd5ArrayIiE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %11)
          to label %40 unwind label %122

40:                                               ; preds = %31
  call void @llvm.memset.p0.i64(ptr align 4 %38, i8 -1, i64 %39, i1 false)
  %41 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #8
  store i8 120, ptr %14, align 1, !tbaa !14
  invoke void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56) %41, ptr noundef nonnull align 1 dereferenceable(1) %14)
          to label %42 unwind label %126

42:                                               ; preds = %40
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #8
  %43 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #8
  store i8 94, ptr %15, align 1, !tbaa !14
  invoke void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56) %43, ptr noundef nonnull align 1 dereferenceable(1) %15)
          to label %44 unwind label %130

44:                                               ; preds = %42
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #8
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %45, i64 noundef 1, i64 noundef 1)
          to label %46 unwind label %122

46:                                               ; preds = %44
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %47, i64 noundef 1, i64 noundef 2)
          to label %48 unwind label %122

48:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #8
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #8
  br label %49

49:                                               ; preds = %381, %48
  %50 = load i32, ptr %16, align 4, !tbaa !9
  %51 = load i32, ptr %6, align 4, !tbaa !9
  %52 = sub nsw i32 %51, 3
  %53 = icmp slt i32 %50, %52
  br i1 %53, label %54, label %384

54:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #8
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = load i32, ptr %16, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds i8, ptr %55, i64 %57
  %59 = invoke noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef %58)
          to label %60 unwind label %134

60:                                               ; preds = %54
  %61 = and i32 %59, 16383
  store i32 %61, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  store i32 3, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #8
  store ptr null, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #8
  %62 = getelementptr inbounds %"struct.Simd::Array", ptr %11, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !11
  %64 = load i32, ptr %18, align 4, !tbaa !9
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = mul nsw i32 %64, %65
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds i32, ptr %63, i64 %67
  store ptr %68, ptr %21, align 8, !tbaa !5
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %144, %60
  %70 = load ptr, ptr %21, align 8, !tbaa !5
  %71 = load i32, ptr %17, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds i32, ptr %70, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !9
  %75 = icmp ne i32 %74, -1
  br i1 %75, label %76, label %80

76:                                               ; preds = %69
  %77 = load i32, ptr %17, align 4, !tbaa !9
  %78 = load i32, ptr %10, align 4, !tbaa !9
  %79 = icmp slt i32 %77, %78
  br label %80

80:                                               ; preds = %76, %69
  %81 = phi i1 [ false, %69 ], [ %79, %76 ]
  br i1 %81, label %82, label %147

82:                                               ; preds = %80
  %83 = load ptr, ptr %21, align 8, !tbaa !5
  %84 = load i32, ptr %17, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds i32, ptr %83, i64 %85
  %87 = load i32, ptr %86, align 4, !tbaa !9
  %88 = load i32, ptr %16, align 4, !tbaa !9
  %89 = sub nsw i32 %88, 32768
  %90 = icmp sgt i32 %87, %89
  br i1 %90, label %91, label %143

91:                                               ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #8
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = load ptr, ptr %21, align 8, !tbaa !5
  %94 = load i32, ptr %17, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = getelementptr inbounds i32, ptr %93, i64 %95
  %97 = load i32, ptr %96, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = getelementptr inbounds i8, ptr %92, i64 %98
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = load i32, ptr %16, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds i8, ptr %100, i64 %102
  %104 = load i32, ptr %6, align 4, !tbaa !9
  %105 = load i32, ptr %16, align 4, !tbaa !9
  %106 = sub nsw i32 %104, %105
  %107 = invoke noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef %99, ptr noundef %103, i32 noundef %106)
          to label %108 unwind label %138

108:                                              ; preds = %91
  store i32 %107, ptr %22, align 4, !tbaa !9
  %109 = load i32, ptr %22, align 4, !tbaa !9
  %110 = load i32, ptr %19, align 4, !tbaa !9
  %111 = icmp sge i32 %109, %110
  br i1 %111, label %112, label %142

112:                                              ; preds = %108
  %113 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %113, ptr %19, align 4, !tbaa !9
  %114 = load ptr, ptr %5, align 8, !tbaa !5
  %115 = load ptr, ptr %21, align 8, !tbaa !5
  %116 = load i32, ptr %17, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds i32, ptr %115, i64 %117
  %119 = load i32, ptr %118, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = getelementptr inbounds i8, ptr %114, i64 %120
  store ptr %121, ptr %20, align 8, !tbaa !5
  br label %142

122:                                              ; preds = %46, %44, %31
  %123 = landingpad { ptr, i32 }
          cleanup
  %124 = extractvalue { ptr, i32 } %123, 0
  store ptr %124, ptr %12, align 8
  %125 = extractvalue { ptr, i32 } %123, 1
  store i32 %125, ptr %13, align 4
  br label %420

126:                                              ; preds = %40
  %127 = landingpad { ptr, i32 }
          cleanup
  %128 = extractvalue { ptr, i32 } %127, 0
  store ptr %128, ptr %12, align 8
  %129 = extractvalue { ptr, i32 } %127, 1
  store i32 %129, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #8
  br label %420

130:                                              ; preds = %42
  %131 = landingpad { ptr, i32 }
          cleanup
  %132 = extractvalue { ptr, i32 } %131, 0
  store ptr %132, ptr %12, align 8
  %133 = extractvalue { ptr, i32 } %131, 1
  store i32 %133, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #8
  br label %420

134:                                              ; preds = %54
  %135 = landingpad { ptr, i32 }
          cleanup
  %136 = extractvalue { ptr, i32 } %135, 0
  store ptr %136, ptr %12, align 8
  %137 = extractvalue { ptr, i32 } %135, 1
  store i32 %137, ptr %13, align 4
  br label %383

138:                                              ; preds = %91
  %139 = landingpad { ptr, i32 }
          cleanup
  %140 = extractvalue { ptr, i32 } %139, 0
  store ptr %140, ptr %12, align 8
  %141 = extractvalue { ptr, i32 } %139, 1
  store i32 %141, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  br label %382

142:                                              ; preds = %112, %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  br label %143

143:                                              ; preds = %142, %82
  br label %144

144:                                              ; preds = %143
  %145 = load i32, ptr %17, align 4, !tbaa !9
  %146 = add nsw i32 %145, 1
  store i32 %146, ptr %17, align 4, !tbaa !9
  br label %69, !llvm.loop !15

147:                                              ; preds = %80
  %148 = load i32, ptr %17, align 4, !tbaa !9
  %149 = load i32, ptr %10, align 4, !tbaa !9
  %150 = icmp eq i32 %148, %149
  br i1 %150, label %151, label %168

151:                                              ; preds = %147
  %152 = load ptr, ptr %21, align 8, !tbaa !5
  %153 = load ptr, ptr %21, align 8, !tbaa !5
  %154 = load i32, ptr %7, align 4, !tbaa !9
  %155 = sext i32 %154 to i64
  %156 = getelementptr inbounds i32, ptr %153, i64 %155
  %157 = load i32, ptr %7, align 4, !tbaa !9
  %158 = sext i32 %157 to i64
  %159 = mul i64 %158, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %152, ptr align 4 %156, i64 %159, i1 false)
  %160 = load ptr, ptr %21, align 8, !tbaa !5
  %161 = load i32, ptr %7, align 4, !tbaa !9
  %162 = sext i32 %161 to i64
  %163 = getelementptr inbounds i32, ptr %160, i64 %162
  %164 = load i32, ptr %7, align 4, !tbaa !9
  %165 = sext i32 %164 to i64
  %166 = mul i64 %165, 4
  call void @llvm.memset.p0.i64(ptr align 4 %163, i8 -1, i64 %166, i1 false)
  %167 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %167, ptr %17, align 4, !tbaa !9
  br label %168

168:                                              ; preds = %151, %147
  %169 = load i32, ptr %16, align 4, !tbaa !9
  %170 = load ptr, ptr %21, align 8, !tbaa !5
  %171 = load i32, ptr %17, align 4, !tbaa !9
  %172 = sext i32 %171 to i64
  %173 = getelementptr inbounds i32, ptr %170, i64 %172
  store i32 %169, ptr %173, align 4, !tbaa !9
  %174 = load ptr, ptr %20, align 8, !tbaa !5
  %175 = icmp ne ptr %174, null
  br i1 %175, label %176, label %255

176:                                              ; preds = %168
  %177 = load ptr, ptr %5, align 8, !tbaa !5
  %178 = load i32, ptr %16, align 4, !tbaa !9
  %179 = sext i32 %178 to i64
  %180 = getelementptr inbounds i8, ptr %177, i64 %179
  %181 = getelementptr inbounds i8, ptr %180, i64 1
  %182 = invoke noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef %181)
          to label %183 unwind label %238

183:                                              ; preds = %176
  %184 = and i32 %182, 16383
  store i32 %184, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #8
  %185 = getelementptr inbounds %"struct.Simd::Array", ptr %11, i32 0, i32 0
  %186 = load ptr, ptr %185, align 8, !tbaa !11
  %187 = load i32, ptr %18, align 4, !tbaa !9
  %188 = load i32, ptr %10, align 4, !tbaa !9
  %189 = mul nsw i32 %187, %188
  %190 = sext i32 %189 to i64
  %191 = getelementptr inbounds i32, ptr %186, i64 %190
  store ptr %191, ptr %23, align 8, !tbaa !5
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %192

192:                                              ; preds = %251, %183
  %193 = load ptr, ptr %23, align 8, !tbaa !5
  %194 = load i32, ptr %17, align 4, !tbaa !9
  %195 = sext i32 %194 to i64
  %196 = getelementptr inbounds i32, ptr %193, i64 %195
  %197 = load i32, ptr %196, align 4, !tbaa !9
  %198 = icmp ne i32 %197, -1
  br i1 %198, label %199, label %203

199:                                              ; preds = %192
  %200 = load i32, ptr %17, align 4, !tbaa !9
  %201 = load i32, ptr %10, align 4, !tbaa !9
  %202 = icmp slt i32 %200, %201
  br label %203

203:                                              ; preds = %199, %192
  %204 = phi i1 [ false, %192 ], [ %202, %199 ]
  br i1 %204, label %205, label %254

205:                                              ; preds = %203
  %206 = load ptr, ptr %23, align 8, !tbaa !5
  %207 = load i32, ptr %17, align 4, !tbaa !9
  %208 = sext i32 %207 to i64
  %209 = getelementptr inbounds i32, ptr %206, i64 %208
  %210 = load i32, ptr %209, align 4, !tbaa !9
  %211 = load i32, ptr %16, align 4, !tbaa !9
  %212 = sub nsw i32 %211, 32767
  %213 = icmp sgt i32 %210, %212
  br i1 %213, label %214, label %250

214:                                              ; preds = %205
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #8
  %215 = load ptr, ptr %5, align 8, !tbaa !5
  %216 = load ptr, ptr %23, align 8, !tbaa !5
  %217 = load i32, ptr %17, align 4, !tbaa !9
  %218 = sext i32 %217 to i64
  %219 = getelementptr inbounds i32, ptr %216, i64 %218
  %220 = load i32, ptr %219, align 4, !tbaa !9
  %221 = sext i32 %220 to i64
  %222 = getelementptr inbounds i8, ptr %215, i64 %221
  %223 = load ptr, ptr %5, align 8, !tbaa !5
  %224 = load i32, ptr %16, align 4, !tbaa !9
  %225 = sext i32 %224 to i64
  %226 = getelementptr inbounds i8, ptr %223, i64 %225
  %227 = getelementptr inbounds i8, ptr %226, i64 1
  %228 = load i32, ptr %6, align 4, !tbaa !9
  %229 = load i32, ptr %16, align 4, !tbaa !9
  %230 = sub nsw i32 %228, %229
  %231 = sub nsw i32 %230, 1
  %232 = invoke noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef %222, ptr noundef %227, i32 noundef %231)
          to label %233 unwind label %242

233:                                              ; preds = %214
  store i32 %232, ptr %24, align 4, !tbaa !9
  %234 = load i32, ptr %24, align 4, !tbaa !9
  %235 = load i32, ptr %19, align 4, !tbaa !9
  %236 = icmp sgt i32 %234, %235
  br i1 %236, label %237, label %246

237:                                              ; preds = %233
  store ptr null, ptr %20, align 8, !tbaa !5
  store i32 7, ptr %25, align 4
  br label %247

238:                                              ; preds = %370, %176
  %239 = landingpad { ptr, i32 }
          cleanup
  %240 = extractvalue { ptr, i32 } %239, 0
  store ptr %240, ptr %12, align 8
  %241 = extractvalue { ptr, i32 } %239, 1
  store i32 %241, ptr %13, align 4
  br label %382

242:                                              ; preds = %214
  %243 = landingpad { ptr, i32 }
          cleanup
  %244 = extractvalue { ptr, i32 } %243, 0
  store ptr %244, ptr %12, align 8
  %245 = extractvalue { ptr, i32 } %243, 1
  store i32 %245, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  br label %382

246:                                              ; preds = %233
  store i32 0, ptr %25, align 4
  br label %247

247:                                              ; preds = %246, %237
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  %248 = load i32, ptr %25, align 4
  switch i32 %248, label %426 [
    i32 0, label %249
    i32 7, label %254
  ]

249:                                              ; preds = %247
  br label %250

250:                                              ; preds = %249, %205
  br label %251

251:                                              ; preds = %250
  %252 = load i32, ptr %17, align 4, !tbaa !9
  %253 = add nsw i32 %252, 1
  store i32 %253, ptr %17, align 4, !tbaa !9
  br label %192, !llvm.loop !17

254:                                              ; preds = %247, %203
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  br label %255

255:                                              ; preds = %254, %168
  %256 = load ptr, ptr %20, align 8, !tbaa !5
  %257 = icmp ne ptr %256, null
  br i1 %257, label %258, label %370

258:                                              ; preds = %255
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #8
  %259 = load ptr, ptr %5, align 8, !tbaa !5
  %260 = load i32, ptr %16, align 4, !tbaa !9
  %261 = sext i32 %260 to i64
  %262 = getelementptr inbounds i8, ptr %259, i64 %261
  %263 = load ptr, ptr %20, align 8, !tbaa !5
  %264 = ptrtoint ptr %262 to i64
  %265 = ptrtoint ptr %263 to i64
  %266 = sub i64 %264, %265
  %267 = trunc i64 %266 to i32
  store i32 %267, ptr %26, align 4, !tbaa !9
  %268 = load i32, ptr %26, align 4, !tbaa !9
  %269 = icmp sle i32 %268, 32767
  br i1 %269, label %270, label %273

270:                                              ; preds = %258
  %271 = load i32, ptr %19, align 4, !tbaa !9
  %272 = icmp sle i32 %271, 258
  br label %273

273:                                              ; preds = %270, %258
  %274 = phi i1 [ false, %258 ], [ %272, %270 ]
  br i1 %274, label %275, label %276

275:                                              ; preds = %273
  br label %278

276:                                              ; preds = %273
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.2, i32 noundef 138, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE) #9
  unreachable

277:                                              ; No predecessors!
  br label %278

278:                                              ; preds = %277, %275
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %279

279:                                              ; preds = %290, %278
  %280 = load i32, ptr %19, align 4, !tbaa !9
  %281 = load i32, ptr %17, align 4, !tbaa !9
  %282 = add nsw i32 %281, 1
  %283 = sext i32 %282 to i64
  %284 = getelementptr inbounds [30 x i16], ptr @_ZN4Simd4Base8ZlibLenCE, i64 0, i64 %283
  %285 = load i16, ptr %284, align 2, !tbaa !18
  %286 = zext i16 %285 to i32
  %287 = sub nsw i32 %286, 1
  %288 = icmp sgt i32 %280, %287
  br i1 %288, label %289, label %293

289:                                              ; preds = %279
  br label %290

290:                                              ; preds = %289
  %291 = load i32, ptr %17, align 4, !tbaa !9
  %292 = add nsw i32 %291, 1
  store i32 %292, ptr %17, align 4, !tbaa !9
  br label %279, !llvm.loop !20

293:                                              ; preds = %279
  %294 = load i32, ptr %17, align 4, !tbaa !9
  %295 = add nsw i32 %294, 257
  %296 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef %295, ptr noundef nonnull align 8 dereferenceable(56) %296)
          to label %297 unwind label %319

297:                                              ; preds = %293
  %298 = load i32, ptr %17, align 4, !tbaa !9
  %299 = sext i32 %298 to i64
  %300 = getelementptr inbounds [29 x i8], ptr @_ZN4Simd4Base9ZlibLenEbE, i64 0, i64 %299
  %301 = load i8, ptr %300, align 1, !tbaa !14
  %302 = icmp ne i8 %301, 0
  br i1 %302, label %303, label %323

303:                                              ; preds = %297
  %304 = load ptr, ptr %8, align 8, !tbaa !5
  %305 = load i32, ptr %19, align 4, !tbaa !9
  %306 = load i32, ptr %17, align 4, !tbaa !9
  %307 = sext i32 %306 to i64
  %308 = getelementptr inbounds [30 x i16], ptr @_ZN4Simd4Base8ZlibLenCE, i64 0, i64 %307
  %309 = load i16, ptr %308, align 2, !tbaa !18
  %310 = zext i16 %309 to i32
  %311 = sub nsw i32 %305, %310
  %312 = sext i32 %311 to i64
  %313 = load i32, ptr %17, align 4, !tbaa !9
  %314 = sext i32 %313 to i64
  %315 = getelementptr inbounds [29 x i8], ptr @_ZN4Simd4Base9ZlibLenEbE, i64 0, i64 %314
  %316 = load i8, ptr %315, align 1, !tbaa !14
  %317 = zext i8 %316 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %304, i64 noundef %312, i64 noundef %317)
          to label %318 unwind label %319

318:                                              ; preds = %303
  br label %323

319:                                              ; preds = %350, %342, %338, %303, %293
  %320 = landingpad { ptr, i32 }
          cleanup
  %321 = extractvalue { ptr, i32 } %320, 0
  store ptr %321, ptr %12, align 8
  %322 = extractvalue { ptr, i32 } %320, 1
  store i32 %322, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #8
  br label %382

323:                                              ; preds = %318, %297
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %324

324:                                              ; preds = %335, %323
  %325 = load i32, ptr %26, align 4, !tbaa !9
  %326 = load i32, ptr %17, align 4, !tbaa !9
  %327 = add nsw i32 %326, 1
  %328 = sext i32 %327 to i64
  %329 = getelementptr inbounds [31 x i16], ptr @_ZN4Simd4Base9ZlibDistCE, i64 0, i64 %328
  %330 = load i16, ptr %329, align 2, !tbaa !18
  %331 = zext i16 %330 to i32
  %332 = sub nsw i32 %331, 1
  %333 = icmp sgt i32 %325, %332
  br i1 %333, label %334, label %338

334:                                              ; preds = %324
  br label %335

335:                                              ; preds = %334
  %336 = load i32, ptr %17, align 4, !tbaa !9
  %337 = add nsw i32 %336, 1
  store i32 %337, ptr %17, align 4, !tbaa !9
  br label %324, !llvm.loop !21

338:                                              ; preds = %324
  %339 = load ptr, ptr %8, align 8, !tbaa !5
  %340 = load i32, ptr %17, align 4, !tbaa !9
  %341 = invoke noundef i32 @_ZN4Simd4Base10ZlibBitRevEii(i32 noundef %340, i32 noundef 5)
          to label %342 unwind label %319

342:                                              ; preds = %338
  %343 = sext i32 %341 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %339, i64 noundef %343, i64 noundef 5)
          to label %344 unwind label %319

344:                                              ; preds = %342
  %345 = load i32, ptr %17, align 4, !tbaa !9
  %346 = sext i32 %345 to i64
  %347 = getelementptr inbounds [30 x i8], ptr @_ZN4Simd4Base10ZlibDistEbE, i64 0, i64 %346
  %348 = load i8, ptr %347, align 1, !tbaa !14
  %349 = icmp ne i8 %348, 0
  br i1 %349, label %350, label %366

350:                                              ; preds = %344
  %351 = load ptr, ptr %8, align 8, !tbaa !5
  %352 = load i32, ptr %26, align 4, !tbaa !9
  %353 = load i32, ptr %17, align 4, !tbaa !9
  %354 = sext i32 %353 to i64
  %355 = getelementptr inbounds [31 x i16], ptr @_ZN4Simd4Base9ZlibDistCE, i64 0, i64 %354
  %356 = load i16, ptr %355, align 2, !tbaa !18
  %357 = zext i16 %356 to i32
  %358 = sub nsw i32 %352, %357
  %359 = sext i32 %358 to i64
  %360 = load i32, ptr %17, align 4, !tbaa !9
  %361 = sext i32 %360 to i64
  %362 = getelementptr inbounds [30 x i8], ptr @_ZN4Simd4Base10ZlibDistEbE, i64 0, i64 %361
  %363 = load i8, ptr %362, align 1, !tbaa !14
  %364 = zext i8 %363 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %351, i64 noundef %359, i64 noundef %364)
          to label %365 unwind label %319

365:                                              ; preds = %350
  br label %366

366:                                              ; preds = %365, %344
  %367 = load i32, ptr %19, align 4, !tbaa !9
  %368 = load i32, ptr %16, align 4, !tbaa !9
  %369 = add nsw i32 %368, %367
  store i32 %369, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #8
  br label %381

370:                                              ; preds = %255
  %371 = load ptr, ptr %5, align 8, !tbaa !5
  %372 = load i32, ptr %16, align 4, !tbaa !9
  %373 = sext i32 %372 to i64
  %374 = getelementptr inbounds i8, ptr %371, i64 %373
  %375 = load i8, ptr %374, align 1, !tbaa !14
  %376 = zext i8 %375 to i32
  %377 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef %376, ptr noundef nonnull align 8 dereferenceable(56) %377)
          to label %378 unwind label %238

378:                                              ; preds = %370
  %379 = load i32, ptr %16, align 4, !tbaa !9
  %380 = add nsw i32 %379, 1
  store i32 %380, ptr %16, align 4, !tbaa !9
  br label %381

381:                                              ; preds = %378, %366
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  br label %49, !llvm.loop !22

382:                                              ; preds = %319, %242, %238, %138
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  br label %383

383:                                              ; preds = %382, %134
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  br label %419

384:                                              ; preds = %49
  br label %385

385:                                              ; preds = %398, %384
  %386 = load i32, ptr %16, align 4, !tbaa !9
  %387 = load i32, ptr %6, align 4, !tbaa !9
  %388 = icmp slt i32 %386, %387
  br i1 %388, label %389, label %405

389:                                              ; preds = %385
  %390 = load ptr, ptr %5, align 8, !tbaa !5
  %391 = load i32, ptr %16, align 4, !tbaa !9
  %392 = sext i32 %391 to i64
  %393 = getelementptr inbounds i8, ptr %390, i64 %392
  %394 = load i8, ptr %393, align 1, !tbaa !14
  %395 = zext i8 %394 to i32
  %396 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef %395, ptr noundef nonnull align 8 dereferenceable(56) %396)
          to label %397 unwind label %401

397:                                              ; preds = %389
  br label %398

398:                                              ; preds = %397
  %399 = load i32, ptr %16, align 4, !tbaa !9
  %400 = add nsw i32 %399, 1
  store i32 %400, ptr %16, align 4, !tbaa !9
  br label %385, !llvm.loop !23

401:                                              ; preds = %407, %405, %389
  %402 = landingpad { ptr, i32 }
          cleanup
  %403 = extractvalue { ptr, i32 } %402, 0
  store ptr %403, ptr %12, align 8
  %404 = extractvalue { ptr, i32 } %402, 1
  store i32 %404, ptr %13, align 4
  br label %419

405:                                              ; preds = %385
  %406 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef 256, ptr noundef nonnull align 8 dereferenceable(56) %406)
          to label %407 unwind label %401

407:                                              ; preds = %405
  %408 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN4Simd18OutputMemoryStream9FlushBitsEv(ptr noundef nonnull align 8 dereferenceable(56) %408)
          to label %409 unwind label %401

409:                                              ; preds = %407
  %410 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #8
  %411 = load ptr, ptr %5, align 8, !tbaa !5
  %412 = load i32, ptr %6, align 4, !tbaa !9
  %413 = call noundef i32 @_ZN4Simd4Base11ZlibAdler32EPhi(ptr noundef %411, i32 noundef %412)
  store i32 %413, ptr %27, align 4, !tbaa !9
  invoke void @_ZN4Simd18OutputMemoryStream10WriteBe32uERKj(ptr noundef nonnull align 8 dereferenceable(56) %410, ptr noundef nonnull align 4 dereferenceable(4) %27)
          to label %414 unwind label %415

414:                                              ; preds = %409
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #8
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #8
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #8
  ret void

415:                                              ; preds = %409
  %416 = landingpad { ptr, i32 }
          cleanup
  %417 = extractvalue { ptr, i32 } %416, 0
  store ptr %417, ptr %12, align 8
  %418 = extractvalue { ptr, i32 } %416, 1
  store i32 %418, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #8
  br label %419

419:                                              ; preds = %415, %401, %383
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #8
  br label %420

420:                                              ; preds = %419, %130, %126, %122
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #8
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #8
  br label %421

421:                                              ; preds = %420
  %422 = load ptr, ptr %12, align 8
  %423 = load i32, ptr %13, align 4
  %424 = insertvalue { ptr, i32 } poison, ptr %422, 0
  %425 = insertvalue { ptr, i32 } %424, i32 %423, 1
  resume { ptr, i32 } %425

426:                                              ; preds = %247
  unreachable
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIiE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 1 dereferenceable(1)) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i64 noundef) #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef) #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef, ptr noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #7

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(56)) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base10ZlibBitRevEii(i32 noundef, i32 noundef) #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(56)) #3

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream9FlushBitsEv(ptr noundef nonnull align 8 dereferenceable(56)) #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream10WriteBe32uERKj(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #4 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTSN4Simd5ArrayIiEE", !6, i64 0, !13, i64 8}
!13 = !{!"long", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !7, i64 0}
!20 = distinct !{!20, !16}
!21 = distinct !{!21, !16}
!22 = distinct !{!22, !16}
!23 = distinct !{!23, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.Simd::Array" = type { ptr, i64 }

@_ZN4Simd4Base8ZlibLenCE = external dso_local local_unnamed_addr constant [30 x i16], align 16
@_ZN4Simd4Base9ZlibLenEbE = external dso_local local_unnamed_addr constant [29 x i8], align 16
@_ZN4Simd4Base9ZlibDistCE = external dso_local local_unnamed_addr constant [31 x i16], align 16
@_ZN4Simd4Base10ZlibDistEbE = external dso_local local_unnamed_addr constant [30 x i8], align 16
@.str = external hidden unnamed_addr constant [26 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [82 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE = external hidden unnamed_addr constant [73 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base11ZlibAdler32EPhi(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(56) %3) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"struct.Simd::Array", align 8
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %spec.store.select = tail call i32 @llvm.smax.i32(i32 %2, i32 5)
  %9 = shl nuw nsw i32 %spec.store.select, 1
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #9
  %10 = shl nsw i32 %spec.store.select, 15
  %11 = zext nneg i32 %10 to i64
  call void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16) %5, i64 noundef %11, i1 noundef zeroext false, i64 noundef 8)
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = call noundef i64 @_ZNK4Simd5ArrayIiE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16) %5)
  call void @llvm.memset.p0.i64(ptr align 4 %12, i8 -1, i64 %13, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #9
  store i8 120, ptr %6, align 1, !tbaa !11
  invoke void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56) %3, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %14 unwind label %51

14:                                               ; preds = %4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #9
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #9
  store i8 94, ptr %7, align 1, !tbaa !11
  invoke void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56) %3, ptr noundef nonnull align 1 dereferenceable(1) %7)
          to label %15 unwind label %53

15:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #9
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %3, i64 noundef 1, i64 noundef 1)
          to label %16 unwind label %49

16:                                               ; preds = %15
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %3, i64 noundef 1, i64 noundef 2)
          to label %.preheader151 unwind label %49

.preheader151:                                    ; preds = %16
  %17 = add nsw i32 %1, -3
  %18 = icmp sgt i32 %1, 3
  br i1 %18, label %.lr.ph173, label %.preheader

.lr.ph173:                                        ; preds = %.preheader151
  %19 = zext nneg i32 %spec.store.select to i64
  %20 = shl nuw nsw i64 %19, 2
  %21 = zext nneg i32 %9 to i64
  br label %24

.preheader:                                       ; preds = %148, %.preheader151
  %.0118.lcssa = phi i32 [ 0, %.preheader151 ], [ %.1119, %148 ]
  %22 = icmp slt i32 %.0118.lcssa, %1
  br i1 %22, label %.lr.ph176.preheader, label %._crit_edge177

.lr.ph176.preheader:                              ; preds = %.preheader
  %23 = sext i32 %.0118.lcssa to i64
  br label %.lr.ph176

24:                                               ; preds = %.lr.ph173, %148
  %.0118172 = phi i32 [ 0, %.lr.ph173 ], [ %.1119, %148 ]
  %25 = sext i32 %.0118172 to i64
  %26 = getelementptr inbounds i8, ptr %0, i64 %25
  %27 = call noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef %26)
  %28 = and i32 %27, 16383
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = mul nuw nsw i32 %28, %9
  %31 = zext nneg i32 %30 to i64
  %32 = getelementptr inbounds i32, ptr %29, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !12
  %.not178 = icmp eq i32 %33, -1
  br i1 %.not178, label %._crit_edge._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %24
  %34 = add nsw i32 %.0118172, -32768
  %35 = sub nsw i32 %1, %.0118172
  br label %36

36:                                               ; preds = %.lr.ph, %57
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %57 ]
  %37 = phi i32 [ %33, %.lr.ph ], [ %59, %57 ]
  %.0124161 = phi ptr [ null, %.lr.ph ], [ %.2126, %57 ]
  %.0129160 = phi i32 [ 3, %.lr.ph ], [ %.2131, %57 ]
  %38 = getelementptr inbounds i32, ptr %32, i64 %indvars.iv
  %39 = icmp sgt i32 %37, %34
  br i1 %39, label %40, label %57

40:                                               ; preds = %36
  %41 = sext i32 %37 to i64
  %42 = getelementptr inbounds i8, ptr %0, i64 %41
  %43 = invoke noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef %42, ptr noundef %26, i32 noundef %35)
          to label %44 unwind label %55

44:                                               ; preds = %40
  %.not147 = icmp slt i32 %43, %.0129160
  br i1 %.not147, label %57, label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %38, align 4, !tbaa !12
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds i8, ptr %0, i64 %47
  br label %57

49:                                               ; preds = %16, %15
  %50 = landingpad { ptr, i32 }
          cleanup
  br label %160

51:                                               ; preds = %4
  %52 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #9
  br label %160

53:                                               ; preds = %14
  %54 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #9
  br label %160

55:                                               ; preds = %40
  %56 = landingpad { ptr, i32 }
          cleanup
  br label %160

57:                                               ; preds = %44, %45, %36
  %.2131 = phi i32 [ %.0129160, %36 ], [ %43, %45 ], [ %.0129160, %44 ]
  %.2126 = phi ptr [ %.0124161, %36 ], [ %48, %45 ], [ %.0124161, %44 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %58 = getelementptr inbounds i32, ptr %32, i64 %indvars.iv.next
  %59 = load i32, ptr %58, align 4, !tbaa !12
  %60 = icmp ne i32 %59, -1
  %61 = icmp ult i64 %indvars.iv.next, %21
  %62 = select i1 %60, i1 %61, i1 false
  br i1 %62, label %36, label %._crit_edge, !llvm.loop !14

._crit_edge:                                      ; preds = %57
  %63 = trunc nuw i64 %indvars.iv.next to i32
  %64 = icmp eq i32 %9, %63
  br i1 %64, label %65, label %._crit_edge._crit_edge

._crit_edge._crit_edge:                           ; preds = %24, %._crit_edge
  %.0121.lcssa200 = phi i64 [ %indvars.iv.next, %._crit_edge ], [ 0, %24 ]
  %.0124.lcssa199 = phi ptr [ %.2126, %._crit_edge ], [ null, %24 ]
  %.0129.lcssa197 = phi i32 [ %.2131, %._crit_edge ], [ 3, %24 ]
  %.pre = and i64 %.0121.lcssa200, 4294967295
  br label %67

65:                                               ; preds = %._crit_edge
  %66 = getelementptr inbounds i32, ptr %32, i64 %19
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %32, ptr noundef nonnull align 4 dereferenceable(1) %66, i64 %20, i1 false)
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %66, i8 -1, i64 %20, i1 false)
  br label %67

67:                                               ; preds = %._crit_edge._crit_edge, %65
  %.0124.lcssa198 = phi ptr [ %.0124.lcssa199, %._crit_edge._crit_edge ], [ %.2126, %65 ]
  %.0129.lcssa196 = phi i32 [ %.0129.lcssa197, %._crit_edge._crit_edge ], [ %.2131, %65 ]
  %.pre-phi = phi i64 [ %.pre, %._crit_edge._crit_edge ], [ %19, %65 ]
  %68 = getelementptr inbounds i32, ptr %32, i64 %.pre-phi
  store i32 %.0118172, ptr %68, align 4, !tbaa !12
  %.not = icmp eq ptr %.0124.lcssa198, null
  br i1 %.not, label %.thread, label %69

69:                                               ; preds = %67
  %70 = getelementptr inbounds i8, ptr %26, i64 1
  %71 = call noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef nonnull %70)
  %72 = and i32 %71, 16383
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = mul nuw nsw i32 %72, %9
  %75 = zext nneg i32 %74 to i64
  %76 = getelementptr inbounds i32, ptr %73, i64 %75
  %77 = load i32, ptr %76, align 4, !tbaa !12
  %.not179 = icmp eq i32 %77, -1
  br i1 %.not179, label %._crit_edge168.thread203, label %.lr.ph167

.lr.ph167:                                        ; preds = %69
  %78 = add nsw i32 %.0118172, -32767
  %79 = xor i32 %.0118172, -1
  %80 = add i32 %79, %1
  br label %81

81:                                               ; preds = %.lr.ph167, %94
  %indvars.iv181 = phi i64 [ 0, %.lr.ph167 ], [ %indvars.iv.next182, %94 ]
  %82 = phi i32 [ %77, %.lr.ph167 ], [ %96, %94 ]
  %83 = icmp sgt i32 %82, %78
  br i1 %83, label %84, label %94

84:                                               ; preds = %81
  %85 = sext i32 %82 to i64
  %86 = getelementptr inbounds i8, ptr %0, i64 %85
  %87 = invoke noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef %86, ptr noundef nonnull %70, i32 noundef %80)
          to label %88 unwind label %92

88:                                               ; preds = %84
  %89 = icmp sgt i32 %87, %.0129.lcssa196
  br i1 %89, label %.thread, label %94

90:                                               ; preds = %.thread
  %91 = landingpad { ptr, i32 }
          cleanup
  br label %160

92:                                               ; preds = %84
  %93 = landingpad { ptr, i32 }
          cleanup
  br label %160

94:                                               ; preds = %88, %81
  %indvars.iv.next182 = add nuw nsw i64 %indvars.iv181, 1
  %95 = getelementptr inbounds i32, ptr %76, i64 %indvars.iv.next182
  %96 = load i32, ptr %95, align 4, !tbaa !12
  %97 = icmp ne i32 %96, -1
  %98 = icmp ult i64 %indvars.iv.next182, %21
  %99 = select i1 %97, i1 %98, i1 false
  br i1 %99, label %81, label %._crit_edge168.thread203, !llvm.loop !16

._crit_edge168.thread203:                         ; preds = %94, %69
  %100 = ptrtoint ptr %26 to i64
  %101 = ptrtoint ptr %.0124.lcssa198 to i64
  %102 = sub i64 %100, %101
  %103 = trunc i64 %102 to i32
  %104 = icmp slt i32 %103, 32768
  %105 = icmp slt i32 %.0129.lcssa196, 259
  %106 = select i1 %104, i1 %105, i1 false
  br i1 %106, label %.preheader150, label %107

107:                                              ; preds = %._crit_edge168.thread203
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.2, i32 noundef 138, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base12ZlibCompressEPhiiRNS_18OutputMemoryStreamE) #10
  unreachable

.preheader150:                                    ; preds = %._crit_edge168.thread203, %.preheader150
  %indvars.iv184 = phi i64 [ %indvars.iv.next185, %.preheader150 ], [ 0, %._crit_edge168.thread203 ]
  %indvars.iv.next185 = add nuw nsw i64 %indvars.iv184, 1
  %108 = getelementptr inbounds [30 x i16], ptr @_ZN4Simd4Base8ZlibLenCE, i64 0, i64 %indvars.iv.next185
  %109 = load i16, ptr %108, align 2, !tbaa !17
  %110 = zext i16 %109 to i32
  %.not140 = icmp slt i32 %.0129.lcssa196, %110
  br i1 %.not140, label %111, label %.preheader150, !llvm.loop !19

111:                                              ; preds = %.preheader150
  %112 = trunc nuw nsw i64 %indvars.iv184 to i32
  %113 = add nuw nsw i32 %112, 257
  invoke void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef %113, ptr noundef nonnull align 8 dereferenceable(56) %3)
          to label %114 unwind label %125

114:                                              ; preds = %111
  %115 = and i64 %indvars.iv184, 4294967295
  %116 = getelementptr inbounds [29 x i8], ptr @_ZN4Simd4Base9ZlibLenEbE, i64 0, i64 %115
  %117 = load i8, ptr %116, align 1, !tbaa !11
  %.not141 = icmp eq i8 %117, 0
  br i1 %.not141, label %.preheader207, label %118

.preheader207:                                    ; preds = %118, %114
  br label %127

118:                                              ; preds = %114
  %119 = getelementptr inbounds [30 x i16], ptr @_ZN4Simd4Base8ZlibLenCE, i64 0, i64 %115
  %120 = load i16, ptr %119, align 2, !tbaa !17
  %121 = zext i16 %120 to i32
  %122 = sub nsw i32 %.0129.lcssa196, %121
  %123 = sext i32 %122 to i64
  %124 = zext i8 %117 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %3, i64 noundef %123, i64 noundef %124)
          to label %.preheader207 unwind label %125

125:                                              ; preds = %139, %131, %118, %111
  %126 = landingpad { ptr, i32 }
          cleanup
  br label %160

127:                                              ; preds = %.preheader207, %127
  %indvars.iv187 = phi i64 [ %indvars.iv.next188, %127 ], [ 0, %.preheader207 ]
  %indvars.iv.next188 = add nuw nsw i64 %indvars.iv187, 1
  %128 = getelementptr inbounds [31 x i16], ptr @_ZN4Simd4Base9ZlibDistCE, i64 0, i64 %indvars.iv.next188
  %129 = load i16, ptr %128, align 2, !tbaa !17
  %130 = zext i16 %129 to i32
  %.not142 = icmp sgt i32 %130, %103
  br i1 %.not142, label %131, label %127, !llvm.loop !20

131:                                              ; preds = %127
  %132 = trunc nuw nsw i64 %indvars.iv187 to i32
  %133 = call noundef i32 @_ZN4Simd4Base10ZlibBitRevEii(i32 noundef %132, i32 noundef 5)
  %134 = sext i32 %133 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %3, i64 noundef %134, i64 noundef 5)
          to label %135 unwind label %125

135:                                              ; preds = %131
  %136 = and i64 %indvars.iv187, 4294967295
  %137 = getelementptr inbounds [30 x i8], ptr @_ZN4Simd4Base10ZlibDistEbE, i64 0, i64 %136
  %138 = load i8, ptr %137, align 1, !tbaa !11
  %.not143 = icmp eq i8 %138, 0
  br i1 %.not143, label %148, label %139

139:                                              ; preds = %135
  %140 = getelementptr inbounds [31 x i16], ptr @_ZN4Simd4Base9ZlibDistCE, i64 0, i64 %136
  %141 = load i16, ptr %140, align 2, !tbaa !17
  %142 = zext i16 %141 to i64
  %143 = sub i64 %102, %142
  %sext = shl i64 %143, 32
  %144 = ashr exact i64 %sext, 32
  %145 = zext i8 %138 to i64
  invoke void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56) %3, i64 noundef %144, i64 noundef %145)
          to label %148 unwind label %125

.thread:                                          ; preds = %88, %67
  %146 = load i8, ptr %26, align 1, !tbaa !11
  %147 = zext i8 %146 to i32
  invoke void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef %147, ptr noundef nonnull align 8 dereferenceable(56) %3)
          to label %148 unwind label %90

148:                                              ; preds = %.thread, %135, %139
  %.0129.pn = phi i32 [ %.0129.lcssa196, %139 ], [ %.0129.lcssa196, %135 ], [ 1, %.thread ]
  %.1119 = add nsw i32 %.0129.pn, %.0118172
  %149 = icmp slt i32 %.1119, %17
  br i1 %149, label %24, label %.preheader, !llvm.loop !21

.lr.ph176:                                        ; preds = %.lr.ph176.preheader, %153
  %indvars.iv190 = phi i64 [ %23, %.lr.ph176.preheader ], [ %indvars.iv.next191, %153 ]
  %150 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv190
  %151 = load i8, ptr %150, align 1, !tbaa !11
  %152 = zext i8 %151 to i32
  invoke void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef %152, ptr noundef nonnull align 8 dereferenceable(56) %3)
          to label %153 unwind label %.loopexit

153:                                              ; preds = %.lr.ph176
  %indvars.iv.next191 = add nsw i64 %indvars.iv190, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next191 to i32
  %exitcond.not = icmp eq i32 %lftr.wideiv, %1
  br i1 %exitcond.not, label %._crit_edge177, label %.lr.ph176, !llvm.loop !22

.loopexit:                                        ; preds = %.lr.ph176
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %160

.loopexit.split-lp:                               ; preds = %._crit_edge177, %154
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %160

._crit_edge177:                                   ; preds = %153, %.preheader
  invoke void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef 256, ptr noundef nonnull align 8 dereferenceable(56) %3)
          to label %154 unwind label %.loopexit.split-lp

154:                                              ; preds = %._crit_edge177
  invoke void @_ZN4Simd18OutputMemoryStream9FlushBitsEv(ptr noundef nonnull align 8 dereferenceable(56) %3)
          to label %155 unwind label %.loopexit.split-lp

155:                                              ; preds = %154
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #9
  %156 = call noundef i32 @_ZN4Simd4Base11ZlibAdler32EPhi(ptr noundef %0, i32 noundef %1)
  store i32 %156, ptr %8, align 4, !tbaa !12
  invoke void @_ZN4Simd18OutputMemoryStream10WriteBe32uERKj(ptr noundef nonnull align 8 dereferenceable(56) %3, ptr noundef nonnull align 4 dereferenceable(4) %8)
          to label %157 unwind label %158

157:                                              ; preds = %155
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #9
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %5) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #9
  ret void

158:                                              ; preds = %155
  %159 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #9
  br label %160

160:                                              ; preds = %.loopexit, %.loopexit.split-lp, %158, %125, %92, %90, %55, %53, %51, %49
  %.pn.pn.pn = phi { ptr, i32 } [ %50, %49 ], [ %54, %53 ], [ %52, %51 ], [ %159, %158 ], [ %56, %55 ], [ %126, %125 ], [ %91, %90 ], [ %93, %92 ], [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  call void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %5) #9
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #9
  resume { ptr, i32 } %.pn.pn.pn
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiEC2Embm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK4Simd5ArrayIiE7RawSizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream5WriteIhEEvRKT_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream9WriteBitsEmm(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base8ZlibHashEPKh(ptr noundef) local_unnamed_addr #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i32 @_ZN4Simd4Base9ZlibCountEPKhS2_i(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #7

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base8ZlibHuffEiRNS_18OutputMemoryStreamE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4Simd4Base10ZlibBitRevEii(i32 noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base9ZlibHuffBEiRNS_18OutputMemoryStreamE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream9FlushBitsEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd18OutputMemoryStream10WriteBe32uERKj(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd5ArrayIiED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #8

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN4Simd5ArrayIiEE", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = !{!18, !18, i64 0}
!18 = !{!"short", !8, i64 0}
!19 = distinct !{!19, !15}
!20 = distinct !{!20, !15}
!21 = distinct !{!21, !15}
!22 = distinct !{!22, !15}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass