; LLVM IR from libxsmm/libxsmm :: tests (gemmflags)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.main.defaults = external hidden unnamed_addr constant [4 x i32], align 16
@__const.main.trans = external hidden unnamed_addr constant [8 x i8], align 1
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca [4 x i32], align 16
  %3 = alloca [8 x i8], align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %2) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %2, ptr align 16 @__const.main.defaults, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %3, ptr align 1 @__const.main.trans, i64 8, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 4, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 8, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 -1, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 -1, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %625, %0
  %12 = load i32, ptr %7, align 4, !tbaa !5
  %13 = icmp slt i32 %12, 4
  br i1 %13, label %14, label %17

14:                                               ; preds = %11
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp eq i32 0, %15
  br label %17

17:                                               ; preds = %14, %11
  %18 = phi i1 [ false, %11 ], [ %16, %14 ]
  br i1 %18, label %19, label %628

19:                                               ; preds = %17
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = and i32 1, %23
  %25 = icmp eq i32 0, %24
  %26 = zext i1 %25 to i64
  %27 = select i1 %25, i32 110, i32 116
  %28 = icmp eq i32 110, %27
  br i1 %28, label %41, label %29

29:                                               ; preds = %19
  %30 = load i8, ptr @.str, align 1, !tbaa !9
  %31 = sext i8 %30 to i32
  %32 = load i32, ptr %7, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = and i32 1, %35
  %37 = icmp eq i32 0, %36
  %38 = zext i1 %37 to i64
  %39 = select i1 %37, i32 110, i32 116
  %40 = icmp eq i32 %31, %39
  br label %41

41:                                               ; preds = %29, %19
  %42 = phi i1 [ true, %19 ], [ %40, %29 ]
  %43 = zext i1 %42 to i64
  %44 = select i1 %42, i32 0, i32 1
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = and i32 2, %48
  %50 = icmp eq i32 0, %49
  %51 = zext i1 %50 to i64
  %52 = select i1 %50, i32 110, i32 116
  %53 = icmp eq i32 110, %52
  br i1 %53, label %66, label %54

54:                                               ; preds = %41
  %55 = load i8, ptr @.str, align 1, !tbaa !9
  %56 = sext i8 %55 to i32
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = and i32 2, %60
  %62 = icmp eq i32 0, %61
  %63 = zext i1 %62 to i64
  %64 = select i1 %62, i32 110, i32 116
  %65 = icmp eq i32 %56, %64
  br label %66

66:                                               ; preds = %54, %41
  %67 = phi i1 [ true, %41 ], [ %65, %54 ]
  %68 = zext i1 %67 to i64
  %69 = select i1 %67, i32 0, i32 2
  %70 = or i32 %44, %69
  %71 = load i32, ptr %7, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = and i32 -4, %74
  %76 = or i32 %70, %75
  store i32 %76, ptr %10, align 4, !tbaa !5
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %78
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = load i32, ptr %10, align 4, !tbaa !5
  %82 = icmp ne i32 %80, %81
  br i1 %82, label %83, label %84

83:                                               ; preds = %66
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %628

84:                                               ; preds = %66
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %621, %84
  %86 = load i32, ptr %8, align 4, !tbaa !5
  %87 = icmp slt i32 %86, 8
  br i1 %87, label %88, label %91

88:                                               ; preds = %85
  %89 = load i32, ptr %6, align 4, !tbaa !5
  %90 = icmp eq i32 0, %89
  br label %91

91:                                               ; preds = %88, %85
  %92 = phi i1 [ false, %85 ], [ %90, %88 ]
  br i1 %92, label %93, label %624

93:                                               ; preds = %91
  %94 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %95 = load i32, ptr %8, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds i8, ptr %94, i64 %96
  %98 = icmp ne ptr null, %97
  br i1 %98, label %99, label %106

99:                                               ; preds = %93
  %100 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %101 = load i32, ptr %8, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds i8, ptr %100, i64 %102
  %104 = load i8, ptr %103, align 1, !tbaa !9
  %105 = sext i8 %104 to i32
  br label %115

106:                                              ; preds = %93
  %107 = load i32, ptr %7, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %108
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = and i32 1, %110
  %112 = icmp eq i32 0, %111
  %113 = zext i1 %112 to i64
  %114 = select i1 %112, i32 110, i32 116
  br label %115

115:                                              ; preds = %106, %99
  %116 = phi i32 [ %105, %99 ], [ %114, %106 ]
  %117 = icmp eq i32 110, %116
  br i1 %117, label %145, label %118

118:                                              ; preds = %115
  %119 = load i8, ptr @.str, align 1, !tbaa !9
  %120 = sext i8 %119 to i32
  %121 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %122 = load i32, ptr %8, align 4, !tbaa !5
  %123 = sext i32 %122 to i64
  %124 = getelementptr inbounds i8, ptr %121, i64 %123
  %125 = icmp ne ptr null, %124
  br i1 %125, label %126, label %133

126:                                              ; preds = %118
  %127 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %128 = load i32, ptr %8, align 4, !tbaa !5
  %129 = sext i32 %128 to i64
  %130 = getelementptr inbounds i8, ptr %127, i64 %129
  %131 = load i8, ptr %130, align 1, !tbaa !9
  %132 = sext i8 %131 to i32
  br label %142

133:                                              ; preds = %118
  %134 = load i32, ptr %7, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %135
  %137 = load i32, ptr %136, align 4, !tbaa !5
  %138 = and i32 1, %137
  %139 = icmp eq i32 0, %138
  %140 = zext i1 %139 to i64
  %141 = select i1 %139, i32 110, i32 116
  br label %142

142:                                              ; preds = %133, %126
  %143 = phi i32 [ %132, %126 ], [ %141, %133 ]
  %144 = icmp eq i32 %120, %143
  br label %145

145:                                              ; preds = %142, %115
  %146 = phi i1 [ true, %115 ], [ %144, %142 ]
  %147 = zext i1 %146 to i64
  %148 = select i1 %146, i32 0, i32 1
  %149 = load i32, ptr %7, align 4, !tbaa !5
  %150 = sext i32 %149 to i64
  %151 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %150
  %152 = load i32, ptr %151, align 4, !tbaa !5
  %153 = and i32 2, %152
  %154 = icmp eq i32 0, %153
  %155 = zext i1 %154 to i64
  %156 = select i1 %154, i32 110, i32 116
  %157 = icmp eq i32 110, %156
  br i1 %157, label %170, label %158

158:                                              ; preds = %145
  %159 = load i8, ptr @.str, align 1, !tbaa !9
  %160 = sext i8 %159 to i32
  %161 = load i32, ptr %7, align 4, !tbaa !5
  %162 = sext i32 %161 to i64
  %163 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %162
  %164 = load i32, ptr %163, align 4, !tbaa !5
  %165 = and i32 2, %164
  %166 = icmp eq i32 0, %165
  %167 = zext i1 %166 to i64
  %168 = select i1 %166, i32 110, i32 116
  %169 = icmp eq i32 %160, %168
  br label %170

170:                                              ; preds = %158, %145
  %171 = phi i1 [ true, %145 ], [ %169, %158 ]
  %172 = zext i1 %171 to i64
  %173 = select i1 %171, i32 0, i32 2
  %174 = or i32 %148, %173
  %175 = load i32, ptr %7, align 4, !tbaa !5
  %176 = sext i32 %175 to i64
  %177 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %176
  %178 = load i32, ptr %177, align 4, !tbaa !5
  %179 = and i32 -4, %178
  %180 = or i32 %174, %179
  store i32 %180, ptr %10, align 4, !tbaa !5
  %181 = load i32, ptr %10, align 4, !tbaa !5
  %182 = and i32 1, %181
  %183 = icmp ne i32 0, %182
  br i1 %183, label %184, label %199

184:                                              ; preds = %170
  %185 = load i32, ptr %8, align 4, !tbaa !5
  %186 = sext i32 %185 to i64
  %187 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %186
  %188 = load i8, ptr %187, align 1, !tbaa !9
  %189 = sext i8 %188 to i32
  %190 = icmp eq i32 78, %189
  br i1 %190, label %198, label %191

191:                                              ; preds = %184
  %192 = load i32, ptr %8, align 4, !tbaa !5
  %193 = sext i32 %192 to i64
  %194 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %193
  %195 = load i8, ptr %194, align 1, !tbaa !9
  %196 = sext i8 %195 to i32
  %197 = icmp eq i32 110, %196
  br i1 %197, label %198, label %199

198:                                              ; preds = %191, %184
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %624

199:                                              ; preds = %191, %170
  %200 = load i32, ptr %10, align 4, !tbaa !5
  %201 = and i32 1, %200
  %202 = icmp eq i32 0, %201
  br i1 %202, label %203, label %218

203:                                              ; preds = %199
  %204 = load i32, ptr %8, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %205
  %207 = load i8, ptr %206, align 1, !tbaa !9
  %208 = sext i8 %207 to i32
  %209 = icmp eq i32 84, %208
  br i1 %209, label %217, label %210

210:                                              ; preds = %203
  %211 = load i32, ptr %8, align 4, !tbaa !5
  %212 = sext i32 %211 to i64
  %213 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %212
  %214 = load i8, ptr %213, align 1, !tbaa !9
  %215 = sext i8 %214 to i32
  %216 = icmp eq i32 116, %215
  br i1 %216, label %217, label %218

217:                                              ; preds = %210, %203
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %624

218:                                              ; preds = %210, %199
  %219 = load i32, ptr %10, align 4, !tbaa !5
  %220 = and i32 1, %219
  %221 = icmp eq i32 0, %220
  br i1 %221, label %222, label %237

222:                                              ; preds = %218
  %223 = load i32, ptr %8, align 4, !tbaa !5
  %224 = sext i32 %223 to i64
  %225 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %224
  %226 = load i8, ptr %225, align 1, !tbaa !9
  %227 = sext i8 %226 to i32
  %228 = icmp eq i32 67, %227
  br i1 %228, label %236, label %229

229:                                              ; preds = %222
  %230 = load i32, ptr %8, align 4, !tbaa !5
  %231 = sext i32 %230 to i64
  %232 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %231
  %233 = load i8, ptr %232, align 1, !tbaa !9
  %234 = sext i8 %233 to i32
  %235 = icmp eq i32 99, %234
  br i1 %235, label %236, label %237

236:                                              ; preds = %229, %222
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %624

237:                                              ; preds = %229, %218
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %238

238:                                              ; preds = %617, %237
  %239 = load i32, ptr %9, align 4, !tbaa !5
  %240 = icmp slt i32 %239, 8
  br i1 %240, label %241, label %620

241:                                              ; preds = %238
  %242 = load i32, ptr %7, align 4, !tbaa !5
  %243 = sext i32 %242 to i64
  %244 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %243
  %245 = load i32, ptr %244, align 4, !tbaa !5
  %246 = and i32 1, %245
  %247 = icmp eq i32 0, %246
  %248 = zext i1 %247 to i64
  %249 = select i1 %247, i32 110, i32 116
  %250 = icmp eq i32 110, %249
  br i1 %250, label %263, label %251

251:                                              ; preds = %241
  %252 = load i8, ptr @.str, align 1, !tbaa !9
  %253 = sext i8 %252 to i32
  %254 = load i32, ptr %7, align 4, !tbaa !5
  %255 = sext i32 %254 to i64
  %256 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %255
  %257 = load i32, ptr %256, align 4, !tbaa !5
  %258 = and i32 1, %257
  %259 = icmp eq i32 0, %258
  %260 = zext i1 %259 to i64
  %261 = select i1 %259, i32 110, i32 116
  %262 = icmp eq i32 %253, %261
  br label %263

263:                                              ; preds = %251, %241
  %264 = phi i1 [ true, %241 ], [ %262, %251 ]
  %265 = zext i1 %264 to i64
  %266 = select i1 %264, i32 0, i32 1
  %267 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %268 = load i32, ptr %9, align 4, !tbaa !5
  %269 = sext i32 %268 to i64
  %270 = getelementptr inbounds i8, ptr %267, i64 %269
  %271 = icmp ne ptr null, %270
  br i1 %271, label %272, label %279

272:                                              ; preds = %263
  %273 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %274 = load i32, ptr %9, align 4, !tbaa !5
  %275 = sext i32 %274 to i64
  %276 = getelementptr inbounds i8, ptr %273, i64 %275
  %277 = load i8, ptr %276, align 1, !tbaa !9
  %278 = sext i8 %277 to i32
  br label %288

279:                                              ; preds = %263
  %280 = load i32, ptr %7, align 4, !tbaa !5
  %281 = sext i32 %280 to i64
  %282 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %281
  %283 = load i32, ptr %282, align 4, !tbaa !5
  %284 = and i32 2, %283
  %285 = icmp eq i32 0, %284
  %286 = zext i1 %285 to i64
  %287 = select i1 %285, i32 110, i32 116
  br label %288

288:                                              ; preds = %279, %272
  %289 = phi i32 [ %278, %272 ], [ %287, %279 ]
  %290 = icmp eq i32 110, %289
  br i1 %290, label %318, label %291

291:                                              ; preds = %288
  %292 = load i8, ptr @.str, align 1, !tbaa !9
  %293 = sext i8 %292 to i32
  %294 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %295 = load i32, ptr %9, align 4, !tbaa !5
  %296 = sext i32 %295 to i64
  %297 = getelementptr inbounds i8, ptr %294, i64 %296
  %298 = icmp ne ptr null, %297
  br i1 %298, label %299, label %306

299:                                              ; preds = %291
  %300 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %301 = load i32, ptr %9, align 4, !tbaa !5
  %302 = sext i32 %301 to i64
  %303 = getelementptr inbounds i8, ptr %300, i64 %302
  %304 = load i8, ptr %303, align 1, !tbaa !9
  %305 = sext i8 %304 to i32
  br label %315

306:                                              ; preds = %291
  %307 = load i32, ptr %7, align 4, !tbaa !5
  %308 = sext i32 %307 to i64
  %309 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %308
  %310 = load i32, ptr %309, align 4, !tbaa !5
  %311 = and i32 2, %310
  %312 = icmp eq i32 0, %311
  %313 = zext i1 %312 to i64
  %314 = select i1 %312, i32 110, i32 116
  br label %315

315:                                              ; preds = %306, %299
  %316 = phi i32 [ %305, %299 ], [ %314, %306 ]
  %317 = icmp eq i32 %293, %316
  br label %318

318:                                              ; preds = %315, %288
  %319 = phi i1 [ true, %288 ], [ %317, %315 ]
  %320 = zext i1 %319 to i64
  %321 = select i1 %319, i32 0, i32 2
  %322 = or i32 %266, %321
  %323 = load i32, ptr %7, align 4, !tbaa !5
  %324 = sext i32 %323 to i64
  %325 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %324
  %326 = load i32, ptr %325, align 4, !tbaa !5
  %327 = and i32 -4, %326
  %328 = or i32 %322, %327
  store i32 %328, ptr %10, align 4, !tbaa !5
  %329 = load i32, ptr %10, align 4, !tbaa !5
  %330 = and i32 2, %329
  %331 = icmp ne i32 0, %330
  br i1 %331, label %332, label %347

332:                                              ; preds = %318
  %333 = load i32, ptr %9, align 4, !tbaa !5
  %334 = sext i32 %333 to i64
  %335 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %334
  %336 = load i8, ptr %335, align 1, !tbaa !9
  %337 = sext i8 %336 to i32
  %338 = icmp eq i32 78, %337
  br i1 %338, label %346, label %339

339:                                              ; preds = %332
  %340 = load i32, ptr %9, align 4, !tbaa !5
  %341 = sext i32 %340 to i64
  %342 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %341
  %343 = load i8, ptr %342, align 1, !tbaa !9
  %344 = sext i8 %343 to i32
  %345 = icmp eq i32 110, %344
  br i1 %345, label %346, label %347

346:                                              ; preds = %339, %332
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

347:                                              ; preds = %339, %318
  %348 = load i32, ptr %10, align 4, !tbaa !5
  %349 = and i32 2, %348
  %350 = icmp eq i32 0, %349
  br i1 %350, label %351, label %366

351:                                              ; preds = %347
  %352 = load i32, ptr %9, align 4, !tbaa !5
  %353 = sext i32 %352 to i64
  %354 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %353
  %355 = load i8, ptr %354, align 1, !tbaa !9
  %356 = sext i8 %355 to i32
  %357 = icmp eq i32 84, %356
  br i1 %357, label %365, label %358

358:                                              ; preds = %351
  %359 = load i32, ptr %9, align 4, !tbaa !5
  %360 = sext i32 %359 to i64
  %361 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %360
  %362 = load i8, ptr %361, align 1, !tbaa !9
  %363 = sext i8 %362 to i32
  %364 = icmp eq i32 116, %363
  br i1 %364, label %365, label %366

365:                                              ; preds = %358, %351
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

366:                                              ; preds = %358, %347
  %367 = load i32, ptr %10, align 4, !tbaa !5
  %368 = and i32 2, %367
  %369 = icmp eq i32 0, %368
  br i1 %369, label %370, label %385

370:                                              ; preds = %366
  %371 = load i32, ptr %9, align 4, !tbaa !5
  %372 = sext i32 %371 to i64
  %373 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %372
  %374 = load i8, ptr %373, align 1, !tbaa !9
  %375 = sext i8 %374 to i32
  %376 = icmp eq i32 67, %375
  br i1 %376, label %384, label %377

377:                                              ; preds = %370
  %378 = load i32, ptr %9, align 4, !tbaa !5
  %379 = sext i32 %378 to i64
  %380 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %379
  %381 = load i8, ptr %380, align 1, !tbaa !9
  %382 = sext i8 %381 to i32
  %383 = icmp eq i32 99, %382
  br i1 %383, label %384, label %385

384:                                              ; preds = %377, %370
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

385:                                              ; preds = %377, %366
  %386 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %387 = load i32, ptr %8, align 4, !tbaa !5
  %388 = sext i32 %387 to i64
  %389 = getelementptr inbounds i8, ptr %386, i64 %388
  %390 = icmp ne ptr null, %389
  br i1 %390, label %391, label %398

391:                                              ; preds = %385
  %392 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %393 = load i32, ptr %8, align 4, !tbaa !5
  %394 = sext i32 %393 to i64
  %395 = getelementptr inbounds i8, ptr %392, i64 %394
  %396 = load i8, ptr %395, align 1, !tbaa !9
  %397 = sext i8 %396 to i32
  br label %407

398:                                              ; preds = %385
  %399 = load i32, ptr %7, align 4, !tbaa !5
  %400 = sext i32 %399 to i64
  %401 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %400
  %402 = load i32, ptr %401, align 4, !tbaa !5
  %403 = and i32 1, %402
  %404 = icmp eq i32 0, %403
  %405 = zext i1 %404 to i64
  %406 = select i1 %404, i32 110, i32 116
  br label %407

407:                                              ; preds = %398, %391
  %408 = phi i32 [ %397, %391 ], [ %406, %398 ]
  %409 = icmp eq i32 110, %408
  br i1 %409, label %437, label %410

410:                                              ; preds = %407
  %411 = load i8, ptr @.str, align 1, !tbaa !9
  %412 = sext i8 %411 to i32
  %413 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %414 = load i32, ptr %8, align 4, !tbaa !5
  %415 = sext i32 %414 to i64
  %416 = getelementptr inbounds i8, ptr %413, i64 %415
  %417 = icmp ne ptr null, %416
  br i1 %417, label %418, label %425

418:                                              ; preds = %410
  %419 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %420 = load i32, ptr %8, align 4, !tbaa !5
  %421 = sext i32 %420 to i64
  %422 = getelementptr inbounds i8, ptr %419, i64 %421
  %423 = load i8, ptr %422, align 1, !tbaa !9
  %424 = sext i8 %423 to i32
  br label %434

425:                                              ; preds = %410
  %426 = load i32, ptr %7, align 4, !tbaa !5
  %427 = sext i32 %426 to i64
  %428 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %427
  %429 = load i32, ptr %428, align 4, !tbaa !5
  %430 = and i32 1, %429
  %431 = icmp eq i32 0, %430
  %432 = zext i1 %431 to i64
  %433 = select i1 %431, i32 110, i32 116
  br label %434

434:                                              ; preds = %425, %418
  %435 = phi i32 [ %424, %418 ], [ %433, %425 ]
  %436 = icmp eq i32 %412, %435
  br label %437

437:                                              ; preds = %434, %407
  %438 = phi i1 [ true, %407 ], [ %436, %434 ]
  %439 = zext i1 %438 to i64
  %440 = select i1 %438, i32 0, i32 1
  %441 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %442 = load i32, ptr %9, align 4, !tbaa !5
  %443 = sext i32 %442 to i64
  %444 = getelementptr inbounds i8, ptr %441, i64 %443
  %445 = icmp ne ptr null, %444
  br i1 %445, label %446, label %453

446:                                              ; preds = %437
  %447 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %448 = load i32, ptr %9, align 4, !tbaa !5
  %449 = sext i32 %448 to i64
  %450 = getelementptr inbounds i8, ptr %447, i64 %449
  %451 = load i8, ptr %450, align 1, !tbaa !9
  %452 = sext i8 %451 to i32
  br label %462

453:                                              ; preds = %437
  %454 = load i32, ptr %7, align 4, !tbaa !5
  %455 = sext i32 %454 to i64
  %456 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %455
  %457 = load i32, ptr %456, align 4, !tbaa !5
  %458 = and i32 2, %457
  %459 = icmp eq i32 0, %458
  %460 = zext i1 %459 to i64
  %461 = select i1 %459, i32 110, i32 116
  br label %462

462:                                              ; preds = %453, %446
  %463 = phi i32 [ %452, %446 ], [ %461, %453 ]
  %464 = icmp eq i32 110, %463
  br i1 %464, label %492, label %465

465:                                              ; preds = %462
  %466 = load i8, ptr @.str, align 1, !tbaa !9
  %467 = sext i8 %466 to i32
  %468 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %469 = load i32, ptr %9, align 4, !tbaa !5
  %470 = sext i32 %469 to i64
  %471 = getelementptr inbounds i8, ptr %468, i64 %470
  %472 = icmp ne ptr null, %471
  br i1 %472, label %473, label %480

473:                                              ; preds = %465
  %474 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 0
  %475 = load i32, ptr %9, align 4, !tbaa !5
  %476 = sext i32 %475 to i64
  %477 = getelementptr inbounds i8, ptr %474, i64 %476
  %478 = load i8, ptr %477, align 1, !tbaa !9
  %479 = sext i8 %478 to i32
  br label %489

480:                                              ; preds = %465
  %481 = load i32, ptr %7, align 4, !tbaa !5
  %482 = sext i32 %481 to i64
  %483 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %482
  %484 = load i32, ptr %483, align 4, !tbaa !5
  %485 = and i32 2, %484
  %486 = icmp eq i32 0, %485
  %487 = zext i1 %486 to i64
  %488 = select i1 %486, i32 110, i32 116
  br label %489

489:                                              ; preds = %480, %473
  %490 = phi i32 [ %479, %473 ], [ %488, %480 ]
  %491 = icmp eq i32 %467, %490
  br label %492

492:                                              ; preds = %489, %462
  %493 = phi i1 [ true, %462 ], [ %491, %489 ]
  %494 = zext i1 %493 to i64
  %495 = select i1 %493, i32 0, i32 2
  %496 = or i32 %440, %495
  %497 = load i32, ptr %7, align 4, !tbaa !5
  %498 = sext i32 %497 to i64
  %499 = getelementptr inbounds [4 x i32], ptr %2, i64 0, i64 %498
  %500 = load i32, ptr %499, align 4, !tbaa !5
  %501 = and i32 -4, %500
  %502 = or i32 %496, %501
  store i32 %502, ptr %10, align 4, !tbaa !5
  %503 = load i32, ptr %10, align 4, !tbaa !5
  %504 = and i32 1, %503
  %505 = icmp ne i32 0, %504
  br i1 %505, label %506, label %521

506:                                              ; preds = %492
  %507 = load i32, ptr %8, align 4, !tbaa !5
  %508 = sext i32 %507 to i64
  %509 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %508
  %510 = load i8, ptr %509, align 1, !tbaa !9
  %511 = sext i8 %510 to i32
  %512 = icmp eq i32 78, %511
  br i1 %512, label %520, label %513

513:                                              ; preds = %506
  %514 = load i32, ptr %8, align 4, !tbaa !5
  %515 = sext i32 %514 to i64
  %516 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %515
  %517 = load i8, ptr %516, align 1, !tbaa !9
  %518 = sext i8 %517 to i32
  %519 = icmp eq i32 110, %518
  br i1 %519, label %520, label %521

520:                                              ; preds = %513, %506
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

521:                                              ; preds = %513, %492
  %522 = load i32, ptr %10, align 4, !tbaa !5
  %523 = and i32 1, %522
  %524 = icmp eq i32 0, %523
  br i1 %524, label %525, label %540

525:                                              ; preds = %521
  %526 = load i32, ptr %8, align 4, !tbaa !5
  %527 = sext i32 %526 to i64
  %528 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %527
  %529 = load i8, ptr %528, align 1, !tbaa !9
  %530 = sext i8 %529 to i32
  %531 = icmp eq i32 84, %530
  br i1 %531, label %539, label %532

532:                                              ; preds = %525
  %533 = load i32, ptr %8, align 4, !tbaa !5
  %534 = sext i32 %533 to i64
  %535 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %534
  %536 = load i8, ptr %535, align 1, !tbaa !9
  %537 = sext i8 %536 to i32
  %538 = icmp eq i32 116, %537
  br i1 %538, label %539, label %540

539:                                              ; preds = %532, %525
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

540:                                              ; preds = %532, %521
  %541 = load i32, ptr %10, align 4, !tbaa !5
  %542 = and i32 1, %541
  %543 = icmp eq i32 0, %542
  br i1 %543, label %544, label %559

544:                                              ; preds = %540
  %545 = load i32, ptr %8, align 4, !tbaa !5
  %546 = sext i32 %545 to i64
  %547 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %546
  %548 = load i8, ptr %547, align 1, !tbaa !9
  %549 = sext i8 %548 to i32
  %550 = icmp eq i32 67, %549
  br i1 %550, label %558, label %551

551:                                              ; preds = %544
  %552 = load i32, ptr %8, align 4, !tbaa !5
  %553 = sext i32 %552 to i64
  %554 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %553
  %555 = load i8, ptr %554, align 1, !tbaa !9
  %556 = sext i8 %555 to i32
  %557 = icmp eq i32 99, %556
  br i1 %557, label %558, label %559

558:                                              ; preds = %551, %544
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

559:                                              ; preds = %551, %540
  %560 = load i32, ptr %10, align 4, !tbaa !5
  %561 = and i32 2, %560
  %562 = icmp ne i32 0, %561
  br i1 %562, label %563, label %578

563:                                              ; preds = %559
  %564 = load i32, ptr %9, align 4, !tbaa !5
  %565 = sext i32 %564 to i64
  %566 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %565
  %567 = load i8, ptr %566, align 1, !tbaa !9
  %568 = sext i8 %567 to i32
  %569 = icmp eq i32 78, %568
  br i1 %569, label %577, label %570

570:                                              ; preds = %563
  %571 = load i32, ptr %9, align 4, !tbaa !5
  %572 = sext i32 %571 to i64
  %573 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %572
  %574 = load i8, ptr %573, align 1, !tbaa !9
  %575 = sext i8 %574 to i32
  %576 = icmp eq i32 110, %575
  br i1 %576, label %577, label %578

577:                                              ; preds = %570, %563
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

578:                                              ; preds = %570, %559
  %579 = load i32, ptr %10, align 4, !tbaa !5
  %580 = and i32 2, %579
  %581 = icmp eq i32 0, %580
  br i1 %581, label %582, label %597

582:                                              ; preds = %578
  %583 = load i32, ptr %9, align 4, !tbaa !5
  %584 = sext i32 %583 to i64
  %585 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %584
  %586 = load i8, ptr %585, align 1, !tbaa !9
  %587 = sext i8 %586 to i32
  %588 = icmp eq i32 84, %587
  br i1 %588, label %596, label %589

589:                                              ; preds = %582
  %590 = load i32, ptr %9, align 4, !tbaa !5
  %591 = sext i32 %590 to i64
  %592 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %591
  %593 = load i8, ptr %592, align 1, !tbaa !9
  %594 = sext i8 %593 to i32
  %595 = icmp eq i32 116, %594
  br i1 %595, label %596, label %597

596:                                              ; preds = %589, %582
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

597:                                              ; preds = %589, %578
  %598 = load i32, ptr %10, align 4, !tbaa !5
  %599 = and i32 2, %598
  %600 = icmp eq i32 0, %599
  br i1 %600, label %601, label %616

601:                                              ; preds = %597
  %602 = load i32, ptr %9, align 4, !tbaa !5
  %603 = sext i32 %602 to i64
  %604 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %603
  %605 = load i8, ptr %604, align 1, !tbaa !9
  %606 = sext i8 %605 to i32
  %607 = icmp eq i32 67, %606
  br i1 %607, label %615, label %608

608:                                              ; preds = %601
  %609 = load i32, ptr %9, align 4, !tbaa !5
  %610 = sext i32 %609 to i64
  %611 = getelementptr inbounds [8 x i8], ptr %3, i64 0, i64 %610
  %612 = load i8, ptr %611, align 1, !tbaa !9
  %613 = sext i8 %612 to i32
  %614 = icmp eq i32 99, %613
  br i1 %614, label %615, label %616

615:                                              ; preds = %608, %601
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %620

616:                                              ; preds = %608, %597
  br label %617

617:                                              ; preds = %616
  %618 = load i32, ptr %9, align 4, !tbaa !5
  %619 = add nsw i32 %618, 1
  store i32 %619, ptr %9, align 4, !tbaa !5
  br label %238, !llvm.loop !10

620:                                              ; preds = %615, %596, %577, %558, %539, %520, %384, %365, %346, %238
  br label %621

621:                                              ; preds = %620
  %622 = load i32, ptr %8, align 4, !tbaa !5
  %623 = add nsw i32 %622, 1
  store i32 %623, ptr %8, align 4, !tbaa !5
  br label %85, !llvm.loop !12

624:                                              ; preds = %236, %217, %198, %91
  br label %625

625:                                              ; preds = %624
  %626 = load i32, ptr %7, align 4, !tbaa !5
  %627 = add nsw i32 %626, 1
  store i32 %627, ptr %7, align 4, !tbaa !5
  br label %11, !llvm.loop !13

628:                                              ; preds = %83, %17
  %629 = load i32, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %2) #3
  ret i32 %629
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.main.defaults = external hidden unnamed_addr constant [4 x i32], align 16
@__const.main.trans = external hidden unnamed_addr constant [8 x i8], align 1
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local range(i32 0, 2) i32 @main() local_unnamed_addr #0 {
  %1 = load i8, ptr @.str, align 1
  %2 = icmp eq i8 %1, 116
  %3 = load i8, ptr @__const.main.trans, align 1
  %4 = icmp eq i8 %3, 110
  %5 = icmp eq i8 %1, %3
  %or.cond117 = select i1 %4, i1 true, i1 %5
  %cond173 = icmp eq i8 %3, 78
  %cond172 = icmp eq i8 %3, 78
  %6 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 1), align 1
  %7 = icmp eq i8 %6, 110
  %8 = icmp eq i8 %1, %6
  %or.cond117.1 = select i1 %7, i1 true, i1 %8
  %cond171 = icmp eq i8 %6, 78
  %cond170 = icmp eq i8 %6, 78
  %9 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 2), align 1
  %10 = icmp eq i8 %9, 110
  %11 = icmp eq i8 %1, %9
  %or.cond117.2 = select i1 %10, i1 true, i1 %11
  %cond169 = icmp eq i8 %9, 78
  %cond168 = icmp eq i8 %9, 78
  %12 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 3), align 1
  %13 = icmp eq i8 %12, 110
  %14 = icmp eq i8 %1, %12
  %or.cond117.3 = select i1 %13, i1 true, i1 %14
  %cond167 = icmp eq i8 %12, 78
  %cond166 = icmp eq i8 %12, 78
  %15 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 4), align 1
  %16 = icmp eq i8 %15, 110
  %17 = icmp eq i8 %1, %15
  %or.cond117.4 = select i1 %16, i1 true, i1 %17
  %cond165 = icmp eq i8 %15, 78
  %cond164 = icmp eq i8 %15, 78
  %18 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 5), align 1
  %19 = icmp eq i8 %18, 110
  %20 = icmp eq i8 %1, %18
  %or.cond117.5 = select i1 %19, i1 true, i1 %20
  %cond163 = icmp eq i8 %18, 78
  %cond162 = icmp eq i8 %18, 78
  %21 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 6), align 1
  %22 = icmp eq i8 %21, 110
  %23 = icmp eq i8 %1, %21
  %or.cond117.6 = select i1 %22, i1 true, i1 %23
  %cond161 = icmp eq i8 %21, 78
  %cond160 = icmp eq i8 %21, 78
  %24 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 7), align 1
  %25 = icmp eq i8 %24, 110
  %26 = icmp eq i8 %1, %24
  %or.cond117.7 = select i1 %25, i1 true, i1 %26
  %cond159 = icmp eq i8 %24, 78
  %cond158 = icmp eq i8 %24, 78
  %27 = load i8, ptr @__const.main.trans, align 1
  %28 = icmp eq i8 %27, 110
  %29 = icmp eq i8 %1, %27
  %or.cond117.us = select i1 %28, i1 true, i1 %29
  %cond148 = icmp eq i8 %27, 78
  %cond147 = icmp eq i8 %27, 78
  %30 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 1), align 1
  %31 = icmp eq i8 %30, 110
  %32 = icmp eq i8 %1, %30
  %or.cond117.us.1 = select i1 %31, i1 true, i1 %32
  %cond146 = icmp eq i8 %30, 78
  %cond145 = icmp eq i8 %30, 78
  %33 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 2), align 1
  %34 = icmp eq i8 %33, 110
  %35 = icmp eq i8 %1, %33
  %or.cond117.us.2 = select i1 %34, i1 true, i1 %35
  %cond144 = icmp eq i8 %33, 78
  %cond143 = icmp eq i8 %33, 78
  %36 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 3), align 1
  %37 = icmp eq i8 %36, 110
  %38 = icmp eq i8 %1, %36
  %or.cond117.us.3 = select i1 %37, i1 true, i1 %38
  %cond142 = icmp eq i8 %36, 78
  %cond141 = icmp eq i8 %36, 78
  %39 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 4), align 1
  %40 = icmp eq i8 %39, 110
  %41 = icmp eq i8 %1, %39
  %or.cond117.us.4 = select i1 %40, i1 true, i1 %41
  %cond140 = icmp eq i8 %39, 78
  %cond139 = icmp eq i8 %39, 78
  %42 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 5), align 1
  %43 = icmp eq i8 %42, 110
  %44 = icmp eq i8 %1, %42
  %or.cond117.us.5 = select i1 %43, i1 true, i1 %44
  %cond138 = icmp eq i8 %42, 78
  %cond137 = icmp eq i8 %42, 78
  %45 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 6), align 1
  %46 = icmp eq i8 %45, 110
  %47 = icmp eq i8 %1, %45
  %or.cond117.us.6 = select i1 %46, i1 true, i1 %47
  %cond136 = icmp eq i8 %45, 78
  %cond135 = icmp eq i8 %45, 78
  %48 = load i8, ptr getelementptr inbounds (i8, ptr @__const.main.trans, i64 7), align 1
  %49 = icmp eq i8 %48, 110
  %50 = icmp eq i8 %1, %48
  %or.cond117.us.7 = select i1 %49, i1 true, i1 %50
  %cond134 = icmp eq i8 %48, 78
  %cond = icmp eq i8 %48, 78
  br label %51

51:                                               ; preds = %0, %103
  %indvars.iv127 = phi i64 [ 0, %0 ], [ %indvars.iv.next128, %103 ]
  %52 = getelementptr inbounds [4 x i32], ptr @__const.main.defaults, i64 0, i64 %indvars.iv127
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = and i32 %53, 1
  %55 = icmp eq i32 %54, 0
  %56 = select i1 %55, i1 true, i1 %2
  %not. = xor i1 %56, true
  %57 = zext i1 %not. to i32
  %58 = and i32 %53, 2
  %59 = icmp eq i32 %58, 0
  %60 = select i1 %59, i1 true, i1 %2
  %61 = select i1 %60, i32 0, i32 2
  %62 = and i32 %53, -4
  %63 = or disjoint i32 %62, %57
  %64 = or disjoint i32 %63, %61
  %.not = icmp eq i32 %53, %64
  br i1 %.not, label %.preheader, label %.thread

.preheader:                                       ; preds = %51, %.split.us
  %indvars.iv = phi i64 [ %indvars.iv.next, %.split.us ], [ 0, %51 ]
  %65 = getelementptr inbounds i8, ptr @__const.main.trans, i64 %indvars.iv
  %66 = load i8, ptr %65, align 1, !tbaa !9
  %67 = icmp eq i8 %66, 110
  %68 = icmp eq i8 %1, %66
  %or.cond = select i1 %67, i1 true, i1 %68
  br i1 %or.cond, label %.critedge, label %69

69:                                               ; preds = %.preheader
  %cond149 = icmp eq i8 %66, 78
  br i1 %cond149, label %.thread, label %.critedge103.split.preheader

.critedge:                                        ; preds = %.preheader
  switch i8 %66, label %.critedge103.split.us.preheader [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge103.split.preheader:                     ; preds = %69
  br i1 %or.cond117, label %.critedge105, label %86

.critedge103.split.us.preheader:                  ; preds = %.critedge
  br i1 %or.cond117.us, label %.critedge105.us, label %70

70:                                               ; preds = %.critedge103.split.us.preheader
  br i1 %cond148, label %.thread, label %.critedge107.us

.critedge105.us:                                  ; preds = %.critedge103.split.us.preheader
  switch i8 %27, label %.critedge107.us [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us:                                  ; preds = %70, %.critedge105.us
  switch i8 %66, label %.critedge111.us [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us:                                  ; preds = %.critedge107.us
  br i1 %or.cond117.us, label %.critedge113.us, label %71

71:                                               ; preds = %.critedge111.us
  br i1 %cond147, label %.thread, label %.critedge115.us

.critedge113.us:                                  ; preds = %.critedge111.us
  switch i8 %27, label %.critedge115.us [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us:                                  ; preds = %71, %.critedge113.us
  br i1 %or.cond117.us.1, label %.critedge105.us.1, label %72

72:                                               ; preds = %.critedge115.us
  br i1 %cond146, label %.thread, label %.critedge107.us.1

.critedge105.us.1:                                ; preds = %.critedge115.us
  switch i8 %30, label %.critedge107.us.1 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.1:                                ; preds = %72, %.critedge105.us.1
  switch i8 %66, label %.critedge111.us.1 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.1:                                ; preds = %.critedge107.us.1
  br i1 %or.cond117.us.1, label %.critedge113.us.1, label %73

73:                                               ; preds = %.critedge111.us.1
  br i1 %cond145, label %.thread, label %.critedge115.us.1

.critedge113.us.1:                                ; preds = %.critedge111.us.1
  switch i8 %30, label %.critedge115.us.1 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.1:                                ; preds = %73, %.critedge113.us.1
  br i1 %or.cond117.us.2, label %.critedge105.us.2, label %74

74:                                               ; preds = %.critedge115.us.1
  br i1 %cond144, label %.thread, label %.critedge107.us.2

.critedge105.us.2:                                ; preds = %.critedge115.us.1
  switch i8 %33, label %.critedge107.us.2 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.2:                                ; preds = %74, %.critedge105.us.2
  switch i8 %66, label %.critedge111.us.2 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.2:                                ; preds = %.critedge107.us.2
  br i1 %or.cond117.us.2, label %.critedge113.us.2, label %75

75:                                               ; preds = %.critedge111.us.2
  br i1 %cond143, label %.thread, label %.critedge115.us.2

.critedge113.us.2:                                ; preds = %.critedge111.us.2
  switch i8 %33, label %.critedge115.us.2 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.2:                                ; preds = %75, %.critedge113.us.2
  br i1 %or.cond117.us.3, label %.critedge105.us.3, label %76

76:                                               ; preds = %.critedge115.us.2
  br i1 %cond142, label %.thread, label %.critedge107.us.3

.critedge105.us.3:                                ; preds = %.critedge115.us.2
  switch i8 %36, label %.critedge107.us.3 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.3:                                ; preds = %76, %.critedge105.us.3
  switch i8 %66, label %.critedge111.us.3 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.3:                                ; preds = %.critedge107.us.3
  br i1 %or.cond117.us.3, label %.critedge113.us.3, label %77

77:                                               ; preds = %.critedge111.us.3
  br i1 %cond141, label %.thread, label %.critedge115.us.3

.critedge113.us.3:                                ; preds = %.critedge111.us.3
  switch i8 %36, label %.critedge115.us.3 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.3:                                ; preds = %77, %.critedge113.us.3
  br i1 %or.cond117.us.4, label %.critedge105.us.4, label %78

78:                                               ; preds = %.critedge115.us.3
  br i1 %cond140, label %.thread, label %.critedge107.us.4

.critedge105.us.4:                                ; preds = %.critedge115.us.3
  switch i8 %39, label %.critedge107.us.4 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.4:                                ; preds = %78, %.critedge105.us.4
  switch i8 %66, label %.critedge111.us.4 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.4:                                ; preds = %.critedge107.us.4
  br i1 %or.cond117.us.4, label %.critedge113.us.4, label %79

79:                                               ; preds = %.critedge111.us.4
  br i1 %cond139, label %.thread, label %.critedge115.us.4

.critedge113.us.4:                                ; preds = %.critedge111.us.4
  switch i8 %39, label %.critedge115.us.4 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.4:                                ; preds = %79, %.critedge113.us.4
  br i1 %or.cond117.us.5, label %.critedge105.us.5, label %80

80:                                               ; preds = %.critedge115.us.4
  br i1 %cond138, label %.thread, label %.critedge107.us.5

.critedge105.us.5:                                ; preds = %.critedge115.us.4
  switch i8 %42, label %.critedge107.us.5 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.5:                                ; preds = %80, %.critedge105.us.5
  switch i8 %66, label %.critedge111.us.5 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.5:                                ; preds = %.critedge107.us.5
  br i1 %or.cond117.us.5, label %.critedge113.us.5, label %81

81:                                               ; preds = %.critedge111.us.5
  br i1 %cond137, label %.thread, label %.critedge115.us.5

.critedge113.us.5:                                ; preds = %.critedge111.us.5
  switch i8 %42, label %.critedge115.us.5 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.5:                                ; preds = %81, %.critedge113.us.5
  br i1 %or.cond117.us.6, label %.critedge105.us.6, label %82

82:                                               ; preds = %.critedge115.us.5
  br i1 %cond136, label %.thread, label %.critedge107.us.6

.critedge105.us.6:                                ; preds = %.critedge115.us.5
  switch i8 %45, label %.critedge107.us.6 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.6:                                ; preds = %82, %.critedge105.us.6
  switch i8 %66, label %.critedge111.us.6 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.6:                                ; preds = %.critedge107.us.6
  br i1 %or.cond117.us.6, label %.critedge113.us.6, label %83

83:                                               ; preds = %.critedge111.us.6
  br i1 %cond135, label %.thread, label %.critedge115.us.6

.critedge113.us.6:                                ; preds = %.critedge111.us.6
  switch i8 %45, label %.critedge115.us.6 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.us.6:                                ; preds = %83, %.critedge113.us.6
  br i1 %or.cond117.us.7, label %.critedge105.us.7, label %84

84:                                               ; preds = %.critedge115.us.6
  br i1 %cond134, label %.thread, label %.critedge107.us.7

.critedge105.us.7:                                ; preds = %.critedge115.us.6
  switch i8 %48, label %.critedge107.us.7 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge107.us.7:                                ; preds = %84, %.critedge105.us.7
  switch i8 %66, label %.critedge111.us.7 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
  ]

.critedge111.us.7:                                ; preds = %.critedge107.us.7
  br i1 %or.cond117.us.7, label %.critedge113.us.7, label %85

85:                                               ; preds = %.critedge111.us.7
  br i1 %cond, label %.thread, label %.split.us

.critedge113.us.7:                                ; preds = %.critedge111.us.7
  switch i8 %48, label %.split.us [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

86:                                               ; preds = %.critedge103.split.preheader
  br i1 %cond173, label %.thread, label %.critedge111

.critedge105:                                     ; preds = %.critedge103.split.preheader
  switch i8 %3, label %.critedge111 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111:                                     ; preds = %.critedge105, %86
  br i1 %or.cond117, label %.critedge113, label %87

87:                                               ; preds = %.critedge111
  br i1 %cond172, label %.thread, label %.critedge115

.critedge113:                                     ; preds = %.critedge111
  switch i8 %3, label %.critedge115 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115:                                     ; preds = %87, %.critedge113
  br i1 %or.cond117.1, label %.critedge105.1, label %88

88:                                               ; preds = %.critedge115
  br i1 %cond171, label %.thread, label %.critedge111.1

.critedge105.1:                                   ; preds = %.critedge115
  switch i8 %6, label %.critedge111.1 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.1:                                   ; preds = %.critedge105.1, %88
  br i1 %or.cond117.1, label %.critedge113.1, label %89

89:                                               ; preds = %.critedge111.1
  br i1 %cond170, label %.thread, label %.critedge115.1

.critedge113.1:                                   ; preds = %.critedge111.1
  switch i8 %6, label %.critedge115.1 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.1:                                   ; preds = %89, %.critedge113.1
  br i1 %or.cond117.2, label %.critedge105.2, label %90

90:                                               ; preds = %.critedge115.1
  br i1 %cond169, label %.thread, label %.critedge111.2

.critedge105.2:                                   ; preds = %.critedge115.1
  switch i8 %9, label %.critedge111.2 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.2:                                   ; preds = %.critedge105.2, %90
  br i1 %or.cond117.2, label %.critedge113.2, label %91

91:                                               ; preds = %.critedge111.2
  br i1 %cond168, label %.thread, label %.critedge115.2

.critedge113.2:                                   ; preds = %.critedge111.2
  switch i8 %9, label %.critedge115.2 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.2:                                   ; preds = %91, %.critedge113.2
  br i1 %or.cond117.3, label %.critedge105.3, label %92

92:                                               ; preds = %.critedge115.2
  br i1 %cond167, label %.thread, label %.critedge111.3

.critedge105.3:                                   ; preds = %.critedge115.2
  switch i8 %12, label %.critedge111.3 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.3:                                   ; preds = %.critedge105.3, %92
  br i1 %or.cond117.3, label %.critedge113.3, label %93

93:                                               ; preds = %.critedge111.3
  br i1 %cond166, label %.thread, label %.critedge115.3

.critedge113.3:                                   ; preds = %.critedge111.3
  switch i8 %12, label %.critedge115.3 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.3:                                   ; preds = %93, %.critedge113.3
  br i1 %or.cond117.4, label %.critedge105.4, label %94

94:                                               ; preds = %.critedge115.3
  br i1 %cond165, label %.thread, label %.critedge111.4

.critedge105.4:                                   ; preds = %.critedge115.3
  switch i8 %15, label %.critedge111.4 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.4:                                   ; preds = %.critedge105.4, %94
  br i1 %or.cond117.4, label %.critedge113.4, label %95

95:                                               ; preds = %.critedge111.4
  br i1 %cond164, label %.thread, label %.critedge115.4

.critedge113.4:                                   ; preds = %.critedge111.4
  switch i8 %15, label %.critedge115.4 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.4:                                   ; preds = %95, %.critedge113.4
  br i1 %or.cond117.5, label %.critedge105.5, label %96

96:                                               ; preds = %.critedge115.4
  br i1 %cond163, label %.thread, label %.critedge111.5

.critedge105.5:                                   ; preds = %.critedge115.4
  switch i8 %18, label %.critedge111.5 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.5:                                   ; preds = %.critedge105.5, %96
  br i1 %or.cond117.5, label %.critedge113.5, label %97

97:                                               ; preds = %.critedge111.5
  br i1 %cond162, label %.thread, label %.critedge115.5

.critedge113.5:                                   ; preds = %.critedge111.5
  switch i8 %18, label %.critedge115.5 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.5:                                   ; preds = %97, %.critedge113.5
  br i1 %or.cond117.6, label %.critedge105.6, label %98

98:                                               ; preds = %.critedge115.5
  br i1 %cond161, label %.thread, label %.critedge111.6

.critedge105.6:                                   ; preds = %.critedge115.5
  switch i8 %21, label %.critedge111.6 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.6:                                   ; preds = %.critedge105.6, %98
  br i1 %or.cond117.6, label %.critedge113.6, label %99

99:                                               ; preds = %.critedge111.6
  br i1 %cond160, label %.thread, label %.critedge115.6

.critedge113.6:                                   ; preds = %.critedge111.6
  switch i8 %21, label %.critedge115.6 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge115.6:                                   ; preds = %99, %.critedge113.6
  br i1 %or.cond117.7, label %.critedge105.7, label %100

100:                                              ; preds = %.critedge115.6
  br i1 %cond159, label %.thread, label %.critedge111.7

.critedge105.7:                                   ; preds = %.critedge115.6
  switch i8 %24, label %.critedge111.7 [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.critedge111.7:                                   ; preds = %.critedge105.7, %100
  br i1 %or.cond117.7, label %.critedge113.7, label %101

101:                                              ; preds = %.critedge111.7
  br i1 %cond158, label %.thread, label %.split.us

.critedge113.7:                                   ; preds = %.critedge111.7
  switch i8 %24, label %.split.us [
    i8 84, label %.thread
    i8 116, label %.thread
    i8 67, label %.thread
    i8 99, label %.thread
  ]

.split.us:                                        ; preds = %101, %85, %.critedge113.7, %.critedge113.us.7
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %102 = icmp ult i64 %indvars.iv, 7
  br i1 %102, label %.preheader, label %103, !llvm.loop !10

103:                                              ; preds = %.split.us
  %indvars.iv.next128 = add nuw nsw i64 %indvars.iv127, 1
  %104 = icmp ult i64 %indvars.iv127, 3
  br i1 %104, label %51, label %.thread, !llvm.loop !12

.thread:                                          ; preds = %51, %103, %86, %87, %88, %89, %90, %91, %92, %93, %94, %95, %96, %97, %98, %99, %100, %101, %69, %70, %71, %72, %73, %74, %75, %76, %77, %78, %79, %80, %81, %82, %83, %84, %85, %.critedge113.7, %.critedge113.7, %.critedge113.7, %.critedge113.7, %.critedge105.7, %.critedge105.7, %.critedge105.7, %.critedge105.7, %.critedge113.6, %.critedge113.6, %.critedge113.6, %.critedge113.6, %.critedge105.6, %.critedge105.6, %.critedge105.6, %.critedge105.6, %.critedge113.5, %.critedge113.5, %.critedge113.5, %.critedge113.5, %.critedge105.5, %.critedge105.5, %.critedge105.5, %.critedge105.5, %.critedge113.4, %.critedge113.4, %.critedge113.4, %.critedge113.4, %.critedge105.4, %.critedge105.4, %.critedge105.4, %.critedge105.4, %.critedge113.3, %.critedge113.3, %.critedge113.3, %.critedge113.3, %.critedge105.3, %.critedge105.3, %.critedge105.3, %.critedge105.3, %.critedge113.2, %.critedge113.2, %.critedge113.2, %.critedge113.2, %.critedge105.2, %.critedge105.2, %.critedge105.2, %.critedge105.2, %.critedge113.1, %.critedge113.1, %.critedge113.1, %.critedge113.1, %.critedge105.1, %.critedge105.1, %.critedge105.1, %.critedge105.1, %.critedge105, %.critedge105, %.critedge105, %.critedge105, %.critedge113, %.critedge113, %.critedge113, %.critedge113, %.critedge113.us.7, %.critedge113.us.7, %.critedge113.us.7, %.critedge113.us.7, %.critedge107.us.7, %.critedge107.us.7, %.critedge107.us.7, %.critedge105.us.7, %.critedge105.us.7, %.critedge105.us.7, %.critedge105.us.7, %.critedge113.us.6, %.critedge113.us.6, %.critedge113.us.6, %.critedge113.us.6, %.critedge107.us.6, %.critedge107.us.6, %.critedge107.us.6, %.critedge105.us.6, %.critedge105.us.6, %.critedge105.us.6, %.critedge105.us.6, %.critedge113.us.5, %.critedge113.us.5, %.critedge113.us.5, %.critedge113.us.5, %.critedge107.us.5, %.critedge107.us.5, %.critedge107.us.5, %.critedge105.us.5, %.critedge105.us.5, %.critedge105.us.5, %.critedge105.us.5, %.critedge113.us.4, %.critedge113.us.4, %.critedge113.us.4, %.critedge113.us.4, %.critedge107.us.4, %.critedge107.us.4, %.critedge107.us.4, %.critedge105.us.4, %.critedge105.us.4, %.critedge105.us.4, %.critedge105.us.4, %.critedge113.us.3, %.critedge113.us.3, %.critedge113.us.3, %.critedge113.us.3, %.critedge107.us.3, %.critedge107.us.3, %.critedge107.us.3, %.critedge105.us.3, %.critedge105.us.3, %.critedge105.us.3, %.critedge105.us.3, %.critedge113.us.2, %.critedge113.us.2, %.critedge113.us.2, %.critedge113.us.2, %.critedge107.us.2, %.critedge107.us.2, %.critedge107.us.2, %.critedge105.us.2, %.critedge105.us.2, %.critedge105.us.2, %.critedge105.us.2, %.critedge113.us.1, %.critedge113.us.1, %.critedge113.us.1, %.critedge113.us.1, %.critedge107.us.1, %.critedge107.us.1, %.critedge107.us.1, %.critedge105.us.1, %.critedge105.us.1, %.critedge105.us.1, %.critedge105.us.1, %.critedge105.us, %.critedge105.us, %.critedge105.us, %.critedge105.us, %.critedge107.us, %.critedge107.us, %.critedge107.us, %.critedge113.us, %.critedge113.us, %.critedge113.us, %.critedge113.us, %.critedge, %.critedge, %.critedge, %.critedge
  %.4 = phi i32 [ 1, %.critedge ], [ 1, %.critedge ], [ 1, %.critedge ], [ 1, %.critedge ], [ 1, %.critedge113.us ], [ 1, %.critedge113.us ], [ 1, %.critedge113.us ], [ 1, %.critedge113.us ], [ 1, %.critedge107.us ], [ 1, %.critedge107.us ], [ 1, %.critedge107.us ], [ 1, %.critedge105.us ], [ 1, %.critedge105.us ], [ 1, %.critedge105.us ], [ 1, %.critedge105.us ], [ 1, %.critedge105.us.1 ], [ 1, %.critedge105.us.1 ], [ 1, %.critedge105.us.1 ], [ 1, %.critedge105.us.1 ], [ 1, %.critedge107.us.1 ], [ 1, %.critedge107.us.1 ], [ 1, %.critedge107.us.1 ], [ 1, %.critedge113.us.1 ], [ 1, %.critedge113.us.1 ], [ 1, %.critedge113.us.1 ], [ 1, %.critedge113.us.1 ], [ 1, %.critedge105.us.2 ], [ 1, %.critedge105.us.2 ], [ 1, %.critedge105.us.2 ], [ 1, %.critedge105.us.2 ], [ 1, %.critedge107.us.2 ], [ 1, %.critedge107.us.2 ], [ 1, %.critedge107.us.2 ], [ 1, %.critedge113.us.2 ], [ 1, %.critedge113.us.2 ], [ 1, %.critedge113.us.2 ], [ 1, %.critedge113.us.2 ], [ 1, %.critedge105.us.3 ], [ 1, %.critedge105.us.3 ], [ 1, %.critedge105.us.3 ], [ 1, %.critedge105.us.3 ], [ 1, %.critedge107.us.3 ], [ 1, %.critedge107.us.3 ], [ 1, %.critedge107.us.3 ], [ 1, %.critedge113.us.3 ], [ 1, %.critedge113.us.3 ], [ 1, %.critedge113.us.3 ], [ 1, %.critedge113.us.3 ], [ 1, %.critedge105.us.4 ], [ 1, %.critedge105.us.4 ], [ 1, %.critedge105.us.4 ], [ 1, %.critedge105.us.4 ], [ 1, %.critedge107.us.4 ], [ 1, %.critedge107.us.4 ], [ 1, %.critedge107.us.4 ], [ 1, %.critedge113.us.4 ], [ 1, %.critedge113.us.4 ], [ 1, %.critedge113.us.4 ], [ 1, %.critedge113.us.4 ], [ 1, %.critedge105.us.5 ], [ 1, %.critedge105.us.5 ], [ 1, %.critedge105.us.5 ], [ 1, %.critedge105.us.5 ], [ 1, %.critedge107.us.5 ], [ 1, %.critedge107.us.5 ], [ 1, %.critedge107.us.5 ], [ 1, %.critedge113.us.5 ], [ 1, %.critedge113.us.5 ], [ 1, %.critedge113.us.5 ], [ 1, %.critedge113.us.5 ], [ 1, %.critedge105.us.6 ], [ 1, %.critedge105.us.6 ], [ 1, %.critedge105.us.6 ], [ 1, %.critedge105.us.6 ], [ 1, %.critedge107.us.6 ], [ 1, %.critedge107.us.6 ], [ 1, %.critedge107.us.6 ], [ 1, %.critedge113.us.6 ], [ 1, %.critedge113.us.6 ], [ 1, %.critedge113.us.6 ], [ 1, %.critedge113.us.6 ], [ 1, %.critedge105.us.7 ], [ 1, %.critedge105.us.7 ], [ 1, %.critedge105.us.7 ], [ 1, %.critedge105.us.7 ], [ 1, %.critedge107.us.7 ], [ 1, %.critedge107.us.7 ], [ 1, %.critedge107.us.7 ], [ 1, %.critedge113.us.7 ], [ 1, %.critedge113.us.7 ], [ 1, %.critedge113.us.7 ], [ 1, %.critedge113.us.7 ], [ 1, %.critedge113 ], [ 1, %.critedge113 ], [ 1, %.critedge113 ], [ 1, %.critedge113 ], [ 1, %.critedge105 ], [ 1, %.critedge105 ], [ 1, %.critedge105 ], [ 1, %.critedge105 ], [ 1, %.critedge105.1 ], [ 1, %.critedge105.1 ], [ 1, %.critedge105.1 ], [ 1, %.critedge105.1 ], [ 1, %.critedge113.1 ], [ 1, %.critedge113.1 ], [ 1, %.critedge113.1 ], [ 1, %.critedge113.1 ], [ 1, %.critedge105.2 ], [ 1, %.critedge105.2 ], [ 1, %.critedge105.2 ], [ 1, %.critedge105.2 ], [ 1, %.critedge113.2 ], [ 1, %.critedge113.2 ], [ 1, %.critedge113.2 ], [ 1, %.critedge113.2 ], [ 1, %.critedge105.3 ], [ 1, %.critedge105.3 ], [ 1, %.critedge105.3 ], [ 1, %.critedge105.3 ], [ 1, %.critedge113.3 ], [ 1, %.critedge113.3 ], [ 1, %.critedge113.3 ], [ 1, %.critedge113.3 ], [ 1, %.critedge105.4 ], [ 1, %.critedge105.4 ], [ 1, %.critedge105.4 ], [ 1, %.critedge105.4 ], [ 1, %.critedge113.4 ], [ 1, %.critedge113.4 ], [ 1, %.critedge113.4 ], [ 1, %.critedge113.4 ], [ 1, %.critedge105.5 ], [ 1, %.critedge105.5 ], [ 1, %.critedge105.5 ], [ 1, %.critedge105.5 ], [ 1, %.critedge113.5 ], [ 1, %.critedge113.5 ], [ 1, %.critedge113.5 ], [ 1, %.critedge113.5 ], [ 1, %.critedge105.6 ], [ 1, %.critedge105.6 ], [ 1, %.critedge105.6 ], [ 1, %.critedge105.6 ], [ 1, %.critedge113.6 ], [ 1, %.critedge113.6 ], [ 1, %.critedge113.6 ], [ 1, %.critedge113.6 ], [ 1, %.critedge105.7 ], [ 1, %.critedge105.7 ], [ 1, %.critedge105.7 ], [ 1, %.critedge105.7 ], [ 1, %.critedge113.7 ], [ 1, %.critedge113.7 ], [ 1, %.critedge113.7 ], [ 1, %.critedge113.7 ], [ 1, %85 ], [ 1, %84 ], [ 1, %83 ], [ 1, %82 ], [ 1, %81 ], [ 1, %80 ], [ 1, %79 ], [ 1, %78 ], [ 1, %77 ], [ 1, %76 ], [ 1, %75 ], [ 1, %74 ], [ 1, %73 ], [ 1, %72 ], [ 1, %71 ], [ 1, %70 ], [ 1, %69 ], [ 1, %101 ], [ 1, %100 ], [ 1, %99 ], [ 1, %98 ], [ 1, %97 ], [ 1, %96 ], [ 1, %95 ], [ 1, %94 ], [ 1, %93 ], [ 1, %92 ], [ 1, %91 ], [ 1, %90 ], [ 1, %89 ], [ 1, %88 ], [ 1, %87 ], [ 1, %86 ], [ 1, %51 ], [ 0, %103 ]
  ret i32 %.4
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass