; LLVM IR from libxsmm/libxsmm :: src (generator_mateltwise_unary_binary_aarch64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [97 x i8], align 1
@libxsmm_ninit = external global i32, align 4
@libxsmm_verbosity = external global i32, align 4
@__func__.libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve = external hidden unnamed_addr constant [67 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) #1

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6, i8 noundef zeroext %7, i8 noundef zeroext %8, i8 noundef zeroext %9, ptr noundef %10) #2 {
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i8, align 1
  %17 = alloca i8, align 1
  %18 = alloca i8, align 1
  %19 = alloca i8, align 1
  %20 = alloca i8, align 1
  %21 = alloca i8, align 1
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i8, align 1
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store i32 %1, ptr %13, align 4, !tbaa !9
  store i32 %2, ptr %14, align 4, !tbaa !9
  store i32 %3, ptr %15, align 4, !tbaa !9
  store i8 %4, ptr %16, align 1, !tbaa !11
  store i8 %5, ptr %17, align 1, !tbaa !11
  store i8 %6, ptr %18, align 1, !tbaa !11
  store i8 %7, ptr %19, align 1, !tbaa !11
  store i8 %8, ptr %20, align 1, !tbaa !11
  store i8 %9, ptr %21, align 1, !tbaa !11
  store ptr %10, ptr %22, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %33 = load ptr, ptr %12, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %33, i32 0, i32 6
  %35 = load i32, ptr %34, align 4, !tbaa !12
  %36 = call i32 @libxsmm_cpuid_vlen32(i32 noundef %35)
  %37 = mul nsw i32 4, %36
  store i32 %37, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %38 = load i32, ptr %23, align 4, !tbaa !9
  %39 = udiv i32 %38, 8
  store i32 %39, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  %40 = load i32, ptr %24, align 4, !tbaa !9
  %41 = udiv i32 %40, 4
  store i32 %41, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %26) #3
  %42 = load i32, ptr %14, align 4, !tbaa !9
  %43 = and i32 %42, 3
  %44 = trunc i32 %43 to i8
  store i8 %44, ptr %26, align 1, !tbaa !11
  %45 = load ptr, ptr %12, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %45, i32 0, i32 6
  %47 = load i32, ptr %46, align 4, !tbaa !12
  %48 = icmp uge i32 %47, 2301
  br i1 %48, label %49, label %54

49:                                               ; preds = %11
  %50 = load ptr, ptr %12, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %50, i32 0, i32 6
  %52 = load i32, ptr %51, align 4, !tbaa !12
  %53 = icmp ult i32 %52, 2999
  br i1 %53, label %63, label %54

54:                                               ; preds = %49, %11
  %55 = load ptr, ptr %12, align 8, !tbaa !5
  %56 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !9
  %57 = icmp ult i32 1, %56
  br i1 %57, label %58, label %60

58:                                               ; preds = %54
  %59 = load i32, ptr @libxsmm_verbosity, align 4, !tbaa !9
  br label %61

60:                                               ; preds = %54
  br label %61

61:                                               ; preds = %60, %58
  %62 = phi i32 [ %59, %58 ], [ 1, %60 ]
  call void @libxsmm_handle_error(ptr noundef %55, i32 noundef 90005, ptr noundef @__func__.libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve, ptr noundef @.str, i32 noundef 2029, i32 noundef %62)
  store i32 1, ptr %27, align 4
  br label %256

63:                                               ; preds = %49
  %64 = load i8, ptr %26, align 1, !tbaa !11
  %65 = zext i8 %64 to i32
  %66 = icmp eq i32 %65, 3
  br i1 %66, label %72, label %67

67:                                               ; preds = %63
  %68 = load i32, ptr %14, align 4, !tbaa !9
  %69 = load i32, ptr %15, align 4, !tbaa !9
  %70 = sub i32 %69, 1
  %71 = icmp eq i32 %68, %70
  br i1 %71, label %72, label %221

72:                                               ; preds = %67, %63
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  %73 = load i8, ptr %26, align 1, !tbaa !11
  %74 = zext i8 %73 to i32
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #3
  %76 = load i32, ptr %13, align 4, !tbaa !9
  %77 = add i32 %76, 15
  %78 = udiv i32 %77, 16
  %79 = mul i32 %78, 2
  store i32 %79, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #3
  %80 = load i32, ptr %29, align 4, !tbaa !9
  %81 = load ptr, ptr %22, align 8, !tbaa !5
  %82 = getelementptr inbounds i32, ptr %81, i64 0
  %83 = load i32, ptr %82, align 4, !tbaa !9
  %84 = sub i32 %80, %83
  store i32 %84, ptr %30, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #3
  %85 = load i32, ptr %28, align 4, !tbaa !9
  %86 = load i32, ptr %25, align 4, !tbaa !9
  %87 = mul i32 %85, %86
  %88 = load i32, ptr %30, align 4, !tbaa !9
  %89 = icmp ult i32 %87, %88
  br i1 %89, label %90, label %94

90:                                               ; preds = %72
  %91 = load i32, ptr %28, align 4, !tbaa !9
  %92 = load i32, ptr %25, align 4, !tbaa !9
  %93 = mul i32 %91, %92
  br label %96

94:                                               ; preds = %72
  %95 = load i32, ptr %30, align 4, !tbaa !9
  br label %96

96:                                               ; preds = %94, %90
  %97 = phi i32 [ %93, %90 ], [ %95, %94 ]
  store i32 %97, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #3
  %98 = load i32, ptr %24, align 4, !tbaa !9
  %99 = add i32 %98, 15
  %100 = udiv i32 %99, 16
  %101 = mul i32 %100, 16
  store i32 %101, ptr %32, align 4, !tbaa !9
  %102 = load i8, ptr %26, align 1, !tbaa !11
  %103 = zext i8 %102 to i32
  %104 = icmp eq i32 %103, 0
  br i1 %104, label %105, label %120

105:                                              ; preds = %96
  %106 = load ptr, ptr %12, align 8, !tbaa !5
  %107 = load i8, ptr %18, align 1, !tbaa !11
  %108 = zext i8 %107 to i32
  %109 = load i8, ptr %18, align 1, !tbaa !11
  %110 = zext i8 %109 to i32
  %111 = load i8, ptr %19, align 1, !tbaa !11
  %112 = zext i8 %111 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %106, i32 noundef 86001667, i32 noundef %108, i32 noundef %110, i8 noundef zeroext 0, i32 noundef %112, i32 noundef 0, i32 noundef 1)
  %113 = load ptr, ptr %12, align 8, !tbaa !5
  %114 = load i8, ptr %19, align 1, !tbaa !11
  %115 = zext i8 %114 to i32
  %116 = load i8, ptr %19, align 1, !tbaa !11
  %117 = zext i8 %116 to i32
  %118 = load i8, ptr %19, align 1, !tbaa !11
  %119 = zext i8 %118 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %113, i32 noundef 86001667, i32 noundef %115, i32 noundef %117, i8 noundef zeroext 0, i32 noundef %119, i32 noundef 0, i32 noundef 0)
  br label %175

120:                                              ; preds = %96
  %121 = load i8, ptr %26, align 1, !tbaa !11
  %122 = zext i8 %121 to i32
  %123 = icmp eq i32 %122, 1
  br i1 %123, label %124, label %139

124:                                              ; preds = %120
  %125 = load ptr, ptr %12, align 8, !tbaa !5
  %126 = load i8, ptr %19, align 1, !tbaa !11
  %127 = zext i8 %126 to i32
  %128 = load i8, ptr %18, align 1, !tbaa !11
  %129 = zext i8 %128 to i32
  %130 = load i8, ptr %19, align 1, !tbaa !11
  %131 = zext i8 %130 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %125, i32 noundef 86001667, i32 noundef %127, i32 noundef %129, i8 noundef zeroext 0, i32 noundef %131, i32 noundef 0, i32 noundef 1)
  %132 = load ptr, ptr %12, align 8, !tbaa !5
  %133 = load i8, ptr %19, align 1, !tbaa !11
  %134 = zext i8 %133 to i32
  %135 = load i8, ptr %19, align 1, !tbaa !11
  %136 = zext i8 %135 to i32
  %137 = load i8, ptr %19, align 1, !tbaa !11
  %138 = zext i8 %137 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %132, i32 noundef 86001667, i32 noundef %134, i32 noundef %136, i8 noundef zeroext 0, i32 noundef %138, i32 noundef 0, i32 noundef 0)
  br label %174

139:                                              ; preds = %120
  %140 = load i8, ptr %26, align 1, !tbaa !11
  %141 = zext i8 %140 to i32
  %142 = icmp eq i32 %141, 2
  br i1 %142, label %143, label %158

143:                                              ; preds = %139
  %144 = load ptr, ptr %12, align 8, !tbaa !5
  %145 = load i8, ptr %18, align 1, !tbaa !11
  %146 = zext i8 %145 to i32
  %147 = load i8, ptr %18, align 1, !tbaa !11
  %148 = zext i8 %147 to i32
  %149 = load i8, ptr %20, align 1, !tbaa !11
  %150 = zext i8 %149 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %144, i32 noundef 86001667, i32 noundef %146, i32 noundef %148, i8 noundef zeroext 0, i32 noundef %150, i32 noundef 0, i32 noundef 1)
  %151 = load ptr, ptr %12, align 8, !tbaa !5
  %152 = load i8, ptr %19, align 1, !tbaa !11
  %153 = zext i8 %152 to i32
  %154 = load i8, ptr %20, align 1, !tbaa !11
  %155 = zext i8 %154 to i32
  %156 = load i8, ptr %19, align 1, !tbaa !11
  %157 = zext i8 %156 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %151, i32 noundef 86001667, i32 noundef %153, i32 noundef %155, i8 noundef zeroext 0, i32 noundef %157, i32 noundef 0, i32 noundef 0)
  br label %173

158:                                              ; preds = %139
  %159 = load ptr, ptr %12, align 8, !tbaa !5
  %160 = load i8, ptr %20, align 1, !tbaa !11
  %161 = zext i8 %160 to i32
  %162 = load i8, ptr %18, align 1, !tbaa !11
  %163 = zext i8 %162 to i32
  %164 = load i8, ptr %20, align 1, !tbaa !11
  %165 = zext i8 %164 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %159, i32 noundef 86001667, i32 noundef %161, i32 noundef %163, i8 noundef zeroext 0, i32 noundef %165, i32 noundef 0, i32 noundef 1)
  %166 = load ptr, ptr %12, align 8, !tbaa !5
  %167 = load i8, ptr %19, align 1, !tbaa !11
  %168 = zext i8 %167 to i32
  %169 = load i8, ptr %20, align 1, !tbaa !11
  %170 = zext i8 %169 to i32
  %171 = load i8, ptr %19, align 1, !tbaa !11
  %172 = zext i8 %171 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %166, i32 noundef 86001667, i32 noundef %168, i32 noundef %170, i8 noundef zeroext 0, i32 noundef %172, i32 noundef 0, i32 noundef 0)
  br label %173

173:                                              ; preds = %158, %143
  br label %174

174:                                              ; preds = %173, %124
  br label %175

175:                                              ; preds = %174, %105
  %176 = load ptr, ptr %12, align 8, !tbaa !5
  %177 = load i8, ptr %20, align 1, !tbaa !11
  %178 = zext i8 %177 to i32
  %179 = load i32, ptr %31, align 4, !tbaa !9
  %180 = load i8, ptr %21, align 1, !tbaa !11
  %181 = zext i8 %180 to i32
  call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef %176, i32 noundef %178, i32 noundef %179, i32 noundef %181)
  %182 = load ptr, ptr %12, align 8, !tbaa !5
  %183 = load i8, ptr %21, align 1, !tbaa !11
  %184 = zext i8 %183 to i32
  %185 = load i32, ptr %32, align 4, !tbaa !9
  %186 = zext i32 %185 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %182, i32 noundef 4097, i32 noundef 63, i32 noundef %184, i32 noundef 63, i64 noundef %186)
  %187 = load ptr, ptr %12, align 8, !tbaa !5
  %188 = load i8, ptr %19, align 1, !tbaa !11
  %189 = zext i8 %188 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %187, i32 noundef -444596218, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %189, i32 noundef 0)
  %190 = load ptr, ptr %12, align 8, !tbaa !5
  %191 = load i8, ptr %16, align 1, !tbaa !11
  %192 = zext i8 %191 to i32
  %193 = load i8, ptr %20, align 1, !tbaa !11
  %194 = zext i8 %193 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %190, i32 noundef -1543462778, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %192, i32 noundef %194)
  %195 = load ptr, ptr %12, align 8, !tbaa !5
  %196 = load i8, ptr %17, align 1, !tbaa !11
  %197 = zext i8 %196 to i32
  %198 = load i8, ptr %16, align 1, !tbaa !11
  %199 = zext i8 %198 to i32
  %200 = load i8, ptr %20, align 1, !tbaa !11
  %201 = zext i8 %200 to i32
  call void @libxsmm_aarch64_instruction_sve_move(ptr noundef %195, i32 noundef -469704570, i32 noundef %197, i32 noundef 0, i32 noundef 0, i32 noundef %199, i32 noundef %201)
  %202 = load ptr, ptr %12, align 8, !tbaa !5
  %203 = load i8, ptr %21, align 1, !tbaa !11
  %204 = zext i8 %203 to i32
  %205 = load i32, ptr %32, align 4, !tbaa !9
  %206 = zext i32 %205 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %202, i32 noundef 4096, i32 noundef 63, i32 noundef %204, i32 noundef 63, i64 noundef %206)
  %207 = load ptr, ptr %12, align 8, !tbaa !5
  %208 = load i8, ptr %17, align 1, !tbaa !11
  %209 = zext i8 %208 to i32
  %210 = load i8, ptr %21, align 1, !tbaa !11
  %211 = zext i8 %210 to i32
  %212 = load i8, ptr %17, align 1, !tbaa !11
  %213 = zext i8 %212 to i32
  %214 = load i32, ptr %31, align 4, !tbaa !9
  %215 = zext i32 %214 to i64
  call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef %207, i32 noundef 4096, i32 noundef %209, i32 noundef %211, i32 noundef %213, i64 noundef %215)
  %216 = load i32, ptr %31, align 4, !tbaa !9
  %217 = load ptr, ptr %22, align 8, !tbaa !5
  %218 = getelementptr inbounds i32, ptr %217, i64 0
  %219 = load i32, ptr %218, align 4, !tbaa !9
  %220 = add i32 %219, %216
  store i32 %220, ptr %218, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  br label %255

221:                                              ; preds = %67
  %222 = load i8, ptr %26, align 1, !tbaa !11
  %223 = zext i8 %222 to i32
  %224 = icmp eq i32 %223, 0
  br i1 %224, label %225, label %233

225:                                              ; preds = %221
  %226 = load ptr, ptr %12, align 8, !tbaa !5
  %227 = load i8, ptr %18, align 1, !tbaa !11
  %228 = zext i8 %227 to i32
  %229 = load i8, ptr %18, align 1, !tbaa !11
  %230 = zext i8 %229 to i32
  %231 = load i8, ptr %19, align 1, !tbaa !11
  %232 = zext i8 %231 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %226, i32 noundef 629161987, i32 noundef %228, i32 noundef %230, i8 noundef zeroext 0, i32 noundef %232, i32 noundef 0, i32 noundef 0)
  br label %254

233:                                              ; preds = %221
  %234 = load i8, ptr %26, align 1, !tbaa !11
  %235 = zext i8 %234 to i32
  %236 = icmp eq i32 %235, 1
  br i1 %236, label %237, label %245

237:                                              ; preds = %233
  %238 = load ptr, ptr %12, align 8, !tbaa !5
  %239 = load i8, ptr %19, align 1, !tbaa !11
  %240 = zext i8 %239 to i32
  %241 = load i8, ptr %18, align 1, !tbaa !11
  %242 = zext i8 %241 to i32
  %243 = load i8, ptr %19, align 1, !tbaa !11
  %244 = zext i8 %243 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %238, i32 noundef 86001667, i32 noundef %240, i32 noundef %242, i8 noundef zeroext 0, i32 noundef %244, i32 noundef 0, i32 noundef 1)
  br label %253

245:                                              ; preds = %233
  %246 = load ptr, ptr %12, align 8, !tbaa !5
  %247 = load i8, ptr %18, align 1, !tbaa !11
  %248 = zext i8 %247 to i32
  %249 = load i8, ptr %18, align 1, !tbaa !11
  %250 = zext i8 %249 to i32
  %251 = load i8, ptr %20, align 1, !tbaa !11
  %252 = zext i8 %251 to i32
  call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef %246, i32 noundef 629161987, i32 noundef %248, i32 noundef %250, i8 noundef zeroext 0, i32 noundef %252, i32 noundef 0, i32 noundef 0)
  br label %253

253:                                              ; preds = %245, %237
  br label %254

254:                                              ; preds = %253, %225
  br label %255

255:                                              ; preds = %254, %175
  store i32 0, ptr %27, align 4
  br label %256

256:                                              ; preds = %255, %61
  call void @llvm.lifetime.end.p0(i64 1, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  %257 = load i32, ptr %27, align 4
  switch i32 %257, label %259 [
    i32 0, label %258
    i32 1, label %258
  ]

258:                                              ; preds = %256, %256
  ret void

259:                                              ; preds = %256
  unreachable
}

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [97 x i8], align 1
@libxsmm_ninit = external local_unnamed_addr global i32, align 4
@libxsmm_verbosity = external local_unnamed_addr global i32, align 4
@__func__.libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve = external hidden unnamed_addr constant [67 x i8], align 1

declare void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare void @libxsmm_handle_error(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare i32 @libxsmm_cpuid_vlen32(i32 noundef) local_unnamed_addr #0

declare void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_aarch64_instruction_sve_compute(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6, i8 noundef zeroext %7, i8 noundef zeroext %8, i8 noundef zeroext %9, ptr nocapture noundef %10) local_unnamed_addr #1 {
  %12 = getelementptr inbounds i8, ptr %0, i64 28
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = tail call i32 @libxsmm_cpuid_vlen32(i32 noundef %13) #3
  %15 = lshr i32 %14, 1
  %16 = and i32 %15, 536870911
  %17 = lshr i32 %16, 2
  %18 = and i32 %2, 3
  %19 = load i32, ptr %12, align 4, !tbaa !5
  %20 = add i32 %19, -2301
  %or.cond = icmp ult i32 %20, 698
  br i1 %or.cond, label %26, label %21

21:                                               ; preds = %11
  %22 = load i32, ptr @libxsmm_ninit, align 4, !tbaa !11
  %23 = icmp ugt i32 %22, 1
  %24 = load i32, ptr @libxsmm_verbosity, align 4
  %25 = select i1 %23, i32 %24, i32 1
  tail call void @libxsmm_handle_error(ptr noundef nonnull %0, i32 noundef 90005, ptr noundef nonnull @__func__.libxsmm_generator_unary_binary_aarch64_store_bitmask_2bytemult_sve, ptr noundef nonnull @.str, i32 noundef 2029, i32 noundef %25) #3
  br label %74

26:                                               ; preds = %11
  %27 = icmp eq i32 %18, 3
  %28 = add i32 %3, -1
  %29 = icmp eq i32 %28, %2
  %or.cond97 = or i1 %27, %29
  br i1 %or.cond97, label %30, label %64

30:                                               ; preds = %26
  %31 = add nuw nsw i32 %18, 1
  %32 = add i32 %1, 15
  %33 = lshr i32 %32, 3
  %34 = and i32 %33, 536870910
  %35 = load i32, ptr %10, align 4, !tbaa !11
  %36 = sub i32 %34, %35
  %37 = mul nuw nsw i32 %17, %31
  %38 = tail call i32 @llvm.umin.i32(i32 %37, i32 %36)
  %39 = add nuw nsw i32 %16, 15
  %40 = and i32 %39, 1073741808
  switch i32 %18, label %default.unreachable [
    i32 0, label %41
    i32 1, label %44
    i32 2, label %47
    i32 3, label %51
  ]

41:                                               ; preds = %30
  %42 = zext i8 %6 to i32
  %43 = zext i8 %7 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %42, i32 noundef %42, i8 noundef zeroext 0, i32 noundef %43, i32 noundef 0, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %43, i32 noundef %43, i8 noundef zeroext 0, i32 noundef %43, i32 noundef 0, i32 noundef 0) #3
  br label %55

44:                                               ; preds = %30
  %45 = zext i8 %7 to i32
  %46 = zext i8 %6 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %45, i32 noundef %46, i8 noundef zeroext 0, i32 noundef %45, i32 noundef 0, i32 noundef 1) #3
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %45, i32 noundef %45, i8 noundef zeroext 0, i32 noundef %45, i32 noundef 0, i32 noundef 0) #3
  br label %55

47:                                               ; preds = %30
  %48 = zext i8 %6 to i32
  %49 = zext i8 %8 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %48, i32 noundef %48, i8 noundef zeroext 0, i32 noundef %49, i32 noundef 0, i32 noundef 1) #3
  %50 = zext i8 %7 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %50, i32 noundef %49, i8 noundef zeroext 0, i32 noundef %50, i32 noundef 0, i32 noundef 0) #3
  br label %55

default.unreachable:                              ; preds = %30
  unreachable

51:                                               ; preds = %30
  %52 = zext i8 %8 to i32
  %53 = zext i8 %6 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %52, i32 noundef %53, i8 noundef zeroext 0, i32 noundef %52, i32 noundef 0, i32 noundef 1) #3
  %54 = zext i8 %7 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %54, i32 noundef %52, i8 noundef zeroext 0, i32 noundef %54, i32 noundef 0, i32 noundef 0) #3
  br label %55

55:                                               ; preds = %44, %51, %47, %41
  %.pre-phi = phi i32 [ %45, %44 ], [ %54, %51 ], [ %50, %47 ], [ %43, %41 ]
  %56 = zext i8 %8 to i32
  %57 = zext i8 %9 to i32
  tail call void @libxsmm_generator_set_p_register_aarch64_sve(ptr noundef nonnull %0, i32 noundef %56, i32 noundef %38, i32 noundef %57) #3
  %58 = zext nneg i32 %40 to i64
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4097, i32 noundef 63, i32 noundef %57, i32 noundef 63, i64 noundef %58) #3
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -444596218, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %.pre-phi, i32 noundef 0) #3
  %59 = zext i8 %4 to i32
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -1543462778, i32 noundef 63, i32 noundef 0, i32 noundef 0, i32 noundef %59, i32 noundef %56) #3
  %60 = zext i8 %5 to i32
  tail call void @libxsmm_aarch64_instruction_sve_move(ptr noundef nonnull %0, i32 noundef -469704570, i32 noundef %60, i32 noundef 0, i32 noundef 0, i32 noundef %59, i32 noundef %56) #3
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4096, i32 noundef 63, i32 noundef %57, i32 noundef 63, i64 noundef %58) #3
  %61 = zext nneg i32 %38 to i64
  tail call void @libxsmm_aarch64_instruction_alu_compute_imm64(ptr noundef nonnull %0, i32 noundef 4096, i32 noundef %60, i32 noundef %57, i32 noundef %60, i64 noundef %61) #3
  %62 = load i32, ptr %10, align 4, !tbaa !11
  %63 = add i32 %62, %38
  store i32 %63, ptr %10, align 4, !tbaa !11
  br label %74

64:                                               ; preds = %26
  switch i32 %18, label %71 [
    i32 0, label %65
    i32 1, label %68
  ]

65:                                               ; preds = %64
  %66 = zext i8 %6 to i32
  %67 = zext i8 %7 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 629161987, i32 noundef %66, i32 noundef %66, i8 noundef zeroext 0, i32 noundef %67, i32 noundef 0, i32 noundef 0) #3
  br label %74

68:                                               ; preds = %64
  %69 = zext i8 %7 to i32
  %70 = zext i8 %6 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 86001667, i32 noundef %69, i32 noundef %70, i8 noundef zeroext 0, i32 noundef %69, i32 noundef 0, i32 noundef 1) #3
  br label %74

71:                                               ; preds = %64
  %72 = zext i8 %6 to i32
  %73 = zext i8 %8 to i32
  tail call void @libxsmm_aarch64_instruction_sve_compute(ptr noundef nonnull %0, i32 noundef 629161987, i32 noundef %72, i32 noundef %72, i8 noundef zeroext 0, i32 noundef %73, i32 noundef 0, i32 noundef 0) #3
  br label %74

74:                                               ; preds = %55, %68, %71, %65, %21
  ret void
}

declare void @libxsmm_aarch64_instruction_sve_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass