; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_reg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %10, ptr noundef %11)
  %12 = load i32, ptr %8, align 4, !tbaa !9
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %26

14:                                               ; preds = %4
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %22, %14
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = icmp ult i32 %16, 16
  br i1 %17, label %18, label %25

18:                                               ; preds = %15
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %19, i32 noundef %20, i32 noundef 127, i32 noundef %21)
  br label %22

22:                                               ; preds = %18
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = add i32 %23, 1
  store i32 %24, ptr %9, align 4, !tbaa !9
  br label %15, !llvm.loop !11

25:                                               ; preds = %15
  br label %49

26:                                               ; preds = %4
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %34, %26
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = icmp ult i32 %28, 16
  br i1 %29, label %30, label %37

30:                                               ; preds = %27
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %31, i32 noundef %32, i32 noundef %33, i32 noundef 0)
  br label %34

34:                                               ; preds = %30
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = add i32 %35, 1
  store i32 %36, ptr %9, align 4, !tbaa !9
  br label %27, !llvm.loop !13

37:                                               ; preds = %27
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %45, %37
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = icmp ult i32 %39, 16
  br i1 %40, label %41, label %48

41:                                               ; preds = %38
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_alu_reg(ptr noundef %42, i32 noundef %43, i32 noundef 0, i32 noundef %44)
  br label %45

45:                                               ; preds = %41
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = add i32 %46, 1
  store i32 %47, ptr %9, align 4, !tbaa !9
  br label %38, !llvm.loop !14

48:                                               ; preds = %38
  br label %49

49:                                               ; preds = %48, %25
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %50, ptr noundef %51)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_alu_reg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %.preheader19.preheader, label %.loopexit

.preheader19.preheader:                           ; preds = %4
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 0, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 2, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 3, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 4, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 5, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 6, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 8, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 9, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 10, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 11, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 12, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 13, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 14, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef 15, i32 noundef 0) #2
  br label %.loopexit

.loopexit:                                        ; preds = %4, %.preheader19.preheader
  %.sink40 = phi i32 [ 0, %.preheader19.preheader ], [ 127, %4 ]
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 1) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 2) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 3) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 4) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 5) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 6) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 7) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 8) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 9) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 10) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 11) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 12) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 13) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 14) #2
  tail call void @libxsmm_x86_instruction_alu_reg(ptr noundef %1, i32 noundef %2, i32 noundef %.sink40, i32 noundef 15) #2
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_x86_instruction_alu_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass