; LLVM IR from Dragons-Lake/REI :: sources/REI_Integration/3rdParty/nanovg (nanovg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NVGcontext = type { %struct.NVGparams, ptr, i32, i32, float, float, [32 x %struct.NVGstate], i32, ptr, float, float, float, float, ptr, [4 x i32], i32, i32, i32, i32, i32 }
%struct.NVGparams = type { ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.NVGstate = type { %struct.NVGcompositeOperationState, %struct.NVGpaint, %struct.NVGpaint, float, float, i32, i32, float, [6 x float], %struct.NVGscissor, float, float, float, float, i32, i32 }
%struct.NVGcompositeOperationState = type { i32, i32, i32, i32 }
%struct.NVGpaint = type { [6 x float], [2 x float], float, float, %struct.NVGcolor, %struct.NVGcolor, i32 }
%struct.NVGcolor = type { %union.anon }
%union.anon = type { [4 x float] }
%struct.NVGscissor = type { [6 x float], [2 x float] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind uwtable
declare hidden float @nvg__tanf(float noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @nvgLineTo(ptr noundef, float noundef, float noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @nvgArcTo(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5) #2 {
  %7 = alloca ptr, align 8
  %8 = alloca float, align 4
  %9 = alloca float, align 4
  %10 = alloca float, align 4
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca float, align 4
  %14 = alloca float, align 4
  %15 = alloca float, align 4
  %16 = alloca float, align 4
  %17 = alloca float, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca float, align 4
  %22 = alloca float, align 4
  %23 = alloca float, align 4
  %24 = alloca float, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store float %1, ptr %8, align 4, !tbaa !9
  store float %2, ptr %9, align 4, !tbaa !9
  store float %3, ptr %10, align 4, !tbaa !9
  store float %4, ptr %11, align 4, !tbaa !9
  store float %5, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.NVGcontext, ptr %27, i32 0, i32 4
  %29 = load float, ptr %28, align 8, !tbaa !11
  store float %29, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.NVGcontext, ptr %30, i32 0, i32 5
  %32 = load float, ptr %31, align 4, !tbaa !15
  store float %32, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.NVGcontext, ptr %33, i32 0, i32 3
  %35 = load i32, ptr %34, align 4, !tbaa !16
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %6
  store i32 1, ptr %26, align 4
  br label %180

38:                                               ; preds = %6
  %39 = load float, ptr %13, align 4, !tbaa !9
  %40 = load float, ptr %14, align 4, !tbaa !9
  %41 = load float, ptr %8, align 4, !tbaa !9
  %42 = load float, ptr %9, align 4, !tbaa !9
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.NVGcontext, ptr %43, i32 0, i32 10
  %45 = load float, ptr %44, align 4, !tbaa !17
  %46 = call i32 @nvg__ptEquals(float noundef %39, float noundef %40, float noundef %41, float noundef %42, float noundef %45)
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %80, label %48

48:                                               ; preds = %38
  %49 = load float, ptr %8, align 4, !tbaa !9
  %50 = load float, ptr %9, align 4, !tbaa !9
  %51 = load float, ptr %10, align 4, !tbaa !9
  %52 = load float, ptr %11, align 4, !tbaa !9
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.NVGcontext, ptr %53, i32 0, i32 10
  %55 = load float, ptr %54, align 4, !tbaa !17
  %56 = call i32 @nvg__ptEquals(float noundef %49, float noundef %50, float noundef %51, float noundef %52, float noundef %55)
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %80, label %58

58:                                               ; preds = %48
  %59 = load float, ptr %8, align 4, !tbaa !9
  %60 = load float, ptr %9, align 4, !tbaa !9
  %61 = load float, ptr %13, align 4, !tbaa !9
  %62 = load float, ptr %14, align 4, !tbaa !9
  %63 = load float, ptr %10, align 4, !tbaa !9
  %64 = load float, ptr %11, align 4, !tbaa !9
  %65 = call float @nvg__distPtSeg(float noundef %59, float noundef %60, float noundef %61, float noundef %62, float noundef %63, float noundef %64)
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.NVGcontext, ptr %66, i32 0, i32 10
  %68 = load float, ptr %67, align 4, !tbaa !17
  %69 = load ptr, ptr %7, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.NVGcontext, ptr %69, i32 0, i32 10
  %71 = load float, ptr %70, align 4, !tbaa !17
  %72 = fmul float %68, %71
  %73 = fcmp olt float %65, %72
  br i1 %73, label %80, label %74

74:                                               ; preds = %58
  %75 = load float, ptr %12, align 4, !tbaa !9
  %76 = load ptr, ptr %7, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.NVGcontext, ptr %76, i32 0, i32 10
  %78 = load float, ptr %77, align 4, !tbaa !17
  %79 = fcmp olt float %75, %78
  br i1 %79, label %80, label %84

80:                                               ; preds = %74, %58, %48, %38
  %81 = load ptr, ptr %7, align 8, !tbaa !5
  %82 = load float, ptr %8, align 4, !tbaa !9
  %83 = load float, ptr %9, align 4, !tbaa !9
  call void @nvgLineTo(ptr noundef %81, float noundef %82, float noundef %83)
  store i32 1, ptr %26, align 4
  br label %180

84:                                               ; preds = %74
  %85 = load float, ptr %13, align 4, !tbaa !9
  %86 = load float, ptr %8, align 4, !tbaa !9
  %87 = fsub float %85, %86
  store float %87, ptr %15, align 4, !tbaa !9
  %88 = load float, ptr %14, align 4, !tbaa !9
  %89 = load float, ptr %9, align 4, !tbaa !9
  %90 = fsub float %88, %89
  store float %90, ptr %16, align 4, !tbaa !9
  %91 = load float, ptr %10, align 4, !tbaa !9
  %92 = load float, ptr %8, align 4, !tbaa !9
  %93 = fsub float %91, %92
  store float %93, ptr %17, align 4, !tbaa !9
  %94 = load float, ptr %11, align 4, !tbaa !9
  %95 = load float, ptr %9, align 4, !tbaa !9
  %96 = fsub float %94, %95
  store float %96, ptr %18, align 4, !tbaa !9
  %97 = call float @nvg__normalize(ptr noundef %15, ptr noundef %16)
  %98 = call float @nvg__normalize(ptr noundef %17, ptr noundef %18)
  %99 = load float, ptr %15, align 4, !tbaa !9
  %100 = load float, ptr %17, align 4, !tbaa !9
  %101 = load float, ptr %16, align 4, !tbaa !9
  %102 = load float, ptr %18, align 4, !tbaa !9
  %103 = fmul float %101, %102
  %104 = call float @llvm.fmuladd.f32(float %99, float %100, float %103)
  %105 = call float @nvg__acosf(float noundef %104)
  store float %105, ptr %19, align 4, !tbaa !9
  %106 = load float, ptr %12, align 4, !tbaa !9
  %107 = load float, ptr %19, align 4, !tbaa !9
  %108 = fdiv float %107, 2.000000e+00
  %109 = call float @nvg__tanf(float noundef %108)
  %110 = fdiv float %106, %109
  store float %110, ptr %20, align 4, !tbaa !9
  %111 = load float, ptr %20, align 4, !tbaa !9
  %112 = fcmp ogt float %111, 1.000000e+04
  br i1 %112, label %113, label %117

113:                                              ; preds = %84
  %114 = load ptr, ptr %7, align 8, !tbaa !5
  %115 = load float, ptr %8, align 4, !tbaa !9
  %116 = load float, ptr %9, align 4, !tbaa !9
  call void @nvgLineTo(ptr noundef %114, float noundef %115, float noundef %116)
  store i32 1, ptr %26, align 4
  br label %180

117:                                              ; preds = %84
  %118 = load float, ptr %15, align 4, !tbaa !9
  %119 = load float, ptr %16, align 4, !tbaa !9
  %120 = load float, ptr %17, align 4, !tbaa !9
  %121 = load float, ptr %18, align 4, !tbaa !9
  %122 = call float @nvg__cross(float noundef %118, float noundef %119, float noundef %120, float noundef %121)
  %123 = fcmp ogt float %122, 0.000000e+00
  br i1 %123, label %124, label %148

124:                                              ; preds = %117
  %125 = load float, ptr %8, align 4, !tbaa !9
  %126 = load float, ptr %15, align 4, !tbaa !9
  %127 = load float, ptr %20, align 4, !tbaa !9
  %128 = call float @llvm.fmuladd.f32(float %126, float %127, float %125)
  %129 = load float, ptr %16, align 4, !tbaa !9
  %130 = load float, ptr %12, align 4, !tbaa !9
  %131 = call float @llvm.fmuladd.f32(float %129, float %130, float %128)
  store float %131, ptr %21, align 4, !tbaa !9
  %132 = load float, ptr %9, align 4, !tbaa !9
  %133 = load float, ptr %16, align 4, !tbaa !9
  %134 = load float, ptr %20, align 4, !tbaa !9
  %135 = call float @llvm.fmuladd.f32(float %133, float %134, float %132)
  %136 = load float, ptr %15, align 4, !tbaa !9
  %137 = fneg float %136
  %138 = load float, ptr %12, align 4, !tbaa !9
  %139 = call float @llvm.fmuladd.f32(float %137, float %138, float %135)
  store float %139, ptr %22, align 4, !tbaa !9
  %140 = load float, ptr %15, align 4, !tbaa !9
  %141 = load float, ptr %16, align 4, !tbaa !9
  %142 = fneg float %141
  %143 = call float @nvg__atan2f(float noundef %140, float noundef %142)
  store float %143, ptr %23, align 4, !tbaa !9
  %144 = load float, ptr %17, align 4, !tbaa !9
  %145 = fneg float %144
  %146 = load float, ptr %18, align 4, !tbaa !9
  %147 = call float @nvg__atan2f(float noundef %145, float noundef %146)
  store float %147, ptr %24, align 4, !tbaa !9
  store i32 2, ptr %25, align 4, !tbaa !18
  br label %172

148:                                              ; preds = %117
  %149 = load float, ptr %8, align 4, !tbaa !9
  %150 = load float, ptr %15, align 4, !tbaa !9
  %151 = load float, ptr %20, align 4, !tbaa !9
  %152 = call float @llvm.fmuladd.f32(float %150, float %151, float %149)
  %153 = load float, ptr %16, align 4, !tbaa !9
  %154 = fneg float %153
  %155 = load float, ptr %12, align 4, !tbaa !9
  %156 = call float @llvm.fmuladd.f32(float %154, float %155, float %152)
  store float %156, ptr %21, align 4, !tbaa !9
  %157 = load float, ptr %9, align 4, !tbaa !9
  %158 = load float, ptr %16, align 4, !tbaa !9
  %159 = load float, ptr %20, align 4, !tbaa !9
  %160 = call float @llvm.fmuladd.f32(float %158, float %159, float %157)
  %161 = load float, ptr %15, align 4, !tbaa !9
  %162 = load float, ptr %12, align 4, !tbaa !9
  %163 = call float @llvm.fmuladd.f32(float %161, float %162, float %160)
  store float %163, ptr %22, align 4, !tbaa !9
  %164 = load float, ptr %15, align 4, !tbaa !9
  %165 = fneg float %164
  %166 = load float, ptr %16, align 4, !tbaa !9
  %167 = call float @nvg__atan2f(float noundef %165, float noundef %166)
  store float %167, ptr %23, align 4, !tbaa !9
  %168 = load float, ptr %17, align 4, !tbaa !9
  %169 = load float, ptr %18, align 4, !tbaa !9
  %170 = fneg float %169
  %171 = call float @nvg__atan2f(float noundef %168, float noundef %170)
  store float %171, ptr %24, align 4, !tbaa !9
  store i32 1, ptr %25, align 4, !tbaa !18
  br label %172

172:                                              ; preds = %148, %124
  %173 = load ptr, ptr %7, align 8, !tbaa !5
  %174 = load float, ptr %21, align 4, !tbaa !9
  %175 = load float, ptr %22, align 4, !tbaa !9
  %176 = load float, ptr %12, align 4, !tbaa !9
  %177 = load float, ptr %23, align 4, !tbaa !9
  %178 = load float, ptr %24, align 4, !tbaa !9
  %179 = load i32, ptr %25, align 4, !tbaa !18
  call void @nvgArc(ptr noundef %173, float noundef %174, float noundef %175, float noundef %176, float noundef %177, float noundef %178, i32 noundef %179)
  store i32 0, ptr %26, align 4
  br label %180

180:                                              ; preds = %172, %113, %80, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %181 = load i32, ptr %26, align 4
  switch i32 %181, label %183 [
    i32 0, label %182
    i32 1, label %182
  ]

182:                                              ; preds = %180, %180
  ret void

183:                                              ; preds = %180
  unreachable
}

; Function Attrs: nounwind uwtable
declare hidden i32 @nvg__ptEquals(float noundef, float noundef, float noundef, float noundef, float noundef) #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__distPtSeg(float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__normalize(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__acosf(float noundef) #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__cross(float noundef, float noundef, float noundef, float noundef) #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__atan2f(float noundef, float noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @nvgArc(ptr noundef, float noundef, float noundef, float noundef, float noundef, float noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !10, i64 128}
!12 = !{!"NVGcontext", !13, i64 0, !6, i64 112, !14, i64 120, !14, i64 124, !10, i64 128, !10, i64 132, !7, i64 136, !14, i64 8712, !6, i64 8720, !10, i64 8728, !10, i64 8732, !10, i64 8736, !10, i64 8740, !6, i64 8744, !7, i64 8752, !14, i64 8768, !14, i64 8772, !14, i64 8776, !14, i64 8780, !14, i64 8784}
!13 = !{!"NVGparams", !6, i64 0, !14, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !10, i64 132}
!16 = !{!12, !14, i64 124}
!17 = !{!12, !10, i64 8732}
!18 = !{!14, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind uwtable
declare hidden float @nvg__tanf(float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @nvgLineTo(ptr noundef, float noundef, float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @nvgArcTo(ptr noundef %0, float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5) local_unnamed_addr #2 {
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca float, align 4
  %10 = alloca float, align 4
  %11 = getelementptr inbounds i8, ptr %0, i64 128
  %12 = load float, ptr %11, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %0, i64 132
  %14 = load float, ptr %13, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #4
  %15 = getelementptr inbounds i8, ptr %0, i64 124
  %16 = load i32, ptr %15, align 4, !tbaa !14
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %97, label %18

18:                                               ; preds = %6
  %19 = getelementptr inbounds i8, ptr %0, i64 8732
  %20 = load float, ptr %19, align 4, !tbaa !15
  %21 = tail call i32 @nvg__ptEquals(float noundef %12, float noundef %14, float noundef %1, float noundef %2, float noundef %20)
  %.not = icmp eq i32 %21, 0
  br i1 %.not, label %22, label %31

22:                                               ; preds = %18
  %23 = load float, ptr %19, align 4, !tbaa !15
  %24 = tail call i32 @nvg__ptEquals(float noundef %1, float noundef %2, float noundef %3, float noundef %4, float noundef %23)
  %.not64 = icmp eq i32 %24, 0
  br i1 %.not64, label %25, label %31

25:                                               ; preds = %22
  %26 = tail call float @nvg__distPtSeg(float noundef %1, float noundef %2, float noundef %12, float noundef %14, float noundef %3, float noundef %4)
  %27 = load float, ptr %19, align 4, !tbaa !15
  %28 = fmul float %27, %27
  %29 = fcmp olt float %26, %28
  %30 = fcmp ogt float %27, %5
  %or.cond = or i1 %30, %29
  br i1 %or.cond, label %31, label %32

31:                                               ; preds = %25, %22, %18
  tail call void @nvgLineTo(ptr noundef nonnull %0, float noundef %1, float noundef %2)
  br label %97

32:                                               ; preds = %25
  %33 = fsub float %12, %1
  store float %33, ptr %7, align 4, !tbaa !16
  %34 = fsub float %14, %2
  store float %34, ptr %8, align 4, !tbaa !16
  %35 = fsub float %3, %1
  store float %35, ptr %9, align 4, !tbaa !16
  %36 = fsub float %4, %2
  store float %36, ptr %10, align 4, !tbaa !16
  %37 = call float @nvg__normalize(ptr noundef nonnull %7, ptr noundef nonnull %8)
  %38 = call float @nvg__normalize(ptr noundef nonnull %9, ptr noundef nonnull %10)
  %39 = load float, ptr %7, align 4, !tbaa !16
  %40 = load float, ptr %9, align 4, !tbaa !16
  %41 = load float, ptr %8, align 4, !tbaa !16
  %42 = load float, ptr %10, align 4, !tbaa !16
  %43 = fmul float %41, %42
  %44 = call float @llvm.fmuladd.f32(float %39, float %40, float %43)
  %45 = call float @nvg__acosf(float noundef %44)
  %46 = fmul float %45, 5.000000e-01
  %47 = call float @nvg__tanf(float noundef %46)
  %48 = fdiv float %5, %47
  %49 = fcmp ogt float %48, 1.000000e+04
  br i1 %49, label %50, label %51

50:                                               ; preds = %32
  call void @nvgLineTo(ptr noundef nonnull %0, float noundef %1, float noundef %2)
  br label %97

51:                                               ; preds = %32
  %52 = load float, ptr %7, align 4, !tbaa !16
  %53 = load float, ptr %8, align 4, !tbaa !16
  %54 = load float, ptr %9, align 4, !tbaa !16
  %55 = load float, ptr %10, align 4, !tbaa !16
  %56 = call float @nvg__cross(float noundef %52, float noundef %53, float noundef %54, float noundef %55)
  %57 = fcmp ogt float %56, 0.000000e+00
  %58 = load float, ptr %7, align 4, !tbaa !16
  %59 = call float @llvm.fmuladd.f32(float %58, float %48, float %1)
  %60 = load float, ptr %8, align 4, !tbaa !16
  br i1 %57, label %61, label %77

61:                                               ; preds = %51
  %62 = call float @llvm.fmuladd.f32(float %60, float %48, float %2)
  %63 = fneg float %58
  %64 = insertelement <2 x float> poison, float %60, i64 0
  %65 = insertelement <2 x float> %64, float %63, i64 1
  %66 = insertelement <2 x float> poison, float %5, i64 0
  %67 = shufflevector <2 x float> %66, <2 x float> poison, <2 x i32> zeroinitializer
  %68 = insertelement <2 x float> poison, float %59, i64 0
  %69 = insertelement <2 x float> %68, float %62, i64 1
  %70 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %65, <2 x float> %67, <2 x float> %69)
  %71 = fneg float %60
  %72 = call float @nvg__atan2f(float noundef %58, float noundef %71)
  %73 = load float, ptr %9, align 4, !tbaa !16
  %74 = fneg float %73
  %75 = load float, ptr %10, align 4, !tbaa !16
  %76 = call float @nvg__atan2f(float noundef %74, float noundef %75)
  br label %93

77:                                               ; preds = %51
  %78 = fneg float %60
  %79 = call float @llvm.fmuladd.f32(float %60, float %48, float %2)
  %80 = insertelement <2 x float> poison, float %78, i64 0
  %81 = insertelement <2 x float> %80, float %58, i64 1
  %82 = insertelement <2 x float> poison, float %5, i64 0
  %83 = shufflevector <2 x float> %82, <2 x float> poison, <2 x i32> zeroinitializer
  %84 = insertelement <2 x float> poison, float %59, i64 0
  %85 = insertelement <2 x float> %84, float %79, i64 1
  %86 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %81, <2 x float> %83, <2 x float> %85)
  %87 = fneg float %58
  %88 = call float @nvg__atan2f(float noundef %87, float noundef %60)
  %89 = load float, ptr %9, align 4, !tbaa !16
  %90 = load float, ptr %10, align 4, !tbaa !16
  %91 = fneg float %90
  %92 = call float @nvg__atan2f(float noundef %89, float noundef %91)
  br label %93

93:                                               ; preds = %77, %61
  %.059 = phi float [ %72, %61 ], [ %88, %77 ]
  %.058 = phi float [ %76, %61 ], [ %92, %77 ]
  %.0 = phi i32 [ 2, %61 ], [ 1, %77 ]
  %94 = phi <2 x float> [ %70, %61 ], [ %86, %77 ]
  %95 = extractelement <2 x float> %94, i64 0
  %96 = extractelement <2 x float> %94, i64 1
  call void @nvgArc(ptr noundef nonnull %0, float noundef %95, float noundef %96, float noundef %5, float noundef %.059, float noundef %.058, i32 noundef %.0)
  br label %97

97:                                               ; preds = %6, %93, %50, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #4
  ret void
}

; Function Attrs: nounwind uwtable
declare hidden i32 @nvg__ptEquals(float noundef, float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__distPtSeg(float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__normalize(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__acosf(float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__cross(float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden float @nvg__atan2f(float noundef, float noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @nvgArc(ptr noundef, float noundef, float noundef, float noundef, float noundef, float noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 128}
!6 = !{!"NVGcontext", !7, i64 0, !8, i64 112, !11, i64 120, !11, i64 124, !12, i64 128, !12, i64 132, !9, i64 136, !11, i64 8712, !8, i64 8720, !12, i64 8728, !12, i64 8732, !12, i64 8736, !12, i64 8740, !8, i64 8744, !9, i64 8752, !11, i64 8768, !11, i64 8772, !11, i64 8776, !11, i64 8780, !11, i64 8784}
!7 = !{!"NVGparams", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !8, i64 64, !8, i64 72, !8, i64 80, !8, i64 88, !8, i64 96, !8, i64 104}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"float", !9, i64 0}
!13 = !{!6, !12, i64 132}
!14 = !{!6, !11, i64 124}
!15 = !{!6, !12, i64 8732}
!16 = !{!12, !12, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass