; LLVM IR from NVIDIA/DALI :: dali/operators/generic (reshape)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::GPUBackend" = type { i8 }
%"class.dali::TensorLayout" = type { [16 x i8] }
%"class.dali::Reshape.125" = type { %"class.dali::StatelessOperator.126", %"class.std::vector.31", i8, [7 x i8], %"struct.dali::TensorListShape", ptr, %"class.dali::TensorLayout", %"struct.dali::TensorListShape", %"struct.dali::TensorShape", %"class.std::vector.36", i8, i8, i32, i32, i32 }
%"class.dali::StatelessOperator.126" = type { %"class.dali::Operator.127" }
%"class.dali::Operator.127" = type { %"class.dali::OperatorBase" }
%"class.dali::OperatorBase" = type { ptr, %"class.dali::OpSpec", i32, i32, %"class.std::unordered_map" }
%"class.dali::OpSpec" = type { %"class.std::__cxx11::basic_string", ptr, %"class.std::vector.81", %"class.std::map.41", %"class.std::vector.86", %"class.std::map.41", %"class.std::map.91", %"class.std::vector.96", %"class.std::vector.96", %"class.std::map.101" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.81" = type { %"struct.std::_Vector_base.82" }
%"struct.std::_Vector_base.82" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::shared_ptr<dali::Argument>, std::allocator<std::shared_ptr<dali::Argument>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.86" = type { %"struct.std::_Vector_base.87" }
%"struct.std::_Vector_base.87" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<std::__cxx11::basic_string<char>, int>, std::allocator<std::pair<std::__cxx11::basic_string<char>, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.41" = type { %"class.std::_Rb_tree.42" }
%"class.std::_Rb_tree.42" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, int>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::map.91" = type { %"class.std::_Rb_tree.92" }
%"class.std::_Rb_tree.92" = type { %"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::__cxx11::basic_string<char>, std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>, std::_Select1st<std::pair<const std::__cxx11::basic_string<char>, std::__cxx11::basic_string<char>>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::vector.96" = type { %"struct.std::_Vector_base.97" }
%"struct.std::_Vector_base.97" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<dali::OpSpec::InOutDeviceDesc, std::allocator<dali::OpSpec::InOutDeviceDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::map.101" = type { %"class.std::_Rb_tree.102" }
%"class.std::_Rb_tree.102" = type { %"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<dali::OpSpec::InOutDeviceDesc, std::pair<const dali::OpSpec::InOutDeviceDesc, int>, std::_Select1st<std::pair<const dali::OpSpec::InOutDeviceDesc, int>>, std::less<void>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector.31" = type { %"struct.std::_Vector_base.32" }
%"struct.std::_Vector_base.32" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.dali::TensorListShape" = type { %"struct.dali::TensorListShapeBase.base", i32 }
%"struct.dali::TensorListShapeBase.base" = type <{ %"class.std::vector.76", i32 }>
%"class.std::vector.76" = type { %"struct.std::_Vector_base.77" }
%"struct.std::_Vector_base.77" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.dali::TensorShape" = type { %"struct.dali::TensorShapeBase" }
%"struct.dali::TensorShapeBase" = type { %"class.dali::SmallVector.112" }
%"class.dali::SmallVector.112" = type { %union.anon.115, i64 }
%union.anon.115 = type { %struct.anon.116, [32 x i8] }
%struct.anon.116 = type { ptr, i64 }
%"class.std::vector.36" = type { %"struct.std::_Vector_base.37" }
%"struct.std::_Vector_base.37" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.26 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [79 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE = external hidden unnamed_addr constant [96 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali8TypeInfo2idEv(ptr noundef nonnull align 8 dereferenceable(40)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) #2 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.dali::GPUBackend", align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.dali::GPUBackend", align 1
  %9 = alloca %"class.dali::TensorLayout", align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %12 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %13, i32 noundef 0)
  store ptr %14, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %15, i32 noundef 0)
  store ptr %16, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %9) #6
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call { i64, i64 } @_ZNK4dali7ReshapeINS_10GPUBackendEE15GetOutputLayoutERKNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616) %12, ptr noundef nonnull align 8 dereferenceable(664) %17)
  %19 = getelementptr inbounds %"class.dali::TensorLayout", ptr %9, i32 0, i32 0
  %20 = getelementptr inbounds { i64, i64 }, ptr %19, i32 0, i32 0
  %21 = extractvalue { i64, i64 } %18, 0
  store i64 %21, ptr %20, align 1
  %22 = getelementptr inbounds { i64, i64 }, ptr %19, i32 0, i32 1
  %23 = extractvalue { i64, i64 } %18, 1
  store i64 %23, ptr %22, align 1
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN4dali10TensorListINS_10GPUBackendEE5ResetEv(ptr noundef nonnull align 8 dereferenceable(304) %24)
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZN4dali10TensorListINS_10GPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304) %25, ptr noundef nonnull align 8 dereferenceable(304) %26)
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %"class.dali::Reshape.125", ptr %12, i32 0, i32 4
  %29 = getelementptr inbounds %"class.dali::Reshape.125", ptr %12, i32 0, i32 5
  %30 = load ptr, ptr %29, align 8, !tbaa !9
  %31 = call noundef i32 @_ZNK4dali8TypeInfo2idEv(ptr noundef nonnull align 8 dereferenceable(40) %30)
  call void @_ZN4dali10TensorListINS_10GPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304) %27, ptr noundef nonnull align 8 dereferenceable(32) %28, i32 noundef %31, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  %32 = getelementptr inbounds %"class.dali::Reshape.125", ptr %12, i32 0, i32 4
  %33 = call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %32)
  store i32 %33, ptr %10, align 4, !tbaa !71
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  store i32 0, ptr %11, align 4, !tbaa !71
  br label %34

34:                                               ; preds = %51, %2
  %35 = load i32, ptr %11, align 4, !tbaa !71
  %36 = load i32, ptr %10, align 4, !tbaa !71
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  br label %54

39:                                               ; preds = %34
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load i32, ptr %11, align 4, !tbaa !71
  %42 = call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %40, i32 noundef %41)
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i32, ptr %11, align 4, !tbaa !71
  %45 = call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %43, i32 noundef %44)
  %46 = icmp eq ptr %42, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %39
  br label %50

48:                                               ; preds = %39
  call void @__assert_fail(ptr noundef @.str.26, ptr noundef @.str.27, i32 noundef 497, ptr noundef @__PRETTY_FUNCTION__._ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE) #7
  unreachable

49:                                               ; No predecessors!
  br label %50

50:                                               ; preds = %49, %47
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %11, align 4, !tbaa !71
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %11, align 4, !tbaa !71
  br label %34, !llvm.loop !72

54:                                               ; preds = %38
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %55, ptr noundef nonnull align 1 dereferenceable(16) %9)
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { i64, i64 } @_ZNK4dali7ReshapeINS_10GPUBackendEE15GetOutputLayoutERKNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616), ptr noundef nonnull align 8 dereferenceable(664)) #2 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE5ResetEv(ptr noundef nonnull align 8 dereferenceable(304)) #4

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) #4

declare void @_ZN4dali10TensorListINS_10GPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i32 noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) #5 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 464}
!10 = !{!"_ZTSN4dali7ReshapeINS_10GPUBackendEEE", !11, i64 0, !50, i64 400, !54, i64 424, !55, i64 432, !6, i64 464, !61, i64 472, !55, i64 488, !62, i64 520, !65, i64 576, !54, i64 600, !54, i64 601, !44, i64 604, !69, i64 608, !70, i64 612}
!11 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !12, i64 0}
!12 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !13, i64 0}
!13 = !{!"_ZTSN4dali12OperatorBaseE", !14, i64 8, !44, i64 336, !44, i64 340, !45, i64 344}
!14 = !{!"_ZTSN4dali6OpSpecE", !15, i64 0, !6, i64 32, !18, i64 40, !22, i64 64, !30, i64 112, !22, i64 136, !34, i64 184, !37, i64 232, !37, i64 256, !41, i64 280}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !16, i64 0, !17, i64 8, !7, i64 16}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !23, i64 0}
!23 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !24, i64 0}
!24 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!25 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !26, i64 0}
!26 = !{!"_ZTSSt4lessIvE"}
!27 = !{!"_ZTSSt15_Rb_tree_header", !28, i64 0, !17, i64 32}
!28 = !{!"_ZTSSt18_Rb_tree_node_base", !29, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!29 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!30 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!34 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !35, i64 0}
!35 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !36, i64 0}
!36 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !25, i64 0, !27, i64 8}
!37 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !42, i64 0}
!42 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !43, i64 0}
!43 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !25, i64 0, !27, i64 8}
!44 = !{!"int", !7, i64 0}
!45 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !46, i64 0}
!46 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !17, i64 8, !47, i64 16, !17, i64 24, !48, i64 32, !6, i64 48}
!47 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!48 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !49, i64 0, !17, i64 8}
!49 = !{!"float", !7, i64 0}
!50 = !{!"_ZTSSt6vectorIiSaIiEE", !51, i64 0}
!51 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !52, i64 0}
!52 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !53, i64 0}
!53 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!54 = !{!"bool", !7, i64 0}
!55 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !56, i64 0, !44, i64 28}
!56 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !57, i64 0, !44, i64 24}
!57 = !{!"_ZTSSt6vectorIlSaIlEE", !58, i64 0}
!58 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!61 = !{!"_ZTSN4dali12TensorLayoutE", !7, i64 0}
!62 = !{!"_ZTSN4dali11TensorShapeILin1EEE", !63, i64 0}
!63 = !{!"_ZTSN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEE", !64, i64 0}
!64 = !{!"_ZTSN4dali11SmallVectorIlLm6ESaIlEEE", !7, i64 0, !17, i64 48}
!65 = !{!"_ZTSSt6vectorIfSaIfEE", !66, i64 0}
!66 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !67, i64 0}
!67 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !68, i64 0}
!68 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!69 = !{!"_ZTS13_DALIDataType", !7, i64 0}
!70 = !{!"_ZTSN4dali7ReshapeINS_10GPUBackendEE11ShapeSourceE", !7, i64 0}
!71 = !{!44, !44, i64 0}
!72 = distinct !{!72, !73}
!73 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::TensorLayout" = type { [16 x i8] }

@.str.26 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [79 x i8], align 1
@__PRETTY_FUNCTION__._ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE = external hidden unnamed_addr constant [96 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4dali8TypeInfo2idEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28)) local_unnamed_addr #2 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616) %0, ptr noundef nonnull align 8 dereferenceable(664) %1) unnamed_addr #2 align 2 {
  %3 = alloca %"class.dali::TensorLayout", align 8
  %4 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  %5 = tail call noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664) %1, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #6
  %6 = tail call { i64, i64 } @_ZNK4dali7ReshapeINS_10GPUBackendEE15GetOutputLayoutERKNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616) %0, ptr noundef nonnull align 8 dereferenceable(664) %1)
  %7 = extractvalue { i64, i64 } %6, 0
  store i64 %7, ptr %3, align 8
  %8 = getelementptr inbounds i8, ptr %3, i64 8
  %9 = extractvalue { i64, i64 } %6, 1
  store i64 %9, ptr %8, align 8
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE5ResetEv(ptr noundef nonnull align 8 dereferenceable(304) %4)
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304) %4, ptr noundef nonnull align 8 dereferenceable(304) %5)
  %10 = getelementptr inbounds i8, ptr %0, i64 432
  %11 = getelementptr inbounds i8, ptr %0, i64 464
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %13 = tail call noundef i32 @_ZNK4dali8TypeInfo2idEv(ptr noundef nonnull align 8 dereferenceable(40) %12)
  tail call void @_ZN4dali10TensorListINS_10GPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304) %4, ptr noundef nonnull align 8 dereferenceable(32) %10, i32 noundef %13, i32 noundef 0)
  %14 = tail call noundef i32 @_ZNK4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EE11num_samplesEv(ptr noundef nonnull align 8 dereferenceable(28) %10)
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph, label %._crit_edge

16:                                               ; preds = %.lr.ph
  %17 = add nuw nsw i32 %.015, 1
  %exitcond.not = icmp eq i32 %17, %14
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !70

._crit_edge:                                      ; preds = %16, %2
  call void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304) %4, ptr noundef nonnull align 1 dereferenceable(16) %3)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #6
  ret void

.lr.ph:                                           ; preds = %2, %16
  %.015 = phi i32 [ %17, %16 ], [ 0, %2 ]
  %18 = tail call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %4, i32 noundef %.015)
  %19 = tail call noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304) %5, i32 noundef %.015)
  %20 = icmp eq ptr %18, %19
  br i1 %20, label %16, label %21

21:                                               ; preds = %.lr.ph
  tail call void @__assert_fail(ptr noundef nonnull @.str.26, ptr noundef nonnull @.str.27, i32 noundef 497, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4dali7ReshapeINS_10GPUBackendEE7RunImplERNS_9WorkspaceE) #7
  unreachable
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE6OutputINS_10GPUBackendEEERDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(304) ptr @_ZNK4dali13WorkspaceBaseINS_10TensorListESt10shared_ptrE5InputINS_10GPUBackendEEERKDaiT_(ptr noundef nonnull align 8 dereferenceable(664), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { i64, i64 } @_ZNK4dali7ReshapeINS_10GPUBackendEE15GetOutputLayoutERKNS_9WorkspaceE(ptr noundef nonnull align 8 dereferenceable(616), ptr noundef nonnull align 8 dereferenceable(664)) local_unnamed_addr #2 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE5ResetEv(ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #4

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9ShareDataERKS2_(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(304)) local_unnamed_addr #4

declare void @_ZN4dali10TensorListINS_10GPUBackendEE6ResizeERKNS_15TensorListShapeILin1EEE13_DALIDataTypeNS_15BatchContiguityE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK4dali10TensorListINS_10GPUBackendEE10raw_tensorEi(ptr noundef nonnull align 8 dereferenceable(304), i32 noundef) local_unnamed_addr #5 align 2

declare void @_ZN4dali10TensorListINS_10GPUBackendEE9SetLayoutERKNS_12TensorLayoutE(ptr noundef nonnull align 8 dereferenceable(304), ptr noundef nonnull align 1 dereferenceable(16)) local_unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 464}
!6 = !{!"_ZTSN4dali7ReshapeINS_10GPUBackendEEE", !7, i64 0, !49, i64 400, !53, i64 424, !54, i64 432, !13, i64 464, !60, i64 472, !54, i64 488, !61, i64 520, !64, i64 576, !53, i64 600, !53, i64 601, !43, i64 604, !68, i64 608, !69, i64 612}
!7 = !{!"_ZTSN4dali17StatelessOperatorINS_10GPUBackendEEE", !8, i64 0}
!8 = !{!"_ZTSN4dali8OperatorINS_10GPUBackendEEE", !9, i64 0}
!9 = !{!"_ZTSN4dali12OperatorBaseE", !10, i64 8, !43, i64 336, !43, i64 340, !44, i64 344}
!10 = !{!"_ZTSN4dali6OpSpecE", !11, i64 0, !13, i64 32, !17, i64 40, !21, i64 64, !29, i64 112, !21, i64 136, !33, i64 184, !36, i64 232, !36, i64 256, !40, i64 280}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !16, i64 8, !14, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !14, i64 0}
!14 = !{!"omnipotent char", !15, i64 0}
!15 = !{!"Simple C++ TBAA"}
!16 = !{!"long", !14, i64 0}
!17 = !{!"_ZTSSt6vectorISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt10shared_ptrIN4dali8ArgumentEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!21 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4lessIvESaISt4pairIKS5_iEEE", !22, i64 0}
!22 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !23, i64 0}
!23 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!24 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIvEE", !25, i64 0}
!25 = !{!"_ZTSSt4lessIvE"}
!26 = !{!"_ZTSSt15_Rb_tree_header", !27, i64 0, !16, i64 32}
!27 = !{!"_ZTSSt18_Rb_tree_node_base", !28, i64 0, !13, i64 8, !13, i64 16, !13, i64 24}
!28 = !{!"_ZTSSt14_Rb_tree_color", !14, i64 0}
!29 = !{!"_ZTSSt6vectorISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiESaIS7_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!33 = !{!"_ZTSSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St4lessIvESaISt4pairIKS5_S5_EEE", !34, i64 0}
!34 = !{!"_ZTSSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE", !35, i64 0}
!35 = !{!"_ZTSNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_S5_ESt10_Select1stIS8_ESt4lessIvESaIS8_EE13_Rb_tree_implISC_Lb1EEE", !24, i64 0, !26, i64 8}
!36 = !{!"_ZTSSt6vectorIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIN4dali6OpSpec15InOutDeviceDescESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!40 = !{!"_ZTSSt3mapIN4dali6OpSpec15InOutDeviceDescEiSt4lessIvESaISt4pairIKS2_iEEE", !41, i64 0}
!41 = !{!"_ZTSSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE", !42, i64 0}
!42 = !{!"_ZTSNSt8_Rb_treeIN4dali6OpSpec15InOutDeviceDescESt4pairIKS2_iESt10_Select1stIS5_ESt4lessIvESaIS5_EE13_Rb_tree_implIS9_Lb1EEE", !24, i64 0, !26, i64 8}
!43 = !{!"int", !14, i64 0}
!44 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt3anySt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_S6_EEE", !45, i64 0}
!45 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_St3anyESaIS9_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSB_18_Mod_range_hashingENSB_20_Default_ranged_hashENSB_20_Prime_rehash_policyENSB_17_Hashtable_traitsILb1ELb0ELb1EEEE", !13, i64 0, !16, i64 8, !46, i64 16, !16, i64 24, !47, i64 32, !13, i64 48}
!46 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !13, i64 0}
!47 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !48, i64 0, !16, i64 8}
!48 = !{!"float", !14, i64 0}
!49 = !{!"_ZTSSt6vectorIiSaIiEE", !50, i64 0}
!50 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !51, i64 0}
!51 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !52, i64 0}
!52 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!53 = !{!"bool", !14, i64 0}
!54 = !{!"_ZTSN4dali15TensorListShapeILin1EEE", !55, i64 0, !43, i64 28}
!55 = !{!"_ZTSN4dali19TensorListShapeBaseINS_15TensorListShapeILin1EEELin1EEE", !56, i64 0, !43, i64 24}
!56 = !{!"_ZTSSt6vectorIlSaIlEE", !57, i64 0}
!57 = !{!"_ZTSSt12_Vector_baseIlSaIlEE", !58, i64 0}
!58 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE12_Vector_implE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseIlSaIlEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!60 = !{!"_ZTSN4dali12TensorLayoutE", !14, i64 0}
!61 = !{!"_ZTSN4dali11TensorShapeILin1EEE", !62, i64 0}
!62 = !{!"_ZTSN4dali15TensorShapeBaseINS_11SmallVectorIlLm6ESaIlEEELin1EEE", !63, i64 0}
!63 = !{!"_ZTSN4dali11SmallVectorIlLm6ESaIlEEE", !14, i64 0, !16, i64 48}
!64 = !{!"_ZTSSt6vectorIfSaIfEE", !65, i64 0}
!65 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !66, i64 0}
!66 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !67, i64 0}
!67 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!68 = !{!"_ZTS13_DALIDataType", !14, i64 0}
!69 = !{!"_ZTSN4dali7ReshapeINS_10GPUBackendEE11ShapeSourceE", !14, i64 0}
!70 = distinct !{!70, !71}
!71 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass