; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

@__const.test_evex_load_store.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @test_evex_load_store(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca [3 x i32], align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 2, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 12, ptr %13) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 @__const.test_evex_load_store.displ, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %15, ptr noundef %16)
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %69, %4
  %18 = load i32, ptr %10, align 4, !tbaa !9
  %19 = icmp ult i32 %18, 16
  br i1 %19, label %20, label %72

20:                                               ; preds = %17
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %65, %20
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp ult i32 %22, 32
  br i1 %23, label %24, label %68

24:                                               ; preds = %21
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %61, %24
  %26 = load i32, ptr %14, align 4, !tbaa !9
  %27 = icmp ult i32 %26, 3
  br i1 %27, label %28, label %64

28:                                               ; preds = %25
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = and i32 %29, 1
  %31 = icmp eq i32 %30, 1
  br i1 %31, label %32, label %44

32:                                               ; preds = %28
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %34, i32 0, i32 6
  %36 = load i32, ptr %35, align 4, !tbaa !11
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = load i32, ptr %10, align 4, !tbaa !9
  %39 = load i32, ptr %14, align 4, !tbaa !9
  %40 = zext i32 %39 to i64
  %41 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !9
  %43 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %33, i32 noundef %36, i32 noundef %37, i32 noundef %38, i32 noundef 127, i32 noundef 0, i32 noundef %42, i8 noundef signext 122, i32 noundef %43, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  br label %44

44:                                               ; preds = %32, %28
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = and i32 %45, 2
  %47 = icmp eq i32 %46, 2
  br i1 %47, label %48, label %60

48:                                               ; preds = %44
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %50, i32 0, i32 6
  %52 = load i32, ptr %51, align 4, !tbaa !11
  %53 = load i32, ptr %7, align 4, !tbaa !9
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = load i32, ptr %14, align 4, !tbaa !9
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %49, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef 127, i32 noundef 0, i32 noundef %58, i8 noundef signext 122, i32 noundef %59, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  br label %60

60:                                               ; preds = %48, %44
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %14, align 4, !tbaa !9
  %63 = add i32 %62, 1
  store i32 %63, ptr %14, align 4, !tbaa !9
  br label %25, !llvm.loop !13

64:                                               ; preds = %25
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = add i32 %66, 1
  store i32 %67, ptr %9, align 4, !tbaa !9
  br label %21, !llvm.loop !15

68:                                               ; preds = %21
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = add i32 %70, 1
  store i32 %71, ptr %10, align 4, !tbaa !9
  br label %17, !llvm.loop !16

72:                                               ; preds = %17
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %137, %72
  %74 = load i32, ptr %10, align 4, !tbaa !9
  %75 = icmp ult i32 %74, 16
  br i1 %75, label %76, label %140

76:                                               ; preds = %73
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %133, %76
  %78 = load i32, ptr %11, align 4, !tbaa !9
  %79 = icmp ult i32 %78, 16
  br i1 %79, label %80, label %136

80:                                               ; preds = %77
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %129, %80
  %82 = load i32, ptr %9, align 4, !tbaa !9
  %83 = icmp ult i32 %82, 32
  br i1 %83, label %84, label %132

84:                                               ; preds = %81
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %85

85:                                               ; preds = %125, %84
  %86 = load i32, ptr %14, align 4, !tbaa !9
  %87 = icmp ult i32 %86, 3
  br i1 %87, label %88, label %128

88:                                               ; preds = %85
  %89 = load i32, ptr %8, align 4, !tbaa !9
  %90 = and i32 %89, 1
  %91 = icmp eq i32 %90, 1
  br i1 %91, label %92, label %106

92:                                               ; preds = %88
  %93 = load ptr, ptr %6, align 8, !tbaa !5
  %94 = load ptr, ptr %6, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %94, i32 0, i32 6
  %96 = load i32, ptr %95, align 4, !tbaa !11
  %97 = load i32, ptr %7, align 4, !tbaa !9
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = load i32, ptr %11, align 4, !tbaa !9
  %100 = load i32, ptr %12, align 4, !tbaa !9
  %101 = load i32, ptr %14, align 4, !tbaa !9
  %102 = zext i32 %101 to i64
  %103 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %102
  %104 = load i32, ptr %103, align 4, !tbaa !9
  %105 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %93, i32 noundef %96, i32 noundef %97, i32 noundef %98, i32 noundef %99, i32 noundef %100, i32 noundef %104, i8 noundef signext 122, i32 noundef %105, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  br label %106

106:                                              ; preds = %92, %88
  %107 = load i32, ptr %8, align 4, !tbaa !9
  %108 = and i32 %107, 2
  %109 = icmp eq i32 %108, 2
  br i1 %109, label %110, label %124

110:                                              ; preds = %106
  %111 = load ptr, ptr %6, align 8, !tbaa !5
  %112 = load ptr, ptr %6, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %112, i32 0, i32 6
  %114 = load i32, ptr %113, align 4, !tbaa !11
  %115 = load i32, ptr %7, align 4, !tbaa !9
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = load i32, ptr %11, align 4, !tbaa !9
  %118 = load i32, ptr %12, align 4, !tbaa !9
  %119 = load i32, ptr %14, align 4, !tbaa !9
  %120 = zext i32 %119 to i64
  %121 = getelementptr inbounds [3 x i32], ptr %13, i64 0, i64 %120
  %122 = load i32, ptr %121, align 4, !tbaa !9
  %123 = load i32, ptr %9, align 4, !tbaa !9
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %111, i32 noundef %114, i32 noundef %115, i32 noundef %116, i32 noundef %117, i32 noundef %118, i32 noundef %122, i8 noundef signext 122, i32 noundef %123, i32 noundef 0, i32 noundef 0, i32 noundef 1)
  br label %124

124:                                              ; preds = %110, %106
  br label %125

125:                                              ; preds = %124
  %126 = load i32, ptr %14, align 4, !tbaa !9
  %127 = add i32 %126, 1
  store i32 %127, ptr %14, align 4, !tbaa !9
  br label %85, !llvm.loop !17

128:                                              ; preds = %85
  br label %129

129:                                              ; preds = %128
  %130 = load i32, ptr %9, align 4, !tbaa !9
  %131 = add i32 %130, 1
  store i32 %131, ptr %9, align 4, !tbaa !9
  br label %81, !llvm.loop !18

132:                                              ; preds = %81
  br label %133

133:                                              ; preds = %132
  %134 = load i32, ptr %11, align 4, !tbaa !9
  %135 = add i32 %134, 1
  store i32 %135, ptr %11, align 4, !tbaa !9
  br label %77, !llvm.loop !19

136:                                              ; preds = %77
  br label %137

137:                                              ; preds = %136
  %138 = load i32, ptr %10, align 4, !tbaa !9
  %139 = add i32 %138, 1
  store i32 %139, ptr %10, align 4, !tbaa !9
  br label %73, !llvm.loop !20

140:                                              ; preds = %73
  %141 = load ptr, ptr %6, align 8, !tbaa !5
  %142 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %141, ptr noundef %142)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"libxsmm_generated_code", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}
!20 = distinct !{!20, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.test_evex_load_store.displ = external hidden unnamed_addr constant [3 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @test_evex_load_store(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %5 = and i32 %3, 1
  %.not55 = icmp eq i32 %5, 0
  %6 = getelementptr inbounds i8, ptr %1, i64 28
  %7 = and i32 %3, 2
  %.not56 = icmp eq i32 %7, 0
  br i1 %.not55, label %.split.us, label %.split

.split.us:                                        ; preds = %4
  br i1 %.not56, label %.split113.us, label %.preheader61.us.preheader

.preheader61.us.preheader:                        ; preds = %.split.us
  %.pre152.pre = load i32, ptr @__const.test_evex_load_store.displ, align 4, !tbaa !5
  %.pre153.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 4), align 4, !tbaa !5
  %.pre154.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 8), align 4, !tbaa !5
  br label %.preheader61.us

.preheader61.us:                                  ; preds = %.preheader61.us.preheader, %.split70.us.split.us77
  %.05273.us = phi i32 [ %12, %.split70.us.split.us77 ], [ 0, %.preheader61.us.preheader ]
  br label %.preheader60.us.us75

.preheader60.us.us75:                             ; preds = %.preheader61.us, %.preheader60.us.us75
  %.04964.us.us76 = phi i32 [ 0, %.preheader61.us ], [ %11, %.preheader60.us.us75 ]
  %8 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %8, i32 noundef %2, i32 noundef %.05273.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre152.pre, i8 noundef signext 122, i32 noundef %.04964.us.us76, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %9 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %9, i32 noundef %2, i32 noundef %.05273.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre153.pre, i8 noundef signext 122, i32 noundef %.04964.us.us76, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %10 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %10, i32 noundef %2, i32 noundef %.05273.us, i32 noundef 127, i32 noundef 0, i32 noundef %.pre154.pre, i8 noundef signext 122, i32 noundef %.04964.us.us76, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %11 = add nuw nsw i32 %.04964.us.us76, 1
  %exitcond130.not = icmp eq i32 %11, 32
  br i1 %exitcond130.not, label %.split70.us.split.us77, label %.preheader60.us.us75, !llvm.loop !12

.split70.us.split.us77:                           ; preds = %.preheader60.us.us75
  %12 = add nuw nsw i32 %.05273.us, 1
  %exitcond131.not = icmp eq i32 %12, 16
  br i1 %exitcond131.not, label %.preheader59, label %.preheader61.us, !llvm.loop !14

.split:                                           ; preds = %4
  %.pre149.pre = load i32, ptr @__const.test_evex_load_store.displ, align 4, !tbaa !5
  %.pre150.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 4), align 4, !tbaa !5
  %.pre151.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 8), align 4, !tbaa !5
  br i1 %.not56, label %.preheader61.us80, label %.preheader61

.preheader61.us80:                                ; preds = %.split, %.split70.split.us.us
  %.05273.us81 = phi i32 [ %17, %.split70.split.us.us ], [ 0, %.split ]
  br label %.preheader60.us71.us

.preheader60.us71.us:                             ; preds = %.preheader60.us71.us, %.preheader61.us80
  %.04964.us72.us = phi i32 [ 0, %.preheader61.us80 ], [ %16, %.preheader60.us71.us ]
  %13 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %13, i32 noundef %2, i32 noundef %.05273.us81, i32 noundef 127, i32 noundef 0, i32 noundef %.pre149.pre, i8 noundef signext 122, i32 noundef %.04964.us72.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %14 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %14, i32 noundef %2, i32 noundef %.05273.us81, i32 noundef 127, i32 noundef 0, i32 noundef %.pre150.pre, i8 noundef signext 122, i32 noundef %.04964.us72.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %15 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %15, i32 noundef %2, i32 noundef %.05273.us81, i32 noundef 127, i32 noundef 0, i32 noundef %.pre151.pre, i8 noundef signext 122, i32 noundef %.04964.us72.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %16 = add nuw nsw i32 %.04964.us72.us, 1
  %exitcond126.not = icmp eq i32 %16, 32
  br i1 %exitcond126.not, label %.split70.split.us.us, label %.preheader60.us71.us, !llvm.loop !12

.split70.split.us.us:                             ; preds = %.preheader60.us71.us
  %17 = add nuw nsw i32 %.05273.us81, 1
  %exitcond127.not = icmp eq i32 %17, 16
  br i1 %exitcond127.not, label %.preheader59, label %.preheader61.us80, !llvm.loop !14

.preheader61:                                     ; preds = %.split, %.split70.split
  %.05273 = phi i32 [ %37, %.split70.split ], [ 0, %.split ]
  br label %.preheader60

.preheader59:                                     ; preds = %.split70.split, %.split70.split.us.us, %.split70.us.split.us77
  br i1 %.not55, label %.preheader59.split107.us, label %.preheader59.split107

.preheader59.split107.us:                         ; preds = %.preheader59
  br i1 %.not56, label %.split113.us, label %.preheader58.us.preheader

.preheader58.us.preheader:                        ; preds = %.preheader59.split107.us
  %.pre161.pre.pre = load i32, ptr @__const.test_evex_load_store.displ, align 4, !tbaa !5
  %.pre162.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 4), align 4, !tbaa !5
  %.pre163.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 8), align 4, !tbaa !5
  br label %.preheader58.us

.preheader58.us:                                  ; preds = %.preheader58.us.preheader, %.split102.us.split.us110
  %.153105.us = phi i32 [ %23, %.split102.us.split.us110 ], [ 0, %.preheader58.us.preheader ]
  br label %.preheader57.us.us108

.preheader57.us.us108:                            ; preds = %.preheader58.us, %.split92.us.split.us99.us
  %.05195.us.us109 = phi i32 [ 0, %.preheader58.us ], [ %22, %.split92.us.split.us99.us ]
  br label %.preheader.us.us97.us

.preheader.us.us97.us:                            ; preds = %.preheader.us.us97.us, %.preheader57.us.us108
  %.15086.us.us98.us = phi i32 [ 0, %.preheader57.us.us108 ], [ %21, %.preheader.us.us97.us ]
  %18 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %18, i32 noundef %2, i32 noundef %.153105.us, i32 noundef %.05195.us.us109, i32 noundef 2, i32 noundef %.pre161.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us.us98.us, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %19 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %19, i32 noundef %2, i32 noundef %.153105.us, i32 noundef %.05195.us.us109, i32 noundef 2, i32 noundef %.pre162.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us.us98.us, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %20 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %20, i32 noundef %2, i32 noundef %.153105.us, i32 noundef %.05195.us.us109, i32 noundef 2, i32 noundef %.pre163.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us.us98.us, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %21 = add nuw nsw i32 %.15086.us.us98.us, 1
  %exitcond144.not = icmp eq i32 %21, 32
  br i1 %exitcond144.not, label %.split92.us.split.us99.us, label %.preheader.us.us97.us, !llvm.loop !15

.split92.us.split.us99.us:                        ; preds = %.preheader.us.us97.us
  %22 = add nuw nsw i32 %.05195.us.us109, 1
  %exitcond145.not = icmp eq i32 %22, 16
  br i1 %exitcond145.not, label %.split102.us.split.us110, label %.preheader57.us.us108, !llvm.loop !16

.split102.us.split.us110:                         ; preds = %.split92.us.split.us99.us
  %23 = add nuw nsw i32 %.153105.us, 1
  %exitcond146.not = icmp eq i32 %23, 16
  br i1 %exitcond146.not, label %.split113.us, label %.preheader58.us, !llvm.loop !17

.preheader59.split107:                            ; preds = %.preheader59
  %.pre158.pre.pre = load i32, ptr @__const.test_evex_load_store.displ, align 4, !tbaa !5
  %.pre159.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 4), align 4, !tbaa !5
  %.pre160.pre.pre = load i32, ptr getelementptr inbounds (i8, ptr @__const.test_evex_load_store.displ, i64 8), align 4, !tbaa !5
  br i1 %.not56, label %.preheader58.us114, label %.preheader58

.preheader58.us114:                               ; preds = %.preheader59.split107, %.split102.split.us.us
  %.153105.us115 = phi i32 [ %29, %.split102.split.us.us ], [ 0, %.preheader59.split107 ]
  br label %.preheader57.us103.us

.preheader57.us103.us:                            ; preds = %.split92.split.us.us.us, %.preheader58.us114
  %.05195.us104.us = phi i32 [ 0, %.preheader58.us114 ], [ %28, %.split92.split.us.us.us ]
  br label %.preheader.us93.us.us

.preheader.us93.us.us:                            ; preds = %.preheader.us93.us.us, %.preheader57.us103.us
  %.15086.us94.us.us = phi i32 [ 0, %.preheader57.us103.us ], [ %27, %.preheader.us93.us.us ]
  %24 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %24, i32 noundef %2, i32 noundef %.153105.us115, i32 noundef %.05195.us104.us, i32 noundef 2, i32 noundef %.pre158.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us94.us.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %25 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %25, i32 noundef %2, i32 noundef %.153105.us115, i32 noundef %.05195.us104.us, i32 noundef 2, i32 noundef %.pre159.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us94.us.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %26 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %26, i32 noundef %2, i32 noundef %.153105.us115, i32 noundef %.05195.us104.us, i32 noundef 2, i32 noundef %.pre160.pre.pre, i8 noundef signext 122, i32 noundef %.15086.us94.us.us, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %27 = add nuw nsw i32 %.15086.us94.us.us, 1
  %exitcond139.not = icmp eq i32 %27, 32
  br i1 %exitcond139.not, label %.split92.split.us.us.us, label %.preheader.us93.us.us, !llvm.loop !15

.split92.split.us.us.us:                          ; preds = %.preheader.us93.us.us
  %28 = add nuw nsw i32 %.05195.us104.us, 1
  %exitcond140.not = icmp eq i32 %28, 16
  br i1 %exitcond140.not, label %.split102.split.us.us, label %.preheader57.us103.us, !llvm.loop !16

.split102.split.us.us:                            ; preds = %.split92.split.us.us.us
  %29 = add nuw nsw i32 %.153105.us115, 1
  %exitcond141.not = icmp eq i32 %29, 16
  br i1 %exitcond141.not, label %.split113.us, label %.preheader58.us114, !llvm.loop !17

.preheader60:                                     ; preds = %.preheader61, %.preheader60
  %.04964 = phi i32 [ 0, %.preheader61 ], [ %36, %.preheader60 ]
  %30 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %30, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre149.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %31 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %31, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre149.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %32 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %32, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre150.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %33 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %33, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre150.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %34 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %34, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre151.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %35 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %1, i32 noundef %35, i32 noundef %2, i32 noundef %.05273, i32 noundef 127, i32 noundef 0, i32 noundef %.pre151.pre, i8 noundef signext 122, i32 noundef %.04964, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %36 = add nuw nsw i32 %.04964, 1
  %exitcond.not = icmp eq i32 %36, 32
  br i1 %exitcond.not, label %.split70.split, label %.preheader60, !llvm.loop !12

.split70.split:                                   ; preds = %.preheader60
  %37 = add nuw nsw i32 %.05273, 1
  %exitcond123.not = icmp eq i32 %37, 16
  br i1 %exitcond123.not, label %.preheader59, label %.preheader61, !llvm.loop !14

.preheader58:                                     ; preds = %.preheader59.split107, %.split102.split
  %.153105 = phi i32 [ %46, %.split102.split ], [ 0, %.preheader59.split107 ]
  br label %.preheader57

.preheader57:                                     ; preds = %.preheader58, %.split92.split
  %.05195 = phi i32 [ 0, %.preheader58 ], [ %45, %.split92.split ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader57, %.preheader
  %.15086 = phi i32 [ 0, %.preheader57 ], [ %44, %.preheader ]
  %38 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %38, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre158.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %39 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %39, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre158.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %40 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %40, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre159.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %41 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %41, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre159.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %42 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %42, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre160.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
  %43 = load i32, ptr %6, align 4, !tbaa !9
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %1, i32 noundef %43, i32 noundef %2, i32 noundef %.153105, i32 noundef %.05195, i32 noundef 2, i32 noundef %.pre160.pre.pre, i8 noundef signext 122, i32 noundef %.15086, i32 noundef 0, i32 noundef 0, i32 noundef 1) #2
  %44 = add nuw nsw i32 %.15086, 1
  %exitcond134.not = icmp eq i32 %44, 32
  br i1 %exitcond134.not, label %.split92.split, label %.preheader, !llvm.loop !15

.split92.split:                                   ; preds = %.preheader
  %45 = add nuw nsw i32 %.05195, 1
  %exitcond135.not = icmp eq i32 %45, 16
  br i1 %exitcond135.not, label %.split102.split, label %.preheader57, !llvm.loop !16

.split102.split:                                  ; preds = %.split92.split
  %46 = add nuw nsw i32 %.153105, 1
  %exitcond136.not = icmp eq i32 %46, 16
  br i1 %exitcond136.not, label %.split113.us, label %.preheader58, !llvm.loop !17

.split113.us:                                     ; preds = %.split102.split, %.split102.split.us.us, %.split102.us.split.us110, %.split.us, %.preheader59.split107.us
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 28}
!10 = !{!"libxsmm_generated_code", !11, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!11 = !{!"any pointer", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}
!17 = distinct !{!17, !13}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass