; LLVM IR from NVIDIA/DALI :: dali/operators/geometry/mt_transform_attr.ll (ZN4dali15MTTransformAttr12SplitFusedMTEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.dali::MTTransformAttr" = type <{ %"class.std::vector.28", %"class.std::vector.28", %"class.std::vector.28", %"class.std::vector.28", i32, i32, i8, i8, i8, i8, i8, i8, [2 x i8] }>
%"class.std::vector.28" = type { %"struct.std::_Vector_base.29" }
%"struct.std::_Vector_base.29" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali15MTTransformAttr12SplitFusedMTEv(ptr noundef nonnull align 8 dereferenceable(110) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %8 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 4
  %9 = load i32, ptr %8, align 8, !tbaa !9
  %10 = add nsw i32 %9, 1
  store i32 %10, ptr %3, align 4, !tbaa !17
  %11 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 1
  %12 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 5
  %13 = load i32, ptr %12, align 4, !tbaa !18
  %14 = sext i32 %13 to i64
  call void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %14)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !17
  br label %15

15:                                               ; preds = %69, %1
  %16 = load i32, ptr %4, align 4, !tbaa !17
  %17 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 5
  %18 = load i32, ptr %17, align 4, !tbaa !18
  %19 = icmp slt i32 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %72

21:                                               ; preds = %15
  %22 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 0
  %23 = load i32, ptr %4, align 4, !tbaa !17
  %24 = load i32, ptr %3, align 4, !tbaa !17
  %25 = mul nsw i32 %23, %24
  %26 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 4
  %27 = load i32, ptr %26, align 8, !tbaa !9
  %28 = add nsw i32 %25, %27
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %29) #3
  %31 = load float, ptr %30, align 4, !tbaa !19
  %32 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 1
  %33 = load i32, ptr %4, align 4, !tbaa !17
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #3
  store float %31, ptr %35, align 4, !tbaa !19
  %36 = load i32, ptr %4, align 4, !tbaa !17
  %37 = icmp sgt i32 %36, 0
  br i1 %37, label %38, label %68

38:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !17
  br label %39

39:                                               ; preds = %64, %38
  %40 = load i32, ptr %6, align 4, !tbaa !17
  %41 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 4
  %42 = load i32, ptr %41, align 8, !tbaa !9
  %43 = icmp slt i32 %40, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %39
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %67

45:                                               ; preds = %39
  %46 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 0
  %47 = load i32, ptr %4, align 4, !tbaa !17
  %48 = load i32, ptr %3, align 4, !tbaa !17
  %49 = mul nsw i32 %47, %48
  %50 = load i32, ptr %6, align 4, !tbaa !17
  %51 = add nsw i32 %49, %50
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %52) #3
  %54 = load float, ptr %53, align 4, !tbaa !19
  %55 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 0
  %56 = load i32, ptr %4, align 4, !tbaa !17
  %57 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 4
  %58 = load i32, ptr %57, align 8, !tbaa !9
  %59 = mul nsw i32 %56, %58
  %60 = load i32, ptr %6, align 4, !tbaa !17
  %61 = add nsw i32 %59, %60
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %62) #3
  store float %54, ptr %63, align 4, !tbaa !19
  br label %64

64:                                               ; preds = %45
  %65 = load i32, ptr %6, align 4, !tbaa !17
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %6, align 4, !tbaa !17
  br label %39, !llvm.loop !21

67:                                               ; preds = %44
  br label %68

68:                                               ; preds = %67, %21
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %4, align 4, !tbaa !17
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %4, align 4, !tbaa !17
  br label %15, !llvm.loop !23

72:                                               ; preds = %20
  %73 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 0
  %74 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 5
  %75 = load i32, ptr %74, align 4, !tbaa !18
  %76 = getelementptr inbounds %"class.dali::MTTransformAttr", ptr %7, i32 0, i32 4
  %77 = load i32, ptr %76, align 8, !tbaa !9
  %78 = mul nsw i32 %75, %77
  %79 = sext i32 %78 to i64
  call void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %79)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !15, i64 96}
!10 = !{!"_ZTSN4dali15MTTransformAttrE", !11, i64 0, !11, i64 24, !11, i64 48, !11, i64 72, !15, i64 96, !15, i64 100, !16, i64 104, !16, i64 105, !16, i64 106, !16, i64 107, !16, i64 108, !16, i64 109}
!11 = !{!"_ZTSSt6vectorIfSaIfEE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!15, !15, i64 0}
!18 = !{!10, !15, i64 100}
!19 = !{!20, !20, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = distinct !{!23, !22}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4dali15MTTransformAttr12SplitFusedMTEv(ptr noundef nonnull align 8 dereferenceable(110) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 96
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  %5 = getelementptr inbounds i8, ptr %0, i64 100
  %6 = load i32, ptr %5, align 4, !tbaa !16
  %7 = sext i32 %6 to i64
  tail call void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %7)
  %8 = load i32, ptr %5, align 4, !tbaa !16
  %9 = icmp sgt i32 %8, 0
  %.pre25 = load i32, ptr %2, align 8, !tbaa !5
  br i1 %9, label %.lr.ph18.preheader, label %._crit_edge

.lr.ph18.preheader:                               ; preds = %1
  %10 = add nsw i32 %3, 1
  %11 = sext i32 %10 to i64
  br label %.lr.ph18

._crit_edge:                                      ; preds = %.loopexit, %1
  %12 = phi i32 [ %.pre25, %1 ], [ %35, %.loopexit ]
  %.lcssa = phi i32 [ %8, %1 ], [ %36, %.loopexit ]
  %13 = mul nsw i32 %12, %.lcssa
  %14 = sext i32 %13 to i64
  tail call void @_ZNSt6vectorIfSaIfEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14)
  ret void

.lr.ph18:                                         ; preds = %.lr.ph18.preheader, %.loopexit
  %15 = phi i32 [ %.pre25, %.lr.ph18.preheader ], [ %35, %.loopexit ]
  %indvars.iv22 = phi i64 [ 0, %.lr.ph18.preheader ], [ %indvars.iv.next23, %.loopexit ]
  %16 = mul nsw i64 %indvars.iv22, %11
  %17 = sext i32 %15 to i64
  %18 = add nsw i64 %16, %17
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  %20 = load float, ptr %19, align 4, !tbaa !17
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv22) #2
  store float %20, ptr %21, align 4, !tbaa !17
  %.not = icmp ne i64 %indvars.iv22, 0
  %22 = load i32, ptr %2, align 8
  %23 = icmp sgt i32 %22, 0
  %or.cond = select i1 %.not, i1 %23, i1 false
  br i1 %or.cond, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph18, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph18 ]
  %24 = add nsw i64 %indvars.iv, %16
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %24) #2
  %26 = load float, ptr %25, align 4, !tbaa !17
  %27 = load i32, ptr %2, align 8, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %indvars.iv22, %28
  %30 = add nsw i64 %29, %indvars.iv
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #2
  store float %26, ptr %31, align 4, !tbaa !17
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %32 = load i32, ptr %2, align 8, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = icmp slt i64 %indvars.iv.next, %33
  br i1 %34, label %.lr.ph, label %.loopexit, !llvm.loop !19

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph18
  %35 = phi i32 [ %22, %.lr.ph18 ], [ %32, %.lr.ph ]
  %indvars.iv.next23 = add nuw nsw i64 %indvars.iv22, 1
  %36 = load i32, ptr %5, align 4, !tbaa !16
  %37 = sext i32 %36 to i64
  %38 = icmp slt i64 %indvars.iv.next23, %37
  br i1 %38, label %.lr.ph18, label %._crit_edge, !llvm.loop !21
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 96}
!6 = !{!"_ZTSN4dali15MTTransformAttrE", !7, i64 0, !7, i64 24, !7, i64 48, !7, i64 72, !14, i64 96, !14, i64 100, !15, i64 104, !15, i64 105, !15, i64 106, !15, i64 107, !15, i64 108, !15, i64 109}
!7 = !{!"_ZTSSt6vectorIfSaIfEE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"int", !12, i64 0}
!15 = !{!"bool", !12, i64 0}
!16 = !{!6, !14, i64 100}
!17 = !{!18, !18, i64 0}
!18 = !{!"float", !12, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass