; LLVM IR from libxsmm/libxsmm :: src (generator_common_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.libxsmm_generated_code = type { ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_2reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #1

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf8_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) #2 {
  %11 = alloca ptr, align 8
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i8, align 1
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i8 %1, ptr %12, align 1, !tbaa !9
  store i32 %2, ptr %13, align 4, !tbaa !10
  store i32 %3, ptr %14, align 4, !tbaa !10
  store i32 %4, ptr %15, align 4, !tbaa !10
  store i32 %5, ptr %16, align 4, !tbaa !10
  store i32 %6, ptr %17, align 4, !tbaa !10
  store i32 %7, ptr %18, align 4, !tbaa !10
  store i32 %8, ptr %19, align 4, !tbaa !10
  store i32 %9, ptr %20, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 1, ptr %21) #3
  %22 = load i8, ptr %12, align 1, !tbaa !9
  %23 = sext i8 %22 to i32
  %24 = icmp eq i32 %23, 122
  %25 = zext i1 %24 to i64
  %26 = select i1 %24, i32 121, i32 120
  %27 = trunc i32 %26 to i8
  store i8 %27, ptr %21, align 1, !tbaa !9
  %28 = load ptr, ptr %11, align 8, !tbaa !5
  %29 = load i8, ptr %12, align 1, !tbaa !9
  %30 = load i32, ptr %13, align 4, !tbaa !10
  %31 = load i32, ptr %13, align 4, !tbaa !10
  %32 = load ptr, ptr %11, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %32, i32 0, i32 6
  %34 = load i32, ptr %33, align 4, !tbaa !12
  %35 = icmp ult i32 %34, 1101
  %36 = zext i1 %35 to i64
  %37 = select i1 %35, i32 0, i32 1
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %38, i32 0, i32 6
  %40 = load i32, ptr %39, align 4, !tbaa !12
  %41 = icmp ult i32 %40, 1101
  %42 = zext i1 %41 to i64
  %43 = select i1 %41, i32 0, i32 1
  %44 = trunc i32 %43 to i8
  call void @libxsmm_x86_instruction_vec_compute_2reg_mask_sae_imm8(ptr noundef %28, i32 noundef 671954205, i8 noundef signext %29, i32 noundef %30, i32 noundef %31, i32 noundef 0, i32 noundef %37, i8 noundef zeroext %44, i32 noundef 0)
  %45 = load ptr, ptr %11, align 8, !tbaa !5
  %46 = load i8, ptr %21, align 1, !tbaa !9
  %47 = load i32, ptr %13, align 4, !tbaa !10
  %48 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %45, i32 noundef 805639899, i8 noundef signext %46, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %47, i32 noundef %48)
  %49 = load ptr, ptr %11, align 8, !tbaa !5
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %50, i32 0, i32 6
  %52 = load i32, ptr %51, align 4, !tbaa !12
  %53 = load i8, ptr %21, align 1, !tbaa !9
  %54 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %49, i32 noundef %52, i32 noundef 537209432, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i8 noundef signext %53, i32 noundef %54, i32 noundef 0, i32 noundef 1, i32 noundef 0)
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = load i8, ptr %21, align 1, !tbaa !9
  %57 = load i32, ptr %15, align 4, !tbaa !10
  %58 = load i32, ptr %16, align 4, !tbaa !10
  %59 = load i32, ptr %17, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %55, i32 noundef -259180993, i8 noundef signext %56, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef 4)
  %60 = load i32, ptr %19, align 4, !tbaa !10
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %81

62:                                               ; preds = %10
  %63 = load ptr, ptr %11, align 8, !tbaa !5
  %64 = load i8, ptr %21, align 1, !tbaa !9
  %65 = load i32, ptr %16, align 4, !tbaa !10
  %66 = load i32, ptr %16, align 4, !tbaa !10
  %67 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %63, i32 noundef 805639919, i8 noundef signext %64, i32 noundef %65, i32 noundef %66, i32 noundef %67)
  %68 = load ptr, ptr %11, align 8, !tbaa !5
  %69 = load i8, ptr %21, align 1, !tbaa !9
  %70 = load i32, ptr %15, align 4, !tbaa !10
  %71 = load i32, ptr %16, align 4, !tbaa !10
  %72 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %68, i32 noundef -259180993, i8 noundef signext %69, i32 noundef %70, i32 noundef %71, i32 noundef %72, i32 noundef 0)
  %73 = load ptr, ptr %11, align 8, !tbaa !5
  %74 = load i8, ptr %12, align 1, !tbaa !9
  %75 = load i32, ptr %20, align 4, !tbaa !10
  %76 = load i32, ptr %20, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %73, i32 noundef 606934642, i8 noundef signext %74, i32 noundef %75, i32 noundef %76, i32 noundef 24)
  %77 = load ptr, ptr %11, align 8, !tbaa !5
  %78 = load i8, ptr %12, align 1, !tbaa !9
  %79 = load i32, ptr %20, align 4, !tbaa !10
  %80 = load i32, ptr %20, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %77, i32 noundef 671491379, i8 noundef signext %78, i32 noundef %79, i32 noundef %80)
  br label %81

81:                                               ; preds = %62, %10
  %82 = load ptr, ptr %11, align 8, !tbaa !5
  %83 = load i8, ptr %21, align 1, !tbaa !9
  %84 = load i32, ptr %13, align 4, !tbaa !10
  %85 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %82, i32 noundef 609031793, i8 noundef signext %83, i32 noundef %84, i32 noundef %85, i32 noundef 8)
  %86 = load ptr, ptr %11, align 8, !tbaa !5
  %87 = load i8, ptr %21, align 1, !tbaa !9
  %88 = load i32, ptr %16, align 4, !tbaa !10
  %89 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %86, i32 noundef 805639899, i8 noundef signext %87, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef %88, i32 noundef %89)
  %90 = load ptr, ptr %11, align 8, !tbaa !5
  %91 = load ptr, ptr %11, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.libxsmm_generated_code, ptr %91, i32 0, i32 6
  %93 = load i32, ptr %92, align 4, !tbaa !12
  %94 = load i8, ptr %21, align 1, !tbaa !9
  %95 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_move(ptr noundef %90, i32 noundef %93, i32 noundef 537209432, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 8, i8 noundef signext %94, i32 noundef %95, i32 noundef 0, i32 noundef 1, i32 noundef 0)
  %96 = load ptr, ptr %11, align 8, !tbaa !5
  %97 = load i8, ptr %21, align 1, !tbaa !9
  %98 = load i32, ptr %15, align 4, !tbaa !10
  %99 = load i32, ptr %16, align 4, !tbaa !10
  %100 = load i32, ptr %16, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %96, i32 noundef 805639933, i8 noundef signext %97, i32 noundef %98, i32 noundef %99, i32 noundef %100)
  %101 = load i32, ptr %19, align 4, !tbaa !10
  %102 = icmp ne i32 %101, 0
  br i1 %102, label %103, label %119

103:                                              ; preds = %81
  %104 = load ptr, ptr %11, align 8, !tbaa !5
  %105 = load i8, ptr %21, align 1, !tbaa !9
  %106 = load i32, ptr %13, align 4, !tbaa !10
  %107 = load i32, ptr %16, align 4, !tbaa !10
  %108 = load i32, ptr %15, align 4, !tbaa !10
  %109 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef %104, i32 noundef 805639933, i8 noundef signext %105, i32 noundef %106, i32 noundef %107, i32 noundef %108, i32 noundef %109, i32 noundef 0)
  %110 = load ptr, ptr %11, align 8, !tbaa !5
  %111 = load i32, ptr %18, align 4, !tbaa !10
  %112 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef %110, i32 noundef -1610346172, i32 noundef %111, i32 noundef 255, i32 noundef %112, i32 noundef 0)
  %113 = load ptr, ptr %11, align 8, !tbaa !5
  %114 = load i8, ptr %21, align 1, !tbaa !9
  %115 = load i32, ptr %13, align 4, !tbaa !10
  %116 = load i32, ptr %20, align 4, !tbaa !10
  %117 = load i32, ptr %15, align 4, !tbaa !10
  %118 = load i32, ptr %18, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef %113, i32 noundef 805639933, i8 noundef signext %114, i32 noundef %115, i32 noundef %116, i32 noundef %117, i32 noundef %118, i32 noundef 0)
  br label %125

119:                                              ; preds = %81
  %120 = load ptr, ptr %11, align 8, !tbaa !5
  %121 = load i8, ptr %21, align 1, !tbaa !9
  %122 = load i32, ptr %13, align 4, !tbaa !10
  %123 = load i32, ptr %16, align 4, !tbaa !10
  %124 = load i32, ptr %15, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef %120, i32 noundef 805639933, i8 noundef signext %121, i32 noundef %122, i32 noundef %123, i32 noundef %124)
  br label %125

125:                                              ; preds = %119, %103
  %126 = load ptr, ptr %11, align 8, !tbaa !5
  %127 = load i8, ptr %21, align 1, !tbaa !9
  %128 = load i32, ptr %15, align 4, !tbaa !10
  %129 = load i32, ptr %13, align 4, !tbaa !10
  %130 = load i32, ptr %14, align 4, !tbaa !10
  %131 = load i32, ptr %17, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef %126, i32 noundef -259709338, i8 noundef signext %127, i32 noundef %128, i32 noundef %129, i32 noundef %130, i32 noundef %131, i32 noundef 0)
  %132 = load ptr, ptr %11, align 8, !tbaa !5
  %133 = load i8, ptr %21, align 1, !tbaa !9
  %134 = load i32, ptr %14, align 4, !tbaa !10
  %135 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef %132, i32 noundef 609031793, i8 noundef signext %133, i32 noundef %134, i32 noundef %135, i32 noundef 8)
  %136 = load ptr, ptr %11, align 8, !tbaa !5
  %137 = load i8, ptr %21, align 1, !tbaa !9
  %138 = load i32, ptr %14, align 4, !tbaa !10
  %139 = load i32, ptr %14, align 4, !tbaa !10
  call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef %136, i32 noundef -536468176, i8 noundef signext %137, i32 noundef %138, i32 noundef %139)
  call void @llvm.lifetime.end.p0(i64 1, ptr %21) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 28}
!13 = !{!"libxsmm_generated_code", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_move(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_2reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @libxsmm_generator_vcvtneps2bf8_avx512_preppedstack(ptr noundef %0, i8 noundef signext %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9) local_unnamed_addr #1 {
  %11 = icmp eq i8 %1, 122
  %12 = select i1 %11, i8 121, i8 120
  %13 = getelementptr inbounds i8, ptr %0, i64 28
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp ugt i32 %14, 1100
  %16 = zext i1 %15 to i32
  %17 = zext i1 %15 to i8
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_mask_sae_imm8(ptr noundef %0, i32 noundef 671954205, i8 noundef signext %1, i32 noundef %2, i32 noundef %2, i32 noundef 0, i32 noundef %16, i8 noundef zeroext %17, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef %0, i32 noundef 805639899, i8 noundef signext %12, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i32 noundef 1, i32 noundef %2, i32 noundef %4) #2
  %18 = load i32, ptr %13, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef %0, i32 noundef %18, i32 noundef 537209432, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 16, i8 noundef signext %12, i32 noundef %5, i32 noundef 0, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef %0, i32 noundef -259180993, i8 noundef signext %12, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef 4) #2
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %.critedge, label %19

19:                                               ; preds = %10
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639919, i8 noundef signext %12, i32 noundef %5, i32 noundef %5, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_imm8(ptr noundef nonnull %0, i32 noundef -259180993, i8 noundef signext %12, i32 noundef %4, i32 noundef %5, i32 noundef %7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 606934642, i8 noundef signext %1, i32 noundef %9, i32 noundef %9, i32 noundef 24) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef 671491379, i8 noundef signext %1, i32 noundef %9, i32 noundef %9) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 609031793, i8 noundef signext %12, i32 noundef %2, i32 noundef %5, i32 noundef 8) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639899, i8 noundef signext %12, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef %5, i32 noundef %5) #2
  %20 = load i32, ptr %13, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %20, i32 noundef 537209432, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 8, i8 noundef signext %12, i32 noundef %4, i32 noundef 0, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639933, i8 noundef signext %12, i32 noundef %4, i32 noundef %5, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef nonnull %0, i32 noundef 805639933, i8 noundef signext %12, i32 noundef %2, i32 noundef %5, i32 noundef %4, i32 noundef %7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_mask_compute_reg(ptr noundef nonnull %0, i32 noundef -1610346172, i32 noundef %7, i32 noundef 255, i32 noundef %7, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef nonnull %0, i32 noundef 805639933, i8 noundef signext %12, i32 noundef %2, i32 noundef %9, i32 noundef %4, i32 noundef %7, i32 noundef 0) #2
  br label %22

.critedge:                                        ; preds = %10
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 609031793, i8 noundef signext %12, i32 noundef %2, i32 noundef %5, i32 noundef 8) #2
  tail call void @libxsmm_x86_instruction_vec_compute_mem_2reg(ptr noundef nonnull %0, i32 noundef 805639899, i8 noundef signext %12, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 0, i32 noundef 1, i32 noundef %5, i32 noundef %5) #2
  %21 = load i32, ptr %13, align 4, !tbaa !5
  tail call void @libxsmm_x86_instruction_vec_move(ptr noundef nonnull %0, i32 noundef %21, i32 noundef 537209432, i32 noundef 4, i32 noundef 127, i32 noundef 0, i32 noundef 8, i8 noundef signext %12, i32 noundef %4, i32 noundef 0, i32 noundef 1, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639933, i8 noundef signext %12, i32 noundef %4, i32 noundef %5, i32 noundef %5) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg(ptr noundef nonnull %0, i32 noundef 805639933, i8 noundef signext %12, i32 noundef %2, i32 noundef %5, i32 noundef %4) #2
  br label %22

22:                                               ; preds = %.critedge, %19
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask(ptr noundef nonnull %0, i32 noundef -259709338, i8 noundef signext %12, i32 noundef %4, i32 noundef %2, i32 noundef %3, i32 noundef %6, i32 noundef 0) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg_imm8(ptr noundef nonnull %0, i32 noundef 609031793, i8 noundef signext %12, i32 noundef %3, i32 noundef %3, i32 noundef 8) #2
  tail call void @libxsmm_x86_instruction_vec_compute_2reg(ptr noundef nonnull %0, i32 noundef -536468176, i8 noundef signext %12, i32 noundef %3, i32 noundef %3) #2
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 28}
!6 = !{!"libxsmm_generated_code", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass