; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution16bNhwcSpecV0)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution16b" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", %"struct.Simd::Array.0", %"struct.Simd::Array.1", %"struct.Simd::Array.1", i8, i8, i8, i64, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"class.Simd::Base::SynetConvolution16bNhwcSpecV0" = type { %"class.Simd::SynetConvolution16b", %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", %"struct.Simd::Array.2", ptr, ptr, ptr }
%"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam" = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
%"struct.Simd::Array.2" = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution16bNhwcSpecV09SetWeightEPKf(ptr noundef nonnull align 8 dereferenceable(568) %0, ptr noundef %1) unnamed_addr #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %16 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %17 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %16, i32 0, i32 1
  store ptr %17, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %18 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcSpecV0", ptr %16, i32 0, i32 1
  store ptr %18, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %16, i32 0, i32 4
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %20, i32 0, i32 9
  %22 = load i64, ptr %21, align 8, !tbaa !9
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %23, i32 0, i32 8
  %25 = load i64, ptr %24, align 8, !tbaa !12
  %26 = mul i64 %22, %25
  call void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %19, i64 noundef %26, i1 noundef zeroext true, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %27 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %16, i32 0, i32 4
  %28 = getelementptr inbounds %"struct.Simd::Array.0", ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !13
  store ptr %29, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 0, ptr %8, align 8, !tbaa !29
  br label %30

30:                                               ; preds = %150, %2
  %31 = load i64, ptr %8, align 8, !tbaa !29
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %32, i32 0, i32 5
  %34 = load i64, ptr %33, align 8, !tbaa !30
  %35 = icmp ult i64 %31, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %30
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %156

37:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 0, ptr %10, align 8, !tbaa !29
  br label %38

38:                                               ; preds = %143, %37
  %39 = load i64, ptr %10, align 8, !tbaa !29
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %40, i32 0, i32 0
  %42 = load i64, ptr %41, align 8, !tbaa !31
  %43 = icmp ult i64 %39, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %38
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %149

45:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store i64 0, ptr %11, align 8, !tbaa !29
  br label %46

46:                                               ; preds = %139, %45
  %47 = load i64, ptr %11, align 8, !tbaa !29
  %48 = load ptr, ptr %6, align 8, !tbaa !5
  %49 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %48, i32 0, i32 15
  %50 = load i64, ptr %49, align 8, !tbaa !32
  %51 = icmp ult i64 %47, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %46
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %142

53:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i64 0, ptr %12, align 8, !tbaa !29
  br label %54

54:                                               ; preds = %135, %53
  %55 = load i64, ptr %12, align 8, !tbaa !29
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %56, i32 0, i32 3
  %58 = load i64, ptr %57, align 8, !tbaa !33
  %59 = icmp ult i64 %55, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %54
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %138

61:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %62 = load ptr, ptr %4, align 8, !tbaa !5
  %63 = load i64, ptr %11, align 8, !tbaa !29
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %64, i32 0, i32 0
  %66 = load i64, ptr %65, align 8, !tbaa !31
  %67 = mul i64 %63, %66
  %68 = load i64, ptr %10, align 8, !tbaa !29
  %69 = add i64 %67, %68
  %70 = load i64, ptr %12, align 8, !tbaa !29
  %71 = add i64 %69, %70
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %72, i32 0, i32 5
  %74 = load i64, ptr %73, align 8, !tbaa !30
  %75 = mul i64 %71, %74
  %76 = getelementptr inbounds float, ptr %62, i64 %75
  %77 = load i64, ptr %8, align 8, !tbaa !29
  %78 = getelementptr inbounds float, ptr %76, i64 %77
  store ptr %78, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !29
  br label %79

79:                                               ; preds = %131, %61
  %80 = load i64, ptr %14, align 8, !tbaa !29
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %81, i32 0, i32 0
  %83 = load i64, ptr %82, align 8, !tbaa !34
  %84 = icmp ult i64 %80, %83
  br i1 %84, label %86, label %85

85:                                               ; preds = %79
  store i32 14, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  br label %134

86:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  store i64 0, ptr %15, align 8, !tbaa !29
  br label %87

87:                                               ; preds = %125, %86
  %88 = load i64, ptr %15, align 8, !tbaa !29
  %89 = icmp ult i64 %88, 2
  br i1 %89, label %91, label %90

90:                                               ; preds = %87
  store i32 17, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %128

91:                                               ; preds = %87
  %92 = load i64, ptr %8, align 8, !tbaa !29
  %93 = load i64, ptr %14, align 8, !tbaa !29
  %94 = add i64 %92, %93
  %95 = load ptr, ptr %5, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %95, i32 0, i32 5
  %97 = load i64, ptr %96, align 8, !tbaa !30
  %98 = icmp ult i64 %94, %97
  br i1 %98, label %99, label %121

99:                                               ; preds = %91
  %100 = load i64, ptr %10, align 8, !tbaa !29
  %101 = load i64, ptr %12, align 8, !tbaa !29
  %102 = add i64 %100, %101
  %103 = load i64, ptr %15, align 8, !tbaa !29
  %104 = add i64 %102, %103
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %105, i32 0, i32 0
  %107 = load i64, ptr %106, align 8, !tbaa !31
  %108 = icmp ult i64 %104, %107
  br i1 %108, label %109, label %121

109:                                              ; preds = %99
  %110 = load ptr, ptr %13, align 8, !tbaa !5
  %111 = load i64, ptr %15, align 8, !tbaa !29
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %112, i32 0, i32 5
  %114 = load i64, ptr %113, align 8, !tbaa !30
  %115 = mul i64 %111, %114
  %116 = getelementptr inbounds float, ptr %110, i64 %115
  %117 = load float, ptr %116, align 4, !tbaa !35
  %118 = call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %117)
  %119 = load ptr, ptr %7, align 8, !tbaa !5
  %120 = getelementptr inbounds i16, ptr %119, i32 1
  store ptr %120, ptr %7, align 8, !tbaa !5
  store i16 %118, ptr %119, align 2, !tbaa !37
  br label %124

121:                                              ; preds = %99, %91
  %122 = load ptr, ptr %7, align 8, !tbaa !5
  %123 = getelementptr inbounds i16, ptr %122, i32 1
  store ptr %123, ptr %7, align 8, !tbaa !5
  store i16 0, ptr %122, align 2, !tbaa !37
  br label %124

124:                                              ; preds = %121, %109
  br label %125

125:                                              ; preds = %124
  %126 = load i64, ptr %15, align 8, !tbaa !29
  %127 = add i64 %126, 1
  store i64 %127, ptr %15, align 8, !tbaa !29
  br label %87, !llvm.loop !39

128:                                              ; preds = %90
  %129 = load ptr, ptr %13, align 8, !tbaa !5
  %130 = getelementptr inbounds float, ptr %129, i32 1
  store ptr %130, ptr %13, align 8, !tbaa !5
  br label %131

131:                                              ; preds = %128
  %132 = load i64, ptr %14, align 8, !tbaa !29
  %133 = add i64 %132, 1
  store i64 %133, ptr %14, align 8, !tbaa !29
  br label %79, !llvm.loop !41

134:                                              ; preds = %85
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %135

135:                                              ; preds = %134
  %136 = load i64, ptr %12, align 8, !tbaa !29
  %137 = add i64 %136, 2
  store i64 %137, ptr %12, align 8, !tbaa !29
  br label %54, !llvm.loop !42

138:                                              ; preds = %60
  br label %139

139:                                              ; preds = %138
  %140 = load i64, ptr %11, align 8, !tbaa !29
  %141 = add i64 %140, 1
  store i64 %141, ptr %11, align 8, !tbaa !29
  br label %46, !llvm.loop !43

142:                                              ; preds = %52
  br label %143

143:                                              ; preds = %142
  %144 = load ptr, ptr %6, align 8, !tbaa !5
  %145 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %144, i32 0, i32 3
  %146 = load i64, ptr %145, align 8, !tbaa !33
  %147 = load i64, ptr %10, align 8, !tbaa !29
  %148 = add i64 %147, %146
  store i64 %148, ptr %10, align 8, !tbaa !29
  br label %38, !llvm.loop !44

149:                                              ; preds = %44
  br label %150

150:                                              ; preds = %149
  %151 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcSpecV0", ptr %16, i32 0, i32 1
  %152 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV0::AlgParam", ptr %151, i32 0, i32 0
  %153 = load i64, ptr %152, align 8, !tbaa !45
  %154 = load i64, ptr %8, align 8, !tbaa !29
  %155 = add i64 %154, %153
  store i64 %155, ptr %8, align 8, !tbaa !29
  br label %30, !llvm.loop !48

156:                                              ; preds = %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #2 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 72}
!10 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV08AlgParamE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 64}
!13 = !{!14, !6, i64 240}
!14 = !{!"_ZTSN4Simd19SynetConvolution16bE", !15, i64 0, !16, i64 8, !23, i64 192, !24, i64 208, !26, i64 240, !27, i64 256, !27, i64 272, !28, i64 288, !28, i64 289, !28, i64 290, !11, i64 296, !11, i64 304, !11, i64 312, !11, i64 320}
!15 = !{!"_ZTSN4Simd9DeletableE"}
!16 = !{!"_ZTSN4Simd9ConvParamE", !17, i64 0, !21, i64 160, !11, i64 168, !22, i64 176}
!17 = !{!"_ZTS25SimdConvolutionParameters", !11, i64 0, !11, i64 8, !11, i64 16, !18, i64 24, !19, i64 28, !11, i64 32, !11, i64 40, !11, i64 48, !18, i64 56, !19, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !20, i64 152}
!18 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!19 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!20 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!21 = !{!"_ZTS8SimdBool", !7, i64 0}
!22 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!23 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !11, i64 8}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !25, i64 0, !11, i64 8, !7, i64 16}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!26 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !11, i64 8}
!27 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !11, i64 8}
!28 = !{!"bool", !7, i64 0}
!29 = !{!11, !11, i64 0}
!30 = !{!17, !11, i64 32}
!31 = !{!17, !11, i64 0}
!32 = !{!10, !11, i64 120}
!33 = !{!10, !11, i64 24}
!34 = !{!10, !11, i64 0}
!35 = !{!36, !36, i64 0}
!36 = !{!"float", !7, i64 0}
!37 = !{!38, !38, i64 0}
!38 = !{!"short", !7, i64 0}
!39 = distinct !{!39, !40}
!40 = !{!"llvm.loop.mustprogress"}
!41 = distinct !{!41, !40}
!42 = distinct !{!42, !40}
!43 = distinct !{!43, !40}
!44 = distinct !{!44, !40}
!45 = !{!46, !11, i64 328}
!46 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV0E", !14, i64 0, !10, i64 328, !47, i64 528, !6, i64 544, !6, i64 552, !6, i64 560}
!47 = !{!"_ZTSN4Simd5ArrayIiEE", !6, i64 0, !11, i64 8}
!48 = distinct !{!48, !40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution16bNhwcSpecV09SetWeightEPKf(ptr noundef nonnull align 8 dereferenceable(568) %0, ptr nocapture noundef readonly %1) unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = getelementptr inbounds i8, ptr %0, i64 328
  %5 = getelementptr inbounds i8, ptr %0, i64 240
  %6 = getelementptr inbounds i8, ptr %0, i64 400
  %7 = load i64, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 392
  %9 = load i64, ptr %8, align 8, !tbaa !10
  %10 = mul i64 %9, %7
  tail call void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %5, i64 noundef %10, i1 noundef zeroext true, i64 noundef 8)
  %11 = getelementptr inbounds i8, ptr %0, i64 40
  %12 = load i64, ptr %11, align 8, !tbaa !11
  %.not = icmp eq i64 %12, 0
  br i1 %.not, label %._crit_edge76, label %.preheader50.lr.ph

.preheader50.lr.ph:                               ; preds = %2
  %13 = getelementptr inbounds i8, ptr %0, i64 448
  %14 = getelementptr inbounds i8, ptr %0, i64 352
  %15 = load i64, ptr %3, align 8, !tbaa !16
  %.not77 = icmp eq i64 %15, 0
  br i1 %.not77, label %._crit_edge76, label %.preheader50.preheader

.preheader50.preheader:                           ; preds = %.preheader50.lr.ph
  %16 = load ptr, ptr %5, align 8, !tbaa !17
  br label %.preheader50

.preheader50:                                     ; preds = %.preheader50.preheader, %._crit_edge70
  %17 = phi i64 [ %26, %._crit_edge70 ], [ %12, %.preheader50.preheader ]
  %18 = phi i64 [ %27, %._crit_edge70 ], [ %15, %.preheader50.preheader ]
  %19 = phi i64 [ %28, %._crit_edge70 ], [ %15, %.preheader50.preheader ]
  %20 = phi i64 [ %29, %._crit_edge70 ], [ 1, %.preheader50.preheader ]
  %.04574 = phi i64 [ %31, %._crit_edge70 ], [ 0, %.preheader50.preheader ]
  %.04673 = phi ptr [ %.1.lcssa, %._crit_edge70 ], [ %16, %.preheader50.preheader ]
  %.not78 = icmp eq i64 %20, 0
  br i1 %.not78, label %._crit_edge70, label %.preheader49.lr.ph

.preheader49.lr.ph:                               ; preds = %.preheader50
  %invariant.gep = getelementptr float, ptr %1, i64 %.04574
  %21 = load i64, ptr %13, align 8, !tbaa !30
  %.not79 = icmp eq i64 %21, 0
  br i1 %.not79, label %._crit_edge70, label %.preheader49.preheader

.preheader49.preheader:                           ; preds = %.preheader49.lr.ph
  %.pre93.pre = load i64, ptr %14, align 8, !tbaa !31
  br label %.preheader49

._crit_edge76:                                    ; preds = %._crit_edge70, %.preheader50.lr.ph, %2
  ret void

.preheader49:                                     ; preds = %.preheader49.preheader, %._crit_edge64
  %.pre93 = phi i64 [ %.pre93100, %._crit_edge64 ], [ %.pre93.pre, %.preheader49.preheader ]
  %22 = phi i64 [ %37, %._crit_edge64 ], [ %18, %.preheader49.preheader ]
  %23 = phi i64 [ %38, %._crit_edge64 ], [ %19, %.preheader49.preheader ]
  %24 = phi i64 [ %40, %._crit_edge64 ], [ %21, %.preheader49.preheader ]
  %25 = phi i64 [ %41, %._crit_edge64 ], [ %21, %.preheader49.preheader ]
  %.04468 = phi i64 [ %42, %._crit_edge64 ], [ 0, %.preheader49.preheader ]
  %.167 = phi ptr [ %.2.lcssa, %._crit_edge64 ], [ %.04673, %.preheader49.preheader ]
  %.not80 = icmp eq i64 %25, 0
  br i1 %.not80, label %._crit_edge64, label %.preheader48.lr.ph

.preheader48.lr.ph:                               ; preds = %.preheader49
  %.not81 = icmp eq i64 %.pre93, 0
  br i1 %.not81, label %._crit_edge64, label %.preheader48

._crit_edge70.loopexit88:                         ; preds = %._crit_edge64
  %.pre95 = load i64, ptr %11, align 8, !tbaa !11
  br label %._crit_edge70

._crit_edge70:                                    ; preds = %.preheader49.lr.ph, %._crit_edge70.loopexit88, %.preheader50
  %26 = phi i64 [ %17, %.preheader50 ], [ %.pre95, %._crit_edge70.loopexit88 ], [ %17, %.preheader49.lr.ph ]
  %27 = phi i64 [ %18, %.preheader50 ], [ %37, %._crit_edge70.loopexit88 ], [ %18, %.preheader49.lr.ph ]
  %28 = phi i64 [ %19, %.preheader50 ], [ %38, %._crit_edge70.loopexit88 ], [ %18, %.preheader49.lr.ph ]
  %29 = phi i64 [ 0, %.preheader50 ], [ %38, %._crit_edge70.loopexit88 ], [ %18, %.preheader49.lr.ph ]
  %.1.lcssa = phi ptr [ %.04673, %.preheader50 ], [ %.2.lcssa, %._crit_edge70.loopexit88 ], [ %.04673, %.preheader49.lr.ph ]
  %30 = load i64, ptr %4, align 8, !tbaa !32
  %31 = add i64 %30, %.04574
  %32 = icmp ult i64 %31, %26
  br i1 %32, label %.preheader50, label %._crit_edge76, !llvm.loop !35

.preheader48:                                     ; preds = %.preheader48.lr.ph, %._crit_edge58
  %.pre9399 = phi i64 [ %.pre9398, %._crit_edge58 ], [ %.pre93, %.preheader48.lr.ph ]
  %33 = phi i64 [ %44, %._crit_edge58 ], [ %24, %.preheader48.lr.ph ]
  %34 = phi i64 [ %45, %._crit_edge58 ], [ %.pre93, %.preheader48.lr.ph ]
  %35 = phi i64 [ %46, %._crit_edge58 ], [ %.pre93, %.preheader48.lr.ph ]
  %.04362 = phi i64 [ %47, %._crit_edge58 ], [ 0, %.preheader48.lr.ph ]
  %.261 = phi ptr [ %.3.lcssa, %._crit_edge58 ], [ %.167, %.preheader48.lr.ph ]
  %.not82 = icmp eq i64 %35, 0
  br i1 %.not82, label %._crit_edge58, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader48
  %36 = load i64, ptr %4, align 8, !tbaa !38
  %.not83 = icmp eq i64 %36, 0
  br i1 %.not83, label %._crit_edge58, label %.lr.ph.split

._crit_edge64.loopexit87:                         ; preds = %._crit_edge58
  %.pre94 = load i64, ptr %3, align 8, !tbaa !16
  br label %._crit_edge64

._crit_edge64:                                    ; preds = %.preheader48.lr.ph, %._crit_edge64.loopexit87, %.preheader49
  %.pre93100 = phi i64 [ %.pre93, %.preheader49 ], [ %.pre9398, %._crit_edge64.loopexit87 ], [ 0, %.preheader48.lr.ph ]
  %37 = phi i64 [ %22, %.preheader49 ], [ %.pre94, %._crit_edge64.loopexit87 ], [ %22, %.preheader48.lr.ph ]
  %38 = phi i64 [ %23, %.preheader49 ], [ %.pre94, %._crit_edge64.loopexit87 ], [ %23, %.preheader48.lr.ph ]
  %39 = phi i64 [ %.pre93, %.preheader49 ], [ %45, %._crit_edge64.loopexit87 ], [ 0, %.preheader48.lr.ph ]
  %40 = phi i64 [ %24, %.preheader49 ], [ %44, %._crit_edge64.loopexit87 ], [ %24, %.preheader48.lr.ph ]
  %41 = phi i64 [ 0, %.preheader49 ], [ %44, %._crit_edge64.loopexit87 ], [ %25, %.preheader48.lr.ph ]
  %.2.lcssa = phi ptr [ %.167, %.preheader49 ], [ %.3.lcssa, %._crit_edge64.loopexit87 ], [ %.167, %.preheader48.lr.ph ]
  %42 = add i64 %39, %.04468
  %43 = icmp ult i64 %42, %38
  br i1 %43, label %.preheader49, label %._crit_edge70.loopexit88, !llvm.loop !39

._crit_edge58.loopexit86:                         ; preds = %._crit_edge
  %.pre92 = load i64, ptr %13, align 8, !tbaa !30
  br label %._crit_edge58

._crit_edge58:                                    ; preds = %.lr.ph, %._crit_edge58.loopexit86, %.preheader48
  %.pre9398 = phi i64 [ %.pre9399, %.preheader48 ], [ %.pre9396, %._crit_edge58.loopexit86 ], [ %.pre9399, %.lr.ph ]
  %44 = phi i64 [ %33, %.preheader48 ], [ %.pre92, %._crit_edge58.loopexit86 ], [ %33, %.lr.ph ]
  %45 = phi i64 [ %34, %.preheader48 ], [ %63, %._crit_edge58.loopexit86 ], [ %34, %.lr.ph ]
  %46 = phi i64 [ 0, %.preheader48 ], [ %63, %._crit_edge58.loopexit86 ], [ %35, %.lr.ph ]
  %.3.lcssa = phi ptr [ %.261, %.preheader48 ], [ %.4.lcssa, %._crit_edge58.loopexit86 ], [ %.261, %.lr.ph ]
  %47 = add nuw i64 %.04362, 1
  %48 = icmp ult i64 %47, %44
  br i1 %48, label %.preheader48, label %._crit_edge64.loopexit87, !llvm.loop !40

.lr.ph.split:                                     ; preds = %.lr.ph, %._crit_edge
  %.pre9397 = phi i64 [ %.pre9396, %._crit_edge ], [ %.pre9399, %.lr.ph ]
  %49 = phi i64 [ %63, %._crit_edge ], [ %34, %.lr.ph ]
  %50 = phi i64 [ %64, %._crit_edge ], [ %36, %.lr.ph ]
  %51 = phi i64 [ %65, %._crit_edge ], [ 1, %.lr.ph ]
  %.04257 = phi i64 [ %66, %._crit_edge ], [ 0, %.lr.ph ]
  %.356 = phi ptr [ %.4.lcssa, %._crit_edge ], [ %.261, %.lr.ph ]
  %.not84 = icmp eq i64 %51, 0
  br i1 %.not84, label %._crit_edge, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.lr.ph.split
  %52 = add i64 %.04257, %.04468
  %53 = load i64, ptr %3, align 8, !tbaa !16
  %54 = mul i64 %53, %.04362
  %55 = add i64 %52, %54
  %56 = load i64, ptr %11, align 8, !tbaa !11
  %57 = mul i64 %55, %56
  %gep = getelementptr float, ptr %invariant.gep, i64 %57
  %58 = add i64 %52, 1
  br label %.preheader

.preheader:                                       ; preds = %.preheader.lr.ph, %.split.us
  %59 = phi i64 [ %50, %.preheader.lr.ph ], [ %68, %.split.us ]
  %.04055 = phi i64 [ 0, %.preheader.lr.ph ], [ %70, %.split.us ]
  %.04154 = phi ptr [ %gep, %.preheader.lr.ph ], [ %69, %.split.us ]
  %.453 = phi ptr [ %.356, %.preheader.lr.ph ], [ %.us-phi, %.split.us ]
  %60 = add i64 %.04055, %.04574
  %61 = load i64, ptr %11, align 8, !tbaa !11
  %62 = icmp ult i64 %60, %61
  br i1 %62, label %.preheader.split.preheader, label %.preheader.split.us.preheader

.preheader.split.us.preheader:                    ; preds = %.preheader
  store i32 0, ptr %.453, align 2
  br label %.split.us

._crit_edge.loopexit:                             ; preds = %.split.us
  %.pre91 = load i64, ptr %14, align 8, !tbaa !31
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph.split
  %.pre9396 = phi i64 [ %.pre9397, %.lr.ph.split ], [ %.pre91, %._crit_edge.loopexit ]
  %63 = phi i64 [ %49, %.lr.ph.split ], [ %.pre91, %._crit_edge.loopexit ]
  %64 = phi i64 [ %50, %.lr.ph.split ], [ %68, %._crit_edge.loopexit ]
  %65 = phi i64 [ 0, %.lr.ph.split ], [ %68, %._crit_edge.loopexit ]
  %.4.lcssa = phi ptr [ %.356, %.lr.ph.split ], [ %.us-phi, %._crit_edge.loopexit ]
  %66 = add i64 %.04257, 2
  %67 = icmp ult i64 %66, %63
  br i1 %67, label %.lr.ph.split, label %._crit_edge58.loopexit86, !llvm.loop !41

.split.us:                                        ; preds = %.preheader.split.us.preheader, %.split.us.loopexit
  %68 = phi i64 [ %.pre90, %.split.us.loopexit ], [ %59, %.preheader.split.us.preheader ]
  %.us-phi = getelementptr i8, ptr %.453, i64 4
  %69 = getelementptr inbounds i8, ptr %.04154, i64 4
  %70 = add nuw i64 %.04055, 1
  %71 = icmp ult i64 %70, %68
  br i1 %71, label %.preheader, label %._crit_edge.loopexit, !llvm.loop !42

.preheader.split.preheader:                       ; preds = %.preheader
  %72 = load i64, ptr %3, align 8, !tbaa !16
  %73 = icmp ult i64 %52, %72
  br i1 %73, label %74, label %.preheader.split.1

74:                                               ; preds = %.preheader.split.preheader
  %75 = load float, ptr %.04154, align 4, !tbaa !43
  %76 = tail call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %75)
  %.pre = load i64, ptr %11, align 8, !tbaa !11
  br label %.preheader.split.1

.preheader.split.1:                               ; preds = %.preheader.split.preheader, %74
  %77 = phi i64 [ %.pre, %74 ], [ %61, %.preheader.split.preheader ]
  %storemerge = phi i16 [ %76, %74 ], [ 0, %.preheader.split.preheader ]
  %.6 = getelementptr inbounds i8, ptr %.453, i64 2
  store i16 %storemerge, ptr %.453, align 2, !tbaa !45
  %78 = icmp ult i64 %60, %77
  %79 = load i64, ptr %3, align 8
  %80 = icmp ult i64 %58, %79
  %or.cond = select i1 %78, i1 %80, i1 false
  br i1 %or.cond, label %81, label %.split.us.loopexit

81:                                               ; preds = %.preheader.split.1
  %82 = getelementptr inbounds float, ptr %.04154, i64 %77
  %83 = load float, ptr %82, align 4, !tbaa !43
  %84 = tail call noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef %83)
  br label %.split.us.loopexit

.split.us.loopexit:                               ; preds = %81, %.preheader.split.1
  %storemerge.1 = phi i16 [ %84, %81 ], [ 0, %.preheader.split.1 ]
  store i16 %storemerge.1, ptr %.6, align 2, !tbaa !45
  %.pre90 = load i64, ptr %4, align 8, !tbaa !38
  br label %.split.us
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayItE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZN4Simd4Base17Float32ToBFloat16Ef(float noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 72}
!6 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV08AlgParamE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !7, i64 176, !7, i64 184, !7, i64 192}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 64}
!11 = !{!12, !7, i64 32}
!12 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !13, i64 24, !14, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !13, i64 56, !14, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !15, i64 152}
!13 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!14 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!15 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!16 = !{!12, !7, i64 0}
!17 = !{!18, !24, i64 240}
!18 = !{!"_ZTSN4Simd19SynetConvolution16bE", !19, i64 0, !20, i64 8, !23, i64 192, !25, i64 208, !27, i64 240, !28, i64 256, !28, i64 272, !29, i64 288, !29, i64 289, !29, i64 290, !7, i64 296, !7, i64 304, !7, i64 312, !7, i64 320}
!19 = !{!"_ZTSN4Simd9DeletableE"}
!20 = !{!"_ZTSN4Simd9ConvParamE", !12, i64 0, !21, i64 160, !7, i64 168, !22, i64 176}
!21 = !{!"_ZTS8SimdBool", !8, i64 0}
!22 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!23 = !{!"_ZTSN4Simd5ArrayIhEE", !24, i64 0, !7, i64 8}
!24 = !{!"any pointer", !8, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !7, i64 8, !8, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !24, i64 0}
!27 = !{!"_ZTSN4Simd5ArrayItEE", !24, i64 0, !7, i64 8}
!28 = !{!"_ZTSN4Simd5ArrayIfEE", !24, i64 0, !7, i64 8}
!29 = !{!"bool", !8, i64 0}
!30 = !{!6, !7, i64 120}
!31 = !{!6, !7, i64 24}
!32 = !{!33, !7, i64 328}
!33 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV0E", !18, i64 0, !6, i64 328, !34, i64 528, !24, i64 544, !24, i64 552, !24, i64 560}
!34 = !{!"_ZTSN4Simd5ArrayIiEE", !24, i64 0, !7, i64 8}
!35 = distinct !{!35, !36, !37}
!36 = !{!"llvm.loop.mustprogress"}
!37 = !{!"llvm.loop.unswitch.partial.disable"}
!38 = !{!6, !7, i64 0}
!39 = distinct !{!39, !36, !37}
!40 = distinct !{!40, !36, !37}
!41 = distinct !{!41, !36, !37}
!42 = distinct !{!42, !36}
!43 = !{!44, !44, i64 0}
!44 = !{!"float", !8, i64 0}
!45 = !{!46, !46, i64 0}
!46 = !{!"short", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass