; LLVM IR from abeaumont/competitive-programming :: kattis/countingstars.ll (Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %11 = load i32, ptr %8, align 4, !tbaa !9
  %12 = icmp slt i32 %11, 0
  br i1 %12, label %19, label %13

13:                                               ; preds = %5
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = call noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #2
  %18 = icmp uge i64 %15, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %13, %5
  br label %85

20:                                               ; preds = %13
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = icmp slt i32 %21, 0
  br i1 %22, label %32, label %23

23:                                               ; preds = %20
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  %30 = call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %29) #2
  %31 = icmp uge i64 %25, %30
  br i1 %31, label %32, label %33

32:                                               ; preds = %23, %20
  br label %85

33:                                               ; preds = %23
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #2
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = call noundef zeroext i1 @_ZNKSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %37, i64 noundef %39)
  br i1 %40, label %41, label %51

41:                                               ; preds = %33
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #2
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #2
  %49 = load i32, ptr %48, align 4, !tbaa !9
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %41, %33
  br label %85

52:                                               ; preds = %41
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #2
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #2
  store i32 %53, ptr %60, align 4, !tbaa !9
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = load i32, ptr %8, align 4, !tbaa !9
  %64 = sub nsw i32 %63, 1
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %61, ptr noundef nonnull align 8 dereferenceable(24) %62, i32 noundef %64, i32 noundef %65, i32 noundef %66)
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = load i32, ptr %8, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  %71 = load i32, ptr %9, align 4, !tbaa !9
  %72 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %67, ptr noundef nonnull align 8 dereferenceable(24) %68, i32 noundef %70, i32 noundef %71, i32 noundef %72)
  %73 = load ptr, ptr %6, align 8, !tbaa !5
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = load i32, ptr %9, align 4, !tbaa !9
  %77 = sub nsw i32 %76, 1
  %78 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %73, ptr noundef nonnull align 8 dereferenceable(24) %74, i32 noundef %75, i32 noundef %77, i32 noundef %78)
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = load ptr, ptr %7, align 8, !tbaa !5
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = load i32, ptr %9, align 4, !tbaa !9
  %83 = add nsw i32 %82, 1
  %84 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %79, ptr noundef nonnull align 8 dereferenceable(24) %80, i32 noundef %81, i32 noundef %83, i32 noundef %84)
  br label %85

85:                                               ; preds = %52, %51, %32, %19
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp slt i32 %2, 0
  br i1 %6, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %7 = zext nneg i32 %2 to i64
  %8 = add nsw i32 %2, -1
  %9 = add nuw nsw i32 %2, 1
  %10 = icmp slt i32 %3, 0
  %11 = tail call noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %12 = icmp ule i64 %11, %7
  %or.cond50 = or i1 %10, %12
  br i1 %or.cond50, label %._crit_edge, label %.lr.ph52

.lr.ph52:                                         ; preds = %.lr.ph
  %13 = zext nneg i32 %3 to i64
  br label %14

14:                                               ; preds = %.lr.ph52, %tailrecurse
  %indvars.iv51 = phi i64 [ %13, %.lr.ph52 ], [ %indvars.iv.next, %tailrecurse ]
  %15 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %7) #2
  %16 = tail call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %15) #2
  %.not = icmp ugt i64 %16, %indvars.iv51
  br i1 %.not, label %17, label %._crit_edge

17:                                               ; preds = %14
  %18 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %7) #2
  %19 = tail call noundef zeroext i1 @_ZNKSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %18, i64 noundef %indvars.iv51)
  br i1 %19, label %20, label %._crit_edge

20:                                               ; preds = %17
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %7) #2
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv51) #2
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %.not40 = icmp eq i32 %23, 0
  br i1 %.not40, label %tailrecurse, label %._crit_edge

tailrecurse:                                      ; preds = %20
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %7) #2
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %indvars.iv51) #2
  store i32 %4, ptr %25, align 4, !tbaa !5
  %26 = trunc nuw i64 %indvars.iv51 to i32
  tail call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %8, i32 noundef %26, i32 noundef %4)
  tail call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %9, i32 noundef %26, i32 noundef %4)
  %27 = add nsw i32 %26, -1
  tail call void @_Z6searchRKSt6vectorIS_IbSaIbEESaIS1_EERS_IS_IiSaIiEESaIS7_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %27, i32 noundef %4)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv51, 1
  %28 = tail call noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %29 = icmp ule i64 %28, %7
  %or.cond = or i1 %10, %29
  br i1 %or.cond, label %._crit_edge, label %14

._crit_edge:                                      ; preds = %17, %20, %14, %tailrecurse, %.lr.ph, %5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNKSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass