; LLVM IR from ermig1979/Simd :: src/Simd (SimdBaseSynetConvolution16bNhwcSpecV1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Simd::SynetConvolution16b" = type { %"struct.Simd::Deletable", %"struct.Simd::ConvParam", %"struct.Simd::Array", %"class.std::__cxx11::basic_string", %"struct.Simd::Array.0", %"struct.Simd::Array.1", %"struct.Simd::Array.1", i8, i8, i8, i64, i64, i64, i64 }
%"struct.Simd::Deletable" = type { ptr }
%"struct.Simd::ConvParam" = type <{ %struct.SimdConvolutionParameters, i32, [4 x i8], i64, i32, [4 x i8] }>
%struct.SimdConvolutionParameters = type { i64, i64, i64, i32, i32, i64, i64, i64, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32 }
%"struct.Simd::Array" = type { ptr, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.Simd::Array.0" = type { ptr, i64 }
%"struct.Simd::Array.1" = type { ptr, i64 }
%"class.Simd::Base::SynetConvolution16bNhwcSpecV1" = type { %"class.Simd::SynetConvolution16b", %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", %"struct.Simd::Array.2", ptr, ptr, ptr }
%"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam" = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
%"struct.Simd::Array.2" = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution16bNhwcSpecV111SetAlgParamEmmmmmmm(ptr noundef nonnull align 8 dereferenceable(536) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) #1 align 2 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store i64 %4, ptr %13, align 8, !tbaa !9
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  store i64 %7, ptr %16, align 8, !tbaa !9
  %30 = load ptr, ptr %9, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  %31 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 1
  store ptr %31, ptr %17, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %32 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcSpecV1", ptr %30, i32 0, i32 1
  store ptr %32, ptr %18, align 8, !tbaa !5
  %33 = load i64, ptr %10, align 8, !tbaa !9
  %34 = load ptr, ptr %18, align 8, !tbaa !5
  %35 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %34, i32 0, i32 9
  store i64 %33, ptr %35, align 8, !tbaa !11
  %36 = load i64, ptr %11, align 8, !tbaa !9
  %37 = load ptr, ptr %18, align 8, !tbaa !5
  %38 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %37, i32 0, i32 10
  store i64 %36, ptr %38, align 8, !tbaa !13
  %39 = load i64, ptr %12, align 8, !tbaa !9
  %40 = load ptr, ptr %18, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %40, i32 0, i32 11
  store i64 %39, ptr %41, align 8, !tbaa !14
  %42 = load i64, ptr %13, align 8, !tbaa !9
  %43 = load ptr, ptr %18, align 8, !tbaa !5
  %44 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %43, i32 0, i32 12
  store i64 %42, ptr %44, align 8, !tbaa !15
  %45 = load ptr, ptr %17, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %45, i32 0, i32 16
  %47 = load i64, ptr %46, align 8, !tbaa !16
  %48 = load ptr, ptr %17, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %48, i32 0, i32 18
  %50 = load i64, ptr %49, align 8, !tbaa !21
  %51 = call noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef %47, i64 noundef %50)
  %52 = load ptr, ptr %18, align 8, !tbaa !5
  %53 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %52, i32 0, i32 6
  store i64 %51, ptr %53, align 8, !tbaa !22
  %54 = load ptr, ptr %17, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %54, i32 0, i32 17
  %56 = load i64, ptr %55, align 8, !tbaa !23
  %57 = load ptr, ptr %17, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %57, i32 0, i32 19
  %59 = load i64, ptr %58, align 8, !tbaa !24
  %60 = call noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef %56, i64 noundef %59)
  %61 = load ptr, ptr %18, align 8, !tbaa !5
  %62 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %61, i32 0, i32 7
  store i64 %60, ptr %62, align 8, !tbaa !25
  %63 = load ptr, ptr %17, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %63, i32 0, i32 1
  %65 = load i64, ptr %64, align 8, !tbaa !26
  %66 = load ptr, ptr %18, align 8, !tbaa !5
  %67 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %66, i32 0, i32 6
  %68 = load i64, ptr %67, align 8, !tbaa !22
  %69 = add i64 %65, %68
  %70 = load ptr, ptr %18, align 8, !tbaa !5
  %71 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %70, i32 0, i32 1
  store i64 %69, ptr %71, align 8, !tbaa !27
  %72 = load ptr, ptr %17, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %72, i32 0, i32 2
  %74 = load i64, ptr %73, align 8, !tbaa !28
  %75 = load ptr, ptr %18, align 8, !tbaa !5
  %76 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %75, i32 0, i32 7
  %77 = load i64, ptr %76, align 8, !tbaa !25
  %78 = add i64 %74, %77
  %79 = load ptr, ptr %18, align 8, !tbaa !5
  %80 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %79, i32 0, i32 2
  store i64 %78, ptr %80, align 8, !tbaa !29
  %81 = load ptr, ptr %18, align 8, !tbaa !5
  %82 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %81, i32 0, i32 2
  %83 = load i64, ptr %82, align 8, !tbaa !29
  %84 = load ptr, ptr %18, align 8, !tbaa !5
  %85 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %84, i32 0, i32 7
  %86 = load i64, ptr %85, align 8, !tbaa !25
  %87 = add i64 %83, %86
  %88 = load ptr, ptr %18, align 8, !tbaa !5
  %89 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %88, i32 0, i32 6
  %90 = load i64, ptr %89, align 8, !tbaa !22
  %91 = mul i64 %87, %90
  %92 = load ptr, ptr %18, align 8, !tbaa !5
  %93 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %92, i32 0, i32 9
  %94 = load i64, ptr %93, align 8, !tbaa !11
  %95 = add i64 %91, %94
  %96 = load ptr, ptr %18, align 8, !tbaa !5
  %97 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %96, i32 0, i32 8
  store i64 %95, ptr %97, align 8, !tbaa !30
  %98 = load ptr, ptr %17, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %98, i32 0, i32 5
  %100 = load i64, ptr %99, align 8, !tbaa !31
  %101 = load ptr, ptr %18, align 8, !tbaa !5
  %102 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %101, i32 0, i32 9
  %103 = load i64, ptr %102, align 8, !tbaa !11
  %104 = call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %100, i64 noundef %103)
  %105 = load ptr, ptr %18, align 8, !tbaa !5
  %106 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %105, i32 0, i32 3
  store i64 %104, ptr %106, align 8, !tbaa !32
  %107 = load ptr, ptr %17, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %107, i32 0, i32 11
  %109 = load i64, ptr %108, align 8, !tbaa !33
  %110 = load ptr, ptr %17, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %110, i32 0, i32 0
  %112 = load i64, ptr %111, align 8, !tbaa !34
  %113 = mul i64 %109, %112
  %114 = load ptr, ptr %18, align 8, !tbaa !5
  %115 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %114, i32 0, i32 12
  %116 = load i64, ptr %115, align 8, !tbaa !15
  %117 = call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %113, i64 noundef %116)
  %118 = load ptr, ptr %18, align 8, !tbaa !5
  %119 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %118, i32 0, i32 4
  store i64 %117, ptr %119, align 8, !tbaa !35
  %120 = load ptr, ptr %18, align 8, !tbaa !5
  %121 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %120, i32 0, i32 4
  %122 = load i64, ptr %121, align 8, !tbaa !35
  %123 = load ptr, ptr %17, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %123, i32 0, i32 10
  %125 = load i64, ptr %124, align 8, !tbaa !36
  %126 = mul i64 %122, %125
  %127 = load ptr, ptr %18, align 8, !tbaa !5
  %128 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %127, i32 0, i32 5
  store i64 %126, ptr %128, align 8, !tbaa !37
  %129 = load i64, ptr %14, align 8, !tbaa !9
  %130 = load ptr, ptr %18, align 8, !tbaa !5
  %131 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %130, i32 0, i32 10
  %132 = load i64, ptr %131, align 8, !tbaa !13
  %133 = udiv i64 %129, %132
  %134 = udiv i64 %133, 2
  %135 = load ptr, ptr %18, align 8, !tbaa !5
  %136 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %135, i32 0, i32 12
  %137 = load i64, ptr %136, align 8, !tbaa !15
  %138 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %134, i64 noundef %137)
  %139 = load ptr, ptr %18, align 8, !tbaa !5
  %140 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %139, i32 0, i32 12
  %141 = load i64, ptr %140, align 8, !tbaa !15
  %142 = load ptr, ptr %18, align 8, !tbaa !5
  %143 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %142, i32 0, i32 5
  %144 = load i64, ptr %143, align 8, !tbaa !37
  %145 = call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %138, i64 noundef %141, i64 noundef %144)
  %146 = load ptr, ptr %18, align 8, !tbaa !5
  %147 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %146, i32 0, i32 15
  store i64 %145, ptr %147, align 8, !tbaa !38
  %148 = load ptr, ptr %18, align 8, !tbaa !5
  %149 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %148, i32 0, i32 15
  %150 = load i64, ptr %149, align 8, !tbaa !38
  %151 = load ptr, ptr %18, align 8, !tbaa !5
  %152 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %151, i32 0, i32 12
  %153 = load i64, ptr %152, align 8, !tbaa !15
  %154 = udiv i64 %150, %153
  %155 = load ptr, ptr %18, align 8, !tbaa !5
  %156 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %155, i32 0, i32 17
  store i64 %154, ptr %156, align 8, !tbaa !39
  %157 = load ptr, ptr %18, align 8, !tbaa !5
  %158 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %157, i32 0, i32 0
  store i64 1, ptr %158, align 8, !tbaa !40
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  %159 = load ptr, ptr %17, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %159, i32 0, i32 0
  %161 = load i64, ptr %160, align 8, !tbaa !34
  %162 = load ptr, ptr %18, align 8, !tbaa !5
  %163 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %162, i32 0, i32 1
  %164 = load i64, ptr %163, align 8, !tbaa !27
  %165 = mul i64 %161, %164
  %166 = load ptr, ptr %18, align 8, !tbaa !5
  %167 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %166, i32 0, i32 2
  %168 = load i64, ptr %167, align 8, !tbaa !29
  %169 = mul i64 %165, %168
  %170 = load ptr, ptr %18, align 8, !tbaa !5
  %171 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %170, i32 0, i32 12
  %172 = load i64, ptr %171, align 8, !tbaa !15
  %173 = add i64 %169, %172
  %174 = mul i64 %173, 2
  store i64 %174, ptr %19, align 8, !tbaa !9
  %175 = load i64, ptr %19, align 8, !tbaa !9
  %176 = mul i64 %175, 2
  %177 = load i64, ptr %15, align 8, !tbaa !9
  %178 = icmp ule i64 %176, %177
  br i1 %178, label %179, label %214

179:                                              ; preds = %8
  %180 = load ptr, ptr %17, align 8, !tbaa !5
  %181 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %180, i32 0, i32 3
  %182 = load i64, ptr %181, align 8, !tbaa !41
  %183 = icmp ugt i64 %182, 1
  br i1 %183, label %184, label %214

184:                                              ; preds = %179
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #4
  store i64 1, ptr %20, align 8, !tbaa !9
  br label %185

185:                                              ; preds = %210, %184
  %186 = load i64, ptr %20, align 8, !tbaa !9
  %187 = load ptr, ptr %17, align 8, !tbaa !5
  %188 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %187, i32 0, i32 3
  %189 = load i64, ptr %188, align 8, !tbaa !41
  %190 = icmp ule i64 %186, %189
  br i1 %190, label %192, label %191

191:                                              ; preds = %185
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #4
  br label %213

192:                                              ; preds = %185
  %193 = load ptr, ptr %17, align 8, !tbaa !5
  %194 = getelementptr inbounds %"struct.Simd::ConvParam", ptr %193, i32 0, i32 3
  %195 = load i64, ptr %194, align 8, !tbaa !41
  %196 = load i64, ptr %20, align 8, !tbaa !9
  %197 = urem i64 %195, %196
  %198 = icmp eq i64 %197, 0
  br i1 %198, label %199, label %209

199:                                              ; preds = %192
  %200 = load i64, ptr %20, align 8, !tbaa !9
  %201 = load i64, ptr %19, align 8, !tbaa !9
  %202 = mul i64 %200, %201
  %203 = load i64, ptr %15, align 8, !tbaa !9
  %204 = icmp ule i64 %202, %203
  br i1 %204, label %205, label %209

205:                                              ; preds = %199
  %206 = load i64, ptr %20, align 8, !tbaa !9
  %207 = load ptr, ptr %18, align 8, !tbaa !5
  %208 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %207, i32 0, i32 0
  store i64 %206, ptr %208, align 8, !tbaa !40
  br label %209

209:                                              ; preds = %205, %199, %192
  br label %210

210:                                              ; preds = %209
  %211 = load i64, ptr %20, align 8, !tbaa !9
  %212 = add i64 %211, 1
  store i64 %212, ptr %20, align 8, !tbaa !9
  br label %185, !llvm.loop !45

213:                                              ; preds = %191
  br label %214

214:                                              ; preds = %213, %179, %8
  %215 = load i64, ptr %15, align 8, !tbaa !9
  %216 = load ptr, ptr %18, align 8, !tbaa !5
  %217 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %216, i32 0, i32 15
  %218 = load i64, ptr %217, align 8, !tbaa !38
  %219 = load ptr, ptr %17, align 8, !tbaa !5
  %220 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %219, i32 0, i32 11
  %221 = load i64, ptr %220, align 8, !tbaa !33
  %222 = udiv i64 %218, %221
  %223 = mul i64 %222, 2
  %224 = udiv i64 %215, %223
  %225 = load ptr, ptr %17, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %225, i32 0, i32 6
  %227 = load i64, ptr %226, align 8, !tbaa !47
  %228 = load ptr, ptr %18, align 8, !tbaa !5
  %229 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %228, i32 0, i32 0
  %230 = load i64, ptr %229, align 8, !tbaa !40
  %231 = mul i64 %227, %230
  %232 = call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %224, i64 noundef 1, i64 noundef %231)
  %233 = load ptr, ptr %18, align 8, !tbaa !5
  %234 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %233, i32 0, i32 14
  store i64 %232, ptr %234, align 8, !tbaa !48
  %235 = load i64, ptr %16, align 8, !tbaa !9
  %236 = load ptr, ptr %18, align 8, !tbaa !5
  %237 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %236, i32 0, i32 15
  %238 = load i64, ptr %237, align 8, !tbaa !38
  %239 = udiv i64 %235, %238
  %240 = udiv i64 %239, 2
  %241 = load ptr, ptr %18, align 8, !tbaa !5
  %242 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %241, i32 0, i32 10
  %243 = load i64, ptr %242, align 8, !tbaa !13
  %244 = call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %240, i64 noundef %243)
  %245 = load ptr, ptr %18, align 8, !tbaa !5
  %246 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %245, i32 0, i32 10
  %247 = load i64, ptr %246, align 8, !tbaa !13
  %248 = load ptr, ptr %17, align 8, !tbaa !5
  %249 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %248, i32 0, i32 5
  %250 = load i64, ptr %249, align 8, !tbaa !31
  %251 = load ptr, ptr %18, align 8, !tbaa !5
  %252 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %251, i32 0, i32 10
  %253 = load i64, ptr %252, align 8, !tbaa !13
  %254 = call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %250, i64 noundef %253)
  %255 = call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %244, i64 noundef %247, i64 noundef %254)
  %256 = load ptr, ptr %18, align 8, !tbaa !5
  %257 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %256, i32 0, i32 13
  store i64 %255, ptr %257, align 8, !tbaa !49
  %258 = load ptr, ptr %17, align 8, !tbaa !5
  %259 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %258, i32 0, i32 6
  %260 = load i64, ptr %259, align 8, !tbaa !47
  %261 = load ptr, ptr %18, align 8, !tbaa !5
  %262 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %261, i32 0, i32 0
  %263 = load i64, ptr %262, align 8, !tbaa !40
  %264 = mul i64 %260, %263
  %265 = load ptr, ptr %18, align 8, !tbaa !5
  %266 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %265, i32 0, i32 14
  %267 = load i64, ptr %266, align 8, !tbaa !48
  %268 = call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %264, i64 noundef %267)
  %269 = load ptr, ptr %18, align 8, !tbaa !5
  %270 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %269, i32 0, i32 16
  store i64 %268, ptr %270, align 8, !tbaa !50
  %271 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 11
  %272 = load i64, ptr %271, align 8, !tbaa !51
  %273 = load ptr, ptr %18, align 8, !tbaa !5
  %274 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %273, i32 0, i32 20
  store i64 %272, ptr %274, align 8, !tbaa !60
  %275 = load ptr, ptr %18, align 8, !tbaa !5
  %276 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %275, i32 0, i32 0
  %277 = load i64, ptr %276, align 8, !tbaa !40
  %278 = load ptr, ptr %18, align 8, !tbaa !5
  %279 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %278, i32 0, i32 1
  %280 = load i64, ptr %279, align 8, !tbaa !27
  %281 = mul i64 %277, %280
  %282 = load ptr, ptr %18, align 8, !tbaa !5
  %283 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %282, i32 0, i32 2
  %284 = load i64, ptr %283, align 8, !tbaa !29
  %285 = mul i64 %281, %284
  %286 = load ptr, ptr %18, align 8, !tbaa !5
  %287 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %286, i32 0, i32 8
  %288 = load i64, ptr %287, align 8, !tbaa !30
  %289 = add i64 %285, %288
  %290 = load ptr, ptr %17, align 8, !tbaa !5
  %291 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %290, i32 0, i32 0
  %292 = load i64, ptr %291, align 8, !tbaa !34
  %293 = mul i64 %289, %292
  %294 = load ptr, ptr %18, align 8, !tbaa !5
  %295 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %294, i32 0, i32 12
  %296 = load i64, ptr %295, align 8, !tbaa !15
  %297 = add i64 %293, %296
  %298 = load ptr, ptr %18, align 8, !tbaa !5
  %299 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %298, i32 0, i32 18
  store i64 %297, ptr %299, align 8, !tbaa !61
  %300 = load ptr, ptr %18, align 8, !tbaa !5
  %301 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %300, i32 0, i32 0
  %302 = load i64, ptr %301, align 8, !tbaa !40
  %303 = load ptr, ptr %18, align 8, !tbaa !5
  %304 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %303, i32 0, i32 1
  %305 = load i64, ptr %304, align 8, !tbaa !27
  %306 = mul i64 %302, %305
  %307 = load ptr, ptr %18, align 8, !tbaa !5
  %308 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %307, i32 0, i32 2
  %309 = load i64, ptr %308, align 8, !tbaa !29
  %310 = mul i64 %306, %309
  %311 = load ptr, ptr %18, align 8, !tbaa !5
  %312 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %311, i32 0, i32 16
  %313 = load i64, ptr %312, align 8, !tbaa !50
  %314 = load ptr, ptr %18, align 8, !tbaa !5
  %315 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %314, i32 0, i32 9
  %316 = load i64, ptr %315, align 8, !tbaa !11
  %317 = mul i64 %313, %316
  %318 = add i64 %310, %317
  %319 = load ptr, ptr %18, align 8, !tbaa !5
  %320 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %319, i32 0, i32 13
  %321 = load i64, ptr %320, align 8, !tbaa !49
  %322 = mul i64 %318, %321
  %323 = load ptr, ptr %18, align 8, !tbaa !5
  %324 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %323, i32 0, i32 19
  store i64 %322, ptr %324, align 8, !tbaa !62
  %325 = load ptr, ptr %17, align 8, !tbaa !5
  %326 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %325, i32 0, i32 1
  %327 = load i64, ptr %326, align 8, !tbaa !26
  %328 = load ptr, ptr %17, align 8, !tbaa !5
  %329 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %328, i32 0, i32 2
  %330 = load i64, ptr %329, align 8, !tbaa !28
  %331 = mul i64 %327, %330
  %332 = load ptr, ptr %17, align 8, !tbaa !5
  %333 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %332, i32 0, i32 0
  %334 = load i64, ptr %333, align 8, !tbaa !34
  %335 = mul i64 %331, %334
  %336 = load ptr, ptr %18, align 8, !tbaa !5
  %337 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %336, i32 0, i32 0
  %338 = load i64, ptr %337, align 8, !tbaa !40
  %339 = mul i64 %335, %338
  %340 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 10
  %341 = load i64, ptr %340, align 8, !tbaa !63
  %342 = mul i64 %339, %341
  %343 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 12
  store i64 %342, ptr %343, align 8, !tbaa !64
  %344 = load ptr, ptr %17, align 8, !tbaa !5
  %345 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %344, i32 0, i32 6
  %346 = load i64, ptr %345, align 8, !tbaa !47
  %347 = load ptr, ptr %17, align 8, !tbaa !5
  %348 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %347, i32 0, i32 7
  %349 = load i64, ptr %348, align 8, !tbaa !65
  %350 = mul i64 %346, %349
  %351 = load ptr, ptr %17, align 8, !tbaa !5
  %352 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %351, i32 0, i32 5
  %353 = load i64, ptr %352, align 8, !tbaa !31
  %354 = mul i64 %350, %353
  %355 = load ptr, ptr %18, align 8, !tbaa !5
  %356 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %355, i32 0, i32 0
  %357 = load i64, ptr %356, align 8, !tbaa !40
  %358 = mul i64 %354, %357
  %359 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 11
  %360 = load i64, ptr %359, align 8, !tbaa !51
  %361 = mul i64 %358, %360
  %362 = getelementptr inbounds %"class.Simd::SynetConvolution16b", ptr %30, i32 0, i32 13
  store i64 %361, ptr %362, align 8, !tbaa !66
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  %363 = load ptr, ptr %18, align 8, !tbaa !5
  %364 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %363, i32 0, i32 4
  %365 = load i64, ptr %364, align 8, !tbaa !35
  %366 = trunc i64 %365 to i32
  store i32 %366, ptr %21, align 4, !tbaa !67
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %367 = load ptr, ptr %17, align 8, !tbaa !5
  %368 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %367, i32 0, i32 10
  %369 = load i64, ptr %368, align 8, !tbaa !36
  %370 = trunc i64 %369 to i32
  store i32 %370, ptr %22, align 4, !tbaa !67
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  %371 = load ptr, ptr %17, align 8, !tbaa !5
  %372 = getelementptr inbounds %struct.SimdConvolutionParameters, ptr %371, i32 0, i32 0
  %373 = load i64, ptr %372, align 8, !tbaa !34
  %374 = load ptr, ptr %18, align 8, !tbaa !5
  %375 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %374, i32 0, i32 2
  %376 = load i64, ptr %375, align 8, !tbaa !29
  %377 = mul i64 %373, %376
  %378 = trunc i64 %377 to i32
  store i32 %378, ptr %23, align 4, !tbaa !67
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %379 = load ptr, ptr %18, align 8, !tbaa !5
  %380 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %379, i32 0, i32 12
  %381 = load i64, ptr %380, align 8, !tbaa !15
  %382 = trunc i64 %381 to i32
  store i32 %382, ptr %24, align 4, !tbaa !67
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %383 = load ptr, ptr %18, align 8, !tbaa !5
  %384 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %383, i32 0, i32 5
  %385 = load i64, ptr %384, align 8, !tbaa !37
  %386 = load ptr, ptr %18, align 8, !tbaa !5
  %387 = getelementptr inbounds %"struct.Simd::Base::SynetConvolution16bNhwcSpecV1::AlgParam", ptr %386, i32 0, i32 12
  %388 = load i64, ptr %387, align 8, !tbaa !15
  %389 = udiv i64 %385, %388
  %390 = trunc i64 %389 to i32
  store i32 %390, ptr %25, align 4, !tbaa !67
  %391 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcSpecV1", ptr %30, i32 0, i32 2
  %392 = load i32, ptr %25, align 4, !tbaa !67
  %393 = sext i32 %392 to i64
  call void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %391, i64 noundef %393, i1 noundef zeroext false, i64 noundef 8)
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  store i32 0, ptr %26, align 4, !tbaa !67
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #4
  store i32 0, ptr %27, align 4, !tbaa !67
  br label %394

394:                                              ; preds = %422, %214
  %395 = load i32, ptr %26, align 4, !tbaa !67
  %396 = load i32, ptr %22, align 4, !tbaa !67
  %397 = icmp slt i32 %395, %396
  br i1 %397, label %399, label %398

398:                                              ; preds = %394
  store i32 5, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  br label %425

399:                                              ; preds = %394
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #4
  store i32 0, ptr %29, align 4, !tbaa !67
  br label %400

400:                                              ; preds = %415, %399
  %401 = load i32, ptr %29, align 4, !tbaa !67
  %402 = load i32, ptr %21, align 4, !tbaa !67
  %403 = icmp slt i32 %401, %402
  br i1 %403, label %405, label %404

404:                                              ; preds = %400
  store i32 8, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #4
  br label %421

405:                                              ; preds = %400
  %406 = load i32, ptr %26, align 4, !tbaa !67
  %407 = load i32, ptr %23, align 4, !tbaa !67
  %408 = mul nsw i32 %406, %407
  %409 = load i32, ptr %29, align 4, !tbaa !67
  %410 = add nsw i32 %408, %409
  %411 = getelementptr inbounds %"class.Simd::Base::SynetConvolution16bNhwcSpecV1", ptr %30, i32 0, i32 2
  %412 = load i32, ptr %27, align 4, !tbaa !67
  %413 = sext i32 %412 to i64
  %414 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIiEixEm(ptr noundef nonnull align 8 dereferenceable(16) %411, i64 noundef %413)
  store i32 %410, ptr %414, align 4, !tbaa !67
  br label %415

415:                                              ; preds = %405
  %416 = load i32, ptr %24, align 4, !tbaa !67
  %417 = load i32, ptr %29, align 4, !tbaa !67
  %418 = add nsw i32 %417, %416
  store i32 %418, ptr %29, align 4, !tbaa !67
  %419 = load i32, ptr %27, align 4, !tbaa !67
  %420 = add nsw i32 %419, 1
  store i32 %420, ptr %27, align 4, !tbaa !67
  br label %400, !llvm.loop !69

421:                                              ; preds = %404
  br label %422

422:                                              ; preds = %421
  %423 = load i32, ptr %26, align 4, !tbaa !67
  %424 = add nsw i32 %423, 1
  store i32 %424, ptr %26, align 4, !tbaa !67
  br label %394, !llvm.loop !70

425:                                              ; preds = %398
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef, i64 noundef, i64 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) #3 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIiEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 72}
!12 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV18AlgParamE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160}
!13 = !{!12, !10, i64 80}
!14 = !{!12, !10, i64 88}
!15 = !{!12, !10, i64 96}
!16 = !{!17, !10, i64 112}
!17 = !{!"_ZTS25SimdConvolutionParameters", !10, i64 0, !10, i64 8, !10, i64 16, !18, i64 24, !19, i64 28, !10, i64 32, !10, i64 40, !10, i64 48, !18, i64 56, !19, i64 60, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !20, i64 152}
!18 = !{!"_ZTS18SimdTensorDataType", !7, i64 0}
!19 = !{!"_ZTS20SimdTensorFormatType", !7, i64 0}
!20 = !{!"_ZTS29SimdConvolutionActivationType", !7, i64 0}
!21 = !{!17, !10, i64 128}
!22 = !{!12, !10, i64 48}
!23 = !{!17, !10, i64 120}
!24 = !{!17, !10, i64 136}
!25 = !{!12, !10, i64 56}
!26 = !{!17, !10, i64 8}
!27 = !{!12, !10, i64 8}
!28 = !{!17, !10, i64 16}
!29 = !{!12, !10, i64 16}
!30 = !{!12, !10, i64 64}
!31 = !{!17, !10, i64 32}
!32 = !{!12, !10, i64 24}
!33 = !{!17, !10, i64 72}
!34 = !{!17, !10, i64 0}
!35 = !{!12, !10, i64 32}
!36 = !{!17, !10, i64 64}
!37 = !{!12, !10, i64 40}
!38 = !{!12, !10, i64 120}
!39 = !{!12, !10, i64 136}
!40 = !{!12, !10, i64 0}
!41 = !{!42, !10, i64 168}
!42 = !{!"_ZTSN4Simd9ConvParamE", !17, i64 0, !43, i64 160, !10, i64 168, !44, i64 176}
!43 = !{!"_ZTS8SimdBool", !7, i64 0}
!44 = !{!"_ZTS26SimdSynetCompatibilityType", !7, i64 0}
!45 = distinct !{!45, !46}
!46 = !{!"llvm.loop.mustprogress"}
!47 = !{!17, !10, i64 40}
!48 = !{!12, !10, i64 112}
!49 = !{!12, !10, i64 104}
!50 = !{!12, !10, i64 128}
!51 = !{!52, !10, i64 304}
!52 = !{!"_ZTSN4Simd19SynetConvolution16bE", !53, i64 0, !42, i64 8, !54, i64 192, !55, i64 208, !57, i64 240, !58, i64 256, !58, i64 272, !59, i64 288, !59, i64 289, !59, i64 290, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320}
!53 = !{!"_ZTSN4Simd9DeletableE"}
!54 = !{!"_ZTSN4Simd5ArrayIhEE", !6, i64 0, !10, i64 8}
!55 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !56, i64 0, !10, i64 8, !7, i64 16}
!56 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!57 = !{!"_ZTSN4Simd5ArrayItEE", !6, i64 0, !10, i64 8}
!58 = !{!"_ZTSN4Simd5ArrayIfEE", !6, i64 0, !10, i64 8}
!59 = !{!"bool", !7, i64 0}
!60 = !{!12, !10, i64 160}
!61 = !{!12, !10, i64 144}
!62 = !{!12, !10, i64 152}
!63 = !{!52, !10, i64 296}
!64 = !{!52, !10, i64 312}
!65 = !{!17, !10, i64 48}
!66 = !{!52, !10, i64 320}
!67 = !{!68, !68, i64 0}
!68 = !{!"int", !7, i64 0}
!69 = distinct !{!69, !46}
!70 = distinct !{!70, !46}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base29SynetConvolution16bNhwcSpecV111SetAlgParamEmmmmmmm(ptr noundef nonnull align 8 dereferenceable(536) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7) local_unnamed_addr #0 align 2 {
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = getelementptr inbounds i8, ptr %0, i64 328
  %11 = getelementptr inbounds i8, ptr %0, i64 400
  store i64 %1, ptr %11, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %0, i64 408
  store i64 %2, ptr %12, align 8, !tbaa !10
  %13 = getelementptr inbounds i8, ptr %0, i64 416
  store i64 %3, ptr %13, align 8, !tbaa !11
  %14 = getelementptr inbounds i8, ptr %0, i64 424
  store i64 %4, ptr %14, align 8, !tbaa !12
  %15 = getelementptr inbounds i8, ptr %0, i64 120
  %16 = load i64, ptr %15, align 8, !tbaa !13
  %17 = getelementptr inbounds i8, ptr %0, i64 136
  %18 = load i64, ptr %17, align 8, !tbaa !18
  %19 = tail call noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef %16, i64 noundef %18)
  %20 = getelementptr inbounds i8, ptr %0, i64 376
  store i64 %19, ptr %20, align 8, !tbaa !19
  %21 = getelementptr inbounds i8, ptr %0, i64 128
  %22 = load i64, ptr %21, align 8, !tbaa !20
  %23 = getelementptr inbounds i8, ptr %0, i64 144
  %24 = load i64, ptr %23, align 8, !tbaa !21
  %25 = tail call noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef %22, i64 noundef %24)
  %26 = getelementptr inbounds i8, ptr %0, i64 384
  store i64 %25, ptr %26, align 8, !tbaa !22
  %27 = getelementptr inbounds i8, ptr %0, i64 16
  %28 = load i64, ptr %27, align 8, !tbaa !23
  %29 = load i64, ptr %20, align 8, !tbaa !19
  %30 = add i64 %29, %28
  %31 = getelementptr inbounds i8, ptr %0, i64 336
  store i64 %30, ptr %31, align 8, !tbaa !24
  %32 = getelementptr inbounds i8, ptr %0, i64 24
  %33 = load i64, ptr %32, align 8, !tbaa !25
  %34 = add i64 %33, %25
  %35 = getelementptr inbounds i8, ptr %0, i64 344
  store i64 %34, ptr %35, align 8, !tbaa !26
  %36 = add i64 %34, %25
  %37 = mul i64 %36, %29
  %38 = load i64, ptr %11, align 8, !tbaa !5
  %39 = add i64 %37, %38
  %40 = getelementptr inbounds i8, ptr %0, i64 392
  store i64 %39, ptr %40, align 8, !tbaa !27
  %41 = getelementptr inbounds i8, ptr %0, i64 40
  %42 = load i64, ptr %41, align 8, !tbaa !28
  %43 = tail call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %42, i64 noundef %38)
  %44 = getelementptr inbounds i8, ptr %0, i64 352
  store i64 %43, ptr %44, align 8, !tbaa !29
  %45 = getelementptr inbounds i8, ptr %0, i64 80
  %46 = load i64, ptr %45, align 8, !tbaa !30
  %47 = load i64, ptr %9, align 8, !tbaa !31
  %48 = mul i64 %47, %46
  %49 = load i64, ptr %14, align 8, !tbaa !12
  %50 = tail call noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef %48, i64 noundef %49)
  %51 = getelementptr inbounds i8, ptr %0, i64 360
  store i64 %50, ptr %51, align 8, !tbaa !32
  %52 = getelementptr inbounds i8, ptr %0, i64 72
  %53 = load i64, ptr %52, align 8, !tbaa !33
  %54 = mul i64 %53, %50
  %55 = getelementptr inbounds i8, ptr %0, i64 368
  store i64 %54, ptr %55, align 8, !tbaa !34
  %56 = load i64, ptr %12, align 8, !tbaa !10
  %57 = udiv i64 %5, %56
  %58 = lshr i64 %57, 1
  %59 = load i64, ptr %14, align 8, !tbaa !12
  %60 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %58, i64 noundef %59)
  %61 = load i64, ptr %14, align 8, !tbaa !12
  %62 = load i64, ptr %55, align 8, !tbaa !34
  %63 = tail call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %60, i64 noundef %61, i64 noundef %62)
  %64 = getelementptr inbounds i8, ptr %0, i64 448
  store i64 %63, ptr %64, align 8, !tbaa !35
  %65 = load i64, ptr %14, align 8, !tbaa !12
  %66 = udiv i64 %63, %65
  %67 = getelementptr inbounds i8, ptr %0, i64 464
  store i64 %66, ptr %67, align 8, !tbaa !36
  store i64 1, ptr %10, align 8, !tbaa !37
  %68 = load i64, ptr %9, align 8, !tbaa !31
  %69 = load i64, ptr %31, align 8, !tbaa !24
  %70 = mul i64 %69, %68
  %71 = load i64, ptr %35, align 8, !tbaa !26
  %72 = mul i64 %70, %71
  %73 = add i64 %72, %65
  %74 = shl i64 %73, 1
  %75 = shl i64 %73, 2
  %.not = icmp ugt i64 %75, %6
  br i1 %.not, label %.loopexit, label %76

76:                                               ; preds = %8
  %77 = getelementptr inbounds i8, ptr %0, i64 176
  %78 = load i64, ptr %77, align 8, !tbaa !38
  %79 = icmp ugt i64 %78, 1
  br i1 %79, label %.preheader129.preheader, label %.loopexit

.preheader129.preheader:                          ; preds = %76
  %80 = add i64 %78, 1
  %umax = tail call i64 @llvm.umax.i64(i64 %80, i64 2)
  %81 = add i64 %umax, -1
  %xtraiter = and i64 %81, 1
  %82 = icmp ult i64 %80, 3
  br i1 %82, label %.loopexit.loopexit.unr-lcssa, label %.preheader129.preheader.new

.preheader129.preheader.new:                      ; preds = %.preheader129.preheader
  %unroll_iter = and i64 %81, -2
  br label %.preheader129

.preheader129:                                    ; preds = %97, %.preheader129.preheader.new
  %83 = phi i64 [ 1, %.preheader129.preheader.new ], [ %92, %97 ]
  %.0124130 = phi i64 [ 1, %.preheader129.preheader.new ], [ %98, %97 ]
  %niter = phi i64 [ 0, %.preheader129.preheader.new ], [ %niter.next.1, %97 ]
  %84 = urem i64 %78, %.0124130
  %85 = icmp ne i64 %84, 0
  %86 = mul i64 %74, %.0124130
  %.not128 = icmp ugt i64 %86, %6
  %or.cond = or i1 %.not128, %85
  %87 = select i1 %or.cond, i64 %83, i64 %.0124130
  %88 = add nuw i64 %.0124130, 1
  %89 = urem i64 %78, %88
  %90 = icmp ne i64 %89, 0
  %91 = mul i64 %74, %88
  %.not128.1 = icmp ugt i64 %91, %6
  %or.cond.1 = or i1 %.not128.1, %90
  %92 = select i1 %or.cond.1, i64 %87, i64 %88
  %93 = xor i1 %or.cond, true
  %94 = xor i1 %or.cond.1, true
  %95 = or i1 %93, %94
  br i1 %95, label %96, label %97

96:                                               ; preds = %.preheader129
  store i64 %92, ptr %10, align 8, !tbaa !37
  br label %97

97:                                               ; preds = %.preheader129, %96
  %98 = add nuw i64 %.0124130, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.loopexit.loopexit.unr-lcssa, label %.preheader129, !llvm.loop !42

.loopexit.loopexit.unr-lcssa:                     ; preds = %97, %.preheader129.preheader
  %.lcssa.ph = phi i64 [ poison, %.preheader129.preheader ], [ %92, %97 ]
  %.unr = phi i64 [ 1, %.preheader129.preheader ], [ %92, %97 ]
  %.0124130.unr = phi i64 [ 1, %.preheader129.preheader ], [ %98, %97 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.preheader129.epil

.preheader129.epil:                               ; preds = %.loopexit.loopexit.unr-lcssa
  %99 = urem i64 %78, %.0124130.unr
  %100 = icmp ne i64 %99, 0
  %101 = mul i64 %74, %.0124130.unr
  %.not128.epil = icmp ugt i64 %101, %6
  %or.cond.epil = or i1 %.not128.epil, %100
  br i1 %or.cond.epil, label %.loopexit, label %102

102:                                              ; preds = %.preheader129.epil
  store i64 %.0124130.unr, ptr %10, align 8, !tbaa !37
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit.unr-lcssa, %102, %.preheader129.epil, %76, %8
  %103 = phi i64 [ 1, %76 ], [ 1, %8 ], [ %.lcssa.ph, %.loopexit.loopexit.unr-lcssa ], [ %.unr, %.preheader129.epil ], [ %.0124130.unr, %102 ]
  %104 = load i64, ptr %45, align 8, !tbaa !30
  %105 = udiv i64 %63, %104
  %106 = shl i64 %105, 1
  %107 = udiv i64 %6, %106
  %108 = getelementptr inbounds i8, ptr %0, i64 48
  %109 = load i64, ptr %108, align 8, !tbaa !44
  %110 = mul i64 %103, %109
  %111 = tail call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %107, i64 noundef 1, i64 noundef %110)
  %112 = getelementptr inbounds i8, ptr %0, i64 440
  store i64 %111, ptr %112, align 8, !tbaa !45
  %113 = load i64, ptr %64, align 8, !tbaa !35
  %114 = udiv i64 %7, %113
  %115 = lshr i64 %114, 1
  %116 = load i64, ptr %12, align 8, !tbaa !10
  %117 = tail call noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef %115, i64 noundef %116)
  %118 = load i64, ptr %12, align 8, !tbaa !10
  %119 = load i64, ptr %41, align 8, !tbaa !28
  %120 = tail call noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef %119, i64 noundef %118)
  %121 = tail call noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef %117, i64 noundef %118, i64 noundef %120)
  %122 = getelementptr inbounds i8, ptr %0, i64 432
  store i64 %121, ptr %122, align 8, !tbaa !46
  %123 = load i64, ptr %108, align 8, !tbaa !44
  %124 = load i64, ptr %10, align 8, !tbaa !37
  %125 = mul i64 %124, %123
  %126 = load i64, ptr %112, align 8, !tbaa !45
  %127 = tail call noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef %125, i64 noundef %126)
  %128 = getelementptr inbounds i8, ptr %0, i64 456
  store i64 %127, ptr %128, align 8, !tbaa !47
  %129 = getelementptr inbounds i8, ptr %0, i64 304
  %130 = load i64, ptr %129, align 8, !tbaa !48
  %131 = getelementptr inbounds i8, ptr %0, i64 488
  store i64 %130, ptr %131, align 8, !tbaa !58
  %132 = load i64, ptr %10, align 8, !tbaa !37
  %133 = load i64, ptr %31, align 8, !tbaa !24
  %134 = mul i64 %133, %132
  %135 = load i64, ptr %35, align 8, !tbaa !26
  %136 = mul i64 %134, %135
  %137 = load i64, ptr %40, align 8, !tbaa !27
  %138 = add i64 %136, %137
  %139 = load i64, ptr %9, align 8, !tbaa !31
  %140 = mul i64 %138, %139
  %141 = load i64, ptr %14, align 8, !tbaa !12
  %142 = add i64 %140, %141
  %143 = getelementptr inbounds i8, ptr %0, i64 472
  store i64 %142, ptr %143, align 8, !tbaa !59
  %144 = load i64, ptr %11, align 8, !tbaa !5
  %145 = mul i64 %144, %127
  %146 = add i64 %145, %136
  %147 = load i64, ptr %122, align 8, !tbaa !46
  %148 = mul i64 %146, %147
  %149 = getelementptr inbounds i8, ptr %0, i64 480
  store i64 %148, ptr %149, align 8, !tbaa !60
  %150 = load i64, ptr %27, align 8, !tbaa !23
  %151 = load i64, ptr %32, align 8, !tbaa !25
  %152 = getelementptr inbounds i8, ptr %0, i64 296
  %153 = load i64, ptr %152, align 8, !tbaa !61
  %154 = mul i64 %139, %132
  %155 = mul i64 %154, %150
  %156 = mul i64 %155, %151
  %157 = mul i64 %156, %153
  %158 = getelementptr inbounds i8, ptr %0, i64 312
  store i64 %157, ptr %158, align 8, !tbaa !62
  %159 = load i64, ptr %108, align 8, !tbaa !44
  %160 = getelementptr inbounds i8, ptr %0, i64 56
  %161 = load i64, ptr %160, align 8, !tbaa !63
  %162 = load i64, ptr %41, align 8, !tbaa !28
  %163 = mul i64 %132, %130
  %164 = mul i64 %163, %159
  %165 = mul i64 %164, %161
  %166 = mul i64 %165, %162
  %167 = getelementptr inbounds i8, ptr %0, i64 320
  store i64 %166, ptr %167, align 8, !tbaa !64
  %168 = load i64, ptr %51, align 8, !tbaa !32
  %169 = trunc i64 %168 to i32
  %170 = load i64, ptr %52, align 8, !tbaa !33
  %171 = trunc i64 %170 to i32
  %172 = mul i64 %139, %135
  %173 = trunc i64 %172 to i32
  %174 = trunc i64 %141 to i32
  %175 = load i64, ptr %55, align 8, !tbaa !34
  %176 = udiv i64 %175, %141
  %177 = getelementptr inbounds i8, ptr %0, i64 496
  %sext = shl i64 %176, 32
  %178 = ashr exact i64 %sext, 32
  tail call void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16) %177, i64 noundef %178, i1 noundef zeroext false, i64 noundef 8)
  %179 = icmp sgt i32 %171, 0
  %180 = icmp sgt i32 %169, 0
  %or.cond140 = select i1 %179, i1 %180, i1 false
  br i1 %or.cond140, label %.preheader.us, label %._crit_edge135

.preheader.us:                                    ; preds = %.loopexit, %._crit_edge.us
  %.0122134.us = phi i64 [ %indvars.iv.next, %._crit_edge.us ], [ 0, %.loopexit ]
  %.0123133.us = phi i32 [ %188, %._crit_edge.us ], [ 0, %.loopexit ]
  %181 = mul nsw i32 %.0123133.us, %173
  %sext139 = shl i64 %.0122134.us, 32
  %182 = ashr exact i64 %sext139, 32
  br label %183

183:                                              ; preds = %.preheader.us, %183
  %indvars.iv = phi i64 [ %182, %.preheader.us ], [ %indvars.iv.next, %183 ]
  %.0132.us = phi i32 [ 0, %.preheader.us ], [ %186, %183 ]
  %184 = add nsw i32 %.0132.us, %181
  %185 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIiEixEm(ptr noundef nonnull align 8 dereferenceable(16) %177, i64 noundef %indvars.iv)
  store i32 %184, ptr %185, align 4, !tbaa !65
  %186 = add nsw i32 %.0132.us, %174
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %187 = icmp slt i32 %186, %169
  br i1 %187, label %183, label %._crit_edge.us, !llvm.loop !67

._crit_edge.us:                                   ; preds = %183
  %188 = add nuw nsw i32 %.0123133.us, 1
  %exitcond138.not = icmp eq i32 %188, %171
  br i1 %exitcond138.not, label %._crit_edge135, label %.preheader.us, !llvm.loop !68

._crit_edge135:                                   ; preds = %._crit_edge.us, %.loopexit
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd3MaxImEET_S1_S1_(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignHiEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local noundef i64 @_ZN4Simd13RestrictRangeImEET_S1_S1_S1_(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignLoAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd10AlignHiAnyEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd5DivHiEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd5ArrayIiE6ResizeEmbm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4Simd5ArrayIiEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 72}
!6 = !{!"_ZTSN4Simd4Base29SynetConvolution16bNhwcSpecV18AlgParamE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 80}
!11 = !{!6, !7, i64 88}
!12 = !{!6, !7, i64 96}
!13 = !{!14, !7, i64 112}
!14 = !{!"_ZTS25SimdConvolutionParameters", !7, i64 0, !7, i64 8, !7, i64 16, !15, i64 24, !16, i64 28, !7, i64 32, !7, i64 40, !7, i64 48, !15, i64 56, !16, i64 60, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !17, i64 152}
!15 = !{!"_ZTS18SimdTensorDataType", !8, i64 0}
!16 = !{!"_ZTS20SimdTensorFormatType", !8, i64 0}
!17 = !{!"_ZTS29SimdConvolutionActivationType", !8, i64 0}
!18 = !{!14, !7, i64 128}
!19 = !{!6, !7, i64 48}
!20 = !{!14, !7, i64 120}
!21 = !{!14, !7, i64 136}
!22 = !{!6, !7, i64 56}
!23 = !{!14, !7, i64 8}
!24 = !{!6, !7, i64 8}
!25 = !{!14, !7, i64 16}
!26 = !{!6, !7, i64 16}
!27 = !{!6, !7, i64 64}
!28 = !{!14, !7, i64 32}
!29 = !{!6, !7, i64 24}
!30 = !{!14, !7, i64 72}
!31 = !{!14, !7, i64 0}
!32 = !{!6, !7, i64 32}
!33 = !{!14, !7, i64 64}
!34 = !{!6, !7, i64 40}
!35 = !{!6, !7, i64 120}
!36 = !{!6, !7, i64 136}
!37 = !{!6, !7, i64 0}
!38 = !{!39, !7, i64 168}
!39 = !{!"_ZTSN4Simd9ConvParamE", !14, i64 0, !40, i64 160, !7, i64 168, !41, i64 176}
!40 = !{!"_ZTS8SimdBool", !8, i64 0}
!41 = !{!"_ZTS26SimdSynetCompatibilityType", !8, i64 0}
!42 = distinct !{!42, !43}
!43 = !{!"llvm.loop.mustprogress"}
!44 = !{!14, !7, i64 40}
!45 = !{!6, !7, i64 112}
!46 = !{!6, !7, i64 104}
!47 = !{!6, !7, i64 128}
!48 = !{!49, !7, i64 304}
!49 = !{!"_ZTSN4Simd19SynetConvolution16bE", !50, i64 0, !39, i64 8, !51, i64 192, !53, i64 208, !55, i64 240, !56, i64 256, !56, i64 272, !57, i64 288, !57, i64 289, !57, i64 290, !7, i64 296, !7, i64 304, !7, i64 312, !7, i64 320}
!50 = !{!"_ZTSN4Simd9DeletableE"}
!51 = !{!"_ZTSN4Simd5ArrayIhEE", !52, i64 0, !7, i64 8}
!52 = !{!"any pointer", !8, i64 0}
!53 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !54, i64 0, !7, i64 8, !8, i64 16}
!54 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !52, i64 0}
!55 = !{!"_ZTSN4Simd5ArrayItEE", !52, i64 0, !7, i64 8}
!56 = !{!"_ZTSN4Simd5ArrayIfEE", !52, i64 0, !7, i64 8}
!57 = !{!"bool", !8, i64 0}
!58 = !{!6, !7, i64 160}
!59 = !{!6, !7, i64 144}
!60 = !{!6, !7, i64 152}
!61 = !{!49, !7, i64 296}
!62 = !{!49, !7, i64 312}
!63 = !{!14, !7, i64 48}
!64 = !{!49, !7, i64 320}
!65 = !{!66, !66, i64 0}
!66 = !{!"int", !8, i64 0}
!67 = distinct !{!67, !43}
!68 = distinct !{!68, !43}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass