; LLVM IR from libxsmm/libxsmm :: samples/encoder (encoder_x86)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @test_rex_vcompute_2reg_general(ptr noundef %0, ptr noundef %1, i32 noundef %2, i16 noundef zeroext %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i16 %3, ptr %8, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 120, ptr %10, align 1, !tbaa !13
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  call void @reset_code_buffer(ptr noundef %11, ptr noundef %12)
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %23, %4
  %14 = load i32, ptr %9, align 4, !tbaa !9
  %15 = icmp ult i32 %14, 16
  br i1 %15, label %16, label %26

16:                                               ; preds = %13
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = load i8, ptr %10, align 1, !tbaa !13
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = load i16, ptr %8, align 2, !tbaa !11
  %22 = zext i16 %21 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %17, i32 noundef %18, i8 noundef signext %19, i32 noundef %20, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %22)
  br label %23

23:                                               ; preds = %16
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = add i32 %24, 1
  store i32 %25, ptr %9, align 4, !tbaa !9
  br label %13, !llvm.loop !14

26:                                               ; preds = %13
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %37, %26
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = icmp ult i32 %28, 16
  br i1 %29, label %30, label %40

30:                                               ; preds = %27
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i8, ptr %10, align 1, !tbaa !13
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = load i16, ptr %8, align 2, !tbaa !11
  %36 = zext i16 %35 to i32
  call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %31, i32 noundef %32, i8 noundef signext %33, i32 noundef 0, i32 noundef 255, i32 noundef %34, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %36)
  br label %37

37:                                               ; preds = %30
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = add i32 %38, 1
  store i32 %39, ptr %9, align 4, !tbaa !9
  br label %27, !llvm.loop !16

40:                                               ; preds = %27
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dump_code_buffer(ptr noundef %41, ptr noundef %42)
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @reset_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dump_code_buffer(ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef, i32 noundef, i8 noundef signext, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @test_rex_vcompute_2reg_general(ptr noundef %0, ptr noundef %1, i32 noundef %2, i16 noundef zeroext %3) local_unnamed_addr #0 {
.preheader:
  tail call void @reset_code_buffer(ptr noundef %1, ptr noundef %0)
  %4 = zext i16 %3 to i32
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 1, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 2, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 3, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 4, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 5, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 6, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 7, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 8, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 9, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 10, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 11, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 12, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 13, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 14, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 15, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 1, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 2, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 3, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 4, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 5, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 6, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 7, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 8, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 9, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 10, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 11, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 12, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 13, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 14, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @libxsmm_x86_instruction_vec_compute_3reg_mask_sae_imm8(ptr noundef %1, i32 noundef %2, i8 noundef signext 120, i32 noundef 0, i32 noundef 255, i32 noundef 15, i32 noundef 0, i32 noundef 0, i8 noundef zeroext 0, i32 noundef %4) #2
  tail call void @dump_code_buffer(ptr noundef %1, ptr noundef %0)
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass