; LLVM IR from cryspen/libcrux :: sys/hacl/c/src (Hacl_Hash_Base)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external global ptr, align 8
@.str = external hidden unnamed_addr constant [35 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @Hacl_Hash_Definitions_block_len(i8 noundef zeroext %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i8, align 1
  store i8 %0, ptr %3, align 1, !tbaa !5
  %4 = load i8, ptr %3, align 1, !tbaa !5
  %5 = zext i8 %4 to i32
  switch i32 %5, label %20 [
    i32 5, label %6
    i32 4, label %7
    i32 0, label %8
    i32 1, label %9
    i32 2, label %10
    i32 3, label %11
    i32 9, label %12
    i32 8, label %13
    i32 10, label %14
    i32 11, label %15
    i32 12, label %16
    i32 13, label %17
    i32 6, label %18
    i32 7, label %19
  ]

6:                                                ; preds = %1
  store i32 64, ptr %2, align 4
  br label %23

7:                                                ; preds = %1
  store i32 64, ptr %2, align 4
  br label %23

8:                                                ; preds = %1
  store i32 64, ptr %2, align 4
  br label %23

9:                                                ; preds = %1
  store i32 64, ptr %2, align 4
  br label %23

10:                                               ; preds = %1
  store i32 128, ptr %2, align 4
  br label %23

11:                                               ; preds = %1
  store i32 128, ptr %2, align 4
  br label %23

12:                                               ; preds = %1
  store i32 144, ptr %2, align 4
  br label %23

13:                                               ; preds = %1
  store i32 136, ptr %2, align 4
  br label %23

14:                                               ; preds = %1
  store i32 104, ptr %2, align 4
  br label %23

15:                                               ; preds = %1
  store i32 72, ptr %2, align 4
  br label %23

16:                                               ; preds = %1
  store i32 168, ptr %2, align 4
  br label %23

17:                                               ; preds = %1
  store i32 136, ptr %2, align 4
  br label %23

18:                                               ; preds = %1
  store i32 64, ptr %2, align 4
  br label %23

19:                                               ; preds = %1
  store i32 128, ptr %2, align 4
  br label %23

20:                                               ; preds = %1
  %21 = load ptr, ptr @stderr, align 8, !tbaa !8
  %22 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %21, ptr noundef @.str, ptr noundef @.str.1, i32 noundef 126) #3
  call void @exit(i32 noundef 253) #4
  unreachable

23:                                               ; preds = %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
  %24 = load i32, ptr %2, align 4
  ret i32 %24
}

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external local_unnamed_addr global ptr, align 8
@.str = external hidden unnamed_addr constant [35 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1
@switch.table.Hacl_Hash_Definitions_block_len = private unnamed_addr constant [14 x i32] [i32 64, i32 64, i32 128, i32 128, i32 64, i32 64, i32 64, i32 128, i32 136, i32 144, i32 104, i32 72, i32 168, i32 136], align 4

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 64, 169) i32 @Hacl_Hash_Definitions_block_len(i8 noundef zeroext %0) local_unnamed_addr #2 {
  %2 = icmp ult i8 %0, 14
  br i1 %2, label %switch.lookup, label %3

3:                                                ; preds = %1
  %4 = load ptr, ptr @stderr, align 8, !tbaa !5
  %5 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %4, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 126) #3
  tail call void @exit(i32 noundef 253) #4
  unreachable

switch.lookup:                                    ; preds = %1
  %6 = zext nneg i8 %0 to i64
  %switch.gep = getelementptr inbounds [14 x i32], ptr @switch.table.Hacl_Hash_Definitions_block_len, i64 0, i64 %6
  %switch.load = load i32, ptr %switch.gep, align 4
  ret i32 %switch.load
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass