; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseYuvToUyvy.ll (ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [38 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [79 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm = external hidden unnamed_addr constant [144 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9) #0 {
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i32, align 4
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  %25 = alloca i64, align 8
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i64 %1, ptr %12, align 8, !tbaa !9
  store ptr %2, ptr %13, align 8, !tbaa !5
  store i64 %3, ptr %14, align 8, !tbaa !9
  store ptr %4, ptr %15, align 8, !tbaa !5
  store i64 %5, ptr %16, align 8, !tbaa !9
  store i64 %6, ptr %17, align 8, !tbaa !9
  store i64 %7, ptr %18, align 8, !tbaa !9
  store ptr %8, ptr %19, align 8, !tbaa !5
  store i64 %9, ptr %20, align 8, !tbaa !9
  %26 = load i64, ptr %17, align 8, !tbaa !9
  %27 = urem i64 %26, 2
  %28 = icmp eq i64 %27, 0
  br i1 %28, label %29, label %33

29:                                               ; preds = %10
  %30 = load i64, ptr %18, align 8, !tbaa !9
  %31 = urem i64 %30, 2
  %32 = icmp eq i64 %31, 0
  br label %33

33:                                               ; preds = %29, %10
  %34 = phi i1 [ false, %10 ], [ %32, %29 ]
  br i1 %34, label %35, label %36

35:                                               ; preds = %33
  br label %38

36:                                               ; preds = %33
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 47, ptr noundef @__PRETTY_FUNCTION__._ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm) #4
  unreachable

37:                                               ; No predecessors!
  br label %38

38:                                               ; preds = %37, %35
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  store i64 0, ptr %21, align 8, !tbaa !9
  br label %39

39:                                               ; preds = %87, %38
  %40 = load i64, ptr %21, align 8, !tbaa !9
  %41 = load i64, ptr %18, align 8, !tbaa !9
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  store i32 2, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  br label %90

44:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #5
  store i64 0, ptr %23, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #5
  store i64 0, ptr %24, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #5
  store i64 0, ptr %25, align 8, !tbaa !9
  br label %45

45:                                               ; preds = %65, %44
  %46 = load i64, ptr %23, align 8, !tbaa !9
  %47 = load i64, ptr %17, align 8, !tbaa !9
  %48 = icmp ult i64 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 5, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #5
  br label %72

50:                                               ; preds = %45
  %51 = load ptr, ptr %11, align 8, !tbaa !5
  %52 = load i64, ptr %23, align 8, !tbaa !9
  %53 = getelementptr inbounds i8, ptr %51, i64 %52
  %54 = load i64, ptr %12, align 8, !tbaa !9
  %55 = load ptr, ptr %13, align 8, !tbaa !5
  %56 = load i64, ptr %24, align 8, !tbaa !9
  %57 = getelementptr inbounds i8, ptr %55, i64 %56
  %58 = load ptr, ptr %15, align 8, !tbaa !5
  %59 = load i64, ptr %24, align 8, !tbaa !9
  %60 = getelementptr inbounds i8, ptr %58, i64 %59
  %61 = load ptr, ptr %19, align 8, !tbaa !5
  %62 = load i64, ptr %25, align 8, !tbaa !9
  %63 = getelementptr inbounds i8, ptr %61, i64 %62
  %64 = load i64, ptr %20, align 8, !tbaa !9
  call void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_S2_Phm(ptr noundef %53, i64 noundef %54, ptr noundef %57, ptr noundef %60, ptr noundef %63, i64 noundef %64)
  br label %65

65:                                               ; preds = %50
  %66 = load i64, ptr %23, align 8, !tbaa !9
  %67 = add i64 %66, 2
  store i64 %67, ptr %23, align 8, !tbaa !9
  %68 = load i64, ptr %24, align 8, !tbaa !9
  %69 = add i64 %68, 1
  store i64 %69, ptr %24, align 8, !tbaa !9
  %70 = load i64, ptr %25, align 8, !tbaa !9
  %71 = add i64 %70, 4
  store i64 %71, ptr %25, align 8, !tbaa !9
  br label %45, !llvm.loop !11

72:                                               ; preds = %49
  %73 = load i64, ptr %12, align 8, !tbaa !9
  %74 = mul i64 2, %73
  %75 = load ptr, ptr %11, align 8, !tbaa !5
  %76 = getelementptr inbounds i8, ptr %75, i64 %74
  store ptr %76, ptr %11, align 8, !tbaa !5
  %77 = load i64, ptr %14, align 8, !tbaa !9
  %78 = load ptr, ptr %13, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 %77
  store ptr %79, ptr %13, align 8, !tbaa !5
  %80 = load i64, ptr %16, align 8, !tbaa !9
  %81 = load ptr, ptr %15, align 8, !tbaa !5
  %82 = getelementptr inbounds i8, ptr %81, i64 %80
  store ptr %82, ptr %15, align 8, !tbaa !5
  %83 = load i64, ptr %20, align 8, !tbaa !9
  %84 = mul i64 2, %83
  %85 = load ptr, ptr %19, align 8, !tbaa !5
  %86 = getelementptr inbounds i8, ptr %85, i64 %84
  store ptr %86, ptr %19, align 8, !tbaa !5
  br label %87

87:                                               ; preds = %72
  %88 = load i64, ptr %21, align 8, !tbaa !9
  %89 = add i64 %88, 2
  store i64 %89, ptr %21, align 8, !tbaa !9
  br label %39, !llvm.loop !13

90:                                               ; preds = %43
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_S2_Phm(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [38 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [79 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm = external hidden unnamed_addr constant [144 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9) local_unnamed_addr #0 {
  %11 = or i64 %7, %6
  %12 = and i64 %11, 1
  %13 = icmp eq i64 %12, 0
  br i1 %13, label %.preheader34, label %31

.preheader34:                                     ; preds = %10
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %._crit_edge43, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader34
  %.not44 = icmp eq i64 %6, 0
  %14 = shl i64 %1, 1
  %15 = shl i64 %9, 1
  br i1 %.not44, label %._crit_edge43, label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.lr.ph, %._crit_edge.us
  %.02942.us = phi i64 [ %29, %._crit_edge.us ], [ 0, %.preheader.lr.ph ]
  %.03041.us = phi ptr [ %25, %._crit_edge.us ], [ %0, %.preheader.lr.ph ]
  %.03140.us = phi ptr [ %28, %._crit_edge.us ], [ %8, %.preheader.lr.ph ]
  %.03239.us = phi ptr [ %26, %._crit_edge.us ], [ %2, %.preheader.lr.ph ]
  %.03338.us = phi ptr [ %27, %._crit_edge.us ], [ %4, %.preheader.lr.ph ]
  br label %16

16:                                               ; preds = %.preheader.us, %16
  %.037.us = phi i64 [ 0, %.preheader.us ], [ %23, %16 ]
  %.02736.us = phi i64 [ 0, %.preheader.us ], [ %22, %16 ]
  %.02835.us = phi i64 [ 0, %.preheader.us ], [ %21, %16 ]
  %17 = getelementptr inbounds i8, ptr %.03041.us, i64 %.02835.us
  %18 = getelementptr inbounds i8, ptr %.03239.us, i64 %.02736.us
  %19 = getelementptr inbounds i8, ptr %.03338.us, i64 %.02736.us
  %20 = getelementptr inbounds i8, ptr %.03140.us, i64 %.037.us
  tail call void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_S2_Phm(ptr noundef %17, i64 noundef %1, ptr noundef %18, ptr noundef %19, ptr noundef %20, i64 noundef %9)
  %21 = add i64 %.02835.us, 2
  %22 = add i64 %.02736.us, 1
  %23 = add i64 %.037.us, 4
  %24 = icmp ult i64 %21, %6
  br i1 %24, label %16, label %._crit_edge.us, !llvm.loop !5

._crit_edge.us:                                   ; preds = %16
  %25 = getelementptr inbounds i8, ptr %.03041.us, i64 %14
  %26 = getelementptr inbounds i8, ptr %.03239.us, i64 %3
  %27 = getelementptr inbounds i8, ptr %.03338.us, i64 %5
  %28 = getelementptr inbounds i8, ptr %.03140.us, i64 %15
  %29 = add i64 %.02942.us, 2
  %30 = icmp ult i64 %29, %7
  br i1 %30, label %.preheader.us, label %._crit_edge43, !llvm.loop !7

31:                                               ; preds = %10
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 47, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_mS2_mmmPhm) #3
  unreachable

._crit_edge43:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %.preheader34
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN4Simd4Base16Yuv420pToUyvy422EPKhmS2_S2_Phm(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass