; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseBackground.ll (ZN4Simd4Base20BackgroundShiftRangeEPKhmmmPhmS3_m)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base20BackgroundShiftRangeEPKhmmmPhmS3_m(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7) #1 {
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i64 %1, ptr %10, align 8, !tbaa !9
  store i64 %2, ptr %11, align 8, !tbaa !9
  store i64 %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store i64 %5, ptr %14, align 8, !tbaa !9
  store ptr %6, ptr %15, align 8, !tbaa !5
  store i64 %7, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  store i64 0, ptr %17, align 8, !tbaa !9
  br label %20

20:                                               ; preds = %54, %8
  %21 = load i64, ptr %17, align 8, !tbaa !9
  %22 = load i64, ptr %12, align 8, !tbaa !9
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 2, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  br label %57

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  store i64 0, ptr %19, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %41, %25
  %27 = load i64, ptr %19, align 8, !tbaa !9
  %28 = load i64, ptr %11, align 8, !tbaa !9
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 5, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  br label %44

31:                                               ; preds = %26
  %32 = load ptr, ptr %9, align 8, !tbaa !5
  %33 = load i64, ptr %19, align 8, !tbaa !9
  %34 = getelementptr inbounds i8, ptr %32, i64 %33
  %35 = load ptr, ptr %13, align 8, !tbaa !5
  %36 = load i64, ptr %19, align 8, !tbaa !9
  %37 = getelementptr inbounds i8, ptr %35, i64 %36
  %38 = load ptr, ptr %15, align 8, !tbaa !5
  %39 = load i64, ptr %19, align 8, !tbaa !9
  %40 = getelementptr inbounds i8, ptr %38, i64 %39
  call void @_ZN4Simd4Base20BackgroundShiftRangeERKhRhS3_(ptr noundef nonnull align 1 dereferenceable(1) %34, ptr noundef nonnull align 1 dereferenceable(1) %37, ptr noundef nonnull align 1 dereferenceable(1) %40)
  br label %41

41:                                               ; preds = %31
  %42 = load i64, ptr %19, align 8, !tbaa !9
  %43 = add i64 %42, 1
  store i64 %43, ptr %19, align 8, !tbaa !9
  br label %26, !llvm.loop !11

44:                                               ; preds = %30
  %45 = load i64, ptr %10, align 8, !tbaa !9
  %46 = load ptr, ptr %9, align 8, !tbaa !5
  %47 = getelementptr inbounds i8, ptr %46, i64 %45
  store ptr %47, ptr %9, align 8, !tbaa !5
  %48 = load i64, ptr %14, align 8, !tbaa !9
  %49 = load ptr, ptr %13, align 8, !tbaa !5
  %50 = getelementptr inbounds i8, ptr %49, i64 %48
  store ptr %50, ptr %13, align 8, !tbaa !5
  %51 = load i64, ptr %16, align 8, !tbaa !9
  %52 = load ptr, ptr %15, align 8, !tbaa !5
  %53 = getelementptr inbounds i8, ptr %52, i64 %51
  store ptr %53, ptr %15, align 8, !tbaa !5
  br label %54

54:                                               ; preds = %44
  %55 = load i64, ptr %17, align 8, !tbaa !9
  %56 = add i64 %55, 1
  store i64 %56, ptr %17, align 8, !tbaa !9
  br label %20, !llvm.loop !13

57:                                               ; preds = %24
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base20BackgroundShiftRangeERKhRhS3_(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base20BackgroundShiftRangeEPKhmmmPhmS3_m(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6, i64 noundef %7) local_unnamed_addr #0 {
  %.not = icmp eq i64 %3, 0
  %.not27 = icmp eq i64 %2, 0
  %or.cond = or i1 %.not, %.not27
  br i1 %or.cond, label %._crit_edge26, label %.preheader.us

.preheader.us:                                    ; preds = %8, %._crit_edge.us
  %.01725.us = phi i64 [ %17, %._crit_edge.us ], [ 0, %8 ]
  %.01824.us = phi ptr [ %14, %._crit_edge.us ], [ %0, %8 ]
  %.01923.us = phi ptr [ %16, %._crit_edge.us ], [ %6, %8 ]
  %.02022.us = phi ptr [ %15, %._crit_edge.us ], [ %4, %8 ]
  br label %9

9:                                                ; preds = %.preheader.us, %9
  %.021.us = phi i64 [ 0, %.preheader.us ], [ %13, %9 ]
  %10 = getelementptr inbounds i8, ptr %.01824.us, i64 %.021.us
  %11 = getelementptr inbounds i8, ptr %.02022.us, i64 %.021.us
  %12 = getelementptr inbounds i8, ptr %.01923.us, i64 %.021.us
  tail call void @_ZN4Simd4Base20BackgroundShiftRangeERKhRhS3_(ptr noundef nonnull align 1 dereferenceable(1) %10, ptr noundef nonnull align 1 dereferenceable(1) %11, ptr noundef nonnull align 1 dereferenceable(1) %12)
  %13 = add nuw i64 %.021.us, 1
  %exitcond.not = icmp eq i64 %13, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %9, !llvm.loop !5

._crit_edge.us:                                   ; preds = %9
  %14 = getelementptr inbounds i8, ptr %.01824.us, i64 %1
  %15 = getelementptr inbounds i8, ptr %.02022.us, i64 %5
  %16 = getelementptr inbounds i8, ptr %.01923.us, i64 %7
  %17 = add nuw i64 %.01725.us, 1
  %exitcond29.not = icmp eq i64 %17, %3
  br i1 %exitcond29.not, label %._crit_edge26, label %.preheader.us, !llvm.loop !7

._crit_edge26:                                    ; preds = %._crit_edge.us, %8
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN4Simd4Base20BackgroundShiftRangeERKhRhS3_(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass