; LLVM IR from ermig1979/Simd :: src/Simd/SimdBaseFill.ll (ZN4Simd4Base7FillBgrEPhmmmhhh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Simd4Base7FillBgrEPhmmmhhh(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6) #1 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca [3 x i64], align 16
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i8 %4, ptr %12, align 1, !tbaa !11
  store i8 %5, ptr %13, align 1, !tbaa !11
  store i8 %6, ptr %14, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %21 = load i64, ptr %10, align 8, !tbaa !9
  %22 = mul i64 %21, 3
  store i64 %22, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  store i64 24, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  %23 = load i64, ptr %10, align 8, !tbaa !9
  %24 = call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %23, i64 noundef 8)
  %25 = mul i64 %24, 3
  store i64 %25, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %18) #3
  %26 = load i8, ptr %12, align 1, !tbaa !11
  %27 = load i8, ptr %13, align 1, !tbaa !11
  %28 = load i8, ptr %14, align 1, !tbaa !11
  %29 = call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %26, i8 noundef zeroext %27, i8 noundef zeroext %28)
  %30 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 0
  store i64 %29, ptr %30, align 16, !tbaa !9
  %31 = load i8, ptr %14, align 1, !tbaa !11
  %32 = load i8, ptr %12, align 1, !tbaa !11
  %33 = load i8, ptr %13, align 1, !tbaa !11
  %34 = call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %31, i8 noundef zeroext %32, i8 noundef zeroext %33)
  %35 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 1
  store i64 %34, ptr %35, align 8, !tbaa !9
  %36 = load i8, ptr %13, align 1, !tbaa !11
  %37 = load i8, ptr %14, align 1, !tbaa !11
  %38 = load i8, ptr %12, align 1, !tbaa !11
  %39 = call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %36, i8 noundef zeroext %37, i8 noundef zeroext %38)
  %40 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 2
  store i64 %39, ptr %40, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  store i64 0, ptr %19, align 8, !tbaa !9
  br label %41

41:                                               ; preds = %102, %7
  %42 = load i64, ptr %19, align 8, !tbaa !9
  %43 = load i64, ptr %11, align 8, !tbaa !9
  %44 = icmp ult i64 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  br label %105

46:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  store i64 0, ptr %20, align 8, !tbaa !9
  br label %47

47:                                               ; preds = %70, %46
  %48 = load i64, ptr %20, align 8, !tbaa !9
  %49 = load i64, ptr %17, align 8, !tbaa !9
  %50 = icmp ult i64 %48, %49
  br i1 %50, label %51, label %74

51:                                               ; preds = %47
  %52 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 0
  %53 = load i64, ptr %52, align 16, !tbaa !9
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = load i64, ptr %20, align 8, !tbaa !9
  %56 = getelementptr inbounds i8, ptr %54, i64 %55
  %57 = getelementptr inbounds i64, ptr %56, i64 0
  store i64 %53, ptr %57, align 8, !tbaa !9
  %58 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 1
  %59 = load i64, ptr %58, align 8, !tbaa !9
  %60 = load ptr, ptr %8, align 8, !tbaa !5
  %61 = load i64, ptr %20, align 8, !tbaa !9
  %62 = getelementptr inbounds i8, ptr %60, i64 %61
  %63 = getelementptr inbounds i64, ptr %62, i64 1
  store i64 %59, ptr %63, align 8, !tbaa !9
  %64 = getelementptr inbounds [3 x i64], ptr %18, i64 0, i64 2
  %65 = load i64, ptr %64, align 16, !tbaa !9
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = load i64, ptr %20, align 8, !tbaa !9
  %68 = getelementptr inbounds i8, ptr %66, i64 %67
  %69 = getelementptr inbounds i64, ptr %68, i64 2
  store i64 %65, ptr %69, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %51
  %71 = load i64, ptr %16, align 8, !tbaa !9
  %72 = load i64, ptr %20, align 8, !tbaa !9
  %73 = add i64 %72, %71
  store i64 %73, ptr %20, align 8, !tbaa !9
  br label %47, !llvm.loop !12

74:                                               ; preds = %47
  br label %75

75:                                               ; preds = %95, %74
  %76 = load i64, ptr %20, align 8, !tbaa !9
  %77 = load i64, ptr %15, align 8, !tbaa !9
  %78 = icmp ult i64 %76, %77
  br i1 %78, label %79, label %98

79:                                               ; preds = %75
  %80 = load i8, ptr %12, align 1, !tbaa !11
  %81 = load ptr, ptr %8, align 8, !tbaa !5
  %82 = load i64, ptr %20, align 8, !tbaa !9
  %83 = getelementptr inbounds i8, ptr %81, i64 %82
  %84 = getelementptr inbounds i8, ptr %83, i64 0
  store i8 %80, ptr %84, align 1, !tbaa !11
  %85 = load i8, ptr %13, align 1, !tbaa !11
  %86 = load ptr, ptr %8, align 8, !tbaa !5
  %87 = load i64, ptr %20, align 8, !tbaa !9
  %88 = getelementptr inbounds i8, ptr %86, i64 %87
  %89 = getelementptr inbounds i8, ptr %88, i64 1
  store i8 %85, ptr %89, align 1, !tbaa !11
  %90 = load i8, ptr %14, align 1, !tbaa !11
  %91 = load ptr, ptr %8, align 8, !tbaa !5
  %92 = load i64, ptr %20, align 8, !tbaa !9
  %93 = getelementptr inbounds i8, ptr %91, i64 %92
  %94 = getelementptr inbounds i8, ptr %93, i64 2
  store i8 %90, ptr %94, align 1, !tbaa !11
  br label %95

95:                                               ; preds = %79
  %96 = load i64, ptr %20, align 8, !tbaa !9
  %97 = add i64 %96, 3
  store i64 %97, ptr %20, align 8, !tbaa !9
  br label %75, !llvm.loop !14

98:                                               ; preds = %75
  %99 = load i64, ptr %9, align 8, !tbaa !9
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = getelementptr inbounds i8, ptr %100, i64 %99
  store ptr %101, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  br label %102

102:                                              ; preds = %98
  %103 = load i64, ptr %19, align 8, !tbaa !9
  %104 = add i64 %103, 1
  store i64 %104, ptr %19, align 8, !tbaa !9
  br label %41, !llvm.loop !15

105:                                              ; preds = %45
  call void @llvm.lifetime.end.p0(i64 24, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Simd4Base7FillBgrEPhmmmhhh(ptr nocapture noundef writeonly %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6) local_unnamed_addr #0 {
  %8 = mul i64 %2, 3
  %9 = tail call noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef %2, i64 noundef 8)
  %10 = mul i64 %9, 3
  %11 = tail call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %4, i8 noundef zeroext %5, i8 noundef zeroext %6)
  %12 = tail call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %6, i8 noundef zeroext %4, i8 noundef zeroext %5)
  %13 = tail call noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext %5, i8 noundef zeroext %6, i8 noundef zeroext %4)
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge45, label %.preheader39.lr.ph

.preheader39.lr.ph:                               ; preds = %7
  %.not52 = icmp eq i64 %9, 0
  br i1 %.not52, label %.preheader39.lr.ph.split, label %.preheader39.us

.preheader39.us:                                  ; preds = %.preheader39.lr.ph, %._crit_edge.us
  %.03744.us = phi i64 [ %15, %._crit_edge.us ], [ 0, %.preheader39.lr.ph ]
  %.03843.us = phi ptr [ %14, %._crit_edge.us ], [ %0, %.preheader39.lr.ph ]
  br label %21

._crit_edge.us:                                   ; preds = %.lr.ph42.us, %..preheader_crit_edge.us
  %14 = getelementptr inbounds i8, ptr %.03843.us, i64 %1
  %15 = add nuw i64 %.03744.us, 1
  %exitcond.not = icmp eq i64 %15, %3
  br i1 %exitcond.not, label %._crit_edge45, label %.preheader39.us, !llvm.loop !5

.lr.ph42.us:                                      ; preds = %..preheader_crit_edge.us, %.lr.ph42.us
  %.141.us = phi i64 [ %19, %.lr.ph42.us ], [ %25, %..preheader_crit_edge.us ]
  %16 = getelementptr inbounds i8, ptr %.03843.us, i64 %.141.us
  store i8 %4, ptr %16, align 1, !tbaa !7
  %17 = getelementptr inbounds i8, ptr %16, i64 1
  store i8 %5, ptr %17, align 1, !tbaa !7
  %18 = getelementptr inbounds i8, ptr %16, i64 2
  store i8 %6, ptr %18, align 1, !tbaa !7
  %19 = add i64 %.141.us, 3
  %20 = icmp ult i64 %19, %8
  br i1 %20, label %.lr.ph42.us, label %._crit_edge.us, !llvm.loop !10

21:                                               ; preds = %.preheader39.us, %21
  %.040.us = phi i64 [ 0, %.preheader39.us ], [ %25, %21 ]
  %22 = getelementptr inbounds i8, ptr %.03843.us, i64 %.040.us
  store i64 %11, ptr %22, align 8, !tbaa !11
  %23 = getelementptr inbounds i8, ptr %22, i64 8
  store i64 %12, ptr %23, align 8, !tbaa !11
  %24 = getelementptr inbounds i8, ptr %22, i64 16
  store i64 %13, ptr %24, align 8, !tbaa !11
  %25 = add i64 %.040.us, 24
  %26 = icmp ult i64 %25, %10
  br i1 %26, label %21, label %..preheader_crit_edge.us, !llvm.loop !13

..preheader_crit_edge.us:                         ; preds = %21
  %27 = icmp ult i64 %25, %8
  br i1 %27, label %.lr.ph42.us, label %._crit_edge.us

.preheader39.lr.ph.split:                         ; preds = %.preheader39.lr.ph
  %.not53 = icmp eq i64 %2, 0
  br i1 %.not53, label %._crit_edge45, label %.preheader39.us46.preheader

.preheader39.us46.preheader:                      ; preds = %.preheader39.lr.ph.split
  %xtraiter = and i64 %3, 1
  %28 = icmp eq i64 %3, 1
  br i1 %28, label %._crit_edge45.loopexit.unr-lcssa, label %.preheader39.us46.preheader.new

.preheader39.us46.preheader.new:                  ; preds = %.preheader39.us46.preheader
  %unroll_iter = and i64 %3, -2
  br label %.preheader39.us46

.preheader39.us46:                                ; preds = %._crit_edge.us51.1, %.preheader39.us46.preheader.new
  %.03843.us48 = phi ptr [ %0, %.preheader39.us46.preheader.new ], [ %42, %._crit_edge.us51.1 ]
  %niter = phi i64 [ 0, %.preheader39.us46.preheader.new ], [ %niter.next.1, %._crit_edge.us51.1 ]
  br label %29

29:                                               ; preds = %.preheader39.us46, %29
  %.141.us49 = phi i64 [ 0, %.preheader39.us46 ], [ %33, %29 ]
  %30 = getelementptr inbounds i8, ptr %.03843.us48, i64 %.141.us49
  store i8 %4, ptr %30, align 1, !tbaa !7
  %31 = getelementptr inbounds i8, ptr %30, i64 1
  store i8 %5, ptr %31, align 1, !tbaa !7
  %32 = getelementptr inbounds i8, ptr %30, i64 2
  store i8 %6, ptr %32, align 1, !tbaa !7
  %33 = add i64 %.141.us49, 3
  %34 = icmp ult i64 %33, %8
  br i1 %34, label %29, label %._crit_edge.us51, !llvm.loop !10

._crit_edge.us51:                                 ; preds = %29
  %35 = getelementptr inbounds i8, ptr %.03843.us48, i64 %1
  br label %36

36:                                               ; preds = %36, %._crit_edge.us51
  %.141.us49.1 = phi i64 [ 0, %._crit_edge.us51 ], [ %40, %36 ]
  %37 = getelementptr inbounds i8, ptr %35, i64 %.141.us49.1
  store i8 %4, ptr %37, align 1, !tbaa !7
  %38 = getelementptr inbounds i8, ptr %37, i64 1
  store i8 %5, ptr %38, align 1, !tbaa !7
  %39 = getelementptr inbounds i8, ptr %37, i64 2
  store i8 %6, ptr %39, align 1, !tbaa !7
  %40 = add i64 %.141.us49.1, 3
  %41 = icmp ult i64 %40, %8
  br i1 %41, label %36, label %._crit_edge.us51.1, !llvm.loop !10

._crit_edge.us51.1:                               ; preds = %36
  %42 = getelementptr inbounds i8, ptr %35, i64 %1
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge45.loopexit.unr-lcssa, label %.preheader39.us46, !llvm.loop !5

._crit_edge45.loopexit.unr-lcssa:                 ; preds = %._crit_edge.us51.1, %.preheader39.us46.preheader
  %.03843.us48.unr = phi ptr [ %0, %.preheader39.us46.preheader ], [ %42, %._crit_edge.us51.1 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge45, label %.preheader39.us46.epil

.preheader39.us46.epil:                           ; preds = %._crit_edge45.loopexit.unr-lcssa, %.preheader39.us46.epil
  %.141.us49.epil = phi i64 [ %46, %.preheader39.us46.epil ], [ 0, %._crit_edge45.loopexit.unr-lcssa ]
  %43 = getelementptr inbounds i8, ptr %.03843.us48.unr, i64 %.141.us49.epil
  store i8 %4, ptr %43, align 1, !tbaa !7
  %44 = getelementptr inbounds i8, ptr %43, i64 1
  store i8 %5, ptr %44, align 1, !tbaa !7
  %45 = getelementptr inbounds i8, ptr %43, i64 2
  store i8 %6, ptr %45, align 1, !tbaa !7
  %46 = add i64 %.141.us49.epil, 3
  %47 = icmp ult i64 %46, %8
  br i1 %47, label %.preheader39.us46.epil, label %._crit_edge45, !llvm.loop !10

._crit_edge45:                                    ; preds = %._crit_edge.us, %._crit_edge45.loopexit.unr-lcssa, %.preheader39.us46.epil, %.preheader39.lr.ph.split, %7
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd7AlignLoEmm(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Simd4Base6Fill64Ehhh(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = distinct !{!10, !6}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = distinct !{!13, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass