; LLVM IR from holzschu/ios_system :: libinfo/gen.subproj (rthdr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.in6_addr = type { %union.anon }
%union.anon = type { [4 x i32] }
%struct.ip6_rthdr = type { i8, i8, i8, i8 }
%struct.ip6_rthdr0 = type { i8, i8, i8, i8, i8, [3 x i8], [0 x %struct.in6_addr] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inet6_rth_reverse(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %struct.in6_addr, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %15, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.ip6_rthdr, ptr %16, i32 0, i32 2
  %18 = load i8, ptr %17, align 1, !tbaa !9
  %19 = zext i8 %18 to i32
  switch i32 %19, label %76 [
    i32 0, label %20
  ]

20:                                               ; preds = %2
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %21, ptr %7, align 8, !tbaa !5
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %22, ptr %8, align 8, !tbaa !5
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.ip6_rthdr0, ptr %23, i32 0, i32 1
  %25 = load i8, ptr %24, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = srem i32 %26, 2
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %20
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %78

30:                                               ; preds = %20
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.ip6_rthdr0, ptr %31, i32 0, i32 1
  %33 = load i8, ptr %32, align 1, !tbaa !11
  %34 = zext i8 %33 to i32
  %35 = sdiv i32 %34, 2
  store i32 %35, ptr %10, align 4, !tbaa !13
  %36 = load ptr, ptr %8, align 8, !tbaa !5
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.ip6_rthdr0, ptr %38, i32 0, i32 1
  %40 = load i8, ptr %39, align 1, !tbaa !11
  %41 = zext i8 %40 to i32
  %42 = add nsw i32 %41, 1
  %43 = shl i32 %42, 3
  %44 = sext i32 %43 to i64
  call void @llvm.memmove.p0.p0.i64(ptr align 1 %36, ptr align 1 %37, i64 %44, i1 false)
  %45 = load i32, ptr %10, align 4, !tbaa !13
  %46 = trunc i32 %45 to i8
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.ip6_rthdr0, ptr %47, i32 0, i32 3
  store i8 %46, ptr %48, align 1, !tbaa !15
  store i32 0, ptr %9, align 4, !tbaa !13
  br label %49

49:                                               ; preds = %72, %30
  %50 = load i32, ptr %9, align 4, !tbaa !13
  %51 = load i32, ptr %10, align 4, !tbaa !13
  %52 = sdiv i32 %51, 2
  %53 = icmp slt i32 %50, %52
  br i1 %53, label %54, label %75

54:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.ip6_rthdr0, ptr %55, i64 1
  %57 = load i32, ptr %9, align 4, !tbaa !13
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds %struct.in6_addr, ptr %56, i64 %58
  store ptr %59, ptr %13, align 8, !tbaa !5
  %60 = load ptr, ptr %8, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.ip6_rthdr0, ptr %60, i64 1
  %62 = load i32, ptr %10, align 4, !tbaa !13
  %63 = load i32, ptr %9, align 4, !tbaa !13
  %64 = sub nsw i32 %62, %63
  %65 = sub nsw i32 %64, 1
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds %struct.in6_addr, ptr %61, i64 %66
  store ptr %67, ptr %14, align 8, !tbaa !5
  %68 = load ptr, ptr %13, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %68, i64 16, i1 false), !tbaa.struct !16
  %69 = load ptr, ptr %13, align 8, !tbaa !5
  %70 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %69, ptr align 4 %70, i64 16, i1 false), !tbaa.struct !16
  %71 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %71, ptr align 4 %12, i64 16, i1 false), !tbaa.struct !16
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #3
  br label %72

72:                                               ; preds = %54
  %73 = load i32, ptr %9, align 4, !tbaa !13
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %9, align 4, !tbaa !13
  br label %49, !llvm.loop !18

75:                                               ; preds = %49
  br label %77

76:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %78

77:                                               ; preds = %75
  store i32 0, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %78

78:                                               ; preds = %77, %76, %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %79 = load i32, ptr %3, align 4
  ret i32 %79
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 2}
!10 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!11 = !{!12, !7, i64 1}
!12 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !7, i64 3}
!16 = !{i64 0, i64 16, !17}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.in6_addr = type { %union.anon }
%union.anon = type { [4 x i32] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local range(i32 -1, 1) i32 @inet6_rth_reverse(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) local_unnamed_addr #2 {
  %.sroa.0 = alloca [4 x i32], align 4
  %3 = getelementptr inbounds i8, ptr %0, i64 2
  %4 = load i8, ptr %3, align 1, !tbaa !5
  %cond = icmp eq i8 %4, 0
  br i1 %cond, label %5, label %.loopexit

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 1
  %7 = load i8, ptr %6, align 1, !tbaa !9
  %8 = zext i8 %7 to i32
  %9 = and i32 %8, 1
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %10, label %.loopexit

10:                                               ; preds = %5
  %11 = lshr exact i32 %8, 1
  %12 = shl nuw nsw i32 %8, 3
  %13 = or disjoint i32 %12, 8
  %14 = zext nneg i32 %13 to i64
  tail call void @llvm.memmove.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %1, ptr noundef nonnull align 1 dereferenceable(1) %0, i64 %14, i1 false)
  %15 = trunc nuw nsw i32 %11 to i8
  %16 = getelementptr inbounds i8, ptr %1, i64 3
  store i8 %15, ptr %16, align 1, !tbaa !11
  %.not25 = icmp ult i8 %7, 4
  br i1 %.not25, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %10
  %17 = lshr i32 %8, 2
  %18 = getelementptr inbounds i8, ptr %1, i64 8
  %19 = zext nneg i32 %11 to i64
  %wide.trip.count = zext nneg i32 %17 to i64
  %20 = getelementptr %struct.in6_addr, ptr %18, i64 %19
  br label %21

21:                                               ; preds = %.lr.ph, %21
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %21 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %.sroa.0)
  %22 = getelementptr inbounds %struct.in6_addr, ptr %18, i64 %indvars.iv
  %23 = xor i64 %indvars.iv, -1
  %24 = getelementptr %struct.in6_addr, ptr %20, i64 %23
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %.sroa.0, ptr noundef nonnull align 4 dereferenceable(16) %22, i64 16, i1 false), !tbaa.struct !12
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %22, ptr noundef nonnull align 4 dereferenceable(16) %24, i64 16, i1 false), !tbaa.struct !12
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %24, ptr noundef nonnull align 4 dereferenceable(16) %.sroa.0, i64 16, i1 false), !tbaa.struct !12
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %.sroa.0)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %21, !llvm.loop !14

.loopexit:                                        ; preds = %21, %10, %2, %5
  %.0 = phi i32 [ -1, %5 ], [ -1, %2 ], [ 0, %10 ], [ 0, %21 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 2}
!6 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 1}
!10 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}
!11 = !{!10, !7, i64 3}
!12 = !{i64 0, i64 16, !13}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass