; LLVM IR from Overload-Technologies/Overload :: Dependencies/assimp/code/AssetLib/FBX (FBXExportNode)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Assimp::FBX::Node" = type { %"class.std::__cxx11::basic_string", %"class.std::vector", %"class.std::vector.3", i8, i64, i64, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Assimp::FBX::FBXExportProperty, std::allocator<Assimp::FBX::FBXExportProperty>>::_Vector_impl" }
%"struct.std::_Vector_base<Assimp::FBX::FBXExportProperty, std::allocator<Assimp::FBX::FBXExportProperty>>::_Vector_impl" = type { %"struct.std::_Vector_base<Assimp::FBX::FBXExportProperty, std::allocator<Assimp::FBX::FBXExportProperty>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Assimp::FBX::FBXExportProperty, std::allocator<Assimp::FBX::FBXExportProperty>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Assimp::FBX::Node, std::allocator<Assimp::FBX::Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Assimp::FBX::Node, std::allocator<Assimp::FBX::Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Assimp::FBX::Node, std::allocator<Assimp::FBX::Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Assimp::FBX::Node, std::allocator<Assimp::FBX::Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.19 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [120 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6Assimp3FBX4Node19EndPropertiesBinaryERNS_12StreamWriterILb0ELb0EEEm(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  %9 = load ptr, ptr %4, align 8
  %10 = load i64, ptr %6, align 8, !tbaa !9
  %11 = icmp eq i64 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %3
  br label %39

13:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = call noundef i64 @_ZN6Assimp12StreamWriterILb0ELb0EE4TellEv(ptr noundef nonnull align 8 dereferenceable(56) %14)
  store i64 %15, ptr %7, align 8, !tbaa !9
  %16 = load i64, ptr %7, align 8, !tbaa !9
  %17 = getelementptr inbounds %"class.Assimp::FBX::Node", ptr %9, i32 0, i32 6
  %18 = load i64, ptr %17, align 8, !tbaa !11
  %19 = icmp ugt i64 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %13
  call void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef @.str.19, ptr noundef @.str.20, i32 noundef 343)
  br label %21

21:                                               ; preds = %20, %13
  %22 = phi i1 [ true, %13 ], [ false, %20 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %23 = load i64, ptr %7, align 8, !tbaa !9
  %24 = getelementptr inbounds %"class.Assimp::FBX::Node", ptr %9, i32 0, i32 6
  %25 = load i64, ptr %24, align 8, !tbaa !11
  %26 = sub i64 %23, %25
  store i64 %26, ptr %8, align 8, !tbaa !9
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %"class.Assimp::FBX::Node", ptr %9, i32 0, i32 4
  %29 = load i64, ptr %28, align 8, !tbaa !24
  %30 = add i64 %29, 8
  %31 = call noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56) %27, i64 noundef %30, i32 noundef 0)
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i64, ptr %6, align 8, !tbaa !9
  call void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56) %32, i64 noundef %33)
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i64, ptr %8, align 8, !tbaa !9
  call void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56) %34, i64 noundef %35)
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = load i64, ptr %7, align 8, !tbaa !9
  %38 = call noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56) %36, i64 noundef %37, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %39

39:                                               ; preds = %21, %12
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN6Assimp12StreamWriterILb0ELb0EE4TellEv(ptr noundef nonnull align 8 dereferenceable(56)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef) #1 align 2

declare void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i32 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 104}
!12 = !{!"_ZTSN6Assimp3FBX4NodeE", !13, i64 0, !15, i64 32, !19, i64 56, !23, i64 80, !10, i64 88, !10, i64 96, !10, i64 104}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !10, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"_ZTSSt6vectorIN6Assimp3FBX17FBXExportPropertyESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIN6Assimp3FBX4NodeESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"bool", !7, i64 0}
!24 = !{!12, !10, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.19 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [120 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6Assimp3FBX4Node19EndPropertiesBinaryERNS_12StreamWriterILb0ELb0EEEm(ptr nocapture noundef nonnull readonly align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = icmp eq i64 %2, 0
  br i1 %4, label %19, label %5

5:                                                ; preds = %3
  %6 = tail call noundef i64 @_ZN6Assimp12StreamWriterILb0ELb0EE4TellEv(ptr noundef nonnull align 8 dereferenceable(56) %1)
  %7 = getelementptr inbounds i8, ptr %0, i64 104
  %8 = load i64, ptr %7, align 8, !tbaa !5
  %9 = icmp ugt i64 %6, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %5
  tail call void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef nonnull @.str.19, ptr noundef nonnull @.str.20, i32 noundef 343)
  %.pre = load i64, ptr %7, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %10, %5
  %12 = phi i64 [ %.pre, %10 ], [ %8, %5 ]
  %13 = sub i64 %6, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 88
  %15 = load i64, ptr %14, align 8, !tbaa !22
  %16 = add i64 %15, 8
  %17 = tail call noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %16, i32 noundef 0)
  tail call void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %2)
  tail call void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %13)
  %18 = tail call noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56) %1, i64 noundef %6, i32 noundef 0)
  br label %19

19:                                               ; preds = %3, %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN6Assimp12StreamWriterILb0ELb0EE4TellEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Assimp12StreamWriterILb0ELb0EE5PutU8Em(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef) local_unnamed_addr #0 align 2

declare void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Assimp12StreamWriterILb0ELb0EE4SeekEm8aiOrigin(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i32 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 104}
!6 = !{!"_ZTSN6Assimp3FBX4NodeE", !7, i64 0, !13, i64 32, !17, i64 56, !21, i64 80, !12, i64 88, !12, i64 96, !12, i64 104}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTSSt6vectorIN6Assimp3FBX17FBXExportPropertyESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX17FBXExportPropertyESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!17 = !{!"_ZTSSt6vectorIN6Assimp3FBX4NodeESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN6Assimp3FBX4NodeESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!21 = !{!"bool", !10, i64 0}
!22 = !{!6, !12, i64 88}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass