; LLVM IR from holzschu/ios_system :: libinfo/gen.subproj (rthdr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cmsghdr = type { i64, i32, i32, [0 x i8] }
%struct.ip6_rthdr = type { i8, i8, i8, i8 }
%struct.ip6_rthdr0 = type { i8, i8, i8, i8, i8, [3 x i8], [0 x %struct.in6_addr] }
%struct.in6_addr = type { %union.anon }
%union.anon = type { [4 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @inet6_rthdr_lasthop(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.cmsghdr, ptr %9, i32 0, i32 3
  %11 = getelementptr inbounds [0 x i8], ptr %10, i64 0, i64 0
  store ptr %11, ptr %6, align 8, !tbaa !5
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.ip6_rthdr, ptr %12, i32 0, i32 2
  %14 = load i8, ptr %13, align 1, !tbaa !11
  %15 = zext i8 %14 to i32
  switch i32 %15, label %31 [
    i32 0, label %16
  ]

16:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %17, ptr %7, align 8, !tbaa !5
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.ip6_rthdr0, ptr %18, i32 0, i32 3
  %20 = load i8, ptr %19, align 1, !tbaa !13
  %21 = zext i8 %20 to i32
  %22 = icmp sgt i32 %21, 23
  br i1 %22, label %23, label %24

23:                                               ; preds = %16
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %29

24:                                               ; preds = %16
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %29

28:                                               ; preds = %24
  store i32 2, ptr %8, align 4
  br label %29

29:                                               ; preds = %28, %27, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  %30 = load i32, ptr %8, align 4
  switch i32 %30, label %33 [
    i32 2, label %32
  ]

31:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %33

32:                                               ; preds = %29
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %33

33:                                               ; preds = %32, %31, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %34 = load i32, ptr %3, align 4
  ret i32 %34
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 2}
!12 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!13 = !{!14, !7, i64 3}
!14 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local range(i32 -1, 1) i32 @inet6_rthdr_lasthop(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 18
  %4 = load i8, ptr %3, align 1, !tbaa !5
  %cond = icmp eq i8 %4, 0
  br i1 %cond, label %5, label %.thread

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 19
  %7 = load i8, ptr %6, align 1, !tbaa !9
  %8 = icmp ugt i8 %7, 23
  %.not = icmp ne i32 %1, 0
  %or.cond.not = or i1 %.not, %8
  %spec.select = sext i1 %or.cond.not to i32
  br label %.thread

.thread:                                          ; preds = %5, %2
  %.1 = phi i32 [ -1, %2 ], [ %spec.select, %5 ]
  ret i32 %.1
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 2}
!6 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 3}
!10 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass