; LLVM IR from Lakhankumawat/LearnCPP :: D-DynamicProgramming/UniquePaths.ll (Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !9
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = load i32, ptr %9, align 4, !tbaa !5
  %16 = icmp eq i32 %14, %15
  br i1 %16, label %17, label %22

17:                                               ; preds = %5
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = load i32, ptr %10, align 4, !tbaa !5
  %20 = icmp eq i32 %18, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %17
  store i32 1, ptr %6, align 4
  br label %89

22:                                               ; preds = %17, %5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = icmp slt i32 %23, 0
  br i1 %24, label %36, label %25

25:                                               ; preds = %22
  %26 = load i32, ptr %8, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 0
  br i1 %27, label %36, label %28

28:                                               ; preds = %25
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = icmp sgt i32 %29, %30
  br i1 %31, label %36, label %32

32:                                               ; preds = %28
  %33 = load i32, ptr %8, align 4, !tbaa !5
  %34 = load i32, ptr %10, align 4, !tbaa !5
  %35 = icmp sgt i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %32, %28, %25, %22
  store i32 0, ptr %6, align 4
  br label %89

37:                                               ; preds = %32
  %38 = load ptr, ptr %11, align 8, !tbaa !9
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #3
  %42 = load i32, ptr %8, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #3
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = icmp ne i32 %45, -1
  br i1 %46, label %47, label %56

47:                                               ; preds = %37
  %48 = load ptr, ptr %11, align 8, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #3
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #3
  %55 = load i32, ptr %54, align 4, !tbaa !5
  store i32 %55, ptr %6, align 4
  br label %89

56:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = load i32, ptr %10, align 4, !tbaa !5
  %62 = load ptr, ptr %11, align 8, !tbaa !9
  %63 = call noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %57, i32 noundef %59, i32 noundef %60, i32 noundef %61, ptr noundef nonnull align 8 dereferenceable(24) %62)
  store i32 %63, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = load i32, ptr %9, align 4, !tbaa !5
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = load ptr, ptr %11, align 8, !tbaa !9
  %70 = call noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %65, i32 noundef %66, i32 noundef %67, i32 noundef %68, ptr noundef nonnull align 8 dereferenceable(24) %69)
  store i32 %70, ptr %13, align 4, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = load i32, ptr %13, align 4, !tbaa !5
  %73 = add nsw i32 %71, %72
  %74 = load ptr, ptr %11, align 8, !tbaa !9
  %75 = load i32, ptr %7, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #3
  %78 = load i32, ptr %8, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #3
  store i32 %73, ptr %80, align 4, !tbaa !5
  %81 = load ptr, ptr %11, align 8, !tbaa !9
  %82 = load i32, ptr %7, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %83) #3
  %85 = load i32, ptr %8, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #3
  %88 = load i32, ptr %87, align 4, !tbaa !5
  store i32 %88, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %89

89:                                               ; preds = %56, %47, %36, %21
  %90 = load i32, ptr %6, align 4
  ret i32 %90
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4) local_unnamed_addr #0 {
  %6 = icmp eq i32 %0, %2
  %7 = icmp eq i32 %1, %3
  %or.cond = and i1 %6, %7
  br i1 %or.cond, label %common.ret, label %8

8:                                                ; preds = %5
  %9 = or i32 %1, %0
  %or.cond.not = icmp slt i32 %9, 0
  %10 = icmp sgt i32 %0, %2
  %or.cond39 = or i1 %or.cond.not, %10
  %11 = icmp sgt i32 %1, %3
  %or.cond40 = or i1 %or.cond39, %11
  br i1 %or.cond40, label %common.ret, label %12

12:                                               ; preds = %8
  %13 = zext nneg i32 %0 to i64
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %13) #1
  %15 = zext nneg i32 %1 to i64
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not = icmp eq i32 %17, -1
  br i1 %.not, label %21, label %common.ret.sink.split

common.ret.sink.split:                            ; preds = %12, %21
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %13) #1
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %15) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  br label %common.ret

common.ret:                                       ; preds = %common.ret.sink.split, %5, %8
  %common.ret.op = phi i32 [ 1, %5 ], [ 0, %8 ], [ %20, %common.ret.sink.split ]
  ret i32 %common.ret.op

21:                                               ; preds = %12
  %22 = add nuw nsw i32 %1, 1
  %23 = tail call noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %0, i32 noundef %22, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  %24 = add nuw nsw i32 %0, 1
  %25 = tail call noundef i32 @_Z10totalPathsiiiiRSt6vectorIS_IiSaIiEESaIS1_EE(i32 noundef %24, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  %26 = add nsw i32 %25, %23
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %13) #1
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %15) #1
  store i32 %26, ptr %28, align 4, !tbaa !5
  br label %common.ret.sink.split
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass