; LLVM IR from kazunetakahashi/atcoder :: 2017/0317_ABC055/D.ll (Z5checkSt6vectorIbSaIbEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"struct.std::_Bit_reference" = type { ptr, i64 }

@N = external dso_local global i32, align 4
@X = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [80 x i8], align 1
@__PRETTY_FUNCTION__._Z5checkSt6vectorIbSaIbEE = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z2okbbbb(i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIbSaIbEE(ptr noundef %0) #1 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"struct.std::_Bit_reference", align 8
  %10 = alloca %"struct.std::_Bit_reference", align 8
  %11 = alloca %"struct.std::_Bit_reference", align 8
  %12 = alloca %"struct.std::_Bit_reference", align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %13 = load i32, ptr @N, align 4, !tbaa !9
  %14 = call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %0) #4
  %15 = trunc i64 %14 to i32
  %16 = icmp eq i32 %13, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %1
  br label %20

18:                                               ; preds = %1
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.3, i32 noundef 57, ptr noundef @__PRETTY_FUNCTION__._Z5checkSt6vectorIbSaIbEE) #5
  unreachable

19:                                               ; No predecessors!
  br label %20

20:                                               ; preds = %19, %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %87, %20
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = load i32, ptr @N, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 2, ptr %5, align 4
  br label %90

26:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %27 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %27, ptr %8, align 4, !tbaa !9
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %33

30:                                               ; preds = %26
  %31 = load i32, ptr @N, align 4, !tbaa !9
  %32 = sub nsw i32 %31, 1
  store i32 %32, ptr %6, align 4, !tbaa !9
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %47

33:                                               ; preds = %26
  %34 = load i32, ptr %4, align 4, !tbaa !9
  %35 = load i32, ptr @N, align 4, !tbaa !9
  %36 = sub nsw i32 %35, 1
  %37 = icmp eq i32 %34, %36
  br i1 %37, label %38, label %41

38:                                               ; preds = %33
  %39 = load i32, ptr @N, align 4, !tbaa !9
  %40 = sub nsw i32 %39, 2
  store i32 %40, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %46

41:                                               ; preds = %33
  %42 = load i32, ptr %4, align 4, !tbaa !9
  %43 = sub nsw i32 %42, 1
  store i32 %43, ptr %6, align 4, !tbaa !9
  %44 = load i32, ptr %4, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %7, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %41, %38
  br label %47

47:                                               ; preds = %46, %30
  call void @llvm.lifetime.start.p0(i64 16, ptr %9) #4
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %49)
  %51 = getelementptr inbounds { ptr, i64 }, ptr %9, i32 0, i32 0
  %52 = extractvalue { ptr, i64 } %50, 0
  store ptr %52, ptr %51, align 8
  %53 = getelementptr inbounds { ptr, i64 }, ptr %9, i32 0, i32 1
  %54 = extractvalue { ptr, i64 } %50, 1
  store i64 %54, ptr %53, align 8
  %55 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %9) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %10) #4
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %57)
  %59 = getelementptr inbounds { ptr, i64 }, ptr %10, i32 0, i32 0
  %60 = extractvalue { ptr, i64 } %58, 0
  store ptr %60, ptr %59, align 8
  %61 = getelementptr inbounds { ptr, i64 }, ptr %10, i32 0, i32 1
  %62 = extractvalue { ptr, i64 } %58, 1
  store i64 %62, ptr %61, align 8
  %63 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #4
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %65)
  %67 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 0
  %68 = extractvalue { ptr, i64 } %66, 0
  store ptr %68, ptr %67, align 8
  %69 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 1
  %70 = extractvalue { ptr, i64 } %66, 1
  store i64 %70, ptr %69, align 8
  %71 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %11) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #4
  %72 = load i32, ptr %8, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @X, i64 noundef %73)
  %75 = getelementptr inbounds { ptr, i64 }, ptr %12, i32 0, i32 0
  %76 = extractvalue { ptr, i64 } %74, 0
  store ptr %76, ptr %75, align 8
  %77 = getelementptr inbounds { ptr, i64 }, ptr %12, i32 0, i32 1
  %78 = extractvalue { ptr, i64 } %74, 1
  store i64 %78, ptr %77, align 8
  %79 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %12) #4
  %80 = call noundef zeroext i1 @_Z2okbbbb(i1 noundef zeroext %55, i1 noundef zeroext %63, i1 noundef zeroext %71, i1 noundef zeroext %79)
  %81 = xor i1 %80, true
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #4
  br i1 %81, label %82, label %83

82:                                               ; preds = %47
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %84

83:                                               ; preds = %47
  store i32 0, ptr %5, align 4
  br label %84

84:                                               ; preds = %83, %82
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %85 = load i32, ptr %5, align 4
  switch i32 %85, label %90 [
    i32 0, label %86
  ]

86:                                               ; preds = %84
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %4, align 4, !tbaa !9
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %4, align 4, !tbaa !9
  br label %21, !llvm.loop !11

90:                                               ; preds = %84, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %91 = load i32, ptr %5, align 4
  switch i32 %91, label %95 [
    i32 2, label %92
    i32 1, label %93
  ]

92:                                               ; preds = %90
  store i1 true, ptr %2, align 1
  br label %93

93:                                               ; preds = %92, %90
  %94 = load i1, ptr %2, align 1
  ret i1 %94

95:                                               ; preds = %90
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"struct.std::_Bit_reference" = type { ptr, i64 }

@N = external dso_local local_unnamed_addr global i32, align 4
@X = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [80 x i8], align 1
@__PRETTY_FUNCTION__._Z5checkSt6vectorIbSaIbEE = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z2okbbbb(i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIbSaIbEE(ptr noundef nonnull %0) local_unnamed_addr #1 {
  %2 = alloca %"struct.std::_Bit_reference", align 8
  %3 = alloca %"struct.std::_Bit_reference", align 8
  %4 = alloca %"struct.std::_Bit_reference", align 8
  %5 = alloca %"struct.std::_Bit_reference", align 8
  %6 = load i32, ptr @N, align 4, !tbaa !5
  %7 = tail call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %0) #4
  %8 = trunc i64 %7 to i32
  %9 = icmp eq i32 %6, %8
  br i1 %9, label %.preheader, label %39

.preheader:                                       ; preds = %1
  %10 = load i32, ptr @N, align 4, !tbaa !5
  %11 = icmp slt i32 %10, 1
  br i1 %11, label %._crit_edge, label %12

12:                                               ; preds = %.preheader
  %13 = getelementptr inbounds i8, ptr %2, i64 8
  %14 = getelementptr inbounds i8, ptr %3, i64 8
  %15 = getelementptr inbounds i8, ptr %4, i64 8
  %16 = getelementptr inbounds i8, ptr %5, i64 8
  %17 = add nsw i32 %10, -1
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #4
  %18 = zext nneg i32 %17 to i64
  %19 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %18)
  %20 = extractvalue { ptr, i64 } %19, 0
  store ptr %20, ptr %2, align 8
  %21 = extractvalue { ptr, i64 } %19, 1
  store i64 %21, ptr %13, align 8
  %22 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %2) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #4
  %23 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef 0)
  %24 = extractvalue { ptr, i64 } %23, 0
  store ptr %24, ptr %3, align 8
  %25 = extractvalue { ptr, i64 } %23, 1
  store i64 %25, ptr %14, align 8
  %26 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #4
  %27 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef 1)
  %28 = extractvalue { ptr, i64 } %27, 0
  store ptr %28, ptr %4, align 8
  %29 = extractvalue { ptr, i64 } %27, 1
  store i64 %29, ptr %15, align 8
  %30 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #4
  %31 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @X, i64 noundef 0)
  %32 = extractvalue { ptr, i64 } %31, 0
  store ptr %32, ptr %5, align 8
  %33 = extractvalue { ptr, i64 } %31, 1
  store i64 %33, ptr %16, align 8
  %34 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %5) #4
  %35 = call noundef zeroext i1 @_Z2okbbbb(i1 noundef zeroext %22, i1 noundef zeroext %26, i1 noundef zeroext %30, i1 noundef zeroext %34)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #4
  br i1 %35, label %36, label %._crit_edge

36:                                               ; preds = %12
  %37 = load i32, ptr @N, align 4, !tbaa !5
  %38 = icmp slt i32 %37, 2
  br i1 %38, label %._crit_edge, label %.peel.next

39:                                               ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.3, i32 noundef 57, ptr noundef nonnull @__PRETTY_FUNCTION__._Z5checkSt6vectorIbSaIbEE) #5
  unreachable

40:                                               ; preds = %.peel.next
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %41 = load i32, ptr @N, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %.not = icmp slt i64 %indvars.iv.next, %42
  br i1 %.not, label %.peel.next, label %._crit_edge, !llvm.loop !9

.peel.next:                                       ; preds = %36, %40
  %indvars.iv = phi i64 [ %indvars.iv.next, %40 ], [ 1, %36 ]
  %43 = phi i32 [ %41, %40 ], [ %37, %36 ]
  %44 = add nsw i32 %43, -1
  %45 = zext i32 %44 to i64
  %46 = icmp eq i64 %indvars.iv, %45
  %47 = add nsw i32 %43, -2
  %48 = trunc i64 %indvars.iv to i32
  %49 = add i32 %48, -1
  %.014 = select i1 %46, i32 %47, i32 %49
  %50 = shl i64 %indvars.iv, 32
  %51 = add i64 %50, 4294967296
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #4
  %52 = sext i32 %.014 to i64
  %53 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %52)
  %54 = extractvalue { ptr, i64 } %53, 0
  store ptr %54, ptr %2, align 8
  %55 = extractvalue { ptr, i64 } %53, 1
  store i64 %55, ptr %13, align 8
  %56 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %2) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #4
  %57 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %indvars.iv)
  %58 = extractvalue { ptr, i64 } %57, 0
  store ptr %58, ptr %3, align 8
  %59 = extractvalue { ptr, i64 } %57, 1
  store i64 %59, ptr %14, align 8
  %60 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #4
  %61 = ashr exact i64 %51, 32
  %62 = select i1 %46, i64 0, i64 %61
  %63 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %62)
  %64 = extractvalue { ptr, i64 } %63, 0
  store ptr %64, ptr %4, align 8
  %65 = extractvalue { ptr, i64 } %63, 1
  store i64 %65, ptr %15, align 8
  %66 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #4
  %67 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @X, i64 noundef %indvars.iv)
  %68 = extractvalue { ptr, i64 } %67, 0
  store ptr %68, ptr %5, align 8
  %69 = extractvalue { ptr, i64 } %67, 1
  store i64 %69, ptr %16, align 8
  %70 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %5) #4
  %71 = call noundef zeroext i1 @_Z2okbbbb(i1 noundef zeroext %56, i1 noundef zeroext %60, i1 noundef zeroext %66, i1 noundef zeroext %70)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #4
  br i1 %71, label %40, label %._crit_edge

._crit_edge:                                      ; preds = %.peel.next, %40, %12, %36, %.preheader
  %.lcssa = phi i1 [ true, %.preheader ], [ false, %12 ], [ true, %36 ], [ %71, %40 ], [ %71, %.peel.next ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass