; LLVM IR from tyoma/agge :: src/agge/hybrid_event.ll (ZN4agge12hybrid_event4waitEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.agge::hybrid_event" = type { i64, ptr }

declare noundef i64 @_ZN4agge20interlocked_exchangeEPVll(ptr noundef, i64 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  br label %6

6:                                                ; preds = %29, %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 5000, ptr %3, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %17, %6
  %8 = load i32, ptr %3, align 4, !tbaa !9
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  store i32 4, ptr %4, align 4
  br label %20

11:                                               ; preds = %7
  %12 = getelementptr inbounds %"class.agge::hybrid_event", ptr %5, i32 0, i32 0
  %13 = call noundef i64 @_ZN4agge20interlocked_exchangeEPVll(ptr noundef %12, i64 noundef 0)
  %14 = icmp eq i64 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %11
  store i32 1, ptr %4, align 4
  br label %20

16:                                               ; preds = %11
  call void @_ZN4agge5pauseEv()
  br label %17

17:                                               ; preds = %16
  %18 = load i32, ptr %3, align 4, !tbaa !9
  %19 = add i32 %18, -1
  store i32 %19, ptr %3, align 4, !tbaa !9
  br label %7, !llvm.loop !11

20:                                               ; preds = %15, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  %21 = load i32, ptr %4, align 4
  switch i32 %21, label %31 [
    i32 4, label %22
    i32 1, label %30
  ]

22:                                               ; preds = %20
  %23 = getelementptr inbounds %"class.agge::hybrid_event", ptr %5, i32 0, i32 0
  %24 = call noundef i64 @_ZN4agge28interlocked_compare_exchangeEPVlll(ptr noundef %23, i64 noundef 2, i64 noundef 0)
  %25 = icmp eq i64 %24, 0
  br i1 %25, label %26, label %29

26:                                               ; preds = %22
  %27 = getelementptr inbounds %"class.agge::hybrid_event", ptr %5, i32 0, i32 1
  %28 = load ptr, ptr %27, align 8, !tbaa !13
  call void @_ZN4agge9semaphore4waitEv(ptr noundef nonnull align 1 dereferenceable(32) %28)
  br label %29

29:                                               ; preds = %26, %22
  br label %6, !llvm.loop !16

30:                                               ; preds = %20
  ret void

31:                                               ; preds = %20
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @_ZN4agge5pauseEv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare noundef i64 @_ZN4agge28interlocked_compare_exchangeEPVlll(ptr noundef, i64 noundef, i64 noundef) #0

declare void @_ZN4agge9semaphore4waitEv(ptr noundef nonnull align 1 dereferenceable(32)) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 8}
!14 = !{!"_ZTSN4agge12hybrid_eventE", !15, i64 0, !6, i64 8}
!15 = !{!"long", !7, i64 0}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare noundef i64 @_ZN4agge20interlocked_exchangeEPVll(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  br label %3

3:                                                ; preds = %.backedge, %1
  %.037 = phi i32 [ 5000, %1 ], [ %.037.be, %.backedge ]
  %4 = tail call noundef i64 @_ZN4agge20interlocked_exchangeEPVll(ptr noundef nonnull %0, i64 noundef 0)
  %5 = icmp eq i64 %4, 1
  br i1 %5, label %13, label %6

6:                                                ; preds = %3
  tail call void @_ZN4agge5pauseEv()
  %7 = add nsw i32 %.037, -1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %.backedge

.backedge:                                        ; preds = %6, %11, %8
  %.037.be = phi i32 [ %7, %6 ], [ 5000, %11 ], [ 5000, %8 ]
  br label %3, !llvm.loop !5

8:                                                ; preds = %6
  %9 = tail call noundef i64 @_ZN4agge28interlocked_compare_exchangeEPVlll(ptr noundef nonnull %0, i64 noundef 2, i64 noundef 0)
  %10 = icmp eq i64 %9, 0
  br i1 %10, label %11, label %.backedge

11:                                               ; preds = %8
  %12 = load ptr, ptr %2, align 8, !tbaa !7
  tail call void @_ZN4agge9semaphore4waitEv(ptr noundef nonnull align 1 dereferenceable(32) %12)
  br label %.backedge

13:                                               ; preds = %3
  ret void
}

declare void @_ZN4agge5pauseEv() local_unnamed_addr #0

declare noundef i64 @_ZN4agge28interlocked_compare_exchangeEPVlll(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

declare void @_ZN4agge9semaphore4waitEv(ptr noundef nonnull align 1 dereferenceable(32)) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !12, i64 8}
!8 = !{!"_ZTSN4agge12hybrid_eventE", !9, i64 0, !12, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass