; LLVM IR from venumb/ZSPACE :: cpp/depends/alglib/cpp/src (alglibmisc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.alglib_impl::ae_vector" = type { i64, i64, i8, %"struct.alglib_impl::ae_dyn_block", %union.anon.0 }
%"struct.alglib_impl::ae_dyn_block" = type { ptr, ptr, ptr, ptr }
%union.anon.0 = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN11alglib_impl13xdebugb1countEPNS_9ae_vectorEPNS_8ae_stateE(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !9
  store i64 0, ptr %5, align 8, !tbaa !9
  br label %7

7:                                                ; preds = %26, %2
  %8 = load i64, ptr %5, align 8, !tbaa !9
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds %"struct.alglib_impl::ae_vector", ptr %9, i32 0, i32 0
  %11 = load i64, ptr %10, align 8, !tbaa !11
  %12 = sub nsw i64 %11, 1
  %13 = icmp sle i64 %8, %12
  br i1 %13, label %14, label %29

14:                                               ; preds = %7
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %"struct.alglib_impl::ae_vector", ptr %15, i32 0, i32 4
  %17 = load ptr, ptr %16, align 8, !tbaa !15
  %18 = load i64, ptr %5, align 8, !tbaa !9
  %19 = getelementptr inbounds i8, ptr %17, i64 %18
  %20 = load i8, ptr %19, align 1, !tbaa !16, !range !17, !noundef !18
  %21 = trunc i8 %20 to i1
  br i1 %21, label %22, label %25

22:                                               ; preds = %14
  %23 = load i64, ptr %6, align 8, !tbaa !9
  %24 = add nsw i64 %23, 1
  store i64 %24, ptr %6, align 8, !tbaa !9
  br label %25

25:                                               ; preds = %22, %14
  br label %26

26:                                               ; preds = %25
  %27 = load i64, ptr %5, align 8, !tbaa !9
  %28 = add nsw i64 %27, 1
  store i64 %28, ptr %5, align 8, !tbaa !9
  br label %7, !llvm.loop !19

29:                                               ; preds = %7
  %30 = load i64, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret i64 %30
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTSN11alglib_impl9ae_vectorE", !10, i64 0, !10, i64 8, !13, i64 16, !14, i64 24, !7, i64 56}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"_ZTSN11alglib_impl12ae_dyn_blockE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!15 = !{!7, !7, i64 0}
!16 = !{!13, !13, i64 0}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local noundef i64 @_ZN11alglib_impl13xdebugb1countEPNS_9ae_vectorEPNS_8ae_stateE(ptr nocapture noundef readonly %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %.not.not7 = icmp sgt i64 %3, 0
  br i1 %.not.not7, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = load ptr, ptr %4, align 8, !tbaa !13
  %xtraiter = and i64 %3, 7
  %6 = icmp ult i64 %3, 8
  br i1 %6, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %3, 9223372036854775800
  br label %7

7:                                                ; preds = %7, %.lr.ph.new
  %.09 = phi i64 [ 0, %.lr.ph.new ], [ %spec.select.7, %7 ]
  %.068 = phi i64 [ 0, %.lr.ph.new ], [ %39, %7 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.7, %7 ]
  %8 = getelementptr inbounds i8, ptr %5, i64 %.068
  %9 = load i8, ptr %8, align 1, !tbaa !14, !range !15, !noundef !16
  %10 = zext nneg i8 %9 to i64
  %spec.select = add nuw nsw i64 %.09, %10
  %11 = or disjoint i64 %.068, 1
  %12 = getelementptr inbounds i8, ptr %5, i64 %11
  %13 = load i8, ptr %12, align 1, !tbaa !14, !range !15, !noundef !16
  %14 = zext nneg i8 %13 to i64
  %spec.select.1 = add nuw nsw i64 %spec.select, %14
  %15 = or disjoint i64 %.068, 2
  %16 = getelementptr inbounds i8, ptr %5, i64 %15
  %17 = load i8, ptr %16, align 1, !tbaa !14, !range !15, !noundef !16
  %18 = zext nneg i8 %17 to i64
  %spec.select.2 = add nuw nsw i64 %spec.select.1, %18
  %19 = or disjoint i64 %.068, 3
  %20 = getelementptr inbounds i8, ptr %5, i64 %19
  %21 = load i8, ptr %20, align 1, !tbaa !14, !range !15, !noundef !16
  %22 = zext nneg i8 %21 to i64
  %spec.select.3 = add nuw nsw i64 %spec.select.2, %22
  %23 = or disjoint i64 %.068, 4
  %24 = getelementptr inbounds i8, ptr %5, i64 %23
  %25 = load i8, ptr %24, align 1, !tbaa !14, !range !15, !noundef !16
  %26 = zext nneg i8 %25 to i64
  %spec.select.4 = add nuw nsw i64 %spec.select.3, %26
  %27 = or disjoint i64 %.068, 5
  %28 = getelementptr inbounds i8, ptr %5, i64 %27
  %29 = load i8, ptr %28, align 1, !tbaa !14, !range !15, !noundef !16
  %30 = zext nneg i8 %29 to i64
  %spec.select.5 = add nuw nsw i64 %spec.select.4, %30
  %31 = or disjoint i64 %.068, 6
  %32 = getelementptr inbounds i8, ptr %5, i64 %31
  %33 = load i8, ptr %32, align 1, !tbaa !14, !range !15, !noundef !16
  %34 = zext nneg i8 %33 to i64
  %spec.select.6 = add nuw nsw i64 %spec.select.5, %34
  %35 = or disjoint i64 %.068, 7
  %36 = getelementptr inbounds i8, ptr %5, i64 %35
  %37 = load i8, ptr %36, align 1, !tbaa !14, !range !15, !noundef !16
  %38 = zext nneg i8 %37 to i64
  %spec.select.7 = add nuw nsw i64 %spec.select.6, %38
  %39 = add nuw nsw i64 %.068, 8
  %niter.next.7 = add i64 %niter, 8
  %niter.ncmp.7 = icmp eq i64 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.loopexit.unr-lcssa, label %7, !llvm.loop !17

._crit_edge.loopexit.unr-lcssa:                   ; preds = %7, %.lr.ph
  %spec.select.lcssa.ph = phi i64 [ poison, %.lr.ph ], [ %spec.select.7, %7 ]
  %.09.unr = phi i64 [ 0, %.lr.ph ], [ %spec.select.7, %7 ]
  %.068.unr = phi i64 [ 0, %.lr.ph ], [ %39, %7 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader
  %.09.epil = phi i64 [ %spec.select.epil, %.epil.preheader ], [ %.09.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.068.epil = phi i64 [ %43, %.epil.preheader ], [ %.068.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %40 = getelementptr inbounds i8, ptr %5, i64 %.068.epil
  %41 = load i8, ptr %40, align 1, !tbaa !14, !range !15, !noundef !16
  %42 = zext nneg i8 %41 to i64
  %spec.select.epil = add nuw nsw i64 %.09.epil, %42
  %43 = add nuw nsw i64 %.068.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.epil.preheader, !llvm.loop !19

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader, %2
  %.0.lcssa = phi i64 [ 0, %2 ], [ %spec.select.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select.epil, %.epil.preheader ]
  ret i64 %.0.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN11alglib_impl9ae_vectorE", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 24, !8, i64 56}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"_ZTSN11alglib_impl12ae_dyn_blockE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass