; LLVM IR from maliput/maliput :: src/maliput/routing (route)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::optional" = type { %"struct.std::_Optional_base" }
%"struct.std::_Optional_base" = type { %"struct.std::_Optional_payload" }
%"struct.std::_Optional_payload" = type { %"struct.std::_Optional_payload_base.base", [7 x i8] }
%"struct.std::_Optional_payload_base.base" = type <{ %"union.std::_Optional_payload_base<maliput::routing::Route::LaneSRangeIndex>::_Storage", i8 }>
%"union.std::_Optional_payload_base<maliput::routing::Route::LaneSRangeIndex>::_Storage" = type { %"struct.maliput::routing::Route::LaneSRangeIndex" }
%"struct.maliput::routing::Route::LaneSRangeIndex" = type { i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7maliput7routing5Phase13lane_s_rangesEv(ptr noundef nonnull align 8 dereferenceable(96)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7maliput3api10LaneSRangeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt8optionalIN7maliput7routing5Route15LaneSRangeIndexEE9has_valueEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7maliput7routing5Route23FindStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr dead_on_unwind noalias writable sret(%"class.std::optional") align 8, ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZNK7maliput7routing5Route53FindDirectionTowardsLaneSRangeWithStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr noundef nonnull align 8 dereferenceable(88) %0, ptr noundef nonnull align 8 dereferenceable(16) %1) #2 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca %"class.std::optional", align 8
  %12 = alloca %"struct.maliput::routing::Route::LaneSRangeIndex", align 8
  %13 = alloca i64, align 8
  %14 = alloca %"class.std::optional", align 8
  %15 = alloca %"struct.maliput::routing::Route::LaneSRangeIndex", align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %16 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %17, i32 0, i32 0
  %19 = load i64, ptr %18, align 8, !tbaa !9
  %20 = trunc i64 %19 to i32
  %21 = call noundef nonnull align 8 dereferenceable(96) ptr @_ZNK7maliput7routing5Route3GetEi(ptr noundef nonnull align 8 dereferenceable(88) %16, i32 noundef %20)
  store ptr %21, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7maliput7routing5Phase13lane_s_rangesEv(ptr noundef nonnull align 8 dereferenceable(96) %22)
  %24 = call noundef i64 @_ZNKSt6vectorIN7maliput3api10LaneSRangeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %23) #3
  %25 = sub i64 %24, 1
  store i64 %25, ptr %8, align 8, !tbaa !12
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %26, i32 0, i32 1
  %28 = load i64, ptr %27, align 8, !tbaa !13
  %29 = icmp eq i64 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %2
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %98

31:                                               ; preds = %2
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %32, i32 0, i32 1
  %34 = load i64, ptr %33, align 8, !tbaa !13
  %35 = load i64, ptr %8, align 8, !tbaa !12
  %36 = icmp eq i64 %34, %35
  br i1 %36, label %37, label %38

37:                                               ; preds = %31
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %98

38:                                               ; preds = %31
  br label %39

39:                                               ; preds = %38
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %40, i32 0, i32 1
  %42 = load i64, ptr %41, align 8, !tbaa !13
  %43 = load i64, ptr %8, align 8, !tbaa !12
  %44 = load i64, ptr %8, align 8, !tbaa !12
  %45 = sub i64 %43, %44
  %46 = icmp ule i64 %42, %45
  br i1 %46, label %47, label %72

47:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %48, i32 0, i32 1
  %50 = load i64, ptr %49, align 8, !tbaa !13
  %51 = sub i64 %50, 1
  store i64 %51, ptr %10, align 8, !tbaa !12
  br label %52

52:                                               ; preds = %66, %47
  %53 = load i64, ptr %10, align 8, !tbaa !12
  %54 = icmp uge i64 %53, 0
  br i1 %54, label %56, label %55

55:                                               ; preds = %52
  store i32 2, ptr %9, align 4
  br label %69

56:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 24, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #3
  %57 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %12, i32 0, i32 0
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %58, i32 0, i32 0
  %60 = load i64, ptr %59, align 8, !tbaa !9
  store i64 %60, ptr %57, align 8, !tbaa !9
  %61 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %12, i32 0, i32 1
  %62 = load i64, ptr %10, align 8, !tbaa !12
  store i64 %62, ptr %61, align 8, !tbaa !13
  call void @_ZNK7maliput7routing5Route23FindStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr dead_on_unwind writable sret(%"class.std::optional") align 8 %11, ptr noundef nonnull align 8 dereferenceable(88) %16, ptr noundef nonnull align 8 dereferenceable(16) %12)
  %63 = call noundef zeroext i1 @_ZNKSt8optionalIN7maliput7routing5Route15LaneSRangeIndexEE9has_valueEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #3
  br i1 %63, label %64, label %65

64:                                               ; preds = %56
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %69

65:                                               ; preds = %56
  br label %66

66:                                               ; preds = %65
  %67 = load i64, ptr %10, align 8, !tbaa !12
  %68 = add i64 %67, -1
  store i64 %68, ptr %10, align 8, !tbaa !12
  br label %52, !llvm.loop !14

69:                                               ; preds = %64, %55
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %70 = load i32, ptr %9, align 4
  switch i32 %70, label %98 [
    i32 2, label %71
  ]

71:                                               ; preds = %69
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %98

72:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %73, i32 0, i32 1
  %75 = load i64, ptr %74, align 8, !tbaa !13
  %76 = add i64 %75, 1
  store i64 %76, ptr %13, align 8, !tbaa !12
  br label %77

77:                                               ; preds = %92, %72
  %78 = load i64, ptr %13, align 8, !tbaa !12
  %79 = load i64, ptr %8, align 8, !tbaa !12
  %80 = icmp ule i64 %78, %79
  br i1 %80, label %82, label %81

81:                                               ; preds = %77
  store i32 5, ptr %9, align 4
  br label %95

82:                                               ; preds = %77
  call void @llvm.lifetime.start.p0(i64 24, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #3
  %83 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %15, i32 0, i32 0
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %84, i32 0, i32 0
  %86 = load i64, ptr %85, align 8, !tbaa !9
  store i64 %86, ptr %83, align 8, !tbaa !9
  %87 = getelementptr inbounds %"struct.maliput::routing::Route::LaneSRangeIndex", ptr %15, i32 0, i32 1
  %88 = load i64, ptr %13, align 8, !tbaa !12
  store i64 %88, ptr %87, align 8, !tbaa !13
  call void @_ZNK7maliput7routing5Route23FindStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr dead_on_unwind writable sret(%"class.std::optional") align 8 %14, ptr noundef nonnull align 8 dereferenceable(88) %16, ptr noundef nonnull align 8 dereferenceable(16) %15)
  %89 = call noundef zeroext i1 @_ZNKSt8optionalIN7maliput7routing5Route15LaneSRangeIndexEE9has_valueEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %14) #3
  br i1 %89, label %90, label %91

90:                                               ; preds = %82
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %95

91:                                               ; preds = %82
  br label %92

92:                                               ; preds = %91
  %93 = load i64, ptr %13, align 8, !tbaa !12
  %94 = add i64 %93, 1
  store i64 %94, ptr %13, align 8, !tbaa !12
  br label %77, !llvm.loop !16

95:                                               ; preds = %90, %81
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  %96 = load i32, ptr %9, align 4
  switch i32 %96, label %98 [
    i32 5, label %97
  ]

97:                                               ; preds = %95
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %98

98:                                               ; preds = %97, %95, %71, %69, %37, %30
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %99 = load i32, ptr %3, align 4
  ret i32 %99
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNK7maliput7routing5Route3GetEi(ptr noundef nonnull align 8 dereferenceable(88), i32 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTSN7maliput7routing5Route15LaneSRangeIndexE", !11, i64 0, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::optional" = type { %"struct.std::_Optional_base" }
%"struct.std::_Optional_base" = type { %"struct.std::_Optional_payload" }
%"struct.std::_Optional_payload" = type { %"struct.std::_Optional_payload_base.base", [7 x i8] }
%"struct.std::_Optional_payload_base.base" = type <{ %"union.std::_Optional_payload_base<maliput::routing::Route::LaneSRangeIndex>::_Storage", i8 }>
%"union.std::_Optional_payload_base<maliput::routing::Route::LaneSRangeIndex>::_Storage" = type { %"struct.maliput::routing::Route::LaneSRangeIndex" }
%"struct.maliput::routing::Route::LaneSRangeIndex" = type { i64, i64 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7maliput7routing5Phase13lane_s_rangesEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7maliput3api10LaneSRangeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt8optionalIN7maliput7routing5Route15LaneSRangeIndexEE9has_valueEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7maliput7routing5Route23FindStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr dead_on_unwind noalias writable sret(%"class.std::optional") align 8, ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -1, 2) i32 @_ZNK7maliput7routing5Route53FindDirectionTowardsLaneSRangeWithStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr noundef nonnull align 8 dereferenceable(88) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(16) %1) local_unnamed_addr #2 align 2 {
  %3 = alloca %"class.std::optional", align 8
  %4 = alloca %"struct.maliput::routing::Route::LaneSRangeIndex", align 8
  %5 = load i64, ptr %1, align 8, !tbaa !5
  %6 = trunc i64 %5 to i32
  %7 = tail call noundef nonnull align 8 dereferenceable(96) ptr @_ZNK7maliput7routing5Route3GetEi(ptr noundef nonnull align 8 dereferenceable(88) %0, i32 noundef %6)
  %8 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7maliput7routing5Phase13lane_s_rangesEv(ptr noundef nonnull align 8 dereferenceable(96) %7)
  %9 = tail call noundef i64 @_ZNKSt6vectorIN7maliput3api10LaneSRangeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  %10 = add i64 %9, -1
  %11 = getelementptr inbounds i8, ptr %1, i64 8
  %12 = load i64, ptr %11, align 8, !tbaa !10
  %13 = icmp eq i64 %12, 0
  br i1 %13, label %.loopexit, label %14

14:                                               ; preds = %2
  %15 = icmp eq i64 %12, %10
  br i1 %15, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %14
  %16 = getelementptr inbounds i8, ptr %4, i64 8
  br label %17

17:                                               ; preds = %.preheader, %18
  %.0.in = phi i64 [ %.0, %18 ], [ %12, %.preheader ]
  %.0 = add i64 %.0.in, 1
  %.not = icmp ugt i64 %.0, %10
  br i1 %.not, label %.loopexit, label %18

18:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  %19 = load i64, ptr %1, align 8, !tbaa !5
  store i64 %19, ptr %4, align 8, !tbaa !5
  store i64 %.0, ptr %16, align 8, !tbaa !10
  call void @_ZNK7maliput7routing5Route23FindStraightPredecessorERKNS1_15LaneSRangeIndexE(ptr dead_on_unwind nonnull writable sret(%"class.std::optional") align 8 %3, ptr noundef nonnull align 8 dereferenceable(88) %0, ptr noundef nonnull align 8 dereferenceable(16) %4)
  %20 = call noundef zeroext i1 @_ZNKSt8optionalIN7maliput7routing5Route15LaneSRangeIndexEE9has_valueEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
  br i1 %20, label %.loopexit, label %17, !llvm.loop !11

.loopexit:                                        ; preds = %17, %18, %14, %2
  %.2 = phi i32 [ 1, %2 ], [ -1, %14 ], [ -1, %17 ], [ 1, %18 ]
  ret i32 %.2
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNK7maliput7routing5Route3GetEi(ptr noundef nonnull align 8 dereferenceable(88), i32 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7maliput7routing5Route15LaneSRangeIndexE", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,PromotePass,SROAPass,SimplifyCFGPass,TailCallElimPass