; LLVM IR from tyoma/agge :: src/agge/parallel.ll (ZN4agge8parallel6thread11thread_procEPv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.agge::parallel::thread" = type { [8 x i8], %"class.agge::hybrid_event", %"class.agge::hybrid_event", ptr, i32, %"class.agge::thread" }
%"class.agge::hybrid_event" = type { i64, ptr }
%"class.agge::thread" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge8parallel6thread11thread_procEPv(ptr noundef %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %4, ptr %3, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %22, %1
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %6, i32 0, i32 1
  call void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16) %7)
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %8, i32 0, i32 3
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %27

12:                                               ; preds = %5
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %13, i32 0, i32 3
  %15 = load ptr, ptr %14, align 8, !tbaa !9
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %16, i32 0, i32 4
  %18 = load i32, ptr %17, align 8, !tbaa !15
  %19 = load ptr, ptr %15, align 8, !tbaa !16
  %20 = getelementptr inbounds ptr, ptr %19, i64 0
  %21 = load ptr, ptr %20, align 8
  call void %21(ptr noundef nonnull align 8 dereferenceable(8) %15, i32 noundef %18)
  br label %22

22:                                               ; preds = %12
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %23, i32 0, i32 3
  store ptr null, ptr %24, align 8, !tbaa !9
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %"struct.agge::parallel::thread", ptr %25, i32 0, i32 2
  call void @_ZN4agge12hybrid_event6signalEv(ptr noundef nonnull align 8 dereferenceable(16) %26)
  br label %5, !llvm.loop !18

27:                                               ; preds = %5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

declare void @_ZN4agge12hybrid_event6signalEv(ptr noundef nonnull align 8 dereferenceable(16)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 40}
!10 = !{!"_ZTSN4agge8parallel6threadE", !11, i64 8, !11, i64 24, !6, i64 40, !13, i64 48, !14, i64 56}
!11 = !{!"_ZTSN4agge12hybrid_eventE", !12, i64 0, !6, i64 8}
!12 = !{!"long", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSN4agge6threadE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!10, !13, i64 48}
!16 = !{!17, !17, i64 0}
!17 = !{!"vtable pointer", !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge8parallel6thread11thread_procEPv(ptr noundef %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16) %2)
  %3 = getelementptr inbounds i8, ptr %0, i64 40
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %.not7 = icmp eq ptr %4, null
  br i1 %.not7, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  br label %7

7:                                                ; preds = %.lr.ph, %7
  %8 = phi ptr [ %4, %.lr.ph ], [ %12, %7 ]
  %9 = load i32, ptr %5, align 8, !tbaa !14
  %10 = load ptr, ptr %8, align 8, !tbaa !15
  %11 = load ptr, ptr %10, align 8
  tail call void %11(ptr noundef nonnull align 8 dereferenceable(8) %8, i32 noundef %9)
  store ptr null, ptr %3, align 8, !tbaa !5
  tail call void @_ZN4agge12hybrid_event6signalEv(ptr noundef nonnull align 8 dereferenceable(16) %6)
  tail call void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16) %2)
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %.not = icmp eq ptr %12, null
  br i1 %.not, label %._crit_edge, label %7, !llvm.loop !17

._crit_edge:                                      ; preds = %7, %1
  ret void
}

declare void @_ZN4agge12hybrid_event6signalEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1

declare void @_ZN4agge12hybrid_event4waitEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 40}
!6 = !{!"_ZTSN4agge8parallel6threadE", !7, i64 8, !7, i64 24, !11, i64 40, !12, i64 48, !13, i64 56}
!7 = !{!"_ZTSN4agge12hybrid_eventE", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"_ZTSN4agge6threadE", !11, i64 0, !11, i64 8, !11, i64 16}
!14 = !{!6, !12, i64 48}
!15 = !{!16, !16, i64 0}
!16 = !{!"vtable pointer", !10, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass