; LLVM IR from kazunetakahashi/atcoder :: 2018/0127_soundhound2018/C2.ll (Z13add_edge_gridii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@src = external dso_local global i32, align 4
@dst = external dso_local global i32, align 4
@vertex = external dso_local global i32, align 4
@_ZL2dx = external hidden constant [4 x i32], align 16
@_ZL2dy = external hidden constant [4 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8add_edgeiix(i32 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5validii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3numii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z13add_edge_gridii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = call noundef zeroext i1 @_Z5validii(i32 noundef %9, i32 noundef %10)
  br i1 %11, label %13, label %12

12:                                               ; preds = %2
  br label %61

13:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = call noundef i32 @_Z3numii(i32 noundef %14, i32 noundef %15)
  store i32 %16, ptr %5, align 4, !tbaa !5
  %17 = load i32, ptr @vertex, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr @vertex, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = add nsw i32 %19, %20
  %22 = srem i32 %21, 2
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %57

24:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %51, %24
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 4
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %54

29:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = load i32, ptr %6, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [4 x i32], ptr @_ZL2dx, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %30, %34
  store i32 %35, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [4 x i32], ptr @_ZL2dy, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = add nsw i32 %36, %40
  store i32 %41, ptr %8, align 4, !tbaa !5
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = call noundef zeroext i1 @_Z5validii(i32 noundef %42, i32 noundef %43)
  br i1 %44, label %45, label %50

45:                                               ; preds = %29
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = call noundef i32 @_Z3numii(i32 noundef %47, i32 noundef %48)
  call void @_Z8add_edgeiix(i32 noundef %46, i32 noundef %49, i64 noundef 1)
  br label %50

50:                                               ; preds = %45, %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %6, align 4, !tbaa !5
  br label %25, !llvm.loop !9

54:                                               ; preds = %28
  %55 = load i32, ptr @src, align 4, !tbaa !5
  %56 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z8add_edgeiix(i32 noundef %55, i32 noundef %56, i64 noundef 1)
  br label %60

57:                                               ; preds = %13
  %58 = load i32, ptr %5, align 4, !tbaa !5
  %59 = load i32, ptr @dst, align 4, !tbaa !5
  call void @_Z8add_edgeiix(i32 noundef %58, i32 noundef %59, i64 noundef 1)
  br label %60

60:                                               ; preds = %57, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %61

61:                                               ; preds = %60, %12
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@src = external dso_local local_unnamed_addr global i32, align 4
@dst = external dso_local local_unnamed_addr global i32, align 4
@vertex = external dso_local local_unnamed_addr global i32, align 4
@_ZL2dx = external hidden local_unnamed_addr constant [4 x i32], align 16
@_ZL2dy = external hidden local_unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8add_edgeiix(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5validii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3numii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z13add_edge_gridii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %0, i32 noundef %1)
  br i1 %3, label %4, label %43

4:                                                ; preds = %2
  %5 = tail call noundef i32 @_Z3numii(i32 noundef %0, i32 noundef %1)
  %6 = load i32, ptr @vertex, align 4, !tbaa !5
  %7 = add nsw i32 %6, 1
  store i32 %7, ptr @vertex, align 4, !tbaa !5
  %8 = add nsw i32 %1, %0
  %9 = and i32 %8, 1
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %.preheader.preheader, label %41

.preheader.preheader:                             ; preds = %4
  %11 = load i32, ptr @_ZL2dx, align 16, !tbaa !5
  %12 = add nsw i32 %11, %0
  %13 = load i32, ptr @_ZL2dy, align 16, !tbaa !5
  %14 = add nsw i32 %13, %1
  %15 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %12, i32 noundef %14)
  br i1 %15, label %16, label %.preheader.1

16:                                               ; preds = %.preheader.preheader
  %17 = tail call noundef i32 @_Z3numii(i32 noundef %12, i32 noundef %14)
  tail call void @_Z8add_edgeiix(i32 noundef %5, i32 noundef %17, i64 noundef 1)
  br label %.preheader.1

.preheader.1:                                     ; preds = %16, %.preheader.preheader
  %18 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 4), align 4, !tbaa !5
  %19 = add nsw i32 %18, %0
  %20 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 4), align 4, !tbaa !5
  %21 = add nsw i32 %20, %1
  %22 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %19, i32 noundef %21)
  br i1 %22, label %23, label %.preheader.2

23:                                               ; preds = %.preheader.1
  %24 = tail call noundef i32 @_Z3numii(i32 noundef %19, i32 noundef %21)
  tail call void @_Z8add_edgeiix(i32 noundef %5, i32 noundef %24, i64 noundef 1)
  br label %.preheader.2

.preheader.2:                                     ; preds = %23, %.preheader.1
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 8), align 8, !tbaa !5
  %26 = add nsw i32 %25, %0
  %27 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 8), align 8, !tbaa !5
  %28 = add nsw i32 %27, %1
  %29 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %26, i32 noundef %28)
  br i1 %29, label %30, label %.preheader.3

30:                                               ; preds = %.preheader.2
  %31 = tail call noundef i32 @_Z3numii(i32 noundef %26, i32 noundef %28)
  tail call void @_Z8add_edgeiix(i32 noundef %5, i32 noundef %31, i64 noundef 1)
  br label %.preheader.3

.preheader.3:                                     ; preds = %30, %.preheader.2
  %32 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 12), align 4, !tbaa !5
  %33 = add nsw i32 %32, %0
  %34 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 12), align 4, !tbaa !5
  %35 = add nsw i32 %34, %1
  %36 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %33, i32 noundef %35)
  br i1 %36, label %37, label %39

37:                                               ; preds = %.preheader.3
  %38 = tail call noundef i32 @_Z3numii(i32 noundef %33, i32 noundef %35)
  tail call void @_Z8add_edgeiix(i32 noundef %5, i32 noundef %38, i64 noundef 1)
  br label %39

39:                                               ; preds = %37, %.preheader.3
  %40 = load i32, ptr @src, align 4, !tbaa !5
  tail call void @_Z8add_edgeiix(i32 noundef %40, i32 noundef %5, i64 noundef 1)
  br label %43

41:                                               ; preds = %4
  %42 = load i32, ptr @dst, align 4, !tbaa !5
  tail call void @_Z8add_edgeiix(i32 noundef %5, i32 noundef %42, i64 noundef 1)
  br label %43

43:                                               ; preds = %39, %41, %2
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass