; LLVM IR from control-flow-attestation/c-flat :: samples/soldering (Iron)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IronStruct = type { %struct.HistoryStruct, i32, i8, i8, i32, i8, i8, i8, i32, [2 x i32], i8, i32, i32, i16, i16, i8, i16, i8, i8, i8, i16, i32, i32, i8, i32, i32, i32 }
%struct.HistoryStruct = type { i8, [8 x i32] }

declare void @digitalWrite(i8 noundef zeroext, i8 noundef zeroext) #0

declare void @analogWrite(i8 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @fixPower(ptr noundef %0, i8 noundef zeroext %1) #1 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %6 = load i8, ptr %5, align 1, !tbaa !9
  %7 = zext i8 %6 to i32
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %15

9:                                                ; preds = %2
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.IronStruct, ptr %10, i32 0, i32 6
  store i8 0, ptr %11, align 1, !tbaa !10
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.IronStruct, ptr %12, i32 0, i32 2
  %14 = load i8, ptr %13, align 4, !tbaa !16
  call void @digitalWrite(i8 noundef zeroext %14, i8 noundef zeroext 0)
  store i1 true, ptr %3, align 1
  br label %62

15:                                               ; preds = %2
  %16 = load i8, ptr %5, align 1, !tbaa !9
  %17 = zext i8 %16 to i32
  %18 = icmp sgt i32 %17, 80
  br i1 %18, label %19, label %20

19:                                               ; preds = %15
  store i1 false, ptr %3, align 1
  br label %62

20:                                               ; preds = %15
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.IronStruct, ptr %21, i32 0, i32 6
  %23 = load i8, ptr %22, align 1, !tbaa !10, !range !17, !noundef !18
  %24 = trunc i8 %23 to i1
  br i1 %24, label %40, label %25

25:                                               ; preds = %20
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.IronStruct, ptr %26, i32 0, i32 6
  store i8 1, ptr %27, align 1, !tbaa !10
  %28 = load i8, ptr %5, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.IronStruct, ptr %30, i32 0, i32 4
  store i32 %29, ptr %31, align 4, !tbaa !19
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.IronStruct, ptr %32, i32 0, i32 2
  %34 = load i8, ptr %33, align 4, !tbaa !16
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.IronStruct, ptr %35, i32 0, i32 4
  %37 = load i32, ptr %36, align 4, !tbaa !19
  %38 = and i32 %37, 255
  %39 = trunc i32 %38 to i8
  call void @analogWrite(i8 noundef zeroext %34, i8 noundef zeroext %39)
  br label %61

40:                                               ; preds = %20
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.IronStruct, ptr %41, i32 0, i32 4
  %43 = load i32, ptr %42, align 4, !tbaa !19
  %44 = load i8, ptr %5, align 1, !tbaa !9
  %45 = zext i8 %44 to i32
  %46 = icmp ne i32 %43, %45
  br i1 %46, label %47, label %60

47:                                               ; preds = %40
  %48 = load i8, ptr %5, align 1, !tbaa !9
  %49 = zext i8 %48 to i32
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.IronStruct, ptr %50, i32 0, i32 4
  store i32 %49, ptr %51, align 4, !tbaa !19
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.IronStruct, ptr %52, i32 0, i32 2
  %54 = load i8, ptr %53, align 4, !tbaa !16
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.IronStruct, ptr %55, i32 0, i32 4
  %57 = load i32, ptr %56, align 4, !tbaa !19
  %58 = and i32 %57, 255
  %59 = trunc i32 %58 to i8
  call void @analogWrite(i8 noundef zeroext %54, i8 noundef zeroext %59)
  br label %60

60:                                               ; preds = %47, %40
  br label %61

61:                                               ; preds = %60, %25
  store i1 true, ptr %3, align 1
  br label %62

62:                                               ; preds = %61, %19, %9
  %63 = load i1, ptr %3, align 1
  ret i1 %63
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !14, i64 49}
!11 = !{!"IronStruct", !12, i64 0, !13, i64 36, !7, i64 40, !7, i64 41, !13, i64 44, !14, i64 48, !14, i64 49, !14, i64 50, !13, i64 52, !7, i64 56, !14, i64 64, !13, i64 68, !13, i64 72, !15, i64 76, !15, i64 78, !14, i64 80, !15, i64 82, !7, i64 84, !7, i64 85, !7, i64 86, !15, i64 88, !13, i64 92, !13, i64 96, !7, i64 100, !13, i64 104, !13, i64 108, !13, i64 112}
!12 = !{!"HistoryStruct", !7, i64 0, !7, i64 4}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{!"short", !7, i64 0}
!16 = !{!11, !7, i64 40}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = !{!11, !13, i64 44}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @digitalWrite(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @analogWrite(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @fixPower(ptr nocapture noundef %0, i8 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = zext i8 %1 to i32
  %4 = icmp eq i8 %1, 0
  br i1 %4, label %5, label %9

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 49
  store i8 0, ptr %6, align 1, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = load i8, ptr %7, align 4, !tbaa !13
  tail call void @digitalWrite(i8 noundef zeroext %8, i8 noundef zeroext 0) #2
  br label %25

9:                                                ; preds = %2
  %10 = icmp ugt i8 %1, 80
  br i1 %10, label %25, label %11

11:                                               ; preds = %9
  %12 = getelementptr inbounds i8, ptr %0, i64 49
  %13 = load i8, ptr %12, align 1, !tbaa !5, !range !14, !noundef !15
  %14 = trunc nuw i8 %13 to i1
  br i1 %14, label %19, label %15

15:                                               ; preds = %11
  store i8 1, ptr %12, align 1, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %0, i64 44
  store i32 %3, ptr %16, align 4, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 40
  %18 = load i8, ptr %17, align 4, !tbaa !13
  tail call void @analogWrite(i8 noundef zeroext %18, i8 noundef zeroext %1) #2
  br label %25

19:                                               ; preds = %11
  %20 = getelementptr inbounds i8, ptr %0, i64 44
  %21 = load i32, ptr %20, align 4, !tbaa !16
  %.not = icmp eq i32 %21, %3
  br i1 %.not, label %25, label %22

22:                                               ; preds = %19
  store i32 %3, ptr %20, align 4, !tbaa !16
  %23 = getelementptr inbounds i8, ptr %0, i64 40
  %24 = load i8, ptr %23, align 4, !tbaa !13
  tail call void @analogWrite(i8 noundef zeroext %24, i8 noundef zeroext %1) #2
  br label %25

25:                                               ; preds = %15, %22, %19, %9, %5
  %.0 = phi i1 [ true, %5 ], [ false, %9 ], [ true, %19 ], [ true, %22 ], [ true, %15 ]
  ret i1 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 49}
!6 = !{!"IronStruct", !7, i64 0, !10, i64 36, !8, i64 40, !8, i64 41, !10, i64 44, !11, i64 48, !11, i64 49, !11, i64 50, !10, i64 52, !8, i64 56, !11, i64 64, !10, i64 68, !10, i64 72, !12, i64 76, !12, i64 78, !11, i64 80, !12, i64 82, !8, i64 84, !8, i64 85, !8, i64 86, !12, i64 88, !10, i64 92, !10, i64 96, !8, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!7 = !{!"HistoryStruct", !8, i64 0, !8, i64 4}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_Bool", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !8, i64 40}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = !{!6, !10, i64 44}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass