; LLVM IR from ahampriyanshu/algo-ds-101 :: Algorithms/Sorting/Merge_Sort/Non_recursive_merge_sort.ll (Z18mergeSortIterativePiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5mergePiiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18mergeSortIterativePiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 2, ptr %10, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %56, %4
  %15 = load i32, ptr %10, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp sle i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %59

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %51, %19
  %21 = load i32, ptr %12, align 4, !tbaa !9
  %22 = load i32, ptr %6, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %55

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %26 = load i32, ptr %12, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = add nsw i32 %26, %27
  %29 = sub nsw i32 %28, 1
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = sub nsw i32 %30, 1
  %32 = icmp slt i32 %29, %31
  br i1 %32, label %33, label %38

33:                                               ; preds = %25
  %34 = load i32, ptr %12, align 4, !tbaa !9
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = add nsw i32 %34, %35
  %37 = sub nsw i32 %36, 1
  store i32 %37, ptr %13, align 4, !tbaa !9
  br label %41

38:                                               ; preds = %25
  %39 = load i32, ptr %6, align 4, !tbaa !9
  %40 = sub nsw i32 %39, 1
  store i32 %40, ptr %13, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %38, %33
  %42 = load i32, ptr %13, align 4, !tbaa !9
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = sub nsw i32 %42, %43
  %45 = sdiv i32 %44, 2
  store i32 %45, ptr %9, align 4, !tbaa !9
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = load i32, ptr %6, align 4, !tbaa !9
  %48 = load i32, ptr %12, align 4, !tbaa !9
  %49 = load i32, ptr %13, align 4, !tbaa !9
  %50 = load i32, ptr %9, align 4, !tbaa !9
  call void @_Z5mergePiiiii(ptr noundef %46, i32 noundef %47, i32 noundef %48, i32 noundef %49, i32 noundef %50)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %51

51:                                               ; preds = %41
  %52 = load i32, ptr %10, align 4, !tbaa !9
  %53 = load i32, ptr %12, align 4, !tbaa !9
  %54 = add nsw i32 %53, %52
  store i32 %54, ptr %12, align 4, !tbaa !9
  br label %20, !llvm.loop !11

55:                                               ; preds = %24
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = mul nsw i32 %57, 2
  store i32 %58, ptr %10, align 4, !tbaa !9
  br label %14, !llvm.loop !13

59:                                               ; preds = %18
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5mergePiiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18mergeSortIterativePiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %.not25 = icmp slt i32 %1, 2
  br i1 %.not25, label %._crit_edge27, label %.preheader.us

.preheader.us:                                    ; preds = %4, %._crit_edge.us
  %.02026.us = phi i32 [ %10, %._crit_edge.us ], [ 2, %4 ]
  br label %5

5:                                                ; preds = %.preheader.us, %5
  %.01924.us = phi i32 [ 0, %.preheader.us ], [ %6, %5 ]
  %6 = add nsw i32 %.01924.us, %.02026.us
  %..us = tail call i32 @llvm.smin.i32(i32 %6, i32 %1)
  %.0.us = add nsw i32 %..us, -1
  %7 = sub nsw i32 %.0.us, %2
  %8 = sdiv i32 %7, 2
  tail call void @_Z5mergePiiiii(ptr noundef %0, i32 noundef %1, i32 noundef %.01924.us, i32 noundef %.0.us, i32 noundef %8)
  %9 = icmp slt i32 %6, %1
  br i1 %9, label %5, label %._crit_edge.us, !llvm.loop !5

._crit_edge.us:                                   ; preds = %5
  %10 = shl nsw i32 %.02026.us, 1
  %.not.us = icmp sgt i32 %10, %1
  br i1 %.not.us, label %._crit_edge27, label %.preheader.us, !llvm.loop !7

._crit_edge27:                                    ; preds = %._crit_edge.us, %4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass