; LLVM IR from control-flow-attestation/c-flat :: samples/soldering (Iron)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IronStruct = type { %struct.HistoryStruct, i32, i8, i8, i32, i8, i8, i8, i32, [2 x i32], i8, i32, i32, i16, i16, i8, i16, i8, i8, i8, i16, i32, i32, i8, i32, i32, i32 }
%struct.HistoryStruct = type { i8, [8 x i32] }

declare void @digitalWrite(i8 noundef zeroext, i8 noundef zeroext) #0

declare i32 @analogRead(i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @resetPID(ptr noundef) #1

declare void @initHistory(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @switchPower(ptr noundef %0, i1 noundef zeroext %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  %5 = zext i1 %1 to i8
  store i8 %5, ptr %4, align 1, !tbaa !9
  %6 = load i8, ptr %4, align 1, !tbaa !9, !range !11, !noundef !12
  %7 = trunc i8 %6 to i1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.IronStruct, ptr %8, i32 0, i32 5
  %10 = zext i1 %7 to i8
  store i8 %10, ptr %9, align 4, !tbaa !13
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.IronStruct, ptr %11, i32 0, i32 5
  %13 = load i8, ptr %12, align 4, !tbaa !13, !range !11, !noundef !12
  %14 = trunc i8 %13 to i1
  br i1 %14, label %21, label %15

15:                                               ; preds = %2
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.IronStruct, ptr %16, i32 0, i32 2
  %18 = load i8, ptr %17, align 4, !tbaa !18
  call void @digitalWrite(i8 noundef zeroext %18, i8 noundef zeroext 0)
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.IronStruct, ptr %19, i32 0, i32 6
  store i8 0, ptr %20, align 1, !tbaa !19
  br label %36

21:                                               ; preds = %2
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  call void @resetPID(ptr noundef %22)
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.IronStruct, ptr %23, i32 0, i32 3
  %25 = load i8, ptr %24, align 1, !tbaa !20
  %26 = call i32 @analogRead(i8 noundef zeroext %25)
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.IronStruct, ptr %27, i32 0, i32 9
  %29 = getelementptr inbounds [2 x i32], ptr %28, i64 0, i64 1
  store i32 %26, ptr %29, align 4, !tbaa !21
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.IronStruct, ptr %30, i32 0, i32 0
  call void @initHistory(ptr noundef %31)
  %32 = call i64 @millis()
  %33 = trunc i64 %32 to i32
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.IronStruct, ptr %34, i32 0, i32 1
  store i32 %33, ptr %35, align 4, !tbaa !22
  br label %36

36:                                               ; preds = %21, %15
  ret void
}

declare i64 @millis() #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !10, i64 48}
!14 = !{!"IronStruct", !15, i64 0, !16, i64 36, !7, i64 40, !7, i64 41, !16, i64 44, !10, i64 48, !10, i64 49, !10, i64 50, !16, i64 52, !7, i64 56, !10, i64 64, !16, i64 68, !16, i64 72, !17, i64 76, !17, i64 78, !10, i64 80, !17, i64 82, !7, i64 84, !7, i64 85, !7, i64 86, !17, i64 88, !16, i64 92, !16, i64 96, !7, i64 100, !16, i64 104, !16, i64 108, !16, i64 112}
!15 = !{!"HistoryStruct", !7, i64 0, !7, i64 4}
!16 = !{!"int", !7, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{!14, !7, i64 40}
!19 = !{!14, !10, i64 49}
!20 = !{!14, !7, i64 41}
!21 = !{!16, !16, i64 0}
!22 = !{!14, !16, i64 36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @digitalWrite(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare i32 @analogRead(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @resetPID(ptr noundef) local_unnamed_addr #1

declare void @initHistory(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @switchPower(ptr noundef %0, i1 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = zext i1 %1 to i8
  %4 = getelementptr inbounds i8, ptr %0, i64 48
  store i8 %3, ptr %4, align 4, !tbaa !5
  br i1 %1, label %9, label %5

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 40
  %7 = load i8, ptr %6, align 4, !tbaa !13
  tail call void @digitalWrite(i8 noundef zeroext %7, i8 noundef zeroext 0) #2
  %8 = getelementptr inbounds i8, ptr %0, i64 49
  store i8 0, ptr %8, align 1, !tbaa !14
  br label %17

9:                                                ; preds = %2
  tail call void @resetPID(ptr noundef nonnull %0)
  %10 = getelementptr inbounds i8, ptr %0, i64 41
  %11 = load i8, ptr %10, align 1, !tbaa !15
  %12 = tail call i32 @analogRead(i8 noundef zeroext %11) #2
  %13 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 %12, ptr %13, align 4, !tbaa !16
  tail call void @initHistory(ptr noundef nonnull %0) #2
  %14 = tail call i64 @millis() #2
  %15 = trunc i64 %14 to i32
  %16 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 %15, ptr %16, align 4, !tbaa !17
  br label %17

17:                                               ; preds = %9, %5
  ret void
}

declare i64 @millis() local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"IronStruct", !7, i64 0, !10, i64 36, !8, i64 40, !8, i64 41, !10, i64 44, !11, i64 48, !11, i64 49, !11, i64 50, !10, i64 52, !8, i64 56, !11, i64 64, !10, i64 68, !10, i64 72, !12, i64 76, !12, i64 78, !11, i64 80, !12, i64 82, !8, i64 84, !8, i64 85, !8, i64 86, !12, i64 88, !10, i64 92, !10, i64 96, !8, i64 100, !10, i64 104, !10, i64 108, !10, i64 112}
!7 = !{!"HistoryStruct", !8, i64 0, !8, i64 4}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_Bool", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!6, !8, i64 40}
!14 = !{!6, !11, i64 49}
!15 = !{!6, !8, i64 41}
!16 = !{!10, !10, i64 0}
!17 = !{!6, !10, i64 36}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass