; LLVM IR from kazunetakahashi/atcoder :: 2018/0407_maximum-cup-2018/H.ll (Z5solvex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@d = external dso_local global [310 x [310 x i64]], align 16
@K = external dso_local global i32, align 4
@a = external dso_local global [310 x i32], align 16
@Q = external dso_local global i32, align 4
@b = external dso_local global [310 x i32], align 16
@V = external dso_local global [700 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8add_edgeiix(i32 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z8max_flowii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solvex(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %18, %1
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = icmp slt i32 %11, 700
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %21

14:                                               ; preds = %10
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [700 x %"class.std::vector"], ptr @V, i64 0, i64 %16
  call void @_ZNSt6vectorI4edgeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  br label %18

18:                                               ; preds = %14
  %19 = load i32, ptr %3, align 4, !tbaa !9
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %3, align 4, !tbaa !9
  br label %10, !llvm.loop !11

21:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %82, %21
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = load i32, ptr @K, align 4, !tbaa !9
  %25 = sub nsw i32 %24, 1
  %26 = icmp slt i32 %23, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %22
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %85

28:                                               ; preds = %22
  %29 = load i32, ptr %5, align 4, !tbaa !9
  call void @_Z8add_edgeiix(i32 noundef 690, i32 noundef %29, i64 noundef 1)
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [310 x i32], ptr @a, i64 0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [310 x [310 x i64]], ptr @d, i64 0, i64 %34
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = add nsw i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [310 x i32], ptr @a, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [310 x i64], ptr %35, i64 0, i64 %41
  %43 = load i64, ptr %42, align 8, !tbaa !5
  %44 = load i64, ptr %2, align 8, !tbaa !5
  %45 = icmp sgt i64 %43, %44
  br i1 %45, label %46, label %81

46:                                               ; preds = %28
  %47 = load i64, ptr %4, align 8, !tbaa !5
  %48 = add nsw i64 %47, 1
  store i64 %48, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %49

49:                                               ; preds = %77, %46
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = load i32, ptr @Q, align 4, !tbaa !9
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %49
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %80

54:                                               ; preds = %49
  %55 = load i32, ptr %5, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [310 x i32], ptr @a, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [310 x [310 x i64]], ptr @d, i64 0, i64 %60
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [310 x i32], ptr @b, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [310 x i64], ptr %61, i64 0, i64 %66
  %68 = load i64, ptr %67, align 8, !tbaa !5
  %69 = load i64, ptr %2, align 8, !tbaa !5
  %70 = icmp sle i64 %68, %69
  br i1 %70, label %71, label %76

71:                                               ; preds = %54
  %72 = load i32, ptr %5, align 4, !tbaa !9
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = load i32, ptr @K, align 4, !tbaa !9
  %75 = add nsw i32 %73, %74
  call void @_Z8add_edgeiix(i32 noundef %72, i32 noundef %75, i64 noundef 1)
  br label %76

76:                                               ; preds = %71, %54
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr %7, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %7, align 4, !tbaa !9
  br label %49, !llvm.loop !13

80:                                               ; preds = %53
  br label %81

81:                                               ; preds = %80, %28
  br label %82

82:                                               ; preds = %81
  %83 = load i32, ptr %5, align 4, !tbaa !9
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %5, align 4, !tbaa !9
  br label %22, !llvm.loop !14

85:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %86

86:                                               ; preds = %95, %85
  %87 = load i32, ptr %8, align 4, !tbaa !9
  %88 = load i32, ptr @Q, align 4, !tbaa !9
  %89 = icmp slt i32 %87, %88
  br i1 %89, label %91, label %90

90:                                               ; preds = %86
  store i32 11, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %98

91:                                               ; preds = %86
  %92 = load i32, ptr %8, align 4, !tbaa !9
  %93 = load i32, ptr @K, align 4, !tbaa !9
  %94 = add nsw i32 %92, %93
  call void @_Z8add_edgeiix(i32 noundef %94, i32 noundef 691, i64 noundef 1)
  br label %95

95:                                               ; preds = %91
  %96 = load i32, ptr %8, align 4, !tbaa !9
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %8, align 4, !tbaa !9
  br label %86, !llvm.loop !15

98:                                               ; preds = %90
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %99 = call noundef i64 @_Z8max_flowii(i32 noundef 690, i32 noundef 691)
  store i64 %99, ptr %9, align 8, !tbaa !5
  %100 = load i64, ptr %9, align 8, !tbaa !5
  %101 = load i64, ptr %4, align 8, !tbaa !5
  %102 = icmp eq i64 %100, %101
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  ret i1 %102
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI4edgeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@d = external dso_local local_unnamed_addr global [310 x [310 x i64]], align 16
@K = external dso_local local_unnamed_addr global i32, align 4
@a = external dso_local local_unnamed_addr global [310 x i32], align 16
@Q = external dso_local local_unnamed_addr global i32, align 4
@b = external dso_local local_unnamed_addr global [310 x i32], align 16
@V = external dso_local global [700 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8add_edgeiix(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z8max_flowii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solvex(i64 noundef %0) local_unnamed_addr #0 {
  br label %4

.preheader27:                                     ; preds = %4
  %2 = load i32, ptr @K, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 1
  br i1 %3, label %.lr.ph32, label %.preheader

4:                                                ; preds = %1, %4
  %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %4 ]
  %5 = getelementptr inbounds [700 x %"class.std::vector"], ptr @V, i64 0, i64 %indvars.iv
  tail call void @_ZNSt6vectorI4edgeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 700
  br i1 %exitcond.not, label %.preheader27, label %4, !llvm.loop !9

.preheader:                                       ; preds = %.loopexit, %.preheader27
  %.025.lcssa = phi i64 [ 0, %.preheader27 ], [ %.1, %.loopexit ]
  %6 = load i32, ptr @Q, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph34, label %._crit_edge

.lr.ph32:                                         ; preds = %.preheader27, %.loopexit
  %indvars.iv39 = phi i64 [ %indvars.iv.next40, %.loopexit ], [ 0, %.preheader27 ]
  %.02530 = phi i64 [ %.1, %.loopexit ], [ 0, %.preheader27 ]
  %8 = trunc nuw nsw i64 %indvars.iv39 to i32
  tail call void @_Z8add_edgeiix(i32 noundef 690, i32 noundef %8, i64 noundef 1)
  %9 = getelementptr inbounds [310 x i32], ptr @a, i64 0, i64 %indvars.iv39
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %indvars.iv.next40 = add nuw nsw i64 %indvars.iv39, 1
  %12 = getelementptr inbounds [310 x i32], ptr @a, i64 0, i64 %indvars.iv.next40
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds [310 x [310 x i64]], ptr @d, i64 0, i64 %11, i64 %14
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %17 = icmp sgt i64 %16, %0
  br i1 %17, label %18, label %.loopexit

18:                                               ; preds = %.lr.ph32
  %19 = add nsw i64 %.02530, 1
  %20 = load i32, ptr @Q, align 4, !tbaa !5
  %21 = icmp sgt i32 %20, 0
  br i1 %21, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %18, %34
  %22 = phi i32 [ %35, %34 ], [ %20, %18 ]
  %indvars.iv36 = phi i64 [ %indvars.iv.next37, %34 ], [ 0, %18 ]
  %23 = load i32, ptr %12, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [310 x i32], ptr @b, i64 0, i64 %indvars.iv36
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [310 x [310 x i64]], ptr @d, i64 0, i64 %24, i64 %27
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %.not = icmp sgt i64 %29, %0
  br i1 %.not, label %34, label %30

30:                                               ; preds = %.lr.ph
  %31 = load i32, ptr @K, align 4, !tbaa !5
  %32 = trunc nuw nsw i64 %indvars.iv36 to i32
  %33 = add nsw i32 %31, %32
  tail call void @_Z8add_edgeiix(i32 noundef %8, i32 noundef %33, i64 noundef 1)
  %.pre = load i32, ptr @Q, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %.lr.ph, %30
  %35 = phi i32 [ %22, %.lr.ph ], [ %.pre, %30 ]
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %36 = sext i32 %35 to i64
  %37 = icmp slt i64 %indvars.iv.next37, %36
  br i1 %37, label %.lr.ph, label %.loopexit, !llvm.loop !13

.loopexit:                                        ; preds = %34, %18, %.lr.ph32
  %.1 = phi i64 [ %.02530, %.lr.ph32 ], [ %19, %18 ], [ %19, %34 ]
  %38 = load i32, ptr @K, align 4, !tbaa !5
  %39 = add nsw i32 %38, -1
  %40 = sext i32 %39 to i64
  %41 = icmp slt i64 %indvars.iv.next40, %40
  br i1 %41, label %.lr.ph32, label %.preheader, !llvm.loop !14

._crit_edge:                                      ; preds = %.lr.ph34, %.preheader
  %42 = tail call noundef i64 @_Z8max_flowii(i32 noundef 690, i32 noundef 691)
  %43 = icmp eq i64 %42, %.025.lcssa
  ret i1 %43

.lr.ph34:                                         ; preds = %.preheader, %.lr.ph34
  %.02233 = phi i32 [ %46, %.lr.ph34 ], [ 0, %.preheader ]
  %44 = load i32, ptr @K, align 4, !tbaa !5
  %45 = add nsw i32 %44, %.02233
  tail call void @_Z8add_edgeiix(i32 noundef %45, i32 noundef 691, i64 noundef 1)
  %46 = add nuw nsw i32 %.02233, 1
  %47 = load i32, ptr @Q, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %.lr.ph34, label %._crit_edge, !llvm.loop !15
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI4edgeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass