; LLVM IR from control-flow-attestation/c-flat :: samples/soldering (arduino)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LecControlStruct = type { [4 x i8] }
%struct.EncoderStruct = type { i32, i32, i32, i32, i32, i32, i8, i8, i32, i8, i8, i16, i16 }
%struct.IronStruct = type { %struct.HistoryStruct, i32, i8, i8, i32, i8, i8, i8, i32, [2 x i32], i8, i32, i32, i16, i16, i8, i16, i8, i8, i8, i16, i32, i32, i8, i32, i32, i32 }
%struct.HistoryStruct = type { i8, [8 x i32] }

@R_MAIN_PIN_value = external dso_local global i8, align 1
@R_SECD_PIN_value = external dso_local global i8, align 1
@PROBEPIN_value = external dso_local global i32, align 4
@PROBEPIN_old = external dso_local global i32, align 4
@oldRotVal = external dso_local global i16, align 2
@stateDisplay = external dso_local global [4 x i8], align 1
@stateButtonMode = external dso_local global i8, align 1
@R_MAIN_PIN_old = external dso_local global i8, align 1
@R_SECD_PIN_old = external dso_local global i8, align 1
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @emulate_State(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  store i8 0, ptr %9, align 1, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !12
  br label %13

13:                                               ; preds = %38, %4
  %14 = load i32, ptr %10, align 4, !tbaa !12
  %15 = icmp slt i32 %14, 4
  br i1 %15, label %17, label %16

16:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %41

17:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.LecControlStruct, ptr %18, i32 0, i32 0
  %20 = load i32, ptr %10, align 4, !tbaa !12
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [4 x i8], ptr %19, i64 0, i64 %21
  %23 = load i8, ptr %22, align 1, !tbaa !9
  store i8 %23, ptr %11, align 1, !tbaa !9
  %24 = load i32, ptr %10, align 4, !tbaa !12
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [4 x i8], ptr @stateDisplay, i64 0, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !9
  %28 = sext i8 %27 to i32
  %29 = load i8, ptr %11, align 1, !tbaa !9
  %30 = sext i8 %29 to i32
  %31 = icmp ne i32 %28, %30
  br i1 %31, label %32, label %37

32:                                               ; preds = %17
  %33 = load i8, ptr %11, align 1, !tbaa !9
  %34 = load i32, ptr %10, align 4, !tbaa !12
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [4 x i8], ptr @stateDisplay, i64 0, i64 %35
  store i8 %33, ptr %36, align 1, !tbaa !9
  store i8 1, ptr %9, align 1, !tbaa !10
  br label %37

37:                                               ; preds = %32, %17
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %10, align 4, !tbaa !12
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %10, align 4, !tbaa !12
  br label %13, !llvm.loop !14

41:                                               ; preds = %16
  %42 = load i8, ptr @stateButtonMode, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  %44 = load i8, ptr %6, align 1, !tbaa !9
  %45 = zext i8 %44 to i32
  %46 = icmp ne i32 %43, %45
  br i1 %46, label %47, label %49

47:                                               ; preds = %41
  %48 = load i8, ptr %6, align 1, !tbaa !9
  store i8 %48, ptr @stateButtonMode, align 1, !tbaa !9
  store i8 1, ptr %9, align 1, !tbaa !10
  br label %49

49:                                               ; preds = %47, %41
  %50 = load i8, ptr @R_MAIN_PIN_value, align 1, !tbaa !9
  %51 = zext i8 %50 to i32
  %52 = load i8, ptr @R_MAIN_PIN_old, align 1, !tbaa !9
  %53 = zext i8 %52 to i32
  %54 = icmp ne i32 %51, %53
  br i1 %54, label %55, label %57

55:                                               ; preds = %49
  store i8 1, ptr %9, align 1, !tbaa !10
  %56 = load i8, ptr @R_MAIN_PIN_value, align 1, !tbaa !9
  store i8 %56, ptr @R_MAIN_PIN_old, align 1, !tbaa !9
  br label %57

57:                                               ; preds = %55, %49
  %58 = load i8, ptr @R_SECD_PIN_value, align 1, !tbaa !9
  %59 = zext i8 %58 to i32
  %60 = load i8, ptr @R_SECD_PIN_old, align 1, !tbaa !9
  %61 = zext i8 %60 to i32
  %62 = icmp ne i32 %59, %61
  br i1 %62, label %63, label %65

63:                                               ; preds = %57
  store i8 1, ptr %9, align 1, !tbaa !10
  %64 = load i8, ptr @R_SECD_PIN_value, align 1, !tbaa !9
  store i8 %64, ptr @R_SECD_PIN_old, align 1, !tbaa !9
  br label %65

65:                                               ; preds = %63, %57
  %66 = load i16, ptr @oldRotVal, align 2, !tbaa !16
  %67 = sext i16 %66 to i32
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = call signext i16 @read(ptr noundef %68)
  %70 = sext i16 %69 to i32
  %71 = icmp ne i32 %67, %70
  br i1 %71, label %72, label %75

72:                                               ; preds = %65
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  %74 = call signext i16 @read(ptr noundef %73)
  store i16 %74, ptr @oldRotVal, align 2, !tbaa !16
  store i8 1, ptr %9, align 1, !tbaa !10
  br label %75

75:                                               ; preds = %72, %65
  %76 = load i32, ptr @PROBEPIN_old, align 4, !tbaa !12
  %77 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !12
  %78 = icmp ne i32 %76, %77
  br i1 %78, label %79, label %81

79:                                               ; preds = %75
  %80 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !12
  store i32 %80, ptr @PROBEPIN_old, align 4, !tbaa !12
  store i8 1, ptr %9, align 1, !tbaa !10
  br label %81

81:                                               ; preds = %79, %75
  %82 = load i8, ptr %9, align 1, !tbaa !10, !range !18, !noundef !19
  %83 = trunc i8 %82 to i1
  br i1 %83, label %84, label %103

84:                                               ; preds = %81
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  call void @emulate_showLed(ptr noundef %85)
  call void @serialWriteString(ptr noundef @.str)
  call void @serialWriteString(ptr noundef @.str.1)
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #3
  %86 = load i8, ptr %6, align 1, !tbaa !9
  %87 = zext i8 %86 to i32
  %88 = add nsw i32 48, %87
  %89 = trunc i32 %88 to i8
  store i8 %89, ptr %12, align 1, !tbaa !9
  call void @serialWrite(ptr noundef %12, i32 noundef 1)
  call void @serialWriteString(ptr noundef @.str.2)
  %90 = load ptr, ptr %7, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.EncoderStruct, ptr %90, i32 0, i32 5
  %92 = load volatile i32, ptr %91, align 4, !tbaa !20
  call void @serialWriteInt(i32 noundef %92)
  call void @serialWriteString(ptr noundef @.str.3)
  %93 = load ptr, ptr %7, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.EncoderStruct, ptr %93, i32 0, i32 0
  %95 = load i32, ptr %94, align 4, !tbaa !22
  call void @serialWriteInt(i32 noundef %95)
  call void @serialWriteString(ptr noundef @.str.4)
  %96 = load ptr, ptr %7, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.EncoderStruct, ptr %96, i32 0, i32 1
  %98 = load i32, ptr %97, align 4, !tbaa !23
  call void @serialWriteInt(i32 noundef %98)
  call void @serialWriteString(ptr noundef @.str.5)
  call void @serialWriteString(ptr noundef @.str.6)
  %99 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !12
  call void @serialWriteInt(i32 noundef %99)
  call void @serialWriteString(ptr noundef @.str.7)
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.IronStruct, ptr %100, i32 0, i32 8
  %102 = load i32, ptr %101, align 4, !tbaa !24
  call void @serialWriteInt(i32 noundef %102)
  call void @serialWriteString(ptr noundef @.str.8)
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #3
  br label %103

103:                                              ; preds = %84, %81
  %104 = load i8, ptr %9, align 1, !tbaa !10, !range !18, !noundef !19
  %105 = trunc i8 %104 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  ret i1 %105
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare signext i16 @read(ptr noundef) #2

declare void @emulate_showLed(ptr noundef) #2

declare void @serialWriteString(ptr noundef) #2

declare void @serialWrite(ptr noundef, i32 noundef) #2

declare void @serialWriteInt(i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"_Bool", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!21, !13, i64 20}
!21 = !{!"EncoderStruct", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !7, i64 24, !7, i64 25, !13, i64 28, !7, i64 32, !7, i64 33, !17, i64 34, !17, i64 36}
!22 = !{!21, !13, i64 0}
!23 = !{!21, !13, i64 4}
!24 = !{!25, !13, i64 52}
!25 = !{!"IronStruct", !26, i64 0, !13, i64 36, !7, i64 40, !7, i64 41, !13, i64 44, !11, i64 48, !11, i64 49, !11, i64 50, !13, i64 52, !7, i64 56, !11, i64 64, !13, i64 68, !13, i64 72, !17, i64 76, !17, i64 78, !11, i64 80, !17, i64 82, !7, i64 84, !7, i64 85, !7, i64 86, !17, i64 88, !13, i64 92, !13, i64 96, !7, i64 100, !13, i64 104, !13, i64 108, !13, i64 112}
!26 = !{!"HistoryStruct", !7, i64 0, !7, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@R_MAIN_PIN_value = external dso_local local_unnamed_addr global i8, align 1
@R_SECD_PIN_value = external dso_local local_unnamed_addr global i8, align 1
@PROBEPIN_value = external dso_local local_unnamed_addr global i32, align 4
@PROBEPIN_old = external dso_local local_unnamed_addr global i32, align 4
@oldRotVal = external dso_local local_unnamed_addr global i16, align 2
@stateDisplay = external dso_local local_unnamed_addr global [4 x i8], align 1
@stateButtonMode = external dso_local local_unnamed_addr global i8, align 1
@R_MAIN_PIN_old = external dso_local local_unnamed_addr global i8, align 1
@R_SECD_PIN_old = external dso_local local_unnamed_addr global i8, align 1
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @emulate_State(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 {
  %5 = alloca i8, align 1
  %6 = load i8, ptr %0, align 1, !tbaa !5
  %7 = load i8, ptr @stateDisplay, align 1, !tbaa !5
  %.not25 = icmp ne i8 %7, %6
  br i1 %.not25, label %8, label %9

8:                                                ; preds = %4
  store i8 %6, ptr @stateDisplay, align 1, !tbaa !5
  br label %9

9:                                                ; preds = %8, %4
  %10 = getelementptr inbounds i8, ptr %0, i64 1
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %12 = load i8, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 1), align 1, !tbaa !5
  %.not25.1 = icmp eq i8 %12, %11
  br i1 %.not25.1, label %14, label %13

13:                                               ; preds = %9
  store i8 %11, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 1), align 1, !tbaa !5
  br label %14

14:                                               ; preds = %13, %9
  %.1.1 = phi i1 [ true, %13 ], [ %.not25, %9 ]
  %15 = getelementptr inbounds i8, ptr %0, i64 2
  %16 = load i8, ptr %15, align 1, !tbaa !5
  %17 = load i8, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 2), align 1, !tbaa !5
  %.not25.2 = icmp eq i8 %17, %16
  br i1 %.not25.2, label %19, label %18

18:                                               ; preds = %14
  store i8 %16, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 2), align 1, !tbaa !5
  br label %19

19:                                               ; preds = %18, %14
  %.1.2 = phi i1 [ true, %18 ], [ %.1.1, %14 ]
  %20 = getelementptr inbounds i8, ptr %0, i64 3
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = load i8, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 3), align 1, !tbaa !5
  %.not25.3 = icmp eq i8 %22, %21
  br i1 %.not25.3, label %24, label %23

23:                                               ; preds = %19
  store i8 %21, ptr getelementptr inbounds (i8, ptr @stateDisplay, i64 3), align 1, !tbaa !5
  br label %24

24:                                               ; preds = %23, %19
  %.1.3 = phi i1 [ true, %23 ], [ %.1.2, %19 ]
  %25 = load i8, ptr @stateButtonMode, align 1, !tbaa !5
  %.not = icmp eq i8 %25, %1
  br i1 %.not, label %27, label %26

26:                                               ; preds = %24
  store i8 %1, ptr @stateButtonMode, align 1, !tbaa !5
  br label %27

27:                                               ; preds = %26, %24
  %.2 = phi i1 [ true, %26 ], [ %.1.3, %24 ]
  %28 = load i8, ptr @R_MAIN_PIN_value, align 1, !tbaa !5
  %29 = load i8, ptr @R_MAIN_PIN_old, align 1, !tbaa !5
  %.not21 = icmp eq i8 %28, %29
  br i1 %.not21, label %31, label %30

30:                                               ; preds = %27
  store i8 %28, ptr @R_MAIN_PIN_old, align 1, !tbaa !5
  br label %31

31:                                               ; preds = %30, %27
  %.3 = phi i1 [ true, %30 ], [ %.2, %27 ]
  %32 = load i8, ptr @R_SECD_PIN_value, align 1, !tbaa !5
  %33 = load i8, ptr @R_SECD_PIN_old, align 1, !tbaa !5
  %.not22 = icmp eq i8 %32, %33
  br i1 %.not22, label %35, label %34

34:                                               ; preds = %31
  store i8 %32, ptr @R_SECD_PIN_old, align 1, !tbaa !5
  br label %35

35:                                               ; preds = %34, %31
  %.4 = phi i1 [ true, %34 ], [ %.3, %31 ]
  %36 = load i16, ptr @oldRotVal, align 2, !tbaa !8
  %37 = tail call signext i16 @read(ptr noundef %2) #3
  %.not23 = icmp eq i16 %36, %37
  br i1 %.not23, label %38, label %.thread29

38:                                               ; preds = %35
  %39 = load i32, ptr @PROBEPIN_old, align 4, !tbaa !10
  %40 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !10
  %.not24 = icmp eq i32 %39, %40
  br i1 %.not24, label %45, label %.thread

.thread29:                                        ; preds = %35
  %41 = tail call signext i16 @read(ptr noundef %2) #3
  store i16 %41, ptr @oldRotVal, align 2, !tbaa !8
  %42 = load i32, ptr @PROBEPIN_old, align 4, !tbaa !10
  %43 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !10
  %.not2431 = icmp eq i32 %42, %43
  br i1 %.not2431, label %.thread33, label %.thread

.thread:                                          ; preds = %.thread29, %38
  %44 = phi i32 [ %43, %.thread29 ], [ %40, %38 ]
  store i32 %44, ptr @PROBEPIN_old, align 4, !tbaa !10
  br label %.thread33

45:                                               ; preds = %38
  br i1 %.4, label %.thread33, label %55

.thread33:                                        ; preds = %.thread29, %.thread, %45
  tail call void @emulate_showLed(ptr noundef nonnull %0) #3
  tail call void @serialWriteString(ptr noundef nonnull @.str) #3
  tail call void @serialWriteString(ptr noundef nonnull @.str.1) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
  %46 = add i8 %1, 48
  store i8 %46, ptr %5, align 1, !tbaa !5
  call void @serialWrite(ptr noundef nonnull %5, i32 noundef 1) #3
  call void @serialWriteString(ptr noundef nonnull @.str.2) #3
  %47 = getelementptr inbounds i8, ptr %2, i64 20
  %48 = load volatile i32, ptr %47, align 4, !tbaa !12
  call void @serialWriteInt(i32 noundef %48) #3
  call void @serialWriteString(ptr noundef nonnull @.str.3) #3
  %49 = load i32, ptr %2, align 4, !tbaa !14
  call void @serialWriteInt(i32 noundef %49) #3
  call void @serialWriteString(ptr noundef nonnull @.str.4) #3
  %50 = getelementptr inbounds i8, ptr %2, i64 4
  %51 = load i32, ptr %50, align 4, !tbaa !15
  call void @serialWriteInt(i32 noundef %51) #3
  call void @serialWriteString(ptr noundef nonnull @.str.5) #3
  call void @serialWriteString(ptr noundef nonnull @.str.6) #3
  %52 = load i32, ptr @PROBEPIN_value, align 4, !tbaa !10
  call void @serialWriteInt(i32 noundef %52) #3
  call void @serialWriteString(ptr noundef nonnull @.str.7) #3
  %53 = getelementptr inbounds i8, ptr %3, i64 52
  %54 = load i32, ptr %53, align 4, !tbaa !16
  call void @serialWriteInt(i32 noundef %54) #3
  call void @serialWriteString(ptr noundef nonnull @.str.8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
  br label %55

55:                                               ; preds = %.thread33, %45
  %56 = phi i1 [ true, %.thread33 ], [ false, %45 ]
  ret i1 %56
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare signext i16 @read(ptr noundef) local_unnamed_addr #2

declare void @emulate_showLed(ptr noundef) local_unnamed_addr #2

declare void @serialWriteString(ptr noundef) local_unnamed_addr #2

declare void @serialWrite(ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @serialWriteInt(i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = !{!13, !11, i64 20}
!13 = !{!"EncoderStruct", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !6, i64 24, !6, i64 25, !11, i64 28, !6, i64 32, !6, i64 33, !9, i64 34, !9, i64 36}
!14 = !{!13, !11, i64 0}
!15 = !{!13, !11, i64 4}
!16 = !{!17, !11, i64 52}
!17 = !{!"IronStruct", !18, i64 0, !11, i64 36, !6, i64 40, !6, i64 41, !11, i64 44, !19, i64 48, !19, i64 49, !19, i64 50, !11, i64 52, !6, i64 56, !19, i64 64, !11, i64 68, !11, i64 72, !9, i64 76, !9, i64 78, !19, i64 80, !9, i64 82, !6, i64 84, !6, i64 85, !6, i64 86, !9, i64 88, !11, i64 92, !11, i64 96, !6, i64 100, !11, i64 104, !11, i64 108, !11, i64 112}
!18 = !{!"HistoryStruct", !6, i64 0, !6, i64 4}
!19 = !{!"_Bool", !6, i64 0}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass