; LLVM IR from ahampriyanshu/algo-ds-101 :: Data-Structures/Stack/Infix_to_prefix_postfix.ll (Z6in_posPcS_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.stack = type { ptr }

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3seqc(i8 noundef signext) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6in_posPcS_(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %class.stack, align 8
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @_ZN5stackC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5)
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 -1, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %193, %2
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = load i32, ptr %11, align 4, !tbaa !9
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds i8, ptr %14, i64 %16
  %18 = load i8, ptr %17, align 1, !tbaa !11
  %19 = sext i8 %18 to i32
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %194

21:                                               ; preds = %13
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = load i32, ptr %11, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %22, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !11
  %27 = sext i8 %26 to i32
  %28 = icmp eq i32 %27, 40
  br i1 %28, label %29, label %39

29:                                               ; preds = %21
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds i8, ptr %30, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !11
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %5, i8 noundef signext %34)
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %10, align 4, !tbaa !9
  %37 = load i32, ptr %11, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %11, align 4, !tbaa !9
  br label %193

39:                                               ; preds = %21
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = load i32, ptr %11, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i8, ptr %40, i64 %42
  %44 = load i8, ptr %43, align 1, !tbaa !11
  %45 = sext i8 %44 to i32
  %46 = call i32 @isalnum(i32 noundef %45) #5
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %62

48:                                               ; preds = %39
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %11, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i8, ptr %49, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !11
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = load i32, ptr %12, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds i8, ptr %54, i64 %56
  store i8 %53, ptr %57, align 1, !tbaa !11
  %58 = load i32, ptr %11, align 4, !tbaa !9
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %11, align 4, !tbaa !9
  %60 = load i32, ptr %12, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %12, align 4, !tbaa !9
  br label %192

62:                                               ; preds = %39
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = load i32, ptr %11, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds i8, ptr %63, i64 %65
  %67 = load i8, ptr %66, align 1, !tbaa !11
  %68 = sext i8 %67 to i32
  %69 = icmp eq i32 %68, 45
  br i1 %69, label %94, label %70

70:                                               ; preds = %62
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds i8, ptr %71, i64 %73
  %75 = load i8, ptr %74, align 1, !tbaa !11
  %76 = sext i8 %75 to i32
  %77 = icmp eq i32 %76, 43
  br i1 %77, label %94, label %78

78:                                               ; preds = %70
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = load i32, ptr %11, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds i8, ptr %79, i64 %81
  %83 = load i8, ptr %82, align 1, !tbaa !11
  %84 = sext i8 %83 to i32
  %85 = icmp eq i32 %84, 47
  br i1 %85, label %94, label %86

86:                                               ; preds = %78
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = load i32, ptr %11, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds i8, ptr %87, i64 %89
  %91 = load i8, ptr %90, align 1, !tbaa !11
  %92 = sext i8 %91 to i32
  %93 = icmp eq i32 %92, 42
  br i1 %93, label %94, label %160

94:                                               ; preds = %86, %78, %70, %62
  %95 = load i32, ptr %10, align 4, !tbaa !9
  %96 = icmp eq i32 %95, -1
  br i1 %96, label %97, label %105

97:                                               ; preds = %94
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = load i32, ptr %11, align 4, !tbaa !9
  %100 = sext i32 %99 to i64
  %101 = getelementptr inbounds i8, ptr %98, i64 %100
  %102 = load i8, ptr %101, align 1, !tbaa !11
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %5, i8 noundef signext %102)
  %103 = load i32, ptr %10, align 4, !tbaa !9
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %10, align 4, !tbaa !9
  br label %157

105:                                              ; preds = %94
  %106 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i8 %106, ptr %6, align 1, !tbaa !11
  %107 = load i32, ptr %10, align 4, !tbaa !9
  %108 = add nsw i32 %107, -1
  store i32 %108, ptr %10, align 4, !tbaa !9
  %109 = load i8, ptr %6, align 1, !tbaa !11
  %110 = sext i8 %109 to i32
  %111 = icmp eq i32 %110, 45
  br i1 %111, label %124, label %112

112:                                              ; preds = %105
  %113 = load i8, ptr %6, align 1, !tbaa !11
  %114 = sext i8 %113 to i32
  %115 = icmp eq i32 %114, 43
  br i1 %115, label %124, label %116

116:                                              ; preds = %112
  %117 = load i8, ptr %6, align 1, !tbaa !11
  %118 = sext i8 %117 to i32
  %119 = icmp eq i32 %118, 47
  br i1 %119, label %124, label %120

120:                                              ; preds = %116
  %121 = load i8, ptr %6, align 1, !tbaa !11
  %122 = sext i8 %121 to i32
  %123 = icmp eq i32 %122, 42
  br i1 %123, label %124, label %156

124:                                              ; preds = %120, %116, %112, %105
  %125 = load ptr, ptr %3, align 8, !tbaa !5
  %126 = load i32, ptr %11, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = getelementptr inbounds i8, ptr %125, i64 %127
  %129 = load i8, ptr %128, align 1, !tbaa !11
  store i8 %129, ptr %7, align 1, !tbaa !11
  %130 = load i8, ptr %6, align 1, !tbaa !11
  %131 = call noundef i32 @_Z3seqc(i8 noundef signext %130)
  store i32 %131, ptr %8, align 4, !tbaa !9
  %132 = load i8, ptr %7, align 1, !tbaa !11
  %133 = call noundef i32 @_Z3seqc(i8 noundef signext %132)
  store i32 %133, ptr %9, align 4, !tbaa !9
  %134 = load i32, ptr %8, align 4, !tbaa !9
  %135 = load i32, ptr %9, align 4, !tbaa !9
  %136 = icmp sgt i32 %134, %135
  br i1 %136, label %137, label %148

137:                                              ; preds = %124
  %138 = load i8, ptr %6, align 1, !tbaa !11
  %139 = load ptr, ptr %4, align 8, !tbaa !5
  %140 = load i32, ptr %12, align 4, !tbaa !9
  %141 = sext i32 %140 to i64
  %142 = getelementptr inbounds i8, ptr %139, i64 %141
  store i8 %138, ptr %142, align 1, !tbaa !11
  %143 = load i32, ptr %12, align 4, !tbaa !9
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %12, align 4, !tbaa !9
  %145 = load i8, ptr %7, align 1, !tbaa !11
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %5, i8 noundef signext %145)
  %146 = load i32, ptr %10, align 4, !tbaa !9
  %147 = add nsw i32 %146, 1
  store i32 %147, ptr %10, align 4, !tbaa !9
  br label %155

148:                                              ; preds = %124
  %149 = load i8, ptr %6, align 1, !tbaa !11
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %5, i8 noundef signext %149)
  %150 = load i32, ptr %10, align 4, !tbaa !9
  %151 = add nsw i32 %150, 1
  store i32 %151, ptr %10, align 4, !tbaa !9
  %152 = load i8, ptr %7, align 1, !tbaa !11
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %5, i8 noundef signext %152)
  %153 = load i32, ptr %10, align 4, !tbaa !9
  %154 = add nsw i32 %153, 1
  store i32 %154, ptr %10, align 4, !tbaa !9
  br label %155

155:                                              ; preds = %148, %137
  br label %156

156:                                              ; preds = %155, %120
  br label %157

157:                                              ; preds = %156, %97
  %158 = load i32, ptr %11, align 4, !tbaa !9
  %159 = add nsw i32 %158, 1
  store i32 %159, ptr %11, align 4, !tbaa !9
  br label %191

160:                                              ; preds = %86
  %161 = load ptr, ptr %3, align 8, !tbaa !5
  %162 = load i32, ptr %11, align 4, !tbaa !9
  %163 = sext i32 %162 to i64
  %164 = getelementptr inbounds i8, ptr %161, i64 %163
  %165 = load i8, ptr %164, align 1, !tbaa !11
  %166 = sext i8 %165 to i32
  %167 = icmp eq i32 %166, 41
  br i1 %167, label %168, label %190

168:                                              ; preds = %160
  %169 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i8 %169, ptr %6, align 1, !tbaa !11
  %170 = load i32, ptr %10, align 4, !tbaa !9
  %171 = add nsw i32 %170, -1
  store i32 %171, ptr %10, align 4, !tbaa !9
  br label %172

172:                                              ; preds = %176, %168
  %173 = load i8, ptr %6, align 1, !tbaa !11
  %174 = sext i8 %173 to i32
  %175 = icmp ne i32 %174, 40
  br i1 %175, label %176, label %187

176:                                              ; preds = %172
  %177 = load i8, ptr %6, align 1, !tbaa !11
  %178 = load ptr, ptr %4, align 8, !tbaa !5
  %179 = load i32, ptr %12, align 4, !tbaa !9
  %180 = sext i32 %179 to i64
  %181 = getelementptr inbounds i8, ptr %178, i64 %180
  store i8 %177, ptr %181, align 1, !tbaa !11
  %182 = load i32, ptr %12, align 4, !tbaa !9
  %183 = add nsw i32 %182, 1
  store i32 %183, ptr %12, align 4, !tbaa !9
  %184 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i8 %184, ptr %6, align 1, !tbaa !11
  %185 = load i32, ptr %10, align 4, !tbaa !9
  %186 = add nsw i32 %185, -1
  store i32 %186, ptr %10, align 4, !tbaa !9
  br label %172, !llvm.loop !12

187:                                              ; preds = %172
  %188 = load i32, ptr %11, align 4, !tbaa !9
  %189 = add nsw i32 %188, 1
  store i32 %189, ptr %11, align 4, !tbaa !9
  br label %190

190:                                              ; preds = %187, %160
  br label %191

191:                                              ; preds = %190, %157
  br label %192

192:                                              ; preds = %191, %48
  br label %193

193:                                              ; preds = %192, %29
  br label %13, !llvm.loop !14

194:                                              ; preds = %13
  br label %195

195:                                              ; preds = %198, %194
  %196 = load i32, ptr %10, align 4, !tbaa !9
  %197 = icmp ne i32 %196, -1
  br i1 %197, label %198, label %209

198:                                              ; preds = %195
  %199 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i8 %199, ptr %6, align 1, !tbaa !11
  %200 = load i32, ptr %10, align 4, !tbaa !9
  %201 = add nsw i32 %200, -1
  store i32 %201, ptr %10, align 4, !tbaa !9
  %202 = load i8, ptr %6, align 1, !tbaa !11
  %203 = load ptr, ptr %4, align 8, !tbaa !5
  %204 = load i32, ptr %12, align 4, !tbaa !9
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds i8, ptr %203, i64 %205
  store i8 %202, ptr %206, align 1, !tbaa !11
  %207 = load i32, ptr %12, align 4, !tbaa !9
  %208 = add nsw i32 %207, 1
  store i32 %208, ptr %12, align 4, !tbaa !9
  br label %195, !llvm.loop !15

209:                                              ; preds = %195
  %210 = load ptr, ptr %4, align 8, !tbaa !5
  %211 = load i32, ptr %12, align 4, !tbaa !9
  %212 = sext i32 %211 to i64
  %213 = getelementptr inbounds i8, ptr %210, i64 %212
  store i8 0, ptr %213, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5stackC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: nounwind willreturn memory(read)
declare i32 @isalnum(i32 noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.stack = type { ptr }

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3seqc(i8 noundef signext) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6in_posPcS_(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = alloca %class.stack, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  call void @_ZN5stackC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %3)
  br label %.outer

.outer:                                           ; preds = %.outer.backedge, %2
  %.077.ph = phi i32 [ -1, %2 ], [ %.077.ph.be, %.outer.backedge ]
  %.075.ph = phi i32 [ 0, %2 ], [ %.075.ph.be, %.outer.backedge ]
  %.0.ph = phi i32 [ 0, %2 ], [ %.0.ph.be, %.outer.backedge ]
  br label %.outer106

.outer106:                                        ; preds = %.outer, %13
  %.075.ph107 = phi i32 [ %.075.ph, %.outer ], [ %16, %13 ]
  %.0.ph108 = phi i32 [ %.0.ph, %.outer ], [ %17, %13 ]
  %4 = sext i32 %.075.ph107 to i64
  %5 = getelementptr inbounds i8, ptr %0, i64 %4
  %6 = load i8, ptr %5, align 1, !tbaa !5
  %7 = sext i8 %6 to i32
  switch i8 %6, label %11 [
    i8 0, label %.preheader
    i8 40, label %9
  ]

.preheader:                                       ; preds = %18, %.outer106
  %.not8493 = icmp eq i32 %.077.ph, -1
  br i1 %.not8493, label %._crit_edge97, label %.lr.ph96.preheader

.lr.ph96.preheader:                               ; preds = %.preheader
  %8 = sext i32 %.0.ph108 to i64
  br label %.lr.ph96

9:                                                ; preds = %18, %.outer106
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %3, i8 noundef signext 40)
  %10 = add nsw i32 %.077.ph, 1
  br label %.outer.backedge

.outer.backedge:                                  ; preds = %37, %._crit_edge.loopexit, %22, %31, %35, %23, %9
  %.077.ph.be = phi i32 [ %10, %9 ], [ 0, %22 ], [ %.077.ph, %31 ], [ %36, %35 ], [ %25, %23 ], [ %.27987, %37 ], [ %.279, %._crit_edge.loopexit ]
  %.0.ph.be = phi i32 [ %.0.ph108, %9 ], [ %.0.ph108, %22 ], [ %34, %31 ], [ %.0.ph108, %35 ], [ %.0.ph108, %23 ], [ %.0.ph108, %37 ], [ %42, %._crit_edge.loopexit ]
  %.075.ph.be = add nsw i32 %.075.ph107, 1
  br label %.outer, !llvm.loop !8

11:                                               ; preds = %18, %.outer106
  %12 = call i32 @isalnum(i32 noundef %7) #5
  %.not85 = icmp eq i32 %12, 0
  br i1 %.not85, label %18, label %13

13:                                               ; preds = %11
  %14 = sext i32 %.0.ph108 to i64
  %15 = getelementptr inbounds i8, ptr %1, i64 %14
  store i8 %6, ptr %15, align 1, !tbaa !5
  %16 = add nsw i32 %.075.ph107, 1
  %17 = add nsw i32 %.0.ph108, 1
  br label %.outer106, !llvm.loop !8

18:                                               ; preds = %11
  switch i8 %6, label %11 [
    i8 45, label %19
    i8 43, label %19
    i8 47, label %19
    i8 42, label %19
    i8 41, label %37
    i8 0, label %.preheader
    i8 40, label %9
  ]

19:                                               ; preds = %18, %18, %18, %18
  %20 = getelementptr inbounds i8, ptr %0, i64 %4
  %21 = icmp eq i32 %.077.ph, -1
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %3, i8 noundef signext %6)
  br label %.outer.backedge

23:                                               ; preds = %19
  %24 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %25 = add nsw i32 %.077.ph, -1
  switch i8 %24, label %.outer.backedge [
    i8 47, label %26
    i8 45, label %26
    i8 43, label %26
    i8 42, label %26
  ]

26:                                               ; preds = %23, %23, %23, %23
  %27 = load i8, ptr %20, align 1, !tbaa !5
  %28 = call noundef i32 @_Z3seqc(i8 noundef signext %24)
  %29 = call noundef i32 @_Z3seqc(i8 noundef signext %27)
  %30 = icmp sgt i32 %28, %29
  br i1 %30, label %31, label %35

31:                                               ; preds = %26
  %32 = sext i32 %.0.ph108 to i64
  %33 = getelementptr inbounds i8, ptr %1, i64 %32
  store i8 %24, ptr %33, align 1, !tbaa !5
  %34 = add nsw i32 %.0.ph108, 1
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %3, i8 noundef signext %27)
  br label %.outer.backedge

35:                                               ; preds = %26
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %3, i8 noundef signext %24)
  call void @_ZN5stack4pushEc(ptr noundef nonnull align 8 dereferenceable(8) %3, i8 noundef signext %27)
  %36 = add nuw nsw i32 %.077.ph, 1
  br label %.outer.backedge

37:                                               ; preds = %18
  %38 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %.27987 = add nsw i32 %.077.ph, -1
  %.not8688 = icmp eq i8 %38, 40
  br i1 %.not8688, label %.outer.backedge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %37
  %39 = sext i32 %.0.ph108 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %39, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.27991 = phi i32 [ %.27987, %.lr.ph.preheader ], [ %.279, %.lr.ph ]
  %.08289 = phi i8 [ %38, %.lr.ph.preheader ], [ %41, %.lr.ph ]
  %40 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv
  store i8 %.08289, ptr %40, align 1, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %41 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %.279 = add nsw i32 %.27991, -1
  %.not86 = icmp eq i8 %41, 40
  br i1 %.not86, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !10

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %42 = trunc nsw i64 %indvars.iv.next to i32
  br label %.outer.backedge

.lr.ph96:                                         ; preds = %.lr.ph96.preheader, %.lr.ph96
  %indvars.iv101 = phi i64 [ %8, %.lr.ph96.preheader ], [ %indvars.iv.next102, %.lr.ph96 ]
  %.48194 = phi i32 [ %.077.ph, %.lr.ph96.preheader ], [ %44, %.lr.ph96 ]
  %43 = call noundef signext i8 @_ZN5stack3popEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %44 = add nsw i32 %.48194, -1
  %45 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv101
  store i8 %43, ptr %45, align 1, !tbaa !5
  %indvars.iv.next102 = add nsw i64 %indvars.iv101, 1
  %.not84 = icmp eq i32 %.48194, 0
  br i1 %.not84, label %._crit_edge97.loopexit, label %.lr.ph96, !llvm.loop !11

._crit_edge97.loopexit:                           ; preds = %.lr.ph96
  %46 = trunc nsw i64 %indvars.iv.next102 to i32
  br label %._crit_edge97

._crit_edge97:                                    ; preds = %._crit_edge97.loopexit, %.preheader
  %.4.lcssa = phi i32 [ %.0.ph108, %.preheader ], [ %46, %._crit_edge97.loopexit ]
  %47 = sext i32 %.4.lcssa to i64
  %48 = getelementptr inbounds i8, ptr %1, i64 %47
  store i8 0, ptr %48, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5stackC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare i32 @isalnum(i32 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass