; LLVM IR from sympiler/nasoq :: src/common/Util.ll (ZN5nasoq11gather_rowsESt6vectorIiSaIiEEmmPiS3_PdRmS5_S5_RS3_S6_RS4_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.nasoq::sympiler_CSC" = type { i64, i64, i64, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #2

declare void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5nasoq11gather_rowsESt6vectorIiSaIiEEmmPiS3_PdRmS5_S5_RS3_S6_RS4_(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11) #6 {
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  %26 = alloca ptr, align 8
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  store ptr %0, ptr %13, align 8, !tbaa !5
  store i64 %1, ptr %14, align 8, !tbaa !9
  store i64 %2, ptr %15, align 8, !tbaa !9
  store ptr %3, ptr %16, align 8, !tbaa !5
  store ptr %4, ptr %17, align 8, !tbaa !5
  store ptr %5, ptr %18, align 8, !tbaa !5
  store ptr %6, ptr %19, align 8, !tbaa !5
  store ptr %7, ptr %20, align 8, !tbaa !5
  store ptr %8, ptr %21, align 8, !tbaa !5
  store ptr %9, ptr %22, align 8, !tbaa !5
  store ptr %10, ptr %23, align 8, !tbaa !5
  store ptr %11, ptr %24, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #7
  %36 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 88) #8
  store ptr %36, ptr %25, align 8, !tbaa !5
  %37 = load i64, ptr %14, align 8, !tbaa !9
  %38 = load i64, ptr %15, align 8, !tbaa !9
  %39 = load ptr, ptr %16, align 8, !tbaa !5
  %40 = load ptr, ptr %17, align 8, !tbaa !5
  %41 = load ptr, ptr %18, align 8, !tbaa !5
  %42 = load ptr, ptr %25, align 8, !tbaa !5
  %43 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %25, align 8, !tbaa !5
  %45 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %44, i32 0, i32 1
  %46 = load ptr, ptr %25, align 8, !tbaa !5
  %47 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %46, i32 0, i32 3
  %48 = load ptr, ptr %25, align 8, !tbaa !5
  %49 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %48, i32 0, i32 4
  %50 = load ptr, ptr %25, align 8, !tbaa !5
  %51 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %50, i32 0, i32 6
  %52 = call noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef %37, i64 noundef %38, ptr noundef %39, ptr noundef %40, ptr noundef %41, ptr noundef nonnull align 8 dereferenceable(8) %43, ptr noundef nonnull align 8 dereferenceable(8) %45, ptr noundef nonnull align 8 dereferenceable(8) %47, ptr noundef nonnull align 8 dereferenceable(8) %49, ptr noundef nonnull align 8 dereferenceable(8) %51)
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #7
  %53 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #7
  %54 = load ptr, ptr %19, align 8, !tbaa !5
  store i64 %53, ptr %54, align 8, !tbaa !9
  %55 = load i64, ptr %15, align 8, !tbaa !9
  %56 = load ptr, ptr %20, align 8, !tbaa !5
  store i64 %55, ptr %56, align 8, !tbaa !9
  %57 = load ptr, ptr %19, align 8, !tbaa !5
  %58 = load i64, ptr %57, align 8, !tbaa !9
  %59 = add i64 %58, 1
  %60 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %59, i64 4)
  %61 = extractvalue { i64, i1 } %60, 1
  %62 = extractvalue { i64, i1 } %60, 0
  %63 = select i1 %61, i64 -1, i64 %62
  %64 = call noalias noundef nonnull ptr @_Znam(i64 noundef %63) #8
  store ptr %64, ptr %26, align 8, !tbaa !5
  %65 = load ptr, ptr %26, align 8, !tbaa !5
  %66 = getelementptr inbounds i32, ptr %65, i64 0
  store i32 0, ptr %66, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #7
  store i32 0, ptr %29, align 4, !tbaa !11
  br label %67

67:                                               ; preds = %106, %12
  %68 = load i32, ptr %29, align 4, !tbaa !11
  %69 = sext i32 %68 to i64
  %70 = load ptr, ptr %19, align 8, !tbaa !5
  %71 = load i64, ptr %70, align 8, !tbaa !9
  %72 = icmp ult i64 %69, %71
  br i1 %72, label %74, label %73

73:                                               ; preds = %67
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #7
  br label %109

74:                                               ; preds = %67
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #7
  %75 = load i32, ptr %29, align 4, !tbaa !11
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %76) #7
  %78 = load i32, ptr %77, align 4, !tbaa !11
  store i32 %78, ptr %30, align 4, !tbaa !11
  %79 = load ptr, ptr %26, align 8, !tbaa !5
  %80 = load i32, ptr %29, align 4, !tbaa !11
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds i32, ptr %79, i64 %81
  %83 = load i32, ptr %82, align 4, !tbaa !11
  %84 = load ptr, ptr %25, align 8, !tbaa !5
  %85 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %84, i32 0, i32 3
  %86 = load ptr, ptr %85, align 8, !tbaa !13
  %87 = load i32, ptr %30, align 4, !tbaa !11
  %88 = add nsw i32 %87, 1
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds i32, ptr %86, i64 %89
  %91 = load i32, ptr %90, align 4, !tbaa !11
  %92 = load ptr, ptr %25, align 8, !tbaa !5
  %93 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %92, i32 0, i32 3
  %94 = load ptr, ptr %93, align 8, !tbaa !13
  %95 = load i32, ptr %30, align 4, !tbaa !11
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds i32, ptr %94, i64 %96
  %98 = load i32, ptr %97, align 4, !tbaa !11
  %99 = sub nsw i32 %91, %98
  %100 = add nsw i32 %83, %99
  %101 = load ptr, ptr %26, align 8, !tbaa !5
  %102 = load i32, ptr %29, align 4, !tbaa !11
  %103 = add nsw i32 %102, 1
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds i32, ptr %101, i64 %104
  store i32 %100, ptr %105, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #7
  br label %106

106:                                              ; preds = %74
  %107 = load i32, ptr %29, align 4, !tbaa !11
  %108 = add nsw i32 %107, 1
  store i32 %108, ptr %29, align 4, !tbaa !11
  br label %67, !llvm.loop !15

109:                                              ; preds = %73
  %110 = load ptr, ptr %26, align 8, !tbaa !5
  %111 = load ptr, ptr %19, align 8, !tbaa !5
  %112 = load i64, ptr %111, align 8, !tbaa !9
  %113 = getelementptr inbounds i32, ptr %110, i64 %112
  %114 = load i32, ptr %113, align 4, !tbaa !11
  %115 = sext i32 %114 to i64
  %116 = load ptr, ptr %21, align 8, !tbaa !5
  store i64 %115, ptr %116, align 8, !tbaa !9
  %117 = load ptr, ptr %21, align 8, !tbaa !5
  %118 = load i64, ptr %117, align 8, !tbaa !9
  %119 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %118, i64 4)
  %120 = extractvalue { i64, i1 } %119, 1
  %121 = extractvalue { i64, i1 } %119, 0
  %122 = select i1 %120, i64 -1, i64 %121
  %123 = call noalias noundef nonnull ptr @_Znam(i64 noundef %122) #8
  store ptr %123, ptr %27, align 8, !tbaa !5
  %124 = load ptr, ptr %21, align 8, !tbaa !5
  %125 = load i64, ptr %124, align 8, !tbaa !9
  %126 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %125, i64 8)
  %127 = extractvalue { i64, i1 } %126, 1
  %128 = extractvalue { i64, i1 } %126, 0
  %129 = select i1 %127, i64 -1, i64 %128
  %130 = call noalias noundef nonnull ptr @_Znam(i64 noundef %129) #8
  store ptr %130, ptr %28, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #7
  store i32 0, ptr %31, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #7
  store i32 0, ptr %32, align 4, !tbaa !11
  br label %131

131:                                              ; preds = %191, %109
  %132 = load i32, ptr %32, align 4, !tbaa !11
  %133 = sext i32 %132 to i64
  %134 = load ptr, ptr %19, align 8, !tbaa !5
  %135 = load i64, ptr %134, align 8, !tbaa !9
  %136 = icmp ult i64 %133, %135
  br i1 %136, label %138, label %137

137:                                              ; preds = %131
  store i32 5, ptr %33, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #7
  br label %194

138:                                              ; preds = %131
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #7
  %139 = load i32, ptr %32, align 4, !tbaa !11
  %140 = sext i32 %139 to i64
  %141 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %140) #7
  %142 = load i32, ptr %141, align 4, !tbaa !11
  store i32 %142, ptr %34, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #7
  %143 = load ptr, ptr %25, align 8, !tbaa !5
  %144 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %143, i32 0, i32 3
  %145 = load ptr, ptr %144, align 8, !tbaa !13
  %146 = load i32, ptr %34, align 4, !tbaa !11
  %147 = sext i32 %146 to i64
  %148 = getelementptr inbounds i32, ptr %145, i64 %147
  %149 = load i32, ptr %148, align 4, !tbaa !11
  store i32 %149, ptr %35, align 4, !tbaa !11
  br label %150

150:                                              ; preds = %187, %138
  %151 = load i32, ptr %35, align 4, !tbaa !11
  %152 = load ptr, ptr %25, align 8, !tbaa !5
  %153 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %152, i32 0, i32 3
  %154 = load ptr, ptr %153, align 8, !tbaa !13
  %155 = load i32, ptr %34, align 4, !tbaa !11
  %156 = add nsw i32 %155, 1
  %157 = sext i32 %156 to i64
  %158 = getelementptr inbounds i32, ptr %154, i64 %157
  %159 = load i32, ptr %158, align 4, !tbaa !11
  %160 = icmp slt i32 %151, %159
  br i1 %160, label %162, label %161

161:                                              ; preds = %150
  store i32 8, ptr %33, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #7
  br label %190

162:                                              ; preds = %150
  %163 = load ptr, ptr %25, align 8, !tbaa !5
  %164 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %163, i32 0, i32 4
  %165 = load ptr, ptr %164, align 8, !tbaa !17
  %166 = load i32, ptr %35, align 4, !tbaa !11
  %167 = sext i32 %166 to i64
  %168 = getelementptr inbounds i32, ptr %165, i64 %167
  %169 = load i32, ptr %168, align 4, !tbaa !11
  %170 = load ptr, ptr %27, align 8, !tbaa !5
  %171 = load i32, ptr %31, align 4, !tbaa !11
  %172 = sext i32 %171 to i64
  %173 = getelementptr inbounds i32, ptr %170, i64 %172
  store i32 %169, ptr %173, align 4, !tbaa !11
  %174 = load ptr, ptr %25, align 8, !tbaa !5
  %175 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %174, i32 0, i32 6
  %176 = load ptr, ptr %175, align 8, !tbaa !18
  %177 = load i32, ptr %35, align 4, !tbaa !11
  %178 = sext i32 %177 to i64
  %179 = getelementptr inbounds double, ptr %176, i64 %178
  %180 = load double, ptr %179, align 8, !tbaa !19
  %181 = load ptr, ptr %28, align 8, !tbaa !5
  %182 = load i32, ptr %31, align 4, !tbaa !11
  %183 = sext i32 %182 to i64
  %184 = getelementptr inbounds double, ptr %181, i64 %183
  store double %180, ptr %184, align 8, !tbaa !19
  %185 = load i32, ptr %31, align 4, !tbaa !11
  %186 = add nsw i32 %185, 1
  store i32 %186, ptr %31, align 4, !tbaa !11
  br label %187

187:                                              ; preds = %162
  %188 = load i32, ptr %35, align 4, !tbaa !11
  %189 = add nsw i32 %188, 1
  store i32 %189, ptr %35, align 4, !tbaa !11
  br label %150, !llvm.loop !21

190:                                              ; preds = %161
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #7
  br label %191

191:                                              ; preds = %190
  %192 = load i32, ptr %32, align 4, !tbaa !11
  %193 = add nsw i32 %192, 1
  store i32 %193, ptr %32, align 4, !tbaa !11
  br label %131, !llvm.loop !22

194:                                              ; preds = %137
  %195 = load ptr, ptr %20, align 8, !tbaa !5
  %196 = load i64, ptr %195, align 8, !tbaa !9
  %197 = load ptr, ptr %19, align 8, !tbaa !5
  %198 = load i64, ptr %197, align 8, !tbaa !9
  %199 = load ptr, ptr %26, align 8, !tbaa !5
  %200 = load ptr, ptr %27, align 8, !tbaa !5
  %201 = load ptr, ptr %28, align 8, !tbaa !5
  %202 = load ptr, ptr %19, align 8, !tbaa !5
  %203 = load ptr, ptr %20, align 8, !tbaa !5
  %204 = load ptr, ptr %22, align 8, !tbaa !5
  %205 = load ptr, ptr %23, align 8, !tbaa !5
  %206 = load ptr, ptr %24, align 8, !tbaa !5
  %207 = call noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef %196, i64 noundef %198, ptr noundef %199, ptr noundef %200, ptr noundef %201, ptr noundef nonnull align 8 dereferenceable(8) %202, ptr noundef nonnull align 8 dereferenceable(8) %203, ptr noundef nonnull align 8 dereferenceable(8) %204, ptr noundef nonnull align 8 dereferenceable(8) %205, ptr noundef nonnull align 8 dereferenceable(8) %206)
  %208 = load ptr, ptr %27, align 8, !tbaa !5
  %209 = icmp eq ptr %208, null
  br i1 %209, label %211, label %210

210:                                              ; preds = %194
  call void @_ZdaPv(ptr noundef %208) #9
  br label %211

211:                                              ; preds = %210, %194
  %212 = load ptr, ptr %26, align 8, !tbaa !5
  %213 = icmp eq ptr %212, null
  br i1 %213, label %215, label %214

214:                                              ; preds = %211
  call void @_ZdaPv(ptr noundef %212) #9
  br label %215

215:                                              ; preds = %214, %211
  %216 = load ptr, ptr %28, align 8, !tbaa !5
  %217 = icmp eq ptr %216, null
  br i1 %217, label %219, label %218

218:                                              ; preds = %215
  call void @_ZdaPv(ptr noundef %216) #9
  br label %219

219:                                              ; preds = %218, %215
  %220 = load ptr, ptr %25, align 8, !tbaa !5
  call void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef %220, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #7
  ret void
}

declare noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 24}
!14 = !{!"_ZTSN5nasoq12sympiler_CSCE", !10, i64 0, !10, i64 8, !10, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!14, !6, i64 32}
!18 = !{!14, !6, i64 48}
!19 = !{!20, !20, i64 0}
!20 = !{!"double", !7, i64 0}
!21 = distinct !{!21, !16}
!22 = distinct !{!22, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #0

declare void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5nasoq11gather_rowsESt6vectorIiSaIiEEmmPiS3_PdRmS5_S5_RS3_S6_RS4_(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11) local_unnamed_addr #4 {
  %13 = tail call noalias noundef nonnull dereferenceable(88) ptr @_Znwm(i64 noundef 88) #5
  %14 = getelementptr inbounds i8, ptr %13, i64 8
  %15 = getelementptr inbounds i8, ptr %13, i64 24
  %16 = getelementptr inbounds i8, ptr %13, i64 32
  %17 = getelementptr inbounds i8, ptr %13, i64 48
  %18 = tail call noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %14, ptr noundef nonnull align 8 dereferenceable(8) %15, ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17)
  %19 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #6
  store i64 %19, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  %20 = load i64, ptr %6, align 8, !tbaa !5
  %21 = add i64 %20, 1
  %22 = icmp ugt i64 %21, 4611686018427387903
  %23 = shl i64 %21, 2
  %24 = select i1 %22, i64 -1, i64 %23
  %25 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %24) #5
  store i32 0, ptr %25, align 4, !tbaa !9
  %.not = icmp eq i64 %20, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %.phi.trans.insert = getelementptr inbounds i32, ptr %25, i64 %50
  %.pre = load i32, ptr %.phi.trans.insert, align 4, !tbaa !9
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %12
  %26 = phi i32 [ 0, %12 ], [ %.pre, %._crit_edge.loopexit ]
  %27 = sext i32 %26 to i64
  store i64 %27, ptr %8, align 8, !tbaa !5
  %28 = icmp slt i32 %26, 0
  %29 = shl nsw i64 %27, 2
  %30 = select i1 %28, i64 -1, i64 %29
  %31 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %30) #5
  %32 = ptrtoint ptr %31 to i64
  %33 = shl nsw i64 %27, 3
  %34 = select i1 %28, i64 -1, i64 %33
  %35 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %34) #5
  %36 = ptrtoint ptr %35 to i64
  %37 = load i64, ptr %6, align 8, !tbaa !5
  %.not85 = icmp eq i64 %37, 0
  br i1 %.not85, label %._crit_edge83, label %.lr.ph82

.lr.ph:                                           ; preds = %12, %.lr.ph
  %38 = phi i32 [ %48, %.lr.ph ], [ 0, %12 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %12 ]
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #6
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = load ptr, ptr %15, align 8, !tbaa !11
  %42 = sext i32 %40 to i64
  %43 = getelementptr i32, ptr %41, i64 %42
  %44 = getelementptr i8, ptr %43, i64 4
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = load i32, ptr %43, align 4, !tbaa !9
  %47 = add i32 %45, %38
  %48 = sub i32 %47, %46
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %49 = getelementptr inbounds i32, ptr %25, i64 %indvars.iv.next
  store i32 %48, ptr %49, align 4, !tbaa !9
  %50 = load i64, ptr %6, align 8, !tbaa !5
  %51 = icmp ugt i64 %50, %indvars.iv.next
  br i1 %51, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !14

._crit_edge83:                                    ; preds = %._crit_edge77, %._crit_edge
  %.lcssa = phi i64 [ 0, %._crit_edge ], [ %91, %._crit_edge77 ]
  %52 = load i64, ptr %7, align 8, !tbaa !5
  %53 = tail call noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef %52, i64 noundef %.lcssa, ptr noundef nonnull %25, ptr noundef nonnull %31, ptr noundef nonnull %35, ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11)
  tail call void @_ZdaPv(ptr noundef nonnull %31) #7
  tail call void @_ZdaPv(ptr noundef nonnull %25) #7
  tail call void @_ZdaPv(ptr noundef nonnull %35) #7
  tail call void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef nonnull %13, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0)
  ret void

.lr.ph82:                                         ; preds = %._crit_edge, %._crit_edge77
  %indvars.iv97 = phi i64 [ %indvars.iv.next98, %._crit_edge77 ], [ 0, %._crit_edge ]
  %.06679 = phi i32 [ %.1.lcssa, %._crit_edge77 ], [ 0, %._crit_edge ]
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv97) #6
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = load ptr, ptr %15, align 8, !tbaa !11
  %57 = sext i32 %55 to i64
  %58 = getelementptr inbounds i32, ptr %56, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = getelementptr i8, ptr %58, i64 4
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = icmp slt i32 %59, %61
  br i1 %62, label %.lr.ph76, label %._crit_edge77

.lr.ph76:                                         ; preds = %.lr.ph82
  %63 = load ptr, ptr %16, align 8, !tbaa !16
  %64 = load ptr, ptr %17, align 8, !tbaa !17
  %65 = sext i32 %59 to i64
  %66 = sext i32 %.06679 to i64
  %67 = sext i32 %61 to i64
  %68 = sub nsw i64 %67, %65
  %min.iters.check = icmp ult i64 %68, 10
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.memcheck

scalar.ph.preheader:                              ; preds = %middle.block, %vector.memcheck, %.lr.ph76
  %indvars.iv92.ph = phi i64 [ %66, %vector.memcheck ], [ %66, %.lr.ph76 ], [ %ind.end, %middle.block ]
  %indvars.iv90.ph = phi i64 [ %65, %vector.memcheck ], [ %65, %.lr.ph76 ], [ %ind.end105, %middle.block ]
  br label %scalar.ph

vector.memcheck:                                  ; preds = %.lr.ph76
  %69 = ptrtoint ptr %64 to i64
  %70 = ptrtoint ptr %63 to i64
  %71 = shl nsw i64 %66, 2
  %72 = add i64 %71, %32
  %73 = shl nsw i64 %65, 2
  %74 = add i64 %73, %70
  %75 = sub i64 %72, %74
  %diff.check = icmp ult i64 %75, 16
  %76 = shl nsw i64 %66, 3
  %77 = add i64 %76, %36
  %78 = shl nsw i64 %65, 3
  %79 = add i64 %78, %69
  %80 = sub i64 %77, %79
  %diff.check104 = icmp ult i64 %80, 32
  %conflict.rdx = or i1 %diff.check, %diff.check104
  br i1 %conflict.rdx, label %scalar.ph.preheader, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %68, -4
  %ind.end = add nsw i64 %n.vec, %66
  %ind.end105 = add nsw i64 %n.vec, %65
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = add i64 %index, %66
  %offset.idx107 = add i64 %index, %65
  %81 = getelementptr inbounds i32, ptr %63, i64 %offset.idx107
  %82 = getelementptr inbounds i8, ptr %81, i64 8
  %wide.load = load <2 x i32>, ptr %81, align 4, !tbaa !9
  %wide.load108 = load <2 x i32>, ptr %82, align 4, !tbaa !9
  %83 = getelementptr inbounds i32, ptr %31, i64 %offset.idx
  %84 = getelementptr inbounds i8, ptr %83, i64 8
  store <2 x i32> %wide.load, ptr %83, align 4, !tbaa !9
  store <2 x i32> %wide.load108, ptr %84, align 4, !tbaa !9
  %85 = getelementptr inbounds double, ptr %64, i64 %offset.idx107
  %86 = getelementptr inbounds i8, ptr %85, i64 16
  %wide.load109 = load <2 x double>, ptr %85, align 8, !tbaa !18
  %wide.load110 = load <2 x double>, ptr %86, align 8, !tbaa !18
  %87 = getelementptr inbounds double, ptr %35, i64 %offset.idx
  %88 = getelementptr inbounds i8, ptr %87, i64 16
  store <2 x double> %wide.load109, ptr %87, align 8, !tbaa !18
  store <2 x double> %wide.load110, ptr %88, align 8, !tbaa !18
  %index.next = add nuw i64 %index, 4
  %89 = icmp eq i64 %index.next, %n.vec
  br i1 %89, label %middle.block, label %vector.body, !llvm.loop !20

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %68, %n.vec
  br i1 %cmp.n, label %._crit_edge77.loopexit, label %scalar.ph.preheader

._crit_edge77.loopexit:                           ; preds = %scalar.ph, %middle.block
  %indvars.iv.next93.lcssa = phi i64 [ %ind.end, %middle.block ], [ %indvars.iv.next93, %scalar.ph ]
  %90 = trunc nsw i64 %indvars.iv.next93.lcssa to i32
  br label %._crit_edge77

._crit_edge77:                                    ; preds = %._crit_edge77.loopexit, %.lr.ph82
  %.1.lcssa = phi i32 [ %.06679, %.lr.ph82 ], [ %90, %._crit_edge77.loopexit ]
  %indvars.iv.next98 = add nuw nsw i64 %indvars.iv97, 1
  %91 = load i64, ptr %6, align 8, !tbaa !5
  %92 = icmp ugt i64 %91, %indvars.iv.next98
  br i1 %92, label %.lr.ph82, label %._crit_edge83, !llvm.loop !23

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv92 = phi i64 [ %indvars.iv.next93, %scalar.ph ], [ %indvars.iv92.ph, %scalar.ph.preheader ]
  %indvars.iv90 = phi i64 [ %indvars.iv.next91, %scalar.ph ], [ %indvars.iv90.ph, %scalar.ph.preheader ]
  %93 = getelementptr inbounds i32, ptr %63, i64 %indvars.iv90
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = getelementptr inbounds i32, ptr %31, i64 %indvars.iv92
  store i32 %94, ptr %95, align 4, !tbaa !9
  %96 = getelementptr inbounds double, ptr %64, i64 %indvars.iv90
  %97 = load double, ptr %96, align 8, !tbaa !18
  %98 = getelementptr inbounds double, ptr %35, i64 %indvars.iv92
  store double %97, ptr %98, align 8, !tbaa !18
  %indvars.iv.next93 = add nsw i64 %indvars.iv92, 1
  %indvars.iv.next91 = add nsw i64 %indvars.iv90, 1
  %99 = icmp slt i64 %indvars.iv.next91, %67
  br i1 %99, label %scalar.ph, label %._crit_edge77.loopexit, !llvm.loop !24
}

declare noundef i32 @_ZN5nasoq15transpose_unsymEmmPiS0_PdRmS2_RS0_S3_RS1_(i64 noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { nounwind }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 24}
!12 = !{!"_ZTSN5nasoq12sympiler_CSCE", !6, i64 0, !6, i64 8, !6, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84}
!13 = !{!"any pointer", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!12, !13, i64 32}
!17 = !{!12, !13, i64 48}
!18 = !{!19, !19, i64 0}
!19 = !{!"double", !7, i64 0}
!20 = distinct !{!20, !15, !21, !22}
!21 = !{!"llvm.loop.isvectorized", i32 1}
!22 = !{!"llvm.loop.unroll.runtime.disable"}
!23 = distinct !{!23, !15}
!24 = distinct !{!24, !15, !21}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass