; LLVM IR from tyoma/agge :: src/agge/vector_rasterizer.ll (ZN4agge17vector_rasterizer5resetEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.agge::vector_rasterizer::cell" = type <{ i16, i16, i32, i16 }>
%"class.agge::vector_rasterizer" = type <{ %"class.agge::pod_vector", %"class.agge::pod_vector.0", %"class.agge::pod_vector.0", %"class.agge::pod_vector", i32, i32, i32, i32, i32, [4 x i8] }>
%"class.agge::pod_vector.0" = type { ptr, ptr, ptr }
%"class.agge::pod_vector" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge17vector_rasterizer5resetEv(ptr noundef nonnull align 8 dereferenceable(116) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca %"struct.agge::vector_rasterizer::cell", align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 10, ptr %3) #5
  call void @llvm.memset.p0.i64(ptr align 1 %3, i8 0, i64 10, i1 false)
  %5 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 0
  call void @_ZN4agge10pod_vectorINS_17vector_rasterizer4cellEE6assignEjRKS2_(ptr noundef nonnull align 8 dereferenceable(24) %5, i32 noundef 1, ptr noundef nonnull align 1 dereferenceable(10) %3)
  %6 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 1
  call void @_ZN4agge10pod_vectorIjE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %6)
  %7 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 4
  store i32 32767, ptr %7, align 8, !tbaa !9
  %8 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 5
  store i32 32767, ptr %8, align 4, !tbaa !14
  %9 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 7
  store i32 -32767, ptr %9, align 4, !tbaa !15
  %10 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 6
  store i32 -32767, ptr %10, align 8, !tbaa !16
  %11 = getelementptr inbounds %"class.agge::vector_rasterizer", ptr %4, i32 0, i32 8
  store i32 0, ptr %11, align 8, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 10, ptr %3) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4agge10pod_vectorINS_17vector_rasterizer4cellEE6assignEjRKS2_(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 1 dereferenceable(10)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4agge10pod_vectorIjE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 96}
!10 = !{!"_ZTSN4agge17vector_rasterizerE", !11, i64 0, !12, i64 24, !12, i64 48, !11, i64 72, !13, i64 96, !13, i64 100, !13, i64 104, !13, i64 108, !13, i64 112}
!11 = !{!"_ZTSN4agge10pod_vectorINS_17vector_rasterizer4cellEEE", !6, i64 0, !6, i64 8, !6, i64 16}
!12 = !{!"_ZTSN4agge10pod_vectorIjEE", !6, i64 0, !6, i64 8, !6, i64 16}
!13 = !{!"int", !7, i64 0}
!14 = !{!10, !13, i64 100}
!15 = !{!10, !13, i64 108}
!16 = !{!10, !13, i64 104}
!17 = !{!10, !13, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.agge::vector_rasterizer::cell" = type <{ i16, i16, i32, i16 }>

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4agge17vector_rasterizer5resetEv(ptr noundef nonnull align 8 dereferenceable(116) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca %"struct.agge::vector_rasterizer::cell", align 1
  call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %2) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(10) %2, i8 0, i64 10, i1 false)
  call void @_ZN4agge10pod_vectorINS_17vector_rasterizer4cellEE6assignEjRKS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef 1, ptr noundef nonnull align 1 dereferenceable(10) %2)
  %3 = getelementptr inbounds i8, ptr %0, i64 24
  call void @_ZN4agge10pod_vectorIjE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %4 = getelementptr inbounds i8, ptr %0, i64 96
  store <4 x i32> <i32 32767, i32 32767, i32 -32767, i32 -32767>, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 112
  store i32 0, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %2) #5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN4agge10pod_vectorINS_17vector_rasterizer4cellEE6assignEjRKS2_(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef nonnull align 1 dereferenceable(10)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4agge10pod_vectorIjE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 112}
!10 = !{!"_ZTSN4agge17vector_rasterizerE", !11, i64 0, !13, i64 24, !13, i64 48, !11, i64 72, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112}
!11 = !{!"_ZTSN4agge10pod_vectorINS_17vector_rasterizer4cellEEE", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"_ZTSN4agge10pod_vectorIjEE", !12, i64 0, !12, i64 8, !12, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass