; LLVM IR from venumb/ZSPACE :: cpp/depends/lodePNG/pngdetail.ll (Z8RGBtoHSLhhhPhS_S_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8RGBtoHSLhhhPhS_S_(i8 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #1 {
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  store i8 %0, ptr %7, align 1, !tbaa !5
  store i8 %1, ptr %8, align 1, !tbaa !5
  store i8 %2, ptr %9, align 1, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !8
  store ptr %4, ptr %11, align 8, !tbaa !8
  store ptr %5, ptr %12, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %24 = load i8, ptr %7, align 1, !tbaa !5
  %25 = zext i8 %24 to i32
  store i32 %25, ptr %14, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %26 = load i8, ptr %8, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  store i32 %27, ptr %15, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %28 = load i8, ptr %9, align 1, !tbaa !5
  %29 = zext i8 %28 to i32
  store i32 %29, ptr %16, align 4, !tbaa !10
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16)
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %14, ptr noundef nonnull align 4 dereferenceable(4) %30)
  %32 = load i32, ptr %31, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  store i32 %32, ptr %13, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %33 = load i8, ptr %7, align 1, !tbaa !5
  %34 = zext i8 %33 to i32
  store i32 %34, ptr %18, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %35 = load i8, ptr %8, align 1, !tbaa !5
  %36 = zext i8 %35 to i32
  store i32 %36, ptr %19, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %37 = load i8, ptr %9, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  store i32 %38, ptr %20, align 4, !tbaa !10
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %19, ptr noundef nonnull align 4 dereferenceable(4) %20)
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %18, ptr noundef nonnull align 4 dereferenceable(4) %39)
  %41 = load i32, ptr %40, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  store i32 %41, ptr %17, align 4, !tbaa !10
  %42 = load i32, ptr %17, align 4, !tbaa !10
  %43 = load i32, ptr %13, align 4, !tbaa !10
  %44 = icmp eq i32 %42, %43
  br i1 %44, label %45, label %50

45:                                               ; preds = %6
  %46 = load ptr, ptr %11, align 8, !tbaa !8
  store i8 0, ptr %46, align 1, !tbaa !5
  %47 = load ptr, ptr %10, align 8, !tbaa !8
  store i8 0, ptr %47, align 1, !tbaa !5
  %48 = load i8, ptr %7, align 1, !tbaa !5
  %49 = load ptr, ptr %12, align 8, !tbaa !8
  store i8 %48, ptr %49, align 1, !tbaa !5
  br label %124

50:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %51 = load i32, ptr %17, align 4, !tbaa !10
  %52 = load i32, ptr %13, align 4, !tbaa !10
  %53 = add nsw i32 %51, %52
  store i32 %53, ptr %21, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  %54 = load i32, ptr %13, align 4, !tbaa !10
  %55 = load i32, ptr %17, align 4, !tbaa !10
  %56 = sub nsw i32 %54, %55
  store i32 %56, ptr %22, align 4, !tbaa !10
  %57 = load i32, ptr %21, align 4, !tbaa !10
  %58 = sdiv i32 %57, 2
  %59 = trunc i32 %58 to i8
  %60 = load ptr, ptr %12, align 8, !tbaa !8
  store i8 %59, ptr %60, align 1, !tbaa !5
  %61 = load i32, ptr %22, align 4, !tbaa !10
  %62 = mul nsw i32 255, %61
  %63 = load ptr, ptr %12, align 8, !tbaa !8
  %64 = load i8, ptr %63, align 1, !tbaa !5
  %65 = zext i8 %64 to i32
  %66 = icmp slt i32 %65, 128
  br i1 %66, label %67, label %69

67:                                               ; preds = %50
  %68 = load i32, ptr %21, align 4, !tbaa !10
  br label %72

69:                                               ; preds = %50
  %70 = load i32, ptr %21, align 4, !tbaa !10
  %71 = sub nsw i32 512, %70
  br label %72

72:                                               ; preds = %69, %67
  %73 = phi i32 [ %68, %67 ], [ %71, %69 ]
  %74 = sdiv i32 %62, %73
  %75 = trunc i32 %74 to i8
  %76 = load ptr, ptr %11, align 8, !tbaa !8
  store i8 %75, ptr %76, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %77 = load i8, ptr %7, align 1, !tbaa !5
  %78 = zext i8 %77 to i32
  %79 = load i32, ptr %13, align 4, !tbaa !10
  %80 = icmp eq i32 %78, %79
  br i1 %80, label %81, label %90

81:                                               ; preds = %72
  %82 = load i8, ptr %8, align 1, !tbaa !5
  %83 = zext i8 %82 to i32
  %84 = load i8, ptr %9, align 1, !tbaa !5
  %85 = zext i8 %84 to i32
  %86 = sub nsw i32 %83, %85
  %87 = mul nsw i32 255, %86
  %88 = load i32, ptr %22, align 4, !tbaa !10
  %89 = sdiv i32 %87, %88
  br label %117

90:                                               ; preds = %72
  %91 = load i8, ptr %8, align 1, !tbaa !5
  %92 = zext i8 %91 to i32
  %93 = load i32, ptr %13, align 4, !tbaa !10
  %94 = icmp eq i32 %92, %93
  br i1 %94, label %95, label %105

95:                                               ; preds = %90
  %96 = load i8, ptr %9, align 1, !tbaa !5
  %97 = zext i8 %96 to i32
  %98 = load i8, ptr %7, align 1, !tbaa !5
  %99 = zext i8 %98 to i32
  %100 = sub nsw i32 %97, %99
  %101 = mul nsw i32 255, %100
  %102 = load i32, ptr %22, align 4, !tbaa !10
  %103 = sdiv i32 %101, %102
  %104 = add nsw i32 512, %103
  br label %115

105:                                              ; preds = %90
  %106 = load i8, ptr %7, align 1, !tbaa !5
  %107 = zext i8 %106 to i32
  %108 = load i8, ptr %8, align 1, !tbaa !5
  %109 = zext i8 %108 to i32
  %110 = sub nsw i32 %107, %109
  %111 = mul nsw i32 255, %110
  %112 = load i32, ptr %22, align 4, !tbaa !10
  %113 = sdiv i32 %111, %112
  %114 = add nsw i32 1024, %113
  br label %115

115:                                              ; preds = %105, %95
  %116 = phi i32 [ %104, %95 ], [ %114, %105 ]
  br label %117

117:                                              ; preds = %115, %81
  %118 = phi i32 [ %89, %81 ], [ %116, %115 ]
  store i32 %118, ptr %23, align 4, !tbaa !10
  %119 = load i32, ptr %23, align 4, !tbaa !10
  %120 = sdiv i32 %119, 6
  %121 = and i32 %120, 255
  %122 = trunc i32 %121 to i8
  %123 = load ptr, ptr %10, align 8, !tbaa !8
  store i8 %122, ptr %123, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  br label %124

124:                                              ; preds = %117, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z8RGBtoHSLhhhPhS_S_(i8 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5) local_unnamed_addr #1 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  %13 = zext i8 %0 to i32
  store i32 %13, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  %14 = zext i8 %1 to i32
  store i32 %14, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
  %15 = zext i8 %2 to i32
  store i32 %15, ptr %9, align 4, !tbaa !5
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %17 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %16)
  %18 = load i32, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  store i32 %13, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #3
  store i32 %14, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #3
  store i32 %15, ptr %12, align 4, !tbaa !5
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %19)
  %21 = load i32, ptr %20, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  %22 = icmp eq i32 %21, %18
  br i1 %22, label %23, label %24

23:                                               ; preds = %6
  store i8 0, ptr %4, align 1, !tbaa !9
  store i8 0, ptr %3, align 1, !tbaa !9
  store i8 %0, ptr %5, align 1, !tbaa !9
  br label %56

24:                                               ; preds = %6
  %25 = add nsw i32 %21, %18
  %26 = sub nsw i32 %18, %21
  %27 = sdiv i32 %25, 2
  %28 = trunc i32 %27 to i8
  store i8 %28, ptr %5, align 1, !tbaa !9
  %29 = mul nsw i32 %26, 255
  %30 = and i32 %27, 128
  %.not.not = icmp eq i32 %30, 0
  %31 = sub nsw i32 512, %25
  %32 = select i1 %.not.not, i32 %25, i32 %31
  %33 = sdiv i32 %29, %32
  %34 = trunc i32 %33 to i8
  store i8 %34, ptr %4, align 1, !tbaa !9
  %35 = icmp eq i32 %18, %13
  br i1 %35, label %36, label %40

36:                                               ; preds = %24
  %37 = sub nsw i32 %14, %15
  %38 = mul nsw i32 %37, 255
  %39 = sdiv i32 %38, %26
  br label %52

40:                                               ; preds = %24
  %41 = icmp eq i32 %18, %14
  br i1 %41, label %42, label %47

42:                                               ; preds = %40
  %43 = sub nsw i32 %15, %13
  %44 = mul nsw i32 %43, 255
  %45 = sdiv i32 %44, %26
  %46 = add nsw i32 %45, 512
  br label %52

47:                                               ; preds = %40
  %48 = sub nsw i32 %13, %14
  %49 = mul nsw i32 %48, 255
  %50 = sdiv i32 %49, %26
  %51 = add nsw i32 %50, 1024
  br label %52

52:                                               ; preds = %42, %47, %36
  %53 = phi i32 [ %39, %36 ], [ %46, %42 ], [ %51, %47 ]
  %54 = sdiv i32 %53, 6
  %55 = trunc i32 %54 to i8
  store i8 %55, ptr %3, align 1, !tbaa !9
  br label %56

56:                                               ; preds = %52, %23
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass