; LLVM IR from holzschu/ios_system :: libinfo/gen.subproj (rthdr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cmsghdr = type { i64, i32, i32, [0 x i8] }
%struct.ip6_rthdr = type { i8, i8, i8, i8 }
%struct.ip6_rthdr0 = type { i8, i8, i8, i8, i8, [3 x i8], [0 x %struct.in6_addr] }
%struct.in6_addr = type { %union.anon }
%union.anon = type { [4 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @inet6_rthdr_add(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.cmsghdr, ptr %11, i32 0, i32 3
  %13 = getelementptr inbounds [0 x i8], ptr %12, i64 0, i64 0
  store ptr %13, ptr %8, align 8, !tbaa !5
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.ip6_rthdr, ptr %14, i32 0, i32 2
  %16 = load i8, ptr %15, align 1, !tbaa !11
  %17 = zext i8 %16 to i32
  switch i32 %17, label %70 [
    i32 0, label %18
  ]

18:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %19, ptr %9, align 8, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %18
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = icmp ne i32 %23, 1
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %68

26:                                               ; preds = %22, %18
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.ip6_rthdr0, ptr %27, i32 0, i32 3
  %29 = load i8, ptr %28, align 1, !tbaa !13
  %30 = zext i8 %29 to i32
  %31 = icmp eq i32 %30, 23
  br i1 %31, label %32, label %33

32:                                               ; preds = %26
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %68

33:                                               ; preds = %26
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %68

37:                                               ; preds = %33
  %38 = load ptr, ptr %9, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.ip6_rthdr0, ptr %38, i32 0, i32 3
  %40 = load i8, ptr %39, align 1, !tbaa !13
  %41 = add i8 %40, 1
  store i8 %41, ptr %39, align 1, !tbaa !13
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.ip6_rthdr0, ptr %44, i32 0, i32 1
  %46 = load i8, ptr %45, align 1, !tbaa !15
  %47 = zext i8 %46 to i32
  %48 = add nsw i32 %47, 1
  %49 = shl i32 %48, 3
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds i8, ptr %43, i64 %50
  call void @llvm.memmove.p0.p0.i64(ptr align 1 %51, ptr align 4 %42, i64 16, i1 false)
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.ip6_rthdr0, ptr %52, i32 0, i32 1
  %54 = load i8, ptr %53, align 1, !tbaa !15
  %55 = zext i8 %54 to i64
  %56 = add i64 %55, 2
  %57 = trunc i64 %56 to i8
  store i8 %57, ptr %53, align 1, !tbaa !15
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.ip6_rthdr0, ptr %58, i32 0, i32 1
  %60 = load i8, ptr %59, align 1, !tbaa !15
  %61 = zext i8 %60 to i32
  %62 = add nsw i32 %61, 1
  %63 = shl i32 %62, 3
  %64 = sext i32 %63 to i64
  %65 = add i64 16, %64
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.cmsghdr, ptr %66, i32 0, i32 0
  store i64 %65, ptr %67, align 8, !tbaa !16
  store i32 2, ptr %10, align 4
  br label %68

68:                                               ; preds = %37, %36, %32, %25
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  %69 = load i32, ptr %10, align 4
  switch i32 %69, label %72 [
    i32 2, label %71
  ]

70:                                               ; preds = %3
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %72

71:                                               ; preds = %68
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %72

72:                                               ; preds = %71, %70, %68
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %73 = load i32, ptr %4, align 4
  ret i32 %73
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 2}
!12 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!13 = !{!14, !7, i64 3}
!14 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}
!15 = !{!14, !7, i64 1}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local range(i32 -1, 1) i32 @inet6_rthdr_add(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 18
  %5 = load i8, ptr %4, align 1, !tbaa !5
  %cond = icmp ne i8 %5, 0
  %or.cond = icmp ugt i32 %2, 1
  %or.cond19 = or i1 %or.cond, %cond
  br i1 %or.cond19, label %.thread, label %6

6:                                                ; preds = %3
  %.not = icmp ne i32 %2, 0
  %7 = getelementptr inbounds i8, ptr %0, i64 19
  %8 = load i8, ptr %7, align 1, !tbaa !9
  %9 = icmp eq i8 %8, 23
  %brmerge = or i1 %.not, %9
  br i1 %brmerge, label %.thread, label %10

10:                                               ; preds = %6
  %11 = add i8 %8, 1
  store i8 %11, ptr %7, align 1, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %0, i64 17
  %13 = load i8, ptr %12, align 1, !tbaa !11
  %14 = zext i8 %13 to i64
  %15 = shl nuw nsw i64 %14, 3
  %16 = getelementptr i8, ptr %0, i64 24
  %17 = getelementptr i8, ptr %16, i64 %15
  tail call void @llvm.memmove.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) %17, ptr noundef nonnull align 4 dereferenceable(16) %1, i64 16, i1 false)
  %18 = add i8 %13, 2
  store i8 %18, ptr %12, align 1, !tbaa !11
  %19 = zext i8 %18 to i64
  %20 = shl nuw nsw i64 %19, 3
  %21 = add nuw nsw i64 %20, 24
  store i64 %21, ptr %0, align 8, !tbaa !12
  br label %.thread

.thread:                                          ; preds = %6, %10, %3
  %.1 = phi i32 [ -1, %3 ], [ 0, %10 ], [ -1, %6 ]
  ret i32 %.1
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 2}
!6 = !{!"ip6_rthdr", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 3}
!10 = !{!"ip6_rthdr0", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 8}
!11 = !{!10, !7, i64 1}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass