; LLVM IR from kazunetakahashi/atcoder :: 2018/0714_AGC026/D2.ll (Z5h_indii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@H = external dso_local global [110 x i64], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5h_indii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 -1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 1000000007, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %8, ptr %7, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %28, %2
  %10 = load i32, ptr %7, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %31

14:                                               ; preds = %9
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %16
  %18 = load i64, ptr %17, align 8, !tbaa !9
  %19 = load i64, ptr %6, align 8, !tbaa !9
  %20 = icmp slt i64 %18, %19
  br i1 %20, label %21, label %27

21:                                               ; preds = %14
  %22 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %22, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %24
  %26 = load i64, ptr %25, align 8, !tbaa !9
  store i64 %26, ptr %6, align 8, !tbaa !9
  br label %27

27:                                               ; preds = %21, %14
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %7, align 4, !tbaa !5
  br label %9, !llvm.loop !11

31:                                               ; preds = %13
  %32 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %32
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@H = external dso_local local_unnamed_addr global [110 x i64], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local noundef i32 @_Z5h_indii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp slt i32 %0, %1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %4 = sext i32 %0 to i64
  %wide.trip.count = sext i32 %1 to i64
  %5 = sub nsw i64 %wide.trip.count, %4
  %xtraiter = and i64 %5, 3
  %6 = sub nsw i64 %4, %wide.trip.count
  %7 = icmp ugt i64 %6, -4
  br i1 %7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %5, -4
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %spec.select.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select.3, %.lr.ph ]
  %indvars.iv.unr = phi i64 [ %4, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %.0915.unr = phi i64 [ 1000000007, %.lr.ph.preheader ], [ %spec.select13.3, %.lr.ph ]
  %.01014.unr = phi i32 [ -1, %.lr.ph.preheader ], [ %spec.select.3, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.0915.epil = phi i64 [ %spec.select13.epil, %.lr.ph.epil ], [ %.0915.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.01014.epil = phi i32 [ %spec.select.epil, %.lr.ph.epil ], [ %.01014.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %8 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %indvars.iv.epil
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %10 = icmp slt i64 %9, %.0915.epil
  %11 = trunc nsw i64 %indvars.iv.epil to i32
  %spec.select.epil = select i1 %10, i32 %11, i32 %.01014.epil
  %spec.select13.epil = tail call i64 @llvm.smin.i64(i64 %9, i64 %.0915.epil)
  %indvars.iv.next.epil = add nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !9

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %2
  %.010.lcssa = phi i32 [ -1, %2 ], [ %spec.select.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select.epil, %.lr.ph.epil ]
  ret i32 %.010.lcssa

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ %4, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %.0915 = phi i64 [ 1000000007, %.lr.ph.preheader.new ], [ %spec.select13.3, %.lr.ph ]
  %.01014 = phi i32 [ -1, %.lr.ph.preheader.new ], [ %spec.select.3, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %12 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %indvars.iv
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %14 = icmp slt i64 %13, %.0915
  %15 = trunc nsw i64 %indvars.iv to i32
  %spec.select = select i1 %14, i32 %15, i32 %.01014
  %spec.select13 = tail call i64 @llvm.smin.i64(i64 %13, i64 %.0915)
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %16 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %indvars.iv.next
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = icmp slt i64 %17, %spec.select13
  %19 = trunc nsw i64 %indvars.iv.next to i32
  %spec.select.1 = select i1 %18, i32 %19, i32 %spec.select
  %spec.select13.1 = tail call i64 @llvm.smin.i64(i64 %17, i64 %spec.select13)
  %indvars.iv.next.1 = add nsw i64 %indvars.iv, 2
  %20 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %indvars.iv.next.1
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = icmp slt i64 %21, %spec.select13.1
  %23 = trunc nsw i64 %indvars.iv.next.1 to i32
  %spec.select.2 = select i1 %22, i32 %23, i32 %spec.select.1
  %spec.select13.2 = tail call i64 @llvm.smin.i64(i64 %21, i64 %spec.select13.1)
  %indvars.iv.next.2 = add nsw i64 %indvars.iv, 3
  %24 = getelementptr inbounds [110 x i64], ptr @H, i64 0, i64 %indvars.iv.next.2
  %25 = load i64, ptr %24, align 8, !tbaa !5
  %26 = icmp slt i64 %25, %spec.select13.2
  %27 = trunc nsw i64 %indvars.iv.next.2 to i32
  %spec.select.3 = select i1 %26, i32 %27, i32 %spec.select.2
  %spec.select13.3 = tail call i64 @llvm.smin.i64(i64 %25, i64 %spec.select13.2)
  %indvars.iv.next.3 = add nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.unroll.disable"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass