; LLVM IR from PaddlePaddle/Paddle-Lite :: lite/backends/host/math (temporal_shift)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN6paddle4lite4host4math22temporalshiftNCHW_funcIfEEvPKT_PS4_iiiiiii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #0 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store i32 %2, ptr %12, align 4, !tbaa !9
  store i32 %3, ptr %13, align 4, !tbaa !9
  store i32 %4, ptr %14, align 4, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !9
  store i32 %8, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #2
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %84, %9
  %24 = load i32, ptr %20, align 4, !tbaa !9
  %25 = load i32, ptr %12, align 4, !tbaa !9
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #2
  br label %87

28:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #2
  %29 = load i32, ptr %20, align 4, !tbaa !9
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = srem i32 %29, %30
  %32 = load i32, ptr %14, align 4, !tbaa !9
  %33 = sdiv i32 %31, %32
  store i32 %33, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #2
  %34 = load i32, ptr %20, align 4, !tbaa !9
  %35 = load i32, ptr %14, align 4, !tbaa !9
  %36 = srem i32 %34, %35
  %37 = load i32, ptr %15, align 4, !tbaa !9
  %38 = sdiv i32 %36, %37
  store i32 %38, ptr %22, align 4, !tbaa !9
  %39 = load i32, ptr %22, align 4, !tbaa !9
  %40 = load i32, ptr %17, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %42, label %45

42:                                               ; preds = %28
  %43 = load i32, ptr %21, align 4, !tbaa !9
  %44 = sub nsw i32 %43, 1
  store i32 %44, ptr %19, align 4, !tbaa !9
  br label %55

45:                                               ; preds = %28
  %46 = load i32, ptr %22, align 4, !tbaa !9
  %47 = load i32, ptr %18, align 4, !tbaa !9
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %45
  %50 = load i32, ptr %21, align 4, !tbaa !9
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %19, align 4, !tbaa !9
  br label %54

52:                                               ; preds = %45
  %53 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %53, ptr %19, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %52, %49
  br label %55

55:                                               ; preds = %54, %42
  %56 = load i32, ptr %19, align 4, !tbaa !9
  %57 = icmp slt i32 %56, 0
  br i1 %57, label %62, label %58

58:                                               ; preds = %55
  %59 = load i32, ptr %19, align 4, !tbaa !9
  %60 = load i32, ptr %16, align 4, !tbaa !9
  %61 = icmp sge i32 %59, %60
  br i1 %61, label %62, label %67

62:                                               ; preds = %58, %55
  %63 = load ptr, ptr %11, align 8, !tbaa !5
  %64 = load i32, ptr %20, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds float, ptr %63, i64 %65
  store float 0.000000e+00, ptr %66, align 4, !tbaa !11
  br label %83

67:                                               ; preds = %58
  %68 = load ptr, ptr %10, align 8, !tbaa !5
  %69 = load i32, ptr %20, align 4, !tbaa !9
  %70 = load i32, ptr %19, align 4, !tbaa !9
  %71 = load i32, ptr %21, align 4, !tbaa !9
  %72 = sub nsw i32 %70, %71
  %73 = load i32, ptr %14, align 4, !tbaa !9
  %74 = mul nsw i32 %72, %73
  %75 = add nsw i32 %69, %74
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds float, ptr %68, i64 %76
  %78 = load float, ptr %77, align 4, !tbaa !11
  %79 = load ptr, ptr %11, align 8, !tbaa !5
  %80 = load i32, ptr %20, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds float, ptr %79, i64 %81
  store float %78, ptr %82, align 4, !tbaa !11
  br label %83

83:                                               ; preds = %67, %62
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #2
  br label %84

84:                                               ; preds = %83
  %85 = load i32, ptr %20, align 4, !tbaa !9
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %20, align 4, !tbaa !9
  br label %23, !llvm.loop !13

87:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_ZN6paddle4lite4host4math22temporalshiftNCHW_funcIfEEvPKT_PS4_iiiiiii(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #0 {
  %10 = icmp sgt i32 %2, 0
  br i1 %10, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %9
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %26, %9
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader, %26
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %26 ]
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  %12 = srem i32 %11, %3
  %13 = sdiv i32 %12, %4
  %14 = srem i32 %11, %4
  %15 = sdiv i32 %14, %5
  %16 = icmp slt i32 %15, %7
  %17 = icmp slt i32 %15, %8
  %18 = zext i1 %17 to i32
  %.0.v = select i1 %16, i32 -1, i32 %18
  %.0 = add nsw i32 %.0.v, %13
  %19 = icmp sgt i32 %.0, -1
  %.not = icmp slt i32 %.0, %6
  %or.cond = and i1 %19, %.not
  br i1 %or.cond, label %20, label %26

20:                                               ; preds = %.lr.ph
  %21 = mul nsw i32 %.0.v, %4
  %22 = add nsw i32 %21, %11
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds float, ptr %0, i64 %23
  %25 = load float, ptr %24, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %.lr.ph, %20
  %.sink = phi float [ %25, %20 ], [ 0.000000e+00, %.lr.ph ]
  %27 = getelementptr inbounds float, ptr %1, i64 %indvars.iv
  store float %.sink, ptr %27, align 4
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass