; LLVM IR from kazunetakahashi/atcoder :: 2018/0407_ARC094/D.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@A = external dso_local global i64, align 8
@B = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  %7 = load i64, ptr @A, align 8, !tbaa !5
  %8 = load i64, ptr @B, align 8, !tbaa !5
  %9 = mul nsw i64 %7, %8
  store i64 %9, ptr %2, align 8, !tbaa !5
  %10 = load i64, ptr @A, align 8, !tbaa !5
  %11 = load i64, ptr @B, align 8, !tbaa !5
  %12 = icmp sgt i64 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %0
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @A, ptr noundef nonnull align 8 dereferenceable(8) @B) #3
  br label %14

14:                                               ; preds = %13, %0
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %15 = load i64, ptr @B, align 8, !tbaa !5
  store i64 %15, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %16 = load i64, ptr @A, align 8, !tbaa !5
  store i64 %16, ptr %4, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %36, %14
  %18 = load i64, ptr %3, align 8, !tbaa !5
  %19 = load i64, ptr %4, align 8, !tbaa !5
  %20 = sub nsw i64 %18, %19
  %21 = icmp sgt i64 %20, 1
  br i1 %21, label %22, label %37

22:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %23 = load i64, ptr %3, align 8, !tbaa !5
  %24 = load i64, ptr %4, align 8, !tbaa !5
  %25 = add nsw i64 %23, %24
  %26 = sdiv i64 %25, 2
  store i64 %26, ptr %5, align 8, !tbaa !5
  %27 = load i64, ptr %5, align 8, !tbaa !5
  %28 = load i64, ptr %5, align 8, !tbaa !5
  %29 = mul nsw i64 %27, %28
  %30 = load i64, ptr %2, align 8, !tbaa !5
  %31 = icmp slt i64 %29, %30
  br i1 %31, label %32, label %34

32:                                               ; preds = %22
  %33 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %33, ptr %4, align 8, !tbaa !5
  br label %36

34:                                               ; preds = %22
  %35 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %35, ptr %3, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %34, %32
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %17, !llvm.loop !9

37:                                               ; preds = %17
  %38 = load i64, ptr %2, align 8, !tbaa !5
  %39 = load i64, ptr @B, align 8, !tbaa !5
  %40 = add nsw i64 %38, %39
  %41 = load i64, ptr @B, align 8, !tbaa !5
  %42 = add nsw i64 %41, 1
  %43 = sdiv i64 %40, %42
  %44 = load i64, ptr %2, align 8, !tbaa !5
  %45 = load i64, ptr @B, align 8, !tbaa !5
  %46 = add nsw i64 %44, %45
  %47 = sub nsw i64 %46, 1
  %48 = load i64, ptr @B, align 8, !tbaa !5
  %49 = sdiv i64 %47, %48
  %50 = sub nsw i64 %43, %49
  %51 = icmp sge i64 %50, 2
  br i1 %51, label %52, label %57

52:                                               ; preds = %37
  %53 = load i64, ptr %4, align 8, !tbaa !5
  %54 = mul nsw i64 2, %53
  %55 = sub nsw i64 %54, 1
  %56 = trunc i64 %55 to i32
  store i32 %56, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %62

57:                                               ; preds = %37
  %58 = load i64, ptr %4, align 8, !tbaa !5
  %59 = mul nsw i64 2, %58
  %60 = sub nsw i64 %59, 2
  %61 = trunc i64 %60 to i32
  store i32 %61, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %62

62:                                               ; preds = %57, %52
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #3
  %63 = load i32, ptr %1, align 4
  ret i32 %63
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@A = external dso_local global i64, align 8
@B = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i64, ptr @A, align 8, !tbaa !5
  %2 = load i64, ptr @B, align 8, !tbaa !5
  %3 = mul nsw i64 %2, %1
  %4 = icmp sgt i64 %1, %2
  br i1 %4, label %5, label %6

5:                                                ; preds = %0
  tail call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @A, ptr noundef nonnull align 8 dereferenceable(8) @B) #2
  %.pre = load i64, ptr @B, align 8, !tbaa !5
  %.pre20 = load i64, ptr @A, align 8, !tbaa !5
  br label %6

6:                                                ; preds = %5, %0
  %7 = phi i64 [ %.pre20, %5 ], [ %1, %0 ]
  %8 = phi i64 [ %.pre, %5 ], [ %2, %0 ]
  %9 = sub nsw i64 %8, %7
  %10 = icmp sgt i64 %9, 1
  br i1 %10, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %6, %.lr.ph
  %.01419 = phi i64 [ %..014, %.lr.ph ], [ %7, %6 ]
  %.01518 = phi i64 [ %.015., %.lr.ph ], [ %8, %6 ]
  %11 = add nsw i64 %.01419, %.01518
  %12 = sdiv i64 %11, 2
  %13 = mul nsw i64 %12, %12
  %14 = icmp slt i64 %13, %3
  %.015. = select i1 %14, i64 %.01518, i64 %12
  %..014 = select i1 %14, i64 %12, i64 %.01419
  %15 = sub nsw i64 %.015., %..014
  %16 = icmp sgt i64 %15, 1
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %6
  %.014.lcssa = phi i64 [ %7, %6 ], [ %..014, %.lr.ph ]
  %17 = add nsw i64 %8, %3
  %18 = add nsw i64 %8, 1
  %19 = sdiv i64 %17, %18
  %20 = add nsw i64 %17, -1
  %21 = sdiv i64 %20, %8
  %22 = sub nsw i64 %19, %21
  %23 = icmp sgt i64 %22, 1
  %.014.tr17 = trunc i64 %.014.lcssa to i32
  %24 = shl i32 %.014.tr17, 1
  %.0.v = select i1 %23, i32 -1, i32 -2
  %.0 = add i32 %.0.v, %24
  ret i32 %.0
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass