; LLVM IR from kazunetakahashi/atcoder :: 201510_201609/0723_ARC058 (E)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z5powerxx(i64 noundef, i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5retsuxx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @_Z4initv()
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %13 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %13, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %15 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %14, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %16 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %15, ptr noundef nonnull align 8 dereferenceable(8) %5)
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  store i64 0, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %98, %0
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = load i64, ptr %3, align 8, !tbaa !5
  %21 = icmp sle i64 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %17
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %101

23:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %94, %23
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = load i64, ptr %4, align 8, !tbaa !5
  %28 = icmp sle i64 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %24
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %97

30:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %90, %30
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = icmp sle i64 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %31
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %93

37:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %38 = load i64, ptr %2, align 8, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = add nsw i32 %39, %40
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = add nsw i32 %41, %42
  %44 = sext i32 %43 to i64
  %45 = sub nsw i64 %38, %44
  store i64 %45, ptr %11, align 8, !tbaa !5
  %46 = load i64, ptr %11, align 8, !tbaa !5
  %47 = icmp slt i64 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %37
  store i32 10, ptr %8, align 4
  br label %87

49:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = load i64, ptr %3, align 8, !tbaa !5
  %53 = call noundef i64 @_Z5retsuxx(i64 noundef %51, i64 noundef %52)
  store i64 %53, ptr %12, align 8, !tbaa !5
  %54 = load i64, ptr %12, align 8, !tbaa !5
  %55 = srem i64 %54, 1000000007
  store i64 %55, ptr %12, align 8, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = load i64, ptr %4, align 8, !tbaa !5
  %59 = call noundef i64 @_Z5retsuxx(i64 noundef %57, i64 noundef %58)
  %60 = load i64, ptr %12, align 8, !tbaa !5
  %61 = mul nsw i64 %60, %59
  store i64 %61, ptr %12, align 8, !tbaa !5
  %62 = load i64, ptr %12, align 8, !tbaa !5
  %63 = srem i64 %62, 1000000007
  store i64 %63, ptr %12, align 8, !tbaa !5
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = load i64, ptr %5, align 8, !tbaa !5
  %67 = call noundef i64 @_Z5retsuxx(i64 noundef %65, i64 noundef %66)
  %68 = load i64, ptr %12, align 8, !tbaa !5
  %69 = mul nsw i64 %68, %67
  store i64 %69, ptr %12, align 8, !tbaa !5
  %70 = load i64, ptr %12, align 8, !tbaa !5
  %71 = srem i64 %70, 1000000007
  store i64 %71, ptr %12, align 8, !tbaa !5
  %72 = load i64, ptr %11, align 8, !tbaa !5
  %73 = call noundef i64 @_Z5powerxx(i64 noundef 10, i64 noundef %72)
  %74 = load i64, ptr %11, align 8, !tbaa !5
  %75 = add nsw i64 %74, 1
  %76 = mul nsw i64 %73, %75
  %77 = srem i64 %76, 1000000007
  %78 = load i64, ptr %12, align 8, !tbaa !5
  %79 = mul nsw i64 %78, %77
  store i64 %79, ptr %12, align 8, !tbaa !5
  %80 = load i64, ptr %12, align 8, !tbaa !5
  %81 = srem i64 %80, 1000000007
  store i64 %81, ptr %12, align 8, !tbaa !5
  %82 = load i64, ptr %12, align 8, !tbaa !5
  %83 = load i64, ptr %6, align 8, !tbaa !5
  %84 = add nsw i64 %83, %82
  store i64 %84, ptr %6, align 8, !tbaa !5
  %85 = load i64, ptr %6, align 8, !tbaa !5
  %86 = srem i64 %85, 1000000007
  store i64 %86, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  store i32 0, ptr %8, align 4
  br label %87

87:                                               ; preds = %49, %48
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  %88 = load i32, ptr %8, align 4
  switch i32 %88, label %106 [
    i32 0, label %89
    i32 10, label %90
  ]

89:                                               ; preds = %87
  br label %90

90:                                               ; preds = %89, %87
  %91 = load i32, ptr %10, align 4, !tbaa !9
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %10, align 4, !tbaa !9
  br label %31, !llvm.loop !11

93:                                               ; preds = %36
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %9, align 4, !tbaa !9
  br label %24, !llvm.loop !13

97:                                               ; preds = %29
  br label %98

98:                                               ; preds = %97
  %99 = load i32, ptr %7, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %7, align 4, !tbaa !9
  br label %17, !llvm.loop !14

101:                                              ; preds = %22
  %102 = load i64, ptr %6, align 8, !tbaa !5
  %103 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %102)
  %104 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %103, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  %105 = load i32, ptr %1, align 4
  ret i32 %105

106:                                              ; preds = %87
  unreachable
}

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z5powerxx(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5retsuxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  tail call void @_Z4initv()
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %5 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %6, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %.not45 = icmp slt i64 %9, 1
  %10 = load i64, ptr %3, align 8
  %11 = icmp slt i64 %10, 1
  %or.cond = select i1 %.not45, i1 true, i1 %11
  br i1 %or.cond, label %._crit_edge48, label %.preheader36

.preheader36:                                     ; preds = %0, %._crit_edge43
  %12 = phi i64 [ %23, %._crit_edge43 ], [ %9, %0 ]
  %13 = phi i64 [ %24, %._crit_edge43 ], [ %10, %0 ]
  %14 = phi i64 [ %25, %._crit_edge43 ], [ %10, %0 ]
  %indvars.iv60 = phi i64 [ %indvars.iv.next61, %._crit_edge43 ], [ 1, %0 ]
  %.047 = phi i64 [ %.1.lcssa, %._crit_edge43 ], [ 0, %0 ]
  %.not3440 = icmp slt i64 %14, 1
  %15 = load i64, ptr %4, align 8
  %16 = icmp slt i64 %15, 1
  %or.cond71 = select i1 %.not3440, i1 true, i1 %16
  br i1 %or.cond71, label %._crit_edge43, label %.preheader

._crit_edge48:                                    ; preds = %._crit_edge43, %0
  %.0.lcssa = phi i64 [ 0, %0 ], [ %.1.lcssa, %._crit_edge43 ]
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %.0.lcssa)
  %18 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  ret i32 0

.preheader:                                       ; preds = %.preheader36, %._crit_edge
  %19 = phi i64 [ %26, %._crit_edge ], [ %13, %.preheader36 ]
  %20 = phi i64 [ %27, %._crit_edge ], [ %15, %.preheader36 ]
  %21 = phi i64 [ %28, %._crit_edge ], [ %15, %.preheader36 ]
  %indvars.iv54 = phi i64 [ %indvars.iv.next55, %._crit_edge ], [ 1, %.preheader36 ]
  %.142 = phi i64 [ %.2.lcssa, %._crit_edge ], [ %.047, %.preheader36 ]
  %.not3537 = icmp slt i64 %21, 1
  br i1 %.not3537, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %22 = add nuw nsw i64 %indvars.iv54, %indvars.iv60
  br label %29

._crit_edge43.loopexit51:                         ; preds = %._crit_edge
  %.pre67 = load i64, ptr %2, align 8, !tbaa !5
  br label %._crit_edge43

._crit_edge43:                                    ; preds = %._crit_edge43.loopexit51, %.preheader36
  %23 = phi i64 [ %12, %.preheader36 ], [ %.pre67, %._crit_edge43.loopexit51 ]
  %24 = phi i64 [ %13, %.preheader36 ], [ %26, %._crit_edge43.loopexit51 ]
  %25 = phi i64 [ %14, %.preheader36 ], [ %26, %._crit_edge43.loopexit51 ]
  %.1.lcssa = phi i64 [ %.047, %.preheader36 ], [ %.2.lcssa, %._crit_edge43.loopexit51 ]
  %indvars.iv.next61 = add nuw nsw i64 %indvars.iv60, 1
  %.not.not = icmp sgt i64 %23, %indvars.iv60
  br i1 %.not.not, label %.preheader36, label %._crit_edge48, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %55
  %.pre66 = load i64, ptr %3, align 8, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %26 = phi i64 [ %19, %.preheader ], [ %.pre66, %._crit_edge.loopexit ]
  %27 = phi i64 [ %20, %.preheader ], [ %56, %._crit_edge.loopexit ]
  %28 = phi i64 [ %21, %.preheader ], [ %56, %._crit_edge.loopexit ]
  %.2.lcssa = phi i64 [ %.142, %.preheader ], [ %.3, %._crit_edge.loopexit ]
  %indvars.iv.next55 = add nuw nsw i64 %indvars.iv54, 1
  %.not34.not = icmp sgt i64 %26, %indvars.iv54
  br i1 %.not34.not, label %.preheader, label %._crit_edge43.loopexit51, !llvm.loop !12

29:                                               ; preds = %.lr.ph, %55
  %30 = phi i64 [ %20, %.lr.ph ], [ %56, %55 ]
  %indvars.iv = phi i64 [ 1, %.lr.ph ], [ %indvars.iv.next, %55 ]
  %.239 = phi i64 [ %.142, %.lr.ph ], [ %.3, %55 ]
  %31 = load i64, ptr %1, align 8, !tbaa !5
  %32 = add nuw nsw i64 %22, %indvars.iv
  %33 = sub nsw i64 %31, %32
  %34 = icmp slt i64 %33, 0
  br i1 %34, label %55, label %35

35:                                               ; preds = %29
  %36 = load i64, ptr %2, align 8, !tbaa !5
  %37 = call noundef i64 @_Z5retsuxx(i64 noundef %indvars.iv60, i64 noundef %36)
  %38 = srem i64 %37, 1000000007
  %39 = load i64, ptr %3, align 8, !tbaa !5
  %40 = call noundef i64 @_Z5retsuxx(i64 noundef %indvars.iv54, i64 noundef %39)
  %41 = mul nsw i64 %40, %38
  %42 = srem i64 %41, 1000000007
  %43 = load i64, ptr %4, align 8, !tbaa !5
  %44 = call noundef i64 @_Z5retsuxx(i64 noundef %indvars.iv, i64 noundef %43)
  %45 = mul nsw i64 %42, %44
  %46 = srem i64 %45, 1000000007
  %47 = call noundef i64 @_Z5powerxx(i64 noundef 10, i64 noundef %33)
  %48 = add nuw nsw i64 %33, 1
  %49 = mul nsw i64 %47, %48
  %50 = srem i64 %49, 1000000007
  %51 = mul nsw i64 %50, %46
  %52 = srem i64 %51, 1000000007
  %53 = add nsw i64 %52, %.239
  %54 = srem i64 %53, 1000000007
  %.pre = load i64, ptr %4, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %29, %35
  %56 = phi i64 [ %.pre, %35 ], [ %30, %29 ]
  %.3 = phi i64 [ %54, %35 ], [ %.239, %29 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not35.not = icmp sgt i64 %56, %indvars.iv
  br i1 %.not35.not, label %29, label %._crit_edge.loopexit, !llvm.loop !13
}

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10, !11}
!13 = distinct !{!13, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass