; LLVM IR from rdguez-mariano/fast_imas_IPOL :: libSimuTilts/frot.ll (Z4frotRKSt6vectorIfSaIfEERS1_iiPiS5_PfS6_Pc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4frotRKSt6vectorIfSaIfEERS1_iiPiS5_PfS6_Pc(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8) #0 personality ptr @__gxx_personality_v0 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca float, align 4
  %25 = alloca float, align 4
  %26 = alloca float, align 4
  %27 = alloca float, align 4
  %28 = alloca float, align 4
  %29 = alloca float, align 4
  %30 = alloca float, align 4
  %31 = alloca float, align 4
  %32 = alloca float, align 4
  %33 = alloca float, align 4
  %34 = alloca float, align 4
  %35 = alloca float, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca i32, align 4
  %43 = alloca i32, align 4
  %44 = alloca i32, align 4
  %45 = alloca i32, align 4
  %46 = alloca %"class.std::vector", align 8
  %47 = alloca %"class.std::allocator", align 1
  %48 = alloca ptr, align 8
  %49 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store i32 %2, ptr %12, align 4, !tbaa !9
  store i32 %3, ptr %13, align 4, !tbaa !9
  store ptr %4, ptr %14, align 8, !tbaa !5
  store ptr %5, ptr %15, align 8, !tbaa !5
  store ptr %6, ptr %16, align 8, !tbaa !5
  store ptr %7, ptr %17, align 8, !tbaa !5
  store ptr %8, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %42) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %43) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %44) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %45) #6
  %50 = load ptr, ptr %16, align 8, !tbaa !5
  %51 = load float, ptr %50, align 4, !tbaa !11
  %52 = fpext float %51 to double
  %53 = fmul double %52, 0x400921FB54442D18
  %54 = fdiv double %53, 1.800000e+02
  %55 = call double @cos(double noundef %54) #6
  %56 = fptrunc double %55 to float
  store float %56, ptr %24, align 4, !tbaa !11
  %57 = load ptr, ptr %16, align 8, !tbaa !5
  %58 = load float, ptr %57, align 4, !tbaa !11
  %59 = fpext float %58 to double
  %60 = fmul double %59, 0x400921FB54442D18
  %61 = fdiv double %60, 1.800000e+02
  %62 = call double @sin(double noundef %61) #6
  %63 = fptrunc double %62 to float
  store float %63, ptr %25, align 4, !tbaa !11
  %64 = load ptr, ptr %18, align 8, !tbaa !5
  %65 = icmp ne ptr %64, null
  br i1 %65, label %66, label %104

66:                                               ; preds = %9
  store i32 0, ptr %42, align 4, !tbaa !9
  store i32 0, ptr %40, align 4, !tbaa !9
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = sub nsw i32 %67, 1
  store i32 %68, ptr %41, align 4, !tbaa !9
  %69 = load i32, ptr %13, align 4, !tbaa !9
  %70 = sub nsw i32 %69, 1
  store i32 %70, ptr %43, align 4, !tbaa !9
  %71 = load i32, ptr %12, align 4, !tbaa !9
  %72 = sub nsw i32 %71, 1
  %73 = sitofp i32 %72 to float
  %74 = fpext float %73 to double
  %75 = load float, ptr %24, align 4, !tbaa !11
  %76 = fpext float %75 to double
  %77 = fsub double 1.000000e+00, %76
  %78 = load i32, ptr %13, align 4, !tbaa !9
  %79 = sub nsw i32 %78, 1
  %80 = sitofp i32 %79 to float
  %81 = load float, ptr %25, align 4, !tbaa !11
  %82 = fmul float %80, %81
  %83 = fpext float %82 to double
  %84 = call double @llvm.fmuladd.f64(double %74, double %77, double %83)
  %85 = fmul double 5.000000e-01, %84
  %86 = fptrunc double %85 to float
  store float %86, ptr %34, align 4, !tbaa !11
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = sub nsw i32 %87, 1
  %89 = sitofp i32 %88 to float
  %90 = fpext float %89 to double
  %91 = load float, ptr %24, align 4, !tbaa !11
  %92 = fpext float %91 to double
  %93 = fsub double 1.000000e+00, %92
  %94 = load i32, ptr %12, align 4, !tbaa !9
  %95 = sub nsw i32 %94, 1
  %96 = sitofp i32 %95 to float
  %97 = load float, ptr %25, align 4, !tbaa !11
  %98 = fmul float %96, %97
  %99 = fpext float %98 to double
  %100 = fneg double %99
  %101 = call double @llvm.fmuladd.f64(double %90, double %93, double %100)
  %102 = fmul double 5.000000e-01, %101
  %103 = fptrunc double %102 to float
  store float %103, ptr %35, align 4, !tbaa !11
  br label %119

104:                                              ; preds = %9
  store i32 0, ptr %43, align 4, !tbaa !9
  store i32 0, ptr %42, align 4, !tbaa !9
  store i32 0, ptr %41, align 4, !tbaa !9
  store i32 0, ptr %40, align 4, !tbaa !9
  %105 = load i32, ptr %12, align 4, !tbaa !9
  %106 = sub nsw i32 %105, 1
  %107 = load float, ptr %24, align 4, !tbaa !11
  %108 = load float, ptr %25, align 4, !tbaa !11
  call void @_Z5boundiiffPiS_S_S_(i32 noundef %106, i32 noundef 0, float noundef %107, float noundef %108, ptr noundef %40, ptr noundef %41, ptr noundef %42, ptr noundef %43)
  %109 = load i32, ptr %13, align 4, !tbaa !9
  %110 = sub nsw i32 %109, 1
  %111 = load float, ptr %24, align 4, !tbaa !11
  %112 = load float, ptr %25, align 4, !tbaa !11
  call void @_Z5boundiiffPiS_S_S_(i32 noundef 0, i32 noundef %110, float noundef %111, float noundef %112, ptr noundef %40, ptr noundef %41, ptr noundef %42, ptr noundef %43)
  %113 = load i32, ptr %12, align 4, !tbaa !9
  %114 = sub nsw i32 %113, 1
  %115 = load i32, ptr %13, align 4, !tbaa !9
  %116 = sub nsw i32 %115, 1
  %117 = load float, ptr %24, align 4, !tbaa !11
  %118 = load float, ptr %25, align 4, !tbaa !11
  call void @_Z5boundiiffPiS_S_S_(i32 noundef %114, i32 noundef %116, float noundef %117, float noundef %118, ptr noundef %40, ptr noundef %41, ptr noundef %42, ptr noundef %43)
  store float 0.000000e+00, ptr %35, align 4, !tbaa !11
  store float 0.000000e+00, ptr %34, align 4, !tbaa !11
  br label %119

119:                                              ; preds = %104, %66
  %120 = load i32, ptr %41, align 4, !tbaa !9
  %121 = load i32, ptr %40, align 4, !tbaa !9
  %122 = sub nsw i32 %120, %121
  %123 = add nsw i32 %122, 1
  store i32 %123, ptr %44, align 4, !tbaa !9
  %124 = load i32, ptr %43, align 4, !tbaa !9
  %125 = load i32, ptr %42, align 4, !tbaa !9
  %126 = sub nsw i32 %124, %125
  %127 = add nsw i32 %126, 1
  store i32 %127, ptr %45, align 4, !tbaa !9
  %128 = load i32, ptr %44, align 4, !tbaa !9
  %129 = load ptr, ptr %14, align 8, !tbaa !5
  store i32 %128, ptr %129, align 4, !tbaa !9
  %130 = load i32, ptr %45, align 4, !tbaa !9
  %131 = load ptr, ptr %15, align 8, !tbaa !5
  store i32 %130, ptr %131, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %46) #6
  %132 = load i32, ptr %44, align 4, !tbaa !9
  %133 = load i32, ptr %45, align 4, !tbaa !9
  %134 = mul nsw i32 %132, %133
  %135 = sext i32 %134 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %47) #6
  call void @_ZNSaIfEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %47) #6
  invoke void @_ZNSt6vectorIfSaIfEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %135, ptr noundef nonnull align 1 dereferenceable(1) %47)
          to label %136 unwind label %344

136:                                              ; preds = %119
  %137 = load ptr, ptr %11, align 8, !tbaa !5
  %138 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIfSaIfEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %137, ptr noundef nonnull align 8 dereferenceable(24) %46) #6
  call void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %46) #6
  call void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %47) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %47) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %46) #6
  %139 = load i32, ptr %40, align 4, !tbaa !9
  store i32 %139, ptr %19, align 4, !tbaa !9
  br label %140

140:                                              ; preds = %349, %136
  %141 = load i32, ptr %19, align 4, !tbaa !9
  %142 = load i32, ptr %41, align 4, !tbaa !9
  %143 = icmp sle i32 %141, %142
  br i1 %143, label %144, label %352

144:                                              ; preds = %140
  %145 = load i32, ptr %42, align 4, !tbaa !9
  store i32 %145, ptr %20, align 4, !tbaa !9
  br label %146

146:                                              ; preds = %341, %144
  %147 = load i32, ptr %20, align 4, !tbaa !9
  %148 = load i32, ptr %43, align 4, !tbaa !9
  %149 = icmp sle i32 %147, %148
  br i1 %149, label %150, label %348

150:                                              ; preds = %146
  %151 = load float, ptr %24, align 4, !tbaa !11
  %152 = load i32, ptr %19, align 4, !tbaa !9
  %153 = sitofp i32 %152 to float
  %154 = load float, ptr %25, align 4, !tbaa !11
  %155 = load i32, ptr %20, align 4, !tbaa !9
  %156 = sitofp i32 %155 to float
  %157 = fmul float %154, %156
  %158 = fneg float %157
  %159 = call float @llvm.fmuladd.f32(float %151, float %153, float %158)
  %160 = load float, ptr %34, align 4, !tbaa !11
  %161 = fadd float %159, %160
  store float %161, ptr %26, align 4, !tbaa !11
  %162 = load float, ptr %25, align 4, !tbaa !11
  %163 = load i32, ptr %19, align 4, !tbaa !9
  %164 = sitofp i32 %163 to float
  %165 = load float, ptr %24, align 4, !tbaa !11
  %166 = load i32, ptr %20, align 4, !tbaa !9
  %167 = sitofp i32 %166 to float
  %168 = fmul float %165, %167
  %169 = call float @llvm.fmuladd.f32(float %162, float %164, float %168)
  %170 = load float, ptr %35, align 4, !tbaa !11
  %171 = fadd float %169, %170
  store float %171, ptr %27, align 4, !tbaa !11
  %172 = load float, ptr %26, align 4, !tbaa !11
  %173 = call noundef float @_ZSt5floorf(float noundef %172)
  %174 = fptosi float %173 to i32
  store i32 %174, ptr %21, align 4, !tbaa !9
  %175 = load float, ptr %27, align 4, !tbaa !11
  %176 = call noundef float @_ZSt5floorf(float noundef %175)
  %177 = fptosi float %176 to i32
  store i32 %177, ptr %22, align 4, !tbaa !9
  %178 = load float, ptr %26, align 4, !tbaa !11
  %179 = load i32, ptr %21, align 4, !tbaa !9
  %180 = sitofp i32 %179 to float
  %181 = fsub float %178, %180
  store float %181, ptr %32, align 4, !tbaa !11
  %182 = load float, ptr %27, align 4, !tbaa !11
  %183 = load i32, ptr %22, align 4, !tbaa !9
  %184 = sitofp i32 %183 to float
  %185 = fsub float %182, %184
  store float %185, ptr %33, align 4, !tbaa !11
  %186 = load i32, ptr %22, align 4, !tbaa !9
  %187 = load i32, ptr %12, align 4, !tbaa !9
  %188 = mul nsw i32 %186, %187
  %189 = load i32, ptr %21, align 4, !tbaa !9
  %190 = add nsw i32 %188, %189
  store i32 %190, ptr %23, align 4, !tbaa !9
  %191 = load i32, ptr %21, align 4, !tbaa !9
  %192 = icmp sge i32 %191, 0
  br i1 %192, label %193, label %197

193:                                              ; preds = %150
  %194 = load i32, ptr %21, align 4, !tbaa !9
  %195 = load i32, ptr %12, align 4, !tbaa !9
  %196 = icmp slt i32 %194, %195
  br label %197

197:                                              ; preds = %193, %150
  %198 = phi i1 [ false, %150 ], [ %196, %193 ]
  %199 = zext i1 %198 to i32
  store i32 %199, ptr %36, align 4, !tbaa !9
  %200 = load i32, ptr %21, align 4, !tbaa !9
  %201 = add nsw i32 %200, 1
  %202 = icmp sge i32 %201, 0
  br i1 %202, label %203, label %208

203:                                              ; preds = %197
  %204 = load i32, ptr %21, align 4, !tbaa !9
  %205 = add nsw i32 %204, 1
  %206 = load i32, ptr %12, align 4, !tbaa !9
  %207 = icmp slt i32 %205, %206
  br label %208

208:                                              ; preds = %203, %197
  %209 = phi i1 [ false, %197 ], [ %207, %203 ]
  %210 = zext i1 %209 to i32
  store i32 %210, ptr %38, align 4, !tbaa !9
  %211 = load i32, ptr %22, align 4, !tbaa !9
  %212 = icmp sge i32 %211, 0
  br i1 %212, label %213, label %217

213:                                              ; preds = %208
  %214 = load i32, ptr %22, align 4, !tbaa !9
  %215 = load i32, ptr %13, align 4, !tbaa !9
  %216 = icmp slt i32 %214, %215
  br label %217

217:                                              ; preds = %213, %208
  %218 = phi i1 [ false, %208 ], [ %216, %213 ]
  %219 = zext i1 %218 to i32
  store i32 %219, ptr %37, align 4, !tbaa !9
  %220 = load i32, ptr %22, align 4, !tbaa !9
  %221 = add nsw i32 %220, 1
  %222 = icmp sge i32 %221, 0
  br i1 %222, label %223, label %228

223:                                              ; preds = %217
  %224 = load i32, ptr %22, align 4, !tbaa !9
  %225 = add nsw i32 %224, 1
  %226 = load i32, ptr %13, align 4, !tbaa !9
  %227 = icmp slt i32 %225, %226
  br label %228

228:                                              ; preds = %223, %217
  %229 = phi i1 [ false, %217 ], [ %227, %223 ]
  %230 = zext i1 %229 to i32
  store i32 %230, ptr %39, align 4, !tbaa !9
  %231 = load i32, ptr %36, align 4, !tbaa !9
  %232 = icmp ne i32 %231, 0
  br i1 %232, label %233, label %242

233:                                              ; preds = %228
  %234 = load i32, ptr %37, align 4, !tbaa !9
  %235 = icmp ne i32 %234, 0
  br i1 %235, label %236, label %242

236:                                              ; preds = %233
  %237 = load ptr, ptr %10, align 8, !tbaa !5
  %238 = load i32, ptr %23, align 4, !tbaa !9
  %239 = sext i32 %238 to i64
  %240 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %237, i64 noundef %239) #6
  %241 = load float, ptr %240, align 4, !tbaa !11
  br label %245

242:                                              ; preds = %233, %228
  %243 = load ptr, ptr %17, align 8, !tbaa !5
  %244 = load float, ptr %243, align 4, !tbaa !11
  br label %245

245:                                              ; preds = %242, %236
  %246 = phi float [ %241, %236 ], [ %244, %242 ]
  store float %246, ptr %28, align 4, !tbaa !11
  %247 = load i32, ptr %36, align 4, !tbaa !9
  %248 = icmp ne i32 %247, 0
  br i1 %248, label %249, label %260

249:                                              ; preds = %245
  %250 = load i32, ptr %39, align 4, !tbaa !9
  %251 = icmp ne i32 %250, 0
  br i1 %251, label %252, label %260

252:                                              ; preds = %249
  %253 = load ptr, ptr %10, align 8, !tbaa !5
  %254 = load i32, ptr %23, align 4, !tbaa !9
  %255 = load i32, ptr %12, align 4, !tbaa !9
  %256 = add nsw i32 %254, %255
  %257 = sext i32 %256 to i64
  %258 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %253, i64 noundef %257) #6
  %259 = load float, ptr %258, align 4, !tbaa !11
  br label %263

260:                                              ; preds = %249, %245
  %261 = load ptr, ptr %17, align 8, !tbaa !5
  %262 = load float, ptr %261, align 4, !tbaa !11
  br label %263

263:                                              ; preds = %260, %252
  %264 = phi float [ %259, %252 ], [ %262, %260 ]
  store float %264, ptr %29, align 4, !tbaa !11
  %265 = load i32, ptr %38, align 4, !tbaa !9
  %266 = icmp ne i32 %265, 0
  br i1 %266, label %267, label %277

267:                                              ; preds = %263
  %268 = load i32, ptr %37, align 4, !tbaa !9
  %269 = icmp ne i32 %268, 0
  br i1 %269, label %270, label %277

270:                                              ; preds = %267
  %271 = load ptr, ptr %10, align 8, !tbaa !5
  %272 = load i32, ptr %23, align 4, !tbaa !9
  %273 = add nsw i32 %272, 1
  %274 = sext i32 %273 to i64
  %275 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %271, i64 noundef %274) #6
  %276 = load float, ptr %275, align 4, !tbaa !11
  br label %280

277:                                              ; preds = %267, %263
  %278 = load ptr, ptr %17, align 8, !tbaa !5
  %279 = load float, ptr %278, align 4, !tbaa !11
  br label %280

280:                                              ; preds = %277, %270
  %281 = phi float [ %276, %270 ], [ %279, %277 ]
  store float %281, ptr %30, align 4, !tbaa !11
  %282 = load i32, ptr %38, align 4, !tbaa !9
  %283 = icmp ne i32 %282, 0
  br i1 %283, label %284, label %296

284:                                              ; preds = %280
  %285 = load i32, ptr %39, align 4, !tbaa !9
  %286 = icmp ne i32 %285, 0
  br i1 %286, label %287, label %296

287:                                              ; preds = %284
  %288 = load ptr, ptr %10, align 8, !tbaa !5
  %289 = load i32, ptr %23, align 4, !tbaa !9
  %290 = load i32, ptr %12, align 4, !tbaa !9
  %291 = add nsw i32 %289, %290
  %292 = add nsw i32 %291, 1
  %293 = sext i32 %292 to i64
  %294 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %288, i64 noundef %293) #6
  %295 = load float, ptr %294, align 4, !tbaa !11
  br label %299

296:                                              ; preds = %284, %280
  %297 = load ptr, ptr %17, align 8, !tbaa !5
  %298 = load float, ptr %297, align 4, !tbaa !11
  br label %299

299:                                              ; preds = %296, %287
  %300 = phi float [ %295, %287 ], [ %298, %296 ]
  store float %300, ptr %31, align 4, !tbaa !11
  %301 = load float, ptr %33, align 4, !tbaa !11
  %302 = fpext float %301 to double
  %303 = fsub double 1.000000e+00, %302
  %304 = load float, ptr %32, align 4, !tbaa !11
  %305 = fpext float %304 to double
  %306 = fsub double 1.000000e+00, %305
  %307 = load float, ptr %28, align 4, !tbaa !11
  %308 = fpext float %307 to double
  %309 = load float, ptr %32, align 4, !tbaa !11
  %310 = load float, ptr %30, align 4, !tbaa !11
  %311 = fmul float %309, %310
  %312 = fpext float %311 to double
  %313 = call double @llvm.fmuladd.f64(double %306, double %308, double %312)
  %314 = load float, ptr %33, align 4, !tbaa !11
  %315 = fpext float %314 to double
  %316 = load float, ptr %32, align 4, !tbaa !11
  %317 = fpext float %316 to double
  %318 = fsub double 1.000000e+00, %317
  %319 = load float, ptr %29, align 4, !tbaa !11
  %320 = fpext float %319 to double
  %321 = load float, ptr %32, align 4, !tbaa !11
  %322 = load float, ptr %31, align 4, !tbaa !11
  %323 = fmul float %321, %322
  %324 = fpext float %323 to double
  %325 = call double @llvm.fmuladd.f64(double %318, double %320, double %324)
  %326 = fmul double %315, %325
  %327 = call double @llvm.fmuladd.f64(double %303, double %313, double %326)
  %328 = fptrunc double %327 to float
  %329 = load ptr, ptr %11, align 8, !tbaa !5
  %330 = load i32, ptr %20, align 4, !tbaa !9
  %331 = load i32, ptr %42, align 4, !tbaa !9
  %332 = sub nsw i32 %330, %331
  %333 = load i32, ptr %44, align 4, !tbaa !9
  %334 = mul nsw i32 %332, %333
  %335 = load i32, ptr %19, align 4, !tbaa !9
  %336 = add nsw i32 %334, %335
  %337 = load i32, ptr %40, align 4, !tbaa !9
  %338 = sub nsw i32 %336, %337
  %339 = sext i32 %338 to i64
  %340 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %329, i64 noundef %339) #6
  store float %328, ptr %340, align 4, !tbaa !11
  br label %341

341:                                              ; preds = %299
  %342 = load i32, ptr %20, align 4, !tbaa !9
  %343 = add nsw i32 %342, 1
  store i32 %343, ptr %20, align 4, !tbaa !9
  br label %146, !llvm.loop !13

344:                                              ; preds = %119
  %345 = landingpad { ptr, i32 }
          cleanup
  %346 = extractvalue { ptr, i32 } %345, 0
  store ptr %346, ptr %48, align 8
  %347 = extractvalue { ptr, i32 } %345, 1
  store i32 %347, ptr %49, align 4
  call void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %47) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %47) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %46) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %45) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %44) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %43) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %42) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  br label %353

348:                                              ; preds = %146
  br label %349

349:                                              ; preds = %348
  %350 = load i32, ptr %19, align 4, !tbaa !9
  %351 = add nsw i32 %350, 1
  store i32 %351, ptr %19, align 4, !tbaa !9
  br label %140, !llvm.loop !15

352:                                              ; preds = %140
  call void @llvm.lifetime.end.p0(i64 4, ptr %45) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %44) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %43) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %42) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  ret void

353:                                              ; preds = %344
  %354 = load ptr, ptr %48, align 8
  %355 = load i32, ptr %49, align 4
  %356 = insertvalue { ptr, i32 } poison, ptr %354, 0
  %357 = insertvalue { ptr, i32 } %356, i32 %355, 1
  resume { ptr, i32 } %357
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare double @cos(double noundef) #2

; Function Attrs: nounwind
declare double @sin(double noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5boundiiffPiS_S_S_(i32 noundef, i32 noundef, float noundef, float noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIfEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIfSaIfEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5floorf(float noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4frotRKSt6vectorIfSaIfEERS1_iiPiS5_PfS6_Pc(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readonly %7, ptr noundef readnone %8) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"class.std::vector", align 8
  %15 = alloca %"class.std::allocator", align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %13) #7
  %16 = load float, ptr %6, align 4, !tbaa !5
  %17 = fpext float %16 to double
  %18 = fmul double %17, 0x400921FB54442D18
  %19 = fdiv double %18, 1.800000e+02
  %20 = tail call double @cos(double noundef %19) #7
  %21 = fptrunc double %20 to float
  %22 = load float, ptr %6, align 4, !tbaa !5
  %23 = fpext float %22 to double
  %24 = fmul double %23, 0x400921FB54442D18
  %25 = fdiv double %24, 1.800000e+02
  %26 = tail call double @sin(double noundef %25) #7
  %27 = fptrunc double %26 to float
  %.not = icmp eq ptr %8, null
  br i1 %.not, label %52, label %28

28:                                               ; preds = %9
  store i32 0, ptr %12, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  %29 = insertelement <2 x i32> poison, i32 %3, i64 0
  %30 = insertelement <2 x i32> %29, i32 %2, i64 1
  %31 = add nsw <2 x i32> %30, <i32 -1, i32 -1>
  %32 = extractelement <2 x i32> %31, i64 1
  store i32 %32, ptr %11, align 4, !tbaa !9
  %33 = extractelement <2 x i32> %31, i64 0
  store i32 %33, ptr %13, align 4, !tbaa !9
  %34 = fpext float %21 to double
  %35 = fsub double 1.000000e+00, %34
  %36 = sitofp <2 x i32> %31 to <2 x float>
  %37 = extractelement <2 x float> %36, i64 0
  %38 = fmul float %37, %27
  %39 = fpext float %38 to double
  %40 = fpext <2 x float> %36 to <2 x double>
  %41 = extractelement <2 x float> %36, i64 1
  %42 = fmul float %41, %27
  %43 = fpext float %42 to double
  %44 = fneg double %43
  %45 = insertelement <2 x double> poison, double %35, i64 0
  %46 = shufflevector <2 x double> %45, <2 x double> poison, <2 x i32> zeroinitializer
  %47 = insertelement <2 x double> poison, double %44, i64 0
  %48 = insertelement <2 x double> %47, double %39, i64 1
  %49 = tail call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %40, <2 x double> %46, <2 x double> %48)
  %50 = fmul <2 x double> %49, <double 5.000000e-01, double 5.000000e-01>
  %51 = fptrunc <2 x double> %50 to <2 x float>
  br label %55

52:                                               ; preds = %9
  store i32 0, ptr %13, align 4, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !9
  store i32 0, ptr %11, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  %53 = add nsw i32 %2, -1
  call void @_Z5boundiiffPiS_S_S_(i32 noundef %53, i32 noundef 0, float noundef %21, float noundef %27, ptr noundef nonnull %10, ptr noundef nonnull %11, ptr noundef nonnull %12, ptr noundef nonnull %13)
  %54 = add nsw i32 %3, -1
  call void @_Z5boundiiffPiS_S_S_(i32 noundef 0, i32 noundef %54, float noundef %21, float noundef %27, ptr noundef nonnull %10, ptr noundef nonnull %11, ptr noundef nonnull %12, ptr noundef nonnull %13)
  call void @_Z5boundiiffPiS_S_S_(i32 noundef %53, i32 noundef %54, float noundef %21, float noundef %27, ptr noundef nonnull %10, ptr noundef nonnull %11, ptr noundef nonnull %12, ptr noundef nonnull %13)
  %.pre = load i32, ptr %11, align 4, !tbaa !9
  %.pre126 = load i32, ptr %10, align 4, !tbaa !9
  %.pre127 = load i32, ptr %13, align 4, !tbaa !9
  %.pre128 = load i32, ptr %12, align 4, !tbaa !9
  br label %55

55:                                               ; preds = %52, %28
  %56 = phi i32 [ 0, %28 ], [ %.pre128, %52 ]
  %57 = phi i32 [ %33, %28 ], [ %.pre127, %52 ]
  %58 = phi i32 [ 0, %28 ], [ %.pre126, %52 ]
  %59 = phi i32 [ %32, %28 ], [ %.pre, %52 ]
  %60 = phi <2 x float> [ %51, %28 ], [ zeroinitializer, %52 ]
  %61 = sub nsw i32 %59, %58
  %62 = add nsw i32 %61, 1
  %63 = sub nsw i32 %57, %56
  %64 = add nsw i32 %63, 1
  store i32 %62, ptr %4, align 4, !tbaa !9
  store i32 %64, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %14) #7
  %65 = mul nsw i32 %64, %62
  %66 = sext i32 %65 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %15) #7
  call void @_ZNSaIfEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #7
  invoke void @_ZNSt6vectorIfSaIfEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %66, ptr noundef nonnull align 1 dereferenceable(1) %15)
          to label %67 unwind label %162

67:                                               ; preds = %55
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIfSaIfEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %14) #7
  call void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #7
  call void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %15) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %14) #7
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = load i32, ptr %11, align 4, !tbaa !9
  %.not113120 = icmp sgt i32 %69, %70
  br i1 %.not113120, label %._crit_edge124, label %.lr.ph123

.lr.ph123:                                        ; preds = %67
  %71 = fneg float %27
  %72 = add i32 %2, 1
  %73 = load i32, ptr %12, align 4, !tbaa !9
  %74 = load i32, ptr %13, align 4, !tbaa !9
  %75 = icmp sgt i32 %73, %74
  br i1 %75, label %._crit_edge124, label %.lr.ph123.split.preheader

.lr.ph123.split.preheader:                        ; preds = %.lr.ph123
  %76 = extractelement <2 x float> %60, i64 0
  %77 = extractelement <2 x float> %60, i64 1
  br label %.lr.ph123.split

.lr.ph123.split:                                  ; preds = %.lr.ph123.split.preheader, %._crit_edge
  %78 = phi i32 [ %164, %._crit_edge ], [ %70, %.lr.ph123.split.preheader ]
  %79 = phi i32 [ %165, %._crit_edge ], [ %74, %.lr.ph123.split.preheader ]
  %.0121 = phi i32 [ %166, %._crit_edge ], [ %69, %.lr.ph123.split.preheader ]
  %80 = load i32, ptr %12, align 4, !tbaa !9
  %.not114118 = icmp sgt i32 %80, %79
  br i1 %.not114118, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph123.split
  %81 = sitofp i32 %.0121 to float
  br label %82

82:                                               ; preds = %.lr.ph, %135
  %.0109119 = phi i32 [ %80, %.lr.ph ], [ %160, %135 ]
  %83 = sitofp i32 %.0109119 to float
  %84 = fmul float %71, %83
  %85 = call float @llvm.fmuladd.f32(float %21, float %81, float %84)
  %86 = fadd float %77, %85
  %87 = fmul float %21, %83
  %88 = call float @llvm.fmuladd.f32(float %27, float %81, float %87)
  %89 = fadd float %76, %88
  %90 = call noundef float @_ZSt5floorf(float noundef %86)
  %91 = fptosi float %90 to i32
  %92 = call noundef float @_ZSt5floorf(float noundef %89)
  %93 = fptosi float %92 to i32
  %94 = sitofp i32 %91 to float
  %95 = fsub float %86, %94
  %96 = sitofp i32 %93 to float
  %97 = fsub float %89, %96
  %98 = mul nsw i32 %93, %2
  %99 = add nsw i32 %98, %91
  %100 = icmp sgt i32 %91, -1
  %101 = icmp slt i32 %91, %2
  %102 = and i1 %100, %101
  %103 = add nsw i32 %91, 1
  %104 = icmp sgt i32 %91, -2
  %105 = icmp slt i32 %103, %2
  %106 = select i1 %104, i1 %105, i1 false
  %107 = icmp sgt i32 %93, -1
  %108 = icmp slt i32 %93, %3
  %109 = and i1 %107, %108
  %110 = add nsw i32 %93, 1
  %111 = icmp sgt i32 %93, -2
  %112 = icmp slt i32 %110, %3
  %113 = select i1 %111, i1 %112, i1 false
  %or.cond = select i1 %102, i1 %109, i1 false
  br i1 %or.cond, label %114, label %117

114:                                              ; preds = %82
  %115 = sext i32 %99 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %115) #7
  br label %117

117:                                              ; preds = %82, %114
  %.in = phi ptr [ %116, %114 ], [ %7, %82 ]
  %118 = load float, ptr %.in, align 4, !tbaa !5
  %or.cond3 = select i1 %102, i1 %113, i1 false
  br i1 %or.cond3, label %119, label %123

119:                                              ; preds = %117
  %120 = add nsw i32 %99, %2
  %121 = sext i32 %120 to i64
  %122 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %121) #7
  br label %123

123:                                              ; preds = %117, %119
  %.in115 = phi ptr [ %122, %119 ], [ %7, %117 ]
  %124 = load float, ptr %.in115, align 4, !tbaa !5
  %or.cond5 = select i1 %106, i1 %109, i1 false
  br i1 %or.cond5, label %125, label %129

125:                                              ; preds = %123
  %126 = add nsw i32 %99, 1
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %127) #7
  br label %129

129:                                              ; preds = %123, %125
  %.in116 = phi ptr [ %128, %125 ], [ %7, %123 ]
  %130 = load float, ptr %.in116, align 4, !tbaa !5
  %or.cond7 = select i1 %106, i1 %113, i1 false
  br i1 %or.cond7, label %131, label %135

131:                                              ; preds = %129
  %132 = add i32 %72, %99
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %133) #7
  br label %135

135:                                              ; preds = %129, %131
  %.in117 = phi ptr [ %134, %131 ], [ %7, %129 ]
  %136 = load float, ptr %.in117, align 4, !tbaa !5
  %137 = fpext float %97 to double
  %138 = fsub double 1.000000e+00, %137
  %139 = fpext float %95 to double
  %140 = fsub double 1.000000e+00, %139
  %141 = fpext float %118 to double
  %142 = fmul float %95, %130
  %143 = fpext float %142 to double
  %144 = call double @llvm.fmuladd.f64(double %140, double %141, double %143)
  %145 = fpext float %124 to double
  %146 = fmul float %95, %136
  %147 = fpext float %146 to double
  %148 = call double @llvm.fmuladd.f64(double %140, double %145, double %147)
  %149 = fmul double %148, %137
  %150 = call double @llvm.fmuladd.f64(double %138, double %144, double %149)
  %151 = fptrunc double %150 to float
  %152 = load i32, ptr %12, align 4, !tbaa !9
  %153 = sub nsw i32 %.0109119, %152
  %154 = mul nsw i32 %153, %62
  %155 = load i32, ptr %10, align 4, !tbaa !9
  %156 = sub i32 %.0121, %155
  %157 = add i32 %156, %154
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %158) #7
  store float %151, ptr %159, align 4, !tbaa !5
  %160 = add nsw i32 %.0109119, 1
  %161 = load i32, ptr %13, align 4, !tbaa !9
  %.not114.not = icmp slt i32 %.0109119, %161
  br i1 %.not114.not, label %82, label %._crit_edge.loopexit, !llvm.loop !11

162:                                              ; preds = %55
  %163 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %15) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %13) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #7
  resume { ptr, i32 } %163

._crit_edge.loopexit:                             ; preds = %135
  %.pre129 = load i32, ptr %11, align 4, !tbaa !9
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph123.split
  %164 = phi i32 [ %.pre129, %._crit_edge.loopexit ], [ %78, %.lr.ph123.split ]
  %165 = phi i32 [ %161, %._crit_edge.loopexit ], [ %79, %.lr.ph123.split ]
  %166 = add nsw i32 %.0121, 1
  %.not113.not = icmp slt i32 %.0121, %164
  br i1 %.not113.not, label %.lr.ph123.split, label %._crit_edge124, !llvm.loop !13

._crit_edge124:                                   ; preds = %._crit_edge, %.lr.ph123, %67
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %13) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #7
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @cos(double noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sin(double noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5boundiiffPiS_S_S_(i32 noundef, i32 noundef, float noundef, float noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIfEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIfSaIfEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5floorf(float noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIfED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12, !14}
!14 = !{!"llvm.loop.unswitch.partial.disable"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass