; LLVM IR from rdguez-mariano/fast_imas_IPOL :: libSimuTilts/library.ll (Z7rgb2yuvPfS_S_S_S_S_fffii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7rgb2yuvPfS_S_S_S_S_fffii(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, float noundef %6, float noundef %7, float noundef %8, i32 noundef %9, i32 noundef %10) #2 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store ptr %3, ptr %15, align 8, !tbaa !5
  store ptr %4, ptr %16, align 8, !tbaa !5
  store ptr %5, ptr %17, align 8, !tbaa !5
  store float %6, ptr %18, align 4, !tbaa !9
  store float %7, ptr %19, align 4, !tbaa !9
  store float %8, ptr %20, align 4, !tbaa !9
  store i32 %9, ptr %21, align 4, !tbaa !11
  store i32 %10, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %25 = load i32, ptr %22, align 4, !tbaa !11
  %26 = load i32, ptr %21, align 4, !tbaa !11
  %27 = mul nsw i32 %25, %26
  store i32 %27, ptr %23, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  store i32 0, ptr %24, align 4, !tbaa !11
  br label %28

28:                                               ; preds = %89, %11
  %29 = load i32, ptr %24, align 4, !tbaa !11
  %30 = load i32, ptr %23, align 4, !tbaa !11
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  br label %92

33:                                               ; preds = %28
  %34 = load float, ptr %18, align 4, !tbaa !9
  %35 = load ptr, ptr %12, align 8, !tbaa !5
  %36 = load i32, ptr %24, align 4, !tbaa !11
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds float, ptr %35, i64 %37
  %39 = load float, ptr %38, align 4, !tbaa !9
  %40 = load float, ptr %19, align 4, !tbaa !9
  %41 = load ptr, ptr %13, align 8, !tbaa !5
  %42 = load i32, ptr %24, align 4, !tbaa !11
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds float, ptr %41, i64 %43
  %45 = load float, ptr %44, align 4, !tbaa !9
  %46 = fmul float %40, %45
  %47 = call float @llvm.fmuladd.f32(float %34, float %39, float %46)
  %48 = load float, ptr %20, align 4, !tbaa !9
  %49 = load ptr, ptr %14, align 8, !tbaa !5
  %50 = load i32, ptr %24, align 4, !tbaa !11
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds float, ptr %49, i64 %51
  %53 = load float, ptr %52, align 4, !tbaa !9
  %54 = call float @llvm.fmuladd.f32(float %48, float %53, float %47)
  %55 = load ptr, ptr %15, align 8, !tbaa !5
  %56 = load i32, ptr %24, align 4, !tbaa !11
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds float, ptr %55, i64 %57
  store float %54, ptr %58, align 4, !tbaa !9
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = load i32, ptr %24, align 4, !tbaa !11
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds float, ptr %59, i64 %61
  %63 = load float, ptr %62, align 4, !tbaa !9
  %64 = load ptr, ptr %15, align 8, !tbaa !5
  %65 = load i32, ptr %24, align 4, !tbaa !11
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds float, ptr %64, i64 %66
  %68 = load float, ptr %67, align 4, !tbaa !9
  %69 = fsub float %63, %68
  %70 = load ptr, ptr %16, align 8, !tbaa !5
  %71 = load i32, ptr %24, align 4, !tbaa !11
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds float, ptr %70, i64 %72
  store float %69, ptr %73, align 4, !tbaa !9
  %74 = load ptr, ptr %14, align 8, !tbaa !5
  %75 = load i32, ptr %24, align 4, !tbaa !11
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds float, ptr %74, i64 %76
  %78 = load float, ptr %77, align 4, !tbaa !9
  %79 = load ptr, ptr %15, align 8, !tbaa !5
  %80 = load i32, ptr %24, align 4, !tbaa !11
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds float, ptr %79, i64 %81
  %83 = load float, ptr %82, align 4, !tbaa !9
  %84 = fsub float %78, %83
  %85 = load ptr, ptr %17, align 8, !tbaa !5
  %86 = load i32, ptr %24, align 4, !tbaa !11
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds float, ptr %85, i64 %87
  store float %84, ptr %88, align 4, !tbaa !9
  br label %89

89:                                               ; preds = %33
  %90 = load i32, ptr %24, align 4, !tbaa !11
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %24, align 4, !tbaa !11
  br label %28, !llvm.loop !13

92:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_Z7rgb2yuvPfS_S_S_S_S_fffii(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5, float noundef %6, float noundef %7, float noundef %8, i32 noundef %9, i32 noundef %10) local_unnamed_addr #1 {
  %12 = mul nsw i32 %10, %9
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %11
  %wide.trip.count = zext nneg i32 %12 to i64
  %min.iters.check = icmp ult i32 %12, 20
  br i1 %min.iters.check, label %.lr.ph.preheader86, label %vector.memcheck

.lr.ph.preheader86:                               ; preds = %middle.block, %vector.memcheck, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %vector.memcheck ], [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.memcheck:                                  ; preds = %.lr.ph.preheader
  %14 = shl nuw nsw i64 %wide.trip.count, 2
  %scevgep = getelementptr i8, ptr %3, i64 %14
  %scevgep29 = getelementptr i8, ptr %4, i64 %14
  %scevgep30 = getelementptr i8, ptr %5, i64 %14
  %scevgep31 = getelementptr i8, ptr %0, i64 %14
  %scevgep32 = getelementptr i8, ptr %1, i64 %14
  %scevgep33 = getelementptr i8, ptr %2, i64 %14
  %bound0 = icmp ugt ptr %scevgep29, %3
  %bound1 = icmp ugt ptr %scevgep, %4
  %found.conflict = and i1 %bound0, %bound1
  %bound034 = icmp ugt ptr %scevgep30, %3
  %bound135 = icmp ugt ptr %scevgep, %5
  %found.conflict36 = and i1 %bound034, %bound135
  %conflict.rdx = or i1 %found.conflict, %found.conflict36
  %bound037 = icmp ugt ptr %scevgep31, %3
  %bound138 = icmp ugt ptr %scevgep, %0
  %found.conflict39 = and i1 %bound037, %bound138
  %conflict.rdx40 = or i1 %conflict.rdx, %found.conflict39
  %bound041 = icmp ugt ptr %scevgep32, %3
  %bound142 = icmp ugt ptr %scevgep, %1
  %found.conflict43 = and i1 %bound041, %bound142
  %conflict.rdx44 = or i1 %conflict.rdx40, %found.conflict43
  %bound045 = icmp ugt ptr %scevgep33, %3
  %bound146 = icmp ugt ptr %scevgep, %2
  %found.conflict47 = and i1 %bound045, %bound146
  %conflict.rdx48 = or i1 %conflict.rdx44, %found.conflict47
  %bound049 = icmp ugt ptr %scevgep30, %4
  %bound150 = icmp ugt ptr %scevgep29, %5
  %found.conflict51 = and i1 %bound049, %bound150
  %conflict.rdx52 = or i1 %conflict.rdx48, %found.conflict51
  %bound053 = icmp ugt ptr %scevgep31, %4
  %bound154 = icmp ugt ptr %scevgep29, %0
  %found.conflict55 = and i1 %bound053, %bound154
  %conflict.rdx56 = or i1 %conflict.rdx52, %found.conflict55
  %bound057 = icmp ugt ptr %scevgep32, %4
  %bound158 = icmp ugt ptr %scevgep29, %1
  %found.conflict59 = and i1 %bound057, %bound158
  %conflict.rdx60 = or i1 %conflict.rdx56, %found.conflict59
  %bound061 = icmp ugt ptr %scevgep33, %4
  %bound162 = icmp ugt ptr %scevgep29, %2
  %found.conflict63 = and i1 %bound061, %bound162
  %conflict.rdx64 = or i1 %conflict.rdx60, %found.conflict63
  %bound065 = icmp ugt ptr %scevgep31, %5
  %bound166 = icmp ugt ptr %scevgep30, %0
  %found.conflict67 = and i1 %bound065, %bound166
  %conflict.rdx68 = or i1 %conflict.rdx64, %found.conflict67
  %bound069 = icmp ugt ptr %scevgep32, %5
  %bound170 = icmp ugt ptr %scevgep30, %1
  %found.conflict71 = and i1 %bound069, %bound170
  %conflict.rdx72 = or i1 %conflict.rdx68, %found.conflict71
  %bound073 = icmp ugt ptr %scevgep33, %5
  %bound174 = icmp ugt ptr %scevgep30, %2
  %found.conflict75 = and i1 %bound073, %bound174
  %conflict.rdx76 = or i1 %conflict.rdx72, %found.conflict75
  br i1 %conflict.rdx76, label %.lr.ph.preheader86, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %wide.trip.count, 2147483644
  %broadcast.splatinsert = insertelement <4 x float> poison, float %7, i64 0
  %broadcast.splat = shufflevector <4 x float> %broadcast.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert78 = insertelement <4 x float> poison, float %6, i64 0
  %broadcast.splat79 = shufflevector <4 x float> %broadcast.splatinsert78, <4 x float> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert81 = insertelement <4 x float> poison, float %8, i64 0
  %broadcast.splat82 = shufflevector <4 x float> %broadcast.splatinsert81, <4 x float> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %15 = getelementptr inbounds float, ptr %0, i64 %index
  %wide.load = load <4 x float>, ptr %15, align 4, !tbaa !5, !alias.scope !9
  %16 = getelementptr inbounds float, ptr %1, i64 %index
  %wide.load77 = load <4 x float>, ptr %16, align 4, !tbaa !5, !alias.scope !12
  %17 = fmul <4 x float> %wide.load77, %broadcast.splat
  %18 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %broadcast.splat79, <4 x float> %wide.load, <4 x float> %17)
  %19 = getelementptr inbounds float, ptr %2, i64 %index
  %wide.load80 = load <4 x float>, ptr %19, align 4, !tbaa !5, !alias.scope !14
  %20 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %broadcast.splat82, <4 x float> %wide.load80, <4 x float> %18)
  %21 = getelementptr inbounds float, ptr %3, i64 %index
  store <4 x float> %20, ptr %21, align 4, !tbaa !5, !alias.scope !16, !noalias !18
  %wide.load83 = load <4 x float>, ptr %15, align 4, !tbaa !5, !alias.scope !9
  %22 = fsub <4 x float> %wide.load83, %20
  %23 = getelementptr inbounds float, ptr %4, i64 %index
  store <4 x float> %22, ptr %23, align 4, !tbaa !5, !alias.scope !21, !noalias !22
  %wide.load84 = load <4 x float>, ptr %19, align 4, !tbaa !5, !alias.scope !14
  %24 = fsub <4 x float> %wide.load84, %20
  %25 = getelementptr inbounds float, ptr %5, i64 %index
  store <4 x float> %24, ptr %25, align 4, !tbaa !5, !alias.scope !23, !noalias !24
  %index.next = add nuw i64 %index, 4
  %26 = icmp eq i64 %index.next, %n.vec
  br i1 %26, label %middle.block, label %vector.body, !llvm.loop !25

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader86

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %11
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader86, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader86 ]
  %27 = getelementptr inbounds float, ptr %0, i64 %indvars.iv
  %28 = load float, ptr %27, align 4, !tbaa !5
  %29 = getelementptr inbounds float, ptr %1, i64 %indvars.iv
  %30 = load float, ptr %29, align 4, !tbaa !5
  %31 = fmul float %30, %7
  %32 = tail call float @llvm.fmuladd.f32(float %6, float %28, float %31)
  %33 = getelementptr inbounds float, ptr %2, i64 %indvars.iv
  %34 = load float, ptr %33, align 4, !tbaa !5
  %35 = tail call float @llvm.fmuladd.f32(float %8, float %34, float %32)
  %36 = getelementptr inbounds float, ptr %3, i64 %indvars.iv
  store float %35, ptr %36, align 4, !tbaa !5
  %37 = load float, ptr %27, align 4, !tbaa !5
  %38 = fsub float %37, %35
  %39 = getelementptr inbounds float, ptr %4, i64 %indvars.iv
  store float %38, ptr %39, align 4, !tbaa !5
  %40 = load float, ptr %33, align 4, !tbaa !5
  %41 = load float, ptr %36, align 4, !tbaa !5
  %42 = fsub float %40, %41
  %43 = getelementptr inbounds float, ptr %5, i64 %indvars.iv
  store float %42, ptr %43, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !29
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10}
!10 = distinct !{!10, !11}
!11 = distinct !{!11, !"LVerDomain"}
!12 = !{!13}
!13 = distinct !{!13, !11}
!14 = !{!15}
!15 = distinct !{!15, !11}
!16 = !{!17}
!17 = distinct !{!17, !11}
!18 = !{!19, !20, !10, !13, !15}
!19 = distinct !{!19, !11}
!20 = distinct !{!20, !11}
!21 = !{!19}
!22 = !{!20, !10, !13, !15}
!23 = !{!20}
!24 = !{!10, !13, !15}
!25 = distinct !{!25, !26, !27, !28}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!"llvm.loop.isvectorized", i32 1}
!28 = !{!"llvm.loop.unroll.runtime.disable"}
!29 = distinct !{!29, !26, !27}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass