; LLVM IR from tanakamasayuki/Arduino_TensorFlowLite_ESP32 :: src/tensorflow/lite/micro/memory_planner (linear_memory_planner)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.tflite::LinearMemoryPlanner" = type { %"class.tflite::MicroMemoryPlanner", [1024 x i64], i32, i64 }
%"class.tflite::MicroMemoryPlanner" = type { ptr }

@.str.1 = external hidden unnamed_addr constant [41 x i8], align 1

declare noundef i32 @_ZN6tflite13ErrorReporter6ReportEPKcz(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef, ...) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN6tflite19LinearMemoryPlanner18GetOffsetForBufferEPNS_13ErrorReporterEiPi(ptr noundef nonnull align 8 dereferenceable(8216) %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) unnamed_addr #1 align 2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  %10 = load ptr, ptr %6, align 8
  %11 = load i32, ptr %8, align 4, !tbaa !9
  %12 = icmp slt i32 %11, 0
  br i1 %12, label %18, label %13

13:                                               ; preds = %4
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = getelementptr inbounds %"class.tflite::LinearMemoryPlanner", ptr %10, i32 0, i32 2
  %16 = load i32, ptr %15, align 8, !tbaa !11
  %17 = icmp sge i32 %14, %16
  br i1 %17, label %18, label %26

18:                                               ; preds = %13, %4
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = getelementptr inbounds %"class.tflite::LinearMemoryPlanner", ptr %10, i32 0, i32 2
  %23 = load i32, ptr %22, align 8, !tbaa !11
  %24 = call noundef i32 (ptr, ptr, ...) @_ZN6tflite13ErrorReporter6ReportEPKcz(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef @.str.1, i32 noundef %21, i32 noundef %23)
  br label %25

25:                                               ; preds = %19
  store i32 1, ptr %5, align 4
  br label %34

26:                                               ; preds = %13
  %27 = getelementptr inbounds %"class.tflite::LinearMemoryPlanner", ptr %10, i32 0, i32 1
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [1024 x i64], ptr %27, i64 0, i64 %29
  %31 = load i64, ptr %30, align 8, !tbaa !15
  %32 = trunc i64 %31 to i32
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  store i32 %32, ptr %33, align 4, !tbaa !9
  store i32 0, ptr %5, align 4
  br label %34

34:                                               ; preds = %26, %25
  %35 = load i32, ptr %5, align 4
  ret i32 %35
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8200}
!12 = !{!"_ZTSN6tflite19LinearMemoryPlannerE", !13, i64 0, !7, i64 8, !10, i64 8200, !14, i64 8208}
!13 = !{!"_ZTSN6tflite18MicroMemoryPlannerE"}
!14 = !{!"long", !7, i64 0}
!15 = !{!14, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [41 x i8], align 1

declare noundef i32 @_ZN6tflite13ErrorReporter6ReportEPKcz(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 2) i32 @_ZN6tflite19LinearMemoryPlanner18GetOffsetForBufferEPNS_13ErrorReporterEiPi(ptr nocapture noundef nonnull readonly align 8 dereferenceable(8216) %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3) unnamed_addr #1 align 2 {
  %5 = icmp sgt i32 %2, -1
  %6 = getelementptr inbounds i8, ptr %0, i64 8200
  %7 = load i32, ptr %6, align 8
  %.not = icmp sgt i32 %7, %2
  %or.cond = select i1 %5, i1 %.not, i1 false
  br i1 %or.cond, label %10, label %8

8:                                                ; preds = %4
  %9 = tail call noundef i32 (ptr, ptr, ...) @_ZN6tflite13ErrorReporter6ReportEPKcz(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull @.str.1, i32 noundef %2, i32 noundef %7)
  br label %16

10:                                               ; preds = %4
  %11 = getelementptr inbounds i8, ptr %0, i64 8
  %12 = zext nneg i32 %2 to i64
  %13 = getelementptr inbounds [1024 x i64], ptr %11, i64 0, i64 %12
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = trunc i64 %14 to i32
  store i32 %15, ptr %3, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %10, %8
  %.0 = phi i32 [ 1, %8 ], [ 0, %10 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass