; LLVM IR from ahampriyanshu/algo-ds-101 :: Algorithms/Array/rotated_sorted_array_search.ll (Z13rotatedSearchRSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13rotatedSearchRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #2
  %13 = sub i64 %12, 1
  %14 = trunc i64 %13 to i32
  store i32 %14, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %59, %2
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #2
  %20 = sub i64 %19, 1
  %21 = icmp ult i64 %17, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %15
  store i32 2, ptr %9, align 4
  br label %62

23:                                               ; preds = %15
  %24 = load ptr, ptr %4, align 8, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #2
  %28 = load i32, ptr %27, align 4, !tbaa !9
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = add nsw i32 %30, 1
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %32) #2
  %34 = load i32, ptr %33, align 4, !tbaa !9
  %35 = icmp sgt i32 %28, %34
  br i1 %35, label %36, label %58

36:                                               ; preds = %23
  %37 = load i32, ptr %5, align 4, !tbaa !9
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 0) #2
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = icmp sge i32 %37, %40
  br i1 %41, label %42, label %44

42:                                               ; preds = %36
  %43 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %43, ptr %7, align 4, !tbaa !9
  br label %57

44:                                               ; preds = %36
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %47) #2
  %49 = sub i64 %48, 1
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %49) #2
  %51 = load i32, ptr %50, align 4, !tbaa !9
  %52 = icmp sle i32 %45, %51
  br i1 %52, label %53, label %56

53:                                               ; preds = %44
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %6, align 4, !tbaa !9
  br label %56

56:                                               ; preds = %53, %44
  br label %57

57:                                               ; preds = %56, %42
  store i32 2, ptr %9, align 4
  br label %62

58:                                               ; preds = %23
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %8, align 4, !tbaa !9
  br label %15, !llvm.loop !11

62:                                               ; preds = %57, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %63

63:                                               ; preds = %62
  br label %64

64:                                               ; preds = %111, %63
  %65 = load i32, ptr %7, align 4, !tbaa !9
  %66 = load i32, ptr %6, align 4, !tbaa !9
  %67 = icmp sge i32 %65, %66
  br i1 %67, label %68, label %112

68:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %69 = load i32, ptr %6, align 4, !tbaa !9
  %70 = load i32, ptr %7, align 4, !tbaa !9
  %71 = load i32, ptr %6, align 4, !tbaa !9
  %72 = sub nsw i32 %70, %71
  %73 = sdiv i32 %72, 2
  %74 = add nsw i32 %69, %73
  store i32 %74, ptr %10, align 4, !tbaa !9
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = load i32, ptr %10, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #2
  %79 = load i32, ptr %78, align 4, !tbaa !9
  %80 = load i32, ptr %5, align 4, !tbaa !9
  %81 = icmp eq i32 %79, %80
  br i1 %81, label %82, label %84

82:                                               ; preds = %68
  %83 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %83, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %109

84:                                               ; preds = %68
  %85 = load ptr, ptr %4, align 8, !tbaa !5
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #2
  %89 = load i32, ptr %88, align 4, !tbaa !9
  %90 = load i32, ptr %5, align 4, !tbaa !9
  %91 = icmp sgt i32 %89, %90
  br i1 %91, label %92, label %95

92:                                               ; preds = %84
  %93 = load i32, ptr %10, align 4, !tbaa !9
  %94 = sub nsw i32 %93, 1
  store i32 %94, ptr %7, align 4, !tbaa !9
  br label %107

95:                                               ; preds = %84
  %96 = load ptr, ptr %4, align 8, !tbaa !5
  %97 = load i32, ptr %10, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #2
  %100 = load i32, ptr %99, align 4, !tbaa !9
  %101 = load i32, ptr %5, align 4, !tbaa !9
  %102 = icmp slt i32 %100, %101
  br i1 %102, label %103, label %106

103:                                              ; preds = %95
  %104 = load i32, ptr %10, align 4, !tbaa !9
  %105 = add nsw i32 %104, 1
  store i32 %105, ptr %6, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %103, %95
  br label %107

107:                                              ; preds = %106, %92
  br label %108

108:                                              ; preds = %107
  store i32 0, ptr %9, align 4
  br label %109

109:                                              ; preds = %108, %82
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %110 = load i32, ptr %9, align 4
  switch i32 %110, label %113 [
    i32 0, label %111
  ]

111:                                              ; preds = %109
  br label %64, !llvm.loop !13

112:                                              ; preds = %64
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %113

113:                                              ; preds = %112, %109
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %114 = load i32, ptr %3, align 4
  ret i32 %114
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13rotatedSearchRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = trunc i64 %3 to i32
  %5 = add i32 %4, -1
  br label %6

6:                                                ; preds = %10, %2
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ 0, %2 ]
  %7 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %8 = add i64 %7, -1
  %9 = icmp ugt i64 %8, %indvars.iv
  br i1 %9, label %10, label %.loopexit

10:                                               ; preds = %6
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp sgt i32 %12, %14
  br i1 %15, label %16, label %6, !llvm.loop !9

16:                                               ; preds = %10
  %17 = trunc nuw nsw i64 %indvars.iv to i32
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %.not = icmp sgt i32 %19, %1
  br i1 %.not, label %20, label %.loopexit

20:                                               ; preds = %16
  %21 = trunc nuw i64 %indvars.iv.next to i32
  %22 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %23 = add i64 %22, -1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %.not46 = icmp slt i32 %25, %1
  %spec.select = select i1 %.not46, i32 0, i32 %21
  br label %.loopexit

.loopexit:                                        ; preds = %6, %20, %16
  %.139 = phi i32 [ 0, %16 ], [ %spec.select, %20 ], [ 0, %6 ]
  %.136 = phi i32 [ %17, %16 ], [ %5, %20 ], [ %5, %6 ]
  %.not4754 = icmp slt i32 %.136, %.139
  br i1 %.not4754, label %.thread, label %.lr.ph

.lr.ph:                                           ; preds = %.loopexit, %43
  %.23756 = phi i32 [ %.4, %43 ], [ %.136, %.loopexit ]
  %.24055 = phi i32 [ %.442, %43 ], [ %.139, %.loopexit ]
  %26 = sub nsw i32 %.23756, %.24055
  %27 = sdiv i32 %26, 2
  %28 = add nsw i32 %27, %.24055
  %29 = sext i32 %28 to i64
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %29) #1
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %.not48 = icmp eq i32 %31, %1
  br i1 %.not48, label %.thread, label %32

32:                                               ; preds = %.lr.ph
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %29) #1
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp sgt i32 %34, %1
  br i1 %35, label %36, label %38

36:                                               ; preds = %32
  %37 = add nsw i32 %28, -1
  br label %43

38:                                               ; preds = %32
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %29) #1
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp slt i32 %40, %1
  %42 = add nsw i32 %28, 1
  %spec.select49 = select i1 %41, i32 %42, i32 %.24055
  br label %43

43:                                               ; preds = %38, %36
  %.442 = phi i32 [ %.24055, %36 ], [ %spec.select49, %38 ]
  %.4 = phi i32 [ %37, %36 ], [ %.23756, %38 ]
  %.not47 = icmp slt i32 %.4, %.442
  br i1 %.not47, label %.thread, label %.lr.ph

.thread:                                          ; preds = %43, %.lr.ph, %.loopexit
  %.2 = phi i32 [ -1, %.loopexit ], [ %28, %.lr.ph ], [ -1, %43 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass