; LLVM IR from kazunetakahashi/atcoder :: 2019/0629_ABC132/D.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Combination = type { %"class.std::vector", %"class.std::vector", %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl" }
%"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Mint = type { i64 }

@K = external dso_local global i64, align 8
@N = external dso_local global i64, align 8
@C = external dso_local global %class.Combination, align 8

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z5solvei(i32 noundef %0) #0 {
  %2 = alloca %class.Mint, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca %class.Mint, align 8
  %10 = alloca %class.Mint, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %11 = load i64, ptr @K, align 8, !tbaa !9
  store i64 %11, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %12 = load i64, ptr @N, align 8, !tbaa !9
  %13 = load i64, ptr %4, align 8, !tbaa !9
  %14 = sub nsw i64 %12, %13
  store i64 %14, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %15 = load i64, ptr %5, align 8, !tbaa !9
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = sub nsw i32 %16, 1
  %18 = sext i32 %17 to i64
  %19 = sub nsw i64 %15, %18
  store i64 %19, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %20 = load i64, ptr %4, align 8, !tbaa !9
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = sub nsw i64 %20, %22
  store i64 %23, ptr %7, align 8, !tbaa !9
  %24 = load i64, ptr %6, align 8, !tbaa !9
  %25 = icmp slt i64 %24, 0
  br i1 %25, label %29, label %26

26:                                               ; preds = %1
  %27 = load i64, ptr %7, align 8, !tbaa !9
  %28 = icmp slt i64 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %26, %1
  call void @_ZN4MintILx1000000007EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 0)
  store i32 1, ptr %8, align 4
  br label %51

30:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %31 = load i64, ptr %6, align 8, !tbaa !9
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = add nsw i64 %31, %33
  %35 = trunc i64 %34 to i32
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = call i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72) @C, i32 noundef %35, i32 noundef %36)
  %38 = getelementptr inbounds %class.Mint, ptr %9, i32 0, i32 0
  store i64 %37, ptr %38, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %39 = load i64, ptr %7, align 8, !tbaa !9
  %40 = load i32, ptr %3, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = add nsw i64 %39, %41
  %43 = sub nsw i64 %42, 1
  %44 = trunc i64 %43 to i32
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = sub nsw i32 %45, 1
  %47 = call i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72) @C, i32 noundef %44, i32 noundef %46)
  %48 = getelementptr inbounds %class.Mint, ptr %10, i32 0, i32 0
  store i64 %47, ptr %48, align 8
  %49 = call i64 @_ZNK4MintILx1000000007EEmlERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10)
  %50 = getelementptr inbounds %class.Mint, ptr %2, i32 0, i32 0
  store i64 %49, ptr %50, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  store i32 1, ptr %8, align 4
  br label %51

51:                                               ; preds = %30, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %52 = getelementptr inbounds %class.Mint, ptr %2, i32 0, i32 0
  %53 = load i64, ptr %52, align 8
  ret i64 %53
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MintILx1000000007EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72), i32 noundef, i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZNK4MintILx1000000007EEmlERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Combination = type { %"class.std::vector", %"class.std::vector", %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl" }
%"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl" = type { %"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Mint<>, std::allocator<Mint<>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Mint = type { i64 }

@K = external dso_local local_unnamed_addr global i64, align 8
@N = external dso_local local_unnamed_addr global i64, align 8
@C = external dso_local global %class.Combination, align 8

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z5solvei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %class.Mint, align 8
  %3 = alloca %class.Mint, align 8
  %4 = alloca %class.Mint, align 8
  %5 = load i64, ptr @K, align 8, !tbaa !5
  %6 = load i64, ptr @N, align 8, !tbaa !5
  %7 = add nsw i32 %0, -1
  %8 = sext i32 %7 to i64
  %9 = add i64 %5, %8
  %10 = sub i64 %6, %9
  %11 = sext i32 %0 to i64
  %12 = icmp slt i64 %10, 0
  %13 = icmp slt i64 %5, %11
  %or.cond = or i1 %13, %12
  br i1 %or.cond, label %14, label %15

14:                                               ; preds = %1
  call void @_ZN4MintILx1000000007EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 0)
  %.pre = load i64, ptr %2, align 8
  br label %23

15:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
  %16 = trunc i64 %10 to i32
  %17 = add i32 %16, %0
  %18 = tail call i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72) @C, i32 noundef %17, i32 noundef %0)
  store i64 %18, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  %19 = trunc i64 %5 to i32
  %20 = add i32 %19, -1
  %21 = tail call i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72) @C, i32 noundef %20, i32 noundef %7)
  store i64 %21, ptr %4, align 8
  %22 = call i64 @_ZNK4MintILx1000000007EEmlERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
  br label %23

23:                                               ; preds = %15, %14
  %24 = phi i64 [ %22, %15 ], [ %.pre, %14 ]
  ret i64 %24
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MintILx1000000007EEC2Ex(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN11CombinationILx1000000007ELx3000010EEclEii(ptr noundef nonnull align 8 dereferenceable(72), i32 noundef, i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZNK4MintILx1000000007EEmlERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass