; LLVM IR from kazunetakahashi/atcoder :: 201510_201609/1009_KUPC_2014 (C)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@Q = external dso_local global i32, align 4
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z12is_same_rootii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5uniteii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3gcdii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @_Z4initv()
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @N)
  %13 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %12, ptr noundef nonnull align 4 dereferenceable(4) @M)
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %13, ptr noundef nonnull align 4 dereferenceable(4) @Q)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %30, %0
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr @Q, align 4, !tbaa !5
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %33

20:                                               ; preds = %15
  %21 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %22 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %21, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = add nsw i32 %23, -1
  store i32 %24, ptr %2, align 4, !tbaa !5
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = add nsw i32 %25, -1
  store i32 %26, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = add nsw i32 %28, 250
  call void @_Z5uniteii(i32 noundef %27, i32 noundef %29)
  br label %30

30:                                               ; preds = %20
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %4, align 4, !tbaa !5
  br label %15, !llvm.loop !9

33:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  %34 = load i32, ptr @N, align 4, !tbaa !5
  %35 = load i32, ptr @M, align 4, !tbaa !5
  %36 = call noundef i32 @_Z3gcdii(i32 noundef %34, i32 noundef %35)
  store i32 %36, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  %37 = load i32, ptr @N, align 4, !tbaa !5
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = sdiv i32 %37, %38
  store i32 %39, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %40 = load i32, ptr @M, align 4, !tbaa !5
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = sdiv i32 %40, %41
  store i32 %42, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = add nsw i32 %43, %44
  %46 = sub nsw i32 %45, 1
  %47 = load i32, ptr %5, align 4, !tbaa !5
  %48 = mul nsw i32 %46, %47
  store i32 %48, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %88, %33
  br label %50

50:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  %51 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %51, ptr %10, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %67, %50
  %53 = load i32, ptr %10, align 4, !tbaa !5
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = icmp slt i32 %53, %54
  br i1 %55, label %56, label %65

56:                                               ; preds = %52
  %57 = load i32, ptr %10, align 4, !tbaa !5
  %58 = load i32, ptr @N, align 4, !tbaa !5
  %59 = srem i32 %57, %58
  %60 = load i32, ptr %10, align 4, !tbaa !5
  %61 = load i32, ptr @M, align 4, !tbaa !5
  %62 = srem i32 %60, %61
  %63 = add nsw i32 %62, 250
  %64 = call noundef zeroext i1 @_Z12is_same_rootii(i32 noundef %59, i32 noundef %63)
  br label %65

65:                                               ; preds = %56, %52
  %66 = phi i1 [ false, %52 ], [ %64, %56 ]
  br i1 %66, label %67, label %70

67:                                               ; preds = %65
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %10, align 4, !tbaa !5
  br label %52, !llvm.loop !11

70:                                               ; preds = %65
  %71 = load i32, ptr %10, align 4, !tbaa !5
  %72 = load i32, ptr %8, align 4, !tbaa !5
  %73 = icmp eq i32 %71, %72
  br i1 %73, label %74, label %75

74:                                               ; preds = %70
  store i32 6, ptr %11, align 4
  br label %86

75:                                               ; preds = %70
  %76 = load i32, ptr %9, align 4, !tbaa !5
  %77 = load i32, ptr @N, align 4, !tbaa !5
  %78 = srem i32 %76, %77
  %79 = load i32, ptr %9, align 4, !tbaa !5
  %80 = load i32, ptr @M, align 4, !tbaa !5
  %81 = srem i32 %79, %80
  %82 = add nsw i32 %81, 250
  call void @_Z5uniteii(i32 noundef %78, i32 noundef %82)
  %83 = load i32, ptr %9, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %9, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %75
  store i32 0, ptr %11, align 4
  br label %86

86:                                               ; preds = %85, %74
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  %87 = load i32, ptr %11, align 4
  switch i32 %87, label %94 [
    i32 0, label %88
    i32 6, label %89
  ]

88:                                               ; preds = %86
  br label %49, !llvm.loop !12

89:                                               ; preds = %86
  %90 = load i32, ptr %9, align 4, !tbaa !5
  %91 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %90)
  %92 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %91, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  %93 = load i32, ptr %1, align 4
  ret i32 %93

94:                                               ; preds = %86
  unreachable
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@Q = external dso_local global i32, align 4
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z12is_same_rootii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5uniteii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3gcdii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  tail call void @_Z4initv()
  %3 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @N)
  %4 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %3, ptr noundef nonnull align 4 dereferenceable(4) @M)
  %5 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 4 dereferenceable(4) @Q)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #6
  %6 = load i32, ptr @Q, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  %8 = load i32, ptr @N, align 4, !tbaa !5
  %9 = load i32, ptr @M, align 4, !tbaa !5
  %10 = call noundef i32 @_Z3gcdii(i32 noundef %8, i32 noundef %9)
  %11 = load i32, ptr @N, align 4, !tbaa !5
  %12 = sdiv i32 %11, %10
  %13 = load i32, ptr @M, align 4, !tbaa !5
  %14 = sdiv i32 %13, %10
  %15 = add i32 %12, -1
  %16 = add i32 %15, %14
  %17 = mul nsw i32 %16, %10
  br label %28

.lr.ph:                                           ; preds = %0, %.lr.ph
  %.02328 = phi i32 [ %25, %.lr.ph ], [ 0, %0 ]
  %18 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %18, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %20 = load i32, ptr %1, align 4, !tbaa !5
  %21 = add nsw i32 %20, -1
  store i32 %21, ptr %1, align 4, !tbaa !5
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = add nsw i32 %22, -1
  store i32 %23, ptr %2, align 4, !tbaa !5
  %24 = add nsw i32 %22, 249
  call void @_Z5uniteii(i32 noundef %21, i32 noundef %24)
  %25 = add nuw nsw i32 %.02328, 1
  %26 = load i32, ptr @Q, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %.lr.ph, label %._crit_edge, !llvm.loop !9

28:                                               ; preds = %39, %._crit_edge
  %.022 = phi i32 [ 0, %._crit_edge ], [ %45, %39 ]
  %29 = icmp slt i32 %.022, %17
  br i1 %29, label %.lr.ph31, label %.critedge

.lr.ph31:                                         ; preds = %28, %36
  %.02129 = phi i32 [ %37, %36 ], [ %.022, %28 ]
  %30 = load i32, ptr @N, align 4, !tbaa !5
  %31 = srem i32 %.02129, %30
  %32 = load i32, ptr @M, align 4, !tbaa !5
  %33 = srem i32 %.02129, %32
  %34 = add nuw nsw i32 %33, 250
  %35 = call noundef zeroext i1 @_Z12is_same_rootii(i32 noundef %31, i32 noundef %34)
  br i1 %35, label %36, label %.critedge

36:                                               ; preds = %.lr.ph31
  %37 = add nuw i32 %.02129, 1
  %exitcond.not = icmp eq i32 %37, %17
  br i1 %exitcond.not, label %.critedge.thread, label %.lr.ph31, !llvm.loop !11

.critedge:                                        ; preds = %.lr.ph31, %28
  %.021.lcssa = phi i32 [ %.022, %28 ], [ %.02129, %.lr.ph31 ]
  %38 = icmp eq i32 %.021.lcssa, %17
  br i1 %38, label %.critedge.thread, label %39

39:                                               ; preds = %.critedge
  %40 = load i32, ptr @N, align 4, !tbaa !5
  %41 = srem i32 %.022, %40
  %42 = load i32, ptr @M, align 4, !tbaa !5
  %43 = srem i32 %.022, %42
  %44 = add nuw nsw i32 %43, 250
  call void @_Z5uniteii(i32 noundef %41, i32 noundef %44)
  %45 = add nuw nsw i32 %.022, 1
  br label %28

.critedge.thread:                                 ; preds = %.critedge, %36
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %.022)
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %46, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  ret i32 0
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass