; LLVM IR from PaddlePaddle/FastDeploy :: fastdeploy/vision/detection/contrib/rknpu2 (utils)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN10fastdeploy6vision9detection3NMSEiRSt6vectorIfSaIfEERS2_IiSaIiEES8_fb(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, float noundef %4, i1 noundef zeroext %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca float, align 4
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca float, align 4
  %22 = alloca float, align 4
  %23 = alloca float, align 4
  %24 = alloca float, align 4
  %25 = alloca float, align 4
  %26 = alloca float, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !9
  store float %4, ptr %11, align 4, !tbaa !11
  %27 = zext i1 %5 to i8
  store i8 %27, ptr %12, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %193, %6
  %29 = load i32, ptr %13, align 4, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %28
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %196

33:                                               ; preds = %28
  %34 = load ptr, ptr %10, align 8, !tbaa !9
  %35 = load i32, ptr %13, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #3
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp eq i32 %38, -1
  br i1 %39, label %40, label %41

40:                                               ; preds = %33
  br label %193

41:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %42 = load ptr, ptr %10, align 8, !tbaa !9
  %43 = load i32, ptr %13, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #3
  %46 = load i32, ptr %45, align 4, !tbaa !5
  store i32 %46, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %16, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %189, %41
  %50 = load i32, ptr %16, align 4, !tbaa !5
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %49
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %192

54:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %55 = load ptr, ptr %10, align 8, !tbaa !9
  %56 = load i32, ptr %16, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %57) #3
  %59 = load i32, ptr %58, align 4, !tbaa !5
  store i32 %59, ptr %17, align 4, !tbaa !5
  %60 = load i32, ptr %17, align 4, !tbaa !5
  %61 = icmp eq i32 %60, -1
  br i1 %61, label %62, label %63

62:                                               ; preds = %54
  store i32 7, ptr %14, align 4
  br label %186

63:                                               ; preds = %54
  %64 = load i8, ptr %12, align 1, !tbaa !13, !range !15, !noundef !16
  %65 = trunc i8 %64 to i1
  br i1 %65, label %79, label %66

66:                                               ; preds = %63
  %67 = load ptr, ptr %9, align 8, !tbaa !9
  %68 = load i32, ptr %15, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #3
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = load ptr, ptr %9, align 8, !tbaa !9
  %73 = load i32, ptr %17, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #3
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = icmp ne i32 %71, %76
  br i1 %77, label %78, label %79

78:                                               ; preds = %66
  store i32 7, ptr %14, align 4
  br label %186

79:                                               ; preds = %66, %63
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %80 = load ptr, ptr %8, align 8, !tbaa !9
  %81 = load i32, ptr %15, align 4, !tbaa !5
  %82 = mul nsw i32 %81, 4
  %83 = add nsw i32 %82, 0
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %84) #3
  %86 = load float, ptr %85, align 4, !tbaa !11
  store float %86, ptr %18, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %87 = load ptr, ptr %8, align 8, !tbaa !9
  %88 = load i32, ptr %15, align 4, !tbaa !5
  %89 = mul nsw i32 %88, 4
  %90 = add nsw i32 %89, 1
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %91) #3
  %93 = load float, ptr %92, align 4, !tbaa !11
  store float %93, ptr %19, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %94 = load ptr, ptr %8, align 8, !tbaa !9
  %95 = load i32, ptr %15, align 4, !tbaa !5
  %96 = mul nsw i32 %95, 4
  %97 = add nsw i32 %96, 0
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %98) #3
  %100 = load float, ptr %99, align 4, !tbaa !11
  %101 = load ptr, ptr %8, align 8, !tbaa !9
  %102 = load i32, ptr %15, align 4, !tbaa !5
  %103 = mul nsw i32 %102, 4
  %104 = add nsw i32 %103, 2
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %101, i64 noundef %105) #3
  %107 = load float, ptr %106, align 4, !tbaa !11
  %108 = fadd float %100, %107
  store float %108, ptr %20, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %109 = load ptr, ptr %8, align 8, !tbaa !9
  %110 = load i32, ptr %15, align 4, !tbaa !5
  %111 = mul nsw i32 %110, 4
  %112 = add nsw i32 %111, 1
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %113) #3
  %115 = load float, ptr %114, align 4, !tbaa !11
  %116 = load ptr, ptr %8, align 8, !tbaa !9
  %117 = load i32, ptr %15, align 4, !tbaa !5
  %118 = mul nsw i32 %117, 4
  %119 = add nsw i32 %118, 3
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %116, i64 noundef %120) #3
  %122 = load float, ptr %121, align 4, !tbaa !11
  %123 = fadd float %115, %122
  store float %123, ptr %21, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  %124 = load ptr, ptr %8, align 8, !tbaa !9
  %125 = load i32, ptr %17, align 4, !tbaa !5
  %126 = mul nsw i32 %125, 4
  %127 = add nsw i32 %126, 0
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %124, i64 noundef %128) #3
  %130 = load float, ptr %129, align 4, !tbaa !11
  store float %130, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %131 = load ptr, ptr %8, align 8, !tbaa !9
  %132 = load i32, ptr %17, align 4, !tbaa !5
  %133 = mul nsw i32 %132, 4
  %134 = add nsw i32 %133, 1
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %131, i64 noundef %135) #3
  %137 = load float, ptr %136, align 4, !tbaa !11
  store float %137, ptr %23, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %138 = load ptr, ptr %8, align 8, !tbaa !9
  %139 = load i32, ptr %17, align 4, !tbaa !5
  %140 = mul nsw i32 %139, 4
  %141 = add nsw i32 %140, 0
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %142) #3
  %144 = load float, ptr %143, align 4, !tbaa !11
  %145 = load ptr, ptr %8, align 8, !tbaa !9
  %146 = load i32, ptr %17, align 4, !tbaa !5
  %147 = mul nsw i32 %146, 4
  %148 = add nsw i32 %147, 2
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %145, i64 noundef %149) #3
  %151 = load float, ptr %150, align 4, !tbaa !11
  %152 = fadd float %144, %151
  store float %152, ptr %24, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  %153 = load ptr, ptr %8, align 8, !tbaa !9
  %154 = load i32, ptr %17, align 4, !tbaa !5
  %155 = mul nsw i32 %154, 4
  %156 = add nsw i32 %155, 1
  %157 = sext i32 %156 to i64
  %158 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %153, i64 noundef %157) #3
  %159 = load float, ptr %158, align 4, !tbaa !11
  %160 = load ptr, ptr %8, align 8, !tbaa !9
  %161 = load i32, ptr %17, align 4, !tbaa !5
  %162 = mul nsw i32 %161, 4
  %163 = add nsw i32 %162, 3
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %160, i64 noundef %164) #3
  %166 = load float, ptr %165, align 4, !tbaa !11
  %167 = fadd float %159, %166
  store float %167, ptr %25, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  %168 = load float, ptr %18, align 4, !tbaa !11
  %169 = load float, ptr %19, align 4, !tbaa !11
  %170 = load float, ptr %20, align 4, !tbaa !11
  %171 = load float, ptr %21, align 4, !tbaa !11
  %172 = load float, ptr %22, align 4, !tbaa !11
  %173 = load float, ptr %23, align 4, !tbaa !11
  %174 = load float, ptr %24, align 4, !tbaa !11
  %175 = load float, ptr %25, align 4, !tbaa !11
  %176 = call noundef float @_ZN10fastdeploy6vision9detectionL16CalculateOverlapEffffffff(float noundef %168, float noundef %169, float noundef %170, float noundef %171, float noundef %172, float noundef %173, float noundef %174, float noundef %175)
  store float %176, ptr %26, align 4, !tbaa !11
  %177 = load float, ptr %26, align 4, !tbaa !11
  %178 = load float, ptr %11, align 4, !tbaa !11
  %179 = fcmp ogt float %177, %178
  br i1 %179, label %180, label %185

180:                                              ; preds = %79
  %181 = load ptr, ptr %10, align 8, !tbaa !9
  %182 = load i32, ptr %16, align 4, !tbaa !5
  %183 = sext i32 %182 to i64
  %184 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %181, i64 noundef %183) #3
  store i32 -1, ptr %184, align 4, !tbaa !5
  br label %185

185:                                              ; preds = %180, %79
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  store i32 0, ptr %14, align 4
  br label %186

186:                                              ; preds = %185, %78, %62
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  %187 = load i32, ptr %14, align 4
  switch i32 %187, label %197 [
    i32 0, label %188
    i32 7, label %189
  ]

188:                                              ; preds = %186
  br label %189

189:                                              ; preds = %188, %186
  %190 = load i32, ptr %16, align 4, !tbaa !5
  %191 = add nsw i32 %190, 1
  store i32 %191, ptr %16, align 4, !tbaa !5
  br label %49, !llvm.loop !17

192:                                              ; preds = %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %193

193:                                              ; preds = %192, %40
  %194 = load i32, ptr %13, align 4, !tbaa !5
  %195 = add nsw i32 %194, 1
  store i32 %195, ptr %13, align 4, !tbaa !5
  br label %28, !llvm.loop !19

196:                                              ; preds = %32
  ret i32 0

197:                                              ; preds = %186
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef float @_ZN10fastdeploy6vision9detectionL16CalculateOverlapEffffffff(float noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN10fastdeploy6vision9detection3NMSEiRSt6vectorIfSaIfEERS2_IiSaIiEES8_fb(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, float noundef %4, i1 noundef zeroext %5) local_unnamed_addr #0 {
  %7 = icmp sgt i32 %0, 0
  br i1 %7, label %.lr.ph60.preheader, label %._crit_edge

.lr.ph60.preheader:                               ; preds = %6
  %8 = zext nneg i32 %0 to i64
  %wide.trip.count68 = zext nneg i32 %0 to i64
  br label %.lr.ph60

._crit_edge:                                      ; preds = %.loopexit, %6
  ret i32 0

.lr.ph60:                                         ; preds = %.lr.ph60.preheader, %.loopexit
  %indvars.iv64 = phi i64 [ 0, %.lr.ph60.preheader ], [ %indvars.iv.next65.pre-phi, %.loopexit ]
  %indvars.iv = phi i64 [ 1, %.lr.ph60.preheader ], [ %indvars.iv.next, %.loopexit ]
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv64) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp eq i32 %10, -1
  br i1 %11, label %.lr.ph60..loopexit_crit_edge, label %12

.lr.ph60..loopexit_crit_edge:                     ; preds = %.lr.ph60
  %.pre = add nuw nsw i64 %indvars.iv64, 1
  br label %.loopexit

12:                                               ; preds = %.lr.ph60
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv64) #1
  %14 = add nuw nsw i64 %indvars.iv64, 1
  %15 = icmp slt i64 %14, %8
  br i1 %15, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %12
  %16 = load i32, ptr %13, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = shl nsw i32 %16, 2
  %19 = sext i32 %18 to i64
  %20 = or disjoint i32 %18, 1
  %21 = sext i32 %20 to i64
  %22 = or disjoint i32 %18, 2
  %23 = sext i32 %22 to i64
  %24 = or disjoint i32 %18, 3
  %25 = sext i32 %24 to i64
  br label %26

26:                                               ; preds = %.lr.ph, %78
  %indvars.iv61 = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next62, %78 ]
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv61) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp eq i32 %28, -1
  br i1 %29, label %78, label %30

30:                                               ; preds = %26
  br i1 %5, label %37, label %31

31:                                               ; preds = %30
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %17) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = sext i32 %28 to i64
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %34) #1
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %.not = icmp eq i32 %33, %36
  br i1 %.not, label %37, label %78

37:                                               ; preds = %31, %30
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %19) #1
  %39 = load float, ptr %38, align 4, !tbaa !9
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %21) #1
  %41 = load float, ptr %40, align 4, !tbaa !9
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %19) #1
  %43 = load float, ptr %42, align 4, !tbaa !9
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %23) #1
  %45 = load float, ptr %44, align 4, !tbaa !9
  %46 = fadd float %43, %45
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %21) #1
  %48 = load float, ptr %47, align 4, !tbaa !9
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %25) #1
  %50 = load float, ptr %49, align 4, !tbaa !9
  %51 = fadd float %48, %50
  %52 = shl nsw i32 %28, 2
  %53 = sext i32 %52 to i64
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %53) #1
  %55 = load float, ptr %54, align 4, !tbaa !9
  %56 = or disjoint i32 %52, 1
  %57 = sext i32 %56 to i64
  %58 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %57) #1
  %59 = load float, ptr %58, align 4, !tbaa !9
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %53) #1
  %61 = load float, ptr %60, align 4, !tbaa !9
  %62 = or disjoint i32 %52, 2
  %63 = sext i32 %62 to i64
  %64 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %63) #1
  %65 = load float, ptr %64, align 4, !tbaa !9
  %66 = fadd float %61, %65
  %67 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %57) #1
  %68 = load float, ptr %67, align 4, !tbaa !9
  %69 = or disjoint i32 %52, 3
  %70 = sext i32 %69 to i64
  %71 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %70) #1
  %72 = load float, ptr %71, align 4, !tbaa !9
  %73 = fadd float %68, %72
  %74 = tail call noundef float @_ZN10fastdeploy6vision9detectionL16CalculateOverlapEffffffff(float noundef %39, float noundef %41, float noundef %46, float noundef %51, float noundef %55, float noundef %59, float noundef %66, float noundef %73)
  %75 = fcmp ogt float %74, %4
  br i1 %75, label %76, label %78

76:                                               ; preds = %37
  %77 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv61) #1
  store i32 -1, ptr %77, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %37, %76, %31, %26
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next62, %wide.trip.count68
  br i1 %exitcond.not, label %.loopexit, label %26, !llvm.loop !11

.loopexit:                                        ; preds = %78, %.lr.ph60..loopexit_crit_edge, %12
  %indvars.iv.next65.pre-phi = phi i64 [ %.pre, %.lr.ph60..loopexit_crit_edge ], [ %14, %12 ], [ %14, %78 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond69.not = icmp eq i64 %indvars.iv.next65.pre-phi, %wide.trip.count68
  br i1 %exitcond69.not, label %._crit_edge, label %.lr.ph60, !llvm.loop !13
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef float @_ZN10fastdeploy6vision9detectionL16CalculateOverlapEffffffff(float noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #0

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass