; LLVM IR from sympiler/nasoq :: src/common/Etree.ll (ZN5nasoq6etreeCEPNS_12sympiler_CSCEPiRi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.nasoq::sympiler_CSC" = type { i64, i64, i64, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef, i32 noundef, ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5nasoq6etreeCEPNS_12sympiler_CSCEPiRi(ptr noundef %0, ptr noundef %1, ptr noundef nonnull align 4 dereferenceable(4) %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i64, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #8
  store i32 1, ptr %24, align 4, !tbaa !9
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 1, ptr %26, align 4, !tbaa !9
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %27, i32 0, i32 8
  %29 = load i32, ptr %28, align 8, !tbaa !11
  store i32 %29, ptr %22, align 4, !tbaa !9
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %30, i32 0, i32 0
  %32 = load i64, ptr %31, align 8, !tbaa !14
  %33 = load i32, ptr %22, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %3
  br label %40

36:                                               ; preds = %3
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %37, i32 0, i32 1
  %39 = load i64, ptr %38, align 8, !tbaa !15
  br label %40

40:                                               ; preds = %36, %35
  %41 = phi i64 [ 0, %35 ], [ %39, %36 ]
  %42 = call noundef i64 @_ZN5nasoq10add_size_tEmmPi(i64 noundef %32, i64 noundef %41, ptr noundef %24)
  store i64 %42, ptr %23, align 8, !tbaa !16
  %43 = load i32, ptr %24, align 4, !tbaa !9
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %46, label %45

45:                                               ; preds = %40
  store i32 0, ptr %4, align 4
  store i32 1, ptr %25, align 4
  br label %243

46:                                               ; preds = %40
  %47 = load i64, ptr %23, align 8, !tbaa !16
  %48 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %47, i64 4)
  %49 = extractvalue { i64, i1 } %48, 1
  %50 = extractvalue { i64, i1 } %48, 0
  %51 = select i1 %49, i64 -1, i64 %50
  %52 = call noalias noundef nonnull ptr @_Znam(i64 noundef %51) #9
  call void @llvm.memset.p0.i64(ptr align 4 %52, i8 0, i64 %51, i1 false)
  store ptr %52, ptr %13, align 8, !tbaa !5
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %53, i32 0, i32 1
  %55 = load i64, ptr %54, align 8, !tbaa !15
  %56 = trunc i64 %55 to i32
  store i32 %56, ptr %20, align 4, !tbaa !9
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %57, i32 0, i32 0
  %59 = load i64, ptr %58, align 8, !tbaa !14
  %60 = trunc i64 %59 to i32
  store i32 %60, ptr %19, align 4, !tbaa !9
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %61, i32 0, i32 3
  %63 = load ptr, ptr %62, align 8, !tbaa !17
  store ptr %63, ptr %8, align 8, !tbaa !5
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %64, i32 0, i32 4
  %66 = load ptr, ptr %65, align 8, !tbaa !18
  store ptr %66, ptr %9, align 8, !tbaa !5
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %67, i32 0, i32 5
  %69 = load ptr, ptr %68, align 8, !tbaa !19
  store ptr %69, ptr %10, align 8, !tbaa !5
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %70, i32 0, i32 13
  %72 = load i32, ptr %71, align 4, !tbaa !20
  store i32 %72, ptr %21, align 4, !tbaa !9
  %73 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %73, ptr %11, align 8, !tbaa !5
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %87, %46
  %75 = load i32, ptr %15, align 4, !tbaa !9
  %76 = load i32, ptr %20, align 4, !tbaa !9
  %77 = icmp slt i32 %75, %76
  br i1 %77, label %78, label %90

78:                                               ; preds = %74
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = load i32, ptr %15, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds i32, ptr %79, i64 %81
  store i32 -1, ptr %82, align 4, !tbaa !9
  %83 = load ptr, ptr %11, align 8, !tbaa !5
  %84 = load i32, ptr %15, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds i32, ptr %83, i64 %85
  store i32 -1, ptr %86, align 4, !tbaa !9
  br label %87

87:                                               ; preds = %78
  %88 = load i32, ptr %15, align 4, !tbaa !9
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %15, align 4, !tbaa !9
  br label %74, !llvm.loop !21

90:                                               ; preds = %74
  %91 = load i32, ptr %22, align 4, !tbaa !9
  %92 = icmp sgt i32 %91, 0
  br i1 %92, label %93, label %150

93:                                               ; preds = %90
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %94

94:                                               ; preds = %146, %93
  %95 = load i32, ptr %15, align 4, !tbaa !9
  %96 = load i32, ptr %20, align 4, !tbaa !9
  %97 = icmp slt i32 %95, %96
  br i1 %97, label %98, label %149

98:                                               ; preds = %94
  %99 = load ptr, ptr %8, align 8, !tbaa !5
  %100 = load i32, ptr %15, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds i32, ptr %99, i64 %101
  %103 = load i32, ptr %102, align 4, !tbaa !9
  store i32 %103, ptr %17, align 4, !tbaa !9
  %104 = load i32, ptr %21, align 4, !tbaa !9
  %105 = icmp ne i32 %104, 0
  br i1 %105, label %106, label %113

106:                                              ; preds = %98
  %107 = load ptr, ptr %8, align 8, !tbaa !5
  %108 = load i32, ptr %15, align 4, !tbaa !9
  %109 = add nsw i32 %108, 1
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds i32, ptr %107, i64 %110
  %112 = load i32, ptr %111, align 4, !tbaa !9
  br label %121

113:                                              ; preds = %98
  %114 = load i32, ptr %17, align 4, !tbaa !9
  %115 = load ptr, ptr %10, align 8, !tbaa !5
  %116 = load i32, ptr %15, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds i32, ptr %115, i64 %117
  %119 = load i32, ptr %118, align 4, !tbaa !9
  %120 = add nsw i32 %114, %119
  br label %121

121:                                              ; preds = %113, %106
  %122 = phi i32 [ %112, %106 ], [ %120, %113 ]
  store i32 %122, ptr %18, align 4, !tbaa !9
  br label %123

123:                                              ; preds = %142, %121
  %124 = load i32, ptr %17, align 4, !tbaa !9
  %125 = load i32, ptr %18, align 4, !tbaa !9
  %126 = icmp slt i32 %124, %125
  br i1 %126, label %127, label %145

127:                                              ; preds = %123
  %128 = load ptr, ptr %9, align 8, !tbaa !5
  %129 = load i32, ptr %17, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = getelementptr inbounds i32, ptr %128, i64 %130
  %132 = load i32, ptr %131, align 4, !tbaa !9
  store i32 %132, ptr %14, align 4, !tbaa !9
  %133 = load i32, ptr %14, align 4, !tbaa !9
  %134 = load i32, ptr %15, align 4, !tbaa !9
  %135 = icmp slt i32 %133, %134
  br i1 %135, label %136, label %141

136:                                              ; preds = %127
  %137 = load i32, ptr %14, align 4, !tbaa !9
  %138 = load i32, ptr %15, align 4, !tbaa !9
  %139 = load ptr, ptr %6, align 8, !tbaa !5
  %140 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef %137, i32 noundef %138, ptr noundef %139, ptr noundef %140)
  br label %141

141:                                              ; preds = %136, %127
  br label %142

142:                                              ; preds = %141
  %143 = load i32, ptr %17, align 4, !tbaa !9
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %17, align 4, !tbaa !9
  br label %123, !llvm.loop !23

145:                                              ; preds = %123
  br label %146

146:                                              ; preds = %145
  %147 = load i32, ptr %15, align 4, !tbaa !9
  %148 = add nsw i32 %147, 1
  store i32 %148, ptr %15, align 4, !tbaa !9
  br label %94, !llvm.loop !24

149:                                              ; preds = %94
  br label %238

150:                                              ; preds = %90
  %151 = load i32, ptr %22, align 4, !tbaa !9
  %152 = icmp eq i32 %151, 0
  br i1 %152, label %153, label %236

153:                                              ; preds = %150
  %154 = load ptr, ptr %13, align 8, !tbaa !5
  %155 = load i32, ptr %20, align 4, !tbaa !9
  %156 = sext i32 %155 to i64
  %157 = getelementptr inbounds i32, ptr %154, i64 %156
  store ptr %157, ptr %12, align 8, !tbaa !5
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %158

158:                                              ; preds = %167, %153
  %159 = load i32, ptr %14, align 4, !tbaa !9
  %160 = load i32, ptr %19, align 4, !tbaa !9
  %161 = icmp slt i32 %159, %160
  br i1 %161, label %162, label %170

162:                                              ; preds = %158
  %163 = load ptr, ptr %12, align 8, !tbaa !5
  %164 = load i32, ptr %14, align 4, !tbaa !9
  %165 = sext i32 %164 to i64
  %166 = getelementptr inbounds i32, ptr %163, i64 %165
  store i32 -1, ptr %166, align 4, !tbaa !9
  br label %167

167:                                              ; preds = %162
  %168 = load i32, ptr %14, align 4, !tbaa !9
  %169 = add nsw i32 %168, 1
  store i32 %169, ptr %14, align 4, !tbaa !9
  br label %158, !llvm.loop !25

170:                                              ; preds = %158
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %171

171:                                              ; preds = %232, %170
  %172 = load i32, ptr %15, align 4, !tbaa !9
  %173 = load i32, ptr %20, align 4, !tbaa !9
  %174 = icmp slt i32 %172, %173
  br i1 %174, label %175, label %235

175:                                              ; preds = %171
  %176 = load ptr, ptr %8, align 8, !tbaa !5
  %177 = load i32, ptr %15, align 4, !tbaa !9
  %178 = sext i32 %177 to i64
  %179 = getelementptr inbounds i32, ptr %176, i64 %178
  %180 = load i32, ptr %179, align 4, !tbaa !9
  store i32 %180, ptr %17, align 4, !tbaa !9
  %181 = load i32, ptr %21, align 4, !tbaa !9
  %182 = icmp ne i32 %181, 0
  br i1 %182, label %183, label %190

183:                                              ; preds = %175
  %184 = load ptr, ptr %8, align 8, !tbaa !5
  %185 = load i32, ptr %15, align 4, !tbaa !9
  %186 = add nsw i32 %185, 1
  %187 = sext i32 %186 to i64
  %188 = getelementptr inbounds i32, ptr %184, i64 %187
  %189 = load i32, ptr %188, align 4, !tbaa !9
  br label %198

190:                                              ; preds = %175
  %191 = load i32, ptr %17, align 4, !tbaa !9
  %192 = load ptr, ptr %10, align 8, !tbaa !5
  %193 = load i32, ptr %15, align 4, !tbaa !9
  %194 = sext i32 %193 to i64
  %195 = getelementptr inbounds i32, ptr %192, i64 %194
  %196 = load i32, ptr %195, align 4, !tbaa !9
  %197 = add nsw i32 %191, %196
  br label %198

198:                                              ; preds = %190, %183
  %199 = phi i32 [ %189, %183 ], [ %197, %190 ]
  store i32 %199, ptr %18, align 4, !tbaa !9
  br label %200

200:                                              ; preds = %228, %198
  %201 = load i32, ptr %17, align 4, !tbaa !9
  %202 = load i32, ptr %18, align 4, !tbaa !9
  %203 = icmp slt i32 %201, %202
  br i1 %203, label %204, label %231

204:                                              ; preds = %200
  %205 = load ptr, ptr %9, align 8, !tbaa !5
  %206 = load i32, ptr %17, align 4, !tbaa !9
  %207 = sext i32 %206 to i64
  %208 = getelementptr inbounds i32, ptr %205, i64 %207
  %209 = load i32, ptr %208, align 4, !tbaa !9
  store i32 %209, ptr %14, align 4, !tbaa !9
  %210 = load ptr, ptr %12, align 8, !tbaa !5
  %211 = load i32, ptr %14, align 4, !tbaa !9
  %212 = sext i32 %211 to i64
  %213 = getelementptr inbounds i32, ptr %210, i64 %212
  %214 = load i32, ptr %213, align 4, !tbaa !9
  store i32 %214, ptr %16, align 4, !tbaa !9
  %215 = load i32, ptr %16, align 4, !tbaa !9
  %216 = icmp ne i32 %215, -1
  br i1 %216, label %217, label %222

217:                                              ; preds = %204
  %218 = load i32, ptr %16, align 4, !tbaa !9
  %219 = load i32, ptr %15, align 4, !tbaa !9
  %220 = load ptr, ptr %6, align 8, !tbaa !5
  %221 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef %218, i32 noundef %219, ptr noundef %220, ptr noundef %221)
  br label %222

222:                                              ; preds = %217, %204
  %223 = load i32, ptr %15, align 4, !tbaa !9
  %224 = load ptr, ptr %12, align 8, !tbaa !5
  %225 = load i32, ptr %14, align 4, !tbaa !9
  %226 = sext i32 %225 to i64
  %227 = getelementptr inbounds i32, ptr %224, i64 %226
  store i32 %223, ptr %227, align 4, !tbaa !9
  br label %228

228:                                              ; preds = %222
  %229 = load i32, ptr %17, align 4, !tbaa !9
  %230 = add nsw i32 %229, 1
  store i32 %230, ptr %17, align 4, !tbaa !9
  br label %200, !llvm.loop !26

231:                                              ; preds = %200
  br label %232

232:                                              ; preds = %231
  %233 = load i32, ptr %15, align 4, !tbaa !9
  %234 = add nsw i32 %233, 1
  store i32 %234, ptr %15, align 4, !tbaa !9
  br label %171, !llvm.loop !27

235:                                              ; preds = %171
  br label %237

236:                                              ; preds = %150
  store i32 0, ptr %4, align 4
  store i32 1, ptr %25, align 4
  br label %243

237:                                              ; preds = %235
  br label %238

238:                                              ; preds = %237, %149
  %239 = load ptr, ptr %13, align 8, !tbaa !5
  %240 = icmp eq ptr %239, null
  br i1 %240, label %242, label %241

241:                                              ; preds = %238
  call void @_ZdaPv(ptr noundef %239) #10
  br label %242

242:                                              ; preds = %241, %238
  store i32 1, ptr %4, align 4
  store i32 1, ptr %25, align 4
  br label %243

243:                                              ; preds = %242, %236, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  %244 = load i32, ptr %4, align 4
  ret i32 %244
}

declare noundef i64 @_ZN5nasoq10add_size_tEmmPi(i64 noundef, i64 noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #5

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #7

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 64}
!12 = !{!"_ZTSN5nasoq12sympiler_CSCE", !13, i64 0, !13, i64 8, !13, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 0}
!15 = !{!12, !13, i64 8}
!16 = !{!13, !13, i64 0}
!17 = !{!12, !6, i64 24}
!18 = !{!12, !6, i64 32}
!19 = !{!12, !6, i64 40}
!20 = !{!12, !10, i64 84}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = distinct !{!23, !22}
!24 = distinct !{!24, !22}
!25 = distinct !{!25, !22}
!26 = distinct !{!26, !22}
!27 = distinct !{!27, !22}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 2) i32 @_ZN5nasoq6etreeCEPNS_12sympiler_CSCEPiRi(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %2) local_unnamed_addr #2 {
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #7
  store i32 1, ptr %4, align 4, !tbaa !5
  store i32 1, ptr %2, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 64
  %6 = load i32, ptr %5, align 8, !tbaa !9
  %7 = load i64, ptr %0, align 8, !tbaa !13
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %8, label %11

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load i64, ptr %9, align 8, !tbaa !14
  br label %11

11:                                               ; preds = %3, %8
  %12 = phi i64 [ %10, %8 ], [ 0, %3 ]
  %13 = call noundef i64 @_ZN5nasoq10add_size_tEmmPi(i64 noundef %7, i64 noundef %12, ptr noundef nonnull %4)
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %.not86 = icmp eq i32 %14, 0
  br i1 %.not86, label %95, label %15

15:                                               ; preds = %11
  %16 = icmp ugt i64 %13, 4611686018427387903
  %17 = shl nuw i64 %13, 2
  %18 = select i1 %16, i64 -1, i64 %17
  %19 = call noalias noundef nonnull ptr @_Znam(i64 noundef %18) #8
  call void @llvm.memset.p0.i64(ptr nonnull align 4 %19, i8 0, i64 %18, i1 false)
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load i64, ptr %20, align 8, !tbaa !14
  %22 = trunc i64 %21 to i32
  %23 = load i64, ptr %0, align 8, !tbaa !13
  %24 = trunc i64 %23 to i32
  %25 = getelementptr inbounds i8, ptr %0, i64 24
  %26 = load ptr, ptr %25, align 8, !tbaa !15
  %27 = getelementptr inbounds i8, ptr %0, i64 32
  %28 = load ptr, ptr %27, align 8, !tbaa !16
  %29 = getelementptr inbounds i8, ptr %0, i64 40
  %30 = load ptr, ptr %29, align 8, !tbaa !17
  %31 = getelementptr inbounds i8, ptr %0, i64 84
  %32 = load i32, ptr %31, align 4, !tbaa !18
  %33 = icmp sgt i32 %22, 0
  br i1 %33, label %._crit_edge, label %._crit_edge.thread

._crit_edge:                                      ; preds = %15
  %34 = shl i64 %21, 2
  %35 = and i64 %34, 8589934588
  call void @llvm.memset.p0.i64(ptr align 4 %1, i8 -1, i64 %35, i1 false), !tbaa !5
  call void @llvm.memset.p0.i64(ptr nonnull align 4 %19, i8 -1, i64 %35, i1 false), !tbaa !5
  %36 = icmp sgt i32 %6, 0
  br i1 %36, label %.lr.ph107, label %67

._crit_edge.thread:                               ; preds = %15
  %37 = icmp sgt i32 %6, 0
  br i1 %37, label %.loopexit, label %67

.lr.ph107:                                        ; preds = %._crit_edge
  %.not89 = icmp eq i32 %32, 0
  %wide.trip.count133 = and i64 %21, 2147483647
  br i1 %.not89, label %.lr.ph107.split.us, label %.lr.ph107.split

.lr.ph107.split.us:                               ; preds = %.lr.ph107, %._crit_edge105.us
  %indvars.iv130 = phi i64 [ %indvars.iv.next131, %._crit_edge105.us ], [ 0, %.lr.ph107 ]
  %38 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv130
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = icmp sgt i32 %39, 0
  br i1 %40, label %.lr.ph104.us.preheader, label %._crit_edge105.us

.lr.ph104.us.preheader:                           ; preds = %.lr.ph107.split.us
  %41 = getelementptr inbounds i32, ptr %26, i64 %indvars.iv130
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = add nsw i32 %39, %42
  %44 = sext i32 %42 to i64
  %45 = sext i32 %43 to i64
  %46 = trunc nuw nsw i64 %indvars.iv130 to i32
  br label %.lr.ph104.us

._crit_edge105.us:                                ; preds = %52, %.lr.ph107.split.us
  %indvars.iv.next131 = add nuw nsw i64 %indvars.iv130, 1
  %exitcond134.not = icmp eq i64 %indvars.iv.next131, %wide.trip.count133
  br i1 %exitcond134.not, label %.loopexit, label %.lr.ph107.split.us, !llvm.loop !19

.lr.ph104.us:                                     ; preds = %.lr.ph104.us.preheader, %52
  %indvars.iv127 = phi i64 [ %44, %.lr.ph104.us.preheader ], [ %indvars.iv.next128, %52 ]
  %47 = getelementptr inbounds i32, ptr %28, i64 %indvars.iv127
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = icmp sgt i64 %indvars.iv130, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %.lr.ph104.us
  call void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef %48, i32 noundef %46, ptr noundef %1, ptr noundef nonnull %19)
  br label %52

52:                                               ; preds = %51, %.lr.ph104.us
  %indvars.iv.next128 = add nsw i64 %indvars.iv127, 1
  %53 = icmp slt i64 %indvars.iv.next128, %45
  br i1 %53, label %.lr.ph104.us, label %._crit_edge105.us, !llvm.loop !21

.lr.ph107.split:                                  ; preds = %.lr.ph107, %._crit_edge105
  %indvars.iv122 = phi i64 [ %indvars.iv.next123, %._crit_edge105 ], [ 0, %.lr.ph107 ]
  %54 = getelementptr inbounds i32, ptr %26, i64 %indvars.iv122
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = getelementptr inbounds i8, ptr %54, i64 4
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = icmp slt i32 %55, %57
  br i1 %58, label %.lr.ph104.preheader, label %._crit_edge105

.lr.ph104.preheader:                              ; preds = %.lr.ph107.split
  %59 = sext i32 %55 to i64
  %60 = trunc nuw nsw i64 %indvars.iv122 to i32
  br label %.lr.ph104

.lr.ph104:                                        ; preds = %.lr.ph104.preheader, %66
  %indvars.iv117 = phi i64 [ %59, %.lr.ph104.preheader ], [ %indvars.iv.next118, %66 ]
  %61 = getelementptr inbounds i32, ptr %28, i64 %indvars.iv117
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = icmp sgt i64 %indvars.iv122, %63
  br i1 %64, label %65, label %66

65:                                               ; preds = %.lr.ph104
  call void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef %62, i32 noundef %60, ptr noundef %1, ptr noundef nonnull %19)
  br label %66

66:                                               ; preds = %.lr.ph104, %65
  %indvars.iv.next118 = add nsw i64 %indvars.iv117, 1
  %lftr.wideiv120 = trunc i64 %indvars.iv.next118 to i32
  %exitcond121.not = icmp eq i32 %57, %lftr.wideiv120
  br i1 %exitcond121.not, label %._crit_edge105, label %.lr.ph104, !llvm.loop !21

._crit_edge105:                                   ; preds = %66, %.lr.ph107.split
  %indvars.iv.next123 = add nuw nsw i64 %indvars.iv122, 1
  %exitcond126.not = icmp eq i64 %indvars.iv.next123, %wide.trip.count133
  br i1 %exitcond126.not, label %.loopexit, label %.lr.ph107.split, !llvm.loop !19

67:                                               ; preds = %._crit_edge.thread, %._crit_edge
  br i1 %.not, label %68, label %95

68:                                               ; preds = %67
  %sext = shl i64 %21, 32
  %69 = ashr exact i64 %sext, 30
  %70 = getelementptr i8, ptr %19, i64 %69
  %71 = icmp sgt i32 %24, 0
  br i1 %71, label %.lr.ph95.preheader, label %.preheader90

.lr.ph95.preheader:                               ; preds = %68
  %72 = shl i64 %23, 2
  %73 = and i64 %72, 8589934588
  call void @llvm.memset.p0.i64(ptr align 4 %70, i8 -1, i64 %73, i1 false), !tbaa !5
  br label %.preheader90

.preheader90:                                     ; preds = %.lr.ph95.preheader, %68
  br i1 %33, label %.lr.ph101, label %.loopexit

.lr.ph101:                                        ; preds = %.preheader90
  %.not87 = icmp eq i32 %32, 0
  %wide.trip.count = and i64 %21, 2147483647
  br label %74

74:                                               ; preds = %.lr.ph101, %._crit_edge99
  %indvars.iv113 = phi i64 [ 0, %.lr.ph101 ], [ %indvars.iv.next114, %._crit_edge99 ]
  %75 = getelementptr inbounds i32, ptr %26, i64 %indvars.iv113
  %76 = load i32, ptr %75, align 4, !tbaa !5
  br i1 %.not87, label %80, label %77

77:                                               ; preds = %74
  %78 = getelementptr inbounds i8, ptr %75, i64 4
  %79 = load i32, ptr %78, align 4, !tbaa !5
  br label %84

80:                                               ; preds = %74
  %81 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv113
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = add nsw i32 %82, %76
  br label %84

84:                                               ; preds = %80, %77
  %85 = phi i32 [ %79, %77 ], [ %83, %80 ]
  %86 = icmp slt i32 %76, %85
  br i1 %86, label %.lr.ph98.preheader, label %._crit_edge99

.lr.ph98.preheader:                               ; preds = %84
  %87 = sext i32 %76 to i64
  %88 = trunc nuw nsw i64 %indvars.iv113 to i32
  %.pre = trunc nuw nsw i64 %indvars.iv113 to i32
  br label %.lr.ph98

.lr.ph98:                                         ; preds = %.lr.ph98.preheader, %.lr.ph98._crit_edge
  %indvars.iv = phi i64 [ %87, %.lr.ph98.preheader ], [ %indvars.iv.next, %.lr.ph98._crit_edge ]
  %89 = getelementptr inbounds i32, ptr %28, i64 %indvars.iv
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds i32, ptr %70, i64 %91
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %.not88 = icmp eq i32 %93, -1
  br i1 %.not88, label %.lr.ph98._crit_edge, label %94

94:                                               ; preds = %.lr.ph98
  call void @_ZN5nasoq12update_etreeEiiPiS0_(i32 noundef %93, i32 noundef %88, ptr noundef %1, ptr noundef nonnull %19)
  br label %.lr.ph98._crit_edge

.lr.ph98._crit_edge:                              ; preds = %.lr.ph98, %94
  %.pre-phi = phi i32 [ %88, %94 ], [ %.pre, %.lr.ph98 ]
  store i32 %.pre-phi, ptr %92, align 4, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %85, %lftr.wideiv
  br i1 %exitcond.not, label %._crit_edge99, label %.lr.ph98, !llvm.loop !22

._crit_edge99:                                    ; preds = %.lr.ph98._crit_edge, %84
  %indvars.iv.next114 = add nuw nsw i64 %indvars.iv113, 1
  %exitcond116.not = icmp eq i64 %indvars.iv.next114, %wide.trip.count
  br i1 %exitcond116.not, label %.loopexit, label %74, !llvm.loop !23

.loopexit:                                        ; preds = %._crit_edge99, %._crit_edge105, %._crit_edge105.us, %._crit_edge.thread, %.preheader90
  call void @_ZdaPv(ptr noundef nonnull %19) #9
  br label %95

95:                                               ; preds = %67, %11, %.loopexit
  %.0 = phi i32 [ 1, %.loopexit ], [ 0, %11 ], [ 0, %67 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #7
  ret i32 %.0
}

declare noundef i64 @_ZN5nasoq10add_size_tEmmPi(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #6

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 64}
!10 = !{!"_ZTSN5nasoq12sympiler_CSCE", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !11, i64 0}
!14 = !{!10, !11, i64 8}
!15 = !{!10, !12, i64 24}
!16 = !{!10, !12, i64 32}
!17 = !{!10, !12, i64 40}
!18 = !{!10, !6, i64 84}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = distinct !{!22, !20}
!23 = distinct !{!23, !20}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass