; LLVM IR from kazunetakahashi/atcoder :: 2018/0224_AGC021/C.ll (Z4makev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@X = external dso_local global i32, align 4
@Y = external dso_local global i32, align 4
@A = external dso_local global i32, align 4
@B = external dso_local global i32, align 4
@F = external dso_local global [1020 x [1020 x i8]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5flushv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z13standard_makev() #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4makev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = load i32, ptr @X, align 4, !tbaa !5
  %4 = srem i32 %3, 2
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %6, label %39

6:                                                ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %35, %6
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = add nsw i32 %8, 1
  %10 = load i32, ptr @Y, align 4, !tbaa !5
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %38

13:                                               ; preds = %7
  %14 = load i32, ptr @A, align 4, !tbaa !5
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %16, label %34

16:                                               ; preds = %13
  %17 = load i32, ptr @X, align 4, !tbaa !5
  %18 = sub nsw i32 %17, 1
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %19
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [1020 x i8], ptr %20, i64 0, i64 %22
  store i8 60, ptr %23, align 1, !tbaa !9
  %24 = load i32, ptr @X, align 4, !tbaa !5
  %25 = sub nsw i32 %24, 1
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %26
  %28 = load i32, ptr %1, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [1020 x i8], ptr %27, i64 0, i64 %30
  store i8 62, ptr %31, align 1, !tbaa !9
  %32 = load i32, ptr @A, align 4, !tbaa !5
  %33 = add nsw i32 %32, -1
  store i32 %33, ptr @A, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %16, %13
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %1, align 4, !tbaa !5
  %37 = add nsw i32 %36, 2
  store i32 %37, ptr %1, align 4, !tbaa !5
  br label %7, !llvm.loop !10

38:                                               ; preds = %12
  br label %39

39:                                               ; preds = %38, %0
  %40 = load i32, ptr @Y, align 4, !tbaa !5
  %41 = srem i32 %40, 2
  %42 = icmp eq i32 %41, 1
  br i1 %42, label %43, label %76

43:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %72, %43
  %45 = load i32, ptr %2, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  %47 = load i32, ptr @X, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %75

50:                                               ; preds = %44
  %51 = load i32, ptr @B, align 4, !tbaa !5
  %52 = icmp sgt i32 %51, 0
  br i1 %52, label %53, label %71

53:                                               ; preds = %50
  %54 = load i32, ptr %2, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %55
  %57 = load i32, ptr @Y, align 4, !tbaa !5
  %58 = sub nsw i32 %57, 1
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [1020 x i8], ptr %56, i64 0, i64 %59
  store i8 94, ptr %60, align 1, !tbaa !9
  %61 = load i32, ptr %2, align 4, !tbaa !5
  %62 = add nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %63
  %65 = load i32, ptr @Y, align 4, !tbaa !5
  %66 = sub nsw i32 %65, 1
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds [1020 x i8], ptr %64, i64 0, i64 %67
  store i8 118, ptr %68, align 1, !tbaa !9
  %69 = load i32, ptr @B, align 4, !tbaa !5
  %70 = add nsw i32 %69, -1
  store i32 %70, ptr @B, align 4, !tbaa !5
  br label %71

71:                                               ; preds = %53, %50
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %2, align 4, !tbaa !5
  %74 = add nsw i32 %73, 2
  store i32 %74, ptr %2, align 4, !tbaa !5
  br label %44, !llvm.loop !12

75:                                               ; preds = %49
  br label %76

76:                                               ; preds = %75, %39
  call void @_Z13standard_makev()
  call void @_Z5flushv()
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@X = external dso_local local_unnamed_addr global i32, align 4
@Y = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local local_unnamed_addr global i32, align 4
@B = external dso_local local_unnamed_addr global i32, align 4
@F = external dso_local local_unnamed_addr global [1020 x [1020 x i8]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5flushv() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z13standard_makev() local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4makev() local_unnamed_addr #0 {
  %1 = load i32, ptr @X, align 4, !tbaa !5
  %2 = and i32 %1, -2147483647
  %3 = icmp eq i32 %2, 1
  %.pre = load i32, ptr @Y, align 4, !tbaa !5
  %4 = icmp sgt i32 %.pre, 1
  %or.cond = select i1 %3, i1 %4, i1 false
  br i1 %or.cond, label %.lr.ph, label %.loopexit12

.lr.ph:                                           ; preds = %0
  %A.promoted = load i32, ptr @A, align 4, !tbaa !5
  %5 = add nsw i32 %1, -1
  %6 = zext nneg i32 %5 to i64
  %7 = zext nneg i32 %.pre to i64
  br label %8

8:                                                ; preds = %.lr.ph, %16
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %16 ]
  %9 = phi i32 [ %A.promoted, %.lr.ph ], [ %17, %16 ]
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %11, label %16

11:                                               ; preds = %8
  %12 = or disjoint i64 %indvars.iv, 1
  %13 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %6, i64 %indvars.iv
  store i8 60, ptr %13, align 2, !tbaa !9
  %14 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %6, i64 %12
  store i8 62, ptr %14, align 1, !tbaa !9
  %15 = add nsw i32 %9, -1
  store i32 %15, ptr @A, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %8, %11
  %17 = phi i32 [ %9, %8 ], [ %15, %11 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
  %18 = or disjoint i64 %indvars.iv.next, 1
  %19 = icmp ult i64 %18, %7
  br i1 %19, label %8, label %.loopexit12, !llvm.loop !10

.loopexit12:                                      ; preds = %16, %0
  %20 = and i32 %.pre, -2147483647
  %21 = icmp eq i32 %20, 1
  %22 = icmp sgt i32 %1, 1
  %or.cond20 = and i1 %21, %22
  br i1 %or.cond20, label %.lr.ph15, label %.loopexit

.lr.ph15:                                         ; preds = %.loopexit12
  %B.promoted = load i32, ptr @B, align 4, !tbaa !5
  %23 = add nsw i32 %.pre, -1
  %24 = zext nneg i32 %23 to i64
  %25 = zext nneg i32 %1 to i64
  br label %26

26:                                               ; preds = %.lr.ph15, %34
  %indvars.iv17 = phi i64 [ 0, %.lr.ph15 ], [ %indvars.iv.next18, %34 ]
  %27 = phi i32 [ %B.promoted, %.lr.ph15 ], [ %35, %34 ]
  %28 = icmp sgt i32 %27, 0
  br i1 %28, label %29, label %34

29:                                               ; preds = %26
  %30 = or disjoint i64 %indvars.iv17, 1
  %31 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %indvars.iv17, i64 %24
  store i8 94, ptr %31, align 1, !tbaa !9
  %32 = getelementptr inbounds [1020 x [1020 x i8]], ptr @F, i64 0, i64 %30, i64 %24
  store i8 118, ptr %32, align 1, !tbaa !9
  %33 = add nsw i32 %27, -1
  store i32 %33, ptr @B, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %26, %29
  %35 = phi i32 [ %27, %26 ], [ %33, %29 ]
  %indvars.iv.next18 = add nuw nsw i64 %indvars.iv17, 2
  %36 = or disjoint i64 %indvars.iv.next18, 1
  %37 = icmp ult i64 %36, %25
  br i1 %37, label %26, label %.loopexit, !llvm.loop !12

.loopexit:                                        ; preds = %34, %.loopexit12
  tail call void @_Z13standard_makev()
  tail call void @_Z5flushv()
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass