; LLVM IR from ahampriyanshu/algo-ds-101 :: Algorithms/DP/TrappingWater/TrappingWater.ll (Z4trapRSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4trapRSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #2
  %11 = trunc i64 %10 to i32
  store i32 %11, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %12 = load i32, ptr %3, align 4, !tbaa !9
  %13 = sub nsw i32 %12, 1
  store i32 %13, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %84, %1
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp sle i32 %15, %16
  br i1 %17, label %18, label %85

18:                                               ; preds = %14
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %21) #2
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #2
  %28 = load i32, ptr %27, align 4, !tbaa !9
  %29 = icmp sle i32 %23, %28
  br i1 %29, label %30, label %57

30:                                               ; preds = %18
  %31 = load i32, ptr %5, align 4, !tbaa !9
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #2
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = icmp sle i32 %31, %36
  br i1 %37, label %38, label %44

38:                                               ; preds = %30
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !9
  store i32 %43, ptr %5, align 4, !tbaa !9
  br label %54

44:                                               ; preds = %30
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = load ptr, ptr %2, align 8, !tbaa !5
  %47 = load i32, ptr %4, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #2
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = sub nsw i32 %45, %50
  %52 = load i32, ptr %8, align 4, !tbaa !9
  %53 = add nsw i32 %52, %51
  store i32 %53, ptr %8, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %44, %38
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %4, align 4, !tbaa !9
  br label %84

57:                                               ; preds = %18
  %58 = load i32, ptr %6, align 4, !tbaa !9
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %61) #2
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = icmp sle i32 %58, %63
  br i1 %64, label %65, label %71

65:                                               ; preds = %57
  %66 = load ptr, ptr %2, align 8, !tbaa !5
  %67 = load i32, ptr %7, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #2
  %70 = load i32, ptr %69, align 4, !tbaa !9
  store i32 %70, ptr %6, align 4, !tbaa !9
  br label %81

71:                                               ; preds = %57
  %72 = load i32, ptr %6, align 4, !tbaa !9
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = load i32, ptr %7, align 4, !tbaa !9
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %75) #2
  %77 = load i32, ptr %76, align 4, !tbaa !9
  %78 = sub nsw i32 %72, %77
  %79 = load i32, ptr %8, align 4, !tbaa !9
  %80 = add nsw i32 %79, %78
  store i32 %80, ptr %8, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %71, %65
  %82 = load i32, ptr %7, align 4, !tbaa !9
  %83 = add nsw i32 %82, -1
  store i32 %83, ptr %7, align 4, !tbaa !9
  br label %84

84:                                               ; preds = %81, %54
  br label %14, !llvm.loop !11

85:                                               ; preds = %14
  %86 = load i32, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %86
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4trapRSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = trunc i64 %2 to i32
  %.not42 = icmp slt i32 %3, 1
  br i1 %.not42, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %4 = add nsw i32 %3, -1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %27
  %.047 = phi i32 [ %.3, %27 ], [ 0, %.lr.ph.preheader ]
  %.02846 = phi i32 [ %.129, %27 ], [ %4, %.lr.ph.preheader ]
  %.03045 = phi i32 [ %.232, %27 ], [ 0, %.lr.ph.preheader ]
  %.03344 = phi i32 [ %.235, %27 ], [ 0, %.lr.ph.preheader ]
  %.03643 = phi i32 [ %.137, %27 ], [ 0, %.lr.ph.preheader ]
  %5 = sext i32 %.03643 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = sext i32 %.02846 to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %8) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not38 = icmp sgt i32 %7, %10
  br i1 %.not38, label %19, label %11

11:                                               ; preds = %.lr.ph
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %5) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %.not40 = icmp sgt i32 %.03344, %13
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %5) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add i32 %.047, %.03344
  %17 = sub i32 %16, %15
  %.134 = select i1 %.not40, i32 %.03344, i32 %15
  %.1 = select i1 %.not40, i32 %17, i32 %.047
  %18 = add nsw i32 %.03643, 1
  br label %27

19:                                               ; preds = %.lr.ph
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %8) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %.not39 = icmp sgt i32 %.03045, %21
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %8) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = add i32 %.047, %.03045
  %25 = sub i32 %24, %23
  %.131 = select i1 %.not39, i32 %.03045, i32 %23
  %.2 = select i1 %.not39, i32 %25, i32 %.047
  %26 = add nsw i32 %.02846, -1
  br label %27

27:                                               ; preds = %19, %11
  %.137 = phi i32 [ %18, %11 ], [ %.03643, %19 ]
  %.235 = phi i32 [ %.134, %11 ], [ %.03344, %19 ]
  %.232 = phi i32 [ %.03045, %11 ], [ %.131, %19 ]
  %.129 = phi i32 [ %.02846, %11 ], [ %26, %19 ]
  %.3 = phi i32 [ %.1, %11 ], [ %.2, %19 ]
  %.not = icmp sgt i32 %.137, %.129
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %27, %1
  %.0.lcssa = phi i32 [ 0, %1 ], [ %.3, %27 ]
  ret i32 %.0.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass