; LLVM IR from Overload-Technologies/Overload :: Dependencies/assimp/code/AssetLib/FBX (FBXConverter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [119 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [24 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [28 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [12 x i8], align 1

declare void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN6Assimp3FBX12FBXConverter30NameTransformationCompPropertyENS1_18TransformationCompE(ptr noundef nonnull align 8 dereferenceable(489) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %6 = load ptr, ptr %4, align 8
  %7 = load i32, ptr %5, align 4, !tbaa !9
  switch i32 %7, label %25 [
    i32 3, label %8
    i32 4, label %9
    i32 5, label %10
    i32 6, label %11
    i32 7, label %12
    i32 8, label %13
    i32 9, label %14
    i32 10, label %15
    i32 11, label %16
    i32 12, label %17
    i32 13, label %18
    i32 16, label %19
    i32 15, label %20
    i32 14, label %21
    i32 0, label %22
    i32 1, label %23
    i32 2, label %24
    i32 17, label %25
  ]

8:                                                ; preds = %2
  store ptr @.str.32, ptr %3, align 8
  br label %26

9:                                                ; preds = %2
  store ptr @.str.16, ptr %3, align 8
  br label %26

10:                                               ; preds = %2
  store ptr @.str.17, ptr %3, align 8
  br label %26

11:                                               ; preds = %2
  store ptr @.str.18, ptr %3, align 8
  br label %26

12:                                               ; preds = %2
  store ptr @.str.33, ptr %3, align 8
  br label %26

13:                                               ; preds = %2
  store ptr @.str.20, ptr %3, align 8
  br label %26

14:                                               ; preds = %2
  store ptr @.str.21, ptr %3, align 8
  br label %26

15:                                               ; preds = %2
  store ptr @.str.22, ptr %3, align 8
  br label %26

16:                                               ; preds = %2
  store ptr @.str.23, ptr %3, align 8
  br label %26

17:                                               ; preds = %2
  store ptr @.str.34, ptr %3, align 8
  br label %26

18:                                               ; preds = %2
  store ptr @.str.25, ptr %3, align 8
  br label %26

19:                                               ; preds = %2
  store ptr @.str.26, ptr %3, align 8
  br label %26

20:                                               ; preds = %2
  store ptr @.str.27, ptr %3, align 8
  br label %26

21:                                               ; preds = %2
  store ptr @.str.28, ptr %3, align 8
  br label %26

22:                                               ; preds = %2
  store ptr @.str.29, ptr %3, align 8
  br label %26

23:                                               ; preds = %2
  store ptr @.str.30, ptr %3, align 8
  br label %26

24:                                               ; preds = %2
  store ptr @.str.31, ptr %3, align 8
  br label %26

25:                                               ; preds = %2, %2
  call void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef @.str.10, ptr noundef @.str.5, i32 noundef 602)
  store ptr null, ptr %3, align 8
  br label %26

26:                                               ; preds = %25, %24, %23, %22, %21, %20, %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8
  %27 = load ptr, ptr %3, align 8
  ret ptr %27
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN6Assimp3FBX12FBXConverter18TransformationCompE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [119 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [24 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [28 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [12 x i8], align 1
@switch.table._ZN6Assimp3FBX12FBXConverter30NameTransformationCompPropertyENS1_18TransformationCompE = private unnamed_addr constant [17 x ptr] [ptr @.str.29, ptr @.str.30, ptr @.str.31, ptr @.str.32, ptr @.str.16, ptr @.str.17, ptr @.str.18, ptr @.str.33, ptr @.str.20, ptr @.str.21, ptr @.str.22, ptr @.str.23, ptr @.str.34, ptr @.str.25, ptr @.str.28, ptr @.str.27, ptr @.str.26], align 8

declare void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN6Assimp3FBX12FBXConverter30NameTransformationCompPropertyENS1_18TransformationCompE(ptr nocapture noundef nonnull readnone align 8 dereferenceable(489) %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = icmp ult i32 %1, 17
  br i1 %3, label %switch.lookup, label %4

4:                                                ; preds = %2
  tail call void @_ZN6Assimp17aiAssertViolationEPKcS1_i(ptr noundef nonnull @.str.10, ptr noundef nonnull @.str.5, i32 noundef 602)
  br label %6

switch.lookup:                                    ; preds = %2
  %5 = zext nneg i32 %1 to i64
  %switch.gep = getelementptr inbounds [17 x ptr], ptr @switch.table._ZN6Assimp3FBX12FBXConverter30NameTransformationCompPropertyENS1_18TransformationCompE, i64 0, i64 %5
  %switch.load = load ptr, ptr %switch.gep, align 8
  br label %6

6:                                                ; preds = %switch.lookup, %4
  %.0 = phi ptr [ null, %4 ], [ %switch.load, %switch.lookup ]
  ret ptr %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass