; LLVM IR from sympiler/nasoq :: src/common/def.ll (ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.nasoq::sympiler_CSC" = type { i64, i64, i64, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %61

13:                                               ; preds = %5
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %16, i32 0, i32 1
  store i64 %15, ptr %17, align 8, !tbaa !11
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %18, i32 0, i32 0
  store i64 %15, ptr %19, align 8, !tbaa !14
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %22, i32 0, i32 2
  store i64 %21, ptr %23, align 8, !tbaa !15
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %25, i32 0, i32 8
  store i32 %24, ptr %26, align 8, !tbaa !16
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %27, i32 0, i32 10
  store i32 1, ptr %28, align 8, !tbaa !17
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %29, i32 0, i32 13
  store i32 1, ptr %30, align 4, !tbaa !18
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %33, i64 4)
  %35 = extractvalue { i64, i1 } %34, 1
  %36 = extractvalue { i64, i1 } %34, 0
  %37 = select i1 %35, i64 -1, i64 %36
  %38 = call noalias noundef nonnull ptr @_Znam(i64 noundef %37) #6
  call void @llvm.memset.p0.i64(ptr align 4 %38, i8 0, i64 %37, i1 false)
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %39, i32 0, i32 3
  store ptr %38, ptr %40, align 8, !tbaa !19
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %42, i64 4)
  %44 = extractvalue { i64, i1 } %43, 1
  %45 = extractvalue { i64, i1 } %43, 0
  %46 = select i1 %44, i64 -1, i64 %45
  %47 = call noalias noundef nonnull ptr @_Znam(i64 noundef %46) #6
  call void @llvm.memset.p0.i64(ptr align 4 %47, i8 0, i64 %46, i1 false)
  %48 = load ptr, ptr %6, align 8, !tbaa !5
  %49 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %48, i32 0, i32 4
  store ptr %47, ptr %49, align 8, !tbaa !20
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %51, i64 8)
  %53 = extractvalue { i64, i1 } %52, 1
  %54 = extractvalue { i64, i1 } %52, 0
  %55 = select i1 %53, i64 -1, i64 %54
  %56 = call noalias noundef nonnull ptr @_Znam(i64 noundef %55) #6
  call void @llvm.memset.p0.i64(ptr align 8 %56, i8 0, i64 %55, i1 false)
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %57, i32 0, i32 6
  store ptr %56, ptr %58, align 8, !tbaa !21
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %59, i32 0, i32 5
  store ptr null, ptr %60, align 8, !tbaa !22
  br label %84

61:                                               ; preds = %5
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %62, i32 0, i32 3
  %64 = load ptr, ptr %63, align 8, !tbaa !19
  %65 = icmp eq ptr %64, null
  br i1 %65, label %67, label %66

66:                                               ; preds = %61
  call void @_ZdaPv(ptr noundef %64) #7
  br label %67

67:                                               ; preds = %66, %61
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %68, i32 0, i32 4
  %70 = load ptr, ptr %69, align 8, !tbaa !20
  %71 = icmp eq ptr %70, null
  br i1 %71, label %73, label %72

72:                                               ; preds = %67
  call void @_ZdaPv(ptr noundef %70) #7
  br label %73

73:                                               ; preds = %72, %67
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = getelementptr inbounds %"struct.nasoq::sympiler_CSC", ptr %74, i32 0, i32 6
  %76 = load ptr, ptr %75, align 8, !tbaa !21
  %77 = icmp eq ptr %76, null
  br i1 %77, label %79, label %78

78:                                               ; preds = %73
  call void @_ZdaPv(ptr noundef %76) #7
  br label %79

79:                                               ; preds = %78, %73
  %80 = load ptr, ptr %6, align 8, !tbaa !5
  %81 = icmp eq ptr %80, null
  br i1 %81, label %83, label %82

82:                                               ; preds = %79
  call void @_ZN5nasoq12sympiler_CSCD2Ev(ptr noundef nonnull align 8 dereferenceable(88) %80) #8
  call void @_ZdlPvm(ptr noundef %80, i64 noundef 88) #7
  br label %83

83:                                               ; preds = %82, %79
  br label %84

84:                                               ; preds = %83, %13
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5nasoq12sympiler_CSCD2Ev(ptr noundef nonnull align 8 dereferenceable(88)) unnamed_addr #5 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTSN5nasoq12sympiler_CSCE", !13, i64 0, !13, i64 8, !13, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 0}
!15 = !{!12, !13, i64 16}
!16 = !{!12, !10, i64 64}
!17 = !{!12, !10, i64 72}
!18 = !{!12, !10, i64 84}
!19 = !{!12, !6, i64 24}
!20 = !{!12, !6, i64 32}
!21 = !{!12, !6, i64 48}
!22 = !{!12, !6, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5nasoq10allocateACEPNS_12sympiler_CSCEiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %31, label %6

6:                                                ; preds = %5
  %7 = sext i32 %1 to i64
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 %7, ptr %8, align 8, !tbaa !5
  store i64 %7, ptr %0, align 8, !tbaa !12
  %9 = sext i32 %2 to i64
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  store i64 %9, ptr %10, align 8, !tbaa !13
  %11 = getelementptr inbounds i8, ptr %0, i64 64
  store i32 %3, ptr %11, align 8, !tbaa !14
  %12 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 1, ptr %12, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %0, i64 84
  store i32 1, ptr %13, align 4, !tbaa !16
  %14 = add nsw i32 %1, 1
  %15 = zext nneg i32 %14 to i64
  %16 = icmp slt i32 %1, -1
  %17 = shl nuw nsw i64 %15, 2
  %18 = select i1 %16, i64 -1, i64 %17
  %19 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %18) #5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 4 %19, i8 0, i64 %18, i1 false)
  %20 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr %19, ptr %20, align 8, !tbaa !17
  %21 = icmp slt i32 %2, 0
  %22 = shl nsw i64 %9, 2
  %23 = select i1 %21, i64 -1, i64 %22
  %24 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %23) #5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 4 %24, i8 0, i64 %23, i1 false)
  %25 = getelementptr inbounds i8, ptr %0, i64 32
  store ptr %24, ptr %25, align 8, !tbaa !18
  %26 = shl nsw i64 %9, 3
  %27 = select i1 %21, i64 -1, i64 %26
  %28 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %27) #5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 8 %28, i8 0, i64 %27, i1 false)
  %29 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %28, ptr %29, align 8, !tbaa !19
  %30 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr null, ptr %30, align 8, !tbaa !20
  br label %47

31:                                               ; preds = %5
  %32 = getelementptr inbounds i8, ptr %0, i64 24
  %33 = load ptr, ptr %32, align 8, !tbaa !17
  %34 = icmp eq ptr %33, null
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  tail call void @_ZdaPv(ptr noundef nonnull %33) #6
  br label %36

36:                                               ; preds = %35, %31
  %37 = getelementptr inbounds i8, ptr %0, i64 32
  %38 = load ptr, ptr %37, align 8, !tbaa !18
  %39 = icmp eq ptr %38, null
  br i1 %39, label %41, label %40

40:                                               ; preds = %36
  tail call void @_ZdaPv(ptr noundef nonnull %38) #6
  br label %41

41:                                               ; preds = %40, %36
  %42 = getelementptr inbounds i8, ptr %0, i64 48
  %43 = load ptr, ptr %42, align 8, !tbaa !19
  %44 = icmp eq ptr %43, null
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  tail call void @_ZdaPv(ptr noundef nonnull %43) #6
  br label %46

46:                                               ; preds = %41, %45
  tail call void @_ZN5nasoq12sympiler_CSCD2Ev(ptr noundef nonnull align 8 dereferenceable(88) %0) #7
  tail call void @_ZdlPvm(ptr noundef nonnull %0, i64 noundef 88) #6
  br label %47

47:                                               ; preds = %46, %6
  ret void
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5nasoq12sympiler_CSCD2Ev(ptr noundef nonnull align 8 dereferenceable(88)) unnamed_addr #4 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTSN5nasoq12sympiler_CSCE", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !11, i64 64}
!15 = !{!6, !11, i64 72}
!16 = !{!6, !11, i64 84}
!17 = !{!6, !10, i64 24}
!18 = !{!6, !10, i64 32}
!19 = !{!6, !10, i64 48}
!20 = !{!6, !10, i64 40}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass