; LLVM IR from ahampriyanshu/algo-ds-101 :: Algorithms/Searching/Binary-Search (search_in_2d_matrix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z12searchMatrixRSt6vectorIS_IiSaIiEESaIS1_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13) #2
  %15 = trunc i64 %14 to i32
  store i32 %15, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef 0) #2
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #2
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %20 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %20, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  br label %21

21:                                               ; preds = %71, %2
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %72

25:                                               ; preds = %21
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = sub nsw i32 %27, %28
  %30 = sdiv i32 %29, 2
  %31 = add nsw i32 %26, %30
  store i32 %31, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %5, align 4, !tbaa !9
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35) #2
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef 0) #2
  %38 = load i32, ptr %37, align 4, !tbaa !9
  %39 = icmp sge i32 %32, %38
  br i1 %39, label %40, label %53

40:                                               ; preds = %25
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #2
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = sub nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %48) #2
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = icmp sle i32 %41, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %40
  br label %72

53:                                               ; preds = %40, %25
  %54 = load i32, ptr %5, align 4, !tbaa !9
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = load i32, ptr %10, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %57) #2
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = sub nsw i32 %59, 1
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %61) #2
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = icmp sge i32 %54, %63
  br i1 %64, label %65, label %68

65:                                               ; preds = %53
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %8, align 4, !tbaa !9
  br label %70

68:                                               ; preds = %53
  %69 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %69, ptr %9, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %68, %65
  br label %71

71:                                               ; preds = %70
  br label %21, !llvm.loop !11

72:                                               ; preds = %52, %21
  store i32 0, ptr %8, align 4, !tbaa !9
  %73 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %73, ptr %9, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %115, %72
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = load i32, ptr %9, align 4, !tbaa !9
  %77 = icmp slt i32 %75, %76
  br i1 %77, label %78, label %116

78:                                               ; preds = %74
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %79 = load i32, ptr %8, align 4, !tbaa !9
  %80 = load i32, ptr %9, align 4, !tbaa !9
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = sub nsw i32 %80, %81
  %83 = sdiv i32 %82, 2
  %84 = add nsw i32 %79, %83
  store i32 %84, ptr %11, align 4, !tbaa !9
  %85 = load ptr, ptr %4, align 8, !tbaa !5
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #2
  %89 = load i32, ptr %11, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %90) #2
  %92 = load i32, ptr %91, align 4, !tbaa !9
  %93 = load i32, ptr %5, align 4, !tbaa !9
  %94 = icmp eq i32 %92, %93
  br i1 %94, label %95, label %96

95:                                               ; preds = %78
  store i1 true, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %113

96:                                               ; preds = %78
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %99) #2
  %101 = load i32, ptr %11, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #2
  %104 = load i32, ptr %103, align 4, !tbaa !9
  %105 = load i32, ptr %5, align 4, !tbaa !9
  %106 = icmp slt i32 %104, %105
  br i1 %106, label %107, label %110

107:                                              ; preds = %96
  %108 = load i32, ptr %11, align 4, !tbaa !9
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %8, align 4, !tbaa !9
  br label %112

110:                                              ; preds = %96
  %111 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %111, ptr %9, align 4, !tbaa !9
  br label %112

112:                                              ; preds = %110, %107
  store i32 0, ptr %12, align 4
  br label %113

113:                                              ; preds = %112, %95
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  %114 = load i32, ptr %12, align 4
  switch i32 %114, label %117 [
    i32 0, label %115
  ]

115:                                              ; preds = %113
  br label %74, !llvm.loop !13

116:                                              ; preds = %74
  store i1 false, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %117

117:                                              ; preds = %116, %113
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %118 = load i1, ptr %3, align 1
  ret i1 %118
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z12searchMatrixRSt6vectorIS_IiSaIiEESaIS1_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = trunc i64 %3 to i32
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #1
  %7 = trunc i64 %6 to i32
  %8 = icmp sgt i32 %4, 0
  br i1 %8, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %9 = shl i64 %6, 32
  %sext = add i64 %9, -4294967296
  %10 = ashr exact i64 %sext, 32
  br label %11

11:                                               ; preds = %.lr.ph, %23
  %.04158 = phi i32 [ %4, %.lr.ph ], [ %.142, %23 ]
  %.04457 = phi i32 [ 0, %.lr.ph ], [ %.145, %23 ]
  %12 = sub nsw i32 %.04158, %.04457
  %13 = sdiv i32 %12, 2
  %14 = add nsw i32 %13, %.04457
  %15 = sext i32 %14 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef 0) #1
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %.not = icmp sgt i32 %18, %1
  br i1 %.not, label %23, label %19

19:                                               ; preds = %11
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %10) #1
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %.not51 = icmp slt i32 %22, %1
  br i1 %.not51, label %23, label %._crit_edge.loopexit

23:                                               ; preds = %19, %11
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %10) #1
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %.not53 = icmp sgt i32 %26, %1
  %27 = add nsw i32 %14, 1
  %.145 = select i1 %.not53, i32 %.04457, i32 %27
  %.142 = select i1 %.not53, i32 %14, i32 %.04158
  %28 = icmp slt i32 %.145, %.142
  br i1 %28, label %11, label %._crit_edge.loopexit, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %19, %23
  %29 = sext i32 %14 to i64
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %2
  %.140 = phi i64 [ 0, %2 ], [ %29, %._crit_edge.loopexit ]
  %30 = icmp sgt i32 %7, 0
  br i1 %30, label %.lr.ph64, label %.thread

.lr.ph64:                                         ; preds = %._crit_edge, %38
  %.24362 = phi i32 [ %.3, %38 ], [ %7, %._crit_edge ]
  %.24661 = phi i32 [ %.347, %38 ], [ 0, %._crit_edge ]
  %31 = sub nsw i32 %.24362, %.24661
  %32 = sdiv i32 %31, 2
  %33 = add nsw i32 %32, %.24661
  %34 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.140) #1
  %35 = sext i32 %33 to i64
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %35) #1
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %.not54 = icmp eq i32 %37, %1
  br i1 %.not54, label %.thread, label %38

38:                                               ; preds = %.lr.ph64
  %39 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.140) #1
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %35) #1
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = icmp slt i32 %41, %1
  %43 = add nsw i32 %33, 1
  %.347 = select i1 %42, i32 %43, i32 %.24661
  %.3 = select i1 %42, i32 %.24362, i32 %33
  %44 = icmp slt i32 %.347, %.3
  br i1 %44, label %.lr.ph64, label %.thread

.thread:                                          ; preds = %38, %.lr.ph64, %._crit_edge
  %.lcssa = phi i1 [ false, %._crit_edge ], [ %.not54, %.lr.ph64 ], [ %.not54, %38 ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass